4 files changed, 24 insertions, 19 deletions
diff --git a/libpcsxcore/gte_neon.s b/libpcsxcore/gte_neon.S
index 470c3e3..9fafb27 100644
--- a/libpcsxcore/gte_neon.s
+++ b/libpcsxcore/gte_neon.S
@@ -17,6 +17,15 @@ scratch:
 .text
 .align 2
 
+.macro ldr_scratch rd
+#ifndef __PIC__
+    movw        \rd, #:lower16:scratch
+    movt        \rd, #:upper16:scratch
+#else
+    ldr         \rd, =scratch
+#endif
+.endm
+
 @ XXX: gteMAC calc shouldn't be saturating, but it is here
 
 @ approximate gteMAC|123 flags
@@ -139,8 +148,7 @@ gteRTPS_neon:
     push        {r4-r6,lr}
 
 @    fmrx        r4, fpscr      @ vmrs? at least 40 cycle hit
-    movw        r1, #:lower16:scratch
-    movt        r1, #:upper16:scratch
+    ldr_scratch r1
     mov         r12, #0
 
     vldmia      r0, {d8}       @ VXYZ(0)
@@ -293,8 +301,7 @@ gteRTPS_neon:
 gteRTPT_neon:
     push        {r4-r11,lr}
 
-    movw        r1, #:lower16:scratch
-    movt        r1, #:upper16:scratch
+    ldr_scratch r1
     mov         r12, #0
 
     rtpx_preload
diff --git a/libpcsxcore/new_dynarec/assem_arm.c b/libpcsxcore/new_dynarec/assem_arm.c
index f2c2efa..77cfafa 100644
--- a/libpcsxcore/new_dynarec/assem_arm.c
+++ b/libpcsxcore/new_dynarec/assem_arm.c
@@ -2702,7 +2702,7 @@ void literal_pool_jumpover(int n)
   set_jump_target(jaddr,(int)out);
 }
 
-emit_extjump2(int addr, int target, int linker)
+emit_extjump2(u_int addr, int target, int linker)
 {
   u_char *ptr=(u_char *)addr;
   assert((ptr[3]&0x0e)==0xa);
diff --git a/libpcsxcore/new_dynarec/assem_arm.h b/libpcsxcore/new_dynarec/assem_arm.h
index 2d9efe1..f4e36a9 100644
--- a/libpcsxcore/new_dynarec/assem_arm.h
+++ b/libpcsxcore/new_dynarec/assem_arm.h
@@ -66,5 +66,5 @@ extern char *invc_ptr;
 #define BASE_ADDR 0x1000000
 #else
 extern char translation_cache[1 << TARGET_SIZE_2];
-#define BASE_ADDR translation_cache
+#define BASE_ADDR (u_int)translation_cache
 #endif
diff --git a/libpcsxcore/new_dynarec/linkage_arm.s b/libpcsxcore/new_dynarec/linkage_arm.S
index bd5a03d..4748078 100644
--- a/libpcsxcore/new_dynarec/linkage_arm.s
+++ b/libpcsxcore/new_dynarec/linkage_arm.S
@@ -19,8 +19,6 @@
  *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.          *
  * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
 
-/* .equiv HAVE_ARMV7, 1 */
-
 	.global	dynarec_local
 	.global	reg
 	.global	hi
@@ -165,33 +163,33 @@ FCR31 = align0
 	.type	FCR31, %object
 	.size	FCR31, 4
 
-.macro load_var_adr reg var
-.if HAVE_ARMV7
+.macro load_varadr reg var
+#if defined(__ARM_ARCH_7A__) && !defined(__PIC__)
 	movw	\reg, #:lower16:\var
 	movt	\reg, #:upper16:\var
-.else
+#else
 	ldr	\reg, =\var
-.endif
+#endif
 .endm
 
 .macro mov_16 reg imm
-.if HAVE_ARMV7
+#ifdef __ARM_ARCH_7A__
 	movw	\reg, #\imm
-.else
+#else
 	mov	\reg, #(\imm & 0x00ff)
 	orr	\reg, #(\imm & 0xff00)
-.endif
+#endif
 .endm
 
 .macro mov_24 reg imm
-.if HAVE_ARMV7
+#ifdef __ARM_ARCH_7A__
 	movw	\reg, #(\imm & 0xffff)
 	movt	\reg, #(\imm >> 16)
-.else
+#else
 	mov	\reg, #(\imm & 0x0000ff)
 	orr	\reg, #(\imm & 0x00ff00)
 	orr	\reg, #(\imm & 0xff0000)
-.endif
+#endif
 .endm
 
 .macro dyna_linker_main
@@ -778,7 +776,7 @@ invalidate_addr_call:
 new_dyna_start:
 	/* ip is stored to conform EABI alignment */
 	stmfd	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, ip, lr}
-	load_var_adr fp, dynarec_local
+	load_varadr fp, dynarec_local
 	ldr	r0, [fp, #pcaddr-dynarec_local]
 	bl	get_addr_ht
 	ldr	r1, [fp, #next_interupt-dynarec_local]