From 0486fdc9bd313ce2f01dafa4d3c151f40e2c729b Mon Sep 17 00:00:00 2001
From: notaz
Date: Sun, 1 Jan 2012 02:10:52 +0200
Subject: change lcf handling

not quite right but better than before, I hope
---
 frontend/xkb.c                    |  2 ++
 libpcsxcore/gpu.h                 | 10 +++++++---
 libpcsxcore/new_dynarec/pcsxmem.c | 10 +++++++++-
 libpcsxcore/psxcounters.c         | 13 ++++++-------
 libpcsxcore/psxcounters.h         |  2 ++
 libpcsxcore/psxhw.c               |  2 ++
 6 files changed, 28 insertions(+), 11 deletions(-)

diff --git a/frontend/xkb.c b/frontend/xkb.c
index 88dbc56..f015dd0 100644
--- a/frontend/xkb.c
+++ b/frontend/xkb.c
@@ -128,7 +128,9 @@ int x11_update_keys(unsigned int *action) {
 	}
 
 	if (leave) {
+		extern void OnFile_Exit();
 		DestroyKeyboard();
+		OnFile_Exit();
 		exit(1);
 	}
 
diff --git a/libpcsxcore/gpu.h b/libpcsxcore/gpu.h
index d02dca4..018d353 100644
--- a/libpcsxcore/gpu.h
+++ b/libpcsxcore/gpu.h
@@ -5,9 +5,13 @@
  *    that GPU plugin doesn't.
  */
 
-#define PSXGPU_LCF   (1<<31)
-#define PSXGPU_nBUSY (1<<26)
-#define PSXGPU_ILACE (1<<22)
+#define PSXGPU_LCF     (1<<31)
+#define PSXGPU_nBUSY   (1<<26)
+#define PSXGPU_ILACE   (1<<22)
+#define PSXGPU_DHEIGHT (1<<19)
+
+// both must be set for interlace to work
+#define PSXGPU_ILACE_BITS (PSXGPU_ILACE | PSXGPU_DHEIGHT)
 
 #define HW_GPU_STATUS psxHu32ref(0x1814)
 
diff --git a/libpcsxcore/new_dynarec/pcsxmem.c b/libpcsxcore/new_dynarec/pcsxmem.c
index 2306ca7..0464021 100644
--- a/libpcsxcore/new_dynarec/pcsxmem.c
+++ b/libpcsxcore/new_dynarec/pcsxmem.c
@@ -212,9 +212,17 @@ static void io_spu_write32(u32 value)
 
 static u32 io_gpu_read_status(void)
 {
+	u32 v;
+
 	// meh2, syncing for img bit, might want to avoid it..
 	gpuSyncPluginSR();
-	return HW_GPU_STATUS;
+	v = HW_GPU_STATUS;
+
+	// XXX: because of large timeslices can't use hSyncCount, using rough
+	// approximization instead. Perhaps better use hcounter code here or something.
+	if (hSyncCount < 240 && (HW_GPU_STATUS & PSXGPU_ILACE_BITS) != PSXGPU_ILACE_BITS)
+		v |= PSXGPU_LCF & (psxRegs.cycle << 20);
+	return v;
 }
 
 static void io_gpu_write_status(u32 value)
diff --git a/libpcsxcore/psxcounters.c b/libpcsxcore/psxcounters.c
index cd99842..5056c70 100644
--- a/libpcsxcore/psxcounters.c
+++ b/libpcsxcore/psxcounters.c
@@ -60,9 +60,9 @@ static const u32 CountToOverflow  = 0;
 static const u32 CountToTarget    = 1;
 
 static const u32 FrameRate[]      = { 60, 50 };
-static const u32 VBlankStart[]    = { 240, 256 };
 static const u32 HSyncTotal[]     = { 263, 313 };
 static const u32 SpuUpdInterval[] = { 32, 32 };
+#define VBlankStart 240
 
 #define VERBOSE_LEVEL 0
 static const s32 VerboseLevel     = VERBOSE_LEVEL;
@@ -288,10 +288,9 @@ void psxRcntUpdate()
         }
         
         // VSync irq.
-        if( hSyncCount == VBlankStart[Config.PsxType] )
+        if( hSyncCount == VBlankStart )
         {
-            if( !(HW_GPU_STATUS & PSXGPU_ILACE) )
-                HW_GPU_STATUS |= PSXGPU_LCF;
+            HW_GPU_STATUS &= ~PSXGPU_LCF;
 
             setIrq( 0x01 );
 
@@ -305,14 +304,14 @@ void psxRcntUpdate()
             hSyncCount = 0;
             frame_counter++;
 
-            HW_GPU_STATUS &= ~PSXGPU_LCF;
-            if( HW_GPU_STATUS & PSXGPU_ILACE )
+            gpuSyncPluginSR();
+            if( (HW_GPU_STATUS & PSXGPU_ILACE_BITS) == PSXGPU_ILACE_BITS )
                 HW_GPU_STATUS |= frame_counter << 31;
         }
 
         // Schedule next call, in hsyncs
         hsync_steps = SpuUpdInterval[Config.PsxType] - spuSyncCount;
-        next_vsync = VBlankStart[Config.PsxType] - hSyncCount; // ok to overflow
+        next_vsync = VBlankStart - hSyncCount; // ok to overflow
         next_lace = HSyncTotal[Config.PsxType] - hSyncCount;
         if( next_vsync && next_vsync < hsync_steps )
             hsync_steps = next_vsync;
diff --git a/libpcsxcore/psxcounters.h b/libpcsxcore/psxcounters.h
index 6898901..0aab8f0 100644
--- a/libpcsxcore/psxcounters.h
+++ b/libpcsxcore/psxcounters.h
@@ -31,6 +31,8 @@ extern "C" {
 
 extern u32 psxNextCounter, psxNextsCounter;
 
+extern u32 hSyncCount, frame_counter;
+
 typedef struct Rcnt
 {
     u16 mode, target;
diff --git a/libpcsxcore/psxhw.c b/libpcsxcore/psxhw.c
index bcedb97..ebdff87 100644
--- a/libpcsxcore/psxhw.c
+++ b/libpcsxcore/psxhw.c
@@ -242,6 +242,8 @@ u32 psxHwRead32(u32 add) {
 		case 0x1f801814:
 			gpuSyncPluginSR();
 			hard = HW_GPU_STATUS;
+			if (hSyncCount < 240 && (HW_GPU_STATUS & PSXGPU_ILACE_BITS) != PSXGPU_ILACE_BITS)
+				hard |= PSXGPU_LCF & (psxRegs.cycle << 20);
 #ifdef PSXHW_LOG
 			PSXHW_LOG("GPU STATUS 32bit read %x\n", hard);
 #endif
-- 
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