From 71e490c5930e6e5f71d1f2d5165c3a801ac46be1 Mon Sep 17 00:00:00 2001
From: notaz
Date: Sun, 18 Sep 2016 19:22:58 +0300
Subject: drc: drop heaps of dead code

I've kept it around to keep the code similar to Ari64's version,
so that it would be easier to merge back his fixes. However Mupen64plus
has long reformatted the code and it kind of went different direction
anyway, so there is no point to keep all this code now.
---
 libpcsxcore/new_dynarec/assem_arm.h | 9 ---------
 1 file changed, 9 deletions(-)

(limited to 'libpcsxcore/new_dynarec/assem_arm.h')

diff --git a/libpcsxcore/new_dynarec/assem_arm.h b/libpcsxcore/new_dynarec/assem_arm.h
index 2254638..2d10ac7 100644
--- a/libpcsxcore/new_dynarec/assem_arm.h
+++ b/libpcsxcore/new_dynarec/assem_arm.h
@@ -9,11 +9,6 @@
 #define USE_MINI_HT 1
 //#define REG_PREFETCH 1
 #define HAVE_CONDITIONAL_CALL 1
-#define DISABLE_TLB 1
-//#define MUPEN64
-#define FORCE32 1
-#define DISABLE_COP1 1
-#define PCSX 1
 #define RAM_SIZE 0x200000
 
 #ifndef __ARM_ARCH_7A__
@@ -25,11 +20,7 @@
 #define BASE_ADDR_FIXED 0
 #endif
 
-#ifdef FORCE32
 #define REG_SHIFT 2
-#else
-#define REG_SHIFT 3
-#endif
 
 /* ARM calling convention:
    r0-r3, r12: caller-save
-- 
cgit v1.2.3


From d148d26560527efdd71685df8eac0497827ca766 Mon Sep 17 00:00:00 2001
From: notaz
Date: Mon, 19 Sep 2016 02:40:17 +0300
Subject: drc: try to support w^x platforms like iOS

untested...
---
 libpcsxcore/new_dynarec/assem_arm.h | 12 ------------
 1 file changed, 12 deletions(-)

(limited to 'libpcsxcore/new_dynarec/assem_arm.h')

diff --git a/libpcsxcore/new_dynarec/assem_arm.h b/libpcsxcore/new_dynarec/assem_arm.h
index 2d10ac7..acf65bd 100644
--- a/libpcsxcore/new_dynarec/assem_arm.h
+++ b/libpcsxcore/new_dynarec/assem_arm.h
@@ -5,21 +5,9 @@
 
 #define HOST_IMM8 1
 #define HAVE_CMOV_IMM 1
-#define CORTEX_A8_BRANCH_PREDICTION_HACK 1
-#define USE_MINI_HT 1
-//#define REG_PREFETCH 1
 #define HAVE_CONDITIONAL_CALL 1
 #define RAM_SIZE 0x200000
 
-#ifndef __ARM_ARCH_7A__
-//#undef CORTEX_A8_BRANCH_PREDICTION_HACK
-//#undef USE_MINI_HT
-#endif
-
-#ifndef BASE_ADDR_FIXED
-#define BASE_ADDR_FIXED 0
-#endif
-
 #define REG_SHIFT 2
 
 /* ARM calling convention:
-- 
cgit v1.2.3


From 1e212a25c55c298490867c2ded029c82db1d2b9d Mon Sep 17 00:00:00 2001
From: notaz
Date: Wed, 21 Sep 2016 02:07:16 +0300
Subject: drc: some vita and 3ds support

not tested, mostly just guesswork
---
 libpcsxcore/new_dynarec/assem_arm.h | 19 ++++++++++++++-----
 1 file changed, 14 insertions(+), 5 deletions(-)

(limited to 'libpcsxcore/new_dynarec/assem_arm.h')

diff --git a/libpcsxcore/new_dynarec/assem_arm.h b/libpcsxcore/new_dynarec/assem_arm.h
index acf65bd..bb6114c 100644
--- a/libpcsxcore/new_dynarec/assem_arm.h
+++ b/libpcsxcore/new_dynarec/assem_arm.h
@@ -39,10 +39,19 @@ extern char *invc_ptr;
 #define TARGET_SIZE_2 24 // 2^24 = 16 megabytes
 
 // Code generator target address
-#if BASE_ADDR_FIXED
-// "round" address helpful for debug
-#define BASE_ADDR 0x1000000
+#if   defined(BASE_ADDR_FIXED)
+  // "round" address helpful for debug
+  // this produces best code, but not many platforms allow it,
+  // only use if you are sure this range is always free
+  #define BASE_ADDR 0x1000000
+  #define translation_cache (char *)BASE_ADDR
+#elif defined(BASE_ADDR_DYNAMIC)
+  // for platforms that can't just use .bss buffer, like vita
+  // otherwise better to use the next option for closer branches
+  extern char *translation_cache;
+  #define BASE_ADDR (u_int)translation_cache
 #else
-extern char translation_cache[1 << TARGET_SIZE_2];
-#define BASE_ADDR (u_int)translation_cache
+  // using a static buffer in .bss
+  extern char translation_cache[1 << TARGET_SIZE_2];
+  #define BASE_ADDR (u_int)translation_cache
 #endif
-- 
cgit v1.2.3