From c4052f4d79cf0103cb10f9948ae1a810b62ff05d Mon Sep 17 00:00:00 2001
From: aliaspider
Date: Tue, 29 Sep 2015 18:08:15 +0100
Subject: (vita) build fix.

---
 libpcsxcore/new_dynarec/assem_arm.c | 4 +++-
 libpcsxcore/new_dynarec/assem_arm.h | 4 ++++
 libpcsxcore/new_dynarec/emu_if.c    | 2 +-
 3 files changed, 8 insertions(+), 2 deletions(-)

(limited to 'libpcsxcore/new_dynarec')

diff --git a/libpcsxcore/new_dynarec/assem_arm.c b/libpcsxcore/new_dynarec/assem_arm.c
index 6853e9e..8e0c634 100644
--- a/libpcsxcore/new_dynarec/assem_arm.c
+++ b/libpcsxcore/new_dynarec/assem_arm.c
@@ -30,7 +30,9 @@
 #endif
 #include "arm_features.h"
 
-#if !BASE_ADDR_FIXED
+#ifdef VITA
+char* translation_cache = 0;
+#elif !BASE_ADDR_FIXED
 char translation_cache[1 << TARGET_SIZE_2] __attribute__((aligned(4096)));
 #endif
 
diff --git a/libpcsxcore/new_dynarec/assem_arm.h b/libpcsxcore/new_dynarec/assem_arm.h
index 2254638..da4144d 100644
--- a/libpcsxcore/new_dynarec/assem_arm.h
+++ b/libpcsxcore/new_dynarec/assem_arm.h
@@ -64,6 +64,10 @@ extern char *invc_ptr;
 // "round" address helpful for debug
 #define BASE_ADDR 0x1000000
 #else
+#if defined(VITA)
+extern char* translation_cache;
+#else
 extern char translation_cache[1 << TARGET_SIZE_2];
+#endif
 #define BASE_ADDR (u_int)translation_cache
 #endif
diff --git a/libpcsxcore/new_dynarec/emu_if.c b/libpcsxcore/new_dynarec/emu_if.c
index 22db5d1..8aebd64 100644
--- a/libpcsxcore/new_dynarec/emu_if.c
+++ b/libpcsxcore/new_dynarec/emu_if.c
@@ -431,7 +431,7 @@ void do_insn_cmp() {}
 #ifdef DRC_DISABLE
 unsigned int address;
 int pending_exception, stop;
-unsigned int next_interupt;
+u32 next_interupt;
 int new_dynarec_did_compile;
 int cycle_multiplier;
 int new_dynarec_hacks;
-- 
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