From 332a45333682fdbc2070af1f0acdc52b64e068af Mon Sep 17 00:00:00 2001 From: gizmo98 Date: Thu, 29 Jan 2015 18:04:27 +0100 Subject: assem_arm.c: Use ARMv6 instructions if possible Replace HAVE_ARMv7 with HAVE_ARMv6 if the instructions are supported by ARMv6. uxth, sxth and sxtb are present under ARMv6: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0473k/dom1361289925707.html --- libpcsxcore/new_dynarec/assem_arm.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'libpcsxcore') diff --git a/libpcsxcore/new_dynarec/assem_arm.c b/libpcsxcore/new_dynarec/assem_arm.c index 9ee832e..6853e9e 100644 --- a/libpcsxcore/new_dynarec/assem_arm.c +++ b/libpcsxcore/new_dynarec/assem_arm.c @@ -1285,7 +1285,7 @@ void emit_andimm(int rs,int imm,int rt) assem_debug("bic %s,%s,#%d\n",regname[rt],regname[rs],imm); output_w32(0xe3c00000|rd_rn_rm(rt,rs,0)|armval); }else if(imm==65535) { - #ifndef HAVE_ARMV7 + #ifndef HAVE_ARMV6 assem_debug("bic %s,%s,#FF000000\n",regname[rt],regname[rs]); output_w32(0xe3c00000|rd_rn_rm(rt,rs,0)|0x4FF); assem_debug("bic %s,%s,#00FF0000\n",regname[rt],regname[rt]); @@ -1418,7 +1418,7 @@ void emit_shrdimm(int rs,int rs2,u_int imm,int rt) void emit_signextend16(int rs,int rt) { - #ifndef HAVE_ARMV7 + #ifndef HAVE_ARMV6 emit_shlimm(rs,16,rt); emit_sarimm(rt,16,rt); #else @@ -1429,7 +1429,7 @@ void emit_signextend16(int rs,int rt) void emit_signextend8(int rs,int rt) { - #ifndef HAVE_ARMV7 + #ifndef HAVE_ARMV6 emit_shlimm(rs,24,rt); emit_sarimm(rt,24,rt); #else -- cgit v1.2.3 From f6b23854c4ce7beb652b705cfa7630fe6629d9ce Mon Sep 17 00:00:00 2001 From: gizmo98 Date: Thu, 29 Jan 2015 18:08:24 +0100 Subject: gte_arm.S: Use ARMv6 if possible Replace HAVE_ARMv7 with HAVE_ARMv6 if the instructions are supported by ARMv6. ssat, usat and sxth are present under ARMv6: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0473k/dom1361289925707.html --- libpcsxcore/gte_arm.S | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'libpcsxcore') diff --git a/libpcsxcore/gte_arm.S b/libpcsxcore/gte_arm.S index 3ef876d..d6fc1ab 100644 --- a/libpcsxcore/gte_arm.S +++ b/libpcsxcore/gte_arm.S @@ -11,7 +11,7 @@ .align 2 .macro sgnxt16 rd rs -#ifdef HAVE_ARMV7 +#ifdef HAVE_ARMV6 sxth \rd, \rs #else lsl \rd, \rs, #16 @@ -28,7 +28,7 @@ .endm .macro ssatx rd wr bit -#ifdef HAVE_ARMV7 +#ifdef HAVE_ARMV6 ssat \rd, #\bit, \rd #else cmp \rd, \wr @@ -52,7 +52,7 @@ .endm .macro usat16_ rd rs -#ifdef HAVE_ARMV7 +#ifdef HAVE_ARMV6 usat \rd, #16, \rs #else subs \rd, \rs, #0 -- cgit v1.2.3 From eed148b7fcde73477379388da58d12cd379a6a81 Mon Sep 17 00:00:00 2001 From: notaz Date: Tue, 3 Feb 2015 01:35:33 +0200 Subject: frontend: update libpicofe --- libpcsxcore/ppf.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'libpcsxcore') diff --git a/libpcsxcore/ppf.c b/libpcsxcore/ppf.c index 0d80107..edebdd0 100644 --- a/libpcsxcore/ppf.c +++ b/libpcsxcore/ppf.c @@ -347,8 +347,10 @@ int LoadSBI(const char *fname, int sector_count) { return -1; sbi_sectors = calloc(1, sector_count / 8); - if (sbi_sectors == NULL) + if (sbi_sectors == NULL) { + fclose(sbihandle); return -1; + } // 4-byte SBI header fread(buffer, 1, 4, sbihandle); -- cgit v1.2.3 From 58ebb94c13df061762a7aca78e52f066339d9610 Mon Sep 17 00:00:00 2001 From: notaz Date: Thu, 5 Feb 2015 02:29:23 +0200 Subject: dma: do some madr updates untested, but makes ff7 behave better with linked lists (dither problem) --- libpcsxcore/cdrom.c | 3 +-- libpcsxcore/new_dynarec/emu_if.c | 2 +- libpcsxcore/psxdma.c | 44 ++++++++++++++++++++++++++-------------- 3 files changed, 31 insertions(+), 18 deletions(-) (limited to 'libpcsxcore') diff --git a/libpcsxcore/cdrom.c b/libpcsxcore/cdrom.c index 3a2eb1f..2e6277b 100644 --- a/libpcsxcore/cdrom.c +++ b/libpcsxcore/cdrom.c @@ -1413,9 +1413,8 @@ void psxDma3(u32 madr, u32 bcr, u32 chcr) { psxCpu->Clear(madr, cdsize / 4); pTransfer += cdsize; - - // burst vs normal if( chcr == 0x11400100 ) { + HW_DMA3_MADR = SWAPu32(madr + cdsize); CDRDMA_INT( (cdsize/4) / 4 ); } else if( chcr == 0x11000000 ) { diff --git a/libpcsxcore/new_dynarec/emu_if.c b/libpcsxcore/new_dynarec/emu_if.c index 092c8ae..22db5d1 100644 --- a/libpcsxcore/new_dynarec/emu_if.c +++ b/libpcsxcore/new_dynarec/emu_if.c @@ -378,7 +378,7 @@ static void ari64_clear(u32 addr, u32 size) { u32 start, end, main_ram; - size *= 4; /* PCSX uses DMA units */ + size *= 4; /* PCSX uses DMA units (words) */ evprintf("ari64_clear %08x %04x\n", addr, size); diff --git a/libpcsxcore/psxdma.c b/libpcsxcore/psxdma.c index ff7d6a3..b0f3fba 100644 --- a/libpcsxcore/psxdma.c +++ b/libpcsxcore/psxdma.c @@ -37,7 +37,7 @@ void spuInterrupt() { void psxDma4(u32 madr, u32 bcr, u32 chcr) { // SPU u16 *ptr; - u32 size; + u32 words; switch (chcr) { case 0x01000201: //cpu to spu transfer @@ -51,8 +51,10 @@ void psxDma4(u32 madr, u32 bcr, u32 chcr) { // SPU #endif break; } - SPU_writeDMAMem(ptr, (bcr >> 16) * (bcr & 0xffff) * 2, psxRegs.cycle); - SPUDMA_INT((bcr >> 16) * (bcr & 0xffff) / 2); + words = (bcr >> 16) * (bcr & 0xffff); + SPU_writeDMAMem(ptr, words * 2, psxRegs.cycle); + HW_DMA4_MADR = SWAPu32(madr + words * 4); + SPUDMA_INT(words / 2); return; case 0x01000200: //spu to cpu transfer @@ -66,10 +68,13 @@ void psxDma4(u32 madr, u32 bcr, u32 chcr) { // SPU #endif break; } - size = (bcr >> 16) * (bcr & 0xffff) * 2; - SPU_readDMAMem(ptr, size, psxRegs.cycle); - psxCpu->Clear(madr, size); - break; + words = (bcr >> 16) * (bcr & 0xffff); + SPU_readDMAMem(ptr, words * 2, psxRegs.cycle); + psxCpu->Clear(madr, words); + + HW_DMA4_MADR = SWAPu32(madr + words * 4); + SPUDMA_INT(words / 2); + return; #ifdef PSXDMA_LOG default: @@ -124,6 +129,7 @@ static u32 gpuDmaChainSize(u32 addr) { void psxDma2(u32 madr, u32 bcr, u32 chcr) { // GPU u32 *ptr; + u32 words; u32 size; switch (chcr) { @@ -139,12 +145,14 @@ void psxDma2(u32 madr, u32 bcr, u32 chcr) { // GPU break; } // BA blocks * BS words (word = 32-bits) - size = (bcr >> 16) * (bcr & 0xffff); - GPU_readDataMem(ptr, size); - psxCpu->Clear(madr, size); + words = (bcr >> 16) * (bcr & 0xffff); + GPU_readDataMem(ptr, words); + psxCpu->Clear(madr, words); + + HW_DMA2_MADR = SWAPu32(madr + words * 4); // already 32-bit word size ((size * 4) / 4) - GPUDMA_INT(size / 4); + GPUDMA_INT(words / 4); return; case 0x01000201: // mem2vram @@ -159,11 +167,13 @@ void psxDma2(u32 madr, u32 bcr, u32 chcr) { // GPU break; } // BA blocks * BS words (word = 32-bits) - size = (bcr >> 16) * (bcr & 0xffff); - GPU_writeDataMem(ptr, size); + words = (bcr >> 16) * (bcr & 0xffff); + GPU_writeDataMem(ptr, words); + + HW_DMA2_MADR = SWAPu32(madr + words * 4); // already 32-bit word size ((size * 4) / 4) - GPUDMA_INT(size / 4); + GPUDMA_INT(words / 4); return; case 0x01000401: // dma chain @@ -175,7 +185,11 @@ void psxDma2(u32 madr, u32 bcr, u32 chcr) { // GPU if ((int)size <= 0) size = gpuDmaChainSize(madr); HW_GPU_STATUS &= ~PSXGPU_nBUSY; - + + // we don't emulate progress, just busy flag and end irq, + // so pretend we're already at the last block + HW_DMA2_MADR = SWAPu32(0xffffff); + // Tekken 3 = use 1.0 only (not 1.5x) // Einhander = parse linked list in pieces (todo) -- cgit v1.2.3 From fc4803bdc2c9840a007c60e422fb0531107b80f2 Mon Sep 17 00:00:00 2001 From: notaz Date: Thu, 5 Feb 2015 02:36:58 +0200 Subject: dma: some timing hacks untested --- libpcsxcore/cdrom.c | 5 ++++- libpcsxcore/mdec.c | 12 +++++------- libpcsxcore/psxdma.c | 9 ++++++--- 3 files changed, 15 insertions(+), 11 deletions(-) (limited to 'libpcsxcore') diff --git a/libpcsxcore/cdrom.c b/libpcsxcore/cdrom.c index 2e6277b..556b512 100644 --- a/libpcsxcore/cdrom.c +++ b/libpcsxcore/cdrom.c @@ -1418,7 +1418,10 @@ void psxDma3(u32 madr, u32 bcr, u32 chcr) { CDRDMA_INT( (cdsize/4) / 4 ); } else if( chcr == 0x11000000 ) { - CDRDMA_INT( (cdsize/4) * 1 ); + // CDRDMA_INT( (cdsize/4) * 1 ); + // halted + psxRegs.cycle += (cdsize/4) * 24/2; + CDRDMA_INT(16); } return; diff --git a/libpcsxcore/mdec.c b/libpcsxcore/mdec.c index bed4e53..d6c7ab6 100644 --- a/libpcsxcore/mdec.c +++ b/libpcsxcore/mdec.c @@ -32,7 +32,7 @@ * 320x240x16@60Hz => 9.216 MB/s * so 2.0 to 4.0 should be fine. */ -#define MDEC_BIAS 2.0f +#define MDEC_BIAS 2 #define DSIZE 8 #define DSIZE2 (DSIZE * DSIZE) @@ -545,15 +545,13 @@ void psxDma1(u32 adr, u32 bcr, u32 chcr) { int blk[DSIZE2 * 6]; u8 * image; int size; - int dmacnt; + u32 words; if (chcr != 0x01000200) return; - size = (bcr >> 16) * (bcr & 0xffff); + words = (bcr >> 16) * (bcr & 0xffff); /* size in byte */ - size *= 4; - /* I guess the memory speed is limitating */ - dmacnt = size; + size = words * 4; if (!(mdec.reg1 & MDEC1_BUSY)) { /* add to pending */ @@ -625,7 +623,7 @@ void psxDma1(u32 adr, u32 bcr, u32 chcr) { } /* define the power of mdec */ - MDECOUTDMA_INT((int) ((dmacnt* MDEC_BIAS))); + MDECOUTDMA_INT(words * MDEC_BIAS); } } diff --git a/libpcsxcore/psxdma.c b/libpcsxcore/psxdma.c index b0f3fba..03ee563 100644 --- a/libpcsxcore/psxdma.c +++ b/libpcsxcore/psxdma.c @@ -220,7 +220,7 @@ void gpuInterrupt() { } void psxDma6(u32 madr, u32 bcr, u32 chcr) { - u32 size; + u32 words; u32 *mem = (u32 *)PSXM(madr); #ifdef PSXDMA_LOG @@ -238,7 +238,7 @@ void psxDma6(u32 madr, u32 bcr, u32 chcr) { } // already 32-bit size - size = bcr; + words = bcr; while (bcr--) { *mem-- = SWAP32((madr - 4) & 0xffffff); @@ -246,7 +246,10 @@ void psxDma6(u32 madr, u32 bcr, u32 chcr) { } mem++; *mem = 0xffffff; - GPUOTCDMA_INT(size); + //GPUOTCDMA_INT(size); + // halted + psxRegs.cycle += words; + GPUOTCDMA_INT(16); return; } #ifdef PSXDMA_LOG -- cgit v1.2.3