From d3f3bf09b5b3f1d8b025cc9dbd902eb157aae0b7 Mon Sep 17 00:00:00 2001 From: notaz Date: Sat, 1 Oct 2011 01:13:43 +0300 Subject: yet more random armv5 tweaks --- libpcsxcore/new_dynarec/assem_arm.h | 6 ++++++ libpcsxcore/new_dynarec/emu_if.c | 3 +++ libpcsxcore/new_dynarec/emu_if.h | 4 ---- libpcsxcore/new_dynarec/new_dynarec.c | 2 +- 4 files changed, 10 insertions(+), 5 deletions(-) (limited to 'libpcsxcore') diff --git a/libpcsxcore/new_dynarec/assem_arm.h b/libpcsxcore/new_dynarec/assem_arm.h index a289aa1..917d276 100644 --- a/libpcsxcore/new_dynarec/assem_arm.h +++ b/libpcsxcore/new_dynarec/assem_arm.h @@ -16,6 +16,12 @@ #define PCSX 1 #define RAM_SIZE 0x200000 +#ifndef __ARM_ARCH_7A__ +#define ARMv5_ONLY +//#undef CORTEX_A8_BRANCH_PREDICTION_HACK +//#undef USE_MINI_HT +#endif + #ifdef FORCE32 #define REG_SHIFT 2 #else diff --git a/libpcsxcore/new_dynarec/emu_if.c b/libpcsxcore/new_dynarec/emu_if.c index 39bbf2a..02433f1 100644 --- a/libpcsxcore/new_dynarec/emu_if.c +++ b/libpcsxcore/new_dynarec/emu_if.c @@ -200,6 +200,9 @@ static int ari64_init() gte_handlers[0x30] = gte_handlers_nf[0x30] = gteRTPT_neon; gte_handlers[0x12] = gte_handlers_nf[0x12] = gteMVMVA_neon; #endif +#endif +#ifdef DRC_DBG + memcpy(gte_handlers_nf, gte_handlers, sizeof(gte_handlers_nf)); #endif psxH_ptr = psxH; diff --git a/libpcsxcore/new_dynarec/emu_if.h b/libpcsxcore/new_dynarec/emu_if.h index 88749be..7f625a7 100644 --- a/libpcsxcore/new_dynarec/emu_if.h +++ b/libpcsxcore/new_dynarec/emu_if.h @@ -1,10 +1,6 @@ #include "new_dynarec.h" #include "../r3000a.h" -#ifndef __ARM_ARCH_7A__ -#define ARMv5_ONLY -#endif - extern char invalid_code[0x100000]; /* weird stuff */ diff --git a/libpcsxcore/new_dynarec/new_dynarec.c b/libpcsxcore/new_dynarec/new_dynarec.c index 716b1d4..cbc289e 100644 --- a/libpcsxcore/new_dynarec/new_dynarec.c +++ b/libpcsxcore/new_dynarec/new_dynarec.c @@ -8601,7 +8601,7 @@ int new_recompile_block(int addr) case 0x04: gte_rt[i]=1ll<