From 62d7fa9555924ab8e152b546711d27add640b102 Mon Sep 17 00:00:00 2001 From: notaz Date: Thu, 19 Jan 2012 01:33:12 +0200 Subject: refactor gpu plugins and Makefiles name common gpu code gpulib, reduce amount of copy-paste in plugin Makefiles --- plugins/gpulib/Makefile | 38 +++ plugins/gpulib/Makefile.test | 45 +++ plugins/gpulib/cspace.c | 21 ++ plugins/gpulib/cspace.h | 12 + plugins/gpulib/cspace_neon.s | 132 +++++++++ plugins/gpulib/gpu.c | 636 +++++++++++++++++++++++++++++++++++++++++++ plugins/gpulib/gpu.h | 131 +++++++++ plugins/gpulib/gpulib.mak | 54 ++++ plugins/gpulib/test.c | 109 ++++++++ plugins/gpulib/vout_fb.c | 121 ++++++++ plugins/gpulib/vout_sdl.c | 95 +++++++ 11 files changed, 1394 insertions(+) create mode 100644 plugins/gpulib/Makefile create mode 100644 plugins/gpulib/Makefile.test create mode 100644 plugins/gpulib/cspace.c create mode 100644 plugins/gpulib/cspace.h create mode 100644 plugins/gpulib/cspace_neon.s create mode 100644 plugins/gpulib/gpu.c create mode 100644 plugins/gpulib/gpu.h create mode 100644 plugins/gpulib/gpulib.mak create mode 100644 plugins/gpulib/test.c create mode 100644 plugins/gpulib/vout_fb.c create mode 100644 plugins/gpulib/vout_sdl.c (limited to 'plugins/gpulib') diff --git a/plugins/gpulib/Makefile b/plugins/gpulib/Makefile new file mode 100644 index 0000000..a244524 --- /dev/null +++ b/plugins/gpulib/Makefile @@ -0,0 +1,38 @@ +CC = $(CROSS_COMPILE)gcc +AS = $(CROSS_COMPILE)as +AR = $(CROSS_COMPILE)ar + +ARCH = $(shell $(CC) -v 2>&1 | grep -i 'target:' | awk '{print $$2}' | awk -F '-' '{print $$1}') + +CFLAGS += -ggdb -Wall -fPIC -O2 + +OBJS += gpu.o + +ifeq "$(ARCH)" "arm" +ARM_CORTEXA8 ?= 1 +ifeq "$(ARM_CORTEXA8)" "1" +CFLAGS += -mcpu=cortex-a8 -mtune=cortex-a8 -mfpu=neon -mfloat-abi=softfp +ASFLAGS += -mcpu=cortex-a8 -mfpu=neon +OBJS += cspace_neon.o +else +CFLAGS += -mcpu=arm926ej-s -mtune=arm926ej-s +ASFLAGS += -mcpu=arm926ej-s -mfloat-abi=softfp +OBJS += cspace.o +endif +OBJS += vout_fb.o +EXT = a +else +CFLAGS += `sdl-config --cflags` -m32 +OBJS += vout_sdl.o +EXT = x86.a +endif + +TARGET = gpulib.$(EXT) + +all: $(TARGET) + +$(TARGET): $(OBJS) + $(AR) crs $@ $^ + +clean: + $(RM) $(TARGET) $(OBJS) diff --git a/plugins/gpulib/Makefile.test b/plugins/gpulib/Makefile.test new file mode 100644 index 0000000..196b1f9 --- /dev/null +++ b/plugins/gpulib/Makefile.test @@ -0,0 +1,45 @@ +CC = $(CROSS_COMPILE)gcc +CXX = $(CROSS_COMPILE)g++ +CC_ = $(CROSS_COMPILE)gcc + +ARCH = $(shell $(CC) -v 2>&1 | grep -i 'target:' | awk '{print $$2}' | awk -F '-' '{print $$1}') +HAVE_NEON = $(shell $(CC_) -E -dD $(CFLAGS) gpu.h | grep -q '__ARM_NEON__ 1' && echo 1) + +CFLAGS += -ggdb -Wall -DTEST +ifndef DEBUG +CFLAGS += -O2 +endif +ifeq "$(ARCH)" "arm" +CFLAGS += -mcpu=cortex-a8 -mtune=cortex-a8 -mfpu=neon -mfloat-abi=softfp +endif +ifeq "$(ARCH)" "x86_64" +CFLAGS += -m32 +endif + +TARGETS = test_neon test_peops test_unai + +SRC += test.c + +all: $(TARGETS) + +test_neon: SRC += ../gpu_neon/psx_gpu_if.c +test_neon: CFLAGS += -DTEXTURE_CACHE_4BPP -DTEXTURE_CACHE_8BPP +ifeq "$(HAVE_NEON)" "1" +test_neon: SRC += ../gpu_neon/psx_gpu/psx_gpu_arm_neon.S +test_neon: CFLAGS += -DNEON_BUILD +else +test_neon: CFLAGS += -fno-strict-aliasing +endif +test_peops: SRC += ../dfxvideo/gpulib_if.c +test_peops: CFLAGS += -fno-strict-aliasing +test_unai: SRC += ../gpu_unai/gpulib_if.cpp +test_unai: CC_ = $(CXX) +ifeq "$(ARCH)" "arm" +test_unai: SRC += ../gpu_unai/gpu_arm.s +endif + +$(TARGETS): $(SRC) + $(CC_) -o $@ $(SRC) $(CFLAGS) $(LDFLAGS) + +clean: + $(RM) $(TARGETS) diff --git a/plugins/gpulib/cspace.c b/plugins/gpulib/cspace.c new file mode 100644 index 0000000..eee56ce --- /dev/null +++ b/plugins/gpulib/cspace.c @@ -0,0 +1,21 @@ +#include "cspace.h" + +void bgr555_to_rgb565(void *dst_, const void *src_, int bytes) +{ + unsigned int *src = (unsigned int *)src_; + unsigned int *dst = (unsigned int *)dst_; + unsigned int p; + int x; + + for (x = 0; x < bytes / 4; x++) { + p = src[x]; + p = ((p & 0x7c007c00) >> 10) | ((p & 0x03e003e0) << 1) + | ((p & 0x001f001f) << 11); + dst[x] = p; + } +} + +// TODO? +void bgr888_to_rgb888(void *dst, const void *src, int bytes) {} +void bgr888_to_rgb565(void *dst, const void *src, int bytes) {} + diff --git a/plugins/gpulib/cspace.h b/plugins/gpulib/cspace.h new file mode 100644 index 0000000..644143b --- /dev/null +++ b/plugins/gpulib/cspace.h @@ -0,0 +1,12 @@ +#ifdef __cplusplus +extern "C" +{ +#endif + +void bgr555_to_rgb565(void *dst, const void *src, int bytes); +void bgr888_to_rgb888(void *dst, const void *src, int bytes); +void bgr888_to_rgb565(void *dst, const void *src, int bytes); + +#ifdef __cplusplus +} +#endif diff --git a/plugins/gpulib/cspace_neon.s b/plugins/gpulib/cspace_neon.s new file mode 100644 index 0000000..abc0381 --- /dev/null +++ b/plugins/gpulib/cspace_neon.s @@ -0,0 +1,132 @@ +/* + * (C) Gražvydas "notaz" Ignotas, 2010 + * + * This work is licensed under the terms of any of these licenses + * (at your option): + * - GNU GPL, version 2 or later. + * - GNU LGPL, version 2.1 or later. + * See the COPYING file in the top-level directory. + */ + +.text +.align 2 + +.global bgr555_to_rgb565 +bgr555_to_rgb565: + pld [r1] + mov r3, #0x07c0 + vdup.16 q15, r3 + subs r2, r2, #64 + blt btr16_end64 +0: + pld [r1, #64*2] + vldmia r1!, {q0-q3} + vshl.u16 q4, q0, #11 + vshl.u16 q5, q1, #11 + vshl.u16 q6, q2, #11 + vshl.u16 q7, q3, #11 + vsri.u16 q4, q0, #10 + vsri.u16 q5, q1, #10 + vsri.u16 q6, q2, #10 + vsri.u16 q7, q3, #10 + vshl.u16 q0, q0, #1 + vshl.u16 q1, q1, #1 + vshl.u16 q2, q2, #1 + vshl.u16 q3, q3, #1 + vbit q4, q0, q15 + vbit q5, q1, q15 + vbit q6, q2, q15 + vbit q7, q3, q15 + vstmia r0!, {q4-q7} + subs r2, r2, #64 + bge 0b + +btr16_end64: + adds r2, r2, #64 + bxeq lr + subs r2, r2, #16 + blt btr16_end16 + + @ handle the remainder (reasonably rare) +0: + vld1.16 {q0}, [r1]! + vshl.u16 q1, q0, #11 + vshl.u16 q2, q0, #1 + vsri.u16 q1, q0, #10 + vbit q1, q2, q15 + subs r2, r2, #16 + vst1.16 {q1}, [r0]! + bge 0b + +btr16_end16: + adds r2, r2, #16 + bxeq lr + subs r2, r2, #8 + bxlt lr + + @ very rare + vld1.16 d0, [r1]! + vshl.u16 d1, d0, #11 + vshl.u16 d2, d0, #1 + vsri.u16 d1, d0, #10 + vbit d1, d2, d30 + vst1.16 d1, [r0]! + bx lr + + +.global bgr888_to_rgb888 +bgr888_to_rgb888: + pld [r1] + @ r2 /= 48 + mov r2, r2, lsr #4 + movw r3, #0x5556 + movt r3, #0x5555 + umull r12,r2, r3, r2 +0: + pld [r1, #48*3] + vld3.8 {d0-d2}, [r1, :64]! + vld3.8 {d3-d5}, [r1, :64]! + vswp d0, d2 + vswp d3, d5 + vst3.8 {d0-d2}, [r0, :64]! + vst3.8 {d3-d5}, [r0, :64]! + subs r2, r2, #1 + bne 0b + + bx lr + + +.global bgr888_to_rgb565 +bgr888_to_rgb565: + pld [r1] + @ r2 /= 48 + mov r2, r2, lsr #4 + movw r3, #0x5556 + movt r3, #0x5555 + umull r12,r2, r3, r2 + + mov r3, #0x07e0 + vdup.16 q15, r3 +0: + pld [r1, #48*3] + vld3.8 {d1-d3}, [r1, :64]! + vld3.8 {d5-d7}, [r1, :64]! + + vshll.u8 q8, d2, #3 @ g + vshll.u8 q9, d6, #3 + vshr.u8 d0, d3, #3 @ b + vshr.u8 d4, d7, #3 + vzip.8 d0, d1 @ rb + vzip.8 d4, d5 + vbit q0, q8, q15 + vbit q2, q9, q15 + + vstmia r0!, {d0,d1} + vstmia r0!, {d4,d5} + subs r2, r2, #1 + bne 0b + + bx lr + + +@ vim:filetype=armasm diff --git a/plugins/gpulib/gpu.c b/plugins/gpulib/gpu.c new file mode 100644 index 0000000..5b16cd4 --- /dev/null +++ b/plugins/gpulib/gpu.c @@ -0,0 +1,636 @@ +/* + * (C) Gražvydas "notaz" Ignotas, 2011-2012 + * + * This work is licensed under the terms of any of these licenses + * (at your option): + * - GNU GPL, version 2 or later. + * - GNU LGPL, version 2.1 or later. + * See the COPYING file in the top-level directory. + */ + +#include +#include +#include "gpu.h" + +#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) +#define unlikely(x) __builtin_expect((x), 0) +#define noinline __attribute__((noinline)) + +#define gpu_log(fmt, ...) \ + printf("%d:%03d: " fmt, *gpu.state.frame_count, *gpu.state.hcnt, ##__VA_ARGS__) + +//#define log_io gpu_log +#define log_io(...) +//#define log_anomaly gpu_log +#define log_anomaly(...) + +struct psx_gpu gpu __attribute__((aligned(2048))); + +static noinline int do_cmd_buffer(uint32_t *data, int count); +static void finish_vram_transfer(int is_read); + +static noinline void do_cmd_reset(void) +{ + if (unlikely(gpu.cmd_len > 0)) + do_cmd_buffer(gpu.cmd_buffer, gpu.cmd_len); + gpu.cmd_len = 0; + + if (unlikely(gpu.dma.h > 0)) + finish_vram_transfer(gpu.dma_start.is_read); + gpu.dma.h = 0; +} + +static noinline void do_reset(void) +{ + unsigned int i; + + do_cmd_reset(); + + memset(gpu.regs, 0, sizeof(gpu.regs)); + for (i = 0; i < sizeof(gpu.ex_regs) / sizeof(gpu.ex_regs[0]); i++) + gpu.ex_regs[i] = (0xe0 + i) << 24; + gpu.status.reg = 0x14802000; + gpu.gp0 = 0; + gpu.regs[3] = 1; + gpu.screen.hres = gpu.screen.w = 256; + gpu.screen.vres = gpu.screen.h = 240; +} + +static noinline void update_width(void) +{ + int sw = gpu.screen.x2 - gpu.screen.x1; + if (sw <= 0 || sw >= 2560) + // full width + gpu.screen.w = gpu.screen.hres; + else + gpu.screen.w = sw * gpu.screen.hres / 2560; +} + +static noinline void update_height(void) +{ + int sh = gpu.screen.y2 - gpu.screen.y1; + if (gpu.status.dheight) + sh *= 2; + if (sh <= 0) + sh = gpu.screen.vres; + + gpu.screen.h = sh; +} + +static noinline void decide_frameskip(void) +{ + if (gpu.frameskip.active) + gpu.frameskip.cnt++; + else { + gpu.frameskip.cnt = 0; + gpu.frameskip.frame_ready = 1; + } + + if (!gpu.frameskip.active && *gpu.frameskip.advice) + gpu.frameskip.active = 1; + else if (gpu.frameskip.set > 0 && gpu.frameskip.cnt < gpu.frameskip.set) + gpu.frameskip.active = 1; + else + gpu.frameskip.active = 0; +} + +static noinline void decide_frameskip_allow(uint32_t cmd_e3) +{ + // no frameskip if it decides to draw to display area, + // but not for interlace since it'll most likely always do that + uint32_t x = cmd_e3 & 0x3ff; + uint32_t y = (cmd_e3 >> 10) & 0x3ff; + gpu.frameskip.allow = gpu.status.interlace || + (uint32_t)(x - gpu.screen.x) >= (uint32_t)gpu.screen.w || + (uint32_t)(y - gpu.screen.y) >= (uint32_t)gpu.screen.h; +} + +static noinline void get_gpu_info(uint32_t data) +{ + switch (data & 0x0f) { + case 0x02: + case 0x03: + case 0x04: + case 0x05: + gpu.gp0 = gpu.ex_regs[data & 7] & 0xfffff; + break; + case 0x06: + gpu.gp0 = gpu.ex_regs[5] & 0xfffff; + break; + case 0x07: + gpu.gp0 = 2; + break; + default: + gpu.gp0 = 0; + break; + } +} + +long GPUinit(void) +{ + int ret; + ret = vout_init(); + ret |= renderer_init(); + + gpu.state.frame_count = &gpu.zero; + gpu.state.hcnt = &gpu.zero; + gpu.frameskip.active = 0; + gpu.cmd_len = 0; + do_reset(); + + return ret; +} + +long GPUshutdown(void) +{ + return vout_finish(); +} + +void GPUwriteStatus(uint32_t data) +{ + static const short hres[8] = { 256, 368, 320, 384, 512, 512, 640, 640 }; + static const short vres[4] = { 240, 480, 256, 480 }; + uint32_t cmd = data >> 24; + + if (cmd < ARRAY_SIZE(gpu.regs)) { + if (cmd > 1 && cmd != 5 && gpu.regs[cmd] == data) + return; + gpu.regs[cmd] = data; + } + + gpu.state.fb_dirty = 1; + + switch (cmd) { + case 0x00: + do_reset(); + break; + case 0x01: + do_cmd_reset(); + break; + case 0x03: + gpu.status.blanking = data & 1; + break; + case 0x04: + gpu.status.dma = data & 3; + break; + case 0x05: + gpu.screen.x = data & 0x3ff; + gpu.screen.y = (data >> 10) & 0x3ff; + if (gpu.frameskip.set) { + decide_frameskip_allow(gpu.ex_regs[3]); + if (gpu.frameskip.last_flip_frame != *gpu.state.frame_count) { + decide_frameskip(); + gpu.frameskip.last_flip_frame = *gpu.state.frame_count; + } + } + break; + case 0x06: + gpu.screen.x1 = data & 0xfff; + gpu.screen.x2 = (data >> 12) & 0xfff; + update_width(); + break; + case 0x07: + gpu.screen.y1 = data & 0x3ff; + gpu.screen.y2 = (data >> 10) & 0x3ff; + update_height(); + break; + case 0x08: + gpu.status.reg = (gpu.status.reg & ~0x7f0000) | ((data & 0x3F) << 17) | ((data & 0x40) << 10); + gpu.screen.hres = hres[(gpu.status.reg >> 16) & 7]; + gpu.screen.vres = vres[(gpu.status.reg >> 19) & 3]; + update_width(); + update_height(); + break; + default: + if ((cmd & 0xf0) == 0x10) + get_gpu_info(data); + break; + } +} + +const unsigned char cmd_lengths[256] = +{ + 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 3, 3, 3, 3, 6, 6, 6, 6, 4, 4, 4, 4, 8, 8, 8, 8, // 20 + 5, 5, 5, 5, 8, 8, 8, 8, 7, 7, 7, 7, 11, 11, 11, 11, + 2, 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3, // 40 + 3, 3, 3, 3, 3, 3, 3, 3, 4, 4, 4, 4, 4, 4, 4, 4, + 2, 2, 2, 2, 3, 3, 3, 3, 1, 1, 1, 1, 0, 0, 0, 0, // 60 + 1, 1, 1, 1, 2, 2, 2, 2, 1, 1, 1, 1, 2, 2, 2, 2, + 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 80 + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // a0 + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // c0 + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // e0 + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 +}; + +#define VRAM_MEM_XY(x, y) &gpu.vram[(y) * 1024 + (x)] + +static inline void do_vram_line(int x, int y, uint16_t *mem, int l, int is_read) +{ + uint16_t *vram = VRAM_MEM_XY(x, y); + if (is_read) + memcpy(mem, vram, l * 2); + else + memcpy(vram, mem, l * 2); +} + +static int do_vram_io(uint32_t *data, int count, int is_read) +{ + int count_initial = count; + uint16_t *sdata = (uint16_t *)data; + int x = gpu.dma.x, y = gpu.dma.y; + int w = gpu.dma.w, h = gpu.dma.h; + int o = gpu.dma.offset; + int l; + count *= 2; // operate in 16bpp pixels + + if (gpu.dma.offset) { + l = w - gpu.dma.offset; + if (count < l) + l = count; + + do_vram_line(x + o, y, sdata, l, is_read); + + if (o + l < w) + o += l; + else { + o = 0; + y++; + h--; + } + sdata += l; + count -= l; + } + + for (; h > 0 && count >= w; sdata += w, count -= w, y++, h--) { + y &= 511; + do_vram_line(x, y, sdata, w, is_read); + } + + if (h > 0) { + if (count > 0) { + y &= 511; + do_vram_line(x, y, sdata, count, is_read); + o = count; + count = 0; + } + } + else + finish_vram_transfer(is_read); + gpu.dma.y = y; + gpu.dma.h = h; + gpu.dma.offset = o; + + return count_initial - count / 2; +} + +static void start_vram_transfer(uint32_t pos_word, uint32_t size_word, int is_read) +{ + if (gpu.dma.h) + log_anomaly("start_vram_transfer while old unfinished\n"); + + gpu.dma.x = pos_word & 0x3ff; + gpu.dma.y = (pos_word >> 16) & 0x1ff; + gpu.dma.w = ((size_word - 1) & 0x3ff) + 1; + gpu.dma.h = (((size_word >> 16) - 1) & 0x1ff) + 1; + gpu.dma.offset = 0; + gpu.dma.is_read = is_read; + gpu.dma_start = gpu.dma; + + renderer_flush_queues(); + if (is_read) { + gpu.status.img = 1; + // XXX: wrong for width 1 + memcpy(&gpu.gp0, VRAM_MEM_XY(gpu.dma.x, gpu.dma.y), 4); + gpu.state.last_vram_read_frame = *gpu.state.frame_count; + } + + log_io("start_vram_transfer %c (%d, %d) %dx%d\n", is_read ? 'r' : 'w', + gpu.dma.x, gpu.dma.y, gpu.dma.w, gpu.dma.h); +} + +static void finish_vram_transfer(int is_read) +{ + if (is_read) + gpu.status.img = 0; + else + renderer_update_caches(gpu.dma_start.x, gpu.dma_start.y, + gpu.dma_start.w, gpu.dma_start.h); +} + +static noinline int do_cmd_buffer(uint32_t *data, int count) +{ + int len, cmd, start, pos; + int vram_dirty = 0; + + // process buffer + for (start = pos = 0; pos < count; ) + { + cmd = -1; + len = 0; + + if (gpu.dma.h) { + pos += do_vram_io(data + pos, count - pos, 0); + if (pos == count) + break; + start = pos; + } + + // do look-ahead pass to detect SR changes and VRAM i/o + while (pos < count) { + uint32_t *list = data + pos; + cmd = list[0] >> 24; + len = 1 + cmd_lengths[cmd]; + + //printf(" %3d: %02x %d\n", pos, cmd, len); + if ((cmd & 0xf4) == 0x24) { + // flat textured prim + gpu.ex_regs[1] &= ~0x1ff; + gpu.ex_regs[1] |= list[4] & 0x1ff; + } + else if ((cmd & 0xf4) == 0x34) { + // shaded textured prim + gpu.ex_regs[1] &= ~0x1ff; + gpu.ex_regs[1] |= list[5] & 0x1ff; + } + else if (cmd == 0xe3) + decide_frameskip_allow(list[0]); + + if (2 <= cmd && cmd < 0xc0) + vram_dirty = 1; + else if ((cmd & 0xf8) == 0xe0) + gpu.ex_regs[cmd & 7] = list[0]; + + if (pos + len > count) { + cmd = -1; + break; // incomplete cmd + } + if (cmd == 0xa0 || cmd == 0xc0) + break; // image i/o + pos += len; + } + + if (pos - start > 0) { + if (!gpu.frameskip.active || !gpu.frameskip.allow) + do_cmd_list(data + start, pos - start); + start = pos; + } + + if (cmd == 0xa0 || cmd == 0xc0) { + // consume vram write/read cmd + start_vram_transfer(data[pos + 1], data[pos + 2], cmd == 0xc0); + pos += len; + } + else if (cmd == -1) + break; + } + + gpu.status.reg &= ~0x1fff; + gpu.status.reg |= gpu.ex_regs[1] & 0x7ff; + gpu.status.reg |= (gpu.ex_regs[6] & 3) << 11; + + if (gpu.frameskip.active) + renderer_sync_ecmds(gpu.ex_regs); + gpu.state.fb_dirty |= vram_dirty; + + return count - pos; +} + +static void flush_cmd_buffer(void) +{ + int left = do_cmd_buffer(gpu.cmd_buffer, gpu.cmd_len); + if (left > 0) + memmove(gpu.cmd_buffer, gpu.cmd_buffer + gpu.cmd_len - left, left * 4); + gpu.cmd_len = left; +} + +void GPUwriteDataMem(uint32_t *mem, int count) +{ + int left; + + log_io("gpu_dma_write %p %d\n", mem, count); + + if (unlikely(gpu.cmd_len > 0)) + flush_cmd_buffer(); + + left = do_cmd_buffer(mem, count); + if (left) + log_anomaly("GPUwriteDataMem: discarded %d/%d words\n", left, count); +} + +void GPUwriteData(uint32_t data) +{ + log_io("gpu_write %08x\n", data); + gpu.cmd_buffer[gpu.cmd_len++] = data; + if (gpu.cmd_len >= CMD_BUFFER_LEN) + flush_cmd_buffer(); +} + +long GPUdmaChain(uint32_t *rambase, uint32_t start_addr) +{ + uint32_t addr, *list; + uint32_t *llist_entry = NULL; + int len, left, count; + long cpu_cycles = 0; + + if (unlikely(gpu.cmd_len > 0)) + flush_cmd_buffer(); + + // ff7 sends it's main list twice, detect this + if (*gpu.state.frame_count == gpu.state.last_list.frame && + *gpu.state.hcnt - gpu.state.last_list.hcnt <= 1 && + gpu.state.last_list.cycles > 2048) + { + llist_entry = rambase + (gpu.state.last_list.addr & 0x1fffff) / 4; + *llist_entry |= 0x800000; + } + + log_io("gpu_dma_chain\n"); + addr = start_addr & 0xffffff; + for (count = 0; addr != 0xffffff; count++) + { + list = rambase + (addr & 0x1fffff) / 4; + len = list[0] >> 24; + addr = list[0] & 0xffffff; + cpu_cycles += 10; + if (len > 0) + cpu_cycles += 5 + len; + + log_io(".chain %08x #%d\n", (list - rambase) * 4, len); + + // loop detection marker + // (bit23 set causes DMA error on real machine, so + // unlikely to be ever set by the game) + list[0] |= 0x800000; + + if (len) { + left = do_cmd_buffer(list + 1, len); + if (left) + log_anomaly("GPUdmaChain: discarded %d/%d words\n", left, len); + } + + if (addr & 0x800000) + break; + } + + // remove loop detection markers + addr = start_addr & 0x1fffff; + while (count-- > 0) { + list = rambase + addr / 4; + addr = list[0] & 0x1fffff; + list[0] &= ~0x800000; + } + if (llist_entry) + *llist_entry &= ~0x800000; + + gpu.state.last_list.frame = *gpu.state.frame_count; + gpu.state.last_list.hcnt = *gpu.state.hcnt; + gpu.state.last_list.cycles = cpu_cycles; + gpu.state.last_list.addr = start_addr; + + return cpu_cycles; +} + +void GPUreadDataMem(uint32_t *mem, int count) +{ + log_io("gpu_dma_read %p %d\n", mem, count); + + if (unlikely(gpu.cmd_len > 0)) + flush_cmd_buffer(); + + if (gpu.dma.h) + do_vram_io(mem, count, 1); +} + +uint32_t GPUreadData(void) +{ + uint32_t ret; + + if (unlikely(gpu.cmd_len > 0)) + flush_cmd_buffer(); + + ret = gpu.gp0; + if (gpu.dma.h) + do_vram_io(&ret, 1, 1); + + log_io("gpu_read %08x\n", ret); + return ret; +} + +uint32_t GPUreadStatus(void) +{ + uint32_t ret; + + if (unlikely(gpu.cmd_len > 0)) + flush_cmd_buffer(); + + ret = gpu.status.reg; + log_io("gpu_read_status %08x\n", ret); + return ret; +} + +struct GPUFreeze +{ + uint32_t ulFreezeVersion; // should be always 1 for now (set by main emu) + uint32_t ulStatus; // current gpu status + uint32_t ulControl[256]; // latest control register values + unsigned char psxVRam[1024*1024*2]; // current VRam image (full 2 MB for ZN) +}; + +long GPUfreeze(uint32_t type, struct GPUFreeze *freeze) +{ + int i; + + switch (type) { + case 1: // save + if (gpu.cmd_len > 0) + flush_cmd_buffer(); + memcpy(freeze->psxVRam, gpu.vram, sizeof(gpu.vram)); + memcpy(freeze->ulControl, gpu.regs, sizeof(gpu.regs)); + memcpy(freeze->ulControl + 0xe0, gpu.ex_regs, sizeof(gpu.ex_regs)); + freeze->ulStatus = gpu.status.reg; + break; + case 0: // load + memcpy(gpu.vram, freeze->psxVRam, sizeof(gpu.vram)); + memcpy(gpu.regs, freeze->ulControl, sizeof(gpu.regs)); + memcpy(gpu.ex_regs, freeze->ulControl + 0xe0, sizeof(gpu.ex_regs)); + gpu.status.reg = freeze->ulStatus; + for (i = 8; i > 0; i--) { + gpu.regs[i] ^= 1; // avoid reg change detection + GPUwriteStatus((i << 24) | (gpu.regs[i] ^ 1)); + } + renderer_sync_ecmds(gpu.ex_regs); + renderer_update_caches(0, 0, 1024, 512); + break; + } + + return 1; +} + +void GPUupdateLace(void) +{ + if (gpu.cmd_len > 0) + flush_cmd_buffer(); + renderer_flush_queues(); + + if (gpu.status.blanking || !gpu.state.fb_dirty) + return; + + if (gpu.frameskip.set) { + if (!gpu.frameskip.frame_ready) { + if (*gpu.state.frame_count - gpu.frameskip.last_flip_frame < 9) + return; + gpu.frameskip.active = 0; + } + gpu.frameskip.frame_ready = 0; + } + + vout_update(); + gpu.state.fb_dirty = 0; +} + +void GPUvBlank(int is_vblank, int lcf) +{ + int interlace = gpu.state.allow_interlace + && gpu.status.interlace && gpu.status.dheight; + // interlace doesn't look nice on progressive displays, + // so we have this "auto" mode here for games that don't read vram + if (gpu.state.allow_interlace == 2 + && *gpu.state.frame_count - gpu.state.last_vram_read_frame > 1) + { + interlace = 0; + } + if (interlace || interlace != gpu.state.old_interlace) { + gpu.state.old_interlace = interlace; + + if (gpu.cmd_len > 0) + flush_cmd_buffer(); + renderer_flush_queues(); + renderer_set_interlace(interlace, !lcf); + } +} + +#include "../../frontend/plugin_lib.h" + +void GPUrearmedCallbacks(const struct rearmed_cbs *cbs) +{ + gpu.frameskip.set = cbs->frameskip; + gpu.frameskip.advice = &cbs->fskip_advice; + gpu.frameskip.active = 0; + gpu.frameskip.frame_ready = 1; + gpu.state.hcnt = cbs->gpu_hcnt; + gpu.state.frame_count = cbs->gpu_frame_count; + gpu.state.allow_interlace = cbs->gpu_neon.allow_interlace; + + if (cbs->pl_vout_set_raw_vram) + cbs->pl_vout_set_raw_vram(gpu.vram); + renderer_set_config(cbs); + vout_set_config(cbs); +} + +// vim:shiftwidth=2:expandtab diff --git a/plugins/gpulib/gpu.h b/plugins/gpulib/gpu.h new file mode 100644 index 0000000..d9ad416 --- /dev/null +++ b/plugins/gpulib/gpu.h @@ -0,0 +1,131 @@ +/* + * (C) Gražvydas "notaz" Ignotas, 2011 + * + * This work is licensed under the terms of any of these licenses + * (at your option): + * - GNU GPL, version 2 or later. + * - GNU LGPL, version 2.1 or later. + * See the COPYING file in the top-level directory. + */ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#define CMD_BUFFER_LEN 1024 + +struct psx_gpu { + uint16_t vram[1024 * 512]; + uint16_t guard[1024 * 512]; // overdraw guard + uint32_t cmd_buffer[CMD_BUFFER_LEN]; + uint32_t regs[16]; + union { + uint32_t reg; + struct { + uint32_t tx:4; // 0 texture page + uint32_t ty:1; + uint32_t abr:2; + uint32_t tp:2; // 7 t.p. mode (4,8,15bpp) + uint32_t dtd:1; // 9 dither + uint32_t dfe:1; + uint32_t md:1; // 11 set mask bit when drawing + uint32_t me:1; // 12 no draw on mask + uint32_t unkn:3; + uint32_t width1:1; // 16 + uint32_t width0:2; + uint32_t dheight:1; // 19 double height + uint32_t video:1; // 20 NTSC,PAL + uint32_t rgb24:1; + uint32_t interlace:1; // 22 interlace on + uint32_t blanking:1; // 23 display not enabled + uint32_t unkn2:2; + uint32_t busy:1; // 26 !busy drawing + uint32_t img:1; // 27 ready to DMA image data + uint32_t com:1; // 28 ready for commands + uint32_t dma:2; // 29 off, ?, to vram, from vram + uint32_t lcf:1; // 31 + }; + } status; + uint32_t gp0; + uint32_t ex_regs[8]; + struct { + int hres, vres; + int x, y, w, h; + int x1, x2; + int y1, y2; + } screen; + struct { + int x, y, w, h; + short int offset, is_read; + } dma, dma_start; + int cmd_len; + uint32_t zero; + struct { + uint32_t fb_dirty:1; + uint32_t old_interlace:1; + uint32_t allow_interlace:2; + uint32_t *frame_count; + uint32_t *hcnt; /* hsync count */ + struct { + uint32_t addr; + uint32_t cycles; + uint32_t frame; + uint32_t hcnt; + } last_list; + uint32_t last_vram_read_frame; + } state; + struct { + int32_t set:3; /* -1 auto, 0 off, 1-3 fixed */ + int32_t cnt:3; /* amount skipped in a row */ + uint32_t active:1; + uint32_t allow:1; + uint32_t frame_ready:1; + const int *advice; + uint32_t last_flip_frame; + } frameskip; +}; + +extern struct psx_gpu gpu; + +extern const unsigned char cmd_lengths[256]; + +void do_cmd_list(uint32_t *list, int count); + +struct rearmed_cbs; + +int renderer_init(void); +void renderer_sync_ecmds(uint32_t * ecmds); +void renderer_update_caches(int x, int y, int w, int h); +void renderer_flush_queues(void); +void renderer_set_interlace(int enable, int is_odd); +void renderer_set_config(const struct rearmed_cbs *config); + +int vout_init(void); +int vout_finish(void); +void vout_update(void); +void vout_set_config(const struct rearmed_cbs *config); + +/* listing these here for correct linkage if rasterizer uses c++ */ +struct GPUFreeze; + +long GPUinit(void); +long GPUshutdown(void); +void GPUwriteDataMem(uint32_t *mem, int count); +long GPUdmaChain(uint32_t *rambase, uint32_t addr); +void GPUwriteData(uint32_t data); +void GPUreadDataMem(uint32_t *mem, int count); +uint32_t GPUreadData(void); +uint32_t GPUreadStatus(void); +void GPUwriteStatus(uint32_t data); +long GPUfreeze(uint32_t type, struct GPUFreeze *freeze); +void GPUupdateLace(void); +long GPUopen(void **dpy); +long GPUclose(void); +void GPUvBlank(int is_vblank, int lcf); +void GPUrearmedCallbacks(const struct rearmed_cbs *cbs_); + +#ifdef __cplusplus +} +#endif diff --git a/plugins/gpulib/gpulib.mak b/plugins/gpulib/gpulib.mak new file mode 100644 index 0000000..cec6f5a --- /dev/null +++ b/plugins/gpulib/gpulib.mak @@ -0,0 +1,54 @@ +# depends on ARCH definition +# always adding gpulib to LDLIBS in case cspace is needed + +LDFLAGS += -shared +ifeq "$(ARCH)" "arm" + ARM_CORTEXA8 ?= 1 + ifeq "$(ARM_CORTEXA8)" "1" + CFLAGS += -mcpu=cortex-a8 -mtune=cortex-a8 -mfpu=neon -mfloat-abi=softfp + ASFLAGS += -mcpu=cortex-a8 -mfpu=neon + else + CFLAGS += -mcpu=arm926ej-s -mtune=arm926ej-s + ASFLAGS += -mcpu=arm926ej-s -mfloat-abi=softfp + endif + EXT = +else + CFLAGS += -m32 + LDFLAGS += -m32 + LDLIBS_GPULIB += `sdl-config --libs` + EXT = .x86 +endif +ifdef MAEMO + CFLAGS += -DMAEMO +endif +ifdef DEBUG + CFLAGS += -O0 +endif + +GPULIB_A = ../gpulib/gpulib$(EXT).a +LDLIBS += $(GPULIB_A) + +ifdef BIN_STANDLALONE +TARGETS += $(BIN_STANDLALONE)$(EXT) +endif +ifdef BIN_GPULIB +TARGETS += $(BIN_GPULIB)$(EXT) +endif + +all: $(GPULIB_A) $(TARGETS) + +ifdef BIN_STANDLALONE +$(BIN_STANDLALONE)$(EXT): $(SRC) $(SRC_STANDALONE) + $(CC) -o $@ $^ $(CFLAGS) $(LDFLAGS) $(LDLIBS) $(LDLIBS_STANDALONE) +endif + +ifdef BIN_GPULIB +$(BIN_GPULIB)$(EXT): $(SRC) $(SRC_GPULIB) + $(CC) -o $@ $^ $(CFLAGS) $(LDFLAGS) $(LDLIBS) $(LDLIBS_GPULIB) +endif + +$(GPULIB_A): + make -C ../gpulib/ all + +clean: + $(RM) $(TARGETS) diff --git a/plugins/gpulib/test.c b/plugins/gpulib/test.c new file mode 100644 index 0000000..e523e20 --- /dev/null +++ b/plugins/gpulib/test.c @@ -0,0 +1,109 @@ +#include +#include +#include +#include "gpu.h" + +static inline unsigned int pcnt_get(void) +{ + unsigned int val; +#ifdef __ARM_ARCH_7A__ + asm volatile("mrc p15, 0, %0, c9, c13, 0" : "=r"(val)); +#else + val = 0; +#endif + return val; +} + +static inline void pcnt_init(void) +{ +#ifdef __ARM_ARCH_7A__ + int v; + asm volatile("mrc p15, 0, %0, c9, c12, 0" : "=r"(v)); + v |= 5; // master enable, ccnt reset + v &= ~8; // ccnt divider 0 + asm volatile("mcr p15, 0, %0, c9, c12, 0" :: "r"(v)); + // enable cycle counter + asm volatile("mcr p15, 0, %0, c9, c12, 1" :: "r"(1<<31)); +#endif +} + +const unsigned char cmd_lengths[256] = +{ + 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 3, 3, 3, 3, 6, 6, 6, 6, 4, 4, 4, 4, 8, 8, 8, 8, // 20 + 5, 5, 5, 5, 8, 8, 8, 8, 7, 7, 7, 7, 11, 11, 11, 11, + 2, 2, 2, 2, 0, 0, 0, 0, 3, 3, 3, 3, 3, 3, 3, 3, // 40 + 3, 3, 3, 3, 0, 0, 0, 0, 4, 4, 4, 4, 4, 4, 4, 4, + 2, 2, 2, 2, 3, 3, 3, 3, 1, 1, 1, 1, 2, 2, 2, 2, // 60 + 1, 1, 1, 1, 2, 2, 2, 2, 1, 1, 1, 1, 2, 2, 2, 2, + 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 80 + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // a0 + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // c0 + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // e0 + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 +}; + +struct psx_gpu gpu __attribute__((aligned(64))); + +typedef struct +{ + uint16_t vram[1024 * 512]; + uint32_t gpu_register[15]; + uint32_t status; +} gpu_dump_struct; + +static gpu_dump_struct state; + +int main(int argc, char *argv[]) +{ + unsigned int start_cycles; + uint32_t *list; + int size; + FILE *state_file; + FILE *list_file; + FILE *out_file; + + if (argc != 3 && argc != 4) + { + printf("usage:\n%s [vram_out]\n", argv[0]); + return 1; + } + + state_file = fopen(argv[1], "rb"); + fread(&state, 1, sizeof(gpu_dump_struct), state_file); + fclose(state_file); + + list_file = fopen(argv[2], "rb"); + fseek(list_file, 0, SEEK_END); + size = ftell(list_file); + fseek(list_file, 0, SEEK_SET); + + list = (uint32_t *)malloc(size); + fread(list, 1, size, list_file); + fclose(list_file); + + pcnt_init(); + renderer_init(); + memcpy(gpu.vram, state.vram, sizeof(gpu.vram)); + if ((state.gpu_register[8] & 0x24) == 0x24) + renderer_set_interlace(1, !(state.status >> 31)); + + start_cycles = pcnt_get(); + + do_cmd_list(list, size / 4); + renderer_flush_queues(); + + printf("%u\n", pcnt_get() - start_cycles); + + if (argc >= 4) { + out_file = fopen(argv[3], "wb"); + fwrite(gpu.vram, 1, sizeof(gpu.vram), out_file); + fclose(out_file); + } + + return 0; +} diff --git a/plugins/gpulib/vout_fb.c b/plugins/gpulib/vout_fb.c new file mode 100644 index 0000000..021efa7 --- /dev/null +++ b/plugins/gpulib/vout_fb.c @@ -0,0 +1,121 @@ +/* + * (C) Gražvydas "notaz" Ignotas, 2011 + * + * This work is licensed under the terms of any of these licenses + * (at your option): + * - GNU GPL, version 2 or later. + * - GNU LGPL, version 2.1 or later. + * See the COPYING file in the top-level directory. + */ + +#include "gpu.h" +#include "cspace.h" +#include "../../frontend/plugin_lib.h" + +static const struct rearmed_cbs *cbs; +static void *screen_buf; + +int vout_init(void) +{ + return 0; +} + +int vout_finish(void) +{ + return 0; +} + +static void check_mode_change(void) +{ + static uint32_t old_status; + static int old_h; + + // width|rgb24 change? + if ((gpu.status.reg ^ old_status) & ((7<<16)|(1<<21)) || gpu.screen.h != old_h) + { + old_status = gpu.status.reg; + old_h = gpu.screen.h; + screen_buf = cbs->pl_vout_set_mode(gpu.screen.hres, + gpu.screen.h, gpu.status.rgb24 ? 24 : 16); + } +} + +static void blit(void) +{ + int x = gpu.screen.x & ~1; // alignment needed by blitter + int y = gpu.screen.y; + int w = gpu.screen.w; + int h = gpu.screen.h; + uint16_t *vram = gpu.vram; + int stride = gpu.screen.hres; + int fb_offs, doffs; + uint8_t *dest; + + fb_offs = y * 1024 + x; + dest = (uint8_t *)screen_buf; + + // only do centering, at least for now + doffs = (stride - w) / 2 & ~1; + + if (gpu.status.rgb24) + { +#ifndef MAEMO + dest += (doffs / 8) * 24; + for (; h-- > 0; dest += stride * 3, fb_offs += 1024) + { + fb_offs &= 1024*512-1; + bgr888_to_rgb888(dest, vram + fb_offs, w * 3); + } +#else + dest += doffs * 2; + for (; h-- > 0; dest += stride * 2, fb_offs += 1024) + { + fb_offs &= 1024*512-1; + bgr888_to_rgb565(dest, vram + fb_offs, w * 3); + } +#endif + } + else + { + dest += doffs * 2; + for (; h-- > 0; dest += stride * 2, fb_offs += 1024) + { + fb_offs &= 1024*512-1; + bgr555_to_rgb565(dest, vram + fb_offs, w * 2); + } + } + + screen_buf = cbs->pl_vout_flip(); +} + +void vout_update(void) +{ + check_mode_change(); + if (cbs->pl_vout_raw_flip) + cbs->pl_vout_raw_flip(gpu.screen.x, gpu.screen.y); + else + blit(); +} + +long GPUopen(void **unused) +{ + gpu.frameskip.active = 0; + gpu.frameskip.frame_ready = 1; + + cbs->pl_vout_open(); + screen_buf = cbs->pl_vout_flip(); + return 0; +} + +long GPUclose(void) +{ + cbs->pl_vout_close(); + return 0; +} + +void vout_set_config(const struct rearmed_cbs *cbs_) +{ + cbs = cbs_; +} + +// vim:shiftwidth=2:expandtab diff --git a/plugins/gpulib/vout_sdl.c b/plugins/gpulib/vout_sdl.c new file mode 100644 index 0000000..db1ae96 --- /dev/null +++ b/plugins/gpulib/vout_sdl.c @@ -0,0 +1,95 @@ +/* + * (C) Gražvydas "notaz" Ignotas, 2011 + * + * This work is licensed under the terms of any of these licenses + * (at your option): + * - GNU GPL, version 2 or later. + * - GNU LGPL, version 2.1 or later. + * See the COPYING file in the top-level directory. + */ + +#include +#include +#include +#include "gpu.h" + +static SDL_Surface *screen; +static Display *x11_display; + +int vout_init(void) +{ + SDL_SysWMinfo wminfo; + int ret; + + ret = SDL_Init(SDL_INIT_VIDEO); + if (ret != 0) { + fprintf(stderr, "SDL_Init failed: %s\n", SDL_GetError()); + return ret; + } + + screen = SDL_SetVideoMode(1024, 512, 32, 0); + if (screen == NULL) { + fprintf(stderr, "SDL_SetVideoMode failed: %s\n", SDL_GetError()); + SDL_Quit(); + return -1; + } + + SDL_VERSION(&wminfo.version); + ret = SDL_GetWMInfo(&wminfo); + if (ret == 1) + x11_display = wminfo.info.x11.display; + + return 0; +} + +int vout_finish(void) +{ + SDL_Quit(); + return 0; +} + +void vout_update(void) +{ + uint32_t *d; + int i; + + SDL_LockSurface(screen); + if (gpu.status.rgb24) + { + uint8_t *s; + int y; + for (y = 0; y < 512; y++) { + s = (uint8_t *)gpu.vram + y * 2*1024; + d = (uint32_t *)screen->pixels + y * 1024; + for (i = 0; i < 1024 * 2 / 3; i++, s += 3) + d[i] = (s[0] << 16) | (s[1] << 8) | s[2]; + } + } + else + { + uint16_t *s = gpu.vram; + d = (uint32_t *)screen->pixels; + for (i = 0; i < 1024 * 512; i++) + d[i] = (((uint32_t)s[i] << 19) & 0xf80000) | ((s[i] << 6) & 0xf800) | + ((s[i] >> 7) & 0xf8); + } + SDL_UnlockSurface(screen); + SDL_UpdateRect(screen, 0, 0, 1024, 512); +} + +long GPUopen(void **dpy) +{ + *dpy = x11_display; + return 0; +} + +long GPUclose(void) +{ + return 0; +} + +void vout_set_config(const struct rearmed_cbs *cbs) +{ +} + +// vim:shiftwidth=2:expandtab -- cgit v1.2.3