Age | Commit message (Collapse) | Author | |
---|---|---|---|
2021-04-03 | Add instruction tracing, for testing purposes | David Guillen Fandos | |
2021-03-23 | Make ewram memory lineal | David Guillen Fandos | |
This saves a few cycles in MIPS and simplifies a bit the core. Removed the write map, only affects interpreter performance very minimally. Rewired ARM and x86 handlers to support direct access to I/EWRAM (and VRAM on ARM) to compensate. Overall performance is slightly better but code is cleaner and allows for further improvements in the dynarecs. | |||
2021-03-16 | Simplify open load handling for MIPS and fix other arches | David Guillen Fandos | |
Also rewrite a bit memory handlers for smaller functions. | |||
2021-03-06 | Fix x86 dynarec, broken by d10c4afe | David Guillen Fandos | |
The dynarec expects function args to be located in registers instead of the stack, which is not the default calling convetion in GCC/clang. | |||
2014-12-20 | Get rid of function_cc | Twinaphex | |
2014-12-11 | Reimplement cache invalidation code | twinaphex | |
2014-12-10 | cleanups | aliaspider | |
2014-12-10 | Add macro parameter 'opcode' to some macros | twinaphex | |
2011-09-06 | enable -Wall and fix warnings reported by it | notaz | |
2009-05-21 | original source from gpsp09-2xb_src.tar.bz2 | notaz | |