From 3aa34f7503bbb03e9bcd191f8af4fd5faac66d2e Mon Sep 17 00:00:00 2001 From: neonloop Date: Wed, 5 May 2021 16:20:45 +0000 Subject: Revert "Remove BIOS reserved translation area" This reverts commit fb7ca09b019248b9a0aba481ea55386f71053d73. It seems that commit broke rolling in Minish Cap when using the ARM dynarec. --- arm/arm_stub.S | 4 +++ cpu.c | 2 ++ cpu.h | 8 ++++++ cpu_threaded.c | 77 +++++++++++++++++++++++++++++++++++++++++++++++++++++++-- frontend/main.c | 3 +++ gba_memory.c | 14 ++++++++++- gba_memory.h | 4 ++- gpsp_config.h | 2 ++ libretro.c | 17 ++++++++++++- psp/mips_stub.S | 3 +++ x86/x86_stub.S | 2 ++ 11 files changed, 131 insertions(+), 5 deletions(-) diff --git a/arm/arm_stub.S b/arm/arm_stub.S index 5917e82..723c185 100644 --- a/arm/arm_stub.S +++ b/arm/arm_stub.S @@ -411,6 +411,8 @@ defsymbl(execute_swi_##mode) ;\ orr r0, r0, #0x13 /* set to supervisor mode */;\ str r0, [reg_base, #REG_CPSR] /* update cpsr */;\ ;\ + call_c_function(bios_region_read_allow) ;\ + ;\ mov r0, #MODE_SUPERVISOR ;\ ;\ store_registers_##mode() /* store regs for mode */;\ @@ -865,6 +867,8 @@ defsymbl(rom_translation_cache) .space ROM_TRANSLATION_CACHE_SIZE defsymbl(ram_translation_cache) .space RAM_TRANSLATION_CACHE_SIZE +defsymbl(bios_translation_cache) + .space BIOS_TRANSLATION_CACHE_SIZE #endif diff --git a/cpu.c b/cpu.c index badb9c2..f56ab60 100644 --- a/cpu.c +++ b/cpu.c @@ -1622,6 +1622,8 @@ void raise_interrupt(irq_type irq_raised) reg[REG_CPSR] = 0xD2; reg[REG_PC] = 0x00000018; + bios_region_read_allow(); + set_cpu_mode(MODE_IRQ); reg[CPU_HALT_STATE] = CPU_ACTIVE; reg[CHANGED_PC_STATUS] = 1; diff --git a/cpu.h b/cpu.h index 2b250ca..9868866 100644 --- a/cpu.h +++ b/cpu.h @@ -93,6 +93,7 @@ typedef enum { TRANSLATION_REGION_RAM, TRANSLATION_REGION_ROM, + TRANSLATION_REGION_BIOS } translation_region_type; extern u32 instruction_count; @@ -126,22 +127,28 @@ s32 translate_block_thumb(u32 pc, translation_region_type translation_region, #if defined(HAVE_MMAP) extern u8* rom_translation_cache; extern u8* ram_translation_cache; +extern u8* bios_translation_cache; #elif defined(_3DS) #define rom_translation_cache ((u8*)0x02000000 - ROM_TRANSLATION_CACHE_SIZE) #define ram_translation_cache (rom_translation_cache - RAM_TRANSLATION_CACHE_SIZE) +#define bios_translation_cache (ram_translation_cache - BIOS_TRANSLATION_CACHE_SIZE) extern u8* rom_translation_cache_ptr; extern u8* ram_translation_cache_ptr; +extern u8* bios_translation_cache_ptr; #elif defined(VITA) extern u8* rom_translation_cache; extern u8* ram_translation_cache; +extern u8* bios_translation_cache; extern int sceBlock; #else extern u8 rom_translation_cache[ROM_TRANSLATION_CACHE_SIZE]; extern u8 ram_translation_cache[RAM_TRANSLATION_CACHE_SIZE]; +extern u8 bios_translation_cache[BIOS_TRANSLATION_CACHE_SIZE]; #endif extern u32 stub_arena[STUB_ARENA_SIZE / 4]; extern u8 *rom_translation_ptr; extern u8 *ram_translation_ptr; +extern u8 *bios_translation_ptr; #define MAX_TRANSLATION_GATES 8 @@ -156,6 +163,7 @@ extern u32 *rom_branch_hash[ROM_BRANCH_HASH_SIZE]; void flush_translation_cache_rom(void); void flush_translation_cache_ram(void); +void flush_translation_cache_bios(void); void dump_translation_cache(void); void wipe_caches(void); diff --git a/cpu_threaded.c b/cpu_threaded.c index 7f12b4f..8b7dc0e 100644 --- a/cpu_threaded.c +++ b/cpu_threaded.c @@ -29,26 +29,34 @@ u8 *last_rom_translation_ptr = NULL; u8 *last_ram_translation_ptr = NULL; +u8 *last_bios_translation_ptr = NULL; #if defined(HAVE_MMAP) u8* rom_translation_cache; u8* ram_translation_cache; +u8* bios_translation_cache; u8 *rom_translation_ptr; u8 *ram_translation_ptr; +u8 *bios_translation_ptr; #elif defined(VITA) u8* rom_translation_cache; u8* ram_translation_cache; +u8* bios_translation_cache; u8 *rom_translation_ptr; u8 *ram_translation_ptr; +u8 *bios_translation_ptr; int sceBlock; #elif defined(_3DS) u8* rom_translation_cache_ptr; u8* ram_translation_cache_ptr; +u8* bios_translation_cache_ptr; u8 *rom_translation_ptr = rom_translation_cache; u8 *ram_translation_ptr = ram_translation_cache; +u8 *bios_translation_ptr = bios_translation_cache; #else u8 *rom_translation_ptr = rom_translation_cache; u8 *ram_translation_ptr = ram_translation_cache; +u8 *bios_translation_ptr = bios_translation_cache; #endif /* Note, see stub files for more cache definitions */ @@ -244,6 +252,10 @@ void translate_icache_sync() { platform_cache_sync(last_ram_translation_ptr, ram_translation_ptr); last_ram_translation_ptr = ram_translation_ptr; } + if (last_bios_translation_ptr < bios_translation_ptr) { + platform_cache_sync(last_bios_translation_ptr, bios_translation_ptr); + last_bios_translation_ptr = bios_translation_ptr; + } } /* End of Cache invalidation */ @@ -2666,6 +2678,9 @@ void translate_icache_sync() { u8 *ram_block_ptrs[1024 * 64]; u32 ram_block_tag_top = 0x0101; +u8 *bios_block_ptrs[1024 * 8]; +u32 bios_block_tag_top = 0x0101; + // This function will return a pointer to a translated block of code. If it // doesn't exist it will translate it, if it does it will pass it back. @@ -2695,6 +2710,7 @@ u32 ram_block_tag_top = 0x0101; #define ram_translation_region TRANSLATION_REGION_RAM #define rom_translation_region TRANSLATION_REGION_ROM +#define bios_translation_region TRANSLATION_REGION_BIOS #define block_lookup_translate_arm(mem_type, smc_enable) \ translation_result = translate_block_arm(pc, mem_type##_translation_region, \ @@ -2790,17 +2806,28 @@ u8 function_cc *block_lookup_address_##type(u32 pc) \ \ switch(pc >> 24) \ { \ + case 0x0: \ + bios_region_read_allow(); \ + location = (u16 *)(bios_rom + pc + 0x4000); \ + block_lookup_translate(type, bios, 0); \ + if(translation_recursion_level == 0) \ + bios_region_read_allow(); \ + break; \ + \ case 0x2: \ location = (u16 *)(ewram + (pc & 0x3FFFF) + 0x40000); \ block_lookup_translate(type, ram, 1); \ + if(translation_recursion_level == 0) \ + bios_region_read_protect(); \ break; \ \ case 0x3: \ location = (u16 *)(iwram + (pc & 0x7FFF)); \ block_lookup_translate(type, ram, 1); \ + if(translation_recursion_level == 0) \ + bios_region_read_protect(); \ break; \ \ - case 0x0: \ case 0x8 ... 0xD: \ { \ u32 hash_target = ((pc * 2654435761U) >> 16) & \ @@ -2824,7 +2851,7 @@ u8 function_cc *block_lookup_address_##type(u32 pc) \ \ redo: \ \ - translation_recursion_level++; \ + translation_recursion_level++; \ ((u32 *)rom_translation_ptr)[0] = pc; \ ((u32 **)rom_translation_ptr)[1] = NULL; \ *block_ptr_address = (u32 *)rom_translation_ptr; \ @@ -2846,6 +2873,8 @@ u8 function_cc *block_lookup_address_##type(u32 pc) \ if(translation_recursion_level == 0) \ translate_icache_sync(); \ } \ + if(translation_recursion_level == 0) \ + bios_region_read_protect(); \ break; \ } \ \ @@ -3260,6 +3289,12 @@ s32 translate_block_arm(u32 pc, translation_region_type rom_translation_cache + ROM_TRANSLATION_CACHE_SIZE - TRANSLATION_CACHE_LIMIT_THRESHOLD; break; + + case TRANSLATION_REGION_BIOS: + translation_ptr = bios_translation_ptr; + translation_cache_limit = bios_translation_cache + + BIOS_TRANSLATION_CACHE_SIZE; + break; } generate_block_prologue(); @@ -3322,6 +3357,10 @@ s32 translate_block_arm(u32 pc, translation_region_type case TRANSLATION_REGION_ROM: flush_translation_cache_rom(); break; + + case TRANSLATION_REGION_BIOS: + flush_translation_cache_bios(); + break; } return -1; } @@ -3389,6 +3428,10 @@ s32 translate_block_arm(u32 pc, translation_region_type case TRANSLATION_REGION_ROM: rom_translation_ptr = translation_ptr; break; + + case TRANSLATION_REGION_BIOS: + bios_translation_ptr = translation_ptr; + break; } for(i = 0; i < external_block_exit_position; i++) @@ -3461,6 +3504,12 @@ s32 translate_block_thumb(u32 pc, translation_region_type rom_translation_cache + ROM_TRANSLATION_CACHE_SIZE - TRANSLATION_CACHE_LIMIT_THRESHOLD; break; + + case TRANSLATION_REGION_BIOS: + translation_ptr = bios_translation_ptr; + translation_cache_limit = bios_translation_cache + + BIOS_TRANSLATION_CACHE_SIZE; + break; } generate_block_prologue(); @@ -3521,6 +3570,10 @@ s32 translate_block_thumb(u32 pc, translation_region_type case TRANSLATION_REGION_ROM: flush_translation_cache_rom(); break; + + case TRANSLATION_REGION_BIOS: + flush_translation_cache_bios(); + break; } return -1; } @@ -3588,6 +3641,10 @@ s32 translate_block_thumb(u32 pc, translation_region_type case TRANSLATION_REGION_ROM: rom_translation_ptr = translation_ptr; break; + + case TRANSLATION_REGION_BIOS: + bios_translation_ptr = translation_ptr; + break; } for(i = 0; i < external_block_exit_position; i++) @@ -3644,6 +3701,16 @@ void flush_translation_cache_rom(void) memset(rom_branch_hash, 0, sizeof(rom_branch_hash)); } +void flush_translation_cache_bios(void) +{ + bios_block_tag_top = 0x0101; + + last_bios_translation_ptr = bios_translation_cache; + bios_translation_ptr = bios_translation_cache; + + memset(bios_rom + 0x4000, 0, 0x4000); +} + void wipe_caches(void) { /* Ensure we wipe everything including the SMC mirrors */ @@ -3653,6 +3720,7 @@ void wipe_caches(void) iwram_code_min = 0; iwram_code_max = 0x7FFF; flush_translation_cache_ram(); + flush_translation_cache_bios(); } #define cache_dump_prefix "" @@ -3668,6 +3736,11 @@ void dump_translation_cache(void) fwrite(rom_translation_cache, 1, rom_translation_ptr - rom_translation_cache, fd); fclose(fd); + + fd = fopen(cache_dump_prefix "bios_cache.bin", "wb"); + fwrite(bios_translation_cache, 1, + bios_translation_ptr - bios_translation_cache, fd); + fclose(fd); } diff --git a/frontend/main.c b/frontend/main.c index fb05708..1839c2a 100644 --- a/frontend/main.c +++ b/frontend/main.c @@ -373,6 +373,8 @@ int main(int argc, char *argv[]) PROT_READ | PROT_WRITE | PROT_EXEC, MAP_ANON | MAP_PRIVATE, -1, 0); ram_translation_cache = mmap(NULL, RAM_TRANSLATION_CACHE_SIZE, PROT_READ | PROT_WRITE | PROT_EXEC, MAP_ANON | MAP_PRIVATE, -1, 0); + bios_translation_cache = mmap(NULL, BIOS_TRANSLATION_CACHE_SIZE, + PROT_READ | PROT_WRITE | PROT_EXEC, MAP_ANON | MAP_PRIVATE, -1, 0); #endif } else @@ -429,6 +431,7 @@ void quit() #if defined(HAVE_MMAP) && defined(HAVE_DYNAREC) munmap(rom_translation_cache, ROM_TRANSLATION_CACHE_SIZE); munmap(ram_translation_cache, RAM_TRANSLATION_CACHE_SIZE); + munmap(bios_translation_cache, BIOS_TRANSLATION_CACHE_SIZE); #endif menu_finish(); diff --git a/gba_memory.c b/gba_memory.c index c1eab6d..4e74a9a 100644 --- a/gba_memory.c +++ b/gba_memory.c @@ -309,7 +309,8 @@ u16 io_registers[1024 * 16]; u8 ewram[1024 * 256 * 2]; u8 iwram[1024 * 32 * 2]; u8 vram[1024 * 96]; -u8 bios_rom[1024 * 16]; + +u8 bios_rom[1024 * 16 * 2]; u32 bios_read_protect; // Up to 128kb, store SRAM, flash ROM, or EEPROM here. @@ -3300,6 +3301,17 @@ void memory_term(void) } } +void bios_region_read_allow(void) +{ + memory_map_read[0] = bios_rom; +} + +void bios_region_read_protect(void) +{ + memory_map_read[0] = NULL; +} + + #define savestate_block(type) \ cpu_##type##_savestate(); \ input_##type##_savestate(); \ diff --git a/gba_memory.h b/gba_memory.h index 9db4342..3163bfb 100644 --- a/gba_memory.h +++ b/gba_memory.h @@ -192,6 +192,8 @@ void update_backup(void); void init_memory(void); void init_gamepak_buffer(void); void memory_term(void); +void bios_region_read_allow(void); +void bios_region_read_protect(void); u8 *load_gamepak_page(u32 physical_index); extern u8 *gamepak_rom; @@ -208,8 +210,8 @@ extern u16 oam_ram[512]; extern u16 palette_ram_converted[512]; extern u16 io_registers[1024 * 16]; extern u8 vram[1024 * 96]; -extern u8 bios_rom[1024 * 16]; // Double buffer used for SMC detection +extern u8 bios_rom[1024 * 16 * 2]; extern u8 ewram[1024 * 256 * 2]; extern u8 iwram[1024 * 32 * 2]; diff --git a/gpsp_config.h b/gpsp_config.h index ea8db95..a3d8ce1 100644 --- a/gpsp_config.h +++ b/gpsp_config.h @@ -6,10 +6,12 @@ #if defined(PSP) #define ROM_TRANSLATION_CACHE_SIZE (1024 * 512 * 4) #define RAM_TRANSLATION_CACHE_SIZE (1024 * 384) + #define BIOS_TRANSLATION_CACHE_SIZE (1024 * 128) #define TRANSLATION_CACHE_LIMIT_THRESHOLD (1024) #else #define ROM_TRANSLATION_CACHE_SIZE (1024 * 512 * 4 * 5) #define RAM_TRANSLATION_CACHE_SIZE (1024 * 384 * 2) + #define BIOS_TRANSLATION_CACHE_SIZE (1024 * 128 * 2) #define TRANSLATION_CACHE_LIMIT_THRESHOLD (1024 * 32) #endif diff --git a/libretro.c b/libretro.c index 8fedb3f..9bd17fa 100644 --- a/libretro.c +++ b/libretro.c @@ -22,7 +22,8 @@ static inline int align(int x, int n) { #define MB_ALIGN(x) align(x, 20) int _newlib_vm_size_user = ROM_TRANSLATION_CACHE_SIZE + - RAM_TRANSLATION_CACHE_SIZE; + RAM_TRANSLATION_CACHE_SIZE + + BIOS_TRANSLATION_CACHE_SIZE; int getVMBlock(); @@ -435,6 +436,8 @@ void retro_init(void) PROT_READ | PROT_WRITE | PROT_EXEC, MAP_ANON | MAP_PRIVATE, -1, 0); ram_translation_cache = mmap(NULL, RAM_TRANSLATION_CACHE_SIZE, PROT_READ | PROT_WRITE | PROT_EXEC, MAP_ANON | MAP_PRIVATE, -1, 0); + bios_translation_cache = mmap(NULL, BIOS_TRANSLATION_CACHE_SIZE, + PROT_READ | PROT_WRITE | PROT_EXEC, MAP_ANON | MAP_PRIVATE, -1, 0); #elif defined(_3DS) if (__ctr_svchax && !translation_caches_inited) { @@ -443,6 +446,7 @@ void retro_init(void) rom_translation_cache_ptr = memalign(0x1000, ROM_TRANSLATION_CACHE_SIZE); ram_translation_cache_ptr = memalign(0x1000, RAM_TRANSLATION_CACHE_SIZE); + bios_translation_cache_ptr = memalign(0x1000, BIOS_TRANSLATION_CACHE_SIZE); svcDuplicateHandle(¤tHandle, 0xFFFF8001); svcControlProcessMemory(currentHandle, @@ -451,9 +455,13 @@ void retro_init(void) svcControlProcessMemory(currentHandle, ram_translation_cache, ram_translation_cache_ptr, RAM_TRANSLATION_CACHE_SIZE, MEMOP_MAP, 0b111); + svcControlProcessMemory(currentHandle, + bios_translation_cache, bios_translation_cache_ptr, + BIOS_TRANSLATION_CACHE_SIZE, MEMOP_MAP, 0b111); svcCloseHandle(currentHandle); rom_translation_ptr = rom_translation_cache; ram_translation_ptr = ram_translation_cache; + bios_translation_ptr = bios_translation_cache; ctr_flush_invalidate_cache(); translation_caches_inited = 1; } @@ -477,8 +485,10 @@ void retro_init(void) rom_translation_cache = (u8*)currentHandle; ram_translation_cache = rom_translation_cache + ROM_TRANSLATION_CACHE_SIZE; + bios_translation_cache = ram_translation_cache + RAM_TRANSLATION_CACHE_SIZE; rom_translation_ptr = rom_translation_cache; ram_translation_ptr = ram_translation_cache; + bios_translation_ptr = bios_translation_cache; sceKernelOpenVMDomain(); translation_caches_inited = 1; } @@ -517,6 +527,7 @@ void retro_deinit(void) #if defined(HAVE_MMAP) && defined(HAVE_DYNAREC) munmap(rom_translation_cache, ROM_TRANSLATION_CACHE_SIZE); munmap(ram_translation_cache, RAM_TRANSLATION_CACHE_SIZE); + munmap(bios_translation_cache, BIOS_TRANSLATION_CACHE_SIZE); #endif #if defined(_3DS) && defined(HAVE_DYNAREC) @@ -530,9 +541,13 @@ void retro_deinit(void) svcControlProcessMemory(currentHandle, ram_translation_cache, ram_translation_cache_ptr, RAM_TRANSLATION_CACHE_SIZE, MEMOP_UNMAP, 0b111); + svcControlProcessMemory(currentHandle, + bios_translation_cache, bios_translation_cache_ptr, + BIOS_TRANSLATION_CACHE_SIZE, MEMOP_UNMAP, 0b111); svcCloseHandle(currentHandle); free(rom_translation_cache_ptr); free(ram_translation_cache_ptr); + free(bios_translation_cache_ptr); translation_caches_inited = 0; } #endif diff --git a/psp/mips_stub.S b/psp/mips_stub.S index 1c4ad4b..62a7731 100644 --- a/psp/mips_stub.S +++ b/psp/mips_stub.S @@ -662,6 +662,7 @@ fnptrs: .global stub_arena .global rom_translation_cache .global ram_translation_cache +.global bios_translation_cache stub_arena: .space STUB_ARENA_SIZE @@ -669,6 +670,8 @@ rom_translation_cache: .space ROM_TRANSLATION_CACHE_SIZE ram_translation_cache: .space RAM_TRANSLATION_CACHE_SIZE +bios_translation_cache: + .space BIOS_TRANSLATION_CACHE_SIZE #endif diff --git a/x86/x86_stub.S b/x86/x86_stub.S index 333c8fd..b110787 100644 --- a/x86/x86_stub.S +++ b/x86/x86_stub.S @@ -558,6 +558,8 @@ defsymbl(rom_translation_cache) .space ROM_TRANSLATION_CACHE_SIZE defsymbl(ram_translation_cache) .space RAM_TRANSLATION_CACHE_SIZE +defsymbl(bios_translation_cache) + .space BIOS_TRANSLATION_CACHE_SIZE #endif -- cgit v1.2.3