From 37430f22c5234cb09f2325575806b830f947bf8a Mon Sep 17 00:00:00 2001
From: David Guillen Fandos
Date: Fri, 7 May 2021 20:41:54 +0200
Subject: Small optimization (~2-4%) and whitespace cleanup!

Cleans up a ton of whitespace in cpu.c (like 100KB!) and improves
readability of some massive decode statements.

Added an optimization for PC-relative loads (pool load) in ROM (since
it's read only and cannot possibily change) that directly emits an
immediate load. This is way faster, specially in MIPS/x86, ARM can be
even faster if we rewrite the immediate load macros to also use a pool.
---
 arm/arm_emit.h | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

(limited to 'arm/arm_emit.h')

diff --git a/arm/arm_emit.h b/arm/arm_emit.h
index 1b6b251..4516404 100644
--- a/arm/arm_emit.h
+++ b/arm/arm_emit.h
@@ -319,7 +319,7 @@ u32 arm_disect_imm_32bit(u32 imm, u32 *stores, u32 *rotations)
 
 
 #define generate_load_pc(ireg, new_pc)                                        \
-  arm_load_imm_32bit(ireg, new_pc)                                            \
+  arm_load_imm_32bit(ireg, (new_pc))                                          \
 
 #define generate_load_imm(ireg, imm, imm_ror)                                 \
   ARM_MOV_REG_IMM(0, ireg, imm, imm_ror)                                      \
@@ -1658,6 +1658,10 @@ u32 execute_store_cpsr_body(u32 _cpsr, u32 store_mask, u32 address)
 
 /* Operation types: imm, mem_reg, mem_imm */
 
+#define thumb_load_pc_pool_const(reg_rd, value)                               \
+  generate_load_pc(reg_a0, (value));                                          \
+  generate_store_reg(reg_a0, reg_rd)
+
 #define thumb_access_memory_load(mem_type, _rd)                               \
   cycle_count += 2;                                                           \
   generate_function_call(execute_load_##mem_type);                            \
-- 
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