From 5b6683bb939d5930e5cd69a5b49aa03523ce3ea3 Mon Sep 17 00:00:00 2001
From: aliaspider
Date: Wed, 8 Apr 2015 10:20:32 +0100
Subject: (3DS) enable dynarec support, works only with ninjahax.

---
 cpu_threaded.c | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

(limited to 'cpu_threaded.c')

diff --git a/cpu_threaded.c b/cpu_threaded.c
index 41ea483..5f52cb7 100644
--- a/cpu_threaded.c
+++ b/cpu_threaded.c
@@ -34,6 +34,13 @@ u8* bios_translation_cache;
 u8 *rom_translation_ptr;
 u8 *ram_translation_ptr;
 u8 *bios_translation_ptr;
+#elif defined(_3DS)
+u8 __attribute__((aligned(0x1000))) rom_translation_cache[ROM_TRANSLATION_CACHE_SIZE];
+u8 __attribute__((aligned(0x1000))) ram_translation_cache[RAM_TRANSLATION_CACHE_SIZE];
+u8 __attribute__((aligned(0x1000))) bios_translation_cache[BIOS_TRANSLATION_CACHE_SIZE];
+u8 *rom_translation_ptr = rom_translation_cache;
+u8 *ram_translation_ptr = ram_translation_cache;
+u8 *bios_translation_ptr = bios_translation_cache;
 #elif defined(ARM_MEMORY_DYNAREC)
 __asm__(".section .jit,\"awx\",%progbits");
 
@@ -226,7 +233,10 @@ extern u8 bit_count[256];
 
 #if defined(PSP_BUILD)
 #define translate_invalidate_dcache() sceKernelDcacheWritebackAll()
-
+#elif defined(_3DS)
+int32_t HB_FlushInvalidateCache();
+#define translate_invalidate_dcache() HB_FlushInvalidateCache()
+#define invalidate_icache_region(addr, size) (void)0
 #elif defined(ARM_ARCH)
 static int sys_cacheflush(void *addr, unsigned long size)
 {
-- 
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