From f1d14fbe7ce749b613ee2f7071cdfff1de013152 Mon Sep 17 00:00:00 2001 From: aliaspider Date: Wed, 4 Nov 2015 15:46:27 +0100 Subject: (3ds) dynarec: map the translation caches to specific addresses at runtime, increases compatibility with loaders that can reloacate each program section seperately. move the svc enabling functions to the frontend. --- cpu_threaded.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'cpu_threaded.c') diff --git a/cpu_threaded.c b/cpu_threaded.c index cb7c1c2..44f5d84 100644 --- a/cpu_threaded.c +++ b/cpu_threaded.c @@ -35,9 +35,9 @@ u8 *rom_translation_ptr; u8 *ram_translation_ptr; u8 *bios_translation_ptr; #elif defined(_3DS) -u8 __attribute__((aligned(0x1000))) rom_translation_cache[ROM_TRANSLATION_CACHE_SIZE]; -u8 __attribute__((aligned(0x1000))) ram_translation_cache[RAM_TRANSLATION_CACHE_SIZE]; -u8 __attribute__((aligned(0x1000))) bios_translation_cache[BIOS_TRANSLATION_CACHE_SIZE]; +u8* rom_translation_cache_ptr; +u8* ram_translation_cache_ptr; +u8* bios_translation_cache_ptr; u8 *rom_translation_ptr = rom_translation_cache; u8 *ram_translation_ptr = ram_translation_cache; u8 *bios_translation_ptr = bios_translation_cache; -- cgit v1.2.3