From 1e8097ac79bd9026e6dd2d0046a687b8d7bec1aa Mon Sep 17 00:00:00 2001
From: David Guillen Fandos
Date: Fri, 12 Mar 2021 17:59:36 +0100
Subject: Improve and simplify dynarec JIT area.

Also fix a regression on VITA.
Use gcc/OS cache flushing routines for MIPS32 instead of synci
---
 psp/mips_stub.S | 18 +-----------------
 1 file changed, 1 insertion(+), 17 deletions(-)

(limited to 'psp/mips_stub.S')

diff --git a/psp/mips_stub.S b/psp/mips_stub.S
index 7f0f303..1b76753 100644
--- a/psp/mips_stub.S
+++ b/psp/mips_stub.S
@@ -2808,24 +2808,8 @@ execute_arm_translate:
   jr $2                           # jump to return
   nop
 
-# This is only to be used with MIPS32
-# $4: start location
-# $5: length
-
-icache_region_sync:
-  ins $4, $0, 0, 6                # align to 64 bytes
-  addiu $2, $5, 63                # align up to 64 bytes
-  srl $2, $2, 6                   # divide by 64
-
-1:
-  synci ($4)                      # sync caches
-  addiu $2, $2, -1                # next loop iteration
-  bne $2, $0, 1b                  # loop
-  addiu $4, $4, 64                # go to next cache line (delay slot)
-
-  jr $ra                          # return
-  nop
 
+.data:
 
 memory_map_read:
   .space 0x8000
-- 
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