From 3d874ec5e3d5675ae9513264d857a3c6c9d2417c Mon Sep 17 00:00:00 2001
From: David Guillen Fandos
Date: Thu, 1 Jul 2021 12:04:48 +0200
Subject: Add palette conversion routine for non-R2 MIPS

Gated MIPS_HAS_R2_INSTS not used at the moment. Tested with qemu.
---
 psp/mips_emit.h | 28 +++++++++++++++++++++-------
 1 file changed, 21 insertions(+), 7 deletions(-)

(limited to 'psp')

diff --git a/psp/mips_emit.h b/psp/mips_emit.h
index 679c9e0..7f51b8f 100644
--- a/psp/mips_emit.h
+++ b/psp/mips_emit.h
@@ -2969,19 +2969,33 @@ static void emit_pmemst_stub(
   *tr_ptr = translation_ptr;
 }
 
+// Palette conversion functions. a1 contains the palette value (16 LSB)
+// Places the result in reg_temp, can use a0 as temporary register
 #ifdef USE_BGR_FORMAT
-  /* 0BGR to BGR565, for PSP */
+  /* 0BGR to BGR565, only for PSP (uses ins) */
   #define palette_convert()                       \
     mips_emit_sll(reg_temp, reg_a1, 1);           \
     mips_emit_andi(reg_temp, reg_temp, 0xFFC0);   \
     mips_emit_ins(reg_temp, reg_a1, 0, 5);
 #else
-  /* 0BGR to RGB565 (clobbers a0!) */
-  #define palette_convert()                       \
-    mips_emit_ext(reg_temp, reg_a1, 10, 5);       \
-    mips_emit_ins(reg_temp, reg_a1, 11, 5);       \
-    mips_emit_ext(reg_a0, reg_a1, 5, 5);          \
-    mips_emit_ins(reg_temp, reg_a0, 6, 5);
+  /* 0BGR to RGB565 (clobbers a0) */
+  #ifdef MIPS_HAS_R2_INSTS
+    #define palette_convert()                       \
+      mips_emit_ext(reg_temp, reg_a1, 10, 5);       \
+      mips_emit_ins(reg_temp, reg_a1, 11, 5);       \
+      mips_emit_ext(reg_a0, reg_a1, 5, 5);          \
+      mips_emit_ins(reg_temp, reg_a0, 6, 5);
+  #else
+    #define palette_convert()                       \
+      mips_emit_srl(reg_a0, reg_a1, 10);            \
+      mips_emit_andi(reg_temp, reg_a0, 0x1F);       \
+      mips_emit_sll(reg_a0, reg_a1, 1);             \
+      mips_emit_andi(reg_a0, reg_a0, 0x7C0);        \
+      mips_emit_or(reg_temp, reg_temp, reg_a0);     \
+      mips_emit_andi(reg_a0, reg_a1, 0x1F);         \
+      mips_emit_sll(reg_a0, reg_a0, 11);            \
+      mips_emit_or(reg_temp, reg_temp, reg_a0);
+  #endif
 #endif
 
 // Palette is accessed differently and stored in a decoded manner
-- 
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