From 4fd456e1583a4c8686c8de87c2aeb1eb78125be1 Mon Sep 17 00:00:00 2001 From: David Guillen Fandos Date: Wed, 5 May 2021 02:20:00 +0200 Subject: Adding Code Breaker cheat support This works on both interpreter and dynarec. Tested in MIPS, ARM and x86, still needs some more testing, some edge cases can be buggy. --- x86/x86_emit.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'x86') diff --git a/x86/x86_emit.h b/x86/x86_emit.h index ef79110..45b663b 100644 --- a/x86/x86_emit.h +++ b/x86/x86_emit.h @@ -2236,6 +2236,12 @@ static void function_cc execute_swi(u32 pc) generate_indirect_branch_cycle_update(dual); \ } \ +#define thumb_process_cheats() \ + generate_function_call(process_cheats); + +#define arm_process_cheats() \ + generate_function_call(process_cheats); + #define thumb_swi() \ generate_swi_hle_handler(opcode & 0xFF); \ generate_update_pc((pc + 2)); \ -- cgit v1.2.3 From 37430f22c5234cb09f2325575806b830f947bf8a Mon Sep 17 00:00:00 2001 From: David Guillen Fandos Date: Fri, 7 May 2021 20:41:54 +0200 Subject: Small optimization (~2-4%) and whitespace cleanup! Cleans up a ton of whitespace in cpu.c (like 100KB!) and improves readability of some massive decode statements. Added an optimization for PC-relative loads (pool load) in ROM (since it's read only and cannot possibily change) that directly emits an immediate load. This is way faster, specially in MIPS/x86, ARM can be even faster if we rewrite the immediate load macros to also use a pool. --- x86/x86_emit.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'x86') diff --git a/x86/x86_emit.h b/x86/x86_emit.h index 45b663b..69c1f8e 100644 --- a/x86/x86_emit.h +++ b/x86/x86_emit.h @@ -325,7 +325,7 @@ typedef enum x86_emit_mov_reg_mem(reg_##ireg, reg_base, reg_index * 4); \ #define generate_load_pc(ireg, new_pc) \ - x86_emit_mov_reg_imm(reg_##ireg, new_pc) \ + x86_emit_mov_reg_imm(reg_##ireg, (new_pc)) \ #define generate_load_imm(ireg, imm) \ x86_emit_mov_reg_imm(reg_##ireg, imm) \ @@ -1894,6 +1894,10 @@ u32 function_cc execute_ror_imm_op(u32 value, u32 shift) // Operation types: imm, mem_reg, mem_imm +#define thumb_load_pc_pool_const(reg_rd, value) \ + generate_load_pc(a0, (value)); \ + generate_store_reg(a0, reg_rd) + #define thumb_access_memory_load(mem_type, reg_rd) \ cycle_count += 2; \ generate_function_call(execute_load_##mem_type); \ -- cgit v1.2.3