From 03e67548bb08bb325f156f9c18fbdb1a58f63c59 Mon Sep 17 00:00:00 2001 From: aliaspider Date: Thu, 5 Nov 2015 19:55:07 +0100 Subject: move more files --- old/rel/menu_header.bmp | Bin 0 -> 46134 bytes old/rel/readme.txt | 347 ++++++ old/rel/snesadvance.dat | 641 +++++++++++ old/spc700/Makefile | 13 + old/spc700/Makefile.win | 15 + old/spc700/debug/apu.h | 195 ++++ old/spc700/debug/apumem.h | 222 ++++ old/spc700/debug/port.h | 494 ++++++++ old/spc700/debug/spc700.cpp | 2600 +++++++++++++++++++++++++++++++++++++++++++ old/spc700/debug/spc700.h | 172 +++ old/spc700/spcgen.c | 2164 +++++++++++++++++++++++++++++++++++ src/rel/menu_header.bmp | Bin 46134 -> 0 bytes src/rel/readme.txt | 347 ------ src/rel/snesadvance.dat | 641 ----------- src/spc700/Makefile | 13 - src/spc700/Makefile.win | 15 - src/spc700/debug/apu.h | 195 ---- src/spc700/debug/apumem.h | 222 ---- src/spc700/debug/port.h | 494 -------- src/spc700/debug/spc700.cpp | 2600 ------------------------------------------- src/spc700/debug/spc700.h | 172 --- src/spc700/spcgen.c | 2164 ----------------------------------- 22 files changed, 6863 insertions(+), 6863 deletions(-) create mode 100644 old/rel/menu_header.bmp create mode 100644 old/rel/readme.txt create mode 100644 old/rel/snesadvance.dat create mode 100644 old/spc700/Makefile create mode 100644 old/spc700/Makefile.win create mode 100644 old/spc700/debug/apu.h create mode 100644 old/spc700/debug/apumem.h create mode 100644 old/spc700/debug/port.h create mode 100644 old/spc700/debug/spc700.cpp create mode 100644 old/spc700/debug/spc700.h create mode 100644 old/spc700/spcgen.c delete mode 100644 src/rel/menu_header.bmp delete mode 100644 src/rel/readme.txt delete mode 100644 src/rel/snesadvance.dat delete mode 100644 src/spc700/Makefile delete mode 100644 src/spc700/Makefile.win delete mode 100644 src/spc700/debug/apu.h delete mode 100644 src/spc700/debug/apumem.h delete mode 100644 src/spc700/debug/port.h delete mode 100644 src/spc700/debug/spc700.cpp delete mode 100644 src/spc700/debug/spc700.h delete mode 100644 src/spc700/spcgen.c diff --git a/old/rel/menu_header.bmp b/old/rel/menu_header.bmp new file mode 100644 index 0000000..6066978 Binary files /dev/null and b/old/rel/menu_header.bmp differ diff --git a/old/rel/readme.txt b/old/rel/readme.txt new file mode 100644 index 0000000..43e4104 --- /dev/null +++ b/old/rel/readme.txt @@ -0,0 +1,347 @@ +DrPocketSnes +Super Nintendo (SNES) Emulator +by Reesy + +DrPocketSnes is a Super Nintendo (SNES) emulator for the GP2X and Gizmondo. I've taken bits from PocketSnes and SquidgeSnes and merged them into another new emulator. I then stuck my menu system on it and called it my own :) you've got to love porting stuff. + +So credits for this emulator should really go to. + +Snes9x Team for creating the original Snes9x emulator +http://www.snes9x.com/ + +Scott Ramsby for PocketSnes port based on Snes9x sources +http://paqpark.nuclearfallout.net/projects/pocketsnes.php + +Yoyofr for OpenSnes9x port based on Snes9x sources +http://yoyofr.fr.st/ + +Squidge for the SquidgeSnes port based on OpenSnes9x +http://squidge2x.com/ + +Notaz for his fixes and improvements to SquidgeSnes. +http://notaz.atspace.com/ + +Rlyeh for his work on the gp2x (not so)minimal sdk +http://www.retrodev.info/ + +Reesy for merging everything and sticking a menu on it...the really complicated stuff ;). +http://reesy.gp32x.de/ + +==================== +IMPORTANT +When upgrading from v4 to v5 you will need to manually move the savestate files (*.sv*) from the options directory into the savestate directory and the SRAM files (*.srm) from the root installation directory into the sram directory. See change history for more details. +==================== + +============== +Change History +============== + +___________________________________ +Version 7.1.0 Release Date 28/10/2010 +___________________________________ +Changes by Bitrider + +- Added: Tv-Out compatiblity. + Thanks to XiM for the Ext connector used to make my Tv-Out cable, which made this feature possible. +- Internal changes: + Lots of code refactoring, make my life easier. + A new saner Makefile. + +___________________________________ +Version 7.0.1 Release Date ??/09/2010 +___________________________________ +Changes by Bitrider + +- Bug-fix release (Mode-7, priorities, sprites, etc) + +___________________________________ +Version 7.0.0 Release Date 30/07/2010 +___________________________________ +Changes by Bitrider + + Thanks goes to: + Buba-ho-tep, Rivroner (beta testers) + Anarchy (GP32Spain webmaster & conding contest promoter) + Head-On-Heels (v 6.5.0 developer) + Notaz, Squidge, Little Johnz & all those who contributed to this wonderful emulator. + +- Added: deep changes to SPC 700 assembly core, now it is faster. + - moved a few registers + - less reads/writes to memory + - implemented GetByteZ, GetByte, SetByteZ & SetByte in ARM assembly +- Added: modifications to 65c816 assembly core, a little bit faster. + - moved several flags from memory to status register. + - implemented SetPCBase in ARM assembly. + - SetDSP & GetDSP called directly (S9x_SetDSP & S9x_GetDSP where just wrapper functions with no added value). + - Assembly CPU code splitted in several files (modularity purposes) +- Added: 4 different assembly APU (SPC 700) cycle sizes: 13, 14, 15 & 21. + Now more games are compatible with fast executable & fast mode on compatible executable : + Human's ones (Firemen, ...), Secret of evermore, Clock Tower (yeah, I know it's also by Human but a special case) that one is for you Buba. +- Added: 16 bit fast assembly renderers for: + tile: opaque, add, add 1/2, add fix 1/2, sub, sub 1/2, sub fix 1/2 + tile clipped: opaque, add, add 1/2, add fix 1/2, sub, sub 1/2, sub fix 1/2 + mode 7 just one layer: solid, solid with priority, add, add 1/2, sub, sub 1/2 + mode 7 with priorities (two layers): solid, add, add 1/2, sub, sub 1/2. + subscreen filling: solid, add, add 1/2, sub, sub 1/2 +- Added: SpeedHacks (rom patching with snesadvance.dat) to fast executable +- Added: a switch to enable/disable speed hacks, "Apply snesadvance.dat on ROM load". +- Added: Super FX emulation to fast executable version. +- Added: last played ROM loading at PocketSNES startup +- Added: a switch to enable/disable last played ROM loading at startup +- Added: persistent selector in ROM list selector + Last selected ROM will continue being focused when you launch a ROM + and go back to the menu to select another ROM. (idea by Buba-ho-tep, thanks man.) + It does work only when you are in default PocketSNES ROM directory +- Added: display ROM file name while loading. +- Added: on ROM load error display error, pause & show "Push a button to continue". +- Added: fast version (65c816 assembly emulation) will show as "v 7.0.0 fast" + compatible version (65c816 C emulation) will show as "v 7.0.0 compatible" +- Added: the ability to use Fast (assembly SPC-700) or Compatible (C SPC-700), more games playable on fast executable. + - So "Emulation (Reset Required): Compatible/Fast" switch is now available on fast executable. +- Fixed: Auto save SRAM should only save when a change occurred +- Added: "Manual + indicator" to SRAM saving options + A disk will be displayed on the lower right corner of the screen when SRAM data is awaiting + Note: disk won't be visible if screen is resized +- Added: a little bit optimized sound block decode routine. + + +___________________________________ +Version 6.5.0 Release Date 24/10/2009 +___________________________________ +Changes by HeadOverHeels + 1. Optimizations in mode 7 and other code optimizations + 2. Horizontal scaler + + FAST VERSION + ------------ + 3. Increased compatibility: star ocean, rendering ranger, etc. + 4. More games are compatible with audio performance hack + + NORMAL VERSION + -------------- + 5. Full SuperFX and SA-1 emulation + 6. Snesadvance.dat speedhacks support + 7. 2 sound emulation modes: compatible and fast + +___________________________________ +Version 6.4.5 Release Date 06/06/2009 +___________________________________ +Changes by HeadOverHeels + 1. Ported to GP2X WIZ + 2. Optimizations in C4 emulation + +___________________________________ +Version 6.4.4 Release Date 16/11/2008 +___________________________________ +Changes by Reesy + 1. Zipped save states + 2. Rom Browser code tidied, you can now set the default directory + from inside the rom browser. The rom browser now also tells + you the current directory. +Changes by HeadOverHeels + 1. Fixed some bugs in layer priority (super ghouls'n ghosts level 4 for example) + 2. Optimizations in tile rendering code, ppu emulation, ... + 3. Changes in volume control to be more usable with headphones in firmware 4.0.0 and louder with firmware 4.1.1 + 4. Fixed: some games do not work if you don't restart the emulator + 5. Menu now sets cpu clock to 66 mhz to save battery + +___________________________________ +Version 6.4.3 Release Date 23/02/2008 +___________________________________ +Changes by HeadOverHeels + 1. USB pads support + 2. Fixed sky colour for Super Mario World when transparencies are not active. + 3. Fixed framerate for PAL games (50 fps) and added an option to configure region (AUTO, NTSC, PAL) + 4. Fixed sound problems with some games (Ilussion of Gaia for exmaple) + 5. Sound frequencies have been changed (8250,16500) to make GP2X F200 compatible + 6. 256x240 games resolution problem have been fixed + 7. C4 chip support (Megaman X2, X3) + 8. High resolution text support (Seiken Densetsu 3 - Secret of Mana2) + 9. Added DSP optimizations from snes9xTYL of Yoyofr. + 10. F200 sound level now is lower + 11. SDD1 support (Star Ocean & Street Fighter Alpha 2) + SDD1 decompressed packs are supported. SDD1GFX.DAT & SDD1GFX.IDX must be copied to a subdirectory named socnsdd1 (for Star Ocean) and sfa2sdd1 (for Street Fighter 2 alpha). Create these subdirectories in the roms directory. + If no packs are found, the emulator uses realtime decompression (slower) + 12. Other minor fixes and optimizations. + 13. Added stereo sound. + 14. New advanced hacks options: + Audio performance hack + Ignore palette writes + Ignore Fixed Colour + Ignore Windows clipping + Ignore Add/Sub modes + Layer desactivation + +Changes by Reesy +___________________________________ +Version 6 Release Date 04/02/2007 +___________________________________ + 1. Fixed a bug on the rom browsing code. Strings were not being terminated correctly. +___________________________________ +Version 5 Release Date 03/02/2007 +___________________________________ + 1. Changed the way SRAM works. The old versions of PocketSnes used a timer to check if SRAM had changed while the SNES emulator was running. If a change was detected the SRAM was saved straight away. This used to cause glitches in the framerate. SRAM is now saved when you enter the menu as long as you have SRAM saving set to automatic in the options menu. + 2. Added options to allow you to switch MMU hack on or off + 3. Added options to allow you to switch Craigx's RAM settings on or off. + 4. Fixed problems where data was not being saved to SD card correctly, I was missing a few calls to sync() + 5. I've tidied up the installation directory abit. Most things used to be stored in the options sub directory and somethings were saved to the root installation directory, which was a bit of a mess. So I've now created the following 3 directories in order to make things more logical. + + options (*.opt) - used to hold global and individual game settings + savestate (*.sv*) - used to hold save states for all games + sram (*.srm) - used to hold SRAM saves for all games + + This means that we you upgrade from Version 4 to Version 5 you will need to manually copy the savestates out of the options directory and into the savestate directory in order for PocketSnes to recognise them. You will also have to move the SRAM files out of the root +installation directory and into the sram directory. +___________________________________ +Version 4 Release Date 30/01/2007 +___________________________________ + 1. Fixed timer code which was causing the emulator to crash +___________________________________ +Version 3 Release Date 24/01/2007 +___________________________________ + 1. Scaled display mode added. + 2. 44K sound mode added. + 3. Super FX support added - very very buggy and slow +___________________________________ +Version 2 Release Date 24/01/2007 +___________________________________ + 1. Fixed Diagnals. + 2. Fixed Volume controls. + 3. Fixed Reset game function. + 4. Snes Select button now working. +___________________________________ +Version 1 Release Date 24/01/2007 +___________________________________ + Initial release + +========================= +Installation Instructions +========================= + +Along with this document you are reading you should have also received the following files + +PocketSnes.gpe - PocketSnes emulator +mmuhack.o - Additional module used to hack MMU and improve performance. + +Simply copy these files onto your SD card, the files can go anywhere but both files need to be in the same directory. I recommend putting the in a directory of their own because when the emulator first starts up it will create several subdirectories which are used to store options, savestates and SRAM saves. + +So for example create a directory called DrPocketSnes and then copy the PocketSnes.gpe and mmuhack.o files into the DrPocketSnes directory. + +Now you need to copy some SNES roms to you SD card. Again you can put your roms anywhere you like on your SD card, you just need to configure DrPocketSnes to point at your rom directory. To do this follow the instructions below + +1. Start PocketSnes +2. Select "Select Rom" from the menu. +3. This will take you by default to the current working directory (e.g the directory where you installed DrPocketSnes /mnt/sd/DrPocketSnes. +4. You now need to browse through the file system to find your rom directory. +5. To do this select ".." to move up and directory or select any entries that start with "+". Entries that start with "+" are directories, so selecting takes you into that directory. +6. Once you have located your rom directory, you need to save the current directory as your default rom directory. +7. To do this select the "Back To Main Menu" menu option. +8. Then select "SNES Options" +9. Then select "Save Current Rom Directory" +10. This will store the current rom directory in a text file held in the options directory. So the next time you start PocketSnes and select "Select Rom" you will be taken straight to your rom directory. + +============ +Menu Options +============ +_______________________________________________ +Return To Game + If you have a rom loaded this will allow to exit the menu and return to the game. +_______________________________________________ +Select Rom + Takes you to the Rom Selection screen which allows you load a new game. +_______________________________________________ +Manage Save States + Takes you to the save state management screen. Save states allow you to save your current position in the currently loaded game. This means that you can reload a particular position in the game as many times as you want. +_______________________________________________ +Save Sram + Allows you save the current contents of SRAM to a file. SRAM is the battery backup ram which used to be on the Snes cartridges. This allowed high scores or game progress, so that the next time you loaded the snes game you could continue where you left off. If you plan to use save states then you don't need to worry about SRAM saves as the save state holds all of this information as well. +_______________________________________________ +SNES Options + Takes you into the options screen which allows you to customise how the emulator runs. See "SNES Options - In Detail" for more information on each of the settings. +_______________________________________________ +Reset Game + Allows you to reset the current rom, its the same as reloading the rom apart from you don't have to read the rom file from the SD card again. +_______________________________________________ +Exit Application + Exits PocketSnes and reloaded the GP2X menu. +_______________________________________________ + +======================== +SNES Options - In Detail +======================== +_______________________________________________ +Sound + Allows you to turn the sound on or off +_______________________________________________ +Sound Rate + Allows you to configure the sample rate of the sound emulation. The high the rate the clearer and more accurate the sound. +_______________________________________________ +Volumne + Allows you setup default volume levels. Volume can also be controlled using the volume controls on the GP2X. +_______________________________________________ +Cpu Speed + Allows you select the GP2X cpu speed to be used when emulating the Snes. The higher the cpu speed the smoother the emulation is ( plus it drains you battery more) +_______________________________________________ +FrameSkip + Allows you to control how many frames are not rendered, this can allow you to keep full speed emulation when at low cpu speeds. AUTO will skip as many frames as needed in order to maintain full speed emulation. +_______________________________________________ +Action Buttons + The GP2X has the same button as the snes but the buttons are in the wrong order. This option allows you to have the same button names as the snes, or to have the same button positions as snes. + NORMAL = same button names as Snes + SWAPPED = same button positions as Snes +_______________________________________________ +Show FPS + This allows you to see how man frames are being rendered per second. This can allow you to see how the emulator is performing. +_______________________________________________ +Brightness + This allows you to control the current brightness of the screen. You can make it darker or brighter. +_______________________________________________ +Transparencies + The SNES has very complicated graphics hardware which can be quite slow to emulate. Switching off transparencies can improve performce but makes some games unplayable because you can not see all of the information that you need. +_______________________________________________ +Render Mode + Allows you to scale the emulated SNES graphics. The normal SNES screen resolution is less than the GP2X's, so when in unscaled mode the graphics appear in a window. If you select the scaled mode then the graphics are stretched to fill the screen. +_______________________________________________ +RAM Timing + This allows you select faster ram timings. This can improve performance. If you change this option you need to restart PocketSnes because these settings are only applied as the emulator is first started. +_______________________________________________ +MMU Hack + This option allows you to enable the MMU hack developed by Squidge. This option massively improves performance and is recommended. Again if you change this option you need to restart PocketSnes because these settings are only applied as the emulator is first started. +_______________________________________________ +Saving SRAM + This option allows you to control how the SRAM is saved to you SD card. If you select automatic then SRAM will be saved automatically everytime you return to the menu if it has been modified during the last run of emulation. If you select the manual option then SRAM will only be saved when you select the Save SRAM menu option from the main menu. +_______________________________________________ +Load Global Settings + This option will reload the global settings. Global Settings affect all games as long as the games does not have a setting file of its own ( See Load Settings for current game). +_______________________________________________ +Save Global Settings + This option allows you to save the current settings to the SD card. Everytime you load a new rom these settings will be reloaded, so basically they become you default settings. This can be overwritten using the "Save Settings For Current Game" option which allows you to save a config file for a particular rom. So each time you load the rom these settings will automatically be loaded. +_______________________________________________ +Delete Global Settings + Deletes any global setting file that has been created. If you have no global setting file then PocketSnes will use its own internal default settings when loading a new rom. +_______________________________________________ +Load Settings For Current Game + This option will load any setting file associated with the currently loaded rom. +_______________________________________________ +Save Settings For Current Game + This option allows you to save a config file for the currently loaded rom. So each time you load this rom these settings will automatically be loaded instead of the global settings. +_______________________________________________ +Delete Settings For Current Game + Deletes any config file for the currently loaded rom. +_______________________________________________ +Save Current Rom Directory + This option allows you to save the current rom directory as you default rom directory. +_______________________________________________ + + + + + + + + + + + + + diff --git a/old/rel/snesadvance.dat b/old/rel/snesadvance.dat new file mode 100644 index 0000000..a75bfe6 --- /dev/null +++ b/old/rel/snesadvance.dat @@ -0,0 +1,641 @@ +10000004|0|7E0147|0|1E|2A|18EC3|0|18EC3=EAEA,18E52=EAEA,18E70=EAEA,18E79=EAEA,185CC=EAEA,18612=EAEA,1865E=EAEA,186A5=EAEA,1871D=EAEA,18762=EAEA,184F1=EAEA,18531=EAEA,18560=EAEA,1858D=EAEA,656=42FC,18ED5=42D2,18EDC=EAEA,189F1=EAEA,18A0A=EAEA,18A44=EAEA,18A81=EAEA,18AC7=EAEA,18AF4=EAEA,18803=EAEA,1884A=EAEA,18896=EAEA,188DB=EAEA,188DD=EAEA,18955=EAEA,1899A=EAEA,18B20=EAEA,18B7E=EAEA,18BCA=EAEA,18C11=EAEA,18C89=EAEA,18CD0=EAEA,18D3C=EAEA,18D5A=EAEA,18D85=EAEA,15943=42FA,18EF7=42DB,18E00=42DB,18E2C=EAEA,15811=42FA,18DAE=EAEA,18DD7=80,189D3=EAEA,87=42FA,1534F=42F6 +FBF3C0FF|3x3 Eyes - Seima Korin Den (J)|4|40044804|0|0|0|0|214=42D8 +B3ABDDE6|7th Saga (U)|1320005|40800|0|0|0|0|3F2EB=42DA,FAC0=42F7 +68D7819A|7thsaga|5|C00|0|0|0|C +27FF5BA1|AAAHH! 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Search for Eden (U)|4|0|0|0|0|0|130406=EAEA,13031A=EAEA,130429=EAEA +DC9BB451|Earthbound (U)|5|0|0|0|0|FFFFFFF6|AB93=EAEA,281D=EAEA,83A2=800E1A8FF07F32CFF07F3080,A12D=80,1FFE7=EAA90000,3FDD6=EAA9000080,8762=42FB +3A4A47EB|Earthworm Jim|4000001|0|5114|0|32|0|30169=DB +393DE197|Earthworm Jim 2 (U)|1|0|0|0|0|0|EB99=EAEA,EBC5=EAEA,ED96=EAEA,EDC4=EAEA,EABB=EAEA,E2B4=EAEA,582A=42FC +F0AEAD80|Edo No Kiba (J)|14000001|44800|0|0|0|0|E00A8=EAEA,759=42FC +EEC5A5B1|Edono Kiba (J)|14000001|44800|0|0|0|0|E00A8=EAEA,759=42FC +41E9CD70|Eien no Filena (J)|4|0|0|0|0|0|14DB62=EAEA,14DB96=EAEA,14DBB1=EAEA,14DBB9=EAEA,14DCC4=EAEA,14DFFC=EAEA,14E00E=EAEA,14E02B=EAEA,14E036=EAEA,14E058=EAEA,14E067=EAEA,14E078=EAEA,14E084=EAEA,14E0C4=EAEA,14E0DB=EAEA,14E0E6=EAEA,11A=423B,11F=421B,137=42D7,2296=42D9,2408=42D7,681F=42D9,1276B=42BA,12D63=42BA,1577D4=4251 +F70F2A95|Energy Breaker (J)|4000004|0|0|0|0|0 +BDBF64B3|Energy Breaker (J) [T-Eng]|4|0|0|0|0|0|17F2E8=428A,1813F3=42,1B64E0=4270,1BA050=42D0,1BA3AE=42BA,1BEE5F=42,1C17A0=DB,30D24D=DBF6,30E115=4210,766E=EAEA,7930=EAEA,7985=EAEA,7A94=EAEA,7C2E=EAEA,7C46=EAEA,7C51=EAEA,7C56=EAEA,20C291=EAEA,20F33F=EAEA +634344A0|Esparks - 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Emblem of Justice (J)|5|0|0|0|0|0|5057B=EAEA,503B0=EAEA,503EC=EAEA,50423=EAEA,50453=EAEA,5047C=EAEA,504B0=EAEA,E9E=42DC,23A8=42D4,1017C=42D8,218C7=42D1,10401=42D1,503B4=42D2,F62=42D4,90385=42D4,19DE=42D4,11E67=42D4 +7D36ECD7|Feda - The Emblem of Justice (J|5|0|0|0|0|0|5057B=EAEA,503B0=EAEA,503EC=EAEA,50423=EAEA,50453=EAEA,5047C=EAEA,504B0=EAEA,E9E=42DC,23A8=42D4,1017C=42D8,218C7=42D1,10401=42D1,503B4=42D2,F62=42D4,90385=42D4,19DE=42D4,11E67=42D4 +65D0A825|ff2|10000004|0|0|0|0|0|F24=42DC,F15=42DC,BED=42,10524=42,20033=EAEA,20063=EAEA,20077=EAEA,200AA=EAEA,20235=EAEA,202D6=EAEA,202FA=EAEA,20311=EAEA,20374=EAEA,20385=EAEA,203A1=EAEA,204AB=EAEA,20547=EAEA,2056F=EAEA,205C7=EAEA,205D8=EAEA,205FA=EAEA,20610=EAEA +CAA15E97|FF4 (J)|4|0|0|0|0|0|F24=42DC,F15=42DC,BED=42,10524=42,20033=EAEA,20063=EAEA,20077=EAEA,200AA=EAEA,20235=EAEA,202D6=EAEA,202FA=EAEA,20311=EAEA,20374=EAEA,20385=EAEA,203A1=EAEA,204AB=EAEA,20547=EAEA,2056F=EAEA,205C7=EAEA,205D8=EAEA,205FA=EAEA,20610=EAEA +D5CC300E|ff4e|4|0|0|0|0|0|F24=42DC,F15=42DC,BED=42,10524=42,20033=EAEA,20063=EAEA,20077=EAEA,200AA=EAEA,20235=EAEA,202D6=EAEA,202FA=EAEA,20311=EAEA,20374=EAEA,20385=EAEA,203A1=EAEA,204AB=EAEA,20547=EAEA,2056F=EAEA,205C7=EAEA,205D8=EAEA,205FA=EAEA,20610=EAEA +C1BC267D|FF5 (J)|10000005|0|0|0|0|0 +170778FA|ff6e|5|0|0|0|0|0 +250B44BA|FFMISTIC|10000004|40C00|0|0|0|0|68047=EAEA,68068=EAEA,6807A=EAEA,680CD=EAEA,680FD=EAEA,68114=EAEA,68121=EAEA,6819B=EAEA,681A3=EAEA,681B9=EAEA,681C1=EAEA,681CB=EAEA,681DC=EAEA,681E4=EAEA,68214=EAEA,6821C=EAEA,6822F=EAEA,6828C=EAEA,6839E=EAEA,683C7=EAEA,683DD=EAEA,68437=EAEA,684CA=EAEA,6855F=EAEA,685D0=EAEA,685D6=EAEA,685F0=EAEA +A27F1C7A|Final Fantasy 3 (V1.0) (U)|10000005|44C00|0|0|0|0|28236=42DC,B7A3=EAEA,568=42FC,B80A=EAEA,109B9=EAEA,50055=EAEA,500A6=EAEA,500D6=EAEA,500ED=EAEA,500FA=EAEA,501B8=EAEA,5027C=EAEA,50391=EAEA,503E1=EAEA,5044C=EAEA,50489=EAEA,504B0=EAEA,504CB=EAEA,504F2=EAEA,50521=EAEA,5059B=EAEA,505C5=EAEA,5064A=EAEA,50662=EAEA,506A4=EAEA,506B2=EAEA,71796=EAEA,83440=EAEA,25F824=EAEA,25F855=EAEA,25F8D0=EAEA,295AF6=EAEA,2E1889=EAEA,11A28=42DC +C0FA0464|Final Fantasy III (U) (V1|10000005|44C00|0|0|0|0|28236=42DC,B7A3=EAEA,568=42FC,B80A=EAEA,11A28=42DC +892E44BE|Final Fantasy 5|5|0|0|0|0|0 +17444605|Final Fantasy 5 (Translated)|10000005|0|0|0|0|0|387BB=42DC,4E45=42FC,422=EAEAEA +8D66F796|Final Fantasy 5 (Translated)|10000005|40C00|0|0|0|0|422=EAEAEA,10397=421A,11A88=42D5,1EA6C=421A,1F77A=421A,2A10D=423A,2A113=421A,4CE48=42,4F07A=DBFE,1BF7CC=DB,387BB=42DC,4E45=42FC +45EF5AC8|Final Fantasy 6 (J)|10000005|44C00|0|0|0|0|B6D8=421B,B6D8=EAEA,B73F=421B,B73F=EAEA,568=42FC +23084FCD|Final Fantasy II|0|0|0|0|0|FFFFFFE7|F24=42DC,F15=42DC,BED=42,10524=42,20033=EAEA,20063=EAEA,20077=EAEA,200AA=EAEA,20235=EAEA,202D6=EAEA,202FA=EAEA,20311=EAEA,20374=EAEA,20385=EAEA,203A1=EAEA,204AB=EAEA,20547=EAEA,2056F=EAEA,205C7=EAEA,205D8=EAEA,205FA=EAEA,20610=EAEA +D19F6CB5|Final Fantasy V (J) [T+Eng1|10000005|0|0|0|0|0|B7D8=EAEA,B7E0=EAEA,3FE4A=EAEA,3FE6E=EAEA,3FE81=EAEA,3FED2=EAEA,3FF02=EAEA,3FF19=EAEA,3FF26=EAEA,3FFA0=EAEA,3FFA8=EAEA,3FFB2=EAEA,3FFC3=EAEA,3FFCB=EAEA,3FFF3=EAEA,3FFFB=EAEA +87C13675|Final Fantasy V (J) [T+Eng1|10000006|0|0|0|0|0|387BB=42DC,4E45=42FC,422=EAEAEA +4CAB21DB|Final Fight|0|0|7E0D0A|0|1E|0|81F5=EAEA,8231=EAEA,FA=421C +8C37FF55|Final Fight 2 (U)|0|0|7E1019|0|1E|0|966=42DB +A916E708|Final Fight 3 (U)|1|0|0|0|0|0|66F3=42F4 +BC1AE3C2|Final Fight Guy (US)|0|0|0|0|0|0|8456=EAEA,8312=EAEA,836C=EAEA +25D214F4|Fire Emblem - Monsyo no Nazo (V|4|0|0|0|0|0|3969=EAEA,3977=EAEA,39CC=EAEA,39DD=EAEA,39F0=EAEA,3A24=EAEA,3A56=EAEA,3A5B=EAEA,3A8A=EAEA,3AA2=EAEA,3AAD=EAEA,3AB2=EAEA,3CA5=EAEA,3CBE=EAEA,1C9A35=EAEA +DC0D8CF9|Fire Emblem 4 - Seisen no Keifu|5|0|0|0|0|0 +BC6162AE|Fire Emblem 5 Trachia 776 (J) (|4|0|0|0|0|0 +FC519952|Fire Emblem 5 Trachia 776 (Rom|4|0|0|0|0|0 +E500C7BA|Fire Striker (U)|0|0|0|0|0|0|96=42D9 +1E6ACEBA|Flashback - The Quest for Ident|1|0|0|0|0|0|190098=EAEA,1900B0=EAEA,1900BB=EAEA,1900C0=EAEA,1900EE=EAEA,1900FD=EAEA,190497=EAEA,1904C6=EAEA,1904F5=EAEA,19052C=EAEA,190560=EAEA,190588=EAEA,80A2=42D9,8183=42,15974=42,15991=42,159CF=42,159EC=42,15B60=42,16220=42,1628E4=4259 +3E7B51E0|Flintstones, The (U)|0|0|0|0|0|0 +5FA4D051|Foreman For Real (U)|0|0|0|0|0|0|11791=42F2 +21239DDA|Frank Thomas' Big Hurt Basebal|4|0|0|0|0|0|44F4=42FC,44D9=42FC,39104=42FC,39159=42FC,1E445=42FC,1E4AC=42FC,1F4F7=42FC,1F6CC=42FC,12126=42FC +FFA8D1FF|Frantic Flea (U)|0|0|0|0|0|0|1A424=EAEA,1A547=EAEA,1A4EF=EAEA,1A3FB=EAEA,1A4C4=EAEA,1A399=EAEA,1A45E=EAEA,1A49B=EAEA,8138=42FB +2488B8F2|Frogger (U)|0|0|0|0|0|0|7F353=EAEA,7F378=EAEA,7ED2F=42FC +2B4CD5A3|Front Mission (J) (V1.0)|5|40800|0|0|0|0|2A0A1B=EAEA,258A=42FB +5847D80F|Front Mission - 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Aah Sekai yo Ha|4|0|0|0|0|0 +D191AD46|Hanjuku Eiyuu - Aah Sekai yo Ha|4|0|0|0|0|0 +D54E1452|Harvest Moon (E) [!]|6|0|7E0147|0|1E|2A|18EC3=EAEA,18E52=EAEA,18E70=EAEA,18E79=EAEA,185CC=EAEA,18612=EAEA,1865E=EAEA,186A5=EAEA,1871D=EAEA,18762=EAEA,184F1=EAEA,18531=EAEA,18560=EAEA,1858D=EAEA,656=42FC,18ED5=42D2,18EDC=EAEA,189F1=EAEA,18A0A=EAEA,18A44=EAEA,18A81=EAEA,18AC7=EAEA,18AF4=EAEA,18803=EAEA,1884A=EAEA,18896=EAEA,188DB=EAEA,188DD=EAEA,18955=EAEA,1899A=EAEA,18B20=EAEA,18B7E=EAEA,18BCA=EAEA,18C11=EAEA,18C89=EAEA,18CD0=EAEA,18D3C=EAEA,18D5A=EAEA,18D85=EAEA,15943=42FA,18EF7=42DB,18E00=42DB,18E2C=EAEA,15811=42FA,18DAE=EAEA,18DD7=80,189D3=EAEA,87=42FA,1534F=42F6 +F829129E|Harvest Moon (U)|4|0|7E0147|0|1E|2A|18EC3=EAEA,18E52=EAEA,18E70=EAEA,18E79=EAEA,185CC=EAEA,18612=EAEA,1865E=EAEA,186A5=EAEA,1871D=EAEA,18762=EAEA,184F1=EAEA,18531=EAEA,18560=EAEA,1858D=EAEA,656=42FC,18ED5=42D2,18EDC=EAEA,189F1=EAEA,18A0A=EAEA,18A44=EAEA,18A81=EAEA,18AC7=EAEA,18AF4=EAEA,18803=EAEA,1884A=EAEA,18896=EAEA,188DB=EAEA,188DD=EAEA,18955=EAEA,1899A=EAEA,18B20=EAEA,18B7E=EAEA,18BCA=EAEA,18C11=EAEA,18C89=EAEA,18CD0=EAEA,18D3C=EAEA,18D5A=EAEA,18D85=EAEA,15943=42FA,18EF7=42DB,18E00=42DB,18E2C=EAEA,15811=42FA,18DAE=EAEA,18DD7=80,189D3=EAEA,87=42FA,1534F=42F6 +DD792499|Hashire Hebereke (J)|4|0|0|0|0|0|902=421A,938=421A,946=421A,9C3=421A,BCB=42BA +46ACFC84|Holy Striker (J)|0|0|0|0|0|0 +07C494B1|Home Alone|0|0|0|0|0|0|1C1=EAEA,3D9=EAEA,3FB=EAEA,40D=EAEA,429=EAEA,443=EAEA,44E=EAEA,453=EAEA,48E=EAEA,499=EAEA,4AE=EAEA,4C5=EAEA,4DC=EAEA,4E9=EAEA,4F9=EAEA +D19165D9|Home Alone 2 - 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The Enforce Fighter |0|4040|0|0|0|0|11D=EAEA,FEBD9=42FB,348=42DB +DEF45776|Pilotwings (E)|2|0|0|0|0|0|31F5=EAEA,38D8=EAEA,52B6=EAEA,579D=EAEA,57D2=EAEA,58A0=EAEA,6176=EAEA,6576=EAEA,65B2=EAEA,65CA=EAEA,72A7=EAEA,72BD=EAEA,72C8=EAEA,72CD=EAEA,A76A=EAEA,BD06=EAEA,CE61=EAEA,CFEF=EAEA,716F=4217,728D=42D4 +81107CE2|Pinball Dreams (U)|10000000|0|0|0|0|0|56EB=EAEA,575B=EAEA,578A=EAEA,57AE=EAEA,5685=42DB,1320=42FB,13A5=42FB,3237=42FB,D34=42,953=42B9,1C74=42FA,1E94=42D8 +822AD378|Pinball Fantasies (U)|0|0|0|0|0|0|B0339=EAEA,B0486=EAEA,B0492=EAEA,B0384=EAEA,B0390=EAEA,B03A9=EAEA,B03B5=EAEA,1458=42FB,14DD=42FB,3D8D=42FB +AF2A3DFE|Pipe Dream (J)|0|40800|0|0|0|F|103B8=42FB,164=42F9,F74=42 +7CA0CA4D|Pirates of Dark Water (U)|0|0|0|0|0|0|297D=42FC +2B0E7EA3|Pocky & Rocky (U) [!]|0|0|0|0|0|0|5252=EAEA,2299=EAEA,2421=EAEA,1CA=42DB +892C6765|Pokemon (PD)|4000000|900000|0|0|0|0|4326=EAEA,4353=EAEA,436B=EAEA,4376=EAEA,437B=EAEA,43A9=EAEA,43BA=EAEA,FA3=42,22BA=42D8,1BE60F=DB +D16810CD|Poko Nyan! - Henpokorin Adventu|0|44000|0|0|0|0|69A4=428E +EE13E32D|Pop 'N' Twinbee (J)|10000000|840000|0|0|0|0|118=4280 +2DF4AA0F|Populous (U)|0|40C00|0|0|0|0|390D=4280,14F0E=429C,181A8=DB,1F450=DB +0A0235C0|Populous 2 (J)|0|4040|0|0|0|0 +CB4F87BB|Prehistorik Man (U)|10000000|4F0000|0|0|0|0|1FA18=EAEA,1FA61=EAEA,48314=EAEA,7F68=42FC,4D4=EAEA,181E3=EAEA,1F9CA=EAEA,1F9E2=EAEA,1F9F3=EAEA,1FA0E=EAEA,1FA35=EAEA,1FC6C=EAEA,1FC71=EAEA,1FCA8=EAEA,333E8=EAEA,496E7=EAEA +320562C3|Prince of Persia (E)|2|0|0|0|0|0 +891BB2BB|Prince of Persia (U)|0|0|0|0|0|0|118C2=EAEA,118D3=EAEA,118DF=EAEA,1190B=EAEA,11999=EAEA,11921=EAEA,1A2C1=42DB,1A2CD=4299 +96BD588B|Puzzle Bobble (J)|0|40C00|0|0|0|0 +694CBFE4|Q-bert 3 (U)|0|0|0|0|0|0|7E56=EAEA,6822=42FC +642B656B|R-Type 3|0|0|0|0|0|0|7F37=428E,1DE49E=421B +583FDBFF|Radical Dreamers (SNES) (J) [T+|5|0|0|0|0|0|20F21=EAEA,CFE58=EAEA,CFE5F=EAEA,CFE7D=EAEA,CFEB0=EAEA,CFEE0=EAEA,CFEFB=EAEA,CFF08=EAEA,D0054=EAEA,D0084=EAEA,D00C9=EAEA,D023F=EAEA,D028D=EAEA,D03DB=EAEA,D03FA=EAEA,D040C=EAEA,D0416=EAEA,D0445=EAEA,D0467=EAEA,D050C=EAEA,D0563=EAEA,D05AF=EAEA,D05CB=EAEA,D05D2=EAEA,D05E2=EAEA,D0664=EAEA,D067B=EAEA,D09C2=EAEA,9E41=421A,A1AB=421A,A1BE=421A,A1EA=421A,A1FF=421A,B85B=42BA,F8050=42 +C352D27F|Raiden Densetsu (J) [!]|18000000|0|0|0|0|0|E29=42,E34=42FC,E3A=429A +02CE6C96|Raiden Trad|18000000|0|0|0|0|0|E29=42,E3A=429A +9C79C3B8|Ranma RPG - Anime [T+Eng1.00]|4|0|0|0|0|0|456B=42DB +053B2615|Ranma ½ Bun no 1 - Bakuretsu Ra|1|0|0|0|0|0|FFA0=EAEA,4B1=42FB +0C552B1F|Ranma ½ Bun no 1 - Chogi Ranbu|1|0|0|0|0|0|32F=42DB,40640=42FB,48AF2=DB03,45E5B=DB91 +9BE46820|Realm (E) [!]|2|0|0|0|0|0|85EF=EAEA,F8263=EAEA,F82AF=EAEA,F82D5=EAEA,85E1=42FC,958=42FC,228=42FC +C2413BDD|Rejoice - Aretha Oukoku no Kana|4|44800|0|0|0|0|A5831=EAEA,A55F3=EAEA,A55FB=EAEA,A5838=EAEA,A583C=EAEA,A5845=EAEA,A5849=EAEA,A582D=42DA,2D516=42DB,2DAE1=42DB,2D687=42DB,95F6=42DB,226=42DB,4F7=42DB,7C86=42DB,6E74=42DB,72A5=42DB,1425B=42DB,16DF=42DB,9252=42DB,CEFE=42DB,CEB5=42DB,6D06=42DB,AFB6=42DB,92BC=42DB +CA988F59|Rival Turf (U)|0|0|0|0|0|0|272=EAEA,A6E=EAEA,1A3B=EAEA,1A9F=EAEA,1BB3=EAEA,1BB9=EAEA,632F=EAEA,6343=EAEA,635B=EAEA,6368=EAEA,643A=EAEA,6432=EAEA,6441=EAEA,6456=EAEA,C435=EAEA,11B16=EAEA,F1444=EAEA +BB2B8E2E|Road Runner (E)|2|0|0|0|0|0|7DD3=EAEA,7DEB=EAEA,7DF6=EAEA,7DFB=EAEA,7E88=EAEA,7E8E=EAEA,28902=EAEA,2A605=EAEA,381FD=EAEA,9FE7E=EAEA,9FE84=EAEA,163B=DB +F5AB5D91|Robocop Versus The Terminator |14000000|4040|0|0|0|0|94E=42DB,6D=42DB,AE=42DB,141E=EAEA,5FF5=42D9 +7AD4AADC|Robotrek (U)|5|0|0|0|0|0|4800D=421A +7D06F473|Rock N' Roll Racing (U)|0|0|0|0|0|0|7994=EAEA,AD8F=EAEA,F617=EAEA,3D10=4284 +0ECDC493|Rockman & Forte (J) [T+Eng1.00-|4000001|40000|7|0|0|0|D=42FB +2DCD95B9|Rockman 7 - Syukumei no Taikets|0|0|0|0|0|0 +F0ECDD92|Roger Clemens' MVP Baseball (U)|0|44808|0|0|0|0|A2E5D=42,A2E68=42,A5F0C=42DA,9=42,A39CB=42DB,683E=42 +8033574A|Romance of the Three Kingdoms I|4|0|0|0|0|0|12C1=EAEA,3115=EAEA,19F3=42DB +9684526D|Romancing Saga (V1.1) (J)|8000004|84848484|0|0|0|0|20068=EAEA,20098=EAEA,200AC=EAEA,200DF=EAEA,201C3=EAEA,201CB=EAEA,201E1=EAEA,20248=EAEA,202F0=EAEA,20319=EAEA,20330=EAEA,20385=EAEA,2039D=EAEA,2043C=EAEA,204EA=EAEA,2055C=EAEA,20564=EAEA,20589=EAEA,2058F=EAEA,205A9=EAEA,2D4=42D9,962=DB,13D34=4280,CEFBF=4258 +54A585BC|Romancing Saga 2 (J)|5|0|0|0|0|0|370B=EAEA,556F=EAEA,5581=EAEA,321E5=EAEA,4004A=EAEA,4006A=EAEA,40081=EAEA,4008C=EAEA,40095=EAEA,400E6=EAEA,40116=EAEA,4012D=EAEA,4013A=EAEA,40232=EAEA,4023A=EAEA,40257=EAEA,403DA=EAEA,40403=EAEA,40419=EAEA,40501=EAEA,40593=EAEA,405E1=EAEA,40613=EAEA,40619=EAEA,40666=EAEA,4067F=EAEA,406EB=EAEA,40719=EAEA,4072E=EAEA,40779=EAEA,407A7=EAEA,407BC=EAEA,407EA=EAEA,407FF=EAEA,4082D=EAEA,40840=EAEA,4084C=EAEA,14315C=EAEA,32F=4296,572=4210,69A=42D9,3981=42B0,E76B=42D9,204AF=42D9,30176=4280,3AEA7=42DD,3B0CB=42DD,3B3D2=42DD,3DF0A=DB,3E2E3=DB,3E91F=4280,568B5=DB +5399BDDB|Romancing SaGa 3 (J) (V1.0)|5|4800|0|0|0|0|6063D=EAEA,60643=EAEA,609B0=EAEA,670=42DC,3EC170=42FA,1C42A=42D9,5F957=42FC +42C664C2|Romancing Saga 3 (V1|5|40444444|0|0|0|0|6063D=EAEA,60643=EAEA,609B0=EAEA,670=42DC,3EC170=42FA,1C42A=42D9,5F957=42FC +E0BD6C71|RPG Tukool - Super Dante|4|0|0|0|0|0|00C1=EAEA,B74C=EAEA,B757=EAEA,B762=EAEA,B761=EAEA,B74B=EAEA +E20870EE|RPG Tukool - Super Dante (J)|4|0|0|0|0|0 +5D8CB7AC|Rudra no Hihou (J)|5|0|0|0|0|0|23A5=EAEA,4AA=42FC +244280AE|Rudra no Hihou (J) [T+Eng|2|0|0|0|0|0|130906=EAEA,26187A=EAEA,2B0022=EAEA,2B00A5=EAEA,2B00C9=EAEA,2B031C=EAEA,2B033E=EAEA,2B0357=EAEA,2B0457=EAEA,2B094B=EAEA,2B0954=EAEA,2B095F=EAEA,2DC5B6=EAEA,4AA=42FC +8708E5BB|Run Saber (U)|0|0|0|0|0|0|525=421B,9AB=4290 +454D7DCD|Ryuuki Heidan Danzalv (J)|5|44800|0|0|0|0|F8335=42FB,F8345=421B,F73FE=421B,F8340=423B,F8DDA=42DB,88D3A=4215,8C04F=42FC +CD89020D|Sailor Moon (F)|3|0|0|0|0|0|1B7F8=42FC,1BE5A=42CF,936E=42FC +2E614A53|Samurai Shodown (U)|1|4040|0|0|0|0|10B4=42 +4C78D5EE|Sangokushi - Eiketsu Den (J)|5|4000|0|0|0|0|2C0BB0=EAEA,898D=42DC,1E29=42DB,850E=42DC,1E8F=42DB,87A4=42DC,8544=42DC,1D8C=42DC +98D7611E|Scooby Doo (U)|0|C00|0|0|0|0|DDF0D=EAEA,1017D6=EAEA,114DD0=EAEA,114DF2=EAEA,114DFD=EAEA,114E02=EAEA,114FE5=EAEA,114FF4=EAEA,115007=EAEA,115041=EAEA,11506F=EAEA,115077=EAEA,115097=EAEA,1150A2=EAEA,1B5B14=EAEA,1C988F=EAEA,C39=42DB,1A6874=4211 +8BFCB5A3|SD Gundam X (J)|4|44000|0|0|0|0|454F=EAEA,16E91=EAEA,16ECC=EAEA,16EDD=EAEA,16EEB=EAEA,16EF0=EAEA,16F1E=EAEA,2C5F1=EAEA,4D024=EAEA,975E1=EAEA,AE344=4219 +AAE842D2|SD The Great Battle (J)|1230000|0|0|0|0|0|181=EAEA,6A9C=DB6A +A5C0045E|Secret of Evermore (U)|14000005|0|0|0|0|0 +D0176B24|Secret of Mana (U)|5|4000|7E0604|0|64|A|79773=EAEA,B07B=42DC,694D=421B +EF968ED1|Secret of the Stars (U)|1320004|0|0|0|0|0|417=421B +A638BEF1|Seifuku Densetsu Pretty Fighter|1|0|0|0|0|0 +15320173|Seijuu Maden - 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New Horizons|5|0|0|0|0|0|9E98=42D9,9F5F=42DB +B574C939|Undercover Cops (J)|1|0|0|0|0|0|1C0520=EAEA,1C011D=EAEA,1C04C6=EAEA,1C04E3=EAEA,1C02E2=EAEA,1C02FF=EAEA,1C00D0=EAEA,1C00ED=EAEA,8128=42 +59180F1C|Universal Soldier (U) (Beta)|0|44C00|0|0|0|0|4A68=EAEA,4423=42FB,43F1=42F7,43A4=42D9,6033=42D8 +B9BF7990|Urban Strike (U) [!]|0|0|0|0|0|0 +2D1004F1|Wario's Woods (U)|4|0|0|0|0|0|58195=EAEA,5824E=EAEA,32F=42DC +A47884D0|Warlock (U)|4000000|0|0|0|0|0|676E=EAEA,6786=EAEA,6791=EAEA,6796=EAEA,67DB=EAEA,67E2=EAEA,6804=EAEA,683D=EAEA,6854=EAEA,6867=EAEA,68E0=EAEA,68F7=EAEA,690A=EAEA,694C=EAEA,69ED=429B,E905=42D9,1680FA=DB6E +8B477300|WCW Super Brawl (U)|0|0|0|0|0|0|13FFD=42FC,BBD9=42DB +7379E3B3|Whirlo (E)|2|0|0|0|0|0|CD3=42DC +1637D1A5|Wings 2 (U)|0|0|0|0|0|0|78103=EAEA,78116=EAEA,78119=EAEA +D5CE2DB5|Wizard of Oz, The (U)|0|44800|0|0|0|0|150=42FC,5224=42 +B8A72553|Wizardry 1 2 3 (J) (NP)|4|0|0|0|0|0|1C008E=EAEA,1C00CB=EAEA,1C00E0=EAEA,1C0108=EAEA,1C05AC=EAEA,1C05E3=EAEA,1C05ED=EAEA,BD=DB,1BF=42BA,159750=4210 +D8FDDD76|Wizardry 5 (U)|4|0|0|0|0|0|18A=42BA,213=428C,66830=42,14C5=EAEA,15D4=EAEA,695E=EAEA,69D8=EAEA,6C5F=EAEA,4003C=EAEA,40046=EAEA,40056=EAEA,40070=EAEA,4009A=EAEA,400A8=EAEA,400B3=EAEA,400C4=EAEA,400DE=EAEA,400FC=EAEA,40117=EAEA,40144=EAEA,40164=EAEA,4016B=EAEA,4017F=EAEA,401B8=EAEA,401C5=EAEA,401CF=EAEA,401DF=EAEA,401F1=EAEA,4020D=EAEA,49C8F=EAEA,5004B=EAEA,50055=EAEA,50065=EAEA,5007F=EAEA,500B7=EAEA,500D1=EAEA,500E6=EAEA,50105=EAEA,5011B=EAEA,5017D=EAEA,50187=EAEA,50197=EAEA,501B1=EAEA,501BA=EAEA,501CB=EAEA,501DD=EAEA,501EA=EAEA,5023B=EAEA,50245=EAEA,50255=EAEA,5026F=EAEA,50289=EAEA,50298=EAEA,95CD3=EAEA,A8655=EAEA,B7A03=EAEA,BBE13=EAEA,DCCB1=EAEA +1703D522|Wizardry Gaiden IV - Taima no K|4|40040800|0|0|0|0|B0726=EAEA,B05C8=EAEA,523=42DC,B071F=42,60=4283 +13BFB3A0|Wolfchild (U)|4000000|804|0|0|0|0|F8099=EAEA,F8146=EAEA,F811B=EAEA,F815E=EAEA,F809E=EAEA,5F8=42FC,614=42FC +36079184|Wonder Project J [T+Eng1.04]|5|0|0|0|0|0|AB80=EAEA,2E4A2=EAEA,2E4A8=EAEA,2E4BB=EAEA,2E4BF=EAEA,8420=42DB +90D0FAC0|Worms (E)|10000002|0|0|0|0|0|150085=EAEA,150178=EAEA,19C3B7=EAEA,1B5A=423A,1B60=421A,7627=DB,794E=423A,7BD1=42D8,1B1013=DB +4F02A304|X-Men Mutant Apocalypse (J)|4000001|44000|0|0|0|0|AB=42FB +5E34822A|X-Men Mutant Apocalypse (U)|4000001|44800|0|0|0|0|AB=42FB +C7C12A57|Xardion|4|0|D02|0|1E|5|5E90=421B,5E9E=421B,5E82=421B +7448D45C|Yogi Bear (U)|0|0|0|0|0|0|1ED=EAEA,74C=EAEA,856=EAEA,1137=EAEA,1DB6=EAEA,1EFC=EAEA,1FAD=EAEA,279E=EAEA,57FA=EAEA,5849=EAEA,5861=EAEA,586C=EAEA,5871=EAEA,601BD=EAEA,E84A7=EAEA +EF15F4C3|Yoshi's Cookie (U)|0|0|0|0|0|0|2824F=421B +D138F224|Yoshi's Island (V1.0) (U)|0|0|0|0|0|0|F4=423B +CF98DDAA|Yoshi's Island (U) (M3) (V1.1)|F4=423B +59490CE8|Yoshi's Safari|0|0|0|0|0|0 +7EA1AFE8|Young Merlin|0|0|0|0|0|0 +64A91E64|Ys 3 - Wanderers from Ys|0|0|0|0|0|0|D8=42 +1ADD47F0|Ys 4 - Mask of the Sun (J) [T-E|4|0|0|0|0|0|14060C=EAEA,140631=EAEA,9CA=42DC,A3B=42DC +7B4CEBAF|Ys 4 - Mask of the Sun (J) [T-E|4|0|0|0|0|14060C|14060C=EAEA,140631=EAEA,9CA=42DC,A3B=42DC +CFE632B9|Ys V - Expert (J)|4|44800|0|0|0|0|886=EAEA,79D=EAEA,3B81=EAEA,86C=EAEA,5E06=42FB,A9C=42FB,5DCC=42DB +EC96D517|YUUYUU Hakusho (J)|0|0|0|0|0|0|E15=42FC +EEF45A93|YUUYUU Hakusho 2 - Kakutou no S|0|0|0|0|0|0|10F=42DC +5617A42E|YUUYUU Hakusho Final (J)|1|0|0|0|0|0|A71D=EAEA,A683=EAEA,AB=42DC +535CCCAC|YUUYUU Hakusho Tokubehuten (J)|0|0|0|0|0|0|7957=EAEA,781A=EAEA +5409D4F4|Zen Nihon GT Sensyuken (J)|1320000|0|0|0|0|0|8003B=EAEA,8012B=EAEA,80137=EAEA,15E=42FB +5397D5BC|Zero the Kamikaze Squirrel (U)|0|0|0|0|0|0|41B44=EAEA,41B69=EAEA,1F3=42DB,12EA=4214,2884A=42DB,496=421B,41F=421B +7CFC0C7C|Zombies Ate My Neighbors (U)|10000000|4040|0|0|0|0|4CCF=EAEA,9DC=42 diff --git a/old/spc700/Makefile b/old/spc700/Makefile new file mode 100644 index 0000000..e412de9 --- /dev/null +++ b/old/spc700/Makefile @@ -0,0 +1,13 @@ +CFLAGS = -Wall + +all : spc700a.s + +spc700a.s : spcgen + ./spcgen + +spcgen : spcgen.o + + +clean : + $(RM) spc700a.s spcgen spcgen.o + diff --git a/old/spc700/Makefile.win b/old/spc700/Makefile.win new file mode 100644 index 0000000..06095b0 --- /dev/null +++ b/old/spc700/Makefile.win @@ -0,0 +1,15 @@ +# Makefile for MS Visual C + +ALL : spc700a.s + +spc700a.s : spcgen.exe + spcgen.exe + +spcgen.exe : + cl /W3 spcgen.c + + +CLEAN : + -@erase spc700a.s + -@erase spcgen.exe + -@erase spcgen.obj diff --git a/old/spc700/debug/apu.h b/old/spc700/debug/apu.h new file mode 100644 index 0000000..dd0451c --- /dev/null +++ b/old/spc700/debug/apu.h @@ -0,0 +1,195 @@ +/* + * Snes9x - Portable Super Nintendo Entertainment System (TM) emulator. + * + * (c) Copyright 1996 - 2001 Gary Henderson (gary.henderson@ntlworld.com) and + * Jerremy Koot (jkoot@snes9x.com) + * + * Super FX C emulator code + * (c) Copyright 1997 - 1999 Ivar (ivar@snes9x.com) and + * Gary Henderson. + * Super FX assembler emulator code (c) Copyright 1998 zsKnight and _Demo_. + * + * DSP1 emulator code (c) Copyright 1998 Ivar, _Demo_ and Gary Henderson. + * C4 asm and some C emulation code (c) Copyright 2000 zsKnight and _Demo_. + * C4 C code (c) Copyright 2001 Gary Henderson (gary.henderson@ntlworld.com). + * + * DOS port code contains the works of other authors. See headers in + * individual files. + * + * Snes9x homepage: http://www.snes9x.com + * + * Permission to use, copy, modify and distribute Snes9x in both binary and + * source form, for non-commercial purposes, is hereby granted without fee, + * providing that this license information and copyright notice appear with + * all copies and any derived work. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event shall the authors be held liable for any damages + * arising from the use of this software. + * + * Snes9x is freeware for PERSONAL USE only. Commercial users should + * seek permission of the copyright holders first. Commercial use includes + * charging money for Snes9x or software derived from Snes9x. + * + * The copyright holders request that bug fixes and improvements to the code + * should be forwarded to them so everyone can benefit from the modifications + * in future versions. + * + * Super NES and Super Nintendo Entertainment System are trademarks of + * Nintendo Co., Limited and its subsidiary companies. + */ +#ifndef _apu_h_ +#define _apu_h_ + +#include "spc700.h" + +/* +typedef union +{ + struct { uint8 A, Y; } B; + uint16 W; +} YAndA; +*/ + +struct SIAPU +{ + uint8 *DirectPage; // 0x00 + uint32 Address; // 0x04 c core only + uint8 *WaitAddress1; // 0x08 + uint8 *WaitAddress2; // 0x0C + uint32 WaitCounter; // 0x10 + uint8 *ShadowRAM; // 0x14 + uint8 *CachedSamples; // 0x18 + uint8 _Carry; // 0x1C c core only + uint8 _Overflow; // 0x1D c core only + uint8 Bit; // 0x1E c core only + uint8 pad0; + uint32 TimerErrorCounter; // 0x20 + uint32 Scanline; // 0x24 + int32 OneCycle; // 0x28 + int32 TwoCycles; // 0x2C + // notaz: reordered and moved everything here, for faster context load/save + uint32 *asmJumpTab; // 0x30 + uint8 *PC; // 0x34 + YAndA YA; // 0x38 0x0000YYAA + uint8 P; // 0x3C flags: NODBHIZC + uint8 pad1; + uint8 pad2; + uint8 _Zero; // 0x3F Z=0, when this!=0; also stores neg flag in &0x80 + uint8 X; // 0x40 + uint8 S; // 0x41 stack pointer, default: 0xff + uint16 pad3; + uint8 *RAM; // 0x44 + uint8 *ExtraRAM; // 0x48 shortcut to APU.ExtraRAM + + uint16 memread_addr; + uint8 memread_data; + uint16 memwrite_addr; + uint8 memwrite_data; + int icount; + uint8 opcode; + uint16 ya_prev; + uint8 x_prev; +}; + +struct SAPU +{ + int32 Cycles; + bool8 ShowROM; + uint8 Flags; + uint8 KeyedChannels; + uint8 OutPorts [4]; + uint8 DSP [0x80]; + uint8 ExtraRAM [64]; + uint16 Timer [3]; + uint16 TimerTarget [3]; + bool8 TimerEnabled [3]; + bool8 TimerValueWritten [3]; +}; + +EXTERN_C struct SAPU APU; +EXTERN_C struct SIAPU IAPU; +EXTERN_C struct SIAPU IAPU2; +EXTERN_C struct SIAPU *pIAPU; + +STATIC inline void S9xAPUUnpackStatus() +{ + IAPU._Zero =((IAPU.P & Zero) == 0) | (IAPU.P & Negative); + IAPU._Carry = (IAPU.P & Carry); + IAPU._Overflow = (IAPU.P & Overflow); +} + +STATIC inline void S9xAPUPackStatus() +{ + IAPU.P &= ~(Zero | Negative | Carry | Overflow); + if(IAPU._Carry) IAPU.P |= Carry; + if(!IAPU._Zero) IAPU.P |= Zero; + if(IAPU._Overflow) IAPU.P |= Overflow; + if(IAPU._Zero & 0x80) IAPU.P |= Negative; +} + +START_EXTERN_C +void S9xResetAPU (void); +bool8 S9xInitAPU (); +void S9xDeinitAPU (); +void S9xDecacheSamples (); +int S9xTraceAPU (); +int S9xAPUOPrint (char *buffer, uint16 Address); +void S9xSetAPUControl (uint8 byte); +void S9xSetAPUDSP (uint8 byte); +uint8 S9xGetAPUDSP (); +void S9xSetAPUTimer (uint16 Address, uint8 byte); +bool8 S9xInitSound (int quality, bool8 stereo, int buffer_size); +void S9xOpenCloseSoundTracingFile (bool8); +void S9xPrintAPUState (); +extern int32 S9xAPUCycles [256]; // Scaled cycle lengths +extern int32 S9xAPUCycleLengths [256]; // Raw data. +extern void (*S9xApuOpcodes [256]) (void); +extern void (*S9xApuOpcodesReal [256]) (void); +void APUCompare(); +END_EXTERN_C + + +#define APU_VOL_LEFT 0x00 +#define APU_VOL_RIGHT 0x01 +#define APU_P_LOW 0x02 +#define APU_P_HIGH 0x03 +#define APU_SRCN 0x04 +#define APU_ADSR1 0x05 +#define APU_ADSR2 0x06 +#define APU_GAIN 0x07 +#define APU_ENVX 0x08 +#define APU_OUTX 0x09 + +#define APU_MVOL_LEFT 0x0c +#define APU_MVOL_RIGHT 0x1c +#define APU_EVOL_LEFT 0x2c +#define APU_EVOL_RIGHT 0x3c +#define APU_KON 0x4c +#define APU_KOFF 0x5c +#define APU_FLG 0x6c +#define APU_ENDX 0x7c + +#define APU_EFB 0x0d +#define APU_PMON 0x2d +#define APU_NON 0x3d +#define APU_EON 0x4d +#define APU_DIR 0x5d +#define APU_ESA 0x6d +#define APU_EDL 0x7d + +#define APU_C0 0x0f +#define APU_C1 0x1f +#define APU_C2 0x2f +#define APU_C3 0x3f +#define APU_C4 0x4f +#define APU_C5 0x5f +#define APU_C6 0x6f +#define APU_C7 0x7f + +#define APU_SOFT_RESET 0x80 +#define APU_MUTE 0x40 +#define APU_ECHO_DISABLED 0x20 + +#define FREQUENCY_MASK 0x3fff +#endif diff --git a/old/spc700/debug/apumem.h b/old/spc700/debug/apumem.h new file mode 100644 index 0000000..b1b5f65 --- /dev/null +++ b/old/spc700/debug/apumem.h @@ -0,0 +1,222 @@ +/* + * Snes9x - Portable Super Nintendo Entertainment System (TM) emulator. + * + * (c) Copyright 1996 - 2001 Gary Henderson (gary.henderson@ntlworld.com) and + * Jerremy Koot (jkoot@snes9x.com) + * + * Super FX C emulator code + * (c) Copyright 1997 - 1999 Ivar (ivar@snes9x.com) and + * Gary Henderson. + * Super FX assembler emulator code (c) Copyright 1998 zsKnight and _Demo_. + * + * DSP1 emulator code (c) Copyright 1998 Ivar, _Demo_ and Gary Henderson. + * C4 asm and some C emulation code (c) Copyright 2000 zsKnight and _Demo_. + * C4 C code (c) Copyright 2001 Gary Henderson (gary.henderson@ntlworld.com). + * + * DOS port code contains the works of other authors. See headers in + * individual files. + * + * Snes9x homepage: http://www.snes9x.com + * + * Permission to use, copy, modify and distribute Snes9x in both binary and + * source form, for non-commercial purposes, is hereby granted without fee, + * providing that this license information and copyright notice appear with + * all copies and any derived work. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event shall the authors be held liable for any damages + * arising from the use of this software. + * + * Snes9x is freeware for PERSONAL USE only. Commercial users should + * seek permission of the copyright holders first. Commercial use includes + * charging money for Snes9x or software derived from Snes9x. + * + * The copyright holders request that bug fixes and improvements to the code + * should be forwarded to them so everyone can benefit from the modifications + * in future versions. + * + * Super NES and Super Nintendo Entertainment System are trademarks of + * Nintendo Co., Limited and its subsidiary companies. + */ +#ifndef _apumemory_h_ +#define _apumemory_h_ + +START_EXTERN_C +extern uint8 W4; +extern uint8 APUROM[64]; +END_EXTERN_C + +// TODO: restore nondebug version + +INLINE uint8 S9xAPUGetByteZ (uint8 Address) +{ + uint8 res = 0; + pIAPU->memread_addr = Address; + + if (Address >= 0xf0 && pIAPU->DirectPage == pIAPU->RAM) + { + if (Address >= 0xf4 && Address <= 0xf7) + { +#ifdef SPC700_SHUTDOWN + pIAPU->WaitAddress2 = pIAPU->WaitAddress1; + pIAPU->WaitAddress1 = pIAPU->PC; +#endif + res = (pIAPU->RAM [Address]); + } + else if (Address >= 0xfd) + { +#ifdef SPC700_SHUTDOWN + pIAPU->WaitAddress2 = pIAPU->WaitAddress1; + pIAPU->WaitAddress1 = pIAPU->PC; +#endif + uint8 t = pIAPU->RAM [Address]; + if(pIAPU != &IAPU) + pIAPU->RAM [Address] = 0; + res = (t); + } + else if (Address == 0xf3) { + res = (S9xGetAPUDSP ()); + } + else res = (pIAPU->RAM [Address]); + } + else + res = (pIAPU->DirectPage [Address]); + + pIAPU->memread_data = res; + return res; +} + +INLINE void S9xAPUSetByteZ (uint8 val, uint8 Address) +{ + pIAPU->memwrite_addr = Address; + pIAPU->memwrite_data = val; + + if(pIAPU == &IAPU) return; + + if (Address >= 0xf0 && pIAPU->DirectPage == pIAPU->RAM) + { + if (Address == 0xf3) + S9xSetAPUDSP (val); + else + if (Address >= 0xf4 && Address <= 0xf7) + APU.OutPorts [Address - 0xf4] = val; + else + if (Address == 0xf1) + S9xSetAPUControl (val); + else + if (Address < 0xfd) + { + pIAPU->RAM [Address] = val; + if (Address >= 0xfa) + { + if (val == 0) + APU.TimerTarget [Address - 0xfa] = 0x100; + else + APU.TimerTarget [Address - 0xfa] = val; + } + } + } + else + pIAPU->DirectPage [Address] = val; +} + +INLINE uint8 S9xAPUGetByte (uint32 Address) +{ + Address &= 0xffff; + uint8 res = 0; + pIAPU->memread_addr = Address; + + if (Address <= 0xff && Address >= 0xf0) + { + if (Address >= 0xf4 && Address <= 0xf7) + { +#ifdef SPC700_SHUTDOWN + pIAPU->WaitAddress2 = pIAPU->WaitAddress1; + pIAPU->WaitAddress1 = pIAPU->PC; +#endif + res = (pIAPU->RAM [Address]); + } + else if (Address == 0xf3) { + res = (S9xGetAPUDSP ()); + } + else if (Address >= 0xfd) + { +#ifdef SPC700_SHUTDOWN + pIAPU->WaitAddress2 = pIAPU->WaitAddress1; + pIAPU->WaitAddress1 = pIAPU->PC; +#endif + uint8 t = pIAPU->RAM [Address]; + if(pIAPU != &IAPU) + pIAPU->RAM [Address] = 0; + res = (t); + } + else res = (pIAPU->RAM [Address]); + } + else + res = (pIAPU->RAM [Address]); + + pIAPU->memread_data = res; + return res; +} + +INLINE void S9xAPUSetByte (uint8 val, uint32 Address) +{ + Address &= 0xffff; + pIAPU->memwrite_addr = Address; + pIAPU->memwrite_data = val; + + if(pIAPU == &IAPU) return; + + if (Address <= 0xff && Address >= 0xf0) + { + if (Address == 0xf3) + S9xSetAPUDSP (val); + else + if (Address >= 0xf4 && Address <= 0xf7) + APU.OutPorts [Address - 0xf4] = val; + else + if (Address == 0xf1) + S9xSetAPUControl (val); + else + if (Address < 0xfd) + { + pIAPU->RAM [Address] = val; + if (Address >= 0xfa) + { + if (val == 0) + APU.TimerTarget [Address - 0xfa] = 0x100; + else + APU.TimerTarget [Address - 0xfa] = val; + } + } + } + else + { +#if 0 +if (Address >= 0x2500 && Address <= 0x2504) +printf ("%06d %04x <- %02x\n", ICPU.Scanline, Address, val); +if (Address == 0x26c6) +{ + extern FILE *apu_trace; + extern FILE *trace; + APU.Flags |= TRACE_FLAG; + CPU.Flags |= TRACE_FLAG; + if (apu_trace == NULL) + apu_trace = fopen ("aputrace.log", "wb"); + if (trace == NULL) + trace = fopen ("trace.log", "wb"); + printf ("TRACING SWITCHED ON\n"); +} +#endif + if (Address < 0xffc0) + pIAPU->RAM [Address] = val; + else + { + APU.ExtraRAM [Address - 0xffc0] = val; + if (!APU.ShowROM) + pIAPU->RAM [Address] = val; + } + } +} + +#endif diff --git a/old/spc700/debug/port.h b/old/spc700/debug/port.h new file mode 100644 index 0000000..dfc3030 --- /dev/null +++ b/old/spc700/debug/port.h @@ -0,0 +1,494 @@ +/* + * Snes9x - Portable Super Nintendo Entertainment System (TM) emulator. + * + * (c) Copyright 1996 - 2001 Gary Henderson (gary.henderson@ntlworld.com) and + * Jerremy Koot (jkoot@snes9x.com) + * + * Super FX C emulator code + * (c) Copyright 1997 - 1999 Ivar (ivar@snes9x.com) and + * Gary Henderson. + * Super FX assembler emulator code (c) Copyright 1998 zsKnight and _Demo_. + * + * DSP1 emulator code (c) Copyright 1998 Ivar, _Demo_ and Gary Henderson. + * C4 asm and some C emulation code (c) Copyright 2000 zsKnight and _Demo_. + * C4 C code (c) Copyright 2001 Gary Henderson (gary.henderson@ntlworld.com). + * + * DOS port code contains the works of other authors. See headers in + * individual files. + * + * Snes9x homepage: http://www.snes9x.com + * + * Permission to use, copy, modify and distribute Snes9x in both binary and + * source form, for non-commercial purposes, is hereby granted without fee, + * providing that this license information and copyright notice appear with + * all copies and any derived work. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event shall the authors be held liable for any damages + * arising from the use of this software. + * + * Snes9x is freeware for PERSONAL USE only. Commercial users should + * seek permission of the copyright holders first. Commercial use includes + * charging money for Snes9x or software derived from Snes9x. + * + * The copyright holders request that bug fixes and improvements to the code + * should be forwarded to them so everyone can benefit from the modifications + * in future versions. + * + * Super NES and Super Nintendo Entertainment System are trademarks of + * Nintendo Co., Limited and its subsidiary companies. + */ +#ifndef _PORT_H_ +#define _PORT_H_ + + +// horrible mess here + +int yo_rand(void); + +#ifdef __SYMBIAN32__ + +// debug +#ifdef __DEBUG_PRINT +#undef printf +extern "C" void dprintf(char *format, ...); +#define printf dprintf +#else +#define printf(x...) +#define dprintf(x...) +#endif + +#include + +#define PIXEL_FORMAT RGB565 +#undef GFX_MULTI_FORMAT + +#ifndef snes9x_types_defined +#define snes9x_types_defined + +typedef unsigned char bool8; +typedef unsigned char uint8; +typedef unsigned short uint16; +typedef signed char int8; +typedef signed short int16; +typedef signed int int32; +typedef unsigned int uint32; +typedef long long int64; // correct? +#endif + +#include "pixform.h" + +#ifndef TRUE +#define TRUE 1 +#endif + +#ifndef FALSE +#define FALSE 0 +#endif + +#if defined(__cplusplus) || defined(c_plusplus) +#define EXTERN_C extern "C" +#define START_EXTERN_C extern "C" { +#define END_EXTERN_C } +#else +#define EXTERN_C extern +#define START_EXTERN_C +#define END_EXTERN_C +#endif + + +#ifndef PATH_MAX +#define PATH_MAX 0x100 // == KMaxFileName +#endif + +/* +#define _MAX_DIR PATH_MAX +#define _MAX_DRIVE 1 +#define _MAX_FNAME PATH_MAX +#define _MAX_EXT 3 +*/ +#define _MAX_PATH PATH_MAX + + +#define ZeroMemory(a,b) memset((a),0,(b)) + +EXTERN_C void S9xGenerateSound (); + +#define SLASH_STR "\\" +#define SLASH_CHAR '\\' + +#define LSB_FIRST +#define STATIC static +#define FASTCALL +#define INLINE inline +#define VOID void +#define PACKING __attribute__ ((packed)) +#define ALIGN_BY_ONE __attribute__ ((aligned (1), packed)) +#define gp32_pause() +#define gm_memset memset +#define CHECK_SOUND() +#define CPU_SHUTDOWN +#define VAR_CYCLES +#define SPC700_C +#define EXECUTE_SUPERFX_PER_LINE +#define OLD_COLOUR_BLENDING +#define _NEWPPU_ +#define gp32_atoi atoi +//#define SPC700_SHUTDOWN // incompatible with ASM_SPC700 +// notaz +//#define ASM_SPC700 +#define SUPER_FX + +#ifndef TITLE +#define TITLE "Snes9x" +#endif + + +#else // __SYMBIAN32__ + + +//#include + +#ifdef __GP32__ + + +//#define __GP32_APUCACHE__ + +#define CHECK_SOUND() + +#define VERSION_MAJOR 0 +#define VERSION_MINOR 3 + +long *gp32_fopen (char *fname,char *mode); +void gp32_fclose (long *s); +long gp32_fread (unsigned char *ptr,long lg,long *s); +long gp32_fwrite (unsigned char *ptr,long lg,long *s); +void gp32_fseek (long position,int ref,long *s); + + +//#undef ZLIB +//#define ZLIB +//#define UNZIP_SUPPORT + + +#define SPC700_SHUTDOWN +#define CPU_SHUTDOWN +#define VAR_CYCLES +#define SPC700_C +//#define ZSNES_C4 +//#define ZSNES_FX +#define EXECUTE_SUPERFX_PER_LINE +//#define THREADCPU + + +//#define NETPLAY_SUPPORT +#define OLD_COLOUR_BLENDING + +#endif // __GP32__ + +#ifndef STORM +#ifdef __GP32__ + +extern "C" +{ +#include "gpdef.h" +#include "gpstdlib.h" +#include "gpgraphic.h" +#include "gpfont.h" +#include "gpmm.h" +#include "gpmem.h" +#include "gpstdio.h" +} + +#undef byte +#undef word +#undef dword +#undef qword + +/*typedef unsigned long bool8_32; +typedef unsigned long uint8_32; +typedef unsigned long uint16_32; +typedef long int8_32; +typedef long int16_32;*/ + +#undef time_t +#define time_t long + +char *gp32_strrchr(char *s, char c); +char gp32_toupper(char c); +char *gp32_strupr(char *s); +char *gp32_strlwr(char *s); +int gp32_memcmp(char *s1,char *s2, int lg); +int gp32_strncmp(char *s1,char *s2, int lg); +int gp32_strcasecmp(const char *s1, const char *s2 ); +int gp32_strncasecmp(const char *s1, const char *s2, unsigned n); +long gp32_time(void); +int gp32_pause(void); +int gp32_atoi(char *s); + +#define malloc gm_malloc +#define free gm_free +#define memcpy gm_memcpy + +#define strcpy gm_strcpy +#define strncpy gm_strncpy +#define strcat gm_strcat +#define memset gm_memset +#define memmove gm_memcpy +#define strlen gm_lstrlen +#define strcmp gm_compare +#define memcmp(a,b,c) gp32_memcmp((char*)a,(char*)b,c) +#define strrchr(a,b) gp32_strrchr((char*)a,(char)b) +#define strncmp(a,b,c) gp32_strncmp((char*)a,(char*)b,(int)c) +#define strlwr gp32_strlwr +//#define atoi gp32_atoi + +#define islower(a) ((a>='a')&&(a<='z')) +#define isdigit(a) ((a>='0')&&(a<='9')) +#define isalpha(a) (((a>='0')&&(a<='9'))||((a>='0')&&(a<='9'))||((a>='A')&&(a<='Z'))) +#define toupper(a) (islower(a)?a+'A'-'a':a) + +#define sprintf gm_sprintf + + + +void gp32_printf(char *a); +void gp32_GpTextOut(unsigned char *buffer,int X,int Y,char *A,int col,int bold); +void gp32_GpTextOutBig(unsigned char *buffer,int X,int Y,char *A,int col,int bold); +#define printf //(a) gp32_printf(a) + +#define strcasecmp gp32_strcasecmp +#define strncasecmp gp32_strncasecmp + +#define time(a) gp32_time() + +#define _NEWPPU_ + +//#define PROFILING + +#ifdef PROFILING +void gp32_profile_start(int a); +void gp32_profile_end(int a); +#define PROF_START(a) gp32_profile_start(a) +#define PROF_END(a) gp32_profile_end(a) +#endif + +#elif defined(__SYMBIAN32__) // /__GP32__ +#include +#else +#include +#include +#endif +#else // #ifndef STORM +#include +#include +#endif + +//#include + +#define PIXEL_FORMAT RGB565 +#undef GFX_MULTI_FORMAT + +#if defined(TARGET_OS_MAC) && TARGET_OS_MAC + +#include "zlib.h" +#define ZLIB +#define EXECUTE_SUPERFX_PER_LINE +#define SOUND +#define VAR_CYCLES +#define CPU_SHUTDOWN +#define SPC700_SHUTDOWN +#define PIXEL_FORMAT RGB555 +#define CHECK_SOUND() +#define M_PI 3.14159265359 +#undef _MAX_PATH + +#undef DEBUGGER // Apple Universal Headers sometimes #define DEBUGGER +#undef GFX_MULTI_FORMAT + +int strncasecmp(const char *s1, const char *s2, unsigned n); +int strcasecmp(const char *s1, const char *s2 ); + +#endif + +#ifndef snes9x_types_defined +#define snes9x_types_defined + +typedef unsigned char bool8; + +#ifndef __WIN32kk__ +typedef unsigned char uint8; +typedef unsigned short uint16; +typedef signed char int8; +typedef signed short int16; +typedef signed int int32; +typedef unsigned int uint32; +#ifdef __GP32__ +typedef signed __int64 int64; +//typedef signed long int64; +#else +typedef long long int64; +#endif +#else // __WIN32kk__ + +#ifdef __BORLANDC__ +#include +#else + +typedef unsigned char uint8; +typedef unsigned short uint16; +typedef signed char int8; +typedef short int16; + +#ifndef WSAAPI +// winsock2.h typedefs int32 as well. +typedef long int32; +#endif + +typedef unsigned int uint32; + +#endif // __BORLANDC__ + +typedef __int64 int64; + +#endif // __WIN32kk__ +#endif // snes9x_types_defined +#include "pixform.h" + +#ifndef TRUE +#define TRUE 1 +#endif + +#ifndef FALSE +#define FALSE 0 +#endif + +#ifdef STORM +#define EXTERN_C +#define START_EXTERN_C +#define END_EXTERN_C +#else +#if defined(__cplusplus) || defined(c_plusplus) +#define EXTERN_C extern "C" +#define START_EXTERN_C extern "C" { +#define END_EXTERN_C } +#else +#define EXTERN_C extern +#define START_EXTERN_C +#define END_EXTERN_C +#endif +#endif + +#ifndef __WIN32kk__ + +#ifndef PATH_MAX +#define PATH_MAX 1024 +#endif + +#define _MAX_DIR PATH_MAX +#define _MAX_DRIVE 1 +#define _MAX_FNAME PATH_MAX +#define _MAX_EXT PATH_MAX +#define _MAX_PATH PATH_MAX + +#define ZeroMemory(a,b) memset((a),0,(b)) + +#ifndef __WIN32__ +void _makepath (char *path, const char *drive, const char *dir, const char *fname, const char *ext); +void _splitpath (const char *path, char *drive, char *dir, char *fname, char *ext); +#endif + +#else // __WIN32kk__ +#define strcasecmp stricmp +#define strncasecmp strnicmp +#endif + +EXTERN_C void S9xGenerateSound (); + +#ifdef STORM +EXTERN_C int soundsignal; +EXTERN_C void MixSound(void); +//Yes, CHECK_SOUND is getting defined correctly! +#define CHECK_SOUND if (Settings.APUEnabled) if(SetSignalPPC(0L, soundsignal) & soundsignal) MixSound +#else +#ifndef __GP32__ +#define CHECK_SOUND() +#endif +#endif + +#if defined (__DJGPP)||defined(__GP32__) +#define SLASH_STR "\\" +#define SLASH_CHAR '\\' +#else +#define SLASH_STR "/" +#define SLASH_CHAR '/' +#endif + +#ifdef __linux +typedef void (*SignalHandler)(int); +#define SIG_PF SignalHandler +#endif + +#if defined(__i386__) || defined(__i486__) || defined(__i586__) || \ + defined(__WIN32kk__) || defined(__alpha__) +#define LSB_FIRST +#define FAST_LSB_WORD_ACCESS +#define PACKING +#define ALIGN_BY_ONE + +#else + +#ifdef __GP32__ +#define LSB_FIRST +#define STATIC static +#define FASTCALL +#define INLINE inline +#define VOID void +#else +// must be gp2x +#define LSB_FIRST +#define STATIC static +#define FASTCALL +#define INLINE inline +#define VOID void +#define PACKING __attribute__ ((packed)) +#define ALIGN_BY_ONE __attribute__ ((aligned (1), packed)) +#define gp32_pause() +#define gm_memset memset +#define CHECK_SOUND() +#define VERSION_MAJOR 0 +#define VERSION_MINOR 3 +#define SPC700_SHUTDOWN +#define CPU_SHUTDOWN +#define VAR_CYCLES +#define SPC700_C +#define EXECUTE_SUPERFX_PER_LINE +#define OLD_COLOUR_BLENDING +#define _NEWPPU_ +#define gp32_atoi atoi +#endif + +#endif + +#ifdef __sun +#define TITLE "Snes9X: Solaris" +#endif + +#ifdef __linux +#define TITLE "Snes9X: Linux" +#endif + +#ifndef TITLE +#define TITLE "Snes9x" +#endif + +#ifdef STORM +#define STATIC +#define strncasecmp strnicmp +#else +#define STATIC static +#endif + +#endif // !defined(__SYMBIAN32__) + +#endif // _PORT_H_ diff --git a/old/spc700/debug/spc700.cpp b/old/spc700/debug/spc700.cpp new file mode 100644 index 0000000..5ab21ab --- /dev/null +++ b/old/spc700/debug/spc700.cpp @@ -0,0 +1,2600 @@ +/* + * Snes9x - Portable Super Nintendo Entertainment System (TM) emulator. + * + * (c) Copyright 1996 - 2001 Gary Henderson (gary.henderson@ntlworld.com) and + * Jerremy Koot (jkoot@snes9x.com) + * + * Super FX C emulator code + * (c) Copyright 1997 - 1999 Ivar (ivar@snes9x.com) and + * Gary Henderson. + * Super FX assembler emulator code (c) Copyright 1998 zsKnight and _Demo_. + * + * DSP1 emulator code (c) Copyright 1998 Ivar, _Demo_ and Gary Henderson. + * C4 asm and some C emulation code (c) Copyright 2000 zsKnight and _Demo_. + * C4 C code (c) Copyright 2001 Gary Henderson (gary.henderson@ntlworld.com). + * + * DOS port code contains the works of other authors. See headers in + * individual files. + * + * Snes9x homepage: http://www.snes9x.com + * + * Permission to use, copy, modify and distribute Snes9x in both binary and + * source form, for non-commercial purposes, is hereby granted without fee, + * providing that this license information and copyright notice appear with + * all copies and any derived work. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event shall the authors be held liable for any damages + * arising from the use of this software. + * + * Snes9x is freeware for PERSONAL USE only. Commercial users should + * seek permission of the copyright holders first. Commercial use includes + * charging money for Snes9x or software derived from Snes9x. + * + * The copyright holders request that bug fixes and improvements to the code + * should be forwarded to them so everyone can benefit from the modifications + * in future versions. + * + * Super NES and Super Nintendo Entertainment System are trademarks of + * Nintendo Co., Limited and its subsidiary companies. + */ +#include "snes9x.h" +#include "memmap.h" +#include "display.h" +#include "cpuexec.h" +#include "apu.h" +#include "spc700.h" + +// SPC700/Sound DSP chips have a 24.57MHz crystal on their PCB. + +//#if defined(ASM_SPC700) +extern "C" { +uint8 S9xAPUGetByteZ (uint8 address); +uint8 S9xAPUGetByte (uint32 address); +void S9xAPUSetByteZ (uint8, uint8 address); +void S9xAPUSetByte (uint8, uint32 address); +} +/* +#elif defined(NO_INLINE_SET_GET) +uint8 S9xAPUGetByteZ (uint8 address); +uint8 S9xAPUGetByte (uint32 address); +void S9xAPUSetByteZ (uint8, uint8 address); +void S9xAPUSetByte (uint8, uint32 address); + +#else +#undef INLINE +#define INLINE inline +#include "apumem.h" +#endif +*/ + +START_EXTERN_C +extern uint8 Work8; +extern uint16 Work16; +extern uint32 Work32; +extern signed char Int8; +extern short Int16; +extern long Int32; +extern short Int16; +extern uint8 W1; +extern uint8 W2; + +END_EXTERN_C + +#define OP1 (*(pIAPU->PC + 1)) +#define OP2 (*(pIAPU->PC + 2)) + +#ifdef SPC700_SHUTDOWN +#define APUShutdown() \ + if (Settings.Shutdown && (pIAPU->PC == pIAPU->WaitAddress1 || pIAPU->PC == pIAPU->WaitAddress2)) \ + { \ + if (pIAPU->WaitCounter == 0) \ + { \ + if (!ICPU.CPUExecuting) \ + CPU.APU_Cycles = CPU.Cycles = CPU.NextEvent; \ + else \ + CPU.APU_APUExecuting = FALSE; \ + } \ + else \ + if (pIAPU->WaitCounter >= 2) \ + pIAPU->WaitCounter = 1; \ + else \ + pIAPU->WaitCounter--; \ + } +#else +#define APUShutdown() +#endif + +#define APUSetZN8(b)\ + pIAPU->_Zero = (b); + +#define APUSetZN16(w)\ + pIAPU->_Zero = ((w) != 0) | ((w) >> 8); + +void STOP (char *s) +{ + char buffer[100]; + +#ifdef DEBUGGER + S9xAPUOPrint (buffer, pIAPU->PC - pIAPU->RAM); +#endif + + sprintf (String, "Sound CPU in unknown state executing %s at %04lX\n%s\n", s, pIAPU->PC - pIAPU->RAM, buffer); + S9xMessage (S9X_ERROR, S9X_APU_STOPPED, String); + APU.TimerEnabled[0] = APU.TimerEnabled[1] = APU.TimerEnabled[2] = FALSE; + CPU.APU_APUExecuting = FALSE; + +#ifdef DEBUGGER + CPU.Flags |= DEBUG_MODE_FLAG; +#else + S9xExit (); +#endif +} + +#define TCALL(n)\ +{\ + PushW ((pIAPU->PC - pIAPU->RAM + 1)); \ + pIAPU->PC = pIAPU->RAM + (APU.ExtraRAM [((15 - n) << 1)] + \ + (APU.ExtraRAM [((15 - n) << 1) + 1] << 8)); \ +} + +// XXX: HalfCarry - BJ fixed? +#define SBC(a,b)\ +Int16 = (short) (a) - (short) (b) + (short) (APUCheckCarry ()) - 1;\ +pIAPU->_Carry = Int16 >= 0;\ +if ((((a) ^ (b)) & 0x80) && (((a) ^ (uint8) Int16) & 0x80))\ + APUSetOverflow ();\ +else \ + APUClearOverflow (); \ +APUSetHalfCarry ();\ +if(((a) ^ (b) ^ (uint8) Int16) & 0x10)\ + APUClearHalfCarry ();\ +(a) = (uint8) Int16;\ +APUSetZN8 ((uint8) Int16); + +// XXX: HalfCarry - BJ fixed? +#define ADC(a,b)\ +Work16 = (a) + (b) + APUCheckCarry();\ +pIAPU->_Carry = Work16 >= 0x100; \ +if (~((a) ^ (b)) & ((b) ^ (uint8) Work16) & 0x80)\ + APUSetOverflow ();\ +else \ + APUClearOverflow (); \ +APUClearHalfCarry ();\ +/*if(((a) ^ (b) ^ (uint8) Int16) & 0x10) notaz: Int16!? */\ +if(((a) ^ (b) ^ (uint8) Work16) & 0x10)\ + APUSetHalfCarry ();\ +(a) = (uint8) Work16;\ +APUSetZN8 ((uint8) Work16); + +#define CMP(a,b)\ +Int16 = (short) (a) - (short) (b);\ +pIAPU->_Carry = Int16 >= 0;\ +APUSetZN8 ((uint8) Int16); + +#define ASL(b)\ + pIAPU->_Carry = ((b) & 0x80) != 0; \ + (b) <<= 1;\ + APUSetZN8 (b); +#define LSR(b)\ + pIAPU->_Carry = (b) & 1;\ + (b) >>= 1;\ + APUSetZN8 (b); +#define ROL(b)\ + Work16 = ((b) << 1) | APUCheckCarry (); \ + pIAPU->_Carry = Work16 >= 0x100; \ + (b) = (uint8) Work16; \ + APUSetZN8 (b); +#define ROR(b)\ + Work16 = (b) | ((uint16) APUCheckCarry () << 8); \ + pIAPU->_Carry = (uint8) Work16 & 1; \ + Work16 >>= 1; \ + (b) = (uint8) Work16; \ + APUSetZN8 (b); + +#define Push(b)\ + *(pIAPU->RAM + 0x100 + pIAPU->S) = b;\ + pIAPU->S--; + +#define Pop(b)\ + pIAPU->S++;\ + (b) = *(pIAPU->RAM + 0x100 + pIAPU->S); + +#ifdef FAST_LSB_WORD_ACCESS +#define PushW(w)\ + *(uint16 *) (pIAPU->RAM + 0xff + pIAPU->S) = w;\ + pIAPU->S -= 2; +#define PopW(w)\ + pIAPU->S += 2;\ + w = *(uint16 *) (pIAPU->RAM + 0xff + pIAPU->S); +#else +#define PushW(w)\ + *(pIAPU->RAM + 0xff + pIAPU->S) = w;\ + *(pIAPU->RAM + 0x100 + pIAPU->S) = (w >> 8);\ + pIAPU->S -= 2; +#define PopW(w)\ + pIAPU->S += 2; \ + (w) = *(pIAPU->RAM + 0xff + pIAPU->S) + (*(pIAPU->RAM + 0x100 + pIAPU->S) << 8); +#endif + +#define Relative()\ + Int8 = OP1;\ + Int16 = (int) (pIAPU->PC + 2 - pIAPU->RAM) + Int8; + +#define Relative2()\ + Int8 = OP2;\ + Int16 = (int) (pIAPU->PC + 3 - pIAPU->RAM) + Int8; + +#ifdef FAST_LSB_WORD_ACCESS +#define IndexedXIndirect()\ + pIAPU->Address = *(uint16 *) (pIAPU->DirectPage + ((OP1 + pIAPU->X) & 0xff)); + +#define Absolute()\ + pIAPU->Address = *(uint16 *) (pIAPU->PC + 1); + +#define AbsoluteX()\ + pIAPU->Address = *(uint16 *) (pIAPU->PC + 1) + pIAPU->X; + +#define AbsoluteY()\ + pIAPU->Address = *(uint16 *) (pIAPU->PC + 1) + pIAPU->YA.B.Y; + +#define MemBit()\ + pIAPU->Address = *(uint16 *) (pIAPU->PC + 1);\ + pIAPU->Bit = (uint8)(pIAPU->Address >> 13);\ + pIAPU->Address &= 0x1fff; + +#define IndirectIndexedY()\ + pIAPU->Address = *(uint16 *) (pIAPU->DirectPage + OP1) + pIAPU->YA.B.Y; +#else +#define IndexedXIndirect()\ + pIAPU->Address = *(pIAPU->DirectPage + ((OP1 + pIAPU->X) & 0xff)) + \ + (*(pIAPU->DirectPage + ((OP1 + pIAPU->X + 1) & 0xff)) << 8); +#define Absolute()\ + pIAPU->Address = OP1 + (OP2 << 8); + +#define AbsoluteX()\ + pIAPU->Address = OP1 + (OP2 << 8) + pIAPU->X; + +#define AbsoluteY()\ + pIAPU->Address = OP1 + (OP2 << 8) + pIAPU->YA.B.Y; + +#define MemBit()\ + pIAPU->Address = OP1 + (OP2 << 8);\ + pIAPU->Bit = (int8) (pIAPU->Address >> 13);\ + pIAPU->Address &= 0x1fff; + +#define IndirectIndexedY()\ + pIAPU->Address = *(pIAPU->DirectPage + OP1) + \ + (*(pIAPU->DirectPage + OP1 + 1) << 8) + \ + pIAPU->YA.B.Y; +#endif + +void Apu00 () +{ +// NOP + pIAPU->PC++; +} + +void Apu01 () { TCALL (0) } + +void Apu11 () { TCALL (1) } + +void Apu21 () { TCALL (2) } + +void Apu31 () { TCALL (3) } + +void Apu41 () { TCALL (4) } + +void Apu51 () { TCALL (5) } + +void Apu61 () { TCALL (6) } + +void Apu71 () { TCALL (7) } + +void Apu81 () { TCALL (8) } + +void Apu91 () { TCALL (9) } + +void ApuA1 () { TCALL (10) } + +void ApuB1 () { TCALL (11) } + +void ApuC1 () { TCALL (12) } + +void ApuD1 () { TCALL (13) } + +void ApuE1 () { TCALL (14) } + +void ApuF1 () { TCALL (15) } + +void Apu3F () // CALL absolute +{ + Absolute (); + // 0xB6f for Star Fox 2 + PushW ((pIAPU->PC + 3 - pIAPU->RAM)); + pIAPU->PC = pIAPU->RAM + pIAPU->Address; +} + +void Apu4F () // PCALL $XX +{ + Work8 = OP1; + PushW ((pIAPU->PC + 2 - pIAPU->RAM)); + pIAPU->PC = pIAPU->RAM + 0xff00 + Work8; +} + +#define SET(b) \ +S9xAPUSetByteZ ((uint8) (S9xAPUGetByteZ (OP1 ) | (1 << (b))), OP1); \ +pIAPU->PC += 2 + +void Apu02 () +{ + SET (0); +} + +void Apu22 () +{ + SET (1); +} + +void Apu42 () +{ + SET (2); +} + +void Apu62 () +{ + SET (3); +} + +void Apu82 () +{ + SET (4); +} + +void ApuA2 () +{ + SET (5); +} + +void ApuC2 () +{ + SET (6); +} + +void ApuE2 () +{ + SET (7); +} + +#define CLR(b) \ +S9xAPUSetByteZ ((uint8) (S9xAPUGetByteZ (OP1) & ~(1 << (b))), OP1); \ +pIAPU->PC += 2; + +void Apu12 () +{ + CLR (0); +} + +void Apu32 () +{ + CLR (1); +} + +void Apu52 () +{ + CLR (2); +} + +void Apu72 () +{ + CLR (3); +} + +void Apu92 () +{ + CLR (4); +} + +void ApuB2 () +{ + CLR (5); +} + +void ApuD2 () +{ + CLR (6); +} + +void ApuF2 () +{ + CLR (7); +} + +#define BBS(b) \ +Work8 = OP1; \ +Relative2 (); \ +if (S9xAPUGetByteZ (Work8) & (1 << (b))) \ +{ \ + pIAPU->PC = pIAPU->RAM + (uint16) Int16; \ + CPU.APU_Cycles += pIAPU->TwoCycles; \ +} \ +else \ + pIAPU->PC += 3 + +void Apu03 () +{ + BBS (0); +} + +void Apu23 () +{ + BBS (1); +} + +void Apu43 () +{ + BBS (2); +} + +void Apu63 () +{ + BBS (3); +} + +void Apu83 () +{ + BBS (4); +} + +void ApuA3 () +{ + BBS (5); +} + +void ApuC3 () +{ + BBS (6); +} + +void ApuE3 () +{ + BBS (7); +} + +#define BBC(b) \ +Work8 = OP1; \ +Relative2 (); \ +if (!(S9xAPUGetByteZ (Work8) & (1 << (b)))) \ +{ \ + pIAPU->PC = pIAPU->RAM + (uint16) Int16; \ + CPU.APU_Cycles += pIAPU->TwoCycles; \ +} \ +else \ + pIAPU->PC += 3 + +void Apu13 () +{ + BBC (0); +} + +void Apu33 () +{ + BBC (1); +} + +void Apu53 () +{ + BBC (2); +} + +void Apu73 () +{ + BBC (3); +} + +void Apu93 () +{ + BBC (4); +} + +void ApuB3 () +{ + BBC (5); +} + +void ApuD3 () +{ + BBC (6); +} + +void ApuF3 () +{ + BBC (7); +} + +void Apu04 () +{ +// OR A,dp + pIAPU->YA.B.A |= S9xAPUGetByteZ (OP1); + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC += 2; +} + +void Apu05 () +{ +// OR A,abs + Absolute (); + pIAPU->YA.B.A |= S9xAPUGetByte (pIAPU->Address); + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC += 3; +} + +void Apu06 () +{ +// OR A,(X) + pIAPU->YA.B.A |= S9xAPUGetByteZ (pIAPU->X); + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC++; +} + +void Apu07 () +{ +// OR A,(dp+X) + IndexedXIndirect (); + pIAPU->YA.B.A |= S9xAPUGetByte (pIAPU->Address); + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC += 2; +} + +void Apu08 () +{ +// OR A,#00 + pIAPU->YA.B.A |= OP1; + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC += 2; +} + +void Apu09 () +{ +// OR dp(dest),dp(src) + Work8 = S9xAPUGetByteZ (OP1); + Work8 |= S9xAPUGetByteZ (OP2); + S9xAPUSetByteZ (Work8, OP2); + APUSetZN8 (Work8); + pIAPU->PC += 3; +} + +void Apu14 () +{ +// OR A,dp+X + pIAPU->YA.B.A |= S9xAPUGetByteZ (OP1 + pIAPU->X); + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC += 2; +} + +void Apu15 () +{ +// OR A,abs+X + AbsoluteX (); + pIAPU->YA.B.A |= S9xAPUGetByte (pIAPU->Address); + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC += 3; +} + +void Apu16 () +{ +// OR A,abs+Y + AbsoluteY (); + pIAPU->YA.B.A |= S9xAPUGetByte (pIAPU->Address); + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC += 3; +} + +void Apu17 () +{ +// OR A,(dp)+Y + IndirectIndexedY (); + pIAPU->YA.B.A |= S9xAPUGetByte (pIAPU->Address); + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC += 2; +} + +void Apu18 () +{ +// OR dp,#00 + Work8 = OP1; + Work8 |= S9xAPUGetByteZ (OP2); + S9xAPUSetByteZ (Work8, OP2); + APUSetZN8 (Work8); + pIAPU->PC += 3; +} + +void Apu19 () +{ +// OR (X),(Y) + Work8 = S9xAPUGetByteZ (pIAPU->X) | S9xAPUGetByteZ (pIAPU->YA.B.Y); + APUSetZN8 (Work8); + S9xAPUSetByteZ (Work8, pIAPU->X); + pIAPU->PC++; +} + +void Apu0A () +{ +// OR1 C,membit + MemBit (); + if (!APUCheckCarry ()) + { + if (S9xAPUGetByte (pIAPU->Address) & (1 << pIAPU->Bit)) + APUSetCarry (); + } + pIAPU->PC += 3; +} + +void Apu2A () +{ +// OR1 C,not membit + MemBit (); + if (!APUCheckCarry ()) + { + if (!(S9xAPUGetByte (pIAPU->Address) & (1 << pIAPU->Bit))) + APUSetCarry (); + } + pIAPU->PC += 3; +} + +void Apu4A () +{ +// AND1 C,membit + MemBit (); + if (APUCheckCarry ()) + { + if (!(S9xAPUGetByte (pIAPU->Address) & (1 << pIAPU->Bit))) + APUClearCarry (); + } + pIAPU->PC += 3; +} + +void Apu6A () +{ +// AND1 C, not membit + MemBit (); + if (APUCheckCarry ()) + { + if ((S9xAPUGetByte (pIAPU->Address) & (1 << pIAPU->Bit))) + APUClearCarry (); + } + pIAPU->PC += 3; +} + +void Apu8A () +{ +// EOR1 C, membit + MemBit (); + if (APUCheckCarry ()) + { + if (S9xAPUGetByte (pIAPU->Address) & (1 << pIAPU->Bit)) + APUClearCarry (); + } + else + { + if (S9xAPUGetByte (pIAPU->Address) & (1 << pIAPU->Bit)) + APUSetCarry (); + } + pIAPU->PC += 3; +} + +void ApuAA () +{ +// MOV1 C,membit + MemBit (); + if (S9xAPUGetByte (pIAPU->Address) & (1 << pIAPU->Bit)) + APUSetCarry (); + else + APUClearCarry (); + pIAPU->PC += 3; +} + +void ApuCA () +{ +// MOV1 membit,C + MemBit (); + if (APUCheckCarry ()) + { + S9xAPUSetByte (S9xAPUGetByte (pIAPU->Address) | (1 << pIAPU->Bit), pIAPU->Address); + } + else + { + S9xAPUSetByte (S9xAPUGetByte (pIAPU->Address) & ~(1 << pIAPU->Bit), pIAPU->Address); + } + pIAPU->PC += 3; +} + +void ApuEA () +{ +// NOT1 membit + MemBit (); + S9xAPUSetByte (S9xAPUGetByte (pIAPU->Address) ^ (1 << pIAPU->Bit), pIAPU->Address); + pIAPU->PC += 3; +} + +void Apu0B () +{ +// ASL dp + Work8 = S9xAPUGetByteZ (OP1); + ASL (Work8); + S9xAPUSetByteZ (Work8, OP1); + pIAPU->PC += 2; +} + +void Apu0C () +{ +// ASL abs + Absolute (); + Work8 = S9xAPUGetByte (pIAPU->Address); + ASL (Work8); + S9xAPUSetByte (Work8, pIAPU->Address); + pIAPU->PC += 3; +} + +void Apu1B () +{ +// ASL dp+X + Work8 = S9xAPUGetByteZ (OP1 + pIAPU->X); + ASL (Work8); + S9xAPUSetByteZ (Work8, OP1 + pIAPU->X); + pIAPU->PC += 2; +} + +void Apu1C () +{ +// ASL A + ASL (pIAPU->YA.B.A); + pIAPU->PC++; +} + +void Apu0D () +{ +// PUSH PSW + S9xAPUPackStatus (); + Push (pIAPU->P); + pIAPU->PC++; +} + +void Apu2D () +{ +// PUSH A + Push (pIAPU->YA.B.A); + pIAPU->PC++; +} + +void Apu4D () +{ +// PUSH X + Push (pIAPU->X); + pIAPU->PC++; +} + +void Apu6D () +{ +// PUSH Y + Push (pIAPU->YA.B.Y); + pIAPU->PC++; +} + +void Apu8E () +{ +// POP PSW + Pop (pIAPU->P); + S9xAPUUnpackStatus (); + if (APUCheckDirectPage ()) + pIAPU->DirectPage = pIAPU->RAM + 0x100; + else + pIAPU->DirectPage = pIAPU->RAM; + pIAPU->PC++; +} + +void ApuAE () +{ +// POP A + Pop (pIAPU->YA.B.A); + pIAPU->PC++; +} + +void ApuCE () +{ +// POP X + Pop (pIAPU->X); + pIAPU->PC++; +} + +void ApuEE () +{ +// POP Y + Pop (pIAPU->YA.B.Y); + pIAPU->PC++; +} + +void Apu0E () +{ +// TSET1 abs + Absolute (); + Work8 = S9xAPUGetByte (pIAPU->Address); + S9xAPUSetByte (Work8 | pIAPU->YA.B.A, pIAPU->Address); + Work8 &= pIAPU->YA.B.A; + APUSetZN8 (Work8); + pIAPU->PC += 3; +} + +void Apu4E () +{ +// TCLR1 abs + Absolute (); + Work8 = S9xAPUGetByte (pIAPU->Address); + S9xAPUSetByte (Work8 & ~pIAPU->YA.B.A, pIAPU->Address); + Work8 &= pIAPU->YA.B.A; + APUSetZN8 (Work8); + pIAPU->PC += 3; +} + +void Apu0F () +{ +// BRK + +#if 0 + STOP ("BRK"); +#else + PushW ((pIAPU->PC + 1 - pIAPU->RAM)); + S9xAPUPackStatus (); + Push (pIAPU->P); + APUSetBreak (); + APUClearInterrupt (); +// XXX:Where is the BRK vector ??? + pIAPU->PC = pIAPU->RAM + APU.ExtraRAM[0x20] + (APU.ExtraRAM[0x21] << 8); +#endif +} + +void ApuEF () +{ +// SLEEP + // XXX: sleep + // STOP ("SLEEP"); + CPU.APU_APUExecuting = FALSE; + pIAPU->PC++; +} + +void ApuFF () +{ +// STOP + // STOP ("STOP"); + CPU.APU_APUExecuting = FALSE; + pIAPU->PC++; +} + +void Apu10 () +{ +// BPL + Relative (); + if (!APUCheckNegative ()) + { + pIAPU->PC = pIAPU->RAM + (uint16) Int16; + CPU.APU_Cycles += pIAPU->TwoCycles; + APUShutdown (); + } + else + pIAPU->PC += 2; +} + +void Apu30 () +{ +// BMI + Relative (); + if (APUCheckNegative ()) + { + pIAPU->PC = pIAPU->RAM + (uint16) Int16; + CPU.APU_Cycles += pIAPU->TwoCycles; + APUShutdown (); + } + else + pIAPU->PC += 2; +} + +void Apu90 () +{ +// BCC + Relative (); + if (!APUCheckCarry ()) + { + pIAPU->PC = pIAPU->RAM + (uint16) Int16; + CPU.APU_Cycles += pIAPU->TwoCycles; + APUShutdown (); + } + else + pIAPU->PC += 2; +} + +void ApuB0 () +{ +// BCS + Relative (); + if (APUCheckCarry ()) + { + pIAPU->PC = pIAPU->RAM + (uint16) Int16; + CPU.APU_Cycles += pIAPU->TwoCycles; + APUShutdown (); + } + else + pIAPU->PC += 2; +} + +void ApuD0 () +{ +// BNE + Relative (); + if (!APUCheckZero ()) + { + pIAPU->PC = pIAPU->RAM + (uint16) Int16; + CPU.APU_Cycles += pIAPU->TwoCycles; + APUShutdown (); + } + else + pIAPU->PC += 2; +} + +void ApuF0 () +{ +// BEQ + Relative (); + if (APUCheckZero ()) + { + pIAPU->PC = pIAPU->RAM + (uint16) Int16; + CPU.APU_Cycles += pIAPU->TwoCycles; + APUShutdown (); + } + else + pIAPU->PC += 2; +} + +void Apu50 () +{ +// BVC + Relative (); + if (!APUCheckOverflow ()) + { + pIAPU->PC = pIAPU->RAM + (uint16) Int16; + CPU.APU_Cycles += pIAPU->TwoCycles; + } + else + pIAPU->PC += 2; +} + +void Apu70 () +{ +// BVS + Relative (); + if (APUCheckOverflow ()) + { + pIAPU->PC = pIAPU->RAM + (uint16) Int16; + CPU.APU_Cycles += pIAPU->TwoCycles; + } + else + pIAPU->PC += 2; +} + +void Apu2F () +{ +// BRA + Relative (); + pIAPU->PC = pIAPU->RAM + (uint16) Int16; +} + +void Apu80 () +{ +// SETC + APUSetCarry (); + pIAPU->PC++; +} + +void ApuED () +{ +// NOTC + pIAPU->_Carry ^= 1; + pIAPU->PC++; +} + +void Apu40 () +{ +// SETP + APUSetDirectPage (); + pIAPU->DirectPage = pIAPU->RAM + 0x100; + pIAPU->PC++; +} + +void Apu1A () +{ +// DECW dp + Work16 = S9xAPUGetByteZ (OP1) + (S9xAPUGetByteZ (OP1 + 1) << 8); + Work16--; + S9xAPUSetByteZ ((uint8) Work16, OP1); + S9xAPUSetByteZ (Work16 >> 8, OP1 + 1); + APUSetZN16 (Work16); + pIAPU->PC += 2; +} + +void Apu5A () +{ +// CMPW YA,dp + Work16 = S9xAPUGetByteZ (OP1) + (S9xAPUGetByteZ (OP1 + 1) << 8); + Int32 = (long) pIAPU->YA.W - (long) Work16; + pIAPU->_Carry = Int32 >= 0; + APUSetZN16 ((uint16) Int32); + pIAPU->PC += 2; +} + +void Apu3A () +{ +// INCW dp + Work16 = S9xAPUGetByteZ (OP1) + (S9xAPUGetByteZ (OP1 + 1) << 8); + Work16++; + S9xAPUSetByteZ ((uint8) Work16, OP1); + S9xAPUSetByteZ (Work16 >> 8, OP1 + 1); + APUSetZN16 (Work16); + pIAPU->PC += 2; +} + +// XXX: HalfCarry - BJ Fixed? Or is it between bits 7 and 8 for ADDW/SUBW? +void Apu7A () +{ +// ADDW YA,dp + Work16 = S9xAPUGetByteZ (OP1) + (S9xAPUGetByteZ (OP1 + 1) << 8); + Work32 = (uint32) pIAPU->YA.W + Work16; + pIAPU->_Carry = Work32 >= 0x10000; + if (~(pIAPU->YA.W ^ Work16) & (Work16 ^ (uint16) Work32) & 0x8000) + APUSetOverflow (); + else + APUClearOverflow (); + APUClearHalfCarry (); + if((pIAPU->YA.W ^ Work16 ^ (uint16) Work32) & 0x10) + APUSetHalfCarry (); + pIAPU->YA.W = (uint16) Work32; + APUSetZN16 (pIAPU->YA.W); + pIAPU->PC += 2; +} + +// XXX: BJ: i think the old HalfCarry behavior was wrong... +// XXX: Or is it between bits 7 and 8 for ADDW/SUBW? +void Apu9A () +{ +// SUBW YA,dp + Work16 = S9xAPUGetByteZ (OP1) + (S9xAPUGetByteZ (OP1 + 1) << 8); + Int32 = (long) pIAPU->YA.W - (long) Work16; + APUClearHalfCarry (); + pIAPU->_Carry = Int32 >= 0; + if (((pIAPU->YA.W ^ Work16) & 0x8000) && + ((pIAPU->YA.W ^ (uint16) Int32) & 0x8000)) + APUSetOverflow (); + else + APUClearOverflow (); +// if (((pIAPU->YA.W ^ Work16) & 0x0080) && +// ((pIAPU->YA.W ^ (uint16) Int32) & 0x0080)) +// APUSetHalfCarry (); // notaz: strange here + APUSetHalfCarry (); +// if((pIAPU->YA.W ^ Work16 ^ (uint16) Work32) & 0x10) // notaz: Work32?! + if((pIAPU->YA.W ^ Work16 ^ (uint16) Int32) & 0x10) + APUClearHalfCarry (); + pIAPU->YA.W = (uint16) Int32; + APUSetZN16 (pIAPU->YA.W); + pIAPU->PC += 2; +} + +void ApuBA () +{ +// MOVW YA,dp + pIAPU->YA.B.A = S9xAPUGetByteZ (OP1); + pIAPU->YA.B.Y = S9xAPUGetByteZ (OP1 + 1); + APUSetZN16 (pIAPU->YA.W); + pIAPU->PC += 2; +} + +void ApuDA () +{ +// MOVW dp,YA + S9xAPUSetByteZ (pIAPU->YA.B.A, OP1); + S9xAPUSetByteZ (pIAPU->YA.B.Y, OP1 + 1); + pIAPU->PC += 2; +} + +void Apu64 () +{ +// CMP A,dp + Work8 = S9xAPUGetByteZ (OP1); + CMP (pIAPU->YA.B.A, Work8); + pIAPU->PC += 2; +} + +void Apu65 () +{ +// CMP A,abs + Absolute (); + Work8 = S9xAPUGetByte (pIAPU->Address); + CMP (pIAPU->YA.B.A, Work8); + pIAPU->PC += 3; +} + +void Apu66 () +{ +// CMP A,(X) + Work8 = S9xAPUGetByteZ (pIAPU->X); + CMP (pIAPU->YA.B.A, Work8); + pIAPU->PC++; +} + +void Apu67 () +{ +// CMP A,(dp+X) + IndexedXIndirect (); + Work8 = S9xAPUGetByte (pIAPU->Address); + CMP (pIAPU->YA.B.A, Work8); + pIAPU->PC += 2; +} + +void Apu68 () +{ +// CMP A,#00 + Work8 = OP1; + CMP (pIAPU->YA.B.A, Work8); + pIAPU->PC += 2; +} + +void Apu69 () +{ +// CMP dp(dest), dp(src) + W1 = S9xAPUGetByteZ (OP1); + Work8 = S9xAPUGetByteZ (OP2); + CMP (Work8, W1); + pIAPU->PC += 3; +} + +void Apu74 () +{ +// CMP A, dp+X + Work8 = S9xAPUGetByteZ (OP1 + pIAPU->X); + CMP (pIAPU->YA.B.A, Work8); + pIAPU->PC += 2; +} + +void Apu75 () +{ +// CMP A,abs+X + AbsoluteX (); + Work8 = S9xAPUGetByte (pIAPU->Address); + CMP (pIAPU->YA.B.A, Work8); + pIAPU->PC += 3; +} + +void Apu76 () +{ +// CMP A, abs+Y + AbsoluteY (); + Work8 = S9xAPUGetByte (pIAPU->Address); + CMP (pIAPU->YA.B.A, Work8); + pIAPU->PC += 3; +} + +void Apu77 () +{ +// CMP A,(dp)+Y + IndirectIndexedY (); + Work8 = S9xAPUGetByte (pIAPU->Address); + CMP (pIAPU->YA.B.A, Work8); + pIAPU->PC += 2; +} + +void Apu78 () +{ +// CMP dp,#00 + Work8 = OP1; + W1 = S9xAPUGetByteZ (OP2); + CMP (W1, Work8); + pIAPU->PC += 3; +} + +void Apu79 () +{ +// CMP (X),(Y) + W1 = S9xAPUGetByteZ (pIAPU->X); + Work8 = S9xAPUGetByteZ (pIAPU->YA.B.Y); + CMP (W1, Work8); + pIAPU->PC++; +} + +void Apu1E () +{ +// CMP X,abs + Absolute (); + Work8 = S9xAPUGetByte (pIAPU->Address); + CMP (pIAPU->X, Work8); + pIAPU->PC += 3; +} + +void Apu3E () +{ +// CMP X,dp + Work8 = S9xAPUGetByteZ (OP1); + CMP (pIAPU->X, Work8); + pIAPU->PC += 2; +} + +void ApuC8 () +{ +// CMP X,#00 + CMP (pIAPU->X, OP1); + pIAPU->PC += 2; +} + +void Apu5E () +{ +// CMP Y,abs + Absolute (); + Work8 = S9xAPUGetByte (pIAPU->Address); + CMP (pIAPU->YA.B.Y, Work8); + pIAPU->PC += 3; +} + +void Apu7E () +{ +// CMP Y,dp + Work8 = S9xAPUGetByteZ (OP1); + CMP (pIAPU->YA.B.Y, Work8); + pIAPU->PC += 2; +} + +void ApuAD () +{ +// CMP Y,#00 + Work8 = OP1; + CMP (pIAPU->YA.B.Y, Work8); + pIAPU->PC += 2; +} + +void Apu1F () +{ +// JMP (abs+X) + Absolute (); + pIAPU->PC = pIAPU->RAM + S9xAPUGetByte (pIAPU->Address + pIAPU->X) + + (S9xAPUGetByte (pIAPU->Address + pIAPU->X + 1) << 8); +// XXX: HERE: + // APU.Flags |= TRACE_FLAG; +} + +void Apu5F () +{ +// JMP abs + Absolute (); + pIAPU->PC = pIAPU->RAM + pIAPU->Address; +} + +void Apu20 () +{ +// CLRP + APUClearDirectPage (); + pIAPU->DirectPage = pIAPU->RAM; + pIAPU->PC++; +} + +void Apu60 () +{ +// CLRC + APUClearCarry (); + pIAPU->PC++; +} + +void ApuE0 () +{ +// CLRV + APUClearHalfCarry (); + APUClearOverflow (); + pIAPU->PC++; +} + +void Apu24 () +{ +// AND A,dp + pIAPU->YA.B.A &= S9xAPUGetByteZ (OP1); + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC += 2; +} + +void Apu25 () +{ +// AND A,abs + Absolute (); + pIAPU->YA.B.A &= S9xAPUGetByte (pIAPU->Address); + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC += 3; +} + +void Apu26 () +{ +// AND A,(X) + pIAPU->YA.B.A &= S9xAPUGetByteZ (pIAPU->X); + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC++; +} + +void Apu27 () +{ +// AND A,(dp+X) + IndexedXIndirect (); + pIAPU->YA.B.A &= S9xAPUGetByte (pIAPU->Address); + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC += 2; +} + +void Apu28 () +{ +// AND A,#00 + pIAPU->YA.B.A &= OP1; + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC += 2; +} + +void Apu29 () +{ +// AND dp(dest),dp(src) + Work8 = S9xAPUGetByteZ (OP1); + Work8 &= S9xAPUGetByteZ (OP2); + S9xAPUSetByteZ (Work8, OP2); + APUSetZN8 (Work8); + pIAPU->PC += 3; +} + +void Apu34 () +{ +// AND A,dp+X + pIAPU->YA.B.A &= S9xAPUGetByteZ (OP1 + pIAPU->X); + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC += 2; +} + +void Apu35 () +{ +// AND A,abs+X + AbsoluteX (); + pIAPU->YA.B.A &= S9xAPUGetByte (pIAPU->Address); + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC += 3; +} + +void Apu36 () +{ +// AND A,abs+Y + AbsoluteY (); + pIAPU->YA.B.A &= S9xAPUGetByte (pIAPU->Address); + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC += 3; +} + +void Apu37 () +{ +// AND A,(dp)+Y + IndirectIndexedY (); + pIAPU->YA.B.A &= S9xAPUGetByte (pIAPU->Address); + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC += 2; +} + +void Apu38 () +{ +// AND dp,#00 + Work8 = OP1; + Work8 &= S9xAPUGetByteZ (OP2); + S9xAPUSetByteZ (Work8, OP2); + APUSetZN8 (Work8); + pIAPU->PC += 3; +} + +void Apu39 () +{ +// AND (X),(Y) + Work8 = S9xAPUGetByteZ (pIAPU->X) & S9xAPUGetByteZ (pIAPU->YA.B.Y); + APUSetZN8 (Work8); + S9xAPUSetByteZ (Work8, pIAPU->X); + pIAPU->PC++; +} + +void Apu2B () +{ +// ROL dp + Work8 = S9xAPUGetByteZ (OP1); + ROL (Work8); + S9xAPUSetByteZ (Work8, OP1); + pIAPU->PC += 2; +} + +void Apu2C () +{ +// ROL abs + Absolute (); + Work8 = S9xAPUGetByte (pIAPU->Address); + ROL (Work8); + S9xAPUSetByte (Work8, pIAPU->Address); + pIAPU->PC += 3; +} + +void Apu3B () +{ +// ROL dp+X + Work8 = S9xAPUGetByteZ (OP1 + pIAPU->X); + ROL (Work8); + S9xAPUSetByteZ (Work8, OP1 + pIAPU->X); + pIAPU->PC += 2; +} + +void Apu3C () +{ +// ROL A + ROL (pIAPU->YA.B.A); + pIAPU->PC++; +} + +void Apu2E () +{ +// CBNE dp,rel + Work8 = OP1; + Relative2 (); + + if (S9xAPUGetByteZ (Work8) != pIAPU->YA.B.A) + { + pIAPU->PC = pIAPU->RAM + (uint16) Int16; + CPU.APU_Cycles += pIAPU->TwoCycles; + APUShutdown (); + } + else + pIAPU->PC += 3; +} + +void ApuDE () +{ +// CBNE dp+X,rel + Work8 = OP1 + pIAPU->X; + Relative2 (); + + if (S9xAPUGetByteZ (Work8) != pIAPU->YA.B.A) + { + pIAPU->PC = pIAPU->RAM + (uint16) Int16; + CPU.APU_Cycles += pIAPU->TwoCycles; + APUShutdown (); + } + else + pIAPU->PC += 3; +} + +void Apu3D () +{ +// INC X + pIAPU->X++; + APUSetZN8 (pIAPU->X); + +#ifdef SPC700_SHUTDOWN + pIAPU->WaitCounter++; +#endif + + pIAPU->PC++; +} + +void ApuFC () +{ +// INC Y + pIAPU->YA.B.Y++; + APUSetZN8 (pIAPU->YA.B.Y); + +#ifdef SPC700_SHUTDOWN + pIAPU->WaitCounter++; +#endif + + pIAPU->PC++; +} + +void Apu1D () +{ +// DEC X + pIAPU->X--; + APUSetZN8 (pIAPU->X); + +#ifdef SPC700_SHUTDOWN + pIAPU->WaitCounter++; +#endif + + pIAPU->PC++; +} + +void ApuDC () +{ +// DEC Y + pIAPU->YA.B.Y--; + APUSetZN8 (pIAPU->YA.B.Y); + +#ifdef SPC700_SHUTDOWN + pIAPU->WaitCounter++; +#endif + + pIAPU->PC++; +} + +void ApuAB () +{ +// INC dp + Work8 = S9xAPUGetByteZ (OP1) + 1; + S9xAPUSetByteZ (Work8, OP1); + APUSetZN8 (Work8); + +#ifdef SPC700_SHUTDOWN + pIAPU->WaitCounter++; +#endif + + pIAPU->PC += 2; +} + +void ApuAC () +{ +// INC abs + Absolute (); + Work8 = S9xAPUGetByte (pIAPU->Address) + 1; + S9xAPUSetByte (Work8, pIAPU->Address); + APUSetZN8 (Work8); + +#ifdef SPC700_SHUTDOWN + pIAPU->WaitCounter++; +#endif + + pIAPU->PC += 3; +} + +void ApuBB () +{ +// INC dp+X + Work8 = S9xAPUGetByteZ (OP1 + pIAPU->X) + 1; + S9xAPUSetByteZ (Work8, OP1 + pIAPU->X); + APUSetZN8 (Work8); + +#ifdef SPC700_SHUTDOWN + pIAPU->WaitCounter++; +#endif + + pIAPU->PC += 2; +} + +void ApuBC () +{ +// INC A + pIAPU->YA.B.A++; + APUSetZN8 (pIAPU->YA.B.A); + +#ifdef SPC700_SHUTDOWN + pIAPU->WaitCounter++; +#endif + + pIAPU->PC++; +} + +void Apu8B () +{ +// DEC dp + Work8 = S9xAPUGetByteZ (OP1) - 1; + S9xAPUSetByteZ (Work8, OP1); + APUSetZN8 (Work8); + +#ifdef SPC700_SHUTDOWN + pIAPU->WaitCounter++; +#endif + + pIAPU->PC += 2; +} + +void Apu8C () +{ +// DEC abs + Absolute (); + Work8 = S9xAPUGetByte (pIAPU->Address) - 1; + S9xAPUSetByte (Work8, pIAPU->Address); + APUSetZN8 (Work8); + +#ifdef SPC700_SHUTDOWN + pIAPU->WaitCounter++; +#endif + + pIAPU->PC += 3; +} + +void Apu9B () +{ +// DEC dp+X + Work8 = S9xAPUGetByteZ (OP1 + pIAPU->X) - 1; + S9xAPUSetByteZ (Work8, OP1 + pIAPU->X); + APUSetZN8 (Work8); + +#ifdef SPC700_SHUTDOWN + pIAPU->WaitCounter++; +#endif + + pIAPU->PC += 2; +} + +void Apu9C () +{ +// DEC A + pIAPU->YA.B.A--; + APUSetZN8 (pIAPU->YA.B.A); + +#ifdef SPC700_SHUTDOWN + pIAPU->WaitCounter++; +#endif + + pIAPU->PC++; +} + +void Apu44 () +{ +// EOR A,dp + pIAPU->YA.B.A ^= S9xAPUGetByteZ (OP1); + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC += 2; +} + +void Apu45 () +{ +// EOR A,abs + Absolute (); + pIAPU->YA.B.A ^= S9xAPUGetByte (pIAPU->Address); + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC += 3; +} + +void Apu46 () +{ +// EOR A,(X) + pIAPU->YA.B.A ^= S9xAPUGetByteZ (pIAPU->X); + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC++; +} + +void Apu47 () +{ +// EOR A,(dp+X) + IndexedXIndirect (); + pIAPU->YA.B.A ^= S9xAPUGetByte (pIAPU->Address); + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC += 2; +} + +void Apu48 () +{ +// EOR A,#00 + pIAPU->YA.B.A ^= OP1; + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC += 2; +} + +void Apu49 () +{ +// EOR dp(dest),dp(src) + Work8 = S9xAPUGetByteZ (OP1); + Work8 ^= S9xAPUGetByteZ (OP2); + S9xAPUSetByteZ (Work8, OP2); + APUSetZN8 (Work8); + pIAPU->PC += 3; +} + +void Apu54 () +{ +// EOR A,dp+X + pIAPU->YA.B.A ^= S9xAPUGetByteZ (OP1 + pIAPU->X); + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC += 2; +} + +void Apu55 () +{ +// EOR A,abs+X + AbsoluteX (); + pIAPU->YA.B.A ^= S9xAPUGetByte (pIAPU->Address); + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC += 3; +} + +void Apu56 () +{ +// EOR A,abs+Y + AbsoluteY (); + pIAPU->YA.B.A ^= S9xAPUGetByte (pIAPU->Address); + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC += 3; +} + +void Apu57 () +{ +// EOR A,(dp)+Y + IndirectIndexedY (); + pIAPU->YA.B.A ^= S9xAPUGetByte (pIAPU->Address); + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC += 2; +} + +void Apu58 () +{ +// EOR dp,#00 + Work8 = OP1; + Work8 ^= S9xAPUGetByteZ (OP2); + S9xAPUSetByteZ (Work8, OP2); + APUSetZN8 (Work8); + pIAPU->PC += 3; +} + +void Apu59 () +{ +// EOR (X),(Y) + Work8 = S9xAPUGetByteZ (pIAPU->X) ^ S9xAPUGetByteZ (pIAPU->YA.B.Y); + APUSetZN8 (Work8); + S9xAPUSetByteZ (Work8, pIAPU->X); + pIAPU->PC++; +} + +void Apu4B () +{ +// LSR dp + Work8 = S9xAPUGetByteZ (OP1); + LSR (Work8); + S9xAPUSetByteZ (Work8, OP1); + pIAPU->PC += 2; +} + +void Apu4C () +{ +// LSR abs + Absolute (); + Work8 = S9xAPUGetByte (pIAPU->Address); + LSR (Work8); + S9xAPUSetByte (Work8, pIAPU->Address); + pIAPU->PC += 3; +} + +void Apu5B () +{ +// LSR dp+X + Work8 = S9xAPUGetByteZ (OP1 + pIAPU->X); + LSR (Work8); + S9xAPUSetByteZ (Work8, OP1 + pIAPU->X); + pIAPU->PC += 2; +} + +void Apu5C () +{ +// LSR A + LSR (pIAPU->YA.B.A); + pIAPU->PC++; +} + +void Apu7D () +{ +// MOV A,X + pIAPU->YA.B.A = pIAPU->X; + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC++; +} + +void ApuDD () +{ +// MOV A,Y + pIAPU->YA.B.A = pIAPU->YA.B.Y; + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC++; +} + +void Apu5D () +{ +// MOV X,A + pIAPU->X = pIAPU->YA.B.A; + APUSetZN8 (pIAPU->X); + pIAPU->PC++; +} + +void ApuFD () +{ +// MOV Y,A + pIAPU->YA.B.Y = pIAPU->YA.B.A; + APUSetZN8 (pIAPU->YA.B.Y); + pIAPU->PC++; +} + +void Apu9D () +{ +//MOV X,SP + pIAPU->X = pIAPU->S; + APUSetZN8 (pIAPU->X); + pIAPU->PC++; +} + +void ApuBD () +{ +// MOV SP,X + pIAPU->S = pIAPU->X; + pIAPU->PC++; +} + +void Apu6B () +{ +// ROR dp + Work8 = S9xAPUGetByteZ (OP1); + ROR (Work8); + S9xAPUSetByteZ (Work8, OP1); + pIAPU->PC += 2; +} + +void Apu6C () +{ +// ROR abs + Absolute (); + Work8 = S9xAPUGetByte (pIAPU->Address); + ROR (Work8); + S9xAPUSetByte (Work8, pIAPU->Address); + pIAPU->PC += 3; +} + +void Apu7B () +{ +// ROR dp+X + Work8 = S9xAPUGetByteZ (OP1 + pIAPU->X); + ROR (Work8); + S9xAPUSetByteZ (Work8, OP1 + pIAPU->X); + pIAPU->PC += 2; +} + +void Apu7C () +{ +// ROR A + ROR (pIAPU->YA.B.A); + pIAPU->PC++; +} + +void Apu6E () +{ +// DBNZ dp,rel + Work8 = OP1; + Relative2 (); + W1 = S9xAPUGetByteZ (Work8) - 1; + S9xAPUSetByteZ (W1, Work8); + if (W1 != 0) + { + pIAPU->PC = pIAPU->RAM + (uint16) Int16; + CPU.APU_Cycles += pIAPU->TwoCycles; + } + else + pIAPU->PC += 3; +} + +void ApuFE () +{ +// DBNZ Y,rel + Relative (); + pIAPU->YA.B.Y--; + if (pIAPU->YA.B.Y != 0) + { + pIAPU->PC = pIAPU->RAM + (uint16) Int16; + CPU.APU_Cycles += pIAPU->TwoCycles; + } + else + pIAPU->PC += 2; +} + +void Apu6F () +{ +// RET + PopW (Work16); + pIAPU->PC = pIAPU->RAM + Work16; +} + +void Apu7F () +{ +// RETI + // STOP ("RETI"); + Pop (pIAPU->P); + S9xAPUUnpackStatus (); + PopW (Work16); + pIAPU->PC = pIAPU->RAM + Work16; +} + +void Apu84 () +{ +// ADC A,dp + Work8 = S9xAPUGetByteZ (OP1); + ADC (pIAPU->YA.B.A, Work8); + pIAPU->PC += 2; +} + +void Apu85 () +{ +// ADC A, abs + Absolute (); + Work8 = S9xAPUGetByte (pIAPU->Address); + ADC (pIAPU->YA.B.A, Work8); + pIAPU->PC += 3; +} + +void Apu86 () +{ +// ADC A,(X) + Work8 = S9xAPUGetByteZ (pIAPU->X); + ADC (pIAPU->YA.B.A, Work8); + pIAPU->PC++; +} + +void Apu87 () +{ +// ADC A,(dp+X) + IndexedXIndirect (); + Work8 = S9xAPUGetByte (pIAPU->Address); + ADC (pIAPU->YA.B.A, Work8); + pIAPU->PC += 2; +} + +void Apu88 () +{ +// ADC A,#00 + Work8 = OP1; + ADC (pIAPU->YA.B.A, Work8); + pIAPU->PC += 2; +} + +void Apu89 () +{ +// ADC dp(dest),dp(src) + Work8 = S9xAPUGetByteZ (OP1); + W1 = S9xAPUGetByteZ (OP2); + ADC (W1, Work8); + S9xAPUSetByteZ (W1, OP2); + pIAPU->PC += 3; +} + +void Apu94 () +{ +// ADC A,dp+X + Work8 = S9xAPUGetByteZ (OP1 + pIAPU->X); + ADC (pIAPU->YA.B.A, Work8); + pIAPU->PC += 2; +} + +void Apu95 () +{ +// ADC A, abs+X + AbsoluteX (); + Work8 = S9xAPUGetByte (pIAPU->Address); + ADC (pIAPU->YA.B.A, Work8); + pIAPU->PC += 3; +} + +void Apu96 () +{ +// ADC A, abs+Y + AbsoluteY (); + Work8 = S9xAPUGetByte (pIAPU->Address); + ADC (pIAPU->YA.B.A, Work8); + pIAPU->PC += 3; +} + +void Apu97 () +{ +// ADC A, (dp)+Y + IndirectIndexedY (); + Work8 = S9xAPUGetByte (pIAPU->Address); + ADC (pIAPU->YA.B.A, Work8); + pIAPU->PC += 2; +} + +void Apu98 () +{ +// ADC dp,#00 + Work8 = OP1; + W1 = S9xAPUGetByteZ (OP2); + ADC (W1, Work8); + S9xAPUSetByteZ (W1, OP2); + pIAPU->PC += 3; +} + +void Apu99 () +{ +// ADC (X),(Y) + W1 = S9xAPUGetByteZ (pIAPU->X); + Work8 = S9xAPUGetByteZ (pIAPU->YA.B.Y); + ADC (W1, Work8); + S9xAPUSetByteZ (W1, pIAPU->X); + pIAPU->PC++; +} + +void Apu8D () +{ +// MOV Y,#00 + pIAPU->YA.B.Y = OP1; + APUSetZN8 (pIAPU->YA.B.Y); + pIAPU->PC += 2; +} + +void Apu8F () +{ +// MOV dp,#00 + Work8 = OP1; + S9xAPUSetByteZ (Work8, OP2); + pIAPU->PC += 3; +} + +void Apu9E () +{ +// DIV YA,X + if (pIAPU->X == 0) + { + APUSetOverflow (); + pIAPU->YA.B.Y = 0xff; + pIAPU->YA.B.A = 0xff; + } + else + { + APUClearOverflow (); + Work8 = pIAPU->YA.W / pIAPU->X; + pIAPU->YA.B.Y = pIAPU->YA.W % pIAPU->X; + pIAPU->YA.B.A = Work8; + } +// XXX How should Overflow, Half Carry, Zero and Negative flags be set?? + // APUSetZN16 (pIAPU->YA.W); + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC++; +} + +void Apu9F () +{ +// XCN A + pIAPU->YA.B.A = (pIAPU->YA.B.A >> 4) | (pIAPU->YA.B.A << 4); + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC++; +} + +void ApuA4 () +{ +// SBC A, dp + Work8 = S9xAPUGetByteZ (OP1); + SBC (pIAPU->YA.B.A, Work8); + pIAPU->PC += 2; +} + +void ApuA5 () +{ +// SBC A, abs + Absolute (); + Work8 = S9xAPUGetByte (pIAPU->Address); + SBC (pIAPU->YA.B.A, Work8); + pIAPU->PC += 3; +} + +void ApuA6 () +{ +// SBC A, (X) + Work8 = S9xAPUGetByteZ (pIAPU->X); + SBC (pIAPU->YA.B.A, Work8); + pIAPU->PC++; +} + +void ApuA7 () +{ +// SBC A,(dp+X) + IndexedXIndirect (); + Work8 = S9xAPUGetByte (pIAPU->Address); + SBC (pIAPU->YA.B.A, Work8); + pIAPU->PC += 2; +} + +void ApuA8 () +{ +// SBC A,#00 + Work8 = OP1; + SBC (pIAPU->YA.B.A, Work8); + pIAPU->PC += 2; +} + +void ApuA9 () +{ +// SBC dp(dest), dp(src) + Work8 = S9xAPUGetByteZ (OP1); + W1 = S9xAPUGetByteZ (OP2); + SBC (W1, Work8); + S9xAPUSetByteZ (W1, OP2); + pIAPU->PC += 3; +} + +void ApuB4 () +{ +// SBC A, dp+X + Work8 = S9xAPUGetByteZ (OP1 + pIAPU->X); + SBC (pIAPU->YA.B.A, Work8); + pIAPU->PC += 2; +} + +void ApuB5 () +{ +// SBC A,abs+X + AbsoluteX (); + Work8 = S9xAPUGetByte (pIAPU->Address); + SBC (pIAPU->YA.B.A, Work8); + pIAPU->PC += 3; +} + +void ApuB6 () +{ +// SBC A,abs+Y + AbsoluteY (); + Work8 = S9xAPUGetByte (pIAPU->Address); + SBC (pIAPU->YA.B.A, Work8); + pIAPU->PC += 3; +} + +void ApuB7 () +{ +// SBC A,(dp)+Y + IndirectIndexedY (); + Work8 = S9xAPUGetByte (pIAPU->Address); + SBC (pIAPU->YA.B.A, Work8); + pIAPU->PC += 2; +} + +void ApuB8 () +{ +// SBC dp,#00 + Work8 = OP1; + W1 = S9xAPUGetByteZ (OP2); + SBC (W1, Work8); + S9xAPUSetByteZ (W1, OP2); + pIAPU->PC += 3; +} + +void ApuB9 () +{ +// SBC (X),(Y) + W1 = S9xAPUGetByteZ (pIAPU->X); + Work8 = S9xAPUGetByteZ (pIAPU->YA.B.Y); + SBC (W1, Work8); + S9xAPUSetByteZ (W1, pIAPU->X); + pIAPU->PC++; +} + +void ApuAF () +{ +// MOV (X)+, A + S9xAPUSetByteZ (pIAPU->YA.B.A, pIAPU->X++); + pIAPU->PC++; +} + +void ApuBE () +{ +// DAS + if ((pIAPU->YA.B.A & 0x0f) > 9 || !APUCheckHalfCarry()) + { + pIAPU->YA.B.A -= 6; + } + if (pIAPU->YA.B.A > 0x9f || !pIAPU->_Carry) + { + pIAPU->YA.B.A -= 0x60; + APUClearCarry (); + } + else { APUSetCarry (); } + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC++; +} + +void ApuBF () +{ +// MOV A,(X)+ + pIAPU->YA.B.A = S9xAPUGetByteZ (pIAPU->X++); + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC++; +} + +void ApuC0 () +{ +// DI + APUClearInterrupt (); + pIAPU->PC++; +} + +void ApuA0 () +{ +// EI + APUSetInterrupt (); + pIAPU->PC++; +} + +void ApuC4 () +{ +// MOV dp,A + S9xAPUSetByteZ (pIAPU->YA.B.A, OP1); + pIAPU->PC += 2; +} + +void ApuC5 () +{ +// MOV abs,A + Absolute (); + S9xAPUSetByte (pIAPU->YA.B.A, pIAPU->Address); + pIAPU->PC += 3; +} + +void ApuC6 () +{ +// MOV (X), A + S9xAPUSetByteZ (pIAPU->YA.B.A, pIAPU->X); + pIAPU->PC++; +} + +void ApuC7 () +{ +// MOV (dp+X),A + IndexedXIndirect (); + S9xAPUSetByte (pIAPU->YA.B.A, pIAPU->Address); + pIAPU->PC += 2; +} + +void ApuC9 () +{ +// MOV abs,X + Absolute (); + S9xAPUSetByte (pIAPU->X, pIAPU->Address); + pIAPU->PC += 3; +} + +void ApuCB () +{ +// MOV dp,Y + S9xAPUSetByteZ (pIAPU->YA.B.Y, OP1); + pIAPU->PC += 2; +} + +void ApuCC () +{ +// MOV abs,Y + Absolute (); + S9xAPUSetByte (pIAPU->YA.B.Y, pIAPU->Address); + pIAPU->PC += 3; +} + +void ApuCD () +{ +// MOV X,#00 + pIAPU->X = OP1; + APUSetZN8 (pIAPU->X); + pIAPU->PC += 2; +} + +void ApuCF () +{ +// MUL YA + pIAPU->YA.W = (uint16) pIAPU->YA.B.A * pIAPU->YA.B.Y; + APUSetZN16 (pIAPU->YA.W); + pIAPU->PC++; +} + +void ApuD4 () +{ +// MOV dp+X, A + S9xAPUSetByteZ (pIAPU->YA.B.A, OP1 + pIAPU->X); + pIAPU->PC += 2; +} + +void ApuD5 () +{ +// MOV abs+X,A + AbsoluteX (); + S9xAPUSetByte (pIAPU->YA.B.A, pIAPU->Address); + pIAPU->PC += 3; +} + +void ApuD6 () +{ +// MOV abs+Y,A + AbsoluteY (); + S9xAPUSetByte (pIAPU->YA.B.A, pIAPU->Address); + pIAPU->PC += 3; +} + +void ApuD7 () +{ +// MOV (dp)+Y,A + IndirectIndexedY (); + S9xAPUSetByte (pIAPU->YA.B.A, pIAPU->Address); + pIAPU->PC += 2; +} + +void ApuD8 () +{ +// MOV dp,X + S9xAPUSetByteZ (pIAPU->X, OP1); + pIAPU->PC += 2; +} + +void ApuD9 () +{ +// MOV dp+Y,X + S9xAPUSetByteZ (pIAPU->X, OP1 + pIAPU->YA.B.Y); + pIAPU->PC += 2; +} + +void ApuDB () +{ +// MOV dp+X,Y + S9xAPUSetByteZ (pIAPU->YA.B.Y, OP1 + pIAPU->X); + pIAPU->PC += 2; +} + +void ApuDF () +{ +// DAA + if ((pIAPU->YA.B.A & 0x0f) > 9 || APUCheckHalfCarry()) + { + if(pIAPU->YA.B.A > 0xf0) APUSetCarry (); + pIAPU->YA.B.A += 6; + //APUSetHalfCarry (); Intel procs do this, but this is a Sony proc... + } + //else { APUClearHalfCarry (); } ditto as above + if (pIAPU->YA.B.A > 0x9f || pIAPU->_Carry) + { + pIAPU->YA.B.A += 0x60; + APUSetCarry (); + } + else { APUClearCarry (); } + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC++; +} + +void ApuE4 () +{ +// MOV A, dp + pIAPU->YA.B.A = S9xAPUGetByteZ (OP1); + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC += 2; +} + +void ApuE5 () +{ +// MOV A,abs + Absolute (); + pIAPU->YA.B.A = S9xAPUGetByte (pIAPU->Address); + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC += 3; +} + +void ApuE6 () +{ +// MOV A,(X) + pIAPU->YA.B.A = S9xAPUGetByteZ (pIAPU->X); + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC++; +} + +void ApuE7 () +{ +// MOV A,(dp+X) + IndexedXIndirect (); + pIAPU->YA.B.A = S9xAPUGetByte (pIAPU->Address); + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC += 2; +} + +void ApuE8 () +{ +// MOV A,#00 + pIAPU->YA.B.A = OP1; + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC += 2; +} + +void ApuE9 () +{ +// MOV X, abs + Absolute (); + pIAPU->X = S9xAPUGetByte (pIAPU->Address); + APUSetZN8 (pIAPU->X); + pIAPU->PC += 3; +} + +void ApuEB () +{ +// MOV Y,dp + pIAPU->YA.B.Y = S9xAPUGetByteZ (OP1); + APUSetZN8 (pIAPU->YA.B.Y); + pIAPU->PC += 2; +} + +void ApuEC () +{ +// MOV Y,abs + Absolute (); + pIAPU->YA.B.Y = S9xAPUGetByte (pIAPU->Address); + APUSetZN8 (pIAPU->YA.B.Y); + pIAPU->PC += 3; +} + +void ApuF4 () +{ +// MOV A, dp+X + pIAPU->YA.B.A = S9xAPUGetByteZ (OP1 + pIAPU->X); + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC += 2; +} + +void ApuF5 () +{ +// MOV A, abs+X + AbsoluteX (); + pIAPU->YA.B.A = S9xAPUGetByte (pIAPU->Address); + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC += 3; +} + +void ApuF6 () +{ +// MOV A, abs+Y + AbsoluteY (); + pIAPU->YA.B.A = S9xAPUGetByte (pIAPU->Address); + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC += 3; +} + +void ApuF7 () +{ +// MOV A, (dp)+Y + IndirectIndexedY (); + pIAPU->YA.B.A = S9xAPUGetByte (pIAPU->Address); + APUSetZN8 (pIAPU->YA.B.A); + pIAPU->PC += 2; +} + +void ApuF8 () +{ +// MOV X,dp + pIAPU->X = S9xAPUGetByteZ (OP1); + APUSetZN8 (pIAPU->X); + pIAPU->PC += 2; +} + +void ApuF9 () +{ +// MOV X,dp+Y + pIAPU->X = S9xAPUGetByteZ (OP1 + pIAPU->YA.B.Y); + APUSetZN8 (pIAPU->X); + pIAPU->PC += 2; +} + +void ApuFA () +{ +// MOV dp(dest),dp(src) + S9xAPUSetByteZ (S9xAPUGetByteZ (OP1), OP2); + pIAPU->PC += 3; +} + +void ApuFB () +{ +// MOV Y,dp+X + pIAPU->YA.B.Y = S9xAPUGetByteZ (OP1 + pIAPU->X); + APUSetZN8 (pIAPU->YA.B.Y); + pIAPU->PC += 2; +} + +//#if defined(ASM_SPC700) +#undef INLINE +#define INLINE extern "C" +#include "apumem.h" +/* +#elif defined(NO_INLINE_SET_GET) +#undef INLINE +#define INLINE +#include "apumem.h" +#endif +*/ + +void (*S9xApuOpcodes[256]) (void) = +{ + Apu00, Apu01, Apu02, Apu03, Apu04, Apu05, Apu06, Apu07, + Apu08, Apu09, Apu0A, Apu0B, Apu0C, Apu0D, Apu0E, Apu0F, + Apu10, Apu11, Apu12, Apu13, Apu14, Apu15, Apu16, Apu17, + Apu18, Apu19, Apu1A, Apu1B, Apu1C, Apu1D, Apu1E, Apu1F, + Apu20, Apu21, Apu22, Apu23, Apu24, Apu25, Apu26, Apu27, + Apu28, Apu29, Apu2A, Apu2B, Apu2C, Apu2D, Apu2E, Apu2F, + Apu30, Apu31, Apu32, Apu33, Apu34, Apu35, Apu36, Apu37, + Apu38, Apu39, Apu3A, Apu3B, Apu3C, Apu3D, Apu3E, Apu3F, + Apu40, Apu41, Apu42, Apu43, Apu44, Apu45, Apu46, Apu47, + Apu48, Apu49, Apu4A, Apu4B, Apu4C, Apu4D, Apu4E, Apu4F, + Apu50, Apu51, Apu52, Apu53, Apu54, Apu55, Apu56, Apu57, + Apu58, Apu59, Apu5A, Apu5B, Apu5C, Apu5D, Apu5E, Apu5F, + Apu60, Apu61, Apu62, Apu63, Apu64, Apu65, Apu66, Apu67, + Apu68, Apu69, Apu6A, Apu6B, Apu6C, Apu6D, Apu6E, Apu6F, + Apu70, Apu71, Apu72, Apu73, Apu74, Apu75, Apu76, Apu77, + Apu78, Apu79, Apu7A, Apu7B, Apu7C, Apu7D, Apu7E, Apu7F, + Apu80, Apu81, Apu82, Apu83, Apu84, Apu85, Apu86, Apu87, + Apu88, Apu89, Apu8A, Apu8B, Apu8C, Apu8D, Apu8E, Apu8F, + Apu90, Apu91, Apu92, Apu93, Apu94, Apu95, Apu96, Apu97, + Apu98, Apu99, Apu9A, Apu9B, Apu9C, Apu9D, Apu9E, Apu9F, + ApuA0, ApuA1, ApuA2, ApuA3, ApuA4, ApuA5, ApuA6, ApuA7, + ApuA8, ApuA9, ApuAA, ApuAB, ApuAC, ApuAD, ApuAE, ApuAF, + ApuB0, ApuB1, ApuB2, ApuB3, ApuB4, ApuB5, ApuB6, ApuB7, + ApuB8, ApuB9, ApuBA, ApuBB, ApuBC, ApuBD, ApuBE, ApuBF, + ApuC0, ApuC1, ApuC2, ApuC3, ApuC4, ApuC5, ApuC6, ApuC7, + ApuC8, ApuC9, ApuCA, ApuCB, ApuCC, ApuCD, ApuCE, ApuCF, + ApuD0, ApuD1, ApuD2, ApuD3, ApuD4, ApuD5, ApuD6, ApuD7, + ApuD8, ApuD9, ApuDA, ApuDB, ApuDC, ApuDD, ApuDE, ApuDF, + ApuE0, ApuE1, ApuE2, ApuE3, ApuE4, ApuE5, ApuE6, ApuE7, + ApuE8, ApuE9, ApuEA, ApuEB, ApuEC, ApuED, ApuEE, ApuEF, + ApuF0, ApuF1, ApuF2, ApuF3, ApuF4, ApuF5, ApuF6, ApuF7, + ApuF8, ApuF9, ApuFA, ApuFB, ApuFC, ApuFD, ApuFE, ApuFF +}; + + +struct SIAPU IAPU2; +struct SIAPU *pIAPU; + +void APUCompare() +{ + IAPU.icount++; + + if(IAPU.PC != IAPU2.PC) { + dprintf("!%02X %5i PC %08X vs %08X", IAPU.opcode, IAPU.icount, IAPU.PC, IAPU2.PC); + exit(1); + } + + if(IAPU.YA.W != IAPU2.YA.W) { + dprintf("!%02X %5i YA %04X vs %04X", IAPU.opcode, IAPU.icount, IAPU.YA.W, IAPU2.YA.W); + dprintf(" (%04X / %02X)", IAPU.ya_prev, IAPU.x_prev); + exit(1); + } + + if((IAPU.P&0x7d) != (IAPU2.P&0x7d)) { + dprintf("!%02X %5i P %02X vs %02X", IAPU.opcode, IAPU.icount, IAPU.P, IAPU2.P); + exit(1); + } + + if(IAPU.X != IAPU2.X) { + dprintf("!%02X %5i X %02X vs %02X", IAPU.opcode, IAPU.icount, IAPU.X, IAPU2.X); + exit(1); + } + + if(IAPU.S != IAPU2.S) { + dprintf("!%02X %5i S %02X vs %02X", IAPU.opcode, IAPU.icount, IAPU.S, IAPU2.S); + exit(1); + } + + if((IAPU._Zero == 0) != (IAPU2._Zero == 0)) { + dprintf("!%02X %5i _Zero %02X vs %02X", IAPU.opcode, IAPU.icount, IAPU._Zero, IAPU2._Zero); + exit(1); + } + + if((IAPU._Zero & 0x80) != (IAPU2._Zero & 0x80)) { + dprintf("!%02X %5i _Zero(n) %02X vs %02X", IAPU.opcode, IAPU.icount, IAPU._Zero, IAPU2._Zero); + exit(1); + } + + if(IAPU.memread_addr != IAPU2.memread_addr) { + dprintf("!%02X %5i memread_addr %04X vs %04X", IAPU.opcode, IAPU.icount, IAPU.memread_addr, IAPU2.memread_addr); + exit(1); + } + + if(IAPU.memread_data != IAPU2.memread_data) { + dprintf("!%02X %5i memread_data %02X@%04X vs %02X@%04X", IAPU.opcode, IAPU.icount, IAPU.memread_data, IAPU.memread_addr, IAPU2.memread_data, IAPU2.memread_addr); + exit(1); + } + + if(IAPU.memwrite_addr != IAPU2.memwrite_addr) { + dprintf("!%02X %5i memwrite_addr %04X vs %04X", IAPU.opcode, IAPU.icount, IAPU.memwrite_addr, IAPU2.memwrite_addr); + exit(1); + } + + if(IAPU.memwrite_data != IAPU2.memwrite_data) { + dprintf("!%02X %5i memwrite_data %02X@%04X vs %02X@%04X", IAPU.opcode, IAPU.icount, IAPU.memwrite_data, IAPU.memwrite_addr, IAPU2.memwrite_data, IAPU2.memwrite_addr); + exit(1); + } +} + + diff --git a/old/spc700/debug/spc700.h b/old/spc700/debug/spc700.h new file mode 100644 index 0000000..507c247 --- /dev/null +++ b/old/spc700/debug/spc700.h @@ -0,0 +1,172 @@ +/* + * Snes9x - Portable Super Nintendo Entertainment System (TM) emulator. + * + * (c) Copyright 1996 - 2001 Gary Henderson (gary.henderson@ntlworld.com) and + * Jerremy Koot (jkoot@snes9x.com) + * + * Super FX C emulator code + * (c) Copyright 1997 - 1999 Ivar (ivar@snes9x.com) and + * Gary Henderson. + * Super FX assembler emulator code (c) Copyright 1998 zsKnight and _Demo_. + * + * DSP1 emulator code (c) Copyright 1998 Ivar, _Demo_ and Gary Henderson. + * C4 asm and some C emulation code (c) Copyright 2000 zsKnight and _Demo_. + * C4 C code (c) Copyright 2001 Gary Henderson (gary.henderson@ntlworld.com). + * + * DOS port code contains the works of other authors. See headers in + * individual files. + * + * Snes9x homepage: http://www.snes9x.com + * + * Permission to use, copy, modify and distribute Snes9x in both binary and + * source form, for non-commercial purposes, is hereby granted without fee, + * providing that this license information and copyright notice appear with + * all copies and any derived work. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event shall the authors be held liable for any damages + * arising from the use of this software. + * + * Snes9x is freeware for PERSONAL USE only. Commercial users should + * seek permission of the copyright holders first. Commercial use includes + * charging money for Snes9x or software derived from Snes9x. + * + * The copyright holders request that bug fixes and improvements to the code + * should be forwarded to them so everyone can benefit from the modifications + * in future versions. + * + * Super NES and Super Nintendo Entertainment System are trademarks of + * Nintendo Co., Limited and its subsidiary companies. + */ +#ifndef _SPC700_H_ +#define _SPC700_H_ + +#ifdef SPCTOOL +#define NO_CHANNEL_STRUCT +#include "spctool/dsp.h" +#include "spctool/spc700.h" +#include "spctool/soundmod.h" +#endif + + +#define Carry 1 +#define Zero 2 +#define Interrupt 4 +#define HalfCarry 8 +#define BreakFlag 16 +#define DirectPageFlag 32 +#define Overflow 64 +#define Negative 128 + +#define APUClearCarry() (pIAPU->_Carry = 0) +#define APUSetCarry() (pIAPU->_Carry = 1) +#define APUSetInterrupt() (pIAPU->P |= Interrupt) +#define APUClearInterrupt() (pIAPU->P &= ~Interrupt) +#define APUSetHalfCarry() (pIAPU->P |= HalfCarry) +#define APUClearHalfCarry() (pIAPU->P &= ~HalfCarry) +#define APUSetBreak() (pIAPU->P |= BreakFlag) +#define APUClearBreak() (pIAPU->P &= ~BreakFlag) +#define APUSetDirectPage() (pIAPU->P |= DirectPageFlag) +#define APUClearDirectPage() (pIAPU->P &= ~DirectPageFlag) +#define APUSetOverflow() (pIAPU->_Overflow = 1) +#define APUClearOverflow() (pIAPU->_Overflow = 0) + +#define APUCheckZero() (pIAPU->_Zero == 0) +#define APUCheckCarry() (pIAPU->_Carry) +#define APUCheckInterrupt() (pIAPU->P & Interrupt) +#define APUCheckHalfCarry() (pIAPU->P & HalfCarry) +#define APUCheckBreak() (pIAPU->P & BreakFlag) +#define APUCheckDirectPage() (pIAPU->P & DirectPageFlag) +#define APUCheckOverflow() (pIAPU->_Overflow) +#define APUCheckNegative() (pIAPU->_Zero & 0x80) + +//#define APUClearFlags(f) (IAPU.P &= ~(f)) +//#define APUSetFlags(f) (IAPU.P |= (f)) +//#define APUCheckFlag(f) (IAPU.P & (f)) + +typedef union +{ +#ifdef LSB_FIRST + struct { uint8 A, Y; } B; +#else + struct { uint8 Y, A; } B; +#endif + uint16 W; + uint32 _padder; // make sure this whole thing takes 4 bytes +} YAndA; + +struct SAPURegisters{ + uint8 P; + YAndA YA; + uint8 X; + uint8 S; + uint16 PC; +}; + +//EXTERN_C struct SAPURegisters APURegisters; + +// Needed by ILLUSION OF GAIA +//#define ONE_APU_CYCLE 14 +#define ONE_APU_CYCLE 21 + +// Needed by all games written by the software company called Human +//#define ONE_APU_CYCLE_HUMAN 17 +#define ONE_APU_CYCLE_HUMAN 21 + +// 1.953us := 1.024065.54MHz + +// return cycles left (always negative) +extern "C" int spc700_execute(int cycles); +extern "C" uint32 Spc700JumpTab; + +#ifdef SPCTOOL +EXTERN_C int32 ESPC (int32); + +#define APU_EXECUTE() \ +{ \ + int32 l = (CPU.Cycles - CPU.APU_Cycles) / 14; \ + if (l > 0) \ + { \ + l -= _EmuSPC(l); \ + CPU.APU_Cycles += l * 14; \ + } \ +} + +#else + +#ifdef DEBUGGER +#define APU_EXECUTE1() \ +{ \ + if (APU.Flags & TRACE_FLAG) \ + S9xTraceAPU ();\ + CPU.APU_Cycles += S9xAPUCycles [*IAPU.PC]; \ + (*S9xApuOpcodes[*IAPU.PC]) (); \ +} +#else +#define APU_EXECUTE1() \ +{ \ + IAPU.asmJumpTab = &Spc700JumpTab; \ + memcpy(&IAPU2, &IAPU, sizeof(IAPU)); \ + CPU.APU_Cycles += S9xAPUCycles [*IAPU.PC]; \ + IAPU.opcode = *IAPU.PC; \ + pIAPU = &IAPU; \ + (*S9xApuOpcodes[*IAPU.PC]) (); \ + if(IAPU._Carry) IAPU.P |= Carry; else IAPU.P &= ~Carry; \ + if(IAPU._Overflow) IAPU.P |= Overflow; else IAPU.P &= ~Overflow; \ + pIAPU = &IAPU2; \ + spc700_execute(0); \ + APUCompare(); \ + IAPU.ya_prev = IAPU.YA.W; \ + IAPU.x_prev = IAPU.X; \ +} +#endif + +#define APU_EXECUTE(mode) \ +if (CPU.APU_APUExecuting == mode) \ +{\ + while (CPU.APU_Cycles <= CPU.Cycles) \ + APU_EXECUTE1(); \ +} +#endif + +#endif diff --git a/old/spc700/spcgen.c b/old/spc700/spcgen.c new file mode 100644 index 0000000..3ac06d6 --- /dev/null +++ b/old/spc700/spcgen.c @@ -0,0 +1,2164 @@ +// notaz's SPC700 Emulator +// (c) Copyright 2006 notaz, All rights reserved. +// +// Added some modifications by Bitrider 2010-2011. +// +// this is a rewrite of spc700.cpp in ARM asm, inspired by other asm CPU cores like +// Cyclone and DrZ80. It is meant to be used in Snes9x emulator ports for ARM platforms. +// +// notes: +// "Shutdown" mechanism is not supported, so undefine SPC700_SHUTDOWN in your port.h +// code branches backwards over start of memory are not supported +// (never seen any game doing that) +// +// license: +// the code is released under Snes9x license. It would be nice if the word "notaz" +// would appear somewhere in your documentation or your program's "about" screen +// if you use this :) + +/* + * Permission to use, copy, modify and distribute Snes9x in both binary and + * source form, for non-commercial purposes, is hereby granted without fee, + * providing that this license information and copyright notice appear with + * all copies and any derived work. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event shall the authors be held liable for any damages + * arising from the use of this software. + * + * Snes9x is freeware for PERSONAL USE only. Commercial users should + * seek permission of the copyright holders first. Commercial use includes + * charging money for Snes9x or software derived from Snes9x. + * + * The copyright holders request that bug fixes and improvements to the code + * should be forwarded to them so everyone can benefit from the modifications + * in future versions. + * + * Super NES and Super Nintendo Entertainment System are trademarks of + * Nintendo Co., Limited and its subsidiary companies. + */ + +int one_apu_cycle[] = {13, 14, 15, 21}; +int current_cycles; + + +// settings +#define VERSION "0.12" +#define APU_EXECUTING_OFF 124 +//#define SPC_DEBUG + + +// includes +#include +#include +#include +#include + + +// timings +int S9xAPUCycles [256] = +{ + /* 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, a, b, c, d, e, f, */ + /* 00 */ 2, 8, 4, 5, 3, 4, 3, 6, 2, 6, 5, 4, 5, 4, 6, 8, + /* 10 */ 2, 8, 4, 5, 4, 5, 5, 6, 5, 5, 6, 5, 2, 2, 4, 6, + /* 20 */ 2, 8, 4, 5, 3, 4, 3, 6, 2, 6, 5, 4, 5, 4, 5, 4, + /* 30 */ 2, 8, 4, 5, 4, 5, 5, 6, 5, 5, 6, 5, 2, 2, 3, 8, + /* 40 */ 2, 8, 4, 5, 3, 4, 3, 6, 2, 6, 4, 4, 5, 4, 6, 6, + /* 50 */ 2, 8, 4, 5, 4, 5, 5, 6, 5, 5, 4, 5, 2, 2, 4, 3, + /* 60 */ 2, 8, 4, 5, 3, 4, 3, 6, 2, 6, 4, 4, 5, 4, 5, 5, + /* 70 */ 2, 8, 4, 5, 4, 5, 5, 6, 5, 5, 5, 5, 2, 2, 3, 6, + /* 80 */ 2, 8, 4, 5, 3, 4, 3, 6, 2, 6, 5, 4, 5, 2, 4, 5, + /* 90 */ 2, 8, 4, 5, 4, 5, 5, 6, 5, 5, 5, 5, 2, 2,12, 5, + /* a0 */ 3, 8, 4, 5, 3, 4, 3, 6, 2, 6, 4, 4, 5, 2, 4, 4, + /* b0 */ 2, 8, 4, 5, 4, 5, 5, 6, 5, 5, 5, 5, 2, 2, 3, 4, + /* c0 */ 3, 8, 4, 5, 4, 5, 4, 7, 2, 5, 6, 4, 5, 2, 4, 9, + /* d0 */ 2, 8, 4, 5, 5, 6, 6, 7, 4, 5, 4, 5, 2, 2, 6, 3, + /* e0 */ 2, 8, 4, 5, 3, 4, 3, 6, 2, 4, 5, 3, 4, 3, 4, 3, + /* f0 */ 2, 8, 4, 5, 4, 5, 5, 6, 3, 4, 5, 4, 2, 2, 4, 3 +}; + + +// stuff +static FILE *AsmFile=NULL; +static int opcode=0; // 0-0xff +static int ibuffer = 0; +static char buff[1024]; + + +void ot(char *format, ...) +{ + va_list valist; + int i, len; + + // notaz: stop me from leaving newlines in the middle of format string + // and generating bad code + for(i=0, len=strlen(format); i < len && format[i] != '\n'; i++); + if(i < len-1 && format[len-1] != '\n') printf("\nWARNING: possible improper newline placement:\n%s\n", format); + + va_start(valist,format); + if (AsmFile) vfprintf(AsmFile,format,valist); + va_end(valist); +} + +// ot buffered +void otb(char *format, ...) +{ + va_list valist; + int i, len; + + // notaz: stop me from leaving newlines in the middle of format string + // and generating bad code + for(i=0, len=strlen(format); i < len && format[i] != '\n'; i++); + if(i < len-1 && format[len-1] != '\n') printf(buff, "\nWARNING: possible improper newline placement:\n%s\n", format); + + va_start(valist,format); + if (AsmFile) vsprintf(buff,format,valist); + ibuffer = 1; + va_end(valist); +} + +void flush_buffer() { + if (ibuffer != 0) { + ot(buff); + ibuffer = 0; + } +} + +// trashes: r0, r1, r2 +// return: r0 +// exit at label "2" +static void GetAPUDSP() { + ot("GetAPUDSP: \n"); + ot(" ldrb r1, [spc_ram, #0xf2] \n"); + // r1 = IAPU.RAM [0xf2] + + ot(" mov r0, #0\n"); + ot(" and r2, r1, #0X0f \n"); + // switch (reg & 0xf) { + ot(" cmp r2, #0x08\n"); + ot(" bxeq lr\n"); // APU_ENVX = 8 + // r1 = IAPU.RAM [0xf2] & 0x7f; + + ot(" cmp r2, #0x09\n"); + // return APU.DSP [reg]; + ot(" ldrne r2, .APU_DSP\n"); + ot(" and r1, r1, #0X7f \n"); // r1 = IAPU.RAM[0xf2] & 0x7f + ot(" ldrneb r0, [r2, r1] \n"); + ot(" bxne lr \n"); + + // APU_OUTX = 9 + // if (SoundData.channels [reg >> 4].state == SOUND_SILENT) return 0; + // return ((SoundData.channels [reg >> 4].sample >> 8) | (SoundData.channels [reg >> 4].sample & 0x + ot(" ldr r2, .SOUNDDATA_CHANNELS\n"); + ot(" mov r1, r1, lsr #4 \n"); + //ot(" add r1, r2, r1, asl #8\n"); + //ot(" ldr r0, [r1, #0x0] \n"); // r0 = SoundData.channels[reg >> 4].state + ot(" ldr r0, [r2, r1, asl #8] \n"); + ot(" add r1, r2, r1, asl #8\n"); + ot(" cmp r0, #0 \n"); // SOUND_SILENT = 0 + ot(" ldrneh r1, [r1, #0x48] \n"); // r1 = SoundData.channels[reg >> 4].sample + ot(" bxeq lr \n"); + + ot(" and r0, r1, #0xff\n"); + ot(" orr r0, r0, r1, lsr #8\n"); + ot(" bx lr \n"); + + ot(".APU_DSP:\n"); + ot(" .long APU + 0x0b\n"); // &APU.DSP + ot(".SOUNDDATA_CHANNELS:\n"); + ot(" .long SoundData + 0x30\n"); // &SoundData.channels[0] +} + + +// bitrider +// macros +static void GetByte() { + ot(" mov r1, r0\n"); + + ot(" ldrb r0, [spc_ram, r1] \n"); + + ot(" cmp r1, #0x0ff\n"); + ot(" bhi 1f \n"); + + ot(" cmp r1, #0xf3 \n"); + ot(" addeq lr, pc, #12 \n"); // lr = &ExitPoint + ot(" beq GetAPUDSP \n"); + + ot(" cmp r1, #0xfd \n"); + ot(" movhs r2, #0 \n"); + ot(" strhsb r2, [spc_ram, r1] \n"); + ot("1:\n"); + + +} + +// trashes: r0, r1, r14 +static void GetByteZ() { + ot(" mov r1, r0\n"); + + ot(" cmp r1, #0xf3 \n"); + ot(" addeq lr, pc, #20 \n"); // lr = &ExitPoint + ot(" beq GetAPUDSP \n"); + + ot(" ldr r14, [context, #iapu_directpage]\n"); + ot(" cmp r1, #0xfd \n"); + ot(" ldrb r0, [r14, r1] \n"); + ot(" movhs r2, #0 \n"); + ot(" strhsb r2, [r14, r1] \n"); +} + +static void SetByte(int restore) { + // Still should check for ShowRom + ot(" add r2, r1, #40 \n"); + ot(" tst r2, #0x10000 \n"); + ot(" bne 1f \n"); + + ot(" bic r2, r1, #0x0f\n"); + ot(" cmp r2, #0xf0\n"); + ot(" strneb r0, [spc_ram, r1] \n"); + ot(" bne 3f\n"); + + ot(" add lr, pc, #20\n"); + + ot(" cmp r1, #0xf1 \n"); + ot(" beq S9xSetAPUControl \n"); + + ot(" cmp r1, #0xf3 \n"); // pc + 4 + ot(" beq S9xSetAPUDSP \n"); // pc + 8 + ot(" b S9xAPUSetByteFFtoF0 \n"); // pc + 12 + + ot("1: \n"); + ot(" bl S9xAPUSetByteFFC0 \n"); + ot(" ldr spc_ram, [context, #iapu_ram] \n"); + ot("3: \n"); + +} + +static void SetByteZ(int restore) { + ot(" ldr r2, [context, #iapu_directpage] \n"); + ot(" cmp r2, spc_ram \n"); + ot(" bne 2f \n"); + + ot(" cmp r1, #0xf0 \n"); + ot(" blo 2f \n"); + + ot(" cmp r1, #0xfe \n"); + ot(" bhs 1f \n"); + + if (restore) ot(" add lr, pc, #16\n"); + else ot(" add lr, pc, #20\n"); + + ot(" cmp r1, #0xf1 \n"); + ot(" beq S9xSetAPUControl \n"); + + ot(" cmp r1, #0xf3 \n"); // pc + 4 + ot(" beq S9xSetAPUDSP \n"); // pc + 8 + ot(" b S9xAPUSetByteFFtoF0 \n"); // pc + 12 + //ot("6: \n"); // pc + 16 + if (restore) { + ot(" ldr spc_ram, [context, #iapu_ram] \n"); + ot(" b 1f \n"); + } + ot("2: \n"); + ot(" strb r0, [r2, r1] \n"); + ot("1: \n"); +} + + +// r0-2: Temporary registers +// r3 : current opcode or temp +// r4 : Cycles remaining +// r5 : Pointer to IAPU structure +// r6 : Pointer to Opcode Jump table +// r7 : Current PC +// r8 : YA +// r9 : P (nzzzzzzz ........ ........ NODBHIZC; nzzzzzzz - NZ flag in use (for a little speedup) + +// r10 : X +// r11 : S +// r14 : temp +// lr : RAM pointer + +static void PrintFramework() +{ + + +#ifndef SPC_DEBUG + ot(" .extern IAPU\n"); +#else + ot(" .extern IAPU2\n"); +#endif + ot(" .extern CPU @ for STOP and SLEEP\n"); + ot(" .extern S9xAPUGetByte\n"); + ot(" .extern S9xAPUSetByte\n"); + ot(" .extern S9xAPUGetByteZ\n"); + ot(" .extern S9xAPUSetByteZ\n\n"); + + // bitrider + ot(" .extern S9xGetAPUDSP\n"); + ot(" .extern S9xSetAPUDSP\n"); + ot(" .extern S9xSetAPUControl\n"); + ot(" .extern S9xAPUSetByteFFC0\n"); + ot(" .extern S9xAPUSetByteFFtoF0\n"); + + ot(" .global spc700_execute @ int cycles\n"); + //ot(" .global Spc700JumpTab\n\n"); + for (current_cycles=0; current_cycles < (sizeof(one_apu_cycle) / sizeof(int)); current_cycles++) + ot(" .global Spc700JumpTab_%i\n", one_apu_cycle[current_cycles]); + ot("\n"); + + + ot(" opcode .req r3\n"); + ot(" cycles .req r4\n"); + ot(" context .req r5\n"); + ot(" opcodes .req r6\n"); + ot(" spc_pc .req r7\n"); + ot(" spc_ya .req r8\n"); + ot(" spc_p .req r9\n"); + ot(" spc_x .req r10\n"); + ot(" spc_s .req r11\n"); + ot(" spc_ram .req r12\n\n"); + + ot(" .equ iapu_directpage, 0x00\n"); + ot(" .equ iapu_ram, 0x44\n"); + ot(" .equ iapu_extraram, 0x48\n"); + ot(" .equ iapu_allregs_load, 0x30\n"); + ot(" .equ iapu_allregs_save, 0x34\n\n"); + + ot(" .equ flag_c, 0x01\n"); + ot(" .equ flag_z, 0x02\n"); + ot(" .equ flag_i, 0x04\n"); + ot(" .equ flag_h, 0x08\n"); + ot(" .equ flag_b, 0x10\n"); + ot(" .equ flag_d, 0x20\n"); + ot(" .equ flag_o, 0x40\n"); + ot(" .equ flag_n, 0x80\n\n"); + + ot(" .equ cpu_apu_executing, %i \n\n", APU_EXECUTING_OFF); + // tmp +// ot(" .equ iapu_carry, 0x24\n"); +// ot(" .equ iapu_overflow, 0x26\n\n"); + + ot("@ --------------------------- Framework --------------------------\n"); + ot(" .align 4\n"); + ot("spc700_execute: @ int cycles\n"); + + ot(" stmfd sp!,{r4-r11,lr}\n"); + +#ifndef SPC_DEBUG + ot(" ldr context,=IAPU @ Pointer to SIAPU struct\n"); +#else + ot(" ldr context,=IAPU2 @ Pointer to SIAPU struct\n"); +#endif + ot(" mov cycles,r0 @ Cycles\n"); + ot(" add r0,context,#iapu_allregs_load\n"); + ot(" ldmia r0,{opcodes,spc_pc,spc_ya,spc_p,spc_x,spc_ram}\n"); + + ot(" ldrb opcode,[spc_pc],#1 @ Fetch first opcode\n"); + ot(" mov spc_s,spc_x,lsr #8\n"); + ot(" and spc_x,spc_x,#0xff\n"); + ot("\n"); + + ot(" ldr pc,[opcodes,opcode,lsl #2] @ Jump to opcode handler\n"); + ot("\n\n"); + + + ot("@ We come back here after execution\n"); + ot("spc700End:\n"); + ot(" orr spc_x,spc_x,spc_s,lsl #8\n"); + ot(" add r0,context,#iapu_allregs_save\n"); + ot(" stmia r0,{spc_pc,spc_ya,spc_p,spc_x}\n"); + ot(" mov r0,cycles\n"); + ot(" ldmfd sp!,{r4-r11,pc}\n"); + ot("\n"); + + ot(" .ltorg\n"); + ot("\n"); + + GetAPUDSP(); +} + + +// --------------------------------------------------------------------------- + +// Trashes r0-r3 +static void MemHandler(int set, int z, int save) +{ + //if(set) ot(" bl S9xAPUSetByte%s\n", z ? "Z" : ""); + //else ot(" bl S9xAPUGetByte%s\n", z ? "Z" : ""); + + //if(set) ot(" asm_S9xAPUSetByte%s\n", z ? "Z" : ""); + //else ot(" asm_S9xAPUGetByte%s\n", z ? "Z" : ""); + if(set) { + if (z) SetByteZ(save); + else SetByte(save); + } else { + if (z) GetByteZ(); + else GetByte(); + } + + //if(save) ot(" ldr spc_ram,[context,#iapu_ram]\n"); +} + +// pushes reg, trashes r1 +static void Push(char *reg) +{ + ot(" add r1,spc_ram,spc_s\n"); + ot(" strb %s,[r1,#0x100]\n", reg); + ot(" sub spc_s,spc_s,#1\n"); +} + +// pushes r0, trashes r0,r1 +static void PushW() +{ + ot(" add r1,spc_ram,spc_s\n"); + ot(" sub spc_s,spc_s,#2\n"); + ot(" strb r0,[r1,#0xff]\n"); + ot(" mov r0,r0,lsr #8\n"); + ot(" strb r0,[r1,#0x100]\n"); +} + +// pops to reg +static void Pop(char *reg) +{ + ot(" add %s,spc_ram,spc_s\n", reg); + ot(" ldrb %s,[%s,#(0x100 + 1)]\n", reg, reg); + ot(" add spc_s,spc_s,#1\n"); +} + +// pops to r0, trashes r1 +static void PopW() +{ + ot(" add r1,spc_ram,spc_s\n"); + ot(" ldrb r0,[r1,#(0xff + 2)]\n"); + ot(" ldrb r1,[r1,#(0x100 + 2)]\n"); + ot(" add spc_s,spc_s,#2\n"); + ot(" orr r0,r0,r1,lsl #8\n"); +} + +// // rr <- absolute, trashes r14 +// rr <- absolute + +static void AbsoluteAdd(int r, char *rAdd) +{ + ot(" ldrb r%i,[spc_pc],#1\n", r); + ot(" ldrb r14,[spc_pc],#1\n"); + if (rAdd) ot(" add r%i,r%i,%s\n", r, r, rAdd); + ot(" add r%i,r%i,r14,lsl #8\n", r, r); +} + +// // rr <- absolute, trashes r14 +// rr <- absolute +static void Absolute(int r) +{ + //ot(" ldrb r%i,[spc_pc],#1\n", r); + //ot(" ldrb r14,[spc_pc],#1\n"); + //ot(" orr r%i,r%i,r14,lsl #8\n", r, r); + AbsoluteAdd(r, NULL); +} + + +// rr <- absoluteX, trashes r14 +static void AbsoluteX(int r) +{ + //Absolute(r); + //ot(" ldrb r%i,[spc_pc],#1\n", r); + //ot(" ldrb r14,[spc_pc],#1\n"); + //ot(" add r%i,r%i,spc_x\n", r, r); + //ot(" add r%i,r%i,r14,lsl #8\n", r, r); + AbsoluteAdd(r, "spc_x"); +} + +// r0 <- absoluteY, trashes r1 +static void AbsoluteY(int r) +{ + //Absolute(r); + //ot(" ldrb r%i,[spc_pc],#1\n", r); + //ot(" ldrb r14,[spc_pc],#1\n"); + //ot(" add r%i,r%i,spc_ya,lsr #8\n", r, r); + //ot(" add r%i,r%i,r14,lsl #8\n", r, r); + AbsoluteAdd(r, "spc_ya, lsr #8"); +} + +// rr <- IndirectIndexedY, trashes r14 +static void IndirectIndexedY(int r) +{ + ot(" ldrb r%i,[spc_pc],#1\n", r); + ot(" ldr r14,[context,#iapu_directpage]\n"); + ot(" ldrb r%i,[r14,r%i]!\n", r, r); + ot(" ldrb r14,[r14,#1]\n"); + //ot(" orr r%i,r%i,r14,lsl #8\n", r, r); + ot(" add r%i,r%i,spc_ya,lsr #8\n", r, r); + ot(" add r%i,r%i,r14,lsl #8\n", r, r); +} + +// rr <- address, trashes r14 +static void IndexedXIndirect(int r) +{ + ot(" ldrb r%i,[spc_pc],#1\n", r); + ot(" ldr r14,[context,#iapu_directpage]\n"); // again, interlocks are bad + ot(" add r%i,r%i,spc_x\n", r, r); + ot(" and r%i,r%i,#0xff\n", r, r); + ot(" ldrb r%i,[r14,r%i]!\n", r, r); + ot(" ldrb r14,[r14,#1]\n"); + ot(" orr r%i,r%i,r14,lsl #8\n", r, r); +} + +// sets ZN for reg in *reg, not suitable for Y +static void SetZN8(char *reg) +{ + ot(" and spc_p,spc_p,#0xff\n"); + ot(" orr spc_p,spc_p,%s,lsl #24\n", reg); +} + +// sets ZN for reg in *reg +static void SetZN16(char *reg) +{ + ot(" and spc_p,spc_p,#0xff\n"); + ot(" orr spc_p,spc_p,%s,lsl #16\n", reg); + ot(" tst %s,#0xff\n", reg); + ot(" orrne spc_p,spc_p,#0x01000000\n"); +} + +// does ROL on r0, sets flags +static void Rol() +{ + ot(" mov r0,r0,lsl #1\n"); + ot(" tst spc_p,#flag_c\n"); + ot(" orrne r0,r0,#1\n"); + ot(" tst r0,#0x100\n"); + ot(" orrne spc_p,spc_p,#flag_c\n"); + ot(" biceq spc_p,spc_p,#flag_c\n"); + SetZN8("r0"); +} + +// does ROR on r0, sets flags +static void Ror() +{ + ot(" tst spc_p,#flag_c\n"); + ot(" orrne r0,r0,#0x100\n"); + ot(" movs r0,r0,lsr #1\n"); + ot(" orrcs spc_p,spc_p,#flag_c\n"); + ot(" biccc spc_p,spc_p,#flag_c\n"); + SetZN8("r0"); +} + +// does ASL on r0, sets flags but doesn't cut the shifted bits +static void Asl() +{ + ot(" tst r0,#0x80\n"); + ot(" orrne spc_p,spc_p,#flag_c\n"); + ot(" biceq spc_p,spc_p,#flag_c\n"); + ot(" mov r0,r0,lsl #1\n"); + SetZN8("r0"); +} + +// does LSR on r0, sets flags +static void Lsr() +{ + ot(" tst r0,#0x01\n"); + ot(" orrne spc_p,spc_p,#flag_c\n"); + ot(" biceq spc_p,spc_p,#flag_c\n"); + ot(" mov r0,r0,lsr #1\n"); + SetZN8("r0"); +} + +// CMP rr0,rr1; trashes r14 +static void Cmp(char *r0, char *r1, int and_r0) +{ + char *lop = r0; + + if(and_r0) { ot(" and r14,%s,#0xff\n", r0); lop = "r14"; } + ot(" subs r14,%s,%s\n", lop, r1); + //ot(" orrge spc_p,spc_p,#flag_c\n"); + //ot(" biclt spc_p,spc_p,#flag_c\n"); + ot(" orrcs spc_p,spc_p,#flag_c\n"); + ot(" biccc spc_p,spc_p,#flag_c\n"); + SetZN8("r14"); +} + +// ADC rr0,rr1 -> rr0, trashes r2,r14, does not mask to byte +static void Adc(char *r0, char *r1) +{ + ot(" eor r2,%s,%s\n", r0, r1); // r3=(a) ^ (b) + ot(" movs r14, spc_p, lsr #1\n"); + ot(" adc %s, %s, %s\n", r0, r0, r1); + //ot(" add %s,%s,%s\n", r0, r0, r1); + //ot(" tst spc_p,#flag_c\n"); + //ot(" addne %s,%s,#1\n", r0, r0); + ot(" movs r14,%s,lsr #8\n", r0); + ot(" orrne spc_p,spc_p,#flag_c\n"); + ot(" biceq spc_p,spc_p,#flag_c\n"); + ot(" eor r14,%s,%s\n", r0, r1); // r14=(b) ^ Work16 + ot(" bic r14,r14,r2\n"); // ((b) ^ Work16) & ~((a) ^ (b)) + ot(" tst r14,#0x80\n"); + ot(" orrne spc_p,spc_p,#flag_o\n"); + ot(" biceq spc_p,spc_p,#flag_o\n"); + ot(" eor r14,r2,%s\n", r0); + ot(" tst r14,#0x10\n"); + ot(" orrne spc_p,spc_p,#flag_h\n"); + ot(" biceq spc_p,spc_p,#flag_h\n"); +} + +// SBC rr0,rr1 -> rr0, trashes r2,r3,r14, does not mask to byte +static void Sbc(char *r0, char *r1) +{ + ot(" movs r14,spc_p,lsr #1\n"); + ot(" sbcs r2,%s,%s\n", r0, r1); + ot(" orrge spc_p,spc_p,#flag_c\n"); + ot(" biclt spc_p,spc_p,#flag_c\n"); + ot(" eor r14,%s,r2\n", r0); // r14=(a) ^ Int16 + ot(" eor r3,%s,%s\n", r0, r1); // r3=(a) ^ (b) + ot(" and r14,r14,r3\n"); // ((a) ^ Work16) & ((a) ^ (b)) + ot(" tst r14,#0x80\n"); + ot(" orrne spc_p,spc_p,#flag_o\n"); + ot(" biceq spc_p,spc_p,#flag_o\n"); + ot(" eor r14,r3,r2\n"); + ot(" tst r14,#0x10\n"); + ot(" orreq spc_p,spc_p,#flag_h\n"); + ot(" bicne spc_p,spc_p,#flag_h\n"); + ot(" mov %s,r2\n", r0); +} + + +// +static void TCall() +{ + ot(" sub r0,spc_pc,spc_ram\n"); + PushW(); + ot(" ldr r0,[context,#iapu_extraram]\n"); + ot(" ldrh r0,[r0,#0x%x]\n", (15-(opcode>>4))<<1); + ot(" add spc_pc,spc_ram,r0\n"); +} + +// +static void SetClr1() +{ + ot(" ldrb r0,[spc_pc]\n"); + MemHandler(0, 1, 0); + ot(" %s r0,r0,#0x%02x\n", opcode & 0x10 ? "bic" : "orr", 1<<(opcode>>5)); + ot(" ldrb r1,[spc_pc],#1\n"); + MemHandler(1, 1, 1); +} + +// +static void BssBbc() +{ + ot(" ldrb r0,[spc_pc],#1\n"); + MemHandler(0, 1, 1); + ot(" tst r0,#0x%02x\n", 1<<(opcode>>5)); + ot(" add%s spc_pc,spc_pc,#1\n", opcode & 0x10 ? "ne" : "eq"); + ot(" ldr%ssb r0,[spc_pc],#1\n", opcode & 0x10 ? "eq" : "ne"); + ot(" sub%s cycles,cycles,#%i\n",opcode & 0x10 ? "eq" : "ne", one_apu_cycle[current_cycles]*2); + ot(" add%s spc_pc,spc_pc,r0\n", opcode & 0x10 ? "eq" : "ne"); +} + +// +static void Membit() +{ + ot(" ldrb r0,[spc_pc], #1\n"); + ot(" ldrb r3,[spc_pc], #1\n"); + //ot(" orr spc_x,spc_x,r1,lsl #(29-5) + ot(" add r3,r0,r3,lsl #8\n"); //@ store membit where it can survive memhandler call\n"); // saving bit 12 ? + //ot(" mov r1,r1,lsr #5\n"); + //ot(" mov r0,r0,lsl #19\n"); + //ot(" mov r0,r0,lsr #19\n"); + //if((opcode >> 4) >= 0xC) ot(" mov r3, r0\n"); //ot(" stmfd sp!,{r0}\n"); // membit + ot(" bic r0, r3, #0xe000\n"); // Clear bits 15, 14 & 13 => r0 = r0 & 0x1fff + MemHandler(0, 0, 0); + //ot(" mov r1,spc_x,lsr #29\n"); + //ot(" and spc_x,spc_x,#0xff\n"); + ot(" mov r1, r3, lsr #13\n"); // membit = bits[15:13] of memory address + if((opcode >> 4) < 0xC) { + ot(" mov r0,r0,lsr r1\n"); + ot(" tst r0,#1\n"); + switch(opcode >> 4) { + case 0x0: ot(" orrne spc_p,spc_p,#flag_c\n"); break; // OR1 C,membit + case 0x2: ot(" orreq spc_p,spc_p,#flag_c\n"); break; // OR1 C,not membit + case 0x4: ot(" biceq spc_p,spc_p,#flag_c\n"); break; // AND1 C,membit + case 0x6: ot(" bicne spc_p,spc_p,#flag_c\n"); break; // AND1 C, not membit + case 0x8: ot(" eorne spc_p,spc_p,#flag_c\n"); break; // EOR1 C, membit + case 0xA: ot(" orrne spc_p,spc_p,#flag_c\n"); // MOV1 C,membit + ot(" biceq spc_p,spc_p,#flag_c\n"); break; + } + } else { + ot(" mov r2,#1\n"); + ot(" mov r2,r2,lsl r1\n"); + if((opcode >> 4) == 0xC) { // MOV1 membit,C + ot(" tst spc_p,#flag_c\n"); + ot(" orrne r0,r0,r2\n"); + ot(" biceq r0,r0,r2\n"); + } else { // NOT1 membit + ot(" eor r0,r0,r2\n"); + } + //ot(" ldmfd sp!,{r1}\n"); + ot(" bic r1, r3, #0xe000\n"); // Clear bits 15, 14 & 13 => r0 = r0 & 0x1fff + MemHandler(1, 0, 0); + } + //ot(" ldr spc_ram,[context,#iapu_ram] @ restore what memhandler(s) messed up\n"); +} + +// +static void CBranch() +{ + int tests[] = { 0x80000000, 0x40, 0x01, 0xff000000 }; // NOCZ + char *eq = "eq"; + char *ne = "ne"; + + if((opcode>>6) == 3) { // zero test inverts everything + eq = "ne"; + ne = "eq"; + } + + ot(" tst spc_p,#0x%08X\n", tests[opcode>>6]); + ot(" add%s spc_pc,spc_pc,#1\n", opcode & 0x20 ? eq : ne); +/* + ot(" b%s Apu%02X\n", opcode & 0x20 ? eq : ne, opcode); + ot(" sub r0,spc_pc,spc_ram\n"); + ot(" ldrsb r1,[spc_pc],#1\n"); + ot(" add r0,r0,r1\n"); + ot(" mov r0,r0,lsl #16\n"); + ot(" add spc_pc,spc_ram,r0,lsr #16\n"); +*/ + ot(" ldr%ssb r0,[spc_pc],#1\n", opcode & 0x20 ? ne : eq); + + ot(" sub%s cycles,cycles,#%i\n", opcode & 0x20 ? ne : eq, one_apu_cycle[current_cycles]*2); + ot(" add%s spc_pc,spc_pc,r0\n", opcode & 0x20 ? ne : eq); +// ot("Apu%02X:\n", opcode); +} + +// NeededOperation spc_ya,r0 -> spc_ya +static void ArithOpToA() +{ + // special A pre-processing + if((opcode>>5) == 4 || (opcode>>5) == 5) { + ot(" and r1,spc_ya,#0xff00\n"); + ot(" and spc_ya,spc_ya,#0xff\n"); + } + + switch(opcode>>5) { + case 0: ot(" orr spc_ya,spc_ya,r0\n"); break; // OR + case 1: ot(" orr r0,r0,#0xff00\n"); + ot(" and spc_ya,spc_ya,r0\n"); break; // AND + case 2: ot(" eor spc_ya,spc_ya,r0\n"); break; // EOR + case 3: Cmp("spc_ya", "r0", 1); break; // CMP + case 4: Adc("spc_ya", "r0"); break; // ADC + case 5: Sbc("spc_ya", "r0"); break; // SBC + case 6: printf("MOV (reversed)!?\n"); break; // MOV (reversed) + case 7: ot(" and spc_ya,spc_ya,#0xff00\n"); + ot(" orr spc_ya,spc_ya,r0\n"); break; // MOV + } + + if((opcode>>5) != 3) SetZN8("spc_ya"); // only if not Cmp + + // special A post-processing + if((opcode>>5) == 4 || (opcode>>5) == 5) { + ot(" and spc_ya,spc_ya,#0xff\n"); + ot(" orr spc_ya,spc_ya,r1\n"); + } +} + +// +static void ArithmeticToA() +{ + switch(opcode&0x1f) { + case 0x04: // OP A,dp + ot(" ldrb r0,[spc_pc],#1\n"); + MemHandler(0, 1, 1); + ArithOpToA(); + break; + + case 0x05: // OP A,abs + Absolute(0); + MemHandler(0, 0, 1); + ArithOpToA(); + break; + + case 0x06: // OP A,(X) + ot(" mov r0,spc_x\n"); + MemHandler(0, 1, 1); + ArithOpToA(); + break; + + case 0x07: // OP A,(dp+X) + IndexedXIndirect(0); + MemHandler(0, 0, 1); + ArithOpToA(); + break; + + case 0x08: // OP A,#00 + ot(" ldrb r0,[spc_pc],#1\n"); + ArithOpToA(); + break; + + case 0x14: // OP A,dp+X + ot(" ldrb r0,[spc_pc],#1\n"); + ot(" add r0,r0,spc_x\n"); + MemHandler(0, 1, 1); + ArithOpToA(); + break; + + case 0x15: // OP A,abs+X + AbsoluteX(0); + MemHandler(0, 0, 1); + ArithOpToA(); + break; + + case 0x16: // OP A,abs+Y + AbsoluteY(0); + MemHandler(0, 0, 1); + ArithOpToA(); + break; + + case 0x17: // OP A,(dp)+Y + IndirectIndexedY(0); + MemHandler(0, 0, 1); + ArithOpToA(); + break; + + default: + printf("Op %02X - arithmetic??\n", opcode); + } +} + +void printOpcodes(int apu_cycles) { + for(opcode = 0; opcode < 0x100; opcode++) { + printf("%02X", opcode); + + ot("\n\n"); + //tmp_prologue(); + ot("Apu%02X_%i:\n", opcode, apu_cycles); + + if((opcode & 0x1f) == 0x10) CBranch(); // BXX + if((opcode & 0x0f) == 0x01) TCall(); // TCALL X + if((opcode & 0x0f) == 0x02) SetClr1(); // SET1/CLR1 direct page bit X + if((opcode & 0x0f) == 0x03) BssBbc(); // BBS/BBC direct page bit X + if((opcode & 0x1f) == 0x0A) Membit(); // membit ops + if((opcode & 0x0f) >= 0x04 && (opcode & 0x0f) <= 0x08 && (opcode & 0x1f) != 0x18 && (opcode >> 5) != 6) + ArithmeticToA(); + + + switch(opcode) { + case 0x00: // NOP + break; + + case 0x3F: // CALL absolute + Absolute(2); + ot(" sub r0,spc_pc,spc_ram\n"); + PushW(); + ot(" add spc_pc,spc_ram,r2\n"); + break; + + case 0x4F: // PCALL $XX + ot(" ldrb r2,[spc_pc],#1\n"); + ot(" sub r0,spc_pc,spc_ram\n"); + PushW(); + ot(" add spc_pc,spc_ram,r2\n"); + ot(" add spc_pc,spc_pc,#0xff00\n"); + break; + + case 0x09: // OR dp(dest),dp(src) + ot(" ldrb r0,[spc_pc],#1\n"); + MemHandler(0, 1, 0); + //ot(" orr spc_x,spc_x,r0,lsl #24 @ save from harm\n"); + ot(" mov r3, r0\n"); + ot(" ldrb r0,[spc_pc]\n"); + MemHandler(0, 1, 0); + ot(" orr r0, r0, r3\n"); + //ot(" orr r0,r0,spc_x,lsr #24\n"); + //ot(" and spc_x,spc_x,#0xff\n"); + SetZN8("r0"); + ot(" ldrb r1,[spc_pc],#1\n"); + MemHandler(1, 1, 1); + break; + + case 0x18: // OR dp,#00 + ot(" ldrb r0,[spc_pc,#1]\n"); + MemHandler(0, 1, 0); + ot(" ldrb r1,[spc_pc],#1\n"); + ot(" orr r0,r0,r1\n"); + SetZN8("r0"); + ot(" ldrb r1,[spc_pc],#1\n"); + MemHandler(1, 1, 1); + break; + + case 0x19: // OR (X),(Y) + ot(" mov r0,spc_x\n"); + MemHandler(0, 1, 0); + //ot(" orr spc_x,spc_x,r0,lsl #24\n"); + ot(" mov r3, r0\n"); + ot(" mov r0,spc_ya,lsr #8\n"); + MemHandler(0, 1, 0); + ot(" orr r0, r3, r0\n"); + //ot(" orr r0,r0,spc_x,lsr #24\n"); + //ot(" and spc_x,spc_x,#0xff\n"); + SetZN8("r0"); + ot(" mov r1,spc_x\n"); + MemHandler(1, 1, 1); + break; + + case 0x0B: // ASL dp + ot(" ldrb r0,[spc_pc]\n"); + MemHandler(0, 1, 0); + Asl(); + ot(" ldrb r1,[spc_pc],#1\n"); + MemHandler(1, 1, 1); + break; + + case 0x0C: // ASL abs + Absolute(0); + //ot(" stmfd sp!,{r0}\n"); + ot(" mov r3, r0\n"); + MemHandler(0, 0, 0); + Asl(); + //ot(" ldmfd sp!,{r1}\n"); + ot(" mov r1, r3\n"); + MemHandler(1, 0, 1); + break; + + case 0x1B: // ASL dp+X + ot(" ldrb r0,[spc_pc],#1\n"); + ot(" add r0,r0,spc_x\n"); + //ot(" stmfd sp!,{r0}\n"); + ot(" mov r3, r0\n"); + MemHandler(0, 1, 0); + Asl(); + //ot(" ldmfd sp!,{r1}\n"); + ot(" mov r1, r3\n"); + MemHandler(1, 1, 1); + break; + + case 0x1C: // ASL A + ot(" tst spc_ya,#0x80\n"); + ot(" orrne spc_p,spc_p,#flag_c\n"); + ot(" biceq spc_p,spc_p,#flag_c\n"); + ot(" and r0,spc_ya,#0x7f\n"); + ot(" and spc_ya,spc_ya,#0xff00\n"); + ot(" orr spc_ya,spc_ya,r0,lsl #1\n"); + SetZN8("spc_ya"); + break; + + case 0x0D: // PUSH PSW + ot(" mov r0,spc_p,lsr #24\n"); + ot(" and r1,r0,#0x80\n"); + ot(" tst r0,r0\n"); + ot(" orreq r1,r1,#flag_z\n"); + ot(" and spc_p,spc_p,#0x7d @ clear N & Z\n"); + ot(" orr spc_p,spc_p,r1\n"); + Push("spc_p"); + otb(" orr spc_p,spc_p,r0,lsl #24\n"); + break; + + case 0x2D: // PUSH A + Push("spc_ya"); + break; + + case 0x4D: // PUSH X + Push("spc_x"); + break; + + case 0x6D: // PUSH Y + ot(" mov r0,spc_ya,lsr #8\n"); + Push("r0"); + break; + + case 0x8E: // POP PSW + Pop("spc_p"); + ot(" and r0,spc_p,#(flag_z|flag_n)\n"); + ot(" eor r0,r0,#flag_z\n"); + ot(" orr spc_p,spc_p,r0,lsl #24\n"); + ot(" tst spc_p,#flag_d\n"); + ot(" addne r0,spc_ram,#0x100\n"); + ot(" moveq r0,spc_ram\n"); + otb(" str r0,[context,#iapu_directpage]\n"); + break; + + case 0xAE: // POP A + Pop("r0"); + ot(" and spc_ya,spc_ya,#0xff00\n"); + otb(" orr spc_ya,spc_ya,r0\n"); + break; + + case 0xCE: // POP X + Pop("spc_x"); + break; + + case 0xEE: // POP X + Pop("r0"); + ot(" and spc_ya,spc_ya,#0xff\n"); + otb(" orr spc_ya,spc_ya,r0,lsl #8\n"); + break; + + case 0x0E: // TSET1 abs + Absolute(0); + ot(" mov r3, r0\n"); + //ot(" orr spc_x,spc_x,r0,lsl #16 @ save from memhandler\n"); + MemHandler(0, 0, 0); + ot(" and r2,r0,spc_ya\n"); + SetZN8("r2"); + ot(" orr r0,r0,spc_ya\n"); + ot(" mov r1, r3\n"); + //ot(" mov r1,spc_x,lsr #16\n"); + //ot(" and spc_x,spc_x,#0xff\n"); + MemHandler(1, 0, 1); + break; + + case 0x4E: // TCLR1 abs + Absolute(0); + ot(" mov r3, r0\n"); + //ot(" orr spc_x,spc_x,r0,lsl #16 @ save from memhandler\n"); + MemHandler(0, 0, 0); + ot(" and r2,r0,spc_ya\n"); + SetZN8("r2"); + ot(" bic r0,r0,spc_ya\n"); + ot(" mov r1, r3\n"); + //ot(" mov r1,spc_x,lsr #16\n"); + //ot(" and spc_x,spc_x,#0xff\n"); + MemHandler(1, 0, 1); + break; + + case 0x0F: // BRK + ot(" sub r0,spc_pc,spc_ram\n"); + PushW(); + ot(" mov r0,spc_p,lsr #24\n"); + ot(" and r1,r0,#0x80\n"); + ot(" tst r0,r0\n"); + ot(" orrne r1,r1,#flag_z\n"); + ot(" and spc_p,spc_p,#0x7d @ clear N & Z\n"); + ot(" orr spc_p,spc_p,r1\n"); + Push("spc_p"); + ot(" orr spc_p,spc_p,#flag_b\n"); + ot(" bic spc_p,spc_p,#flag_i\n"); + ot(" ldr r0,[context,#iapu_extraram]\n"); + ot(" ldrh r0,[r0,#0x20]\n"); + ot(" add spc_pc,spc_ram,r0\n"); + break; + + case 0xEF: // SLEEP + case 0xFF: // STOP: this is to be compatible with yoyofr's code + //ot(" ldr r0,=CPU\n"); + ot(" ldr r0, 5001f\n", apu_cycles); + ot(" mov r1,#0\n"); + //otb(" strb r1,[r0,#122]\n"); + otb(" str r1,[r0,#cpu_apu_executing]\n"); + //tmp_epilogue(); + ot(" subs cycles,cycles,#%i\n", S9xAPUCycles[opcode] * one_apu_cycle[current_cycles]); + ot(" ldrgeb opcode,[spc_pc],#1\n"); + flush_buffer(); + ot(" ldrge pc,[opcodes,opcode,lsl #2]\n"); + ot(" b spc700End\n"); + // don't let code flow until here + ot("5001:\n", apu_cycles); + ot(" .long CPU \n"); + break; + + case 0x2F: // BRA + ot(" ldrsb r0,[spc_pc],#1\n"); + ot(" add spc_pc,spc_pc,r0\n"); + break; + + case 0x80: // SETC + otb(" orr spc_p,spc_p,#flag_c\n"); + break; + + case 0xED: // NOTC + otb(" eor spc_p,spc_p,#flag_c\n"); + break; + + case 0x40: // SETP + ot(" orr spc_p,spc_p,#flag_d\n"); + ot(" add r0,spc_ram,#0x100\n"); + otb(" str r0,[context,#iapu_directpage]\n"); + break; + + case 0x1A: // DECW dp + ot(" ldrb r0,[spc_pc]\n"); + MemHandler(0, 1, 0); + //ot(" stmfd sp!,{r0}\n"); + ot(" mov r3, r0\n"); + ot(" ldrb r0,[spc_pc]\n"); + ot(" add r0,r0,#1\n"); + MemHandler(0, 1, 0); + //ot(" ldmfd sp!,{r1}\n"); + ot(" orr r1,r3,r0,lsl #8\n"); + ot(" sub r0,r1,#1\n"); + SetZN16("r0"); + ot(" stmfd sp!,{r0}\n"); + ot(" ldrb r1,[spc_pc]\n"); + MemHandler(1, 1, 0); + ot(" ldmfd sp!,{r0}\n"); + ot(" mov r0,r0,lsr #8\n"); + ot(" ldrb r1,[spc_pc],#1\n"); + + ot(" add r1,r1,#1\n"); + MemHandler(1, 1, 1); + break; + + case 0x5A: // CMPW YA,dp + ot(" ldrb r0,[spc_pc]\n"); + MemHandler(0, 1, 0); + //ot(" stmfd sp!,{r0}\n"); + ot(" mov r3, r0\n"); + ot(" ldrb r0,[spc_pc],#1\n"); + ot(" add r0,r0,#1\n"); + MemHandler(0, 1, 1); + //ot(" ldmfd sp!,{r1}\n"); + ot(" orr r1,r3,r0,lsl #8\n"); + ot(" subs r0,spc_ya,r1\n"); + ot(" orrge spc_p,spc_p,#flag_c\n"); + ot(" biclt spc_p,spc_p,#flag_c\n"); + SetZN16("r0"); + break; + + case 0x3A: // INCW dp + ot(" ldrb r0,[spc_pc]\n"); + MemHandler(0, 1, 0); + //ot(" stmfd sp!,{r0}\n"); + ot(" mov r3, r0\n"); + ot(" ldrb r0,[spc_pc]\n"); + ot(" add r0,r0,#1\n"); + MemHandler(0, 1, 0); + //ot(" ldmfd sp!,{r1}\n"); + ot(" orr r1,r3,r0,lsl #8\n"); + ot(" add r0,r1,#1\n"); + SetZN16("r0"); + ot(" stmfd sp!,{r0}\n"); + ot(" ldrb r1,[spc_pc]\n"); + MemHandler(1, 1, 0); + ot(" ldmfd sp!,{r0}\n"); + ot(" mov r0,r0,lsr #8\n"); + ot(" ldrb r1,[spc_pc],#1\n"); + ot(" add r1,r1,#1\n"); + MemHandler(1, 1, 1); + break; + + case 0x7A: // ADDW YA,dp + ot(" ldrb r0,[spc_pc]\n"); + MemHandler(0, 1, 0); + //ot(" stmfd sp!,{r0}\n"); + ot(" mov r3, r0\n"); + ot(" ldrb r0,[spc_pc],#1\n"); + ot(" add r0,r0,#1\n"); + MemHandler(0, 1, 1); + //ot(" ldmfd sp!,{r1}\n"); + ot(" orr r1,r3,r0,lsl #8\n"); + ot(" add r0,spc_ya,r1\n"); + ot(" movs r2,r0,lsr #16\n"); + ot(" orrne spc_p,spc_p,#flag_c\n"); + ot(" biceq spc_p,spc_p,#flag_c\n"); + ot(" bic r2,r0,#0x00ff0000\n"); + ot(" eor r3,r1,r2\n"); // Work16 ^ (uint16) Work32 + ot(" eor r14,spc_ya,r1\n"); + ot(" mvn r14,r14\n"); // ~(pIAPU->YA.W ^ Work16) + ot(" and r14,r14,r3\n"); + ot(" tst r14,#0x8000\n"); + ot(" orrne spc_p,spc_p,#flag_o\n"); + ot(" biceq spc_p,spc_p,#flag_o\n"); + ot(" eor r14,r3,spc_ya\n"); + ot(" tst r14,#0x10\n"); + ot(" orrne spc_p,spc_p,#flag_h\n"); + ot(" biceq spc_p,spc_p,#flag_h\n"); + ot(" mov spc_ya,r2\n"); + SetZN16("spc_ya"); + + break; + + case 0x9A: // SUBW YA,dp + ot(" ldrb r0,[spc_pc]\n"); + MemHandler(0, 1, 0); + //ot(" stmfd sp!,{r0}\n"); + ot(" mov r3, r0\n"); + ot(" ldrb r0,[spc_pc],#1\n"); + ot(" add r0,r0,#1\n"); + MemHandler(0, 1, 1); + //ot(" ldmfd sp!,{r1}\n"); + ot(" orr r1,r3,r0,lsl #8\n"); + ot(" subs r0,spc_ya,r1\n"); + ot(" orrge spc_p,spc_p,#flag_c\n"); + ot(" biclt spc_p,spc_p,#flag_c\n"); + ot(" mov r2,r0,lsl #16\n"); + ot(" mov r2,r2,lsr #16\n"); // r2=(uint16) Int32 + ot(" eor r3,spc_ya,r2\n"); // r3=pIAPU->YA.W ^ (uint16) Int32 + ot(" eor r14,spc_ya,r1\n"); + ot(" and r14,r14,r3\n"); + ot(" tst r14,#0x8000\n"); + ot(" orrne spc_p,spc_p,#flag_o\n"); + ot(" biceq spc_p,spc_p,#flag_o\n"); + ot(" eor r14,r3,r1\n"); + ot(" tst r14,#0x10\n"); + ot(" bicne spc_p,spc_p,#flag_h\n"); + ot(" orreq spc_p,spc_p,#flag_h\n"); + ot(" mov spc_ya,r2\n"); + SetZN16("spc_ya"); + break; + + case 0xBA: // MOVW YA,dp + ot(" ldrb r0,[spc_pc]\n"); + MemHandler(0, 1, 0); + ot(" ldrb r1, [spc_pc],#1\n"); + ot(" mov spc_ya, r0\n"); // avoiding inter-locks + ot(" add r0, r1, #1\n"); + MemHandler(0, 1, 1); + ot(" orr spc_ya,spc_ya,r0,lsl #8\n"); + SetZN16("spc_ya"); + break; + + case 0xDA: // MOVW dp,YA + ot(" ldrb r1,[spc_pc]\n"); + ot(" mov r0,spc_ya\n"); + MemHandler(1, 1, 0); + ot(" ldrb r1,[spc_pc],#1\n"); + ot(" mov r0,spc_ya,lsr #8\n"); // avoiding inter-locks + ot(" add r1,r1,#1\n"); + MemHandler(1, 1, 1); + break; + + case 0x69: // CMP dp(dest), dp(src) + ot(" ldrb r0,[spc_pc],#1\n"); + MemHandler(0, 1, 0); + ot(" orr spc_x,spc_x,r0,lsl #24\n"); + ot(" ldrb r0,[spc_pc],#1\n"); + MemHandler(0, 1, 1); + ot(" mov r1,spc_x,lsr #24\n"); + Cmp("r0", "r1", 0); + otb(" and spc_x,spc_x,#0xff\n"); + break; + + case 0x78: // CMP dp,#00 + ot(" ldrb r0,[spc_pc,#1]\n"); + MemHandler(0, 1, 1); + ot(" ldrb r1,[spc_pc],#2\n"); + Cmp("r0", "r1", 0); + break; + + case 0x79: // CMP (X),(Y) + ot(" mov r0,spc_x\n"); + MemHandler(0, 1, 0); + ot(" orr spc_x,spc_x,r0,lsl #24\n"); + ot(" mov r0,spc_ya,lsr #8\n"); + MemHandler(0, 1, 1); + ot(" mov r1,spc_x,lsr #24\n"); + Cmp("r1", "r0", 0); + otb(" and spc_x,spc_x,#0xff\n"); + break; + + case 0x1E: // CMP X,abs + Absolute(0); + MemHandler(0, 0, 1); + Cmp("spc_x", "r0", 0); + break; + + case 0x3E: // CMP X,dp + ot(" ldrb r0,[spc_pc],#1\n"); + + MemHandler(0, 1, 1); + Cmp("spc_x", "r0", 0); + break; + + case 0xC8: // CMP X,#00 + ot(" ldrb r0,[spc_pc],#1\n"); + Cmp("spc_x", "r0", 0); + break; + + case 0x5E: // CMP Y,abs + Absolute(0); + MemHandler(0, 0, 1); + ot(" mov r1,spc_ya,lsr #8\n"); + Cmp("r1", "r0", 0); + break; + + case 0x7E: // CMP Y,dp + ot(" ldrb r0,[spc_pc],#1\n"); + MemHandler(0, 1, 1); + ot(" mov r1,spc_ya,lsr #8\n"); + Cmp("r1", "r0", 0); + break; + + case 0xAD: // CMP Y,#00 + ot(" ldrb r0,[spc_pc],#1\n"); + ot(" mov r1,spc_ya,lsr #8\n"); + Cmp("r1", "r0", 0); + break; + + case 0x1F: // JMP (abs+X) + AbsoluteX(0); + ot(" sub sp,sp,#8\n"); + ot(" str r0,[sp,#4]\n"); + MemHandler(0, 0, 0); + ot(" str r0,[sp]\n"); + ot(" ldr r0,[sp,#4]\n"); + ot(" add r0,r0,#1\n"); + MemHandler(0, 0, 1); + ot(" ldr r1,[sp],#8\n"); + ot(" orr r0,r1,r0,lsl #8\n"); + ot(" add spc_pc,spc_ram,r0\n"); + break; + + case 0x5F: // JMP abs + //Absolute(0); + //ot(" add spc_pc,spc_ram,r0\n"); + ot(" ldrb r0, [spc_pc], #1\n"); + ot(" ldrb r14, [spc_pc], #1\n"); + ot(" add spc_pc, r0, spc_ram\n"); + ot(" add spc_pc, spc_pc, r14, lsl #8\n"); + break; + + case 0x20: // CLRP + ot(" bic spc_p,spc_p,#flag_d\n"); + otb(" str spc_ram,[context,#iapu_directpage]\n"); + break; + + case 0x60: // CLRC + otb(" bic spc_p,spc_p,#flag_c\n"); + break; + + case 0xE0: // CLRV + otb(" bic spc_p,spc_p,#(flag_o|flag_h)\n"); + break; + + case 0x29: // AND dp(dest), dp(src) + ot(" ldrb r0,[spc_pc],#1\n"); + MemHandler(0, 1, 0); + //ot(" stmfd sp!,{r0}\n"); + ot(" mov r3, r0\n"); + ot(" ldrb r0,[spc_pc]\n"); + MemHandler(0, 1, 0); + //ot(" ldmfd sp!,{r1}\n"); + ot(" and r0,r0,r3\n"); + SetZN8("r0"); + ot(" ldrb r1,[spc_pc],#1\n"); + MemHandler(1, 1, 1); + break; + + case 0x38: // AND dp,#00 + ot(" ldrb r0,[spc_pc,#1]\n"); + MemHandler(0, 1, 0); + ot(" ldrb r1,[spc_pc],#2\n"); + ot(" and r0,r0,r1\n"); + SetZN8("r0"); + ot(" ldrb r1,[spc_pc,#-1]\n"); + MemHandler(1, 1, 1); + break; + + case 0x39: // AND (X),(Y) + ot(" mov r0,spc_x\n"); + MemHandler(0, 1, 0); + //ot(" stmfd sp!,{r0}\n"); + ot(" mov r3, r0\n"); + ot(" mov r0,spc_ya,lsr #8\n"); + MemHandler(0, 1, 0); + //ot(" ldmfd sp!,{r1}\n"); + ot(" and r0,r0,r3\n"); + SetZN8("r0"); + ot(" mov r1,spc_x\n"); + MemHandler(1, 1, 1); + break; + + case 0x2B: // ROL dp + ot(" ldrb r0,[spc_pc]\n"); + MemHandler(0, 1, 0); + Rol(); + ot(" ldrb r1,[spc_pc],#1\n"); + MemHandler(1, 1, 1); + break; + + case 0x2C: // ROL abs + Absolute(0); + //ot(" stmfd sp!,{r0}\n"); + ot(" mov r3, r0\n"); + MemHandler(0, 0, 0); + Rol(); + //ot(" ldmfd sp!,{r1}\n"); + ot(" mov r1, r3\n"); + MemHandler(1, 0, 1); + break; + + case 0x3B: // ROL dp+X + ot(" ldrb r0,[spc_pc]\n"); + ot(" add r0,r0,spc_x\n"); + MemHandler(0, 1, 0); + Rol(); + ot(" ldrb r1,[spc_pc],#1\n"); + ot(" add r1,r1,spc_x\n"); + MemHandler(1, 1, 1); + break; + + case 0x3C: // ROL A + ot(" and r0,spc_ya,#0xff\n"); + Rol(); + ot(" and r0,r0,#0xff\n"); + ot(" mov spc_ya,spc_ya,lsr #8\n"); + otb(" orr spc_ya,r0,spc_ya,lsl #8\n"); + break; + + case 0x2E: // CBNE dp,rel + ot(" ldrb r0,[spc_pc],#1\n"); + MemHandler(0, 1, 1); + ot(" and r1,spc_ya,#0xff\n"); + ot(" cmp r0,r1\n"); + ot(" addeq spc_pc,spc_pc,#1\n"); + ot(" ldrnesb r0,[spc_pc],#1\n"); + ot(" subne cycles,cycles,#%i\n", one_apu_cycle[current_cycles]*2); + ot(" addne spc_pc,spc_pc,r0\n"); + break; + + case 0xDE: // CBNE dp+X,rel + ot(" ldrb r0,[spc_pc],#1\n"); + ot(" add r0,r0,spc_x\n"); + MemHandler(0, 1, 1); + ot(" and r1,spc_ya,#0xff\n"); + ot(" cmp r0,r1\n"); + ot(" addeq spc_pc,spc_pc,#1\n"); + ot(" ldrnesb r0,[spc_pc],#1\n"); + ot(" addne spc_pc,spc_pc,r0\n"); + ot(" subne cycles,cycles,#%i\n", one_apu_cycle[current_cycles]*2); + break; + + case 0x3D: // INC X + ot(" add spc_x,spc_x,#1\n"); + ot(" and spc_x,spc_x,#0xff\n"); + SetZN8("spc_x"); + break; + + case 0xFC: // INC Y + ot(" mov r0,spc_ya,lsr #8\n"); + ot(" add r0,r0,#1\n"); + ot(" and r0,r0,#0xff\n"); + SetZN8("r0"); + ot(" and spc_ya,spc_ya,#0xff\n"); + otb(" orr spc_ya,spc_ya,r0,lsl #8\n"); + break; + + case 0x1D: // DEC X + ot(" sub spc_x,spc_x,#1\n"); + ot(" and spc_x,spc_x,#0xff\n"); + SetZN8("spc_x"); + break; + + case 0xDC: // DEC Y + ot(" mov r0,spc_ya,lsr #8\n"); + ot(" sub r0,r0,#1\n"); + ot(" and r0,r0,#0xff\n"); + SetZN8("r0"); + ot(" and spc_ya,spc_ya,#0xff\n"); + otb(" orr spc_ya,spc_ya,r0,lsl #8\n"); + break; + + case 0xAB: // INC dp + ot(" ldrb r0,[spc_pc]\n"); + MemHandler(0, 1, 0); + ot(" add r0,r0,#1\n"); + SetZN8("r0"); + ot(" ldrb r1,[spc_pc],#1\n"); + MemHandler(1, 1, 1); + break; + + case 0xAC: // INC abs + Absolute(0); + //ot(" stmfd sp!,{r0}\n"); + ot(" mov r3, r0\n"); + MemHandler(0, 0, 0); + ot(" add r0,r0,#1\n"); + SetZN8("r0"); + //ot(" ldmfd sp!,{r1}\n"); + ot(" mov r1, r3\n"); + MemHandler(1, 0, 1); + break; + + case 0xBB: // INC dp+X + ot(" ldrb r0,[spc_pc]\n"); + ot(" add r0,r0,spc_x\n"); + MemHandler(0, 1, 0); + ot(" add r0,r0,#1\n"); + SetZN8("r0"); + ot(" ldrb r1,[spc_pc],#1\n"); + ot(" add r1,r1,spc_x\n"); + MemHandler(1, 1, 1); + break; + + case 0xBC: // INC A + ot(" and r0,spc_ya,#0xff\n"); + ot(" add r0,r0,#1\n"); + SetZN8("r0"); + ot(" and r0,r0,#0xff\n"); + ot(" mov spc_ya,spc_ya,lsr #8\n"); + otb(" orr spc_ya,r0,spc_ya,lsl #8\n"); + break; + + case 0x8B: // DEC dp + ot(" ldrb r0,[spc_pc]\n"); + MemHandler(0, 1, 0); + ot(" sub r0,r0,#1\n"); + SetZN8("r0"); + ot(" ldrb r1,[spc_pc],#1\n"); + MemHandler(1, 1, 1); + break; + + case 0x8C: // DEC abs + Absolute(0); + //ot(" stmfd sp!,{r0}\n"); + ot(" mov r3, r0\n"); + MemHandler(0, 0, 0); + ot(" sub r0,r0,#1\n"); + SetZN8("r0"); + //ot(" ldmfd sp!,{r1}\n"); + ot(" mov r1, r3\n"); + MemHandler(1, 0, 1); + break; + + case 0x9B: // DEC dp+X + ot(" ldrb r0,[spc_pc]\n"); + ot(" add r0,r0,spc_x\n"); + MemHandler(0, 1, 0); + ot(" sub r0,r0,#1\n"); + SetZN8("r0"); + ot(" ldrb r1,[spc_pc],#1\n"); + + ot(" add r1,r1,spc_x\n"); + MemHandler(1, 1, 1); + break; + + case 0x9C: // DEC A + ot(" and r0,spc_ya,#0xff\n"); + ot(" sub r0,r0,#1\n"); + SetZN8("r0"); + ot(" and r0,r0,#0xff\n"); + ot(" mov spc_ya,spc_ya,lsr #8\n"); + otb(" orr spc_ya,r0,spc_ya,lsl #8\n"); + break; + + case 0x49: // EOR dp(dest), dp(src) + ot(" ldrb r0,[spc_pc],#1\n"); + MemHandler(0, 1, 0); + //ot(" stmfd sp!,{r0}\n"); + ot(" mov r3, r0\n"); + ot(" ldrb r0,[spc_pc]\n"); + MemHandler(0, 1, 0); + //ot(" ldmfd sp!,{r1}\n"); + ot(" eor r0,r0,r3\n"); + SetZN8("r0"); + ot(" ldrb r1,[spc_pc],#1\n"); + MemHandler(1, 1, 1); + break; + + case 0x58: // EOR dp,#00 + ot(" ldrb r0,[spc_pc,#1]\n"); + MemHandler(0, 1, 0); + ot(" ldrb r1,[spc_pc],#2\n"); + ot(" eor r0,r0,r1\n"); + SetZN8("r0"); + ot(" ldrb r1,[spc_pc,#-1]\n"); + MemHandler(1, 1, 1); + break; + + case 0x59: // EOR (X),(Y) + ot(" mov r0,spc_x\n"); + MemHandler(0, 1, 0); + //ot(" stmfd sp!,{r0}\n"); + ot(" mov r3, r0\n"); + ot(" mov r0,spc_ya,lsr #8\n"); + MemHandler(0, 1, 0); + //ot(" ldmfd sp!,{r1}\n"); + ot(" eor r0,r0,r3\n"); + SetZN8("r0"); + ot(" mov r1,spc_x\n"); + MemHandler(1, 1, 1); + break; + + case 0x4B: // LSR dp + ot(" ldrb r0,[spc_pc]\n"); + MemHandler(0, 1, 0); + Lsr(); + ot(" ldrb r1,[spc_pc],#1\n"); + MemHandler(1, 1, 1); + break; + + case 0x4C: // LSR abs + Absolute(0); + //ot(" stmfd sp!,{r0}\n"); + ot(" mov r3, r0\n"); + MemHandler(0, 0, 0); + Lsr(); + //ot(" ldmfd sp!,{r1}\n"); + ot(" mov r1, r3\n"); + MemHandler(1, 0, 1); + break; + + case 0x5B: // LSR dp+X + ot(" ldrb r0,[spc_pc]\n"); + ot(" add r0,r0,spc_x\n"); + MemHandler(0, 1, 0); + Lsr(); + ot(" ldrb r1,[spc_pc],#1\n"); + ot(" add r1,r1,spc_x\n"); + MemHandler(1, 1, 1); + break; + + case 0x5C: // LSR A + ot(" and r0,spc_ya,#0xff\n"); + Lsr(); + ot(" mov spc_ya,spc_ya,lsr #8\n"); + otb(" orr spc_ya,r0,spc_ya,lsl #8\n"); + break; + + case 0x7D: // MOV A,X + ot(" and spc_ya,spc_ya,#0xff00\n"); + ot(" orr spc_ya,spc_ya,spc_x\n"); + SetZN8("spc_ya"); + break; + + case 0xDD: // MOV A,Y + ot(" and spc_ya,spc_ya,#0xff00\n"); + ot(" orr spc_ya,spc_ya,spc_ya,lsr #8\n"); + SetZN8("spc_ya"); + break; + + case 0x5D: // MOV X,A + ot(" and spc_x,spc_ya,#0xff\n"); + SetZN8("spc_x"); + break; + + case 0xFD: // MOV Y,A + ot(" and spc_ya,spc_ya,#0xff\n"); + ot(" orr spc_ya,spc_ya,spc_ya,lsl #8\n"); + SetZN8("spc_ya"); + break; + + case 0x9D: // MOV X,SP + ot(" mov spc_x,spc_s\n"); + SetZN8("spc_x"); + break; + + case 0xBD: // SP,X + otb(" mov spc_s,spc_x\n"); + break; + + case 0x6B: // ROR dp + ot(" ldrb r0,[spc_pc]\n"); + MemHandler(0, 1, 0); + Ror(); + ot(" ldrb r1,[spc_pc],#1\n"); + MemHandler(1, 1, 1); + break; + + case 0x6C: // ROR abs + Absolute(0); + //ot(" stmfd sp!,{r0}\n"); + ot(" mov r3, r0\n"); + MemHandler(0, 0, 0); + Ror(); + ot(" mov r1, r3\n"); + //ot(" ldmfd sp!,{r1}\n"); + MemHandler(1, 0, 1); + break; + + case 0x7B: // ROR dp+X + ot(" ldrb r0,[spc_pc]\n"); + ot(" add r0,r0,spc_x\n"); + MemHandler(0, 1, 0); + Ror(); + ot(" ldrb r1,[spc_pc],#1\n"); + ot(" add r1,r1,spc_x\n"); + MemHandler(1, 1, 1); + break; + + case 0x7C: // ROR A + ot(" and r0,spc_ya,#0xff\n"); + Ror(); + ot(" mov spc_ya,spc_ya,lsr #8\n"); + otb(" orr spc_ya,r0,spc_ya,lsl #8\n"); + break; + + case 0x6E: // DBNZ dp,rel + ot(" ldrb r0,[spc_pc]\n"); + MemHandler(0, 1, 0); + ot(" ldrb r1,[spc_pc],#1\n"); + ot(" sub r0,r0,#1\n"); + ot(" tst r0,r0\n"); + ot(" addeq spc_pc,spc_pc,#1\n"); + ot(" ldrnesb r2,[spc_pc],#1\n"); + ot(" addne spc_pc,spc_pc,r2\n"); + ot(" subne cycles,cycles,#%i\n", one_apu_cycle[current_cycles]*2); + MemHandler(1, 1, 1); + break; + + case 0xFE: // DBNZ Y,rel + ot(" sub spc_ya,spc_ya,#0x100\n"); + ot(" mov spc_ya,spc_ya,lsl #16\n"); + ot(" mov spc_ya,spc_ya,lsr #16\n"); + ot(" movs r0,spc_ya,lsr #8\n"); + ot(" addeq spc_pc,spc_pc,#1\n"); + ot(" ldrnesb r0,[spc_pc],#1\n"); + ot(" addne spc_pc,spc_pc,r0\n"); + ot(" subne cycles,cycles,#%i\n", one_apu_cycle[current_cycles]*2); + break; + + case 0x6F: // RET + PopW(); + ot(" add spc_pc,spc_ram,r0\n"); + break; + + case 0x7F: // RETI + Pop("spc_p"); + ot(" and r0,spc_p,#(flag_z|flag_n)\n"); + ot(" eor r0,r0,#flag_z\n"); + ot(" orr spc_p,spc_p,r0,lsl #24\n"); + ot(" tst spc_p,#flag_d\n"); + ot(" addne r0,spc_ram,#0x100\n"); + ot(" moveq r0,spc_ram\n"); + ot(" str r0,[context,#iapu_directpage]\n"); + PopW(); + ot(" add spc_pc,spc_ram,r0\n"); + break; + + case 0x89: // ADC dp(dest), dp(src) + ot(" ldrb r0,[spc_pc],#1\n"); + MemHandler(0, 1, 0); + //ot(" stmfd sp!,{r0}\n"); + ot(" mov r3, r0\n"); + ot(" ldrb r0,[spc_pc]\n"); + MemHandler(0, 1, 0); + //ot(" ldmfd sp!,{r1}\n"); + //ot(" mov r1, r3\n"); + Adc("r0", "r3"); + SetZN8("r0"); + ot(" ldrb r1,[spc_pc],#1\n"); + MemHandler(1, 1, 1); + break; + + case 0x98: // ADC dp,#00 + ot(" ldrb r0,[spc_pc,#1]\n"); + MemHandler(0, 1, 0); + ot(" ldrb r1,[spc_pc],#2\n"); + Adc("r0", "r1"); + SetZN8("r0"); + ot(" ldrb r1,[spc_pc,#-1]\n"); + MemHandler(1, 1, 1); + break; + + case 0x99: // ADC (X),(Y) + ot(" mov r0,spc_x\n"); + MemHandler(0, 1, 0); + //ot(" stmfd sp!,{r0}\n"); + ot(" mov r3, r0\n"); + ot(" mov r0,spc_ya,lsr #8\n"); + MemHandler(0, 1, 0); + //ot(" ldmfd sp!,{r1}\n"); + //ot(" mov r1, r3\n"); + Adc("r0", "r3"); + SetZN8("r0"); + ot(" mov r1,spc_x\n"); + MemHandler(1, 1, 1); + break; + + case 0x8D: // MOV Y,#00 //-REVISAR + ot(" ldrb r0,[spc_pc],#1\n"); + ot(" and spc_ya,spc_ya,#0xff\n"); + ot(" orr spc_ya,spc_ya,r0,lsl #8\n"); + SetZN8("r0"); + break; + + case 0x8F: // MOV dp,#00 //-REVISAR + ot(" ldrb r0,[spc_pc],#1\n"); + ot(" ldrb r1,[spc_pc],#1\n"); + MemHandler(1, 1, 1); + break; + + case 0x9E: // DIV YA,X + ot(" tst spc_x,spc_x @ div by 0?\n"); + ot(" orreq spc_ya,spc_ya,#0xff00\n"); + ot(" orreq spc_ya,spc_ya,#0x00ff\n"); + ot(" orreq spc_p,spc_p,#flag_o\n"); + ot(" beq 1002f\n"); + ot(" bic spc_p,spc_p,#flag_o\n"); + + // division algo from Cyclone (result in r3, remainder instead of divident) + ot("@ Divide spc_ya by spc_x\n"); + ot(" mov r3,#0\n"); + ot(" mov r1,spc_x\n"); + ot("\n"); + + // + /*ot("@ Shift up divisor till it's just less than numerator\n"); + ot("divshift:\n"); + ot(" cmp r1,spc_ya,lsr #1\n"); + ot(" movls r1,r1,lsl #1\n"); + ot(" bcc divshift\n"); + ot("\n");*/ + + //optimised version of code provided by William Blair + ot("@ Shift up divisor till it's just less than numerator\n"); + ot("cmp spc_ya,r1,lsl #8\n"); + ot("movge r1,r1,lsl #8\n"); + ot("cmp spc_ya,r1,lsl #4\n"); + ot("movge r1,r1,lsl #4\n"); + ot("cmp spc_ya,r1,lsl #2\n"); + ot("movge r1,r1,lsl #2\n"); + ot("cmp spc_ya,r1,lsl #1\n"); + ot("movge r1,r1,lsl #1\n"); + + ot("1001:\n"); + ot(" cmp spc_ya,r1\n"); + ot(" adc r3,r3,r3 ;@ Double r3 and add 1 if carry set\n"); + ot(" subcs spc_ya,spc_ya,r1\n"); + ot(" teq r1,spc_x\n"); + ot(" movne r1,r1,lsr #1\n"); + ot(" bne 1001b\n"); + ot("\n"); + + ot(" and spc_ya,spc_ya,#0xff\n"); + ot(" and r3,r3,#0xff\n"); + ot(" orr spc_ya,r3,spc_ya,lsl #8\n"); + + ot("1002:\n"); + SetZN8("spc_ya"); + break; + + case 0x9F: // XCN A + ot(" and r0,spc_ya,#0xff\n"); + ot(" mov r1,r0,lsl #28\n"); + ot(" orr r0,r1,r0,lsl #20\n"); + ot(" and spc_ya,spc_ya,#0xff00\n"); + ot(" orr spc_ya,spc_ya,r0,lsr #24\n"); + SetZN8("spc_ya"); + break; + + case 0xA9: // SBC dp(dest), dp(src) + ot(" ldrb r0,[spc_pc],#1\n"); + MemHandler(0, 1, 0); + //ot(" stmfd sp!,{r0}\n"); + ot(" mov r3, r0\n"); + ot(" ldrb r0,[spc_pc]\n"); + MemHandler(0, 1, 0); + //ot(" ldmfd sp!,{r1}\n"); + //ot(" mov r1, r3\n"); + Sbc("r0", "r3"); + SetZN8("r0"); + ot(" ldrb r1,[spc_pc],#1\n"); + MemHandler(1, 1, 1); + break; + + case 0xB8: // SBC dp,#00 + ot(" ldrb r0,[spc_pc,#1]\n"); + MemHandler(0, 1, 0); + ot(" ldrb r1,[spc_pc],#2\n"); + Sbc("r0", "r1"); + SetZN8("r0"); + ot(" ldrb r1,[spc_pc,#-1]\n"); + MemHandler(1, 1, 1); + break; + + case 0xB9: // SBC (X),(Y) + ot(" mov r0,spc_x\n"); + MemHandler(0, 1, 0); + //ot(" stmfd sp!,{r0}\n"); + ot(" mov r3, r0\n"); + ot(" mov r0,spc_ya,lsr #8\n"); + MemHandler(0, 1, 0); + //ot(" ldmfd sp!,{r1}\n"); + //ot(" mov r1, r3\n"); + Sbc("r0", "r3"); + SetZN8("r0"); + ot(" mov r1,spc_x\n"); + MemHandler(1, 1, 1); + break; + + case 0xAF: // MOV (X)+, A + ot(" mov r0,spc_ya\n"); + ot(" mov r1,spc_x\n"); + MemHandler(1, 1, 1); + ot(" add spc_x,spc_x,#1\n"); + otb(" and spc_x,spc_x,#0xff\n"); + break; + + case 0xBE: // DAS + ot(" and r0,spc_ya,#0xff\n"); + ot(" and r1,spc_ya,#0x0f\n"); + ot(" cmp r1,#9\n"); + ot(" subhi r0,r0,#6\n"); + ot(" tstls spc_p,#flag_h\n"); + ot(" subeq r0,r0,#6\n"); + ot(" cmp r0,#0x9f\n"); + ot(" bhi 2001f\n"); + ot(" tst spc_p,#flag_c\n"); + ot(" beq 2001f\n"); + ot(" orr spc_p,spc_p,#flag_c\n"); + ot(" b 2002f\n"); + ot("2001:\n"); // tens + ot(" sub r0,r0,#0x60\n"); + ot(" bic spc_p,spc_p,#flag_c\n"); + + ot("2002:\n"); // end + ot(" and spc_ya,spc_ya,#0xff00\n"); + ot(" orr spc_ya,spc_ya,r0\n"); + SetZN8("spc_ya"); + break; + + case 0xBF: // MOV A,(X)+ + ot(" mov r0,spc_x\n"); + MemHandler(0, 1, 1); + ot(" and spc_ya,spc_ya,#0xff00\n"); + ot(" orr spc_ya,spc_ya,r0\n"); + ot(" add spc_x,spc_x,#1\n"); + ot(" and spc_x,spc_x,#0xff\n"); + SetZN8("spc_ya"); + break; + + case 0xC0: // DI + otb(" bic spc_p,spc_p,#flag_i\n"); + break; + + case 0xA0: // EI + otb(" orr spc_p,spc_p,#flag_i\n"); + break; + + case 0xC4: // MOV dp,A + ot(" ldrb r1,[spc_pc],#1\n"); + ot(" mov r0,spc_ya\n"); + MemHandler(1, 1, 1); + break; + + case 0xC5: // MOV abs,A + Absolute(1); + ot(" mov r0,spc_ya\n"); + MemHandler(1, 0, 1); + break; + + case 0xC6: // MOV (X),A + ot(" mov r0,spc_ya\n"); + ot(" mov r1,spc_x\n"); + MemHandler(1, 1, 1); + break; + + case 0xC7: // MOV (dp+X),A + IndexedXIndirect(1); + ot(" mov r0,spc_ya\n"); + MemHandler(1, 0, 1); + break; + + case 0xC9: // MOV abs,X + Absolute(1); + ot(" mov r0,spc_x\n"); + MemHandler(1, 0, 1); + break; + + case 0xCB: // MOV dp,Y + ot(" ldrb r1,[spc_pc],#1\n"); + ot(" mov r0,spc_ya,lsr #8\n"); + MemHandler(1, 1, 1); + break; + + case 0xCC: // MOV abs,Y + + Absolute(1); + ot(" mov r0,spc_ya,lsr #8\n"); + MemHandler(1, 0, 1); + break; + + case 0xCD: // MOV X,#00 + ot(" ldrb spc_x,[spc_pc],#1\n"); + SetZN8("spc_x"); + break; + + case 0xCF: // MUL YA + ot(" mov r0,spc_ya,lsr #8\n"); + ot(" and spc_ya,spc_ya,#0xff\n"); + ot(" mul spc_ya,r0,spc_ya\n"); + SetZN16("spc_ya"); + break; + + case 0xD4: // MOV dp+X, A + ot(" ldrb r1,[spc_pc],#1\n"); + ot(" mov r0,spc_ya\n"); + ot(" add r1,r1,spc_x\n"); + MemHandler(1, 1, 1); + break; + + case 0xD5: // MOV abs+X,A + AbsoluteX(1); + ot(" mov r0,spc_ya\n"); + MemHandler(1, 0, 1); + break; + + case 0xD6: // MOV abs+Y,A + AbsoluteY(1); + ot(" mov r0,spc_ya\n"); + MemHandler(1, 0, 1); + break; + + case 0xD7: // MOV (dp)+Y,A + IndirectIndexedY(1); + ot(" mov r0,spc_ya\n"); + MemHandler(1, 0, 1); + break; + + case 0xD8: // MOV dp,X + ot(" ldrb r1,[spc_pc],#1\n"); + ot(" mov r0,spc_x\n"); + MemHandler(1, 1, 1); + break; + + case 0xD9: // MOV dp+Y,X + ot(" ldrb r1,[spc_pc],#1\n"); + ot(" mov r0,spc_x\n"); + ot(" add r1,r1,spc_ya,lsr #8\n"); + MemHandler(1, 1, 1); + break; + + case 0xDB: // MOV dp+X,Y + ot(" ldrb r1,[spc_pc],#1\n"); + ot(" mov r0,spc_ya,lsr #8\n"); + ot(" add r1,r1,spc_x\n"); + MemHandler(1, 1, 1); + break; + + case 0xDF: // DAA + ot(" and r0,spc_ya,#0xff\n"); + ot(" and r1,spc_ya,#0x0f\n"); + ot(" cmp r1,#9\n"); + ot(" addhi r0,r0,#6\n"); + ot(" bls 3001f\n"); + ot(" cmphi r0,#0xf0\n"); + ot(" orrhi spc_p,spc_p,#flag_c\n"); + ot(" b 3002f\n"); + ot("3001:\n"); // testHc + ot(" tst spc_p,#flag_h\n"); + ot(" addne r0,r0,#6\n"); + ot(" beq 3002f\n"); + ot(" cmp r0,#0xf0\n"); + ot(" orrhi spc_p,spc_p,#flag_c\n"); + ot("3002:\n"); // test2 + ot(" tst spc_p,#flag_c\n"); + ot(" addne r0,r0,#0x60\n"); + ot(" bne 3003f\n"); + ot(" cmp r0,#0x9f\n"); + ot(" addhi r0,r0,#0x60\n"); + ot(" orrhi spc_p,spc_p,#flag_c\n"); + ot(" bicls spc_p,spc_p,#flag_c\n"); + ot("3003:\n"); // end + ot(" and spc_ya,spc_ya,#0xff00\n"); + ot(" orr spc_ya,spc_ya,r0\n"); + SetZN8("spc_ya"); + break; + + case 0xE9: // MOV X, abs + Absolute(0); + MemHandler(0, 0, 1); + ot(" mov spc_x,r0\n"); + SetZN8("spc_x"); + break; + + case 0xEB: // MOV Y,dp + ot(" ldrb r0,[spc_pc],#1\n"); + MemHandler(0, 1, 1); + ot(" and spc_ya,spc_ya,#0xff\n"); + ot(" orr spc_ya,spc_ya,r0,lsl #8\n"); + SetZN8("r0"); + break; + + case 0xEC: // MOV Y,abs + Absolute(0); + MemHandler(0, 0, 1); + ot(" and spc_ya,spc_ya,#0xff\n"); + ot(" orr spc_ya,spc_ya,r0,lsl #8\n"); + SetZN8("r0"); + break; + + case 0xF8: // MOV X,dp + ot(" ldrb r0,[spc_pc],#1\n"); + MemHandler(0, 1, 1); + ot(" mov spc_x,r0\n"); + SetZN8("spc_x"); + break; + + case 0xF9: // MOV X,dp+Y + ot(" ldrb r0,[spc_pc],#1\n"); + ot(" add r0,r0,spc_ya,lsr #8\n"); + MemHandler(0, 1, 1); + ot(" mov spc_x,r0\n"); + SetZN8("spc_x"); + break; + + case 0xFA: // MOV dp(dest),dp(src) + ot(" ldrb r0,[spc_pc],#1\n"); + MemHandler(0, 1, 0); + ot(" ldrb r1,[spc_pc],#1\n"); + MemHandler(1, 1, 1); + break; + + case 0xFB: // MOV Y,dp+X + ot(" ldrb r0,[spc_pc],#1\n"); + ot(" add r0,r0,spc_x\n"); + MemHandler(0, 1, 1); + ot(" and spc_ya,spc_ya,#0xff\n"); + ot(" orr spc_ya,spc_ya,r0,lsl #8\n"); + SetZN8("r0"); + break; + } + + //tmp_epilogue(); + ot(" subs cycles,cycles,#%i\n", S9xAPUCycles[opcode] * one_apu_cycle[current_cycles]); + ot(" ldrgeb opcode,[spc_pc],#1\n"); + flush_buffer(); + ot(" ldrge pc,[opcodes,opcode,lsl #2]\n"); + ot(" b spc700End\n"); + + printf("\b\b"); + } + + + ot("\n\n"); + +} + + +void printJumpTable(int apu_cycles) { + int i; + ot("@ -------------------------- Jump Table %i --------------------------\n", apu_cycles); + ot("Spc700JumpTab_%i:\n", apu_cycles); + + for (i=0; i < 0x100; i++) + { + if ((i&7)==0) ot(" .long "); + + ot("Apu%02X_%i", i, apu_cycles); + + if ((i&7)==7) ot(" @ %02x\n",i-7); + else if (i+1 < 0x100) ot(", "); + } + +} + +int main() +{ + printf("\n notaz's SPC700 Emulator v%s - Core Creator\n\n", VERSION); + + // Open the assembly file + AsmFile=fopen("spc700a.s", "wt"); if (AsmFile==NULL) return 1; + + ot("@ notaz's SPC700 Emulator v%s - Assembler Output\n\n", VERSION); + ot("@ (c) Copyright 2006 notaz, All rights reserved.\n\n"); + ot("@ Modified by bitrider 2010 - 2011\n\n"); + ot("@ this is a rewrite of spc700.cpp in ARM asm, inspired by other asm CPU cores like\n"); + ot("@ Cyclone and DrZ80. It is meant to be used in Snes9x emulator ports for ARM platforms.\n\n"); + ot("@ the code is released under Snes9x license. See spcgen.c or any other source file\n@ from Snes9x source tree.\n\n\n"); + + PrintFramework(); + + ot(" .align 4\n"); + + for (current_cycles=0; current_cycles < (sizeof(one_apu_cycle) / sizeof(int)); current_cycles++) { + printOpcodes(one_apu_cycle[current_cycles]); + printJumpTable(one_apu_cycle[current_cycles]); + } + + + fclose(AsmFile); AsmFile=NULL; + + printf("Assembling...\n"); + // Assemble the file + //system("as -marmv4t -mthumb-interwork -o spc700a.o spc700a.S"); + printf("Done!\n\n"); + + return 0; +} diff --git a/src/rel/menu_header.bmp b/src/rel/menu_header.bmp deleted file mode 100644 index 6066978..0000000 Binary files a/src/rel/menu_header.bmp and /dev/null differ diff --git a/src/rel/readme.txt b/src/rel/readme.txt deleted file mode 100644 index 43e4104..0000000 --- a/src/rel/readme.txt +++ /dev/null @@ -1,347 +0,0 @@ -DrPocketSnes -Super Nintendo (SNES) Emulator -by Reesy - -DrPocketSnes is a Super Nintendo (SNES) emulator for the GP2X and Gizmondo. I've taken bits from PocketSnes and SquidgeSnes and merged them into another new emulator. I then stuck my menu system on it and called it my own :) you've got to love porting stuff. - -So credits for this emulator should really go to. - -Snes9x Team for creating the original Snes9x emulator -http://www.snes9x.com/ - -Scott Ramsby for PocketSnes port based on Snes9x sources -http://paqpark.nuclearfallout.net/projects/pocketsnes.php - -Yoyofr for OpenSnes9x port based on Snes9x sources -http://yoyofr.fr.st/ - -Squidge for the SquidgeSnes port based on OpenSnes9x -http://squidge2x.com/ - -Notaz for his fixes and improvements to SquidgeSnes. -http://notaz.atspace.com/ - -Rlyeh for his work on the gp2x (not so)minimal sdk -http://www.retrodev.info/ - -Reesy for merging everything and sticking a menu on it...the really complicated stuff ;). -http://reesy.gp32x.de/ - -==================== -IMPORTANT -When upgrading from v4 to v5 you will need to manually move the savestate files (*.sv*) from the options directory into the savestate directory and the SRAM files (*.srm) from the root installation directory into the sram directory. See change history for more details. -==================== - -============== -Change History -============== - -___________________________________ -Version 7.1.0 Release Date 28/10/2010 -___________________________________ -Changes by Bitrider - -- Added: Tv-Out compatiblity. - Thanks to XiM for the Ext connector used to make my Tv-Out cable, which made this feature possible. -- Internal changes: - Lots of code refactoring, make my life easier. - A new saner Makefile. - -___________________________________ -Version 7.0.1 Release Date ??/09/2010 -___________________________________ -Changes by Bitrider - -- Bug-fix release (Mode-7, priorities, sprites, etc) - -___________________________________ -Version 7.0.0 Release Date 30/07/2010 -___________________________________ -Changes by Bitrider - - Thanks goes to: - Buba-ho-tep, Rivroner (beta testers) - Anarchy (GP32Spain webmaster & conding contest promoter) - Head-On-Heels (v 6.5.0 developer) - Notaz, Squidge, Little Johnz & all those who contributed to this wonderful emulator. - -- Added: deep changes to SPC 700 assembly core, now it is faster. - - moved a few registers - - less reads/writes to memory - - implemented GetByteZ, GetByte, SetByteZ & SetByte in ARM assembly -- Added: modifications to 65c816 assembly core, a little bit faster. - - moved several flags from memory to status register. - - implemented SetPCBase in ARM assembly. - - SetDSP & GetDSP called directly (S9x_SetDSP & S9x_GetDSP where just wrapper functions with no added value). - - Assembly CPU code splitted in several files (modularity purposes) -- Added: 4 different assembly APU (SPC 700) cycle sizes: 13, 14, 15 & 21. - Now more games are compatible with fast executable & fast mode on compatible executable : - Human's ones (Firemen, ...), Secret of evermore, Clock Tower (yeah, I know it's also by Human but a special case) that one is for you Buba. -- Added: 16 bit fast assembly renderers for: - tile: opaque, add, add 1/2, add fix 1/2, sub, sub 1/2, sub fix 1/2 - tile clipped: opaque, add, add 1/2, add fix 1/2, sub, sub 1/2, sub fix 1/2 - mode 7 just one layer: solid, solid with priority, add, add 1/2, sub, sub 1/2 - mode 7 with priorities (two layers): solid, add, add 1/2, sub, sub 1/2. - subscreen filling: solid, add, add 1/2, sub, sub 1/2 -- Added: SpeedHacks (rom patching with snesadvance.dat) to fast executable -- Added: a switch to enable/disable speed hacks, "Apply snesadvance.dat on ROM load". -- Added: Super FX emulation to fast executable version. -- Added: last played ROM loading at PocketSNES startup -- Added: a switch to enable/disable last played ROM loading at startup -- Added: persistent selector in ROM list selector - Last selected ROM will continue being focused when you launch a ROM - and go back to the menu to select another ROM. (idea by Buba-ho-tep, thanks man.) - It does work only when you are in default PocketSNES ROM directory -- Added: display ROM file name while loading. -- Added: on ROM load error display error, pause & show "Push a button to continue". -- Added: fast version (65c816 assembly emulation) will show as "v 7.0.0 fast" - compatible version (65c816 C emulation) will show as "v 7.0.0 compatible" -- Added: the ability to use Fast (assembly SPC-700) or Compatible (C SPC-700), more games playable on fast executable. - - So "Emulation (Reset Required): Compatible/Fast" switch is now available on fast executable. -- Fixed: Auto save SRAM should only save when a change occurred -- Added: "Manual + indicator" to SRAM saving options - A disk will be displayed on the lower right corner of the screen when SRAM data is awaiting - Note: disk won't be visible if screen is resized -- Added: a little bit optimized sound block decode routine. - - -___________________________________ -Version 6.5.0 Release Date 24/10/2009 -___________________________________ -Changes by HeadOverHeels - 1. Optimizations in mode 7 and other code optimizations - 2. Horizontal scaler - - FAST VERSION - ------------ - 3. Increased compatibility: star ocean, rendering ranger, etc. - 4. More games are compatible with audio performance hack - - NORMAL VERSION - -------------- - 5. Full SuperFX and SA-1 emulation - 6. Snesadvance.dat speedhacks support - 7. 2 sound emulation modes: compatible and fast - -___________________________________ -Version 6.4.5 Release Date 06/06/2009 -___________________________________ -Changes by HeadOverHeels - 1. Ported to GP2X WIZ - 2. Optimizations in C4 emulation - -___________________________________ -Version 6.4.4 Release Date 16/11/2008 -___________________________________ -Changes by Reesy - 1. Zipped save states - 2. Rom Browser code tidied, you can now set the default directory - from inside the rom browser. The rom browser now also tells - you the current directory. -Changes by HeadOverHeels - 1. Fixed some bugs in layer priority (super ghouls'n ghosts level 4 for example) - 2. Optimizations in tile rendering code, ppu emulation, ... - 3. Changes in volume control to be more usable with headphones in firmware 4.0.0 and louder with firmware 4.1.1 - 4. Fixed: some games do not work if you don't restart the emulator - 5. Menu now sets cpu clock to 66 mhz to save battery - -___________________________________ -Version 6.4.3 Release Date 23/02/2008 -___________________________________ -Changes by HeadOverHeels - 1. USB pads support - 2. Fixed sky colour for Super Mario World when transparencies are not active. - 3. Fixed framerate for PAL games (50 fps) and added an option to configure region (AUTO, NTSC, PAL) - 4. Fixed sound problems with some games (Ilussion of Gaia for exmaple) - 5. Sound frequencies have been changed (8250,16500) to make GP2X F200 compatible - 6. 256x240 games resolution problem have been fixed - 7. C4 chip support (Megaman X2, X3) - 8. High resolution text support (Seiken Densetsu 3 - Secret of Mana2) - 9. Added DSP optimizations from snes9xTYL of Yoyofr. - 10. F200 sound level now is lower - 11. SDD1 support (Star Ocean & Street Fighter Alpha 2) - SDD1 decompressed packs are supported. SDD1GFX.DAT & SDD1GFX.IDX must be copied to a subdirectory named socnsdd1 (for Star Ocean) and sfa2sdd1 (for Street Fighter 2 alpha). Create these subdirectories in the roms directory. - If no packs are found, the emulator uses realtime decompression (slower) - 12. Other minor fixes and optimizations. - 13. Added stereo sound. - 14. New advanced hacks options: - Audio performance hack - Ignore palette writes - Ignore Fixed Colour - Ignore Windows clipping - Ignore Add/Sub modes - Layer desactivation - -Changes by Reesy -___________________________________ -Version 6 Release Date 04/02/2007 -___________________________________ - 1. Fixed a bug on the rom browsing code. Strings were not being terminated correctly. -___________________________________ -Version 5 Release Date 03/02/2007 -___________________________________ - 1. Changed the way SRAM works. The old versions of PocketSnes used a timer to check if SRAM had changed while the SNES emulator was running. If a change was detected the SRAM was saved straight away. This used to cause glitches in the framerate. SRAM is now saved when you enter the menu as long as you have SRAM saving set to automatic in the options menu. - 2. Added options to allow you to switch MMU hack on or off - 3. Added options to allow you to switch Craigx's RAM settings on or off. - 4. Fixed problems where data was not being saved to SD card correctly, I was missing a few calls to sync() - 5. I've tidied up the installation directory abit. Most things used to be stored in the options sub directory and somethings were saved to the root installation directory, which was a bit of a mess. So I've now created the following 3 directories in order to make things more logical. - - options (*.opt) - used to hold global and individual game settings - savestate (*.sv*) - used to hold save states for all games - sram (*.srm) - used to hold SRAM saves for all games - - This means that we you upgrade from Version 4 to Version 5 you will need to manually copy the savestates out of the options directory and into the savestate directory in order for PocketSnes to recognise them. You will also have to move the SRAM files out of the root -installation directory and into the sram directory. -___________________________________ -Version 4 Release Date 30/01/2007 -___________________________________ - 1. Fixed timer code which was causing the emulator to crash -___________________________________ -Version 3 Release Date 24/01/2007 -___________________________________ - 1. Scaled display mode added. - 2. 44K sound mode added. - 3. Super FX support added - very very buggy and slow -___________________________________ -Version 2 Release Date 24/01/2007 -___________________________________ - 1. Fixed Diagnals. - 2. Fixed Volume controls. - 3. Fixed Reset game function. - 4. Snes Select button now working. -___________________________________ -Version 1 Release Date 24/01/2007 -___________________________________ - Initial release - -========================= -Installation Instructions -========================= - -Along with this document you are reading you should have also received the following files - -PocketSnes.gpe - PocketSnes emulator -mmuhack.o - Additional module used to hack MMU and improve performance. - -Simply copy these files onto your SD card, the files can go anywhere but both files need to be in the same directory. I recommend putting the in a directory of their own because when the emulator first starts up it will create several subdirectories which are used to store options, savestates and SRAM saves. - -So for example create a directory called DrPocketSnes and then copy the PocketSnes.gpe and mmuhack.o files into the DrPocketSnes directory. - -Now you need to copy some SNES roms to you SD card. Again you can put your roms anywhere you like on your SD card, you just need to configure DrPocketSnes to point at your rom directory. To do this follow the instructions below - -1. Start PocketSnes -2. Select "Select Rom" from the menu. -3. This will take you by default to the current working directory (e.g the directory where you installed DrPocketSnes /mnt/sd/DrPocketSnes. -4. You now need to browse through the file system to find your rom directory. -5. To do this select ".." to move up and directory or select any entries that start with "+". Entries that start with "+" are directories, so selecting takes you into that directory. -6. Once you have located your rom directory, you need to save the current directory as your default rom directory. -7. To do this select the "Back To Main Menu" menu option. -8. Then select "SNES Options" -9. Then select "Save Current Rom Directory" -10. This will store the current rom directory in a text file held in the options directory. So the next time you start PocketSnes and select "Select Rom" you will be taken straight to your rom directory. - -============ -Menu Options -============ -_______________________________________________ -Return To Game - If you have a rom loaded this will allow to exit the menu and return to the game. -_______________________________________________ -Select Rom - Takes you to the Rom Selection screen which allows you load a new game. -_______________________________________________ -Manage Save States - Takes you to the save state management screen. Save states allow you to save your current position in the currently loaded game. This means that you can reload a particular position in the game as many times as you want. -_______________________________________________ -Save Sram - Allows you save the current contents of SRAM to a file. SRAM is the battery backup ram which used to be on the Snes cartridges. This allowed high scores or game progress, so that the next time you loaded the snes game you could continue where you left off. If you plan to use save states then you don't need to worry about SRAM saves as the save state holds all of this information as well. -_______________________________________________ -SNES Options - Takes you into the options screen which allows you to customise how the emulator runs. See "SNES Options - In Detail" for more information on each of the settings. -_______________________________________________ -Reset Game - Allows you to reset the current rom, its the same as reloading the rom apart from you don't have to read the rom file from the SD card again. -_______________________________________________ -Exit Application - Exits PocketSnes and reloaded the GP2X menu. -_______________________________________________ - -======================== -SNES Options - In Detail -======================== -_______________________________________________ -Sound - Allows you to turn the sound on or off -_______________________________________________ -Sound Rate - Allows you to configure the sample rate of the sound emulation. The high the rate the clearer and more accurate the sound. -_______________________________________________ -Volumne - Allows you setup default volume levels. Volume can also be controlled using the volume controls on the GP2X. -_______________________________________________ -Cpu Speed - Allows you select the GP2X cpu speed to be used when emulating the Snes. The higher the cpu speed the smoother the emulation is ( plus it drains you battery more) -_______________________________________________ -FrameSkip - Allows you to control how many frames are not rendered, this can allow you to keep full speed emulation when at low cpu speeds. AUTO will skip as many frames as needed in order to maintain full speed emulation. -_______________________________________________ -Action Buttons - The GP2X has the same button as the snes but the buttons are in the wrong order. This option allows you to have the same button names as the snes, or to have the same button positions as snes. - NORMAL = same button names as Snes - SWAPPED = same button positions as Snes -_______________________________________________ -Show FPS - This allows you to see how man frames are being rendered per second. This can allow you to see how the emulator is performing. -_______________________________________________ -Brightness - This allows you to control the current brightness of the screen. You can make it darker or brighter. -_______________________________________________ -Transparencies - The SNES has very complicated graphics hardware which can be quite slow to emulate. Switching off transparencies can improve performce but makes some games unplayable because you can not see all of the information that you need. -_______________________________________________ -Render Mode - Allows you to scale the emulated SNES graphics. The normal SNES screen resolution is less than the GP2X's, so when in unscaled mode the graphics appear in a window. If you select the scaled mode then the graphics are stretched to fill the screen. -_______________________________________________ -RAM Timing - This allows you select faster ram timings. This can improve performance. If you change this option you need to restart PocketSnes because these settings are only applied as the emulator is first started. -_______________________________________________ -MMU Hack - This option allows you to enable the MMU hack developed by Squidge. This option massively improves performance and is recommended. Again if you change this option you need to restart PocketSnes because these settings are only applied as the emulator is first started. -_______________________________________________ -Saving SRAM - This option allows you to control how the SRAM is saved to you SD card. If you select automatic then SRAM will be saved automatically everytime you return to the menu if it has been modified during the last run of emulation. If you select the manual option then SRAM will only be saved when you select the Save SRAM menu option from the main menu. -_______________________________________________ -Load Global Settings - This option will reload the global settings. Global Settings affect all games as long as the games does not have a setting file of its own ( See Load Settings for current game). -_______________________________________________ -Save Global Settings - This option allows you to save the current settings to the SD card. Everytime you load a new rom these settings will be reloaded, so basically they become you default settings. This can be overwritten using the "Save Settings For Current Game" option which allows you to save a config file for a particular rom. So each time you load the rom these settings will automatically be loaded. -_______________________________________________ -Delete Global Settings - Deletes any global setting file that has been created. If you have no global setting file then PocketSnes will use its own internal default settings when loading a new rom. -_______________________________________________ -Load Settings For Current Game - This option will load any setting file associated with the currently loaded rom. -_______________________________________________ -Save Settings For Current Game - This option allows you to save a config file for the currently loaded rom. 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Syukumei no Taikets|0|0|0|0|0|0 -F0ECDD92|Roger Clemens' MVP Baseball (U)|0|44808|0|0|0|0|A2E5D=42,A2E68=42,A5F0C=42DA,9=42,A39CB=42DB,683E=42 -8033574A|Romance of the Three Kingdoms I|4|0|0|0|0|0|12C1=EAEA,3115=EAEA,19F3=42DB -9684526D|Romancing Saga (V1.1) (J)|8000004|84848484|0|0|0|0|20068=EAEA,20098=EAEA,200AC=EAEA,200DF=EAEA,201C3=EAEA,201CB=EAEA,201E1=EAEA,20248=EAEA,202F0=EAEA,20319=EAEA,20330=EAEA,20385=EAEA,2039D=EAEA,2043C=EAEA,204EA=EAEA,2055C=EAEA,20564=EAEA,20589=EAEA,2058F=EAEA,205A9=EAEA,2D4=42D9,962=DB,13D34=4280,CEFBF=4258 -54A585BC|Romancing Saga 2 (J)|5|0|0|0|0|0|370B=EAEA,556F=EAEA,5581=EAEA,321E5=EAEA,4004A=EAEA,4006A=EAEA,40081=EAEA,4008C=EAEA,40095=EAEA,400E6=EAEA,40116=EAEA,4012D=EAEA,4013A=EAEA,40232=EAEA,4023A=EAEA,40257=EAEA,403DA=EAEA,40403=EAEA,40419=EAEA,40501=EAEA,40593=EAEA,405E1=EAEA,40613=EAEA,40619=EAEA,40666=EAEA,4067F=EAEA,406EB=EAEA,40719=EAEA,4072E=EAEA,40779=EAEA,407A7=EAEA,407BC=EAEA,407EA=EAEA,407FF=EAEA,4082D=EAEA,40840=EAEA,4084C=EAEA,14315C=EAEA,32F=4296,572=4210,69A=42D9,3981=42B0,E76B=42D9,204AF=42D9,30176=4280,3AEA7=42DD,3B0CB=42DD,3B3D2=42DD,3DF0A=DB,3E2E3=DB,3E91F=4280,568B5=DB -5399BDDB|Romancing SaGa 3 (J) (V1.0)|5|4800|0|0|0|0|6063D=EAEA,60643=EAEA,609B0=EAEA,670=42DC,3EC170=42FA,1C42A=42D9,5F957=42FC -42C664C2|Romancing Saga 3 (V1|5|40444444|0|0|0|0|6063D=EAEA,60643=EAEA,609B0=EAEA,670=42DC,3EC170=42FA,1C42A=42D9,5F957=42FC -E0BD6C71|RPG Tukool - Super Dante|4|0|0|0|0|0|00C1=EAEA,B74C=EAEA,B757=EAEA,B762=EAEA,B761=EAEA,B74B=EAEA -E20870EE|RPG Tukool - Super Dante (J)|4|0|0|0|0|0 -5D8CB7AC|Rudra no Hihou (J)|5|0|0|0|0|0|23A5=EAEA,4AA=42FC -244280AE|Rudra no Hihou (J) [T+Eng|2|0|0|0|0|0|130906=EAEA,26187A=EAEA,2B0022=EAEA,2B00A5=EAEA,2B00C9=EAEA,2B031C=EAEA,2B033E=EAEA,2B0357=EAEA,2B0457=EAEA,2B094B=EAEA,2B0954=EAEA,2B095F=EAEA,2DC5B6=EAEA,4AA=42FC -8708E5BB|Run Saber (U)|0|0|0|0|0|0|525=421B,9AB=4290 -454D7DCD|Ryuuki Heidan Danzalv (J)|5|44800|0|0|0|0|F8335=42FB,F8345=421B,F73FE=421B,F8340=423B,F8DDA=42DB,88D3A=4215,8C04F=42FC -CD89020D|Sailor Moon (F)|3|0|0|0|0|0|1B7F8=42FC,1BE5A=42CF,936E=42FC -2E614A53|Samurai Shodown (U)|1|4040|0|0|0|0|10B4=42 -4C78D5EE|Sangokushi - Eiketsu Den (J)|5|4000|0|0|0|0|2C0BB0=EAEA,898D=42DC,1E29=42DB,850E=42DC,1E8F=42DB,87A4=42DC,8544=42DC,1D8C=42DC -98D7611E|Scooby Doo (U)|0|C00|0|0|0|0|DDF0D=EAEA,1017D6=EAEA,114DD0=EAEA,114DF2=EAEA,114DFD=EAEA,114E02=EAEA,114FE5=EAEA,114FF4=EAEA,115007=EAEA,115041=EAEA,11506F=EAEA,115077=EAEA,115097=EAEA,1150A2=EAEA,1B5B14=EAEA,1C988F=EAEA,C39=42DB,1A6874=4211 -8BFCB5A3|SD Gundam X (J)|4|44000|0|0|0|0|454F=EAEA,16E91=EAEA,16ECC=EAEA,16EDD=EAEA,16EEB=EAEA,16EF0=EAEA,16F1E=EAEA,2C5F1=EAEA,4D024=EAEA,975E1=EAEA,AE344=4219 -AAE842D2|SD The Great Battle (J)|1230000|0|0|0|0|0|181=EAEA,6A9C=DB6A -A5C0045E|Secret of Evermore (U)|14000005|0|0|0|0|0 -D0176B24|Secret of Mana (U)|5|4000|7E0604|0|64|A|79773=EAEA,B07B=42DC,694D=421B -EF968ED1|Secret of the Stars (U)|1320004|0|0|0|0|0|417=421B -A638BEF1|Seifuku Densetsu Pretty Fighter|1|0|0|0|0|0 -15320173|Seijuu Maden - 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New Horizons|5|0|0|0|0|0|9E98=42D9,9F5F=42DB -B574C939|Undercover Cops (J)|1|0|0|0|0|0|1C0520=EAEA,1C011D=EAEA,1C04C6=EAEA,1C04E3=EAEA,1C02E2=EAEA,1C02FF=EAEA,1C00D0=EAEA,1C00ED=EAEA,8128=42 -59180F1C|Universal Soldier (U) (Beta)|0|44C00|0|0|0|0|4A68=EAEA,4423=42FB,43F1=42F7,43A4=42D9,6033=42D8 -B9BF7990|Urban Strike (U) [!]|0|0|0|0|0|0 -2D1004F1|Wario's Woods (U)|4|0|0|0|0|0|58195=EAEA,5824E=EAEA,32F=42DC -A47884D0|Warlock (U)|4000000|0|0|0|0|0|676E=EAEA,6786=EAEA,6791=EAEA,6796=EAEA,67DB=EAEA,67E2=EAEA,6804=EAEA,683D=EAEA,6854=EAEA,6867=EAEA,68E0=EAEA,68F7=EAEA,690A=EAEA,694C=EAEA,69ED=429B,E905=42D9,1680FA=DB6E -8B477300|WCW Super Brawl (U)|0|0|0|0|0|0|13FFD=42FC,BBD9=42DB -7379E3B3|Whirlo (E)|2|0|0|0|0|0|CD3=42DC -1637D1A5|Wings 2 (U)|0|0|0|0|0|0|78103=EAEA,78116=EAEA,78119=EAEA -D5CE2DB5|Wizard of Oz, The (U)|0|44800|0|0|0|0|150=42FC,5224=42 -B8A72553|Wizardry 1 2 3 (J) (NP)|4|0|0|0|0|0|1C008E=EAEA,1C00CB=EAEA,1C00E0=EAEA,1C0108=EAEA,1C05AC=EAEA,1C05E3=EAEA,1C05ED=EAEA,BD=DB,1BF=42BA,159750=4210 -D8FDDD76|Wizardry 5 (U)|4|0|0|0|0|0|18A=42BA,213=428C,66830=42,14C5=EAEA,15D4=EAEA,695E=EAEA,69D8=EAEA,6C5F=EAEA,4003C=EAEA,40046=EAEA,40056=EAEA,40070=EAEA,4009A=EAEA,400A8=EAEA,400B3=EAEA,400C4=EAEA,400DE=EAEA,400FC=EAEA,40117=EAEA,40144=EAEA,40164=EAEA,4016B=EAEA,4017F=EAEA,401B8=EAEA,401C5=EAEA,401CF=EAEA,401DF=EAEA,401F1=EAEA,4020D=EAEA,49C8F=EAEA,5004B=EAEA,50055=EAEA,50065=EAEA,5007F=EAEA,500B7=EAEA,500D1=EAEA,500E6=EAEA,50105=EAEA,5011B=EAEA,5017D=EAEA,50187=EAEA,50197=EAEA,501B1=EAEA,501BA=EAEA,501CB=EAEA,501DD=EAEA,501EA=EAEA,5023B=EAEA,50245=EAEA,50255=EAEA,5026F=EAEA,50289=EAEA,50298=EAEA,95CD3=EAEA,A8655=EAEA,B7A03=EAEA,BBE13=EAEA,DCCB1=EAEA -1703D522|Wizardry Gaiden IV - Taima no K|4|40040800|0|0|0|0|B0726=EAEA,B05C8=EAEA,523=42DC,B071F=42,60=4283 -13BFB3A0|Wolfchild (U)|4000000|804|0|0|0|0|F8099=EAEA,F8146=EAEA,F811B=EAEA,F815E=EAEA,F809E=EAEA,5F8=42FC,614=42FC -36079184|Wonder Project J [T+Eng1.04]|5|0|0|0|0|0|AB80=EAEA,2E4A2=EAEA,2E4A8=EAEA,2E4BB=EAEA,2E4BF=EAEA,8420=42DB -90D0FAC0|Worms (E)|10000002|0|0|0|0|0|150085=EAEA,150178=EAEA,19C3B7=EAEA,1B5A=423A,1B60=421A,7627=DB,794E=423A,7BD1=42D8,1B1013=DB -4F02A304|X-Men Mutant Apocalypse (J)|4000001|44000|0|0|0|0|AB=42FB -5E34822A|X-Men Mutant Apocalypse (U)|4000001|44800|0|0|0|0|AB=42FB -C7C12A57|Xardion|4|0|D02|0|1E|5|5E90=421B,5E9E=421B,5E82=421B -7448D45C|Yogi Bear (U)|0|0|0|0|0|0|1ED=EAEA,74C=EAEA,856=EAEA,1137=EAEA,1DB6=EAEA,1EFC=EAEA,1FAD=EAEA,279E=EAEA,57FA=EAEA,5849=EAEA,5861=EAEA,586C=EAEA,5871=EAEA,601BD=EAEA,E84A7=EAEA -EF15F4C3|Yoshi's Cookie (U)|0|0|0|0|0|0|2824F=421B -D138F224|Yoshi's Island (V1.0) (U)|0|0|0|0|0|0|F4=423B -CF98DDAA|Yoshi's Island (U) (M3) (V1.1)|F4=423B -59490CE8|Yoshi's Safari|0|0|0|0|0|0 -7EA1AFE8|Young Merlin|0|0|0|0|0|0 -64A91E64|Ys 3 - Wanderers from Ys|0|0|0|0|0|0|D8=42 -1ADD47F0|Ys 4 - Mask of the Sun (J) [T-E|4|0|0|0|0|0|14060C=EAEA,140631=EAEA,9CA=42DC,A3B=42DC -7B4CEBAF|Ys 4 - Mask of the Sun (J) [T-E|4|0|0|0|0|14060C|14060C=EAEA,140631=EAEA,9CA=42DC,A3B=42DC -CFE632B9|Ys V - Expert (J)|4|44800|0|0|0|0|886=EAEA,79D=EAEA,3B81=EAEA,86C=EAEA,5E06=42FB,A9C=42FB,5DCC=42DB -EC96D517|YUUYUU Hakusho (J)|0|0|0|0|0|0|E15=42FC -EEF45A93|YUUYUU Hakusho 2 - Kakutou no S|0|0|0|0|0|0|10F=42DC -5617A42E|YUUYUU Hakusho Final (J)|1|0|0|0|0|0|A71D=EAEA,A683=EAEA,AB=42DC -535CCCAC|YUUYUU Hakusho Tokubehuten (J)|0|0|0|0|0|0|7957=EAEA,781A=EAEA -5409D4F4|Zen Nihon GT Sensyuken (J)|1320000|0|0|0|0|0|8003B=EAEA,8012B=EAEA,80137=EAEA,15E=42FB -5397D5BC|Zero the Kamikaze Squirrel (U)|0|0|0|0|0|0|41B44=EAEA,41B69=EAEA,1F3=42DB,12EA=4214,2884A=42DB,496=421B,41F=421B -7CFC0C7C|Zombies Ate My Neighbors (U)|10000000|4040|0|0|0|0|4CCF=EAEA,9DC=42 diff --git a/src/spc700/Makefile b/src/spc700/Makefile deleted file mode 100644 index e412de9..0000000 --- a/src/spc700/Makefile +++ /dev/null @@ -1,13 +0,0 @@ -CFLAGS = -Wall - -all : spc700a.s - -spc700a.s : spcgen - ./spcgen - -spcgen : spcgen.o - - -clean : - $(RM) spc700a.s spcgen spcgen.o - diff --git a/src/spc700/Makefile.win b/src/spc700/Makefile.win deleted file mode 100644 index 06095b0..0000000 --- a/src/spc700/Makefile.win +++ /dev/null @@ -1,15 +0,0 @@ -# Makefile for MS Visual C - -ALL : spc700a.s - -spc700a.s : spcgen.exe - spcgen.exe - -spcgen.exe : - cl /W3 spcgen.c - - -CLEAN : - -@erase spc700a.s - -@erase spcgen.exe - -@erase spcgen.obj diff --git a/src/spc700/debug/apu.h b/src/spc700/debug/apu.h deleted file mode 100644 index dd0451c..0000000 --- a/src/spc700/debug/apu.h +++ /dev/null @@ -1,195 +0,0 @@ -/* - * Snes9x - Portable Super Nintendo Entertainment System (TM) emulator. - * - * (c) Copyright 1996 - 2001 Gary Henderson (gary.henderson@ntlworld.com) and - * Jerremy Koot (jkoot@snes9x.com) - * - * Super FX C emulator code - * (c) Copyright 1997 - 1999 Ivar (ivar@snes9x.com) and - * Gary Henderson. - * Super FX assembler emulator code (c) Copyright 1998 zsKnight and _Demo_. - * - * DSP1 emulator code (c) Copyright 1998 Ivar, _Demo_ and Gary Henderson. - * C4 asm and some C emulation code (c) Copyright 2000 zsKnight and _Demo_. - * C4 C code (c) Copyright 2001 Gary Henderson (gary.henderson@ntlworld.com). - * - * DOS port code contains the works of other authors. See headers in - * individual files. - * - * Snes9x homepage: http://www.snes9x.com - * - * Permission to use, copy, modify and distribute Snes9x in both binary and - * source form, for non-commercial purposes, is hereby granted without fee, - * providing that this license information and copyright notice appear with - * all copies and any derived work. - * - * This software is provided 'as-is', without any express or implied - * warranty. In no event shall the authors be held liable for any damages - * arising from the use of this software. - * - * Snes9x is freeware for PERSONAL USE only. Commercial users should - * seek permission of the copyright holders first. Commercial use includes - * charging money for Snes9x or software derived from Snes9x. - * - * The copyright holders request that bug fixes and improvements to the code - * should be forwarded to them so everyone can benefit from the modifications - * in future versions. - * - * Super NES and Super Nintendo Entertainment System are trademarks of - * Nintendo Co., Limited and its subsidiary companies. - */ -#ifndef _apu_h_ -#define _apu_h_ - -#include "spc700.h" - -/* -typedef union -{ - struct { uint8 A, Y; } B; - uint16 W; -} YAndA; -*/ - -struct SIAPU -{ - uint8 *DirectPage; // 0x00 - uint32 Address; // 0x04 c core only - uint8 *WaitAddress1; // 0x08 - uint8 *WaitAddress2; // 0x0C - uint32 WaitCounter; // 0x10 - uint8 *ShadowRAM; // 0x14 - uint8 *CachedSamples; // 0x18 - uint8 _Carry; // 0x1C c core only - uint8 _Overflow; // 0x1D c core only - uint8 Bit; // 0x1E c core only - uint8 pad0; - uint32 TimerErrorCounter; // 0x20 - uint32 Scanline; // 0x24 - int32 OneCycle; // 0x28 - int32 TwoCycles; // 0x2C - // notaz: reordered and moved everything here, for faster context load/save - uint32 *asmJumpTab; // 0x30 - uint8 *PC; // 0x34 - YAndA YA; // 0x38 0x0000YYAA - uint8 P; // 0x3C flags: NODBHIZC - uint8 pad1; - uint8 pad2; - uint8 _Zero; // 0x3F Z=0, when this!=0; also stores neg flag in &0x80 - uint8 X; // 0x40 - uint8 S; // 0x41 stack pointer, default: 0xff - uint16 pad3; - uint8 *RAM; // 0x44 - uint8 *ExtraRAM; // 0x48 shortcut to APU.ExtraRAM - - uint16 memread_addr; - uint8 memread_data; - uint16 memwrite_addr; - uint8 memwrite_data; - int icount; - uint8 opcode; - uint16 ya_prev; - uint8 x_prev; -}; - -struct SAPU -{ - int32 Cycles; - bool8 ShowROM; - uint8 Flags; - uint8 KeyedChannels; - uint8 OutPorts [4]; - uint8 DSP [0x80]; - uint8 ExtraRAM [64]; - uint16 Timer [3]; - uint16 TimerTarget [3]; - bool8 TimerEnabled [3]; - bool8 TimerValueWritten [3]; -}; - -EXTERN_C struct SAPU APU; -EXTERN_C struct SIAPU IAPU; -EXTERN_C struct SIAPU IAPU2; -EXTERN_C struct SIAPU *pIAPU; - -STATIC inline void S9xAPUUnpackStatus() -{ - IAPU._Zero =((IAPU.P & Zero) == 0) | (IAPU.P & Negative); - IAPU._Carry = (IAPU.P & Carry); - IAPU._Overflow = (IAPU.P & Overflow); -} - -STATIC inline void S9xAPUPackStatus() -{ - IAPU.P &= ~(Zero | Negative | Carry | Overflow); - if(IAPU._Carry) IAPU.P |= Carry; - if(!IAPU._Zero) IAPU.P |= Zero; - if(IAPU._Overflow) IAPU.P |= Overflow; - if(IAPU._Zero & 0x80) IAPU.P |= Negative; -} - -START_EXTERN_C -void S9xResetAPU (void); -bool8 S9xInitAPU (); -void S9xDeinitAPU (); -void S9xDecacheSamples (); -int S9xTraceAPU (); -int S9xAPUOPrint (char *buffer, uint16 Address); -void S9xSetAPUControl (uint8 byte); -void S9xSetAPUDSP (uint8 byte); -uint8 S9xGetAPUDSP (); -void S9xSetAPUTimer (uint16 Address, uint8 byte); -bool8 S9xInitSound (int quality, bool8 stereo, int buffer_size); -void S9xOpenCloseSoundTracingFile (bool8); -void S9xPrintAPUState (); -extern int32 S9xAPUCycles [256]; // Scaled cycle lengths -extern int32 S9xAPUCycleLengths [256]; // Raw data. -extern void (*S9xApuOpcodes [256]) (void); -extern void (*S9xApuOpcodesReal [256]) (void); -void APUCompare(); -END_EXTERN_C - - -#define APU_VOL_LEFT 0x00 -#define APU_VOL_RIGHT 0x01 -#define APU_P_LOW 0x02 -#define APU_P_HIGH 0x03 -#define APU_SRCN 0x04 -#define APU_ADSR1 0x05 -#define APU_ADSR2 0x06 -#define APU_GAIN 0x07 -#define APU_ENVX 0x08 -#define APU_OUTX 0x09 - -#define APU_MVOL_LEFT 0x0c -#define APU_MVOL_RIGHT 0x1c -#define APU_EVOL_LEFT 0x2c -#define APU_EVOL_RIGHT 0x3c -#define APU_KON 0x4c -#define APU_KOFF 0x5c -#define APU_FLG 0x6c -#define APU_ENDX 0x7c - -#define APU_EFB 0x0d -#define APU_PMON 0x2d -#define APU_NON 0x3d -#define APU_EON 0x4d -#define APU_DIR 0x5d -#define APU_ESA 0x6d -#define APU_EDL 0x7d - -#define APU_C0 0x0f -#define APU_C1 0x1f -#define APU_C2 0x2f -#define APU_C3 0x3f -#define APU_C4 0x4f -#define APU_C5 0x5f -#define APU_C6 0x6f -#define APU_C7 0x7f - -#define APU_SOFT_RESET 0x80 -#define APU_MUTE 0x40 -#define APU_ECHO_DISABLED 0x20 - -#define FREQUENCY_MASK 0x3fff -#endif diff --git a/src/spc700/debug/apumem.h b/src/spc700/debug/apumem.h deleted file mode 100644 index b1b5f65..0000000 --- a/src/spc700/debug/apumem.h +++ /dev/null @@ -1,222 +0,0 @@ -/* - * Snes9x - Portable Super Nintendo Entertainment System (TM) emulator. - * - * (c) Copyright 1996 - 2001 Gary Henderson (gary.henderson@ntlworld.com) and - * Jerremy Koot (jkoot@snes9x.com) - * - * Super FX C emulator code - * (c) Copyright 1997 - 1999 Ivar (ivar@snes9x.com) and - * Gary Henderson. - * Super FX assembler emulator code (c) Copyright 1998 zsKnight and _Demo_. - * - * DSP1 emulator code (c) Copyright 1998 Ivar, _Demo_ and Gary Henderson. - * C4 asm and some C emulation code (c) Copyright 2000 zsKnight and _Demo_. - * C4 C code (c) Copyright 2001 Gary Henderson (gary.henderson@ntlworld.com). - * - * DOS port code contains the works of other authors. See headers in - * individual files. - * - * Snes9x homepage: http://www.snes9x.com - * - * Permission to use, copy, modify and distribute Snes9x in both binary and - * source form, for non-commercial purposes, is hereby granted without fee, - * providing that this license information and copyright notice appear with - * all copies and any derived work. - * - * This software is provided 'as-is', without any express or implied - * warranty. In no event shall the authors be held liable for any damages - * arising from the use of this software. - * - * Snes9x is freeware for PERSONAL USE only. Commercial users should - * seek permission of the copyright holders first. Commercial use includes - * charging money for Snes9x or software derived from Snes9x. - * - * The copyright holders request that bug fixes and improvements to the code - * should be forwarded to them so everyone can benefit from the modifications - * in future versions. - * - * Super NES and Super Nintendo Entertainment System are trademarks of - * Nintendo Co., Limited and its subsidiary companies. - */ -#ifndef _apumemory_h_ -#define _apumemory_h_ - -START_EXTERN_C -extern uint8 W4; -extern uint8 APUROM[64]; -END_EXTERN_C - -// TODO: restore nondebug version - -INLINE uint8 S9xAPUGetByteZ (uint8 Address) -{ - uint8 res = 0; - pIAPU->memread_addr = Address; - - if (Address >= 0xf0 && pIAPU->DirectPage == pIAPU->RAM) - { - if (Address >= 0xf4 && Address <= 0xf7) - { -#ifdef SPC700_SHUTDOWN - pIAPU->WaitAddress2 = pIAPU->WaitAddress1; - pIAPU->WaitAddress1 = pIAPU->PC; -#endif - res = (pIAPU->RAM [Address]); - } - else if (Address >= 0xfd) - { -#ifdef SPC700_SHUTDOWN - pIAPU->WaitAddress2 = pIAPU->WaitAddress1; - pIAPU->WaitAddress1 = pIAPU->PC; -#endif - uint8 t = pIAPU->RAM [Address]; - if(pIAPU != &IAPU) - pIAPU->RAM [Address] = 0; - res = (t); - } - else if (Address == 0xf3) { - res = (S9xGetAPUDSP ()); - } - else res = (pIAPU->RAM [Address]); - } - else - res = (pIAPU->DirectPage [Address]); - - pIAPU->memread_data = res; - return res; -} - -INLINE void S9xAPUSetByteZ (uint8 val, uint8 Address) -{ - pIAPU->memwrite_addr = Address; - pIAPU->memwrite_data = val; - - if(pIAPU == &IAPU) return; - - if (Address >= 0xf0 && pIAPU->DirectPage == pIAPU->RAM) - { - if (Address == 0xf3) - S9xSetAPUDSP (val); - else - if (Address >= 0xf4 && Address <= 0xf7) - APU.OutPorts [Address - 0xf4] = val; - else - if (Address == 0xf1) - S9xSetAPUControl (val); - else - if (Address < 0xfd) - { - pIAPU->RAM [Address] = val; - if (Address >= 0xfa) - { - if (val == 0) - APU.TimerTarget [Address - 0xfa] = 0x100; - else - APU.TimerTarget [Address - 0xfa] = val; - } - } - } - else - pIAPU->DirectPage [Address] = val; -} - -INLINE uint8 S9xAPUGetByte (uint32 Address) -{ - Address &= 0xffff; - uint8 res = 0; - pIAPU->memread_addr = Address; - - if (Address <= 0xff && Address >= 0xf0) - { - if (Address >= 0xf4 && Address <= 0xf7) - { -#ifdef SPC700_SHUTDOWN - pIAPU->WaitAddress2 = pIAPU->WaitAddress1; - pIAPU->WaitAddress1 = pIAPU->PC; -#endif - res = (pIAPU->RAM [Address]); - } - else if (Address == 0xf3) { - res = (S9xGetAPUDSP ()); - } - else if (Address >= 0xfd) - { -#ifdef SPC700_SHUTDOWN - pIAPU->WaitAddress2 = pIAPU->WaitAddress1; - pIAPU->WaitAddress1 = pIAPU->PC; -#endif - uint8 t = pIAPU->RAM [Address]; - if(pIAPU != &IAPU) - pIAPU->RAM [Address] = 0; - res = (t); - } - else res = (pIAPU->RAM [Address]); - } - else - res = (pIAPU->RAM [Address]); - - pIAPU->memread_data = res; - return res; -} - -INLINE void S9xAPUSetByte (uint8 val, uint32 Address) -{ - Address &= 0xffff; - pIAPU->memwrite_addr = Address; - pIAPU->memwrite_data = val; - - if(pIAPU == &IAPU) return; - - if (Address <= 0xff && Address >= 0xf0) - { - if (Address == 0xf3) - S9xSetAPUDSP (val); - else - if (Address >= 0xf4 && Address <= 0xf7) - APU.OutPorts [Address - 0xf4] = val; - else - if (Address == 0xf1) - S9xSetAPUControl (val); - else - if (Address < 0xfd) - { - pIAPU->RAM [Address] = val; - if (Address >= 0xfa) - { - if (val == 0) - APU.TimerTarget [Address - 0xfa] = 0x100; - else - APU.TimerTarget [Address - 0xfa] = val; - } - } - } - else - { -#if 0 -if (Address >= 0x2500 && Address <= 0x2504) -printf ("%06d %04x <- %02x\n", ICPU.Scanline, Address, val); -if (Address == 0x26c6) -{ - extern FILE *apu_trace; - extern FILE *trace; - APU.Flags |= TRACE_FLAG; - CPU.Flags |= TRACE_FLAG; - if (apu_trace == NULL) - apu_trace = fopen ("aputrace.log", "wb"); - if (trace == NULL) - trace = fopen ("trace.log", "wb"); - printf ("TRACING SWITCHED ON\n"); -} -#endif - if (Address < 0xffc0) - pIAPU->RAM [Address] = val; - else - { - APU.ExtraRAM [Address - 0xffc0] = val; - if (!APU.ShowROM) - pIAPU->RAM [Address] = val; - } - } -} - -#endif diff --git a/src/spc700/debug/port.h b/src/spc700/debug/port.h deleted file mode 100644 index dfc3030..0000000 --- a/src/spc700/debug/port.h +++ /dev/null @@ -1,494 +0,0 @@ -/* - * Snes9x - Portable Super Nintendo Entertainment System (TM) emulator. - * - * (c) Copyright 1996 - 2001 Gary Henderson (gary.henderson@ntlworld.com) and - * Jerremy Koot (jkoot@snes9x.com) - * - * Super FX C emulator code - * (c) Copyright 1997 - 1999 Ivar (ivar@snes9x.com) and - * Gary Henderson. - * Super FX assembler emulator code (c) Copyright 1998 zsKnight and _Demo_. - * - * DSP1 emulator code (c) Copyright 1998 Ivar, _Demo_ and Gary Henderson. - * C4 asm and some C emulation code (c) Copyright 2000 zsKnight and _Demo_. - * C4 C code (c) Copyright 2001 Gary Henderson (gary.henderson@ntlworld.com). - * - * DOS port code contains the works of other authors. See headers in - * individual files. - * - * Snes9x homepage: http://www.snes9x.com - * - * Permission to use, copy, modify and distribute Snes9x in both binary and - * source form, for non-commercial purposes, is hereby granted without fee, - * providing that this license information and copyright notice appear with - * all copies and any derived work. - * - * This software is provided 'as-is', without any express or implied - * warranty. In no event shall the authors be held liable for any damages - * arising from the use of this software. - * - * Snes9x is freeware for PERSONAL USE only. Commercial users should - * seek permission of the copyright holders first. Commercial use includes - * charging money for Snes9x or software derived from Snes9x. - * - * The copyright holders request that bug fixes and improvements to the code - * should be forwarded to them so everyone can benefit from the modifications - * in future versions. - * - * Super NES and Super Nintendo Entertainment System are trademarks of - * Nintendo Co., Limited and its subsidiary companies. - */ -#ifndef _PORT_H_ -#define _PORT_H_ - - -// horrible mess here - -int yo_rand(void); - -#ifdef __SYMBIAN32__ - -// debug -#ifdef __DEBUG_PRINT -#undef printf -extern "C" void dprintf(char *format, ...); -#define printf dprintf -#else -#define printf(x...) -#define dprintf(x...) -#endif - -#include - -#define PIXEL_FORMAT RGB565 -#undef GFX_MULTI_FORMAT - -#ifndef snes9x_types_defined -#define snes9x_types_defined - -typedef unsigned char bool8; -typedef unsigned char uint8; -typedef unsigned short uint16; -typedef signed char int8; -typedef signed short int16; -typedef signed int int32; -typedef unsigned int uint32; -typedef long long int64; // correct? -#endif - -#include "pixform.h" - -#ifndef TRUE -#define TRUE 1 -#endif - -#ifndef FALSE -#define FALSE 0 -#endif - -#if defined(__cplusplus) || defined(c_plusplus) -#define EXTERN_C extern "C" -#define START_EXTERN_C extern "C" { -#define END_EXTERN_C } -#else -#define EXTERN_C extern -#define START_EXTERN_C -#define END_EXTERN_C -#endif - - -#ifndef PATH_MAX -#define PATH_MAX 0x100 // == KMaxFileName -#endif - -/* -#define _MAX_DIR PATH_MAX -#define _MAX_DRIVE 1 -#define _MAX_FNAME PATH_MAX -#define _MAX_EXT 3 -*/ -#define _MAX_PATH PATH_MAX - - -#define ZeroMemory(a,b) memset((a),0,(b)) - -EXTERN_C void S9xGenerateSound (); - -#define SLASH_STR "\\" -#define SLASH_CHAR '\\' - -#define LSB_FIRST -#define STATIC static -#define FASTCALL -#define INLINE inline -#define VOID void -#define PACKING __attribute__ ((packed)) -#define ALIGN_BY_ONE __attribute__ ((aligned (1), packed)) -#define gp32_pause() -#define gm_memset memset -#define CHECK_SOUND() -#define CPU_SHUTDOWN -#define VAR_CYCLES -#define SPC700_C -#define EXECUTE_SUPERFX_PER_LINE -#define OLD_COLOUR_BLENDING -#define _NEWPPU_ -#define gp32_atoi atoi -//#define SPC700_SHUTDOWN // incompatible with ASM_SPC700 -// notaz -//#define ASM_SPC700 -#define SUPER_FX - -#ifndef TITLE -#define TITLE "Snes9x" -#endif - - -#else // __SYMBIAN32__ - - -//#include - -#ifdef __GP32__ - - -//#define __GP32_APUCACHE__ - -#define CHECK_SOUND() - -#define VERSION_MAJOR 0 -#define VERSION_MINOR 3 - -long *gp32_fopen (char *fname,char *mode); -void gp32_fclose (long *s); -long gp32_fread (unsigned char *ptr,long lg,long *s); -long gp32_fwrite (unsigned char *ptr,long lg,long *s); -void gp32_fseek (long position,int ref,long *s); - - -//#undef ZLIB -//#define ZLIB -//#define UNZIP_SUPPORT - - -#define SPC700_SHUTDOWN -#define CPU_SHUTDOWN -#define VAR_CYCLES -#define SPC700_C -//#define ZSNES_C4 -//#define ZSNES_FX -#define EXECUTE_SUPERFX_PER_LINE -//#define THREADCPU - - -//#define NETPLAY_SUPPORT -#define OLD_COLOUR_BLENDING - -#endif // __GP32__ - -#ifndef STORM -#ifdef __GP32__ - -extern "C" -{ -#include "gpdef.h" -#include "gpstdlib.h" -#include "gpgraphic.h" -#include "gpfont.h" -#include "gpmm.h" -#include "gpmem.h" -#include "gpstdio.h" -} - -#undef byte -#undef word -#undef dword -#undef qword - -/*typedef unsigned long bool8_32; -typedef unsigned long uint8_32; -typedef unsigned long uint16_32; -typedef long int8_32; -typedef long int16_32;*/ - -#undef time_t -#define time_t long - -char *gp32_strrchr(char *s, char c); -char gp32_toupper(char c); -char *gp32_strupr(char *s); -char *gp32_strlwr(char *s); -int gp32_memcmp(char *s1,char *s2, int lg); -int gp32_strncmp(char *s1,char *s2, int lg); -int gp32_strcasecmp(const char *s1, const char *s2 ); -int gp32_strncasecmp(const char *s1, const char *s2, unsigned n); -long gp32_time(void); -int gp32_pause(void); -int gp32_atoi(char *s); - -#define malloc gm_malloc -#define free gm_free -#define memcpy gm_memcpy - -#define strcpy gm_strcpy -#define strncpy gm_strncpy -#define strcat gm_strcat -#define memset gm_memset -#define memmove gm_memcpy -#define strlen gm_lstrlen -#define strcmp gm_compare -#define memcmp(a,b,c) gp32_memcmp((char*)a,(char*)b,c) -#define strrchr(a,b) gp32_strrchr((char*)a,(char)b) -#define strncmp(a,b,c) gp32_strncmp((char*)a,(char*)b,(int)c) -#define strlwr gp32_strlwr -//#define atoi gp32_atoi - -#define islower(a) ((a>='a')&&(a<='z')) -#define isdigit(a) ((a>='0')&&(a<='9')) -#define isalpha(a) (((a>='0')&&(a<='9'))||((a>='0')&&(a<='9'))||((a>='A')&&(a<='Z'))) -#define toupper(a) (islower(a)?a+'A'-'a':a) - -#define sprintf gm_sprintf - - - -void gp32_printf(char *a); -void gp32_GpTextOut(unsigned char *buffer,int X,int Y,char *A,int col,int bold); -void gp32_GpTextOutBig(unsigned char *buffer,int X,int Y,char *A,int col,int bold); -#define printf //(a) gp32_printf(a) - -#define strcasecmp gp32_strcasecmp -#define strncasecmp gp32_strncasecmp - -#define time(a) gp32_time() - -#define _NEWPPU_ - -//#define PROFILING - -#ifdef PROFILING -void gp32_profile_start(int a); -void gp32_profile_end(int a); -#define PROF_START(a) gp32_profile_start(a) -#define PROF_END(a) gp32_profile_end(a) -#endif - -#elif defined(__SYMBIAN32__) // /__GP32__ -#include -#else -#include -#include -#endif -#else // #ifndef STORM -#include -#include -#endif - -//#include - -#define PIXEL_FORMAT RGB565 -#undef GFX_MULTI_FORMAT - -#if defined(TARGET_OS_MAC) && TARGET_OS_MAC - -#include "zlib.h" -#define ZLIB -#define EXECUTE_SUPERFX_PER_LINE -#define SOUND -#define VAR_CYCLES -#define CPU_SHUTDOWN -#define SPC700_SHUTDOWN -#define PIXEL_FORMAT RGB555 -#define CHECK_SOUND() -#define M_PI 3.14159265359 -#undef _MAX_PATH - -#undef DEBUGGER // Apple Universal Headers sometimes #define DEBUGGER -#undef GFX_MULTI_FORMAT - -int strncasecmp(const char *s1, const char *s2, unsigned n); -int strcasecmp(const char *s1, const char *s2 ); - -#endif - -#ifndef snes9x_types_defined -#define snes9x_types_defined - -typedef unsigned char bool8; - -#ifndef __WIN32kk__ -typedef unsigned char uint8; -typedef unsigned short uint16; -typedef signed char int8; -typedef signed short int16; -typedef signed int int32; -typedef unsigned int uint32; -#ifdef __GP32__ -typedef signed __int64 int64; -//typedef signed long int64; -#else -typedef long long int64; -#endif -#else // __WIN32kk__ - -#ifdef __BORLANDC__ -#include -#else - -typedef unsigned char uint8; -typedef unsigned short uint16; -typedef signed char int8; -typedef short int16; - -#ifndef WSAAPI -// winsock2.h typedefs int32 as well. -typedef long int32; -#endif - -typedef unsigned int uint32; - -#endif // __BORLANDC__ - -typedef __int64 int64; - -#endif // __WIN32kk__ -#endif // snes9x_types_defined -#include "pixform.h" - -#ifndef TRUE -#define TRUE 1 -#endif - -#ifndef FALSE -#define FALSE 0 -#endif - -#ifdef STORM -#define EXTERN_C -#define START_EXTERN_C -#define END_EXTERN_C -#else -#if defined(__cplusplus) || defined(c_plusplus) -#define EXTERN_C extern "C" -#define START_EXTERN_C extern "C" { -#define END_EXTERN_C } -#else -#define EXTERN_C extern -#define START_EXTERN_C -#define END_EXTERN_C -#endif -#endif - -#ifndef __WIN32kk__ - -#ifndef PATH_MAX -#define PATH_MAX 1024 -#endif - -#define _MAX_DIR PATH_MAX -#define _MAX_DRIVE 1 -#define _MAX_FNAME PATH_MAX -#define _MAX_EXT PATH_MAX -#define _MAX_PATH PATH_MAX - -#define ZeroMemory(a,b) memset((a),0,(b)) - -#ifndef __WIN32__ -void _makepath (char *path, const char *drive, const char *dir, const char *fname, const char *ext); -void _splitpath (const char *path, char *drive, char *dir, char *fname, char *ext); -#endif - -#else // __WIN32kk__ -#define strcasecmp stricmp -#define strncasecmp strnicmp -#endif - -EXTERN_C void S9xGenerateSound (); - -#ifdef STORM -EXTERN_C int soundsignal; -EXTERN_C void MixSound(void); -//Yes, CHECK_SOUND is getting defined correctly! -#define CHECK_SOUND if (Settings.APUEnabled) if(SetSignalPPC(0L, soundsignal) & soundsignal) MixSound -#else -#ifndef __GP32__ -#define CHECK_SOUND() -#endif -#endif - -#if defined (__DJGPP)||defined(__GP32__) -#define SLASH_STR "\\" -#define SLASH_CHAR '\\' -#else -#define SLASH_STR "/" -#define SLASH_CHAR '/' -#endif - -#ifdef __linux -typedef void (*SignalHandler)(int); -#define SIG_PF SignalHandler -#endif - -#if defined(__i386__) || defined(__i486__) || defined(__i586__) || \ - defined(__WIN32kk__) || defined(__alpha__) -#define LSB_FIRST -#define FAST_LSB_WORD_ACCESS -#define PACKING -#define ALIGN_BY_ONE - -#else - -#ifdef __GP32__ -#define LSB_FIRST -#define STATIC static -#define FASTCALL -#define INLINE inline -#define VOID void -#else -// must be gp2x -#define LSB_FIRST -#define STATIC static -#define FASTCALL -#define INLINE inline -#define VOID void -#define PACKING __attribute__ ((packed)) -#define ALIGN_BY_ONE __attribute__ ((aligned (1), packed)) -#define gp32_pause() -#define gm_memset memset -#define CHECK_SOUND() -#define VERSION_MAJOR 0 -#define VERSION_MINOR 3 -#define SPC700_SHUTDOWN -#define CPU_SHUTDOWN -#define VAR_CYCLES -#define SPC700_C -#define EXECUTE_SUPERFX_PER_LINE -#define OLD_COLOUR_BLENDING -#define _NEWPPU_ -#define gp32_atoi atoi -#endif - -#endif - -#ifdef __sun -#define TITLE "Snes9X: Solaris" -#endif - -#ifdef __linux -#define TITLE "Snes9X: Linux" -#endif - -#ifndef TITLE -#define TITLE "Snes9x" -#endif - -#ifdef STORM -#define STATIC -#define strncasecmp strnicmp -#else -#define STATIC static -#endif - -#endif // !defined(__SYMBIAN32__) - -#endif // _PORT_H_ diff --git a/src/spc700/debug/spc700.cpp b/src/spc700/debug/spc700.cpp deleted file mode 100644 index 5ab21ab..0000000 --- a/src/spc700/debug/spc700.cpp +++ /dev/null @@ -1,2600 +0,0 @@ -/* - * Snes9x - Portable Super Nintendo Entertainment System (TM) emulator. - * - * (c) Copyright 1996 - 2001 Gary Henderson (gary.henderson@ntlworld.com) and - * Jerremy Koot (jkoot@snes9x.com) - * - * Super FX C emulator code - * (c) Copyright 1997 - 1999 Ivar (ivar@snes9x.com) and - * Gary Henderson. - * Super FX assembler emulator code (c) Copyright 1998 zsKnight and _Demo_. - * - * DSP1 emulator code (c) Copyright 1998 Ivar, _Demo_ and Gary Henderson. - * C4 asm and some C emulation code (c) Copyright 2000 zsKnight and _Demo_. - * C4 C code (c) Copyright 2001 Gary Henderson (gary.henderson@ntlworld.com). - * - * DOS port code contains the works of other authors. See headers in - * individual files. - * - * Snes9x homepage: http://www.snes9x.com - * - * Permission to use, copy, modify and distribute Snes9x in both binary and - * source form, for non-commercial purposes, is hereby granted without fee, - * providing that this license information and copyright notice appear with - * all copies and any derived work. - * - * This software is provided 'as-is', without any express or implied - * warranty. In no event shall the authors be held liable for any damages - * arising from the use of this software. - * - * Snes9x is freeware for PERSONAL USE only. Commercial users should - * seek permission of the copyright holders first. Commercial use includes - * charging money for Snes9x or software derived from Snes9x. - * - * The copyright holders request that bug fixes and improvements to the code - * should be forwarded to them so everyone can benefit from the modifications - * in future versions. - * - * Super NES and Super Nintendo Entertainment System are trademarks of - * Nintendo Co., Limited and its subsidiary companies. - */ -#include "snes9x.h" -#include "memmap.h" -#include "display.h" -#include "cpuexec.h" -#include "apu.h" -#include "spc700.h" - -// SPC700/Sound DSP chips have a 24.57MHz crystal on their PCB. - -//#if defined(ASM_SPC700) -extern "C" { -uint8 S9xAPUGetByteZ (uint8 address); -uint8 S9xAPUGetByte (uint32 address); -void S9xAPUSetByteZ (uint8, uint8 address); -void S9xAPUSetByte (uint8, uint32 address); -} -/* -#elif defined(NO_INLINE_SET_GET) -uint8 S9xAPUGetByteZ (uint8 address); -uint8 S9xAPUGetByte (uint32 address); -void S9xAPUSetByteZ (uint8, uint8 address); -void S9xAPUSetByte (uint8, uint32 address); - -#else -#undef INLINE -#define INLINE inline -#include "apumem.h" -#endif -*/ - -START_EXTERN_C -extern uint8 Work8; -extern uint16 Work16; -extern uint32 Work32; -extern signed char Int8; -extern short Int16; -extern long Int32; -extern short Int16; -extern uint8 W1; -extern uint8 W2; - -END_EXTERN_C - -#define OP1 (*(pIAPU->PC + 1)) -#define OP2 (*(pIAPU->PC + 2)) - -#ifdef SPC700_SHUTDOWN -#define APUShutdown() \ - if (Settings.Shutdown && (pIAPU->PC == pIAPU->WaitAddress1 || pIAPU->PC == pIAPU->WaitAddress2)) \ - { \ - if (pIAPU->WaitCounter == 0) \ - { \ - if (!ICPU.CPUExecuting) \ - CPU.APU_Cycles = CPU.Cycles = CPU.NextEvent; \ - else \ - CPU.APU_APUExecuting = FALSE; \ - } \ - else \ - if (pIAPU->WaitCounter >= 2) \ - pIAPU->WaitCounter = 1; \ - else \ - pIAPU->WaitCounter--; \ - } -#else -#define APUShutdown() -#endif - -#define APUSetZN8(b)\ - pIAPU->_Zero = (b); - -#define APUSetZN16(w)\ - pIAPU->_Zero = ((w) != 0) | ((w) >> 8); - -void STOP (char *s) -{ - char buffer[100]; - -#ifdef DEBUGGER - S9xAPUOPrint (buffer, pIAPU->PC - pIAPU->RAM); -#endif - - sprintf (String, "Sound CPU in unknown state executing %s at %04lX\n%s\n", s, pIAPU->PC - pIAPU->RAM, buffer); - S9xMessage (S9X_ERROR, S9X_APU_STOPPED, String); - APU.TimerEnabled[0] = APU.TimerEnabled[1] = APU.TimerEnabled[2] = FALSE; - CPU.APU_APUExecuting = FALSE; - -#ifdef DEBUGGER - CPU.Flags |= DEBUG_MODE_FLAG; -#else - S9xExit (); -#endif -} - -#define TCALL(n)\ -{\ - PushW ((pIAPU->PC - pIAPU->RAM + 1)); \ - pIAPU->PC = pIAPU->RAM + (APU.ExtraRAM [((15 - n) << 1)] + \ - (APU.ExtraRAM [((15 - n) << 1) + 1] << 8)); \ -} - -// XXX: HalfCarry - BJ fixed? -#define SBC(a,b)\ -Int16 = (short) (a) - (short) (b) + (short) (APUCheckCarry ()) - 1;\ -pIAPU->_Carry = Int16 >= 0;\ -if ((((a) ^ (b)) & 0x80) && (((a) ^ (uint8) Int16) & 0x80))\ - APUSetOverflow ();\ -else \ - APUClearOverflow (); \ -APUSetHalfCarry ();\ -if(((a) ^ (b) ^ (uint8) Int16) & 0x10)\ - APUClearHalfCarry ();\ -(a) = (uint8) Int16;\ -APUSetZN8 ((uint8) Int16); - -// XXX: HalfCarry - BJ fixed? -#define ADC(a,b)\ -Work16 = (a) + (b) + APUCheckCarry();\ -pIAPU->_Carry = Work16 >= 0x100; \ -if (~((a) ^ (b)) & ((b) ^ (uint8) Work16) & 0x80)\ - APUSetOverflow ();\ -else \ - APUClearOverflow (); \ -APUClearHalfCarry ();\ -/*if(((a) ^ (b) ^ (uint8) Int16) & 0x10) notaz: Int16!? */\ -if(((a) ^ (b) ^ (uint8) Work16) & 0x10)\ - APUSetHalfCarry ();\ -(a) = (uint8) Work16;\ -APUSetZN8 ((uint8) Work16); - -#define CMP(a,b)\ -Int16 = (short) (a) - (short) (b);\ -pIAPU->_Carry = Int16 >= 0;\ -APUSetZN8 ((uint8) Int16); - -#define ASL(b)\ - pIAPU->_Carry = ((b) & 0x80) != 0; \ - (b) <<= 1;\ - APUSetZN8 (b); -#define LSR(b)\ - pIAPU->_Carry = (b) & 1;\ - (b) >>= 1;\ - APUSetZN8 (b); -#define ROL(b)\ - Work16 = ((b) << 1) | APUCheckCarry (); \ - pIAPU->_Carry = Work16 >= 0x100; \ - (b) = (uint8) Work16; \ - APUSetZN8 (b); -#define ROR(b)\ - Work16 = (b) | ((uint16) APUCheckCarry () << 8); \ - pIAPU->_Carry = (uint8) Work16 & 1; \ - Work16 >>= 1; \ - (b) = (uint8) Work16; \ - APUSetZN8 (b); - -#define Push(b)\ - *(pIAPU->RAM + 0x100 + pIAPU->S) = b;\ - pIAPU->S--; - -#define Pop(b)\ - pIAPU->S++;\ - (b) = *(pIAPU->RAM + 0x100 + pIAPU->S); - -#ifdef FAST_LSB_WORD_ACCESS -#define PushW(w)\ - *(uint16 *) (pIAPU->RAM + 0xff + pIAPU->S) = w;\ - pIAPU->S -= 2; -#define PopW(w)\ - pIAPU->S += 2;\ - w = *(uint16 *) (pIAPU->RAM + 0xff + pIAPU->S); -#else -#define PushW(w)\ - *(pIAPU->RAM + 0xff + pIAPU->S) = w;\ - *(pIAPU->RAM + 0x100 + pIAPU->S) = (w >> 8);\ - pIAPU->S -= 2; -#define PopW(w)\ - pIAPU->S += 2; \ - (w) = *(pIAPU->RAM + 0xff + pIAPU->S) + (*(pIAPU->RAM + 0x100 + pIAPU->S) << 8); -#endif - -#define Relative()\ - Int8 = OP1;\ - Int16 = (int) (pIAPU->PC + 2 - pIAPU->RAM) + Int8; - -#define Relative2()\ - Int8 = OP2;\ - Int16 = (int) (pIAPU->PC + 3 - pIAPU->RAM) + Int8; - -#ifdef FAST_LSB_WORD_ACCESS -#define IndexedXIndirect()\ - pIAPU->Address = *(uint16 *) (pIAPU->DirectPage + ((OP1 + pIAPU->X) & 0xff)); - -#define Absolute()\ - pIAPU->Address = *(uint16 *) (pIAPU->PC + 1); - -#define AbsoluteX()\ - pIAPU->Address = *(uint16 *) (pIAPU->PC + 1) + pIAPU->X; - -#define AbsoluteY()\ - pIAPU->Address = *(uint16 *) (pIAPU->PC + 1) + pIAPU->YA.B.Y; - -#define MemBit()\ - pIAPU->Address = *(uint16 *) (pIAPU->PC + 1);\ - pIAPU->Bit = (uint8)(pIAPU->Address >> 13);\ - pIAPU->Address &= 0x1fff; - -#define IndirectIndexedY()\ - pIAPU->Address = *(uint16 *) (pIAPU->DirectPage + OP1) + pIAPU->YA.B.Y; -#else -#define IndexedXIndirect()\ - pIAPU->Address = *(pIAPU->DirectPage + ((OP1 + pIAPU->X) & 0xff)) + \ - (*(pIAPU->DirectPage + ((OP1 + pIAPU->X + 1) & 0xff)) << 8); -#define Absolute()\ - pIAPU->Address = OP1 + (OP2 << 8); - -#define AbsoluteX()\ - pIAPU->Address = OP1 + (OP2 << 8) + pIAPU->X; - -#define AbsoluteY()\ - pIAPU->Address = OP1 + (OP2 << 8) + pIAPU->YA.B.Y; - -#define MemBit()\ - pIAPU->Address = OP1 + (OP2 << 8);\ - pIAPU->Bit = (int8) (pIAPU->Address >> 13);\ - pIAPU->Address &= 0x1fff; - -#define IndirectIndexedY()\ - pIAPU->Address = *(pIAPU->DirectPage + OP1) + \ - (*(pIAPU->DirectPage + OP1 + 1) << 8) + \ - pIAPU->YA.B.Y; -#endif - -void Apu00 () -{ -// NOP - pIAPU->PC++; -} - -void Apu01 () { TCALL (0) } - -void Apu11 () { TCALL (1) } - -void Apu21 () { TCALL (2) } - -void Apu31 () { TCALL (3) } - -void Apu41 () { TCALL (4) } - -void Apu51 () { TCALL (5) } - -void Apu61 () { TCALL (6) } - -void Apu71 () { TCALL (7) } - -void Apu81 () { TCALL (8) } - -void Apu91 () { TCALL (9) } - -void ApuA1 () { TCALL (10) } - -void ApuB1 () { TCALL (11) } - -void ApuC1 () { TCALL (12) } - -void ApuD1 () { TCALL (13) } - -void ApuE1 () { TCALL (14) } - -void ApuF1 () { TCALL (15) } - -void Apu3F () // CALL absolute -{ - Absolute (); - // 0xB6f for Star Fox 2 - PushW ((pIAPU->PC + 3 - pIAPU->RAM)); - pIAPU->PC = pIAPU->RAM + pIAPU->Address; -} - -void Apu4F () // PCALL $XX -{ - Work8 = OP1; - PushW ((pIAPU->PC + 2 - pIAPU->RAM)); - pIAPU->PC = pIAPU->RAM + 0xff00 + Work8; -} - -#define SET(b) \ -S9xAPUSetByteZ ((uint8) (S9xAPUGetByteZ (OP1 ) | (1 << (b))), OP1); \ -pIAPU->PC += 2 - -void Apu02 () -{ - SET (0); -} - -void Apu22 () -{ - SET (1); -} - -void Apu42 () -{ - SET (2); -} - -void Apu62 () -{ - SET (3); -} - -void Apu82 () -{ - SET (4); -} - -void ApuA2 () -{ - SET (5); -} - -void ApuC2 () -{ - SET (6); -} - -void ApuE2 () -{ - SET (7); -} - -#define CLR(b) \ -S9xAPUSetByteZ ((uint8) (S9xAPUGetByteZ (OP1) & ~(1 << (b))), OP1); \ -pIAPU->PC += 2; - -void Apu12 () -{ - CLR (0); -} - -void Apu32 () -{ - CLR (1); -} - -void Apu52 () -{ - CLR (2); -} - -void Apu72 () -{ - CLR (3); -} - -void Apu92 () -{ - CLR (4); -} - -void ApuB2 () -{ - CLR (5); -} - -void ApuD2 () -{ - CLR (6); -} - -void ApuF2 () -{ - CLR (7); -} - -#define BBS(b) \ -Work8 = OP1; \ -Relative2 (); \ -if (S9xAPUGetByteZ (Work8) & (1 << (b))) \ -{ \ - pIAPU->PC = pIAPU->RAM + (uint16) Int16; \ - CPU.APU_Cycles += pIAPU->TwoCycles; \ -} \ -else \ - pIAPU->PC += 3 - -void Apu03 () -{ - BBS (0); -} - -void Apu23 () -{ - BBS (1); -} - -void Apu43 () -{ - BBS (2); -} - -void Apu63 () -{ - BBS (3); -} - -void Apu83 () -{ - BBS (4); -} - -void ApuA3 () -{ - BBS (5); -} - -void ApuC3 () -{ - BBS (6); -} - -void ApuE3 () -{ - BBS (7); -} - -#define BBC(b) \ -Work8 = OP1; \ -Relative2 (); \ -if (!(S9xAPUGetByteZ (Work8) & (1 << (b)))) \ -{ \ - pIAPU->PC = pIAPU->RAM + (uint16) Int16; \ - CPU.APU_Cycles += pIAPU->TwoCycles; \ -} \ -else \ - pIAPU->PC += 3 - -void Apu13 () -{ - BBC (0); -} - -void Apu33 () -{ - BBC (1); -} - -void Apu53 () -{ - BBC (2); -} - -void Apu73 () -{ - BBC (3); -} - -void Apu93 () -{ - BBC (4); -} - -void ApuB3 () -{ - BBC (5); -} - -void ApuD3 () -{ - BBC (6); -} - -void ApuF3 () -{ - BBC (7); -} - -void Apu04 () -{ -// OR A,dp - pIAPU->YA.B.A |= S9xAPUGetByteZ (OP1); - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC += 2; -} - -void Apu05 () -{ -// OR A,abs - Absolute (); - pIAPU->YA.B.A |= S9xAPUGetByte (pIAPU->Address); - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC += 3; -} - -void Apu06 () -{ -// OR A,(X) - pIAPU->YA.B.A |= S9xAPUGetByteZ (pIAPU->X); - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC++; -} - -void Apu07 () -{ -// OR A,(dp+X) - IndexedXIndirect (); - pIAPU->YA.B.A |= S9xAPUGetByte (pIAPU->Address); - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC += 2; -} - -void Apu08 () -{ -// OR A,#00 - pIAPU->YA.B.A |= OP1; - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC += 2; -} - -void Apu09 () -{ -// OR dp(dest),dp(src) - Work8 = S9xAPUGetByteZ (OP1); - Work8 |= S9xAPUGetByteZ (OP2); - S9xAPUSetByteZ (Work8, OP2); - APUSetZN8 (Work8); - pIAPU->PC += 3; -} - -void Apu14 () -{ -// OR A,dp+X - pIAPU->YA.B.A |= S9xAPUGetByteZ (OP1 + pIAPU->X); - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC += 2; -} - -void Apu15 () -{ -// OR A,abs+X - AbsoluteX (); - pIAPU->YA.B.A |= S9xAPUGetByte (pIAPU->Address); - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC += 3; -} - -void Apu16 () -{ -// OR A,abs+Y - AbsoluteY (); - pIAPU->YA.B.A |= S9xAPUGetByte (pIAPU->Address); - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC += 3; -} - -void Apu17 () -{ -// OR A,(dp)+Y - IndirectIndexedY (); - pIAPU->YA.B.A |= S9xAPUGetByte (pIAPU->Address); - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC += 2; -} - -void Apu18 () -{ -// OR dp,#00 - Work8 = OP1; - Work8 |= S9xAPUGetByteZ (OP2); - S9xAPUSetByteZ (Work8, OP2); - APUSetZN8 (Work8); - pIAPU->PC += 3; -} - -void Apu19 () -{ -// OR (X),(Y) - Work8 = S9xAPUGetByteZ (pIAPU->X) | S9xAPUGetByteZ (pIAPU->YA.B.Y); - APUSetZN8 (Work8); - S9xAPUSetByteZ (Work8, pIAPU->X); - pIAPU->PC++; -} - -void Apu0A () -{ -// OR1 C,membit - MemBit (); - if (!APUCheckCarry ()) - { - if (S9xAPUGetByte (pIAPU->Address) & (1 << pIAPU->Bit)) - APUSetCarry (); - } - pIAPU->PC += 3; -} - -void Apu2A () -{ -// OR1 C,not membit - MemBit (); - if (!APUCheckCarry ()) - { - if (!(S9xAPUGetByte (pIAPU->Address) & (1 << pIAPU->Bit))) - APUSetCarry (); - } - pIAPU->PC += 3; -} - -void Apu4A () -{ -// AND1 C,membit - MemBit (); - if (APUCheckCarry ()) - { - if (!(S9xAPUGetByte (pIAPU->Address) & (1 << pIAPU->Bit))) - APUClearCarry (); - } - pIAPU->PC += 3; -} - -void Apu6A () -{ -// AND1 C, not membit - MemBit (); - if (APUCheckCarry ()) - { - if ((S9xAPUGetByte (pIAPU->Address) & (1 << pIAPU->Bit))) - APUClearCarry (); - } - pIAPU->PC += 3; -} - -void Apu8A () -{ -// EOR1 C, membit - MemBit (); - if (APUCheckCarry ()) - { - if (S9xAPUGetByte (pIAPU->Address) & (1 << pIAPU->Bit)) - APUClearCarry (); - } - else - { - if (S9xAPUGetByte (pIAPU->Address) & (1 << pIAPU->Bit)) - APUSetCarry (); - } - pIAPU->PC += 3; -} - -void ApuAA () -{ -// MOV1 C,membit - MemBit (); - if (S9xAPUGetByte (pIAPU->Address) & (1 << pIAPU->Bit)) - APUSetCarry (); - else - APUClearCarry (); - pIAPU->PC += 3; -} - -void ApuCA () -{ -// MOV1 membit,C - MemBit (); - if (APUCheckCarry ()) - { - S9xAPUSetByte (S9xAPUGetByte (pIAPU->Address) | (1 << pIAPU->Bit), pIAPU->Address); - } - else - { - S9xAPUSetByte (S9xAPUGetByte (pIAPU->Address) & ~(1 << pIAPU->Bit), pIAPU->Address); - } - pIAPU->PC += 3; -} - -void ApuEA () -{ -// NOT1 membit - MemBit (); - S9xAPUSetByte (S9xAPUGetByte (pIAPU->Address) ^ (1 << pIAPU->Bit), pIAPU->Address); - pIAPU->PC += 3; -} - -void Apu0B () -{ -// ASL dp - Work8 = S9xAPUGetByteZ (OP1); - ASL (Work8); - S9xAPUSetByteZ (Work8, OP1); - pIAPU->PC += 2; -} - -void Apu0C () -{ -// ASL abs - Absolute (); - Work8 = S9xAPUGetByte (pIAPU->Address); - ASL (Work8); - S9xAPUSetByte (Work8, pIAPU->Address); - pIAPU->PC += 3; -} - -void Apu1B () -{ -// ASL dp+X - Work8 = S9xAPUGetByteZ (OP1 + pIAPU->X); - ASL (Work8); - S9xAPUSetByteZ (Work8, OP1 + pIAPU->X); - pIAPU->PC += 2; -} - -void Apu1C () -{ -// ASL A - ASL (pIAPU->YA.B.A); - pIAPU->PC++; -} - -void Apu0D () -{ -// PUSH PSW - S9xAPUPackStatus (); - Push (pIAPU->P); - pIAPU->PC++; -} - -void Apu2D () -{ -// PUSH A - Push (pIAPU->YA.B.A); - pIAPU->PC++; -} - -void Apu4D () -{ -// PUSH X - Push (pIAPU->X); - pIAPU->PC++; -} - -void Apu6D () -{ -// PUSH Y - Push (pIAPU->YA.B.Y); - pIAPU->PC++; -} - -void Apu8E () -{ -// POP PSW - Pop (pIAPU->P); - S9xAPUUnpackStatus (); - if (APUCheckDirectPage ()) - pIAPU->DirectPage = pIAPU->RAM + 0x100; - else - pIAPU->DirectPage = pIAPU->RAM; - pIAPU->PC++; -} - -void ApuAE () -{ -// POP A - Pop (pIAPU->YA.B.A); - pIAPU->PC++; -} - -void ApuCE () -{ -// POP X - Pop (pIAPU->X); - pIAPU->PC++; -} - -void ApuEE () -{ -// POP Y - Pop (pIAPU->YA.B.Y); - pIAPU->PC++; -} - -void Apu0E () -{ -// TSET1 abs - Absolute (); - Work8 = S9xAPUGetByte (pIAPU->Address); - S9xAPUSetByte (Work8 | pIAPU->YA.B.A, pIAPU->Address); - Work8 &= pIAPU->YA.B.A; - APUSetZN8 (Work8); - pIAPU->PC += 3; -} - -void Apu4E () -{ -// TCLR1 abs - Absolute (); - Work8 = S9xAPUGetByte (pIAPU->Address); - S9xAPUSetByte (Work8 & ~pIAPU->YA.B.A, pIAPU->Address); - Work8 &= pIAPU->YA.B.A; - APUSetZN8 (Work8); - pIAPU->PC += 3; -} - -void Apu0F () -{ -// BRK - -#if 0 - STOP ("BRK"); -#else - PushW ((pIAPU->PC + 1 - pIAPU->RAM)); - S9xAPUPackStatus (); - Push (pIAPU->P); - APUSetBreak (); - APUClearInterrupt (); -// XXX:Where is the BRK vector ??? - pIAPU->PC = pIAPU->RAM + APU.ExtraRAM[0x20] + (APU.ExtraRAM[0x21] << 8); -#endif -} - -void ApuEF () -{ -// SLEEP - // XXX: sleep - // STOP ("SLEEP"); - CPU.APU_APUExecuting = FALSE; - pIAPU->PC++; -} - -void ApuFF () -{ -// STOP - // STOP ("STOP"); - CPU.APU_APUExecuting = FALSE; - pIAPU->PC++; -} - -void Apu10 () -{ -// BPL - Relative (); - if (!APUCheckNegative ()) - { - pIAPU->PC = pIAPU->RAM + (uint16) Int16; - CPU.APU_Cycles += pIAPU->TwoCycles; - APUShutdown (); - } - else - pIAPU->PC += 2; -} - -void Apu30 () -{ -// BMI - Relative (); - if (APUCheckNegative ()) - { - pIAPU->PC = pIAPU->RAM + (uint16) Int16; - CPU.APU_Cycles += pIAPU->TwoCycles; - APUShutdown (); - } - else - pIAPU->PC += 2; -} - -void Apu90 () -{ -// BCC - Relative (); - if (!APUCheckCarry ()) - { - pIAPU->PC = pIAPU->RAM + (uint16) Int16; - CPU.APU_Cycles += pIAPU->TwoCycles; - APUShutdown (); - } - else - pIAPU->PC += 2; -} - -void ApuB0 () -{ -// BCS - Relative (); - if (APUCheckCarry ()) - { - pIAPU->PC = pIAPU->RAM + (uint16) Int16; - CPU.APU_Cycles += pIAPU->TwoCycles; - APUShutdown (); - } - else - pIAPU->PC += 2; -} - -void ApuD0 () -{ -// BNE - Relative (); - if (!APUCheckZero ()) - { - pIAPU->PC = pIAPU->RAM + (uint16) Int16; - CPU.APU_Cycles += pIAPU->TwoCycles; - APUShutdown (); - } - else - pIAPU->PC += 2; -} - -void ApuF0 () -{ -// BEQ - Relative (); - if (APUCheckZero ()) - { - pIAPU->PC = pIAPU->RAM + (uint16) Int16; - CPU.APU_Cycles += pIAPU->TwoCycles; - APUShutdown (); - } - else - pIAPU->PC += 2; -} - -void Apu50 () -{ -// BVC - Relative (); - if (!APUCheckOverflow ()) - { - pIAPU->PC = pIAPU->RAM + (uint16) Int16; - CPU.APU_Cycles += pIAPU->TwoCycles; - } - else - pIAPU->PC += 2; -} - -void Apu70 () -{ -// BVS - Relative (); - if (APUCheckOverflow ()) - { - pIAPU->PC = pIAPU->RAM + (uint16) Int16; - CPU.APU_Cycles += pIAPU->TwoCycles; - } - else - pIAPU->PC += 2; -} - -void Apu2F () -{ -// BRA - Relative (); - pIAPU->PC = pIAPU->RAM + (uint16) Int16; -} - -void Apu80 () -{ -// SETC - APUSetCarry (); - pIAPU->PC++; -} - -void ApuED () -{ -// NOTC - pIAPU->_Carry ^= 1; - pIAPU->PC++; -} - -void Apu40 () -{ -// SETP - APUSetDirectPage (); - pIAPU->DirectPage = pIAPU->RAM + 0x100; - pIAPU->PC++; -} - -void Apu1A () -{ -// DECW dp - Work16 = S9xAPUGetByteZ (OP1) + (S9xAPUGetByteZ (OP1 + 1) << 8); - Work16--; - S9xAPUSetByteZ ((uint8) Work16, OP1); - S9xAPUSetByteZ (Work16 >> 8, OP1 + 1); - APUSetZN16 (Work16); - pIAPU->PC += 2; -} - -void Apu5A () -{ -// CMPW YA,dp - Work16 = S9xAPUGetByteZ (OP1) + (S9xAPUGetByteZ (OP1 + 1) << 8); - Int32 = (long) pIAPU->YA.W - (long) Work16; - pIAPU->_Carry = Int32 >= 0; - APUSetZN16 ((uint16) Int32); - pIAPU->PC += 2; -} - -void Apu3A () -{ -// INCW dp - Work16 = S9xAPUGetByteZ (OP1) + (S9xAPUGetByteZ (OP1 + 1) << 8); - Work16++; - S9xAPUSetByteZ ((uint8) Work16, OP1); - S9xAPUSetByteZ (Work16 >> 8, OP1 + 1); - APUSetZN16 (Work16); - pIAPU->PC += 2; -} - -// XXX: HalfCarry - BJ Fixed? Or is it between bits 7 and 8 for ADDW/SUBW? -void Apu7A () -{ -// ADDW YA,dp - Work16 = S9xAPUGetByteZ (OP1) + (S9xAPUGetByteZ (OP1 + 1) << 8); - Work32 = (uint32) pIAPU->YA.W + Work16; - pIAPU->_Carry = Work32 >= 0x10000; - if (~(pIAPU->YA.W ^ Work16) & (Work16 ^ (uint16) Work32) & 0x8000) - APUSetOverflow (); - else - APUClearOverflow (); - APUClearHalfCarry (); - if((pIAPU->YA.W ^ Work16 ^ (uint16) Work32) & 0x10) - APUSetHalfCarry (); - pIAPU->YA.W = (uint16) Work32; - APUSetZN16 (pIAPU->YA.W); - pIAPU->PC += 2; -} - -// XXX: BJ: i think the old HalfCarry behavior was wrong... -// XXX: Or is it between bits 7 and 8 for ADDW/SUBW? -void Apu9A () -{ -// SUBW YA,dp - Work16 = S9xAPUGetByteZ (OP1) + (S9xAPUGetByteZ (OP1 + 1) << 8); - Int32 = (long) pIAPU->YA.W - (long) Work16; - APUClearHalfCarry (); - pIAPU->_Carry = Int32 >= 0; - if (((pIAPU->YA.W ^ Work16) & 0x8000) && - ((pIAPU->YA.W ^ (uint16) Int32) & 0x8000)) - APUSetOverflow (); - else - APUClearOverflow (); -// if (((pIAPU->YA.W ^ Work16) & 0x0080) && -// ((pIAPU->YA.W ^ (uint16) Int32) & 0x0080)) -// APUSetHalfCarry (); // notaz: strange here - APUSetHalfCarry (); -// if((pIAPU->YA.W ^ Work16 ^ (uint16) Work32) & 0x10) // notaz: Work32?! - if((pIAPU->YA.W ^ Work16 ^ (uint16) Int32) & 0x10) - APUClearHalfCarry (); - pIAPU->YA.W = (uint16) Int32; - APUSetZN16 (pIAPU->YA.W); - pIAPU->PC += 2; -} - -void ApuBA () -{ -// MOVW YA,dp - pIAPU->YA.B.A = S9xAPUGetByteZ (OP1); - pIAPU->YA.B.Y = S9xAPUGetByteZ (OP1 + 1); - APUSetZN16 (pIAPU->YA.W); - pIAPU->PC += 2; -} - -void ApuDA () -{ -// MOVW dp,YA - S9xAPUSetByteZ (pIAPU->YA.B.A, OP1); - S9xAPUSetByteZ (pIAPU->YA.B.Y, OP1 + 1); - pIAPU->PC += 2; -} - -void Apu64 () -{ -// CMP A,dp - Work8 = S9xAPUGetByteZ (OP1); - CMP (pIAPU->YA.B.A, Work8); - pIAPU->PC += 2; -} - -void Apu65 () -{ -// CMP A,abs - Absolute (); - Work8 = S9xAPUGetByte (pIAPU->Address); - CMP (pIAPU->YA.B.A, Work8); - pIAPU->PC += 3; -} - -void Apu66 () -{ -// CMP A,(X) - Work8 = S9xAPUGetByteZ (pIAPU->X); - CMP (pIAPU->YA.B.A, Work8); - pIAPU->PC++; -} - -void Apu67 () -{ -// CMP A,(dp+X) - IndexedXIndirect (); - Work8 = S9xAPUGetByte (pIAPU->Address); - CMP (pIAPU->YA.B.A, Work8); - pIAPU->PC += 2; -} - -void Apu68 () -{ -// CMP A,#00 - Work8 = OP1; - CMP (pIAPU->YA.B.A, Work8); - pIAPU->PC += 2; -} - -void Apu69 () -{ -// CMP dp(dest), dp(src) - W1 = S9xAPUGetByteZ (OP1); - Work8 = S9xAPUGetByteZ (OP2); - CMP (Work8, W1); - pIAPU->PC += 3; -} - -void Apu74 () -{ -// CMP A, dp+X - Work8 = S9xAPUGetByteZ (OP1 + pIAPU->X); - CMP (pIAPU->YA.B.A, Work8); - pIAPU->PC += 2; -} - -void Apu75 () -{ -// CMP A,abs+X - AbsoluteX (); - Work8 = S9xAPUGetByte (pIAPU->Address); - CMP (pIAPU->YA.B.A, Work8); - pIAPU->PC += 3; -} - -void Apu76 () -{ -// CMP A, abs+Y - AbsoluteY (); - Work8 = S9xAPUGetByte (pIAPU->Address); - CMP (pIAPU->YA.B.A, Work8); - pIAPU->PC += 3; -} - -void Apu77 () -{ -// CMP A,(dp)+Y - IndirectIndexedY (); - Work8 = S9xAPUGetByte (pIAPU->Address); - CMP (pIAPU->YA.B.A, Work8); - pIAPU->PC += 2; -} - -void Apu78 () -{ -// CMP dp,#00 - Work8 = OP1; - W1 = S9xAPUGetByteZ (OP2); - CMP (W1, Work8); - pIAPU->PC += 3; -} - -void Apu79 () -{ -// CMP (X),(Y) - W1 = S9xAPUGetByteZ (pIAPU->X); - Work8 = S9xAPUGetByteZ (pIAPU->YA.B.Y); - CMP (W1, Work8); - pIAPU->PC++; -} - -void Apu1E () -{ -// CMP X,abs - Absolute (); - Work8 = S9xAPUGetByte (pIAPU->Address); - CMP (pIAPU->X, Work8); - pIAPU->PC += 3; -} - -void Apu3E () -{ -// CMP X,dp - Work8 = S9xAPUGetByteZ (OP1); - CMP (pIAPU->X, Work8); - pIAPU->PC += 2; -} - -void ApuC8 () -{ -// CMP X,#00 - CMP (pIAPU->X, OP1); - pIAPU->PC += 2; -} - -void Apu5E () -{ -// CMP Y,abs - Absolute (); - Work8 = S9xAPUGetByte (pIAPU->Address); - CMP (pIAPU->YA.B.Y, Work8); - pIAPU->PC += 3; -} - -void Apu7E () -{ -// CMP Y,dp - Work8 = S9xAPUGetByteZ (OP1); - CMP (pIAPU->YA.B.Y, Work8); - pIAPU->PC += 2; -} - -void ApuAD () -{ -// CMP Y,#00 - Work8 = OP1; - CMP (pIAPU->YA.B.Y, Work8); - pIAPU->PC += 2; -} - -void Apu1F () -{ -// JMP (abs+X) - Absolute (); - pIAPU->PC = pIAPU->RAM + S9xAPUGetByte (pIAPU->Address + pIAPU->X) + - (S9xAPUGetByte (pIAPU->Address + pIAPU->X + 1) << 8); -// XXX: HERE: - // APU.Flags |= TRACE_FLAG; -} - -void Apu5F () -{ -// JMP abs - Absolute (); - pIAPU->PC = pIAPU->RAM + pIAPU->Address; -} - -void Apu20 () -{ -// CLRP - APUClearDirectPage (); - pIAPU->DirectPage = pIAPU->RAM; - pIAPU->PC++; -} - -void Apu60 () -{ -// CLRC - APUClearCarry (); - pIAPU->PC++; -} - -void ApuE0 () -{ -// CLRV - APUClearHalfCarry (); - APUClearOverflow (); - pIAPU->PC++; -} - -void Apu24 () -{ -// AND A,dp - pIAPU->YA.B.A &= S9xAPUGetByteZ (OP1); - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC += 2; -} - -void Apu25 () -{ -// AND A,abs - Absolute (); - pIAPU->YA.B.A &= S9xAPUGetByte (pIAPU->Address); - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC += 3; -} - -void Apu26 () -{ -// AND A,(X) - pIAPU->YA.B.A &= S9xAPUGetByteZ (pIAPU->X); - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC++; -} - -void Apu27 () -{ -// AND A,(dp+X) - IndexedXIndirect (); - pIAPU->YA.B.A &= S9xAPUGetByte (pIAPU->Address); - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC += 2; -} - -void Apu28 () -{ -// AND A,#00 - pIAPU->YA.B.A &= OP1; - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC += 2; -} - -void Apu29 () -{ -// AND dp(dest),dp(src) - Work8 = S9xAPUGetByteZ (OP1); - Work8 &= S9xAPUGetByteZ (OP2); - S9xAPUSetByteZ (Work8, OP2); - APUSetZN8 (Work8); - pIAPU->PC += 3; -} - -void Apu34 () -{ -// AND A,dp+X - pIAPU->YA.B.A &= S9xAPUGetByteZ (OP1 + pIAPU->X); - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC += 2; -} - -void Apu35 () -{ -// AND A,abs+X - AbsoluteX (); - pIAPU->YA.B.A &= S9xAPUGetByte (pIAPU->Address); - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC += 3; -} - -void Apu36 () -{ -// AND A,abs+Y - AbsoluteY (); - pIAPU->YA.B.A &= S9xAPUGetByte (pIAPU->Address); - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC += 3; -} - -void Apu37 () -{ -// AND A,(dp)+Y - IndirectIndexedY (); - pIAPU->YA.B.A &= S9xAPUGetByte (pIAPU->Address); - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC += 2; -} - -void Apu38 () -{ -// AND dp,#00 - Work8 = OP1; - Work8 &= S9xAPUGetByteZ (OP2); - S9xAPUSetByteZ (Work8, OP2); - APUSetZN8 (Work8); - pIAPU->PC += 3; -} - -void Apu39 () -{ -// AND (X),(Y) - Work8 = S9xAPUGetByteZ (pIAPU->X) & S9xAPUGetByteZ (pIAPU->YA.B.Y); - APUSetZN8 (Work8); - S9xAPUSetByteZ (Work8, pIAPU->X); - pIAPU->PC++; -} - -void Apu2B () -{ -// ROL dp - Work8 = S9xAPUGetByteZ (OP1); - ROL (Work8); - S9xAPUSetByteZ (Work8, OP1); - pIAPU->PC += 2; -} - -void Apu2C () -{ -// ROL abs - Absolute (); - Work8 = S9xAPUGetByte (pIAPU->Address); - ROL (Work8); - S9xAPUSetByte (Work8, pIAPU->Address); - pIAPU->PC += 3; -} - -void Apu3B () -{ -// ROL dp+X - Work8 = S9xAPUGetByteZ (OP1 + pIAPU->X); - ROL (Work8); - S9xAPUSetByteZ (Work8, OP1 + pIAPU->X); - pIAPU->PC += 2; -} - -void Apu3C () -{ -// ROL A - ROL (pIAPU->YA.B.A); - pIAPU->PC++; -} - -void Apu2E () -{ -// CBNE dp,rel - Work8 = OP1; - Relative2 (); - - if (S9xAPUGetByteZ (Work8) != pIAPU->YA.B.A) - { - pIAPU->PC = pIAPU->RAM + (uint16) Int16; - CPU.APU_Cycles += pIAPU->TwoCycles; - APUShutdown (); - } - else - pIAPU->PC += 3; -} - -void ApuDE () -{ -// CBNE dp+X,rel - Work8 = OP1 + pIAPU->X; - Relative2 (); - - if (S9xAPUGetByteZ (Work8) != pIAPU->YA.B.A) - { - pIAPU->PC = pIAPU->RAM + (uint16) Int16; - CPU.APU_Cycles += pIAPU->TwoCycles; - APUShutdown (); - } - else - pIAPU->PC += 3; -} - -void Apu3D () -{ -// INC X - pIAPU->X++; - APUSetZN8 (pIAPU->X); - -#ifdef SPC700_SHUTDOWN - pIAPU->WaitCounter++; -#endif - - pIAPU->PC++; -} - -void ApuFC () -{ -// INC Y - pIAPU->YA.B.Y++; - APUSetZN8 (pIAPU->YA.B.Y); - -#ifdef SPC700_SHUTDOWN - pIAPU->WaitCounter++; -#endif - - pIAPU->PC++; -} - -void Apu1D () -{ -// DEC X - pIAPU->X--; - APUSetZN8 (pIAPU->X); - -#ifdef SPC700_SHUTDOWN - pIAPU->WaitCounter++; -#endif - - pIAPU->PC++; -} - -void ApuDC () -{ -// DEC Y - pIAPU->YA.B.Y--; - APUSetZN8 (pIAPU->YA.B.Y); - -#ifdef SPC700_SHUTDOWN - pIAPU->WaitCounter++; -#endif - - pIAPU->PC++; -} - -void ApuAB () -{ -// INC dp - Work8 = S9xAPUGetByteZ (OP1) + 1; - S9xAPUSetByteZ (Work8, OP1); - APUSetZN8 (Work8); - -#ifdef SPC700_SHUTDOWN - pIAPU->WaitCounter++; -#endif - - pIAPU->PC += 2; -} - -void ApuAC () -{ -// INC abs - Absolute (); - Work8 = S9xAPUGetByte (pIAPU->Address) + 1; - S9xAPUSetByte (Work8, pIAPU->Address); - APUSetZN8 (Work8); - -#ifdef SPC700_SHUTDOWN - pIAPU->WaitCounter++; -#endif - - pIAPU->PC += 3; -} - -void ApuBB () -{ -// INC dp+X - Work8 = S9xAPUGetByteZ (OP1 + pIAPU->X) + 1; - S9xAPUSetByteZ (Work8, OP1 + pIAPU->X); - APUSetZN8 (Work8); - -#ifdef SPC700_SHUTDOWN - pIAPU->WaitCounter++; -#endif - - pIAPU->PC += 2; -} - -void ApuBC () -{ -// INC A - pIAPU->YA.B.A++; - APUSetZN8 (pIAPU->YA.B.A); - -#ifdef SPC700_SHUTDOWN - pIAPU->WaitCounter++; -#endif - - pIAPU->PC++; -} - -void Apu8B () -{ -// DEC dp - Work8 = S9xAPUGetByteZ (OP1) - 1; - S9xAPUSetByteZ (Work8, OP1); - APUSetZN8 (Work8); - -#ifdef SPC700_SHUTDOWN - pIAPU->WaitCounter++; -#endif - - pIAPU->PC += 2; -} - -void Apu8C () -{ -// DEC abs - Absolute (); - Work8 = S9xAPUGetByte (pIAPU->Address) - 1; - S9xAPUSetByte (Work8, pIAPU->Address); - APUSetZN8 (Work8); - -#ifdef SPC700_SHUTDOWN - pIAPU->WaitCounter++; -#endif - - pIAPU->PC += 3; -} - -void Apu9B () -{ -// DEC dp+X - Work8 = S9xAPUGetByteZ (OP1 + pIAPU->X) - 1; - S9xAPUSetByteZ (Work8, OP1 + pIAPU->X); - APUSetZN8 (Work8); - -#ifdef SPC700_SHUTDOWN - pIAPU->WaitCounter++; -#endif - - pIAPU->PC += 2; -} - -void Apu9C () -{ -// DEC A - pIAPU->YA.B.A--; - APUSetZN8 (pIAPU->YA.B.A); - -#ifdef SPC700_SHUTDOWN - pIAPU->WaitCounter++; -#endif - - pIAPU->PC++; -} - -void Apu44 () -{ -// EOR A,dp - pIAPU->YA.B.A ^= S9xAPUGetByteZ (OP1); - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC += 2; -} - -void Apu45 () -{ -// EOR A,abs - Absolute (); - pIAPU->YA.B.A ^= S9xAPUGetByte (pIAPU->Address); - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC += 3; -} - -void Apu46 () -{ -// EOR A,(X) - pIAPU->YA.B.A ^= S9xAPUGetByteZ (pIAPU->X); - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC++; -} - -void Apu47 () -{ -// EOR A,(dp+X) - IndexedXIndirect (); - pIAPU->YA.B.A ^= S9xAPUGetByte (pIAPU->Address); - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC += 2; -} - -void Apu48 () -{ -// EOR A,#00 - pIAPU->YA.B.A ^= OP1; - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC += 2; -} - -void Apu49 () -{ -// EOR dp(dest),dp(src) - Work8 = S9xAPUGetByteZ (OP1); - Work8 ^= S9xAPUGetByteZ (OP2); - S9xAPUSetByteZ (Work8, OP2); - APUSetZN8 (Work8); - pIAPU->PC += 3; -} - -void Apu54 () -{ -// EOR A,dp+X - pIAPU->YA.B.A ^= S9xAPUGetByteZ (OP1 + pIAPU->X); - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC += 2; -} - -void Apu55 () -{ -// EOR A,abs+X - AbsoluteX (); - pIAPU->YA.B.A ^= S9xAPUGetByte (pIAPU->Address); - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC += 3; -} - -void Apu56 () -{ -// EOR A,abs+Y - AbsoluteY (); - pIAPU->YA.B.A ^= S9xAPUGetByte (pIAPU->Address); - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC += 3; -} - -void Apu57 () -{ -// EOR A,(dp)+Y - IndirectIndexedY (); - pIAPU->YA.B.A ^= S9xAPUGetByte (pIAPU->Address); - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC += 2; -} - -void Apu58 () -{ -// EOR dp,#00 - Work8 = OP1; - Work8 ^= S9xAPUGetByteZ (OP2); - S9xAPUSetByteZ (Work8, OP2); - APUSetZN8 (Work8); - pIAPU->PC += 3; -} - -void Apu59 () -{ -// EOR (X),(Y) - Work8 = S9xAPUGetByteZ (pIAPU->X) ^ S9xAPUGetByteZ (pIAPU->YA.B.Y); - APUSetZN8 (Work8); - S9xAPUSetByteZ (Work8, pIAPU->X); - pIAPU->PC++; -} - -void Apu4B () -{ -// LSR dp - Work8 = S9xAPUGetByteZ (OP1); - LSR (Work8); - S9xAPUSetByteZ (Work8, OP1); - pIAPU->PC += 2; -} - -void Apu4C () -{ -// LSR abs - Absolute (); - Work8 = S9xAPUGetByte (pIAPU->Address); - LSR (Work8); - S9xAPUSetByte (Work8, pIAPU->Address); - pIAPU->PC += 3; -} - -void Apu5B () -{ -// LSR dp+X - Work8 = S9xAPUGetByteZ (OP1 + pIAPU->X); - LSR (Work8); - S9xAPUSetByteZ (Work8, OP1 + pIAPU->X); - pIAPU->PC += 2; -} - -void Apu5C () -{ -// LSR A - LSR (pIAPU->YA.B.A); - pIAPU->PC++; -} - -void Apu7D () -{ -// MOV A,X - pIAPU->YA.B.A = pIAPU->X; - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC++; -} - -void ApuDD () -{ -// MOV A,Y - pIAPU->YA.B.A = pIAPU->YA.B.Y; - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC++; -} - -void Apu5D () -{ -// MOV X,A - pIAPU->X = pIAPU->YA.B.A; - APUSetZN8 (pIAPU->X); - pIAPU->PC++; -} - -void ApuFD () -{ -// MOV Y,A - pIAPU->YA.B.Y = pIAPU->YA.B.A; - APUSetZN8 (pIAPU->YA.B.Y); - pIAPU->PC++; -} - -void Apu9D () -{ -//MOV X,SP - pIAPU->X = pIAPU->S; - APUSetZN8 (pIAPU->X); - pIAPU->PC++; -} - -void ApuBD () -{ -// MOV SP,X - pIAPU->S = pIAPU->X; - pIAPU->PC++; -} - -void Apu6B () -{ -// ROR dp - Work8 = S9xAPUGetByteZ (OP1); - ROR (Work8); - S9xAPUSetByteZ (Work8, OP1); - pIAPU->PC += 2; -} - -void Apu6C () -{ -// ROR abs - Absolute (); - Work8 = S9xAPUGetByte (pIAPU->Address); - ROR (Work8); - S9xAPUSetByte (Work8, pIAPU->Address); - pIAPU->PC += 3; -} - -void Apu7B () -{ -// ROR dp+X - Work8 = S9xAPUGetByteZ (OP1 + pIAPU->X); - ROR (Work8); - S9xAPUSetByteZ (Work8, OP1 + pIAPU->X); - pIAPU->PC += 2; -} - -void Apu7C () -{ -// ROR A - ROR (pIAPU->YA.B.A); - pIAPU->PC++; -} - -void Apu6E () -{ -// DBNZ dp,rel - Work8 = OP1; - Relative2 (); - W1 = S9xAPUGetByteZ (Work8) - 1; - S9xAPUSetByteZ (W1, Work8); - if (W1 != 0) - { - pIAPU->PC = pIAPU->RAM + (uint16) Int16; - CPU.APU_Cycles += pIAPU->TwoCycles; - } - else - pIAPU->PC += 3; -} - -void ApuFE () -{ -// DBNZ Y,rel - Relative (); - pIAPU->YA.B.Y--; - if (pIAPU->YA.B.Y != 0) - { - pIAPU->PC = pIAPU->RAM + (uint16) Int16; - CPU.APU_Cycles += pIAPU->TwoCycles; - } - else - pIAPU->PC += 2; -} - -void Apu6F () -{ -// RET - PopW (Work16); - pIAPU->PC = pIAPU->RAM + Work16; -} - -void Apu7F () -{ -// RETI - // STOP ("RETI"); - Pop (pIAPU->P); - S9xAPUUnpackStatus (); - PopW (Work16); - pIAPU->PC = pIAPU->RAM + Work16; -} - -void Apu84 () -{ -// ADC A,dp - Work8 = S9xAPUGetByteZ (OP1); - ADC (pIAPU->YA.B.A, Work8); - pIAPU->PC += 2; -} - -void Apu85 () -{ -// ADC A, abs - Absolute (); - Work8 = S9xAPUGetByte (pIAPU->Address); - ADC (pIAPU->YA.B.A, Work8); - pIAPU->PC += 3; -} - -void Apu86 () -{ -// ADC A,(X) - Work8 = S9xAPUGetByteZ (pIAPU->X); - ADC (pIAPU->YA.B.A, Work8); - pIAPU->PC++; -} - -void Apu87 () -{ -// ADC A,(dp+X) - IndexedXIndirect (); - Work8 = S9xAPUGetByte (pIAPU->Address); - ADC (pIAPU->YA.B.A, Work8); - pIAPU->PC += 2; -} - -void Apu88 () -{ -// ADC A,#00 - Work8 = OP1; - ADC (pIAPU->YA.B.A, Work8); - pIAPU->PC += 2; -} - -void Apu89 () -{ -// ADC dp(dest),dp(src) - Work8 = S9xAPUGetByteZ (OP1); - W1 = S9xAPUGetByteZ (OP2); - ADC (W1, Work8); - S9xAPUSetByteZ (W1, OP2); - pIAPU->PC += 3; -} - -void Apu94 () -{ -// ADC A,dp+X - Work8 = S9xAPUGetByteZ (OP1 + pIAPU->X); - ADC (pIAPU->YA.B.A, Work8); - pIAPU->PC += 2; -} - -void Apu95 () -{ -// ADC A, abs+X - AbsoluteX (); - Work8 = S9xAPUGetByte (pIAPU->Address); - ADC (pIAPU->YA.B.A, Work8); - pIAPU->PC += 3; -} - -void Apu96 () -{ -// ADC A, abs+Y - AbsoluteY (); - Work8 = S9xAPUGetByte (pIAPU->Address); - ADC (pIAPU->YA.B.A, Work8); - pIAPU->PC += 3; -} - -void Apu97 () -{ -// ADC A, (dp)+Y - IndirectIndexedY (); - Work8 = S9xAPUGetByte (pIAPU->Address); - ADC (pIAPU->YA.B.A, Work8); - pIAPU->PC += 2; -} - -void Apu98 () -{ -// ADC dp,#00 - Work8 = OP1; - W1 = S9xAPUGetByteZ (OP2); - ADC (W1, Work8); - S9xAPUSetByteZ (W1, OP2); - pIAPU->PC += 3; -} - -void Apu99 () -{ -// ADC (X),(Y) - W1 = S9xAPUGetByteZ (pIAPU->X); - Work8 = S9xAPUGetByteZ (pIAPU->YA.B.Y); - ADC (W1, Work8); - S9xAPUSetByteZ (W1, pIAPU->X); - pIAPU->PC++; -} - -void Apu8D () -{ -// MOV Y,#00 - pIAPU->YA.B.Y = OP1; - APUSetZN8 (pIAPU->YA.B.Y); - pIAPU->PC += 2; -} - -void Apu8F () -{ -// MOV dp,#00 - Work8 = OP1; - S9xAPUSetByteZ (Work8, OP2); - pIAPU->PC += 3; -} - -void Apu9E () -{ -// DIV YA,X - if (pIAPU->X == 0) - { - APUSetOverflow (); - pIAPU->YA.B.Y = 0xff; - pIAPU->YA.B.A = 0xff; - } - else - { - APUClearOverflow (); - Work8 = pIAPU->YA.W / pIAPU->X; - pIAPU->YA.B.Y = pIAPU->YA.W % pIAPU->X; - pIAPU->YA.B.A = Work8; - } -// XXX How should Overflow, Half Carry, Zero and Negative flags be set?? - // APUSetZN16 (pIAPU->YA.W); - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC++; -} - -void Apu9F () -{ -// XCN A - pIAPU->YA.B.A = (pIAPU->YA.B.A >> 4) | (pIAPU->YA.B.A << 4); - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC++; -} - -void ApuA4 () -{ -// SBC A, dp - Work8 = S9xAPUGetByteZ (OP1); - SBC (pIAPU->YA.B.A, Work8); - pIAPU->PC += 2; -} - -void ApuA5 () -{ -// SBC A, abs - Absolute (); - Work8 = S9xAPUGetByte (pIAPU->Address); - SBC (pIAPU->YA.B.A, Work8); - pIAPU->PC += 3; -} - -void ApuA6 () -{ -// SBC A, (X) - Work8 = S9xAPUGetByteZ (pIAPU->X); - SBC (pIAPU->YA.B.A, Work8); - pIAPU->PC++; -} - -void ApuA7 () -{ -// SBC A,(dp+X) - IndexedXIndirect (); - Work8 = S9xAPUGetByte (pIAPU->Address); - SBC (pIAPU->YA.B.A, Work8); - pIAPU->PC += 2; -} - -void ApuA8 () -{ -// SBC A,#00 - Work8 = OP1; - SBC (pIAPU->YA.B.A, Work8); - pIAPU->PC += 2; -} - -void ApuA9 () -{ -// SBC dp(dest), dp(src) - Work8 = S9xAPUGetByteZ (OP1); - W1 = S9xAPUGetByteZ (OP2); - SBC (W1, Work8); - S9xAPUSetByteZ (W1, OP2); - pIAPU->PC += 3; -} - -void ApuB4 () -{ -// SBC A, dp+X - Work8 = S9xAPUGetByteZ (OP1 + pIAPU->X); - SBC (pIAPU->YA.B.A, Work8); - pIAPU->PC += 2; -} - -void ApuB5 () -{ -// SBC A,abs+X - AbsoluteX (); - Work8 = S9xAPUGetByte (pIAPU->Address); - SBC (pIAPU->YA.B.A, Work8); - pIAPU->PC += 3; -} - -void ApuB6 () -{ -// SBC A,abs+Y - AbsoluteY (); - Work8 = S9xAPUGetByte (pIAPU->Address); - SBC (pIAPU->YA.B.A, Work8); - pIAPU->PC += 3; -} - -void ApuB7 () -{ -// SBC A,(dp)+Y - IndirectIndexedY (); - Work8 = S9xAPUGetByte (pIAPU->Address); - SBC (pIAPU->YA.B.A, Work8); - pIAPU->PC += 2; -} - -void ApuB8 () -{ -// SBC dp,#00 - Work8 = OP1; - W1 = S9xAPUGetByteZ (OP2); - SBC (W1, Work8); - S9xAPUSetByteZ (W1, OP2); - pIAPU->PC += 3; -} - -void ApuB9 () -{ -// SBC (X),(Y) - W1 = S9xAPUGetByteZ (pIAPU->X); - Work8 = S9xAPUGetByteZ (pIAPU->YA.B.Y); - SBC (W1, Work8); - S9xAPUSetByteZ (W1, pIAPU->X); - pIAPU->PC++; -} - -void ApuAF () -{ -// MOV (X)+, A - S9xAPUSetByteZ (pIAPU->YA.B.A, pIAPU->X++); - pIAPU->PC++; -} - -void ApuBE () -{ -// DAS - if ((pIAPU->YA.B.A & 0x0f) > 9 || !APUCheckHalfCarry()) - { - pIAPU->YA.B.A -= 6; - } - if (pIAPU->YA.B.A > 0x9f || !pIAPU->_Carry) - { - pIAPU->YA.B.A -= 0x60; - APUClearCarry (); - } - else { APUSetCarry (); } - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC++; -} - -void ApuBF () -{ -// MOV A,(X)+ - pIAPU->YA.B.A = S9xAPUGetByteZ (pIAPU->X++); - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC++; -} - -void ApuC0 () -{ -// DI - APUClearInterrupt (); - pIAPU->PC++; -} - -void ApuA0 () -{ -// EI - APUSetInterrupt (); - pIAPU->PC++; -} - -void ApuC4 () -{ -// MOV dp,A - S9xAPUSetByteZ (pIAPU->YA.B.A, OP1); - pIAPU->PC += 2; -} - -void ApuC5 () -{ -// MOV abs,A - Absolute (); - S9xAPUSetByte (pIAPU->YA.B.A, pIAPU->Address); - pIAPU->PC += 3; -} - -void ApuC6 () -{ -// MOV (X), A - S9xAPUSetByteZ (pIAPU->YA.B.A, pIAPU->X); - pIAPU->PC++; -} - -void ApuC7 () -{ -// MOV (dp+X),A - IndexedXIndirect (); - S9xAPUSetByte (pIAPU->YA.B.A, pIAPU->Address); - pIAPU->PC += 2; -} - -void ApuC9 () -{ -// MOV abs,X - Absolute (); - S9xAPUSetByte (pIAPU->X, pIAPU->Address); - pIAPU->PC += 3; -} - -void ApuCB () -{ -// MOV dp,Y - S9xAPUSetByteZ (pIAPU->YA.B.Y, OP1); - pIAPU->PC += 2; -} - -void ApuCC () -{ -// MOV abs,Y - Absolute (); - S9xAPUSetByte (pIAPU->YA.B.Y, pIAPU->Address); - pIAPU->PC += 3; -} - -void ApuCD () -{ -// MOV X,#00 - pIAPU->X = OP1; - APUSetZN8 (pIAPU->X); - pIAPU->PC += 2; -} - -void ApuCF () -{ -// MUL YA - pIAPU->YA.W = (uint16) pIAPU->YA.B.A * pIAPU->YA.B.Y; - APUSetZN16 (pIAPU->YA.W); - pIAPU->PC++; -} - -void ApuD4 () -{ -// MOV dp+X, A - S9xAPUSetByteZ (pIAPU->YA.B.A, OP1 + pIAPU->X); - pIAPU->PC += 2; -} - -void ApuD5 () -{ -// MOV abs+X,A - AbsoluteX (); - S9xAPUSetByte (pIAPU->YA.B.A, pIAPU->Address); - pIAPU->PC += 3; -} - -void ApuD6 () -{ -// MOV abs+Y,A - AbsoluteY (); - S9xAPUSetByte (pIAPU->YA.B.A, pIAPU->Address); - pIAPU->PC += 3; -} - -void ApuD7 () -{ -// MOV (dp)+Y,A - IndirectIndexedY (); - S9xAPUSetByte (pIAPU->YA.B.A, pIAPU->Address); - pIAPU->PC += 2; -} - -void ApuD8 () -{ -// MOV dp,X - S9xAPUSetByteZ (pIAPU->X, OP1); - pIAPU->PC += 2; -} - -void ApuD9 () -{ -// MOV dp+Y,X - S9xAPUSetByteZ (pIAPU->X, OP1 + pIAPU->YA.B.Y); - pIAPU->PC += 2; -} - -void ApuDB () -{ -// MOV dp+X,Y - S9xAPUSetByteZ (pIAPU->YA.B.Y, OP1 + pIAPU->X); - pIAPU->PC += 2; -} - -void ApuDF () -{ -// DAA - if ((pIAPU->YA.B.A & 0x0f) > 9 || APUCheckHalfCarry()) - { - if(pIAPU->YA.B.A > 0xf0) APUSetCarry (); - pIAPU->YA.B.A += 6; - //APUSetHalfCarry (); Intel procs do this, but this is a Sony proc... - } - //else { APUClearHalfCarry (); } ditto as above - if (pIAPU->YA.B.A > 0x9f || pIAPU->_Carry) - { - pIAPU->YA.B.A += 0x60; - APUSetCarry (); - } - else { APUClearCarry (); } - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC++; -} - -void ApuE4 () -{ -// MOV A, dp - pIAPU->YA.B.A = S9xAPUGetByteZ (OP1); - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC += 2; -} - -void ApuE5 () -{ -// MOV A,abs - Absolute (); - pIAPU->YA.B.A = S9xAPUGetByte (pIAPU->Address); - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC += 3; -} - -void ApuE6 () -{ -// MOV A,(X) - pIAPU->YA.B.A = S9xAPUGetByteZ (pIAPU->X); - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC++; -} - -void ApuE7 () -{ -// MOV A,(dp+X) - IndexedXIndirect (); - pIAPU->YA.B.A = S9xAPUGetByte (pIAPU->Address); - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC += 2; -} - -void ApuE8 () -{ -// MOV A,#00 - pIAPU->YA.B.A = OP1; - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC += 2; -} - -void ApuE9 () -{ -// MOV X, abs - Absolute (); - pIAPU->X = S9xAPUGetByte (pIAPU->Address); - APUSetZN8 (pIAPU->X); - pIAPU->PC += 3; -} - -void ApuEB () -{ -// MOV Y,dp - pIAPU->YA.B.Y = S9xAPUGetByteZ (OP1); - APUSetZN8 (pIAPU->YA.B.Y); - pIAPU->PC += 2; -} - -void ApuEC () -{ -// MOV Y,abs - Absolute (); - pIAPU->YA.B.Y = S9xAPUGetByte (pIAPU->Address); - APUSetZN8 (pIAPU->YA.B.Y); - pIAPU->PC += 3; -} - -void ApuF4 () -{ -// MOV A, dp+X - pIAPU->YA.B.A = S9xAPUGetByteZ (OP1 + pIAPU->X); - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC += 2; -} - -void ApuF5 () -{ -// MOV A, abs+X - AbsoluteX (); - pIAPU->YA.B.A = S9xAPUGetByte (pIAPU->Address); - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC += 3; -} - -void ApuF6 () -{ -// MOV A, abs+Y - AbsoluteY (); - pIAPU->YA.B.A = S9xAPUGetByte (pIAPU->Address); - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC += 3; -} - -void ApuF7 () -{ -// MOV A, (dp)+Y - IndirectIndexedY (); - pIAPU->YA.B.A = S9xAPUGetByte (pIAPU->Address); - APUSetZN8 (pIAPU->YA.B.A); - pIAPU->PC += 2; -} - -void ApuF8 () -{ -// MOV X,dp - pIAPU->X = S9xAPUGetByteZ (OP1); - APUSetZN8 (pIAPU->X); - pIAPU->PC += 2; -} - -void ApuF9 () -{ -// MOV X,dp+Y - pIAPU->X = S9xAPUGetByteZ (OP1 + pIAPU->YA.B.Y); - APUSetZN8 (pIAPU->X); - pIAPU->PC += 2; -} - -void ApuFA () -{ -// MOV dp(dest),dp(src) - S9xAPUSetByteZ (S9xAPUGetByteZ (OP1), OP2); - pIAPU->PC += 3; -} - -void ApuFB () -{ -// MOV Y,dp+X - pIAPU->YA.B.Y = S9xAPUGetByteZ (OP1 + pIAPU->X); - APUSetZN8 (pIAPU->YA.B.Y); - pIAPU->PC += 2; -} - -//#if defined(ASM_SPC700) -#undef INLINE -#define INLINE extern "C" -#include "apumem.h" -/* -#elif defined(NO_INLINE_SET_GET) -#undef INLINE -#define INLINE -#include "apumem.h" -#endif -*/ - -void (*S9xApuOpcodes[256]) (void) = -{ - Apu00, Apu01, Apu02, Apu03, Apu04, Apu05, Apu06, Apu07, - Apu08, Apu09, Apu0A, Apu0B, Apu0C, Apu0D, Apu0E, Apu0F, - Apu10, Apu11, Apu12, Apu13, Apu14, Apu15, Apu16, Apu17, - Apu18, Apu19, Apu1A, Apu1B, Apu1C, Apu1D, Apu1E, Apu1F, - Apu20, Apu21, Apu22, Apu23, Apu24, Apu25, Apu26, Apu27, - Apu28, Apu29, Apu2A, Apu2B, Apu2C, Apu2D, Apu2E, Apu2F, - Apu30, Apu31, Apu32, Apu33, Apu34, Apu35, Apu36, Apu37, - Apu38, Apu39, Apu3A, Apu3B, Apu3C, Apu3D, Apu3E, Apu3F, - Apu40, Apu41, Apu42, Apu43, Apu44, Apu45, Apu46, Apu47, - Apu48, Apu49, Apu4A, Apu4B, Apu4C, Apu4D, Apu4E, Apu4F, - Apu50, Apu51, Apu52, Apu53, Apu54, Apu55, Apu56, Apu57, - Apu58, Apu59, Apu5A, Apu5B, Apu5C, Apu5D, Apu5E, Apu5F, - Apu60, Apu61, Apu62, Apu63, Apu64, Apu65, Apu66, Apu67, - Apu68, Apu69, Apu6A, Apu6B, Apu6C, Apu6D, Apu6E, Apu6F, - Apu70, Apu71, Apu72, Apu73, Apu74, Apu75, Apu76, Apu77, - Apu78, Apu79, Apu7A, Apu7B, Apu7C, Apu7D, Apu7E, Apu7F, - Apu80, Apu81, Apu82, Apu83, Apu84, Apu85, Apu86, Apu87, - Apu88, Apu89, Apu8A, Apu8B, Apu8C, Apu8D, Apu8E, Apu8F, - Apu90, Apu91, Apu92, Apu93, Apu94, Apu95, Apu96, Apu97, - Apu98, Apu99, Apu9A, Apu9B, Apu9C, Apu9D, Apu9E, Apu9F, - ApuA0, ApuA1, ApuA2, ApuA3, ApuA4, ApuA5, ApuA6, ApuA7, - ApuA8, ApuA9, ApuAA, ApuAB, ApuAC, ApuAD, ApuAE, ApuAF, - ApuB0, ApuB1, ApuB2, ApuB3, ApuB4, ApuB5, ApuB6, ApuB7, - ApuB8, ApuB9, ApuBA, ApuBB, ApuBC, ApuBD, ApuBE, ApuBF, - ApuC0, ApuC1, ApuC2, ApuC3, ApuC4, ApuC5, ApuC6, ApuC7, - ApuC8, ApuC9, ApuCA, ApuCB, ApuCC, ApuCD, ApuCE, ApuCF, - ApuD0, ApuD1, ApuD2, ApuD3, ApuD4, ApuD5, ApuD6, ApuD7, - ApuD8, ApuD9, ApuDA, ApuDB, ApuDC, ApuDD, ApuDE, ApuDF, - ApuE0, ApuE1, ApuE2, ApuE3, ApuE4, ApuE5, ApuE6, ApuE7, - ApuE8, ApuE9, ApuEA, ApuEB, ApuEC, ApuED, ApuEE, ApuEF, - ApuF0, ApuF1, ApuF2, ApuF3, ApuF4, ApuF5, ApuF6, ApuF7, - ApuF8, ApuF9, ApuFA, ApuFB, ApuFC, ApuFD, ApuFE, ApuFF -}; - - -struct SIAPU IAPU2; -struct SIAPU *pIAPU; - -void APUCompare() -{ - IAPU.icount++; - - if(IAPU.PC != IAPU2.PC) { - dprintf("!%02X %5i PC %08X vs %08X", IAPU.opcode, IAPU.icount, IAPU.PC, IAPU2.PC); - exit(1); - } - - if(IAPU.YA.W != IAPU2.YA.W) { - dprintf("!%02X %5i YA %04X vs %04X", IAPU.opcode, IAPU.icount, IAPU.YA.W, IAPU2.YA.W); - dprintf(" (%04X / %02X)", IAPU.ya_prev, IAPU.x_prev); - exit(1); - } - - if((IAPU.P&0x7d) != (IAPU2.P&0x7d)) { - dprintf("!%02X %5i P %02X vs %02X", IAPU.opcode, IAPU.icount, IAPU.P, IAPU2.P); - exit(1); - } - - if(IAPU.X != IAPU2.X) { - dprintf("!%02X %5i X %02X vs %02X", IAPU.opcode, IAPU.icount, IAPU.X, IAPU2.X); - exit(1); - } - - if(IAPU.S != IAPU2.S) { - dprintf("!%02X %5i S %02X vs %02X", IAPU.opcode, IAPU.icount, IAPU.S, IAPU2.S); - exit(1); - } - - if((IAPU._Zero == 0) != (IAPU2._Zero == 0)) { - dprintf("!%02X %5i _Zero %02X vs %02X", IAPU.opcode, IAPU.icount, IAPU._Zero, IAPU2._Zero); - exit(1); - } - - if((IAPU._Zero & 0x80) != (IAPU2._Zero & 0x80)) { - dprintf("!%02X %5i _Zero(n) %02X vs %02X", IAPU.opcode, IAPU.icount, IAPU._Zero, IAPU2._Zero); - exit(1); - } - - if(IAPU.memread_addr != IAPU2.memread_addr) { - dprintf("!%02X %5i memread_addr %04X vs %04X", IAPU.opcode, IAPU.icount, IAPU.memread_addr, IAPU2.memread_addr); - exit(1); - } - - if(IAPU.memread_data != IAPU2.memread_data) { - dprintf("!%02X %5i memread_data %02X@%04X vs %02X@%04X", IAPU.opcode, IAPU.icount, IAPU.memread_data, IAPU.memread_addr, IAPU2.memread_data, IAPU2.memread_addr); - exit(1); - } - - if(IAPU.memwrite_addr != IAPU2.memwrite_addr) { - dprintf("!%02X %5i memwrite_addr %04X vs %04X", IAPU.opcode, IAPU.icount, IAPU.memwrite_addr, IAPU2.memwrite_addr); - exit(1); - } - - if(IAPU.memwrite_data != IAPU2.memwrite_data) { - dprintf("!%02X %5i memwrite_data %02X@%04X vs %02X@%04X", IAPU.opcode, IAPU.icount, IAPU.memwrite_data, IAPU.memwrite_addr, IAPU2.memwrite_data, IAPU2.memwrite_addr); - exit(1); - } -} - - diff --git a/src/spc700/debug/spc700.h b/src/spc700/debug/spc700.h deleted file mode 100644 index 507c247..0000000 --- a/src/spc700/debug/spc700.h +++ /dev/null @@ -1,172 +0,0 @@ -/* - * Snes9x - Portable Super Nintendo Entertainment System (TM) emulator. - * - * (c) Copyright 1996 - 2001 Gary Henderson (gary.henderson@ntlworld.com) and - * Jerremy Koot (jkoot@snes9x.com) - * - * Super FX C emulator code - * (c) Copyright 1997 - 1999 Ivar (ivar@snes9x.com) and - * Gary Henderson. - * Super FX assembler emulator code (c) Copyright 1998 zsKnight and _Demo_. - * - * DSP1 emulator code (c) Copyright 1998 Ivar, _Demo_ and Gary Henderson. - * C4 asm and some C emulation code (c) Copyright 2000 zsKnight and _Demo_. - * C4 C code (c) Copyright 2001 Gary Henderson (gary.henderson@ntlworld.com). - * - * DOS port code contains the works of other authors. See headers in - * individual files. - * - * Snes9x homepage: http://www.snes9x.com - * - * Permission to use, copy, modify and distribute Snes9x in both binary and - * source form, for non-commercial purposes, is hereby granted without fee, - * providing that this license information and copyright notice appear with - * all copies and any derived work. - * - * This software is provided 'as-is', without any express or implied - * warranty. In no event shall the authors be held liable for any damages - * arising from the use of this software. - * - * Snes9x is freeware for PERSONAL USE only. Commercial users should - * seek permission of the copyright holders first. Commercial use includes - * charging money for Snes9x or software derived from Snes9x. - * - * The copyright holders request that bug fixes and improvements to the code - * should be forwarded to them so everyone can benefit from the modifications - * in future versions. - * - * Super NES and Super Nintendo Entertainment System are trademarks of - * Nintendo Co., Limited and its subsidiary companies. - */ -#ifndef _SPC700_H_ -#define _SPC700_H_ - -#ifdef SPCTOOL -#define NO_CHANNEL_STRUCT -#include "spctool/dsp.h" -#include "spctool/spc700.h" -#include "spctool/soundmod.h" -#endif - - -#define Carry 1 -#define Zero 2 -#define Interrupt 4 -#define HalfCarry 8 -#define BreakFlag 16 -#define DirectPageFlag 32 -#define Overflow 64 -#define Negative 128 - -#define APUClearCarry() (pIAPU->_Carry = 0) -#define APUSetCarry() (pIAPU->_Carry = 1) -#define APUSetInterrupt() (pIAPU->P |= Interrupt) -#define APUClearInterrupt() (pIAPU->P &= ~Interrupt) -#define APUSetHalfCarry() (pIAPU->P |= HalfCarry) -#define APUClearHalfCarry() (pIAPU->P &= ~HalfCarry) -#define APUSetBreak() (pIAPU->P |= BreakFlag) -#define APUClearBreak() (pIAPU->P &= ~BreakFlag) -#define APUSetDirectPage() (pIAPU->P |= DirectPageFlag) -#define APUClearDirectPage() (pIAPU->P &= ~DirectPageFlag) -#define APUSetOverflow() (pIAPU->_Overflow = 1) -#define APUClearOverflow() (pIAPU->_Overflow = 0) - -#define APUCheckZero() (pIAPU->_Zero == 0) -#define APUCheckCarry() (pIAPU->_Carry) -#define APUCheckInterrupt() (pIAPU->P & Interrupt) -#define APUCheckHalfCarry() (pIAPU->P & HalfCarry) -#define APUCheckBreak() (pIAPU->P & BreakFlag) -#define APUCheckDirectPage() (pIAPU->P & DirectPageFlag) -#define APUCheckOverflow() (pIAPU->_Overflow) -#define APUCheckNegative() (pIAPU->_Zero & 0x80) - -//#define APUClearFlags(f) (IAPU.P &= ~(f)) -//#define APUSetFlags(f) (IAPU.P |= (f)) -//#define APUCheckFlag(f) (IAPU.P & (f)) - -typedef union -{ -#ifdef LSB_FIRST - struct { uint8 A, Y; } B; -#else - struct { uint8 Y, A; } B; -#endif - uint16 W; - uint32 _padder; // make sure this whole thing takes 4 bytes -} YAndA; - -struct SAPURegisters{ - uint8 P; - YAndA YA; - uint8 X; - uint8 S; - uint16 PC; -}; - -//EXTERN_C struct SAPURegisters APURegisters; - -// Needed by ILLUSION OF GAIA -//#define ONE_APU_CYCLE 14 -#define ONE_APU_CYCLE 21 - -// Needed by all games written by the software company called Human -//#define ONE_APU_CYCLE_HUMAN 17 -#define ONE_APU_CYCLE_HUMAN 21 - -// 1.953us := 1.024065.54MHz - -// return cycles left (always negative) -extern "C" int spc700_execute(int cycles); -extern "C" uint32 Spc700JumpTab; - -#ifdef SPCTOOL -EXTERN_C int32 ESPC (int32); - -#define APU_EXECUTE() \ -{ \ - int32 l = (CPU.Cycles - CPU.APU_Cycles) / 14; \ - if (l > 0) \ - { \ - l -= _EmuSPC(l); \ - CPU.APU_Cycles += l * 14; \ - } \ -} - -#else - -#ifdef DEBUGGER -#define APU_EXECUTE1() \ -{ \ - if (APU.Flags & TRACE_FLAG) \ - S9xTraceAPU ();\ - CPU.APU_Cycles += S9xAPUCycles [*IAPU.PC]; \ - (*S9xApuOpcodes[*IAPU.PC]) (); \ -} -#else -#define APU_EXECUTE1() \ -{ \ - IAPU.asmJumpTab = &Spc700JumpTab; \ - memcpy(&IAPU2, &IAPU, sizeof(IAPU)); \ - CPU.APU_Cycles += S9xAPUCycles [*IAPU.PC]; \ - IAPU.opcode = *IAPU.PC; \ - pIAPU = &IAPU; \ - (*S9xApuOpcodes[*IAPU.PC]) (); \ - if(IAPU._Carry) IAPU.P |= Carry; else IAPU.P &= ~Carry; \ - if(IAPU._Overflow) IAPU.P |= Overflow; else IAPU.P &= ~Overflow; \ - pIAPU = &IAPU2; \ - spc700_execute(0); \ - APUCompare(); \ - IAPU.ya_prev = IAPU.YA.W; \ - IAPU.x_prev = IAPU.X; \ -} -#endif - -#define APU_EXECUTE(mode) \ -if (CPU.APU_APUExecuting == mode) \ -{\ - while (CPU.APU_Cycles <= CPU.Cycles) \ - APU_EXECUTE1(); \ -} -#endif - -#endif diff --git a/src/spc700/spcgen.c b/src/spc700/spcgen.c deleted file mode 100644 index 3ac06d6..0000000 --- a/src/spc700/spcgen.c +++ /dev/null @@ -1,2164 +0,0 @@ -// notaz's SPC700 Emulator -// (c) Copyright 2006 notaz, All rights reserved. -// -// Added some modifications by Bitrider 2010-2011. -// -// this is a rewrite of spc700.cpp in ARM asm, inspired by other asm CPU cores like -// Cyclone and DrZ80. It is meant to be used in Snes9x emulator ports for ARM platforms. -// -// notes: -// "Shutdown" mechanism is not supported, so undefine SPC700_SHUTDOWN in your port.h -// code branches backwards over start of memory are not supported -// (never seen any game doing that) -// -// license: -// the code is released under Snes9x license. It would be nice if the word "notaz" -// would appear somewhere in your documentation or your program's "about" screen -// if you use this :) - -/* - * Permission to use, copy, modify and distribute Snes9x in both binary and - * source form, for non-commercial purposes, is hereby granted without fee, - * providing that this license information and copyright notice appear with - * all copies and any derived work. - * - * This software is provided 'as-is', without any express or implied - * warranty. In no event shall the authors be held liable for any damages - * arising from the use of this software. - * - * Snes9x is freeware for PERSONAL USE only. Commercial users should - * seek permission of the copyright holders first. Commercial use includes - * charging money for Snes9x or software derived from Snes9x. - * - * The copyright holders request that bug fixes and improvements to the code - * should be forwarded to them so everyone can benefit from the modifications - * in future versions. - * - * Super NES and Super Nintendo Entertainment System are trademarks of - * Nintendo Co., Limited and its subsidiary companies. - */ - -int one_apu_cycle[] = {13, 14, 15, 21}; -int current_cycles; - - -// settings -#define VERSION "0.12" -#define APU_EXECUTING_OFF 124 -//#define SPC_DEBUG - - -// includes -#include -#include -#include -#include - - -// timings -int S9xAPUCycles [256] = -{ - /* 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, a, b, c, d, e, f, */ - /* 00 */ 2, 8, 4, 5, 3, 4, 3, 6, 2, 6, 5, 4, 5, 4, 6, 8, - /* 10 */ 2, 8, 4, 5, 4, 5, 5, 6, 5, 5, 6, 5, 2, 2, 4, 6, - /* 20 */ 2, 8, 4, 5, 3, 4, 3, 6, 2, 6, 5, 4, 5, 4, 5, 4, - /* 30 */ 2, 8, 4, 5, 4, 5, 5, 6, 5, 5, 6, 5, 2, 2, 3, 8, - /* 40 */ 2, 8, 4, 5, 3, 4, 3, 6, 2, 6, 4, 4, 5, 4, 6, 6, - /* 50 */ 2, 8, 4, 5, 4, 5, 5, 6, 5, 5, 4, 5, 2, 2, 4, 3, - /* 60 */ 2, 8, 4, 5, 3, 4, 3, 6, 2, 6, 4, 4, 5, 4, 5, 5, - /* 70 */ 2, 8, 4, 5, 4, 5, 5, 6, 5, 5, 5, 5, 2, 2, 3, 6, - /* 80 */ 2, 8, 4, 5, 3, 4, 3, 6, 2, 6, 5, 4, 5, 2, 4, 5, - /* 90 */ 2, 8, 4, 5, 4, 5, 5, 6, 5, 5, 5, 5, 2, 2,12, 5, - /* a0 */ 3, 8, 4, 5, 3, 4, 3, 6, 2, 6, 4, 4, 5, 2, 4, 4, - /* b0 */ 2, 8, 4, 5, 4, 5, 5, 6, 5, 5, 5, 5, 2, 2, 3, 4, - /* c0 */ 3, 8, 4, 5, 4, 5, 4, 7, 2, 5, 6, 4, 5, 2, 4, 9, - /* d0 */ 2, 8, 4, 5, 5, 6, 6, 7, 4, 5, 4, 5, 2, 2, 6, 3, - /* e0 */ 2, 8, 4, 5, 3, 4, 3, 6, 2, 4, 5, 3, 4, 3, 4, 3, - /* f0 */ 2, 8, 4, 5, 4, 5, 5, 6, 3, 4, 5, 4, 2, 2, 4, 3 -}; - - -// stuff -static FILE *AsmFile=NULL; -static int opcode=0; // 0-0xff -static int ibuffer = 0; -static char buff[1024]; - - -void ot(char *format, ...) -{ - va_list valist; - int i, len; - - // notaz: stop me from leaving newlines in the middle of format string - // and generating bad code - for(i=0, len=strlen(format); i < len && format[i] != '\n'; i++); - if(i < len-1 && format[len-1] != '\n') printf("\nWARNING: possible improper newline placement:\n%s\n", format); - - va_start(valist,format); - if (AsmFile) vfprintf(AsmFile,format,valist); - va_end(valist); -} - -// ot buffered -void otb(char *format, ...) -{ - va_list valist; - int i, len; - - // notaz: stop me from leaving newlines in the middle of format string - // and generating bad code - for(i=0, len=strlen(format); i < len && format[i] != '\n'; i++); - if(i < len-1 && format[len-1] != '\n') printf(buff, "\nWARNING: possible improper newline placement:\n%s\n", format); - - va_start(valist,format); - if (AsmFile) vsprintf(buff,format,valist); - ibuffer = 1; - va_end(valist); -} - -void flush_buffer() { - if (ibuffer != 0) { - ot(buff); - ibuffer = 0; - } -} - -// trashes: r0, r1, r2 -// return: r0 -// exit at label "2" -static void GetAPUDSP() { - ot("GetAPUDSP: \n"); - ot(" ldrb r1, [spc_ram, #0xf2] \n"); - // r1 = IAPU.RAM [0xf2] - - ot(" mov r0, #0\n"); - ot(" and r2, r1, #0X0f \n"); - // switch (reg & 0xf) { - ot(" cmp r2, #0x08\n"); - ot(" bxeq lr\n"); // APU_ENVX = 8 - // r1 = IAPU.RAM [0xf2] & 0x7f; - - ot(" cmp r2, #0x09\n"); - // return APU.DSP [reg]; - ot(" ldrne r2, .APU_DSP\n"); - ot(" and r1, r1, #0X7f \n"); // r1 = IAPU.RAM[0xf2] & 0x7f - ot(" ldrneb r0, [r2, r1] \n"); - ot(" bxne lr \n"); - - // APU_OUTX = 9 - // if (SoundData.channels [reg >> 4].state == SOUND_SILENT) return 0; - // return ((SoundData.channels [reg >> 4].sample >> 8) | (SoundData.channels [reg >> 4].sample & 0x - ot(" ldr r2, .SOUNDDATA_CHANNELS\n"); - ot(" mov r1, r1, lsr #4 \n"); - //ot(" add r1, r2, r1, asl #8\n"); - //ot(" ldr r0, [r1, #0x0] \n"); // r0 = SoundData.channels[reg >> 4].state - ot(" ldr r0, [r2, r1, asl #8] \n"); - ot(" add r1, r2, r1, asl #8\n"); - ot(" cmp r0, #0 \n"); // SOUND_SILENT = 0 - ot(" ldrneh r1, [r1, #0x48] \n"); // r1 = SoundData.channels[reg >> 4].sample - ot(" bxeq lr \n"); - - ot(" and r0, r1, #0xff\n"); - ot(" orr r0, r0, r1, lsr #8\n"); - ot(" bx lr \n"); - - ot(".APU_DSP:\n"); - ot(" .long APU + 0x0b\n"); // &APU.DSP - ot(".SOUNDDATA_CHANNELS:\n"); - ot(" .long SoundData + 0x30\n"); // &SoundData.channels[0] -} - - -// bitrider -// macros -static void GetByte() { - ot(" mov r1, r0\n"); - - ot(" ldrb r0, [spc_ram, r1] \n"); - - ot(" cmp r1, #0x0ff\n"); - ot(" bhi 1f \n"); - - ot(" cmp r1, #0xf3 \n"); - ot(" addeq lr, pc, #12 \n"); // lr = &ExitPoint - ot(" beq GetAPUDSP \n"); - - ot(" cmp r1, #0xfd \n"); - ot(" movhs r2, #0 \n"); - ot(" strhsb r2, [spc_ram, r1] \n"); - ot("1:\n"); - - -} - -// trashes: r0, r1, r14 -static void GetByteZ() { - ot(" mov r1, r0\n"); - - ot(" cmp r1, #0xf3 \n"); - ot(" addeq lr, pc, #20 \n"); // lr = &ExitPoint - ot(" beq GetAPUDSP \n"); - - ot(" ldr r14, [context, #iapu_directpage]\n"); - ot(" cmp r1, #0xfd \n"); - ot(" ldrb r0, [r14, r1] \n"); - ot(" movhs r2, #0 \n"); - ot(" strhsb r2, [r14, r1] \n"); -} - -static void SetByte(int restore) { - // Still should check for ShowRom - ot(" add r2, r1, #40 \n"); - ot(" tst r2, #0x10000 \n"); - ot(" bne 1f \n"); - - ot(" bic r2, r1, #0x0f\n"); - ot(" cmp r2, #0xf0\n"); - ot(" strneb r0, [spc_ram, r1] \n"); - ot(" bne 3f\n"); - - ot(" add lr, pc, #20\n"); - - ot(" cmp r1, #0xf1 \n"); - ot(" beq S9xSetAPUControl \n"); - - ot(" cmp r1, #0xf3 \n"); // pc + 4 - ot(" beq S9xSetAPUDSP \n"); // pc + 8 - ot(" b S9xAPUSetByteFFtoF0 \n"); // pc + 12 - - ot("1: \n"); - ot(" bl S9xAPUSetByteFFC0 \n"); - ot(" ldr spc_ram, [context, #iapu_ram] \n"); - ot("3: \n"); - -} - -static void SetByteZ(int restore) { - ot(" ldr r2, [context, #iapu_directpage] \n"); - ot(" cmp r2, spc_ram \n"); - ot(" bne 2f \n"); - - ot(" cmp r1, #0xf0 \n"); - ot(" blo 2f \n"); - - ot(" cmp r1, #0xfe \n"); - ot(" bhs 1f \n"); - - if (restore) ot(" add lr, pc, #16\n"); - else ot(" add lr, pc, #20\n"); - - ot(" cmp r1, #0xf1 \n"); - ot(" beq S9xSetAPUControl \n"); - - ot(" cmp r1, #0xf3 \n"); // pc + 4 - ot(" beq S9xSetAPUDSP \n"); // pc + 8 - ot(" b S9xAPUSetByteFFtoF0 \n"); // pc + 12 - //ot("6: \n"); // pc + 16 - if (restore) { - ot(" ldr spc_ram, [context, #iapu_ram] \n"); - ot(" b 1f \n"); - } - ot("2: \n"); - ot(" strb r0, [r2, r1] \n"); - ot("1: \n"); -} - - -// r0-2: Temporary registers -// r3 : current opcode or temp -// r4 : Cycles remaining -// r5 : Pointer to IAPU structure -// r6 : Pointer to Opcode Jump table -// r7 : Current PC -// r8 : YA -// r9 : P (nzzzzzzz ........ ........ NODBHIZC; nzzzzzzz - NZ flag in use (for a little speedup) - -// r10 : X -// r11 : S -// r14 : temp -// lr : RAM pointer - -static void PrintFramework() -{ - - -#ifndef SPC_DEBUG - ot(" .extern IAPU\n"); -#else - ot(" .extern IAPU2\n"); -#endif - ot(" .extern CPU @ for STOP and SLEEP\n"); - ot(" .extern S9xAPUGetByte\n"); - ot(" .extern S9xAPUSetByte\n"); - ot(" .extern S9xAPUGetByteZ\n"); - ot(" .extern S9xAPUSetByteZ\n\n"); - - // bitrider - ot(" .extern S9xGetAPUDSP\n"); - ot(" .extern S9xSetAPUDSP\n"); - ot(" .extern S9xSetAPUControl\n"); - ot(" .extern S9xAPUSetByteFFC0\n"); - ot(" .extern S9xAPUSetByteFFtoF0\n"); - - ot(" .global spc700_execute @ int cycles\n"); - //ot(" .global Spc700JumpTab\n\n"); - for (current_cycles=0; current_cycles < (sizeof(one_apu_cycle) / sizeof(int)); current_cycles++) - ot(" .global Spc700JumpTab_%i\n", one_apu_cycle[current_cycles]); - ot("\n"); - - - ot(" opcode .req r3\n"); - ot(" cycles .req r4\n"); - ot(" context .req r5\n"); - ot(" opcodes .req r6\n"); - ot(" spc_pc .req r7\n"); - ot(" spc_ya .req r8\n"); - ot(" spc_p .req r9\n"); - ot(" spc_x .req r10\n"); - ot(" spc_s .req r11\n"); - ot(" spc_ram .req r12\n\n"); - - ot(" .equ iapu_directpage, 0x00\n"); - ot(" .equ iapu_ram, 0x44\n"); - ot(" .equ iapu_extraram, 0x48\n"); - ot(" .equ iapu_allregs_load, 0x30\n"); - ot(" .equ iapu_allregs_save, 0x34\n\n"); - - ot(" .equ flag_c, 0x01\n"); - ot(" .equ flag_z, 0x02\n"); - ot(" .equ flag_i, 0x04\n"); - ot(" .equ flag_h, 0x08\n"); - ot(" .equ flag_b, 0x10\n"); - ot(" .equ flag_d, 0x20\n"); - ot(" .equ flag_o, 0x40\n"); - ot(" .equ flag_n, 0x80\n\n"); - - ot(" .equ cpu_apu_executing, %i \n\n", APU_EXECUTING_OFF); - // tmp -// ot(" .equ iapu_carry, 0x24\n"); -// ot(" .equ iapu_overflow, 0x26\n\n"); - - ot("@ --------------------------- Framework --------------------------\n"); - ot(" .align 4\n"); - ot("spc700_execute: @ int cycles\n"); - - ot(" stmfd sp!,{r4-r11,lr}\n"); - -#ifndef SPC_DEBUG - ot(" ldr context,=IAPU @ Pointer to SIAPU struct\n"); -#else - ot(" ldr context,=IAPU2 @ Pointer to SIAPU struct\n"); -#endif - ot(" mov cycles,r0 @ Cycles\n"); - ot(" add r0,context,#iapu_allregs_load\n"); - ot(" ldmia r0,{opcodes,spc_pc,spc_ya,spc_p,spc_x,spc_ram}\n"); - - ot(" ldrb opcode,[spc_pc],#1 @ Fetch first opcode\n"); - ot(" mov spc_s,spc_x,lsr #8\n"); - ot(" and spc_x,spc_x,#0xff\n"); - ot("\n"); - - ot(" ldr pc,[opcodes,opcode,lsl #2] @ Jump to opcode handler\n"); - ot("\n\n"); - - - ot("@ We come back here after execution\n"); - ot("spc700End:\n"); - ot(" orr spc_x,spc_x,spc_s,lsl #8\n"); - ot(" add r0,context,#iapu_allregs_save\n"); - ot(" stmia r0,{spc_pc,spc_ya,spc_p,spc_x}\n"); - ot(" mov r0,cycles\n"); - ot(" ldmfd sp!,{r4-r11,pc}\n"); - ot("\n"); - - ot(" .ltorg\n"); - ot("\n"); - - GetAPUDSP(); -} - - -// --------------------------------------------------------------------------- - -// Trashes r0-r3 -static void MemHandler(int set, int z, int save) -{ - //if(set) ot(" bl S9xAPUSetByte%s\n", z ? "Z" : ""); - //else ot(" bl S9xAPUGetByte%s\n", z ? "Z" : ""); - - //if(set) ot(" asm_S9xAPUSetByte%s\n", z ? "Z" : ""); - //else ot(" asm_S9xAPUGetByte%s\n", z ? "Z" : ""); - if(set) { - if (z) SetByteZ(save); - else SetByte(save); - } else { - if (z) GetByteZ(); - else GetByte(); - } - - //if(save) ot(" ldr spc_ram,[context,#iapu_ram]\n"); -} - -// pushes reg, trashes r1 -static void Push(char *reg) -{ - ot(" add r1,spc_ram,spc_s\n"); - ot(" strb %s,[r1,#0x100]\n", reg); - ot(" sub spc_s,spc_s,#1\n"); -} - -// pushes r0, trashes r0,r1 -static void PushW() -{ - ot(" add r1,spc_ram,spc_s\n"); - ot(" sub spc_s,spc_s,#2\n"); - ot(" strb r0,[r1,#0xff]\n"); - ot(" mov r0,r0,lsr #8\n"); - ot(" strb r0,[r1,#0x100]\n"); -} - -// pops to reg -static void Pop(char *reg) -{ - ot(" add %s,spc_ram,spc_s\n", reg); - ot(" ldrb %s,[%s,#(0x100 + 1)]\n", reg, reg); - ot(" add spc_s,spc_s,#1\n"); -} - -// pops to r0, trashes r1 -static void PopW() -{ - ot(" add r1,spc_ram,spc_s\n"); - ot(" ldrb r0,[r1,#(0xff + 2)]\n"); - ot(" ldrb r1,[r1,#(0x100 + 2)]\n"); - ot(" add spc_s,spc_s,#2\n"); - ot(" orr r0,r0,r1,lsl #8\n"); -} - -// // rr <- absolute, trashes r14 -// rr <- absolute - -static void AbsoluteAdd(int r, char *rAdd) -{ - ot(" ldrb r%i,[spc_pc],#1\n", r); - ot(" ldrb r14,[spc_pc],#1\n"); - if (rAdd) ot(" add r%i,r%i,%s\n", r, r, rAdd); - ot(" add r%i,r%i,r14,lsl #8\n", r, r); -} - -// // rr <- absolute, trashes r14 -// rr <- absolute -static void Absolute(int r) -{ - //ot(" ldrb r%i,[spc_pc],#1\n", r); - //ot(" ldrb r14,[spc_pc],#1\n"); - //ot(" orr r%i,r%i,r14,lsl #8\n", r, r); - AbsoluteAdd(r, NULL); -} - - -// rr <- absoluteX, trashes r14 -static void AbsoluteX(int r) -{ - //Absolute(r); - //ot(" ldrb r%i,[spc_pc],#1\n", r); - //ot(" ldrb r14,[spc_pc],#1\n"); - //ot(" add r%i,r%i,spc_x\n", r, r); - //ot(" add r%i,r%i,r14,lsl #8\n", r, r); - AbsoluteAdd(r, "spc_x"); -} - -// r0 <- absoluteY, trashes r1 -static void AbsoluteY(int r) -{ - //Absolute(r); - //ot(" ldrb r%i,[spc_pc],#1\n", r); - //ot(" ldrb r14,[spc_pc],#1\n"); - //ot(" add r%i,r%i,spc_ya,lsr #8\n", r, r); - //ot(" add r%i,r%i,r14,lsl #8\n", r, r); - AbsoluteAdd(r, "spc_ya, lsr #8"); -} - -// rr <- IndirectIndexedY, trashes r14 -static void IndirectIndexedY(int r) -{ - ot(" ldrb r%i,[spc_pc],#1\n", r); - ot(" ldr r14,[context,#iapu_directpage]\n"); - ot(" ldrb r%i,[r14,r%i]!\n", r, r); - ot(" ldrb r14,[r14,#1]\n"); - //ot(" orr r%i,r%i,r14,lsl #8\n", r, r); - ot(" add r%i,r%i,spc_ya,lsr #8\n", r, r); - ot(" add r%i,r%i,r14,lsl #8\n", r, r); -} - -// rr <- address, trashes r14 -static void IndexedXIndirect(int r) -{ - ot(" ldrb r%i,[spc_pc],#1\n", r); - ot(" ldr r14,[context,#iapu_directpage]\n"); // again, interlocks are bad - ot(" add r%i,r%i,spc_x\n", r, r); - ot(" and r%i,r%i,#0xff\n", r, r); - ot(" ldrb r%i,[r14,r%i]!\n", r, r); - ot(" ldrb r14,[r14,#1]\n"); - ot(" orr r%i,r%i,r14,lsl #8\n", r, r); -} - -// sets ZN for reg in *reg, not suitable for Y -static void SetZN8(char *reg) -{ - ot(" and spc_p,spc_p,#0xff\n"); - ot(" orr spc_p,spc_p,%s,lsl #24\n", reg); -} - -// sets ZN for reg in *reg -static void SetZN16(char *reg) -{ - ot(" and spc_p,spc_p,#0xff\n"); - ot(" orr spc_p,spc_p,%s,lsl #16\n", reg); - ot(" tst %s,#0xff\n", reg); - ot(" orrne spc_p,spc_p,#0x01000000\n"); -} - -// does ROL on r0, sets flags -static void Rol() -{ - ot(" mov r0,r0,lsl #1\n"); - ot(" tst spc_p,#flag_c\n"); - ot(" orrne r0,r0,#1\n"); - ot(" tst r0,#0x100\n"); - ot(" orrne spc_p,spc_p,#flag_c\n"); - ot(" biceq spc_p,spc_p,#flag_c\n"); - SetZN8("r0"); -} - -// does ROR on r0, sets flags -static void Ror() -{ - ot(" tst spc_p,#flag_c\n"); - ot(" orrne r0,r0,#0x100\n"); - ot(" movs r0,r0,lsr #1\n"); - ot(" orrcs spc_p,spc_p,#flag_c\n"); - ot(" biccc spc_p,spc_p,#flag_c\n"); - SetZN8("r0"); -} - -// does ASL on r0, sets flags but doesn't cut the shifted bits -static void Asl() -{ - ot(" tst r0,#0x80\n"); - ot(" orrne spc_p,spc_p,#flag_c\n"); - ot(" biceq spc_p,spc_p,#flag_c\n"); - ot(" mov r0,r0,lsl #1\n"); - SetZN8("r0"); -} - -// does LSR on r0, sets flags -static void Lsr() -{ - ot(" tst r0,#0x01\n"); - ot(" orrne spc_p,spc_p,#flag_c\n"); - ot(" biceq spc_p,spc_p,#flag_c\n"); - ot(" mov r0,r0,lsr #1\n"); - SetZN8("r0"); -} - -// CMP rr0,rr1; trashes r14 -static void Cmp(char *r0, char *r1, int and_r0) -{ - char *lop = r0; - - if(and_r0) { ot(" and r14,%s,#0xff\n", r0); lop = "r14"; } - ot(" subs r14,%s,%s\n", lop, r1); - //ot(" orrge spc_p,spc_p,#flag_c\n"); - //ot(" biclt spc_p,spc_p,#flag_c\n"); - ot(" orrcs spc_p,spc_p,#flag_c\n"); - ot(" biccc spc_p,spc_p,#flag_c\n"); - SetZN8("r14"); -} - -// ADC rr0,rr1 -> rr0, trashes r2,r14, does not mask to byte -static void Adc(char *r0, char *r1) -{ - ot(" eor r2,%s,%s\n", r0, r1); // r3=(a) ^ (b) - ot(" movs r14, spc_p, lsr #1\n"); - ot(" adc %s, %s, %s\n", r0, r0, r1); - //ot(" add %s,%s,%s\n", r0, r0, r1); - //ot(" tst spc_p,#flag_c\n"); - //ot(" addne %s,%s,#1\n", r0, r0); - ot(" movs r14,%s,lsr #8\n", r0); - ot(" orrne spc_p,spc_p,#flag_c\n"); - ot(" biceq spc_p,spc_p,#flag_c\n"); - ot(" eor r14,%s,%s\n", r0, r1); // r14=(b) ^ Work16 - ot(" bic r14,r14,r2\n"); // ((b) ^ Work16) & ~((a) ^ (b)) - ot(" tst r14,#0x80\n"); - ot(" orrne spc_p,spc_p,#flag_o\n"); - ot(" biceq spc_p,spc_p,#flag_o\n"); - ot(" eor r14,r2,%s\n", r0); - ot(" tst r14,#0x10\n"); - ot(" orrne spc_p,spc_p,#flag_h\n"); - ot(" biceq spc_p,spc_p,#flag_h\n"); -} - -// SBC rr0,rr1 -> rr0, trashes r2,r3,r14, does not mask to byte -static void Sbc(char *r0, char *r1) -{ - ot(" movs r14,spc_p,lsr #1\n"); - ot(" sbcs r2,%s,%s\n", r0, r1); - ot(" orrge spc_p,spc_p,#flag_c\n"); - ot(" biclt spc_p,spc_p,#flag_c\n"); - ot(" eor r14,%s,r2\n", r0); // r14=(a) ^ Int16 - ot(" eor r3,%s,%s\n", r0, r1); // r3=(a) ^ (b) - ot(" and r14,r14,r3\n"); // ((a) ^ Work16) & ((a) ^ (b)) - ot(" tst r14,#0x80\n"); - ot(" orrne spc_p,spc_p,#flag_o\n"); - ot(" biceq spc_p,spc_p,#flag_o\n"); - ot(" eor r14,r3,r2\n"); - ot(" tst r14,#0x10\n"); - ot(" orreq spc_p,spc_p,#flag_h\n"); - ot(" bicne spc_p,spc_p,#flag_h\n"); - ot(" mov %s,r2\n", r0); -} - - -// -static void TCall() -{ - ot(" sub r0,spc_pc,spc_ram\n"); - PushW(); - ot(" ldr r0,[context,#iapu_extraram]\n"); - ot(" ldrh r0,[r0,#0x%x]\n", (15-(opcode>>4))<<1); - ot(" add spc_pc,spc_ram,r0\n"); -} - -// -static void SetClr1() -{ - ot(" ldrb r0,[spc_pc]\n"); - MemHandler(0, 1, 0); - ot(" %s r0,r0,#0x%02x\n", opcode & 0x10 ? "bic" : "orr", 1<<(opcode>>5)); - ot(" ldrb r1,[spc_pc],#1\n"); - MemHandler(1, 1, 1); -} - -// -static void BssBbc() -{ - ot(" ldrb r0,[spc_pc],#1\n"); - MemHandler(0, 1, 1); - ot(" tst r0,#0x%02x\n", 1<<(opcode>>5)); - ot(" add%s spc_pc,spc_pc,#1\n", opcode & 0x10 ? "ne" : "eq"); - ot(" ldr%ssb r0,[spc_pc],#1\n", opcode & 0x10 ? "eq" : "ne"); - ot(" sub%s cycles,cycles,#%i\n",opcode & 0x10 ? "eq" : "ne", one_apu_cycle[current_cycles]*2); - ot(" add%s spc_pc,spc_pc,r0\n", opcode & 0x10 ? "eq" : "ne"); -} - -// -static void Membit() -{ - ot(" ldrb r0,[spc_pc], #1\n"); - ot(" ldrb r3,[spc_pc], #1\n"); - //ot(" orr spc_x,spc_x,r1,lsl #(29-5) - ot(" add r3,r0,r3,lsl #8\n"); //@ store membit where it can survive memhandler call\n"); // saving bit 12 ? - //ot(" mov r1,r1,lsr #5\n"); - //ot(" mov r0,r0,lsl #19\n"); - //ot(" mov r0,r0,lsr #19\n"); - //if((opcode >> 4) >= 0xC) ot(" mov r3, r0\n"); //ot(" stmfd sp!,{r0}\n"); // membit - ot(" bic r0, r3, #0xe000\n"); // Clear bits 15, 14 & 13 => r0 = r0 & 0x1fff - MemHandler(0, 0, 0); - //ot(" mov r1,spc_x,lsr #29\n"); - //ot(" and spc_x,spc_x,#0xff\n"); - ot(" mov r1, r3, lsr #13\n"); // membit = bits[15:13] of memory address - if((opcode >> 4) < 0xC) { - ot(" mov r0,r0,lsr r1\n"); - ot(" tst r0,#1\n"); - switch(opcode >> 4) { - case 0x0: ot(" orrne spc_p,spc_p,#flag_c\n"); break; // OR1 C,membit - case 0x2: ot(" orreq spc_p,spc_p,#flag_c\n"); break; // OR1 C,not membit - case 0x4: ot(" biceq spc_p,spc_p,#flag_c\n"); break; // AND1 C,membit - case 0x6: ot(" bicne spc_p,spc_p,#flag_c\n"); break; // AND1 C, not membit - case 0x8: ot(" eorne spc_p,spc_p,#flag_c\n"); break; // EOR1 C, membit - case 0xA: ot(" orrne spc_p,spc_p,#flag_c\n"); // MOV1 C,membit - ot(" biceq spc_p,spc_p,#flag_c\n"); break; - } - } else { - ot(" mov r2,#1\n"); - ot(" mov r2,r2,lsl r1\n"); - if((opcode >> 4) == 0xC) { // MOV1 membit,C - ot(" tst spc_p,#flag_c\n"); - ot(" orrne r0,r0,r2\n"); - ot(" biceq r0,r0,r2\n"); - } else { // NOT1 membit - ot(" eor r0,r0,r2\n"); - } - //ot(" ldmfd sp!,{r1}\n"); - ot(" bic r1, r3, #0xe000\n"); // Clear bits 15, 14 & 13 => r0 = r0 & 0x1fff - MemHandler(1, 0, 0); - } - //ot(" ldr spc_ram,[context,#iapu_ram] @ restore what memhandler(s) messed up\n"); -} - -// -static void CBranch() -{ - int tests[] = { 0x80000000, 0x40, 0x01, 0xff000000 }; // NOCZ - char *eq = "eq"; - char *ne = "ne"; - - if((opcode>>6) == 3) { // zero test inverts everything - eq = "ne"; - ne = "eq"; - } - - ot(" tst spc_p,#0x%08X\n", tests[opcode>>6]); - ot(" add%s spc_pc,spc_pc,#1\n", opcode & 0x20 ? eq : ne); -/* - ot(" b%s Apu%02X\n", opcode & 0x20 ? eq : ne, opcode); - ot(" sub r0,spc_pc,spc_ram\n"); - ot(" ldrsb r1,[spc_pc],#1\n"); - ot(" add r0,r0,r1\n"); - ot(" mov r0,r0,lsl #16\n"); - ot(" add spc_pc,spc_ram,r0,lsr #16\n"); -*/ - ot(" ldr%ssb r0,[spc_pc],#1\n", opcode & 0x20 ? ne : eq); - - ot(" sub%s cycles,cycles,#%i\n", opcode & 0x20 ? ne : eq, one_apu_cycle[current_cycles]*2); - ot(" add%s spc_pc,spc_pc,r0\n", opcode & 0x20 ? ne : eq); -// ot("Apu%02X:\n", opcode); -} - -// NeededOperation spc_ya,r0 -> spc_ya -static void ArithOpToA() -{ - // special A pre-processing - if((opcode>>5) == 4 || (opcode>>5) == 5) { - ot(" and r1,spc_ya,#0xff00\n"); - ot(" and spc_ya,spc_ya,#0xff\n"); - } - - switch(opcode>>5) { - case 0: ot(" orr spc_ya,spc_ya,r0\n"); break; // OR - case 1: ot(" orr r0,r0,#0xff00\n"); - ot(" and spc_ya,spc_ya,r0\n"); break; // AND - case 2: ot(" eor spc_ya,spc_ya,r0\n"); break; // EOR - case 3: Cmp("spc_ya", "r0", 1); break; // CMP - case 4: Adc("spc_ya", "r0"); break; // ADC - case 5: Sbc("spc_ya", "r0"); break; // SBC - case 6: printf("MOV (reversed)!?\n"); break; // MOV (reversed) - case 7: ot(" and spc_ya,spc_ya,#0xff00\n"); - ot(" orr spc_ya,spc_ya,r0\n"); break; // MOV - } - - if((opcode>>5) != 3) SetZN8("spc_ya"); // only if not Cmp - - // special A post-processing - if((opcode>>5) == 4 || (opcode>>5) == 5) { - ot(" and spc_ya,spc_ya,#0xff\n"); - ot(" orr spc_ya,spc_ya,r1\n"); - } -} - -// -static void ArithmeticToA() -{ - switch(opcode&0x1f) { - case 0x04: // OP A,dp - ot(" ldrb r0,[spc_pc],#1\n"); - MemHandler(0, 1, 1); - ArithOpToA(); - break; - - case 0x05: // OP A,abs - Absolute(0); - MemHandler(0, 0, 1); - ArithOpToA(); - break; - - case 0x06: // OP A,(X) - ot(" mov r0,spc_x\n"); - MemHandler(0, 1, 1); - ArithOpToA(); - break; - - case 0x07: // OP A,(dp+X) - IndexedXIndirect(0); - MemHandler(0, 0, 1); - ArithOpToA(); - break; - - case 0x08: // OP A,#00 - ot(" ldrb r0,[spc_pc],#1\n"); - ArithOpToA(); - break; - - case 0x14: // OP A,dp+X - ot(" ldrb r0,[spc_pc],#1\n"); - ot(" add r0,r0,spc_x\n"); - MemHandler(0, 1, 1); - ArithOpToA(); - break; - - case 0x15: // OP A,abs+X - AbsoluteX(0); - MemHandler(0, 0, 1); - ArithOpToA(); - break; - - case 0x16: // OP A,abs+Y - AbsoluteY(0); - MemHandler(0, 0, 1); - ArithOpToA(); - break; - - case 0x17: // OP A,(dp)+Y - IndirectIndexedY(0); - MemHandler(0, 0, 1); - ArithOpToA(); - break; - - default: - printf("Op %02X - arithmetic??\n", opcode); - } -} - -void printOpcodes(int apu_cycles) { - for(opcode = 0; opcode < 0x100; opcode++) { - printf("%02X", opcode); - - ot("\n\n"); - //tmp_prologue(); - ot("Apu%02X_%i:\n", opcode, apu_cycles); - - if((opcode & 0x1f) == 0x10) CBranch(); // BXX - if((opcode & 0x0f) == 0x01) TCall(); // TCALL X - if((opcode & 0x0f) == 0x02) SetClr1(); // SET1/CLR1 direct page bit X - if((opcode & 0x0f) == 0x03) BssBbc(); // BBS/BBC direct page bit X - if((opcode & 0x1f) == 0x0A) Membit(); // membit ops - if((opcode & 0x0f) >= 0x04 && (opcode & 0x0f) <= 0x08 && (opcode & 0x1f) != 0x18 && (opcode >> 5) != 6) - ArithmeticToA(); - - - switch(opcode) { - case 0x00: // NOP - break; - - case 0x3F: // CALL absolute - Absolute(2); - ot(" sub r0,spc_pc,spc_ram\n"); - PushW(); - ot(" add spc_pc,spc_ram,r2\n"); - break; - - case 0x4F: // PCALL $XX - ot(" ldrb r2,[spc_pc],#1\n"); - ot(" sub r0,spc_pc,spc_ram\n"); - PushW(); - ot(" add spc_pc,spc_ram,r2\n"); - ot(" add spc_pc,spc_pc,#0xff00\n"); - break; - - case 0x09: // OR dp(dest),dp(src) - ot(" ldrb r0,[spc_pc],#1\n"); - MemHandler(0, 1, 0); - //ot(" orr spc_x,spc_x,r0,lsl #24 @ save from harm\n"); - ot(" mov r3, r0\n"); - ot(" ldrb r0,[spc_pc]\n"); - MemHandler(0, 1, 0); - ot(" orr r0, r0, r3\n"); - //ot(" orr r0,r0,spc_x,lsr #24\n"); - //ot(" and spc_x,spc_x,#0xff\n"); - SetZN8("r0"); - ot(" ldrb r1,[spc_pc],#1\n"); - MemHandler(1, 1, 1); - break; - - case 0x18: // OR dp,#00 - ot(" ldrb r0,[spc_pc,#1]\n"); - MemHandler(0, 1, 0); - ot(" ldrb r1,[spc_pc],#1\n"); - ot(" orr r0,r0,r1\n"); - SetZN8("r0"); - ot(" ldrb r1,[spc_pc],#1\n"); - MemHandler(1, 1, 1); - break; - - case 0x19: // OR (X),(Y) - ot(" mov r0,spc_x\n"); - MemHandler(0, 1, 0); - //ot(" orr spc_x,spc_x,r0,lsl #24\n"); - ot(" mov r3, r0\n"); - ot(" mov r0,spc_ya,lsr #8\n"); - MemHandler(0, 1, 0); - ot(" orr r0, r3, r0\n"); - //ot(" orr r0,r0,spc_x,lsr #24\n"); - //ot(" and spc_x,spc_x,#0xff\n"); - SetZN8("r0"); - ot(" mov r1,spc_x\n"); - MemHandler(1, 1, 1); - break; - - case 0x0B: // ASL dp - ot(" ldrb r0,[spc_pc]\n"); - MemHandler(0, 1, 0); - Asl(); - ot(" ldrb r1,[spc_pc],#1\n"); - MemHandler(1, 1, 1); - break; - - case 0x0C: // ASL abs - Absolute(0); - //ot(" stmfd sp!,{r0}\n"); - ot(" mov r3, r0\n"); - MemHandler(0, 0, 0); - Asl(); - //ot(" ldmfd sp!,{r1}\n"); - ot(" mov r1, r3\n"); - MemHandler(1, 0, 1); - break; - - case 0x1B: // ASL dp+X - ot(" ldrb r0,[spc_pc],#1\n"); - ot(" add r0,r0,spc_x\n"); - //ot(" stmfd sp!,{r0}\n"); - ot(" mov r3, r0\n"); - MemHandler(0, 1, 0); - Asl(); - //ot(" ldmfd sp!,{r1}\n"); - ot(" mov r1, r3\n"); - MemHandler(1, 1, 1); - break; - - case 0x1C: // ASL A - ot(" tst spc_ya,#0x80\n"); - ot(" orrne spc_p,spc_p,#flag_c\n"); - ot(" biceq spc_p,spc_p,#flag_c\n"); - ot(" and r0,spc_ya,#0x7f\n"); - ot(" and spc_ya,spc_ya,#0xff00\n"); - ot(" orr spc_ya,spc_ya,r0,lsl #1\n"); - SetZN8("spc_ya"); - break; - - case 0x0D: // PUSH PSW - ot(" mov r0,spc_p,lsr #24\n"); - ot(" and r1,r0,#0x80\n"); - ot(" tst r0,r0\n"); - ot(" orreq r1,r1,#flag_z\n"); - ot(" and spc_p,spc_p,#0x7d @ clear N & Z\n"); - ot(" orr spc_p,spc_p,r1\n"); - Push("spc_p"); - otb(" orr spc_p,spc_p,r0,lsl #24\n"); - break; - - case 0x2D: // PUSH A - Push("spc_ya"); - break; - - case 0x4D: // PUSH X - Push("spc_x"); - break; - - case 0x6D: // PUSH Y - ot(" mov r0,spc_ya,lsr #8\n"); - Push("r0"); - break; - - case 0x8E: // POP PSW - Pop("spc_p"); - ot(" and r0,spc_p,#(flag_z|flag_n)\n"); - ot(" eor r0,r0,#flag_z\n"); - ot(" orr spc_p,spc_p,r0,lsl #24\n"); - ot(" tst spc_p,#flag_d\n"); - ot(" addne r0,spc_ram,#0x100\n"); - ot(" moveq r0,spc_ram\n"); - otb(" str r0,[context,#iapu_directpage]\n"); - break; - - case 0xAE: // POP A - Pop("r0"); - ot(" and spc_ya,spc_ya,#0xff00\n"); - otb(" orr spc_ya,spc_ya,r0\n"); - break; - - case 0xCE: // POP X - Pop("spc_x"); - break; - - case 0xEE: // POP X - Pop("r0"); - ot(" and spc_ya,spc_ya,#0xff\n"); - otb(" orr spc_ya,spc_ya,r0,lsl #8\n"); - break; - - case 0x0E: // TSET1 abs - Absolute(0); - ot(" mov r3, r0\n"); - //ot(" orr spc_x,spc_x,r0,lsl #16 @ save from memhandler\n"); - MemHandler(0, 0, 0); - ot(" and r2,r0,spc_ya\n"); - SetZN8("r2"); - ot(" orr r0,r0,spc_ya\n"); - ot(" mov r1, r3\n"); - //ot(" mov r1,spc_x,lsr #16\n"); - //ot(" and spc_x,spc_x,#0xff\n"); - MemHandler(1, 0, 1); - break; - - case 0x4E: // TCLR1 abs - Absolute(0); - ot(" mov r3, r0\n"); - //ot(" orr spc_x,spc_x,r0,lsl #16 @ save from memhandler\n"); - MemHandler(0, 0, 0); - ot(" and r2,r0,spc_ya\n"); - SetZN8("r2"); - ot(" bic r0,r0,spc_ya\n"); - ot(" mov r1, r3\n"); - //ot(" mov r1,spc_x,lsr #16\n"); - //ot(" and spc_x,spc_x,#0xff\n"); - MemHandler(1, 0, 1); - break; - - case 0x0F: // BRK - ot(" sub r0,spc_pc,spc_ram\n"); - PushW(); - ot(" mov r0,spc_p,lsr #24\n"); - ot(" and r1,r0,#0x80\n"); - ot(" tst r0,r0\n"); - ot(" orrne r1,r1,#flag_z\n"); - ot(" and spc_p,spc_p,#0x7d @ clear N & Z\n"); - ot(" orr spc_p,spc_p,r1\n"); - Push("spc_p"); - ot(" orr spc_p,spc_p,#flag_b\n"); - ot(" bic spc_p,spc_p,#flag_i\n"); - ot(" ldr r0,[context,#iapu_extraram]\n"); - ot(" ldrh r0,[r0,#0x20]\n"); - ot(" add spc_pc,spc_ram,r0\n"); - break; - - case 0xEF: // SLEEP - case 0xFF: // STOP: this is to be compatible with yoyofr's code - //ot(" ldr r0,=CPU\n"); - ot(" ldr r0, 5001f\n", apu_cycles); - ot(" mov r1,#0\n"); - //otb(" strb r1,[r0,#122]\n"); - otb(" str r1,[r0,#cpu_apu_executing]\n"); - //tmp_epilogue(); - ot(" subs cycles,cycles,#%i\n", S9xAPUCycles[opcode] * one_apu_cycle[current_cycles]); - ot(" ldrgeb opcode,[spc_pc],#1\n"); - flush_buffer(); - ot(" ldrge pc,[opcodes,opcode,lsl #2]\n"); - ot(" b spc700End\n"); - // don't let code flow until here - ot("5001:\n", apu_cycles); - ot(" .long CPU \n"); - break; - - case 0x2F: // BRA - ot(" ldrsb r0,[spc_pc],#1\n"); - ot(" add spc_pc,spc_pc,r0\n"); - break; - - case 0x80: // SETC - otb(" orr spc_p,spc_p,#flag_c\n"); - break; - - case 0xED: // NOTC - otb(" eor spc_p,spc_p,#flag_c\n"); - break; - - case 0x40: // SETP - ot(" orr spc_p,spc_p,#flag_d\n"); - ot(" add r0,spc_ram,#0x100\n"); - otb(" str r0,[context,#iapu_directpage]\n"); - break; - - case 0x1A: // DECW dp - ot(" ldrb r0,[spc_pc]\n"); - MemHandler(0, 1, 0); - //ot(" stmfd sp!,{r0}\n"); - ot(" mov r3, r0\n"); - ot(" ldrb r0,[spc_pc]\n"); - ot(" add r0,r0,#1\n"); - MemHandler(0, 1, 0); - //ot(" ldmfd sp!,{r1}\n"); - ot(" orr r1,r3,r0,lsl #8\n"); - ot(" sub r0,r1,#1\n"); - SetZN16("r0"); - ot(" stmfd sp!,{r0}\n"); - ot(" ldrb r1,[spc_pc]\n"); - MemHandler(1, 1, 0); - ot(" ldmfd sp!,{r0}\n"); - ot(" mov r0,r0,lsr #8\n"); - ot(" ldrb r1,[spc_pc],#1\n"); - - ot(" add r1,r1,#1\n"); - MemHandler(1, 1, 1); - break; - - case 0x5A: // CMPW YA,dp - ot(" ldrb r0,[spc_pc]\n"); - MemHandler(0, 1, 0); - //ot(" stmfd sp!,{r0}\n"); - ot(" mov r3, r0\n"); - ot(" ldrb r0,[spc_pc],#1\n"); - ot(" add r0,r0,#1\n"); - MemHandler(0, 1, 1); - //ot(" ldmfd sp!,{r1}\n"); - ot(" orr r1,r3,r0,lsl #8\n"); - ot(" subs r0,spc_ya,r1\n"); - ot(" orrge spc_p,spc_p,#flag_c\n"); - ot(" biclt spc_p,spc_p,#flag_c\n"); - SetZN16("r0"); - break; - - case 0x3A: // INCW dp - ot(" ldrb r0,[spc_pc]\n"); - MemHandler(0, 1, 0); - //ot(" stmfd sp!,{r0}\n"); - ot(" mov r3, r0\n"); - ot(" ldrb r0,[spc_pc]\n"); - ot(" add r0,r0,#1\n"); - MemHandler(0, 1, 0); - //ot(" ldmfd sp!,{r1}\n"); - ot(" orr r1,r3,r0,lsl #8\n"); - ot(" add r0,r1,#1\n"); - SetZN16("r0"); - ot(" stmfd sp!,{r0}\n"); - ot(" ldrb r1,[spc_pc]\n"); - MemHandler(1, 1, 0); - ot(" ldmfd sp!,{r0}\n"); - ot(" mov r0,r0,lsr #8\n"); - ot(" ldrb r1,[spc_pc],#1\n"); - ot(" add r1,r1,#1\n"); - MemHandler(1, 1, 1); - break; - - case 0x7A: // ADDW YA,dp - ot(" ldrb r0,[spc_pc]\n"); - MemHandler(0, 1, 0); - //ot(" stmfd sp!,{r0}\n"); - ot(" mov r3, r0\n"); - ot(" ldrb r0,[spc_pc],#1\n"); - ot(" add r0,r0,#1\n"); - MemHandler(0, 1, 1); - //ot(" ldmfd sp!,{r1}\n"); - ot(" orr r1,r3,r0,lsl #8\n"); - ot(" add r0,spc_ya,r1\n"); - ot(" movs r2,r0,lsr #16\n"); - ot(" orrne spc_p,spc_p,#flag_c\n"); - ot(" biceq spc_p,spc_p,#flag_c\n"); - ot(" bic r2,r0,#0x00ff0000\n"); - ot(" eor r3,r1,r2\n"); // Work16 ^ (uint16) Work32 - ot(" eor r14,spc_ya,r1\n"); - ot(" mvn r14,r14\n"); // ~(pIAPU->YA.W ^ Work16) - ot(" and r14,r14,r3\n"); - ot(" tst r14,#0x8000\n"); - ot(" orrne spc_p,spc_p,#flag_o\n"); - ot(" biceq spc_p,spc_p,#flag_o\n"); - ot(" eor r14,r3,spc_ya\n"); - ot(" tst r14,#0x10\n"); - ot(" orrne spc_p,spc_p,#flag_h\n"); - ot(" biceq spc_p,spc_p,#flag_h\n"); - ot(" mov spc_ya,r2\n"); - SetZN16("spc_ya"); - - break; - - case 0x9A: // SUBW YA,dp - ot(" ldrb r0,[spc_pc]\n"); - MemHandler(0, 1, 0); - //ot(" stmfd sp!,{r0}\n"); - ot(" mov r3, r0\n"); - ot(" ldrb r0,[spc_pc],#1\n"); - ot(" add r0,r0,#1\n"); - MemHandler(0, 1, 1); - //ot(" ldmfd sp!,{r1}\n"); - ot(" orr r1,r3,r0,lsl #8\n"); - ot(" subs r0,spc_ya,r1\n"); - ot(" orrge spc_p,spc_p,#flag_c\n"); - ot(" biclt spc_p,spc_p,#flag_c\n"); - ot(" mov r2,r0,lsl #16\n"); - ot(" mov r2,r2,lsr #16\n"); // r2=(uint16) Int32 - ot(" eor r3,spc_ya,r2\n"); // r3=pIAPU->YA.W ^ (uint16) Int32 - ot(" eor r14,spc_ya,r1\n"); - ot(" and r14,r14,r3\n"); - ot(" tst r14,#0x8000\n"); - ot(" orrne spc_p,spc_p,#flag_o\n"); - ot(" biceq spc_p,spc_p,#flag_o\n"); - ot(" eor r14,r3,r1\n"); - ot(" tst r14,#0x10\n"); - ot(" bicne spc_p,spc_p,#flag_h\n"); - ot(" orreq spc_p,spc_p,#flag_h\n"); - ot(" mov spc_ya,r2\n"); - SetZN16("spc_ya"); - break; - - case 0xBA: // MOVW YA,dp - ot(" ldrb r0,[spc_pc]\n"); - MemHandler(0, 1, 0); - ot(" ldrb r1, [spc_pc],#1\n"); - ot(" mov spc_ya, r0\n"); // avoiding inter-locks - ot(" add r0, r1, #1\n"); - MemHandler(0, 1, 1); - ot(" orr spc_ya,spc_ya,r0,lsl #8\n"); - SetZN16("spc_ya"); - break; - - case 0xDA: // MOVW dp,YA - ot(" ldrb r1,[spc_pc]\n"); - ot(" mov r0,spc_ya\n"); - MemHandler(1, 1, 0); - ot(" ldrb r1,[spc_pc],#1\n"); - ot(" mov r0,spc_ya,lsr #8\n"); // avoiding inter-locks - ot(" add r1,r1,#1\n"); - MemHandler(1, 1, 1); - break; - - case 0x69: // CMP dp(dest), dp(src) - ot(" ldrb r0,[spc_pc],#1\n"); - MemHandler(0, 1, 0); - ot(" orr spc_x,spc_x,r0,lsl #24\n"); - ot(" ldrb r0,[spc_pc],#1\n"); - MemHandler(0, 1, 1); - ot(" mov r1,spc_x,lsr #24\n"); - Cmp("r0", "r1", 0); - otb(" and spc_x,spc_x,#0xff\n"); - break; - - case 0x78: // CMP dp,#00 - ot(" ldrb r0,[spc_pc,#1]\n"); - MemHandler(0, 1, 1); - ot(" ldrb r1,[spc_pc],#2\n"); - Cmp("r0", "r1", 0); - break; - - case 0x79: // CMP (X),(Y) - ot(" mov r0,spc_x\n"); - MemHandler(0, 1, 0); - ot(" orr spc_x,spc_x,r0,lsl #24\n"); - ot(" mov r0,spc_ya,lsr #8\n"); - MemHandler(0, 1, 1); - ot(" mov r1,spc_x,lsr #24\n"); - Cmp("r1", "r0", 0); - otb(" and spc_x,spc_x,#0xff\n"); - break; - - case 0x1E: // CMP X,abs - Absolute(0); - MemHandler(0, 0, 1); - Cmp("spc_x", "r0", 0); - break; - - case 0x3E: // CMP X,dp - ot(" ldrb r0,[spc_pc],#1\n"); - - MemHandler(0, 1, 1); - Cmp("spc_x", "r0", 0); - break; - - case 0xC8: // CMP X,#00 - ot(" ldrb r0,[spc_pc],#1\n"); - Cmp("spc_x", "r0", 0); - break; - - case 0x5E: // CMP Y,abs - Absolute(0); - MemHandler(0, 0, 1); - ot(" mov r1,spc_ya,lsr #8\n"); - Cmp("r1", "r0", 0); - break; - - case 0x7E: // CMP Y,dp - ot(" ldrb r0,[spc_pc],#1\n"); - MemHandler(0, 1, 1); - ot(" mov r1,spc_ya,lsr #8\n"); - Cmp("r1", "r0", 0); - break; - - case 0xAD: // CMP Y,#00 - ot(" ldrb r0,[spc_pc],#1\n"); - ot(" mov r1,spc_ya,lsr #8\n"); - Cmp("r1", "r0", 0); - break; - - case 0x1F: // JMP (abs+X) - AbsoluteX(0); - ot(" sub sp,sp,#8\n"); - ot(" str r0,[sp,#4]\n"); - MemHandler(0, 0, 0); - ot(" str r0,[sp]\n"); - ot(" ldr r0,[sp,#4]\n"); - ot(" add r0,r0,#1\n"); - MemHandler(0, 0, 1); - ot(" ldr r1,[sp],#8\n"); - ot(" orr r0,r1,r0,lsl #8\n"); - ot(" add spc_pc,spc_ram,r0\n"); - break; - - case 0x5F: // JMP abs - //Absolute(0); - //ot(" add spc_pc,spc_ram,r0\n"); - ot(" ldrb r0, [spc_pc], #1\n"); - ot(" ldrb r14, [spc_pc], #1\n"); - ot(" add spc_pc, r0, spc_ram\n"); - ot(" add spc_pc, spc_pc, r14, lsl #8\n"); - break; - - case 0x20: // CLRP - ot(" bic spc_p,spc_p,#flag_d\n"); - otb(" str spc_ram,[context,#iapu_directpage]\n"); - break; - - case 0x60: // CLRC - otb(" bic spc_p,spc_p,#flag_c\n"); - break; - - case 0xE0: // CLRV - otb(" bic spc_p,spc_p,#(flag_o|flag_h)\n"); - break; - - case 0x29: // AND dp(dest), dp(src) - ot(" ldrb r0,[spc_pc],#1\n"); - MemHandler(0, 1, 0); - //ot(" stmfd sp!,{r0}\n"); - ot(" mov r3, r0\n"); - ot(" ldrb r0,[spc_pc]\n"); - MemHandler(0, 1, 0); - //ot(" ldmfd sp!,{r1}\n"); - ot(" and r0,r0,r3\n"); - SetZN8("r0"); - ot(" ldrb r1,[spc_pc],#1\n"); - MemHandler(1, 1, 1); - break; - - case 0x38: // AND dp,#00 - ot(" ldrb r0,[spc_pc,#1]\n"); - MemHandler(0, 1, 0); - ot(" ldrb r1,[spc_pc],#2\n"); - ot(" and r0,r0,r1\n"); - SetZN8("r0"); - ot(" ldrb r1,[spc_pc,#-1]\n"); - MemHandler(1, 1, 1); - break; - - case 0x39: // AND (X),(Y) - ot(" mov r0,spc_x\n"); - MemHandler(0, 1, 0); - //ot(" stmfd sp!,{r0}\n"); - ot(" mov r3, r0\n"); - ot(" mov r0,spc_ya,lsr #8\n"); - MemHandler(0, 1, 0); - //ot(" ldmfd sp!,{r1}\n"); - ot(" and r0,r0,r3\n"); - SetZN8("r0"); - ot(" mov r1,spc_x\n"); - MemHandler(1, 1, 1); - break; - - case 0x2B: // ROL dp - ot(" ldrb r0,[spc_pc]\n"); - MemHandler(0, 1, 0); - Rol(); - ot(" ldrb r1,[spc_pc],#1\n"); - MemHandler(1, 1, 1); - break; - - case 0x2C: // ROL abs - Absolute(0); - //ot(" stmfd sp!,{r0}\n"); - ot(" mov r3, r0\n"); - MemHandler(0, 0, 0); - Rol(); - //ot(" ldmfd sp!,{r1}\n"); - ot(" mov r1, r3\n"); - MemHandler(1, 0, 1); - break; - - case 0x3B: // ROL dp+X - ot(" ldrb r0,[spc_pc]\n"); - ot(" add r0,r0,spc_x\n"); - MemHandler(0, 1, 0); - Rol(); - ot(" ldrb r1,[spc_pc],#1\n"); - ot(" add r1,r1,spc_x\n"); - MemHandler(1, 1, 1); - break; - - case 0x3C: // ROL A - ot(" and r0,spc_ya,#0xff\n"); - Rol(); - ot(" and r0,r0,#0xff\n"); - ot(" mov spc_ya,spc_ya,lsr #8\n"); - otb(" orr spc_ya,r0,spc_ya,lsl #8\n"); - break; - - case 0x2E: // CBNE dp,rel - ot(" ldrb r0,[spc_pc],#1\n"); - MemHandler(0, 1, 1); - ot(" and r1,spc_ya,#0xff\n"); - ot(" cmp r0,r1\n"); - ot(" addeq spc_pc,spc_pc,#1\n"); - ot(" ldrnesb r0,[spc_pc],#1\n"); - ot(" subne cycles,cycles,#%i\n", one_apu_cycle[current_cycles]*2); - ot(" addne spc_pc,spc_pc,r0\n"); - break; - - case 0xDE: // CBNE dp+X,rel - ot(" ldrb r0,[spc_pc],#1\n"); - ot(" add r0,r0,spc_x\n"); - MemHandler(0, 1, 1); - ot(" and r1,spc_ya,#0xff\n"); - ot(" cmp r0,r1\n"); - ot(" addeq spc_pc,spc_pc,#1\n"); - ot(" ldrnesb r0,[spc_pc],#1\n"); - ot(" addne spc_pc,spc_pc,r0\n"); - ot(" subne cycles,cycles,#%i\n", one_apu_cycle[current_cycles]*2); - break; - - case 0x3D: // INC X - ot(" add spc_x,spc_x,#1\n"); - ot(" and spc_x,spc_x,#0xff\n"); - SetZN8("spc_x"); - break; - - case 0xFC: // INC Y - ot(" mov r0,spc_ya,lsr #8\n"); - ot(" add r0,r0,#1\n"); - ot(" and r0,r0,#0xff\n"); - SetZN8("r0"); - ot(" and spc_ya,spc_ya,#0xff\n"); - otb(" orr spc_ya,spc_ya,r0,lsl #8\n"); - break; - - case 0x1D: // DEC X - ot(" sub spc_x,spc_x,#1\n"); - ot(" and spc_x,spc_x,#0xff\n"); - SetZN8("spc_x"); - break; - - case 0xDC: // DEC Y - ot(" mov r0,spc_ya,lsr #8\n"); - ot(" sub r0,r0,#1\n"); - ot(" and r0,r0,#0xff\n"); - SetZN8("r0"); - ot(" and spc_ya,spc_ya,#0xff\n"); - otb(" orr spc_ya,spc_ya,r0,lsl #8\n"); - break; - - case 0xAB: // INC dp - ot(" ldrb r0,[spc_pc]\n"); - MemHandler(0, 1, 0); - ot(" add r0,r0,#1\n"); - SetZN8("r0"); - ot(" ldrb r1,[spc_pc],#1\n"); - MemHandler(1, 1, 1); - break; - - case 0xAC: // INC abs - Absolute(0); - //ot(" stmfd sp!,{r0}\n"); - ot(" mov r3, r0\n"); - MemHandler(0, 0, 0); - ot(" add r0,r0,#1\n"); - SetZN8("r0"); - //ot(" ldmfd sp!,{r1}\n"); - ot(" mov r1, r3\n"); - MemHandler(1, 0, 1); - break; - - case 0xBB: // INC dp+X - ot(" ldrb r0,[spc_pc]\n"); - ot(" add r0,r0,spc_x\n"); - MemHandler(0, 1, 0); - ot(" add r0,r0,#1\n"); - SetZN8("r0"); - ot(" ldrb r1,[spc_pc],#1\n"); - ot(" add r1,r1,spc_x\n"); - MemHandler(1, 1, 1); - break; - - case 0xBC: // INC A - ot(" and r0,spc_ya,#0xff\n"); - ot(" add r0,r0,#1\n"); - SetZN8("r0"); - ot(" and r0,r0,#0xff\n"); - ot(" mov spc_ya,spc_ya,lsr #8\n"); - otb(" orr spc_ya,r0,spc_ya,lsl #8\n"); - break; - - case 0x8B: // DEC dp - ot(" ldrb r0,[spc_pc]\n"); - MemHandler(0, 1, 0); - ot(" sub r0,r0,#1\n"); - SetZN8("r0"); - ot(" ldrb r1,[spc_pc],#1\n"); - MemHandler(1, 1, 1); - break; - - case 0x8C: // DEC abs - Absolute(0); - //ot(" stmfd sp!,{r0}\n"); - ot(" mov r3, r0\n"); - MemHandler(0, 0, 0); - ot(" sub r0,r0,#1\n"); - SetZN8("r0"); - //ot(" ldmfd sp!,{r1}\n"); - ot(" mov r1, r3\n"); - MemHandler(1, 0, 1); - break; - - case 0x9B: // DEC dp+X - ot(" ldrb r0,[spc_pc]\n"); - ot(" add r0,r0,spc_x\n"); - MemHandler(0, 1, 0); - ot(" sub r0,r0,#1\n"); - SetZN8("r0"); - ot(" ldrb r1,[spc_pc],#1\n"); - - ot(" add r1,r1,spc_x\n"); - MemHandler(1, 1, 1); - break; - - case 0x9C: // DEC A - ot(" and r0,spc_ya,#0xff\n"); - ot(" sub r0,r0,#1\n"); - SetZN8("r0"); - ot(" and r0,r0,#0xff\n"); - ot(" mov spc_ya,spc_ya,lsr #8\n"); - otb(" orr spc_ya,r0,spc_ya,lsl #8\n"); - break; - - case 0x49: // EOR dp(dest), dp(src) - ot(" ldrb r0,[spc_pc],#1\n"); - MemHandler(0, 1, 0); - //ot(" stmfd sp!,{r0}\n"); - ot(" mov r3, r0\n"); - ot(" ldrb r0,[spc_pc]\n"); - MemHandler(0, 1, 0); - //ot(" ldmfd sp!,{r1}\n"); - ot(" eor r0,r0,r3\n"); - SetZN8("r0"); - ot(" ldrb r1,[spc_pc],#1\n"); - MemHandler(1, 1, 1); - break; - - case 0x58: // EOR dp,#00 - ot(" ldrb r0,[spc_pc,#1]\n"); - MemHandler(0, 1, 0); - ot(" ldrb r1,[spc_pc],#2\n"); - ot(" eor r0,r0,r1\n"); - SetZN8("r0"); - ot(" ldrb r1,[spc_pc,#-1]\n"); - MemHandler(1, 1, 1); - break; - - case 0x59: // EOR (X),(Y) - ot(" mov r0,spc_x\n"); - MemHandler(0, 1, 0); - //ot(" stmfd sp!,{r0}\n"); - ot(" mov r3, r0\n"); - ot(" mov r0,spc_ya,lsr #8\n"); - MemHandler(0, 1, 0); - //ot(" ldmfd sp!,{r1}\n"); - ot(" eor r0,r0,r3\n"); - SetZN8("r0"); - ot(" mov r1,spc_x\n"); - MemHandler(1, 1, 1); - break; - - case 0x4B: // LSR dp - ot(" ldrb r0,[spc_pc]\n"); - MemHandler(0, 1, 0); - Lsr(); - ot(" ldrb r1,[spc_pc],#1\n"); - MemHandler(1, 1, 1); - break; - - case 0x4C: // LSR abs - Absolute(0); - //ot(" stmfd sp!,{r0}\n"); - ot(" mov r3, r0\n"); - MemHandler(0, 0, 0); - Lsr(); - //ot(" ldmfd sp!,{r1}\n"); - ot(" mov r1, r3\n"); - MemHandler(1, 0, 1); - break; - - case 0x5B: // LSR dp+X - ot(" ldrb r0,[spc_pc]\n"); - ot(" add r0,r0,spc_x\n"); - MemHandler(0, 1, 0); - Lsr(); - ot(" ldrb r1,[spc_pc],#1\n"); - ot(" add r1,r1,spc_x\n"); - MemHandler(1, 1, 1); - break; - - case 0x5C: // LSR A - ot(" and r0,spc_ya,#0xff\n"); - Lsr(); - ot(" mov spc_ya,spc_ya,lsr #8\n"); - otb(" orr spc_ya,r0,spc_ya,lsl #8\n"); - break; - - case 0x7D: // MOV A,X - ot(" and spc_ya,spc_ya,#0xff00\n"); - ot(" orr spc_ya,spc_ya,spc_x\n"); - SetZN8("spc_ya"); - break; - - case 0xDD: // MOV A,Y - ot(" and spc_ya,spc_ya,#0xff00\n"); - ot(" orr spc_ya,spc_ya,spc_ya,lsr #8\n"); - SetZN8("spc_ya"); - break; - - case 0x5D: // MOV X,A - ot(" and spc_x,spc_ya,#0xff\n"); - SetZN8("spc_x"); - break; - - case 0xFD: // MOV Y,A - ot(" and spc_ya,spc_ya,#0xff\n"); - ot(" orr spc_ya,spc_ya,spc_ya,lsl #8\n"); - SetZN8("spc_ya"); - break; - - case 0x9D: // MOV X,SP - ot(" mov spc_x,spc_s\n"); - SetZN8("spc_x"); - break; - - case 0xBD: // SP,X - otb(" mov spc_s,spc_x\n"); - break; - - case 0x6B: // ROR dp - ot(" ldrb r0,[spc_pc]\n"); - MemHandler(0, 1, 0); - Ror(); - ot(" ldrb r1,[spc_pc],#1\n"); - MemHandler(1, 1, 1); - break; - - case 0x6C: // ROR abs - Absolute(0); - //ot(" stmfd sp!,{r0}\n"); - ot(" mov r3, r0\n"); - MemHandler(0, 0, 0); - Ror(); - ot(" mov r1, r3\n"); - //ot(" ldmfd sp!,{r1}\n"); - MemHandler(1, 0, 1); - break; - - case 0x7B: // ROR dp+X - ot(" ldrb r0,[spc_pc]\n"); - ot(" add r0,r0,spc_x\n"); - MemHandler(0, 1, 0); - Ror(); - ot(" ldrb r1,[spc_pc],#1\n"); - ot(" add r1,r1,spc_x\n"); - MemHandler(1, 1, 1); - break; - - case 0x7C: // ROR A - ot(" and r0,spc_ya,#0xff\n"); - Ror(); - ot(" mov spc_ya,spc_ya,lsr #8\n"); - otb(" orr spc_ya,r0,spc_ya,lsl #8\n"); - break; - - case 0x6E: // DBNZ dp,rel - ot(" ldrb r0,[spc_pc]\n"); - MemHandler(0, 1, 0); - ot(" ldrb r1,[spc_pc],#1\n"); - ot(" sub r0,r0,#1\n"); - ot(" tst r0,r0\n"); - ot(" addeq spc_pc,spc_pc,#1\n"); - ot(" ldrnesb r2,[spc_pc],#1\n"); - ot(" addne spc_pc,spc_pc,r2\n"); - ot(" subne cycles,cycles,#%i\n", one_apu_cycle[current_cycles]*2); - MemHandler(1, 1, 1); - break; - - case 0xFE: // DBNZ Y,rel - ot(" sub spc_ya,spc_ya,#0x100\n"); - ot(" mov spc_ya,spc_ya,lsl #16\n"); - ot(" mov spc_ya,spc_ya,lsr #16\n"); - ot(" movs r0,spc_ya,lsr #8\n"); - ot(" addeq spc_pc,spc_pc,#1\n"); - ot(" ldrnesb r0,[spc_pc],#1\n"); - ot(" addne spc_pc,spc_pc,r0\n"); - ot(" subne cycles,cycles,#%i\n", one_apu_cycle[current_cycles]*2); - break; - - case 0x6F: // RET - PopW(); - ot(" add spc_pc,spc_ram,r0\n"); - break; - - case 0x7F: // RETI - Pop("spc_p"); - ot(" and r0,spc_p,#(flag_z|flag_n)\n"); - ot(" eor r0,r0,#flag_z\n"); - ot(" orr spc_p,spc_p,r0,lsl #24\n"); - ot(" tst spc_p,#flag_d\n"); - ot(" addne r0,spc_ram,#0x100\n"); - ot(" moveq r0,spc_ram\n"); - ot(" str r0,[context,#iapu_directpage]\n"); - PopW(); - ot(" add spc_pc,spc_ram,r0\n"); - break; - - case 0x89: // ADC dp(dest), dp(src) - ot(" ldrb r0,[spc_pc],#1\n"); - MemHandler(0, 1, 0); - //ot(" stmfd sp!,{r0}\n"); - ot(" mov r3, r0\n"); - ot(" ldrb r0,[spc_pc]\n"); - MemHandler(0, 1, 0); - //ot(" ldmfd sp!,{r1}\n"); - //ot(" mov r1, r3\n"); - Adc("r0", "r3"); - SetZN8("r0"); - ot(" ldrb r1,[spc_pc],#1\n"); - MemHandler(1, 1, 1); - break; - - case 0x98: // ADC dp,#00 - ot(" ldrb r0,[spc_pc,#1]\n"); - MemHandler(0, 1, 0); - ot(" ldrb r1,[spc_pc],#2\n"); - Adc("r0", "r1"); - SetZN8("r0"); - ot(" ldrb r1,[spc_pc,#-1]\n"); - MemHandler(1, 1, 1); - break; - - case 0x99: // ADC (X),(Y) - ot(" mov r0,spc_x\n"); - MemHandler(0, 1, 0); - //ot(" stmfd sp!,{r0}\n"); - ot(" mov r3, r0\n"); - ot(" mov r0,spc_ya,lsr #8\n"); - MemHandler(0, 1, 0); - //ot(" ldmfd sp!,{r1}\n"); - //ot(" mov r1, r3\n"); - Adc("r0", "r3"); - SetZN8("r0"); - ot(" mov r1,spc_x\n"); - MemHandler(1, 1, 1); - break; - - case 0x8D: // MOV Y,#00 //-REVISAR - ot(" ldrb r0,[spc_pc],#1\n"); - ot(" and spc_ya,spc_ya,#0xff\n"); - ot(" orr spc_ya,spc_ya,r0,lsl #8\n"); - SetZN8("r0"); - break; - - case 0x8F: // MOV dp,#00 //-REVISAR - ot(" ldrb r0,[spc_pc],#1\n"); - ot(" ldrb r1,[spc_pc],#1\n"); - MemHandler(1, 1, 1); - break; - - case 0x9E: // DIV YA,X - ot(" tst spc_x,spc_x @ div by 0?\n"); - ot(" orreq spc_ya,spc_ya,#0xff00\n"); - ot(" orreq spc_ya,spc_ya,#0x00ff\n"); - ot(" orreq spc_p,spc_p,#flag_o\n"); - ot(" beq 1002f\n"); - ot(" bic spc_p,spc_p,#flag_o\n"); - - // division algo from Cyclone (result in r3, remainder instead of divident) - ot("@ Divide spc_ya by spc_x\n"); - ot(" mov r3,#0\n"); - ot(" mov r1,spc_x\n"); - ot("\n"); - - // - /*ot("@ Shift up divisor till it's just less than numerator\n"); - ot("divshift:\n"); - ot(" cmp r1,spc_ya,lsr #1\n"); - ot(" movls r1,r1,lsl #1\n"); - ot(" bcc divshift\n"); - ot("\n");*/ - - //optimised version of code provided by William Blair - ot("@ Shift up divisor till it's just less than numerator\n"); - ot("cmp spc_ya,r1,lsl #8\n"); - ot("movge r1,r1,lsl #8\n"); - ot("cmp spc_ya,r1,lsl #4\n"); - ot("movge r1,r1,lsl #4\n"); - ot("cmp spc_ya,r1,lsl #2\n"); - ot("movge r1,r1,lsl #2\n"); - ot("cmp spc_ya,r1,lsl #1\n"); - ot("movge r1,r1,lsl #1\n"); - - ot("1001:\n"); - ot(" cmp spc_ya,r1\n"); - ot(" adc r3,r3,r3 ;@ Double r3 and add 1 if carry set\n"); - ot(" subcs spc_ya,spc_ya,r1\n"); - ot(" teq r1,spc_x\n"); - ot(" movne r1,r1,lsr #1\n"); - ot(" bne 1001b\n"); - ot("\n"); - - ot(" and spc_ya,spc_ya,#0xff\n"); - ot(" and r3,r3,#0xff\n"); - ot(" orr spc_ya,r3,spc_ya,lsl #8\n"); - - ot("1002:\n"); - SetZN8("spc_ya"); - break; - - case 0x9F: // XCN A - ot(" and r0,spc_ya,#0xff\n"); - ot(" mov r1,r0,lsl #28\n"); - ot(" orr r0,r1,r0,lsl #20\n"); - ot(" and spc_ya,spc_ya,#0xff00\n"); - ot(" orr spc_ya,spc_ya,r0,lsr #24\n"); - SetZN8("spc_ya"); - break; - - case 0xA9: // SBC dp(dest), dp(src) - ot(" ldrb r0,[spc_pc],#1\n"); - MemHandler(0, 1, 0); - //ot(" stmfd sp!,{r0}\n"); - ot(" mov r3, r0\n"); - ot(" ldrb r0,[spc_pc]\n"); - MemHandler(0, 1, 0); - //ot(" ldmfd sp!,{r1}\n"); - //ot(" mov r1, r3\n"); - Sbc("r0", "r3"); - SetZN8("r0"); - ot(" ldrb r1,[spc_pc],#1\n"); - MemHandler(1, 1, 1); - break; - - case 0xB8: // SBC dp,#00 - ot(" ldrb r0,[spc_pc,#1]\n"); - MemHandler(0, 1, 0); - ot(" ldrb r1,[spc_pc],#2\n"); - Sbc("r0", "r1"); - SetZN8("r0"); - ot(" ldrb r1,[spc_pc,#-1]\n"); - MemHandler(1, 1, 1); - break; - - case 0xB9: // SBC (X),(Y) - ot(" mov r0,spc_x\n"); - MemHandler(0, 1, 0); - //ot(" stmfd sp!,{r0}\n"); - ot(" mov r3, r0\n"); - ot(" mov r0,spc_ya,lsr #8\n"); - MemHandler(0, 1, 0); - //ot(" ldmfd sp!,{r1}\n"); - //ot(" mov r1, r3\n"); - Sbc("r0", "r3"); - SetZN8("r0"); - ot(" mov r1,spc_x\n"); - MemHandler(1, 1, 1); - break; - - case 0xAF: // MOV (X)+, A - ot(" mov r0,spc_ya\n"); - ot(" mov r1,spc_x\n"); - MemHandler(1, 1, 1); - ot(" add spc_x,spc_x,#1\n"); - otb(" and spc_x,spc_x,#0xff\n"); - break; - - case 0xBE: // DAS - ot(" and r0,spc_ya,#0xff\n"); - ot(" and r1,spc_ya,#0x0f\n"); - ot(" cmp r1,#9\n"); - ot(" subhi r0,r0,#6\n"); - ot(" tstls spc_p,#flag_h\n"); - ot(" subeq r0,r0,#6\n"); - ot(" cmp r0,#0x9f\n"); - ot(" bhi 2001f\n"); - ot(" tst spc_p,#flag_c\n"); - ot(" beq 2001f\n"); - ot(" orr spc_p,spc_p,#flag_c\n"); - ot(" b 2002f\n"); - ot("2001:\n"); // tens - ot(" sub r0,r0,#0x60\n"); - ot(" bic spc_p,spc_p,#flag_c\n"); - - ot("2002:\n"); // end - ot(" and spc_ya,spc_ya,#0xff00\n"); - ot(" orr spc_ya,spc_ya,r0\n"); - SetZN8("spc_ya"); - break; - - case 0xBF: // MOV A,(X)+ - ot(" mov r0,spc_x\n"); - MemHandler(0, 1, 1); - ot(" and spc_ya,spc_ya,#0xff00\n"); - ot(" orr spc_ya,spc_ya,r0\n"); - ot(" add spc_x,spc_x,#1\n"); - ot(" and spc_x,spc_x,#0xff\n"); - SetZN8("spc_ya"); - break; - - case 0xC0: // DI - otb(" bic spc_p,spc_p,#flag_i\n"); - break; - - case 0xA0: // EI - otb(" orr spc_p,spc_p,#flag_i\n"); - break; - - case 0xC4: // MOV dp,A - ot(" ldrb r1,[spc_pc],#1\n"); - ot(" mov r0,spc_ya\n"); - MemHandler(1, 1, 1); - break; - - case 0xC5: // MOV abs,A - Absolute(1); - ot(" mov r0,spc_ya\n"); - MemHandler(1, 0, 1); - break; - - case 0xC6: // MOV (X),A - ot(" mov r0,spc_ya\n"); - ot(" mov r1,spc_x\n"); - MemHandler(1, 1, 1); - break; - - case 0xC7: // MOV (dp+X),A - IndexedXIndirect(1); - ot(" mov r0,spc_ya\n"); - MemHandler(1, 0, 1); - break; - - case 0xC9: // MOV abs,X - Absolute(1); - ot(" mov r0,spc_x\n"); - MemHandler(1, 0, 1); - break; - - case 0xCB: // MOV dp,Y - ot(" ldrb r1,[spc_pc],#1\n"); - ot(" mov r0,spc_ya,lsr #8\n"); - MemHandler(1, 1, 1); - break; - - case 0xCC: // MOV abs,Y - - Absolute(1); - ot(" mov r0,spc_ya,lsr #8\n"); - MemHandler(1, 0, 1); - break; - - case 0xCD: // MOV X,#00 - ot(" ldrb spc_x,[spc_pc],#1\n"); - SetZN8("spc_x"); - break; - - case 0xCF: // MUL YA - ot(" mov r0,spc_ya,lsr #8\n"); - ot(" and spc_ya,spc_ya,#0xff\n"); - ot(" mul spc_ya,r0,spc_ya\n"); - SetZN16("spc_ya"); - break; - - case 0xD4: // MOV dp+X, A - ot(" ldrb r1,[spc_pc],#1\n"); - ot(" mov r0,spc_ya\n"); - ot(" add r1,r1,spc_x\n"); - MemHandler(1, 1, 1); - break; - - case 0xD5: // MOV abs+X,A - AbsoluteX(1); - ot(" mov r0,spc_ya\n"); - MemHandler(1, 0, 1); - break; - - case 0xD6: // MOV abs+Y,A - AbsoluteY(1); - ot(" mov r0,spc_ya\n"); - MemHandler(1, 0, 1); - break; - - case 0xD7: // MOV (dp)+Y,A - IndirectIndexedY(1); - ot(" mov r0,spc_ya\n"); - MemHandler(1, 0, 1); - break; - - case 0xD8: // MOV dp,X - ot(" ldrb r1,[spc_pc],#1\n"); - ot(" mov r0,spc_x\n"); - MemHandler(1, 1, 1); - break; - - case 0xD9: // MOV dp+Y,X - ot(" ldrb r1,[spc_pc],#1\n"); - ot(" mov r0,spc_x\n"); - ot(" add r1,r1,spc_ya,lsr #8\n"); - MemHandler(1, 1, 1); - break; - - case 0xDB: // MOV dp+X,Y - ot(" ldrb r1,[spc_pc],#1\n"); - ot(" mov r0,spc_ya,lsr #8\n"); - ot(" add r1,r1,spc_x\n"); - MemHandler(1, 1, 1); - break; - - case 0xDF: // DAA - ot(" and r0,spc_ya,#0xff\n"); - ot(" and r1,spc_ya,#0x0f\n"); - ot(" cmp r1,#9\n"); - ot(" addhi r0,r0,#6\n"); - ot(" bls 3001f\n"); - ot(" cmphi r0,#0xf0\n"); - ot(" orrhi spc_p,spc_p,#flag_c\n"); - ot(" b 3002f\n"); - ot("3001:\n"); // testHc - ot(" tst spc_p,#flag_h\n"); - ot(" addne r0,r0,#6\n"); - ot(" beq 3002f\n"); - ot(" cmp r0,#0xf0\n"); - ot(" orrhi spc_p,spc_p,#flag_c\n"); - ot("3002:\n"); // test2 - ot(" tst spc_p,#flag_c\n"); - ot(" addne r0,r0,#0x60\n"); - ot(" bne 3003f\n"); - ot(" cmp r0,#0x9f\n"); - ot(" addhi r0,r0,#0x60\n"); - ot(" orrhi spc_p,spc_p,#flag_c\n"); - ot(" bicls spc_p,spc_p,#flag_c\n"); - ot("3003:\n"); // end - ot(" and spc_ya,spc_ya,#0xff00\n"); - ot(" orr spc_ya,spc_ya,r0\n"); - SetZN8("spc_ya"); - break; - - case 0xE9: // MOV X, abs - Absolute(0); - MemHandler(0, 0, 1); - ot(" mov spc_x,r0\n"); - SetZN8("spc_x"); - break; - - case 0xEB: // MOV Y,dp - ot(" ldrb r0,[spc_pc],#1\n"); - MemHandler(0, 1, 1); - ot(" and spc_ya,spc_ya,#0xff\n"); - ot(" orr spc_ya,spc_ya,r0,lsl #8\n"); - SetZN8("r0"); - break; - - case 0xEC: // MOV Y,abs - Absolute(0); - MemHandler(0, 0, 1); - ot(" and spc_ya,spc_ya,#0xff\n"); - ot(" orr spc_ya,spc_ya,r0,lsl #8\n"); - SetZN8("r0"); - break; - - case 0xF8: // MOV X,dp - ot(" ldrb r0,[spc_pc],#1\n"); - MemHandler(0, 1, 1); - ot(" mov spc_x,r0\n"); - SetZN8("spc_x"); - break; - - case 0xF9: // MOV X,dp+Y - ot(" ldrb r0,[spc_pc],#1\n"); - ot(" add r0,r0,spc_ya,lsr #8\n"); - MemHandler(0, 1, 1); - ot(" mov spc_x,r0\n"); - SetZN8("spc_x"); - break; - - case 0xFA: // MOV dp(dest),dp(src) - ot(" ldrb r0,[spc_pc],#1\n"); - MemHandler(0, 1, 0); - ot(" ldrb r1,[spc_pc],#1\n"); - MemHandler(1, 1, 1); - break; - - case 0xFB: // MOV Y,dp+X - ot(" ldrb r0,[spc_pc],#1\n"); - ot(" add r0,r0,spc_x\n"); - MemHandler(0, 1, 1); - ot(" and spc_ya,spc_ya,#0xff\n"); - ot(" orr spc_ya,spc_ya,r0,lsl #8\n"); - SetZN8("r0"); - break; - } - - //tmp_epilogue(); - ot(" subs cycles,cycles,#%i\n", S9xAPUCycles[opcode] * one_apu_cycle[current_cycles]); - ot(" ldrgeb opcode,[spc_pc],#1\n"); - flush_buffer(); - ot(" ldrge pc,[opcodes,opcode,lsl #2]\n"); - ot(" b spc700End\n"); - - printf("\b\b"); - } - - - ot("\n\n"); - -} - - -void printJumpTable(int apu_cycles) { - int i; - ot("@ -------------------------- Jump Table %i --------------------------\n", apu_cycles); - ot("Spc700JumpTab_%i:\n", apu_cycles); - - for (i=0; i < 0x100; i++) - { - if ((i&7)==0) ot(" .long "); - - ot("Apu%02X_%i", i, apu_cycles); - - if ((i&7)==7) ot(" @ %02x\n",i-7); - else if (i+1 < 0x100) ot(", "); - } - -} - -int main() -{ - printf("\n notaz's SPC700 Emulator v%s - Core Creator\n\n", VERSION); - - // Open the assembly file - AsmFile=fopen("spc700a.s", "wt"); if (AsmFile==NULL) return 1; - - ot("@ notaz's SPC700 Emulator v%s - Assembler Output\n\n", VERSION); - ot("@ (c) Copyright 2006 notaz, All rights reserved.\n\n"); - ot("@ Modified by bitrider 2010 - 2011\n\n"); - ot("@ this is a rewrite of spc700.cpp in ARM asm, inspired by other asm CPU cores like\n"); - ot("@ Cyclone and DrZ80. It is meant to be used in Snes9x emulator ports for ARM platforms.\n\n"); - ot("@ the code is released under Snes9x license. See spcgen.c or any other source file\n@ from Snes9x source tree.\n\n\n"); - - PrintFramework(); - - ot(" .align 4\n"); - - for (current_cycles=0; current_cycles < (sizeof(one_apu_cycle) / sizeof(int)); current_cycles++) { - printOpcodes(one_apu_cycle[current_cycles]); - printJumpTable(one_apu_cycle[current_cycles]); - } - - - fclose(AsmFile); AsmFile=NULL; - - printf("Assembling...\n"); - // Assemble the file - //system("as -marmv4t -mthumb-interwork -o spc700a.o spc700a.S"); - printf("Done!\n\n"); - - return 0; -} -- cgit v1.2.3