From 7366cd1493a9c153ea0b5a8f0f692318d8f3b9c8 Mon Sep 17 00:00:00 2001
From: Twinaphex
Date: Fri, 20 Apr 2018 19:22:21 +0200
Subject: Rename setpcbase.s to setpcbase.S

---
 src/setpcbase.S | 85 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 85 insertions(+)
 create mode 100644 src/setpcbase.S

(limited to 'src/setpcbase.S')

diff --git a/src/setpcbase.S b/src/setpcbase.S
new file mode 100644
index 0000000..6f965ae
--- /dev/null
+++ b/src/setpcbase.S
@@ -0,0 +1,85 @@
+asm_S9xSetPCBase:
+	.file 1 "os9x_asm_cpu.cpp"
+	.loc 1 16 0
+	@ args = 0, pretend = 0, frame = 0
+	@ frame_needed = 0, uses_anonymous_args = 0
+
+
+	MOV		R1,R0,LSR #MEMMAP_SHIFT
+	@ MEMMAP_SHIFT is 12, Address is 0xFFFFFFFF at max, so
+	@ R1 is maxed by 0x000FFFFF, MEMMAP_MASK is 0x1000-1=0xFFF
+	@ so AND MEMMAP_MASK is BIC 0xFF000
+	BIC		R1,R1,#0xFF000
+	bic	r0, r0, #0xff0000
+
+	@ R2 <= Map[block] (GetAddress)
+	LDR		R2,[reg_cpu_var,#Map_ofs]
+
+	LDR		R2,[R2,R1,LSL #2]
+	CMP		R2,#MAP_LAST
+	BLO		SPCSpecial  @ special
+
+	mov	regpcbase, r2
+	add	rpc, r2, r0
+	str	rpc, [reg_cpu_var, #PC_ofs]
+	str	regpcbase, [reg_cpu_var, #PCBase_ofs]
+
+	bx	r3
+	
+
+SPCSpecial:
+
+	LDR		PC,[PC,R2,LSL #2]
+	MOV		R0,R0 		@ nop, for align
+
+	.long	SPC_PPU
+	.long	SPCDefault
+	.long	SPCDefault
+	.long	SPCDefault
+	.long	SPCDefault
+	.long	SPCDefault
+	.long	SPCDefault
+	.long	SPCDefault
+	.long	SPCDefault
+	.long	SPCDefault
+	.long	SPCDefault
+	.long	SPCDefault
+/*
+	MAP_PPU 	0
+	MAP_CPU 	1
+	MAP_DSP 	2
+	MAP_LOROM_SRAM	3
+	MAP_HIROM_SRAM	4
+	MAP_NONE	5
+	MAP_DEBUG	6	
+	MAP_C4		7
+	MAP_BWRAM	8
+	MAP_BWRAM_BITMAP	9
+	MAP_BWRAM_BITMAP2	10
+	MAP_SA1RAM	11
+	MAP_LAST	12
+*/
+
+vMemory:
+	.word	Memory
+.equ	_fillram, 20
+
+SPC_PPU:
+	@CPU.PCBase = Memory.FillRAM - 0x2000;
+	@CPU.PC = CPU.PCBase + (Address & 0xffff);
+
+	ldr	r1, vMemory
+	ldr	r2, [r1, #_fillram]
+	sub	r2, r2, #0x2000
+
+	mov	regpcbase, r2
+	add	rpc, r2, r0
+	str	rpc, [reg_cpu_var, #PC_ofs]
+	str	regpcbase, [reg_cpu_var, #PCBase_ofs]
+	
+	@return;
+	bx 	r3
+	@-------------------
+
+SPCDefault:
+	bx	r3
-- 
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