From 47546eadea450c5058a4bea80930a711534a1326 Mon Sep 17 00:00:00 2001 From: twinaphex Date: Fri, 20 Apr 2018 19:11:34 +0200 Subject: Use retro_inline.h --- src/apu.c | 24 +- src/apu.h | 4 +- src/c4.h | 2 +- src/cpuaddr.h | 44 +-- src/cpuexec.h | 8 +- src/cpumacro.h | 124 +++--- src/cpuops.c | 4 +- src/fxemu.c | 8 +- src/fxinst.c | 1198 ++++++++++++++++++++++++++++---------------------------- src/gfx.c | 2 +- src/gfx16.c | 2 +- src/port.h | 12 +- src/sa1.h | 6 +- src/sar.h | 8 +- src/sdd1emu.c | 8 +- src/soundux.c | 4 +- src/soundux.h | 14 +- src/tile.c | 4 +- src/tile16.c | 4 +- 19 files changed, 736 insertions(+), 744 deletions(-) (limited to 'src') diff --git a/src/apu.c b/src/apu.c index 98d3a9e..e2316d3 100644 --- a/src/apu.c +++ b/src/apu.c @@ -98,12 +98,12 @@ unsigned long DecreaseERateExp[32][10]; unsigned long KeyOffERate[10]; -static inline void S9xSetEnvelopeRate(int channel, unsigned long rate, int direction, int target, unsigned int mode) +static INLINE void S9xSetEnvelopeRate(int channel, unsigned long rate, int direction, int target, unsigned int mode) { S9xSetEnvRate(&SoundData.channels [channel], rate, direction, target, mode); } -static inline void S9xSetSoundADSR(int channel, int attack_ind, int decay_ind, +static INLINE void S9xSetSoundADSR(int channel, int attack_ind, int decay_ind, int sustain_ind, int sustain_level, int release_rate) { int attack_rate = AttackRate [attack_ind]; @@ -141,7 +141,7 @@ static inline void S9xSetSoundADSR(int channel, int attack_ind, int decay_ind, } } -static inline void S9xSetSoundVolume(int channel, short volume_left, short volume_right) +static INLINE void S9xSetSoundVolume(int channel, short volume_left, short volume_right) { Channel* ch = &SoundData.channels[channel]; if (!so.stereo) @@ -153,7 +153,7 @@ static inline void S9xSetSoundVolume(int channel, short volume_left, short volum ch->right_vol_level = (ch->envx * volume_right) / 128; } -static inline void S9xSetMasterVolume(short volume_left, short volume_right) +static INLINE void S9xSetMasterVolume(short volume_left, short volume_right) { if (Settings.DisableMasterVolume) { @@ -172,7 +172,7 @@ static inline void S9xSetMasterVolume(short volume_left, short volume_right) } } -static inline void S9xSetEchoVolume(short volume_left, short volume_right) +static INLINE void S9xSetEchoVolume(short volume_left, short volume_right) { if (!so.stereo) volume_left = (ABS(volume_right) + ABS(volume_left)) / 2; @@ -182,18 +182,18 @@ static inline void S9xSetEchoVolume(short volume_left, short volume_right) SoundData.echo_volume [1] = volume_right; } -static inline void S9xSetEchoWriteEnable(uint8 byte) +static INLINE void S9xSetEchoWriteEnable(uint8 byte) { SoundData.echo_write_enabled = byte; S9xSetEchoDelay(APU.DSP [APU_EDL] & 15); } -static inline void S9xSetFrequencyModulationEnable(uint8 byte) +static INLINE void S9xSetFrequencyModulationEnable(uint8 byte) { SoundData.pitch_mod = byte & (0xFE);//~1; } -static inline int S9xGetEnvelopeHeight(int channel) +static INLINE int S9xGetEnvelopeHeight(int channel) { if ((Settings.SoundEnvelopeHeightReading || SNESGameFixes.SoundEnvelopeHeightReading2) && @@ -209,18 +209,18 @@ static inline int S9xGetEnvelopeHeight(int channel) return (0); } -static inline void S9xSetSoundHertz(int channel, int hertz) +static INLINE void S9xSetSoundHertz(int channel, int hertz) { SoundData.channels[channel].hertz = hertz; S9xSetSoundFrequency(channel, hertz); } -static inline void S9xSetSoundType(int channel, int type_of_sound) +static INLINE void S9xSetSoundType(int channel, int type_of_sound) { SoundData.channels[channel].type = type_of_sound; } -static inline bool8 S9xSetSoundMode(int channel, int mode) +static INLINE bool8 S9xSetSoundMode(int channel, int mode) { Channel* ch = &SoundData.channels[channel]; @@ -273,7 +273,7 @@ static inline bool8 S9xSetSoundMode(int channel, int mode) return (FALSE); } -static inline void S9xPlaySample(int channel) +static INLINE void S9xPlaySample(int channel) { Channel* ch = &SoundData.channels[channel]; diff --git a/src/apu.h b/src/apu.h index 88d393b..c915eed 100644 --- a/src/apu.h +++ b/src/apu.h @@ -103,7 +103,7 @@ typedef struct EXTERN_C SAPU APU; EXTERN_C SIAPU IAPU; -static inline void S9xAPUUnpackStatus(void) +static INLINE void S9xAPUUnpackStatus(void) { IAPU._Zero = ((IAPU.P & Zero) == 0) | (IAPU.P & Negative); @@ -116,7 +116,7 @@ static inline void S9xAPUUnpackStatus(void) } } -static inline void S9xAPUPackStatus(void) +static INLINE void S9xAPUPackStatus(void) { #ifdef ASM_SPC700 if (Settings.asmspc700) diff --git a/src/c4.h b/src/c4.h index cc2ee39..67c7781 100644 --- a/src/c4.h +++ b/src/c4.h @@ -107,7 +107,7 @@ extern int16 C4SinTable[]; END_EXTERN_C -static inline uint8* C4GetMemPointer(uint32 Address) +static INLINE uint8* C4GetMemPointer(uint32 Address) { return (Memory.ROM + ((Address & 0xff0000) >> 1) + (Address & 0x7fff)); } diff --git a/src/cpuaddr.h b/src/cpuaddr.h index 920e9c5..8ddbc72 100644 --- a/src/cpuaddr.h +++ b/src/cpuaddr.h @@ -48,19 +48,19 @@ EXTERN_C long OpAddress; -static inline void Immediate8() +static INLINE void Immediate8() { OpAddress = ICPU.ShiftedPB + CPU.PC - CPU.PCBase; CPU.PC++; } -static inline void Immediate16() +static INLINE void Immediate16() { OpAddress = ICPU.ShiftedPB + CPU.PC - CPU.PCBase; CPU.PC += 2; } -static inline void Relative() +static INLINE void Relative() { signed char s9xInt8 = *CPU.PC++; #ifdef VAR_CYCLES @@ -69,7 +69,7 @@ static inline void Relative() OpAddress = ((int)(CPU.PC - CPU.PCBase) + s9xInt8) & 0xffff; } -static inline void RelativeLong() +static INLINE void RelativeLong() { #ifdef FAST_LSB_WORD_ACCESS OpAddress = *(uint16*) CPU.PC; @@ -84,7 +84,7 @@ static inline void RelativeLong() OpAddress &= 0xffff; } -static inline void AbsoluteIndexedIndirect() +static INLINE void AbsoluteIndexedIndirect() { #ifdef FAST_LSB_WORD_ACCESS OpAddress = (Registers.X.W + * (uint16*) CPU.PC) & 0xffff; @@ -98,7 +98,7 @@ static inline void AbsoluteIndexedIndirect() OpAddress = S9xGetWord(ICPU.ShiftedPB + OpAddress); } -static inline void AbsoluteIndirectLong() +static INLINE void AbsoluteIndirectLong() { #ifdef FAST_LSB_WORD_ACCESS OpAddress = *(uint16*) CPU.PC; @@ -113,7 +113,7 @@ static inline void AbsoluteIndirectLong() OpAddress = S9xGetWord(OpAddress) | (S9xGetByte(OpAddress + 2) << 16); } -static inline void AbsoluteIndirect() +static INLINE void AbsoluteIndirect() { #ifdef FAST_LSB_WORD_ACCESS OpAddress = *(uint16*) CPU.PC; @@ -128,7 +128,7 @@ static inline void AbsoluteIndirect() OpAddress = S9xGetWord(OpAddress) + ICPU.ShiftedPB; } -static inline void Absolute() +static INLINE void Absolute() { #ifdef FAST_LSB_WORD_ACCESS OpAddress = *(uint16*) CPU.PC + ICPU.ShiftedDB; @@ -141,7 +141,7 @@ static inline void Absolute() #endif } -static inline void AbsoluteLong() +static INLINE void AbsoluteLong() { #ifdef FAST_LSB_WORD_ACCESS OpAddress = (*(uint32*) CPU.PC) & 0xffffff; @@ -154,7 +154,7 @@ static inline void AbsoluteLong() #endif } -static inline void Direct(void) +static INLINE void Direct(void) { OpAddress = (*CPU.PC++ + Registers.D.W) & 0xffff; #ifdef VAR_CYCLES @@ -163,7 +163,7 @@ static inline void Direct(void) // if (Registers.DL != 0) CPU.Cycles += ONE_CYCLE; } -static inline void DirectIndirectIndexed() +static INLINE void DirectIndirectIndexed() { OpAddress = (*CPU.PC++ + Registers.D.W) & 0xffff; #ifdef VAR_CYCLES @@ -177,7 +177,7 @@ static inline void DirectIndirectIndexed() // XXX: else Add one cycle if crosses page boundary } -static inline void DirectIndirectIndexedLong() +static INLINE void DirectIndirectIndexedLong() { OpAddress = (*CPU.PC++ + Registers.D.W) & 0xffff; #ifdef VAR_CYCLES @@ -189,7 +189,7 @@ static inline void DirectIndirectIndexedLong() // if (Registers.DL != 0) CPU.Cycles += ONE_CYCLE; } -static inline void DirectIndexedIndirect(void) +static INLINE void DirectIndexedIndirect(void) { OpAddress = (*CPU.PC++ + Registers.D.W + Registers.X.W) & 0xffff; #ifdef VAR_CYCLES @@ -206,7 +206,7 @@ static inline void DirectIndexedIndirect(void) #endif } -static inline void DirectIndexedX() +static INLINE void DirectIndexedX() { OpAddress = (*CPU.PC++ + Registers.D.W + Registers.X.W) & 0xffff; #ifdef VAR_CYCLES @@ -221,7 +221,7 @@ static inline void DirectIndexedX() #endif } -static inline void DirectIndexedY() +static INLINE void DirectIndexedY() { OpAddress = (*CPU.PC++ + Registers.D.W + Registers.Y.W) & 0xffff; #ifdef VAR_CYCLES @@ -236,7 +236,7 @@ static inline void DirectIndexedY() #endif } -static inline void AbsoluteIndexedX() +static INLINE void AbsoluteIndexedX() { #ifdef FAST_LSB_WORD_ACCESS OpAddress = ICPU.ShiftedDB + *(uint16*) CPU.PC + Registers.X.W; @@ -252,7 +252,7 @@ static inline void AbsoluteIndexedX() // XXX: else is cross page boundary add one cycle } -static inline void AbsoluteIndexedY() +static INLINE void AbsoluteIndexedY() { #ifdef FAST_LSB_WORD_ACCESS OpAddress = ICPU.ShiftedDB + *(uint16*) CPU.PC + Registers.Y.W; @@ -268,7 +268,7 @@ static inline void AbsoluteIndexedY() // XXX: else is cross page boundary add one cycle } -static inline void AbsoluteLongIndexedX() +static INLINE void AbsoluteLongIndexedX() { #ifdef FAST_LSB_WORD_ACCESS OpAddress = (*(uint32*) CPU.PC + Registers.X.W) & 0xffffff; @@ -281,7 +281,7 @@ static inline void AbsoluteLongIndexedX() #endif } -static inline void DirectIndirect() +static INLINE void DirectIndirect() { OpAddress = (*CPU.PC++ + Registers.D.W) & 0xffff; #ifdef VAR_CYCLES @@ -292,7 +292,7 @@ static inline void DirectIndirect() // if (Registers.DL != 0) CPU.Cycles += ONE_CYCLE; } -static inline void DirectIndirectLong() +static INLINE void DirectIndirectLong() { OpAddress = (*CPU.PC++ + Registers.D.W) & 0xffff; #ifdef VAR_CYCLES @@ -303,7 +303,7 @@ static inline void DirectIndirectLong() // if (Registers.DL != 0) CPU.Cycles += ONE_CYCLE; } -static inline void StackRelative() +static INLINE void StackRelative() { OpAddress = (*CPU.PC++ + Registers.S.W) & 0xffff; #ifdef VAR_CYCLES @@ -312,7 +312,7 @@ static inline void StackRelative() #endif } -static inline void StackRelativeIndirectIndexed() +static INLINE void StackRelativeIndirectIndexed() { OpAddress = (*CPU.PC++ + Registers.S.W) & 0xffff; #ifdef VAR_CYCLES diff --git a/src/cpuexec.h b/src/cpuexec.h index f298e2c..06ccfc0 100644 --- a/src/cpuexec.h +++ b/src/cpuexec.h @@ -93,14 +93,14 @@ extern uint8 S9xE0M0X1 [256]; extern SICPU ICPU; END_EXTERN_C -static inline void CLEAR_IRQ_SOURCE(uint32 M) +static INLINE void CLEAR_IRQ_SOURCE(uint32 M) { CPU.IRQActive &= ~M; if (!CPU.IRQActive) CPU.Flags &= ~IRQ_PENDING_FLAG; } -static inline void S9xUnpackStatus() +static INLINE void S9xUnpackStatus() { ICPU._Zero = (Registers.PL & Zero) == 0; ICPU._Negative = (Registers.PL & Negative); @@ -108,14 +108,14 @@ static inline void S9xUnpackStatus() ICPU._Overflow = (Registers.PL & Overflow) >> 6; } -static inline void S9xPackStatus() +static INLINE void S9xPackStatus() { Registers.PL &= ~(Zero | Negative | Carry | Overflow); Registers.PL |= ICPU._Carry | ((ICPU._Zero == 0) << 1) | (ICPU._Negative & 0x80) | (ICPU._Overflow << 6); } -static inline void S9xFixCycles() +static INLINE void S9xFixCycles() { if (CheckEmulation()) { diff --git a/src/cpumacro.h b/src/cpumacro.h index d2a4954..565f1b2 100644 --- a/src/cpumacro.h +++ b/src/cpumacro.h @@ -41,19 +41,19 @@ #ifndef _CPUMACRO_H_ #define _CPUMACRO_H_ -static inline void SetZN16(uint16 Work) +static INLINE void SetZN16(uint16 Work) { ICPU._Zero = Work != 0; ICPU._Negative = (uint8)(Work >> 8); } -static inline void SetZN8(uint8 Work) +static INLINE void SetZN8(uint8 Work) { ICPU._Zero = Work; ICPU._Negative = Work; } -static inline void ADC8() +static INLINE void ADC8() { uint8 Work8 = S9xGetByte(OpAddress); @@ -106,7 +106,7 @@ static inline void ADC8() } } -static inline void ADC16() +static INLINE void ADC16() { uint16 Work16 = S9xGetWord(OpAddress); @@ -176,19 +176,19 @@ static inline void ADC16() } } -static inline void AND16() +static INLINE void AND16() { Registers.A.W &= S9xGetWord(OpAddress); SetZN16(Registers.A.W); } -static inline void AND8() +static INLINE void AND8() { Registers.AL &= S9xGetByte(OpAddress); SetZN8(Registers.AL); } -static inline void A_ASL16() +static INLINE void A_ASL16() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -198,7 +198,7 @@ static inline void A_ASL16() SetZN16(Registers.A.W); } -static inline void A_ASL8() +static INLINE void A_ASL8() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -208,7 +208,7 @@ static inline void A_ASL8() SetZN8(Registers.AL); } -static inline void ASL16() +static INLINE void ASL16() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -220,7 +220,7 @@ static inline void ASL16() SetZN16(Work16); } -static inline void ASL8() +static INLINE void ASL8() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -232,7 +232,7 @@ static inline void ASL8() SetZN8(Work8); } -static inline void BIT16() +static INLINE void BIT16() { uint16 Work16 = S9xGetWord(OpAddress); ICPU._Overflow = (Work16 & 0x4000) != 0; @@ -240,7 +240,7 @@ static inline void BIT16() ICPU._Zero = (Work16 & Registers.A.W) != 0; } -static inline void BIT8() +static INLINE void BIT8() { uint8 Work8 = S9xGetByte(OpAddress); ICPU._Overflow = (Work8 & 0x40) != 0; @@ -248,7 +248,7 @@ static inline void BIT8() ICPU._Zero = Work8 & Registers.AL; } -static inline void CMP16() +static INLINE void CMP16() { long s9xInt32 = (long) Registers.A.W - (long) S9xGetWord(OpAddress); @@ -256,7 +256,7 @@ static inline void CMP16() SetZN16((uint16) s9xInt32); } -static inline void CMP8() +static INLINE void CMP8() { short s9xInt16 = (short) Registers.AL - (short) S9xGetByte(OpAddress); @@ -264,7 +264,7 @@ static inline void CMP8() SetZN8((uint8) s9xInt16); } -static inline void CMX16() +static INLINE void CMX16() { long s9xInt32 = (long) Registers.X.W - (long) S9xGetWord(OpAddress); @@ -272,7 +272,7 @@ static inline void CMX16() SetZN16((uint16) s9xInt32); } -static inline void CMX8() +static INLINE void CMX8() { short s9xInt16 = (short) Registers.XL - (short) S9xGetByte(OpAddress); @@ -280,7 +280,7 @@ static inline void CMX8() SetZN8((uint8) s9xInt16); } -static inline void CMY16() +static INLINE void CMY16() { long s9xInt32 = (long) Registers.Y.W - (long) S9xGetWord(OpAddress); @@ -288,7 +288,7 @@ static inline void CMY16() SetZN16((uint16) s9xInt32); } -static inline void CMY8() +static INLINE void CMY8() { short s9xInt16 = (short) Registers.YL - (short) S9xGetByte(OpAddress); @@ -296,7 +296,7 @@ static inline void CMY8() SetZN8((uint8) s9xInt16); } -static inline void A_DEC16() +static INLINE void A_DEC16() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -309,7 +309,7 @@ static inline void A_DEC16() SetZN16(Registers.A.W); } -static inline void A_DEC8() +static INLINE void A_DEC8() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -322,7 +322,7 @@ static inline void A_DEC8() SetZN8(Registers.AL); } -static inline void DEC16() +static INLINE void DEC16() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -336,7 +336,7 @@ static inline void DEC16() SetZN16(Work16); } -static inline void DEC8() +static INLINE void DEC8() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -350,19 +350,19 @@ static inline void DEC8() SetZN8(Work8); } -static inline void EOR16() +static INLINE void EOR16() { Registers.A.W ^= S9xGetWord(OpAddress); SetZN16(Registers.A.W); } -static inline void EOR8() +static INLINE void EOR8() { Registers.AL ^= S9xGetByte(OpAddress); SetZN8(Registers.AL); } -static inline void A_INC16() +static INLINE void A_INC16() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -375,7 +375,7 @@ static inline void A_INC16() SetZN16(Registers.A.W); } -static inline void A_INC8() +static INLINE void A_INC8() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -388,7 +388,7 @@ static inline void A_INC8() SetZN8(Registers.AL); } -static inline void INC16() +static INLINE void INC16() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -402,7 +402,7 @@ static inline void INC16() SetZN16(Work16); } -static inline void INC8() +static INLINE void INC8() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -416,43 +416,43 @@ static inline void INC8() SetZN8(Work8); } -static inline void LDA16() +static INLINE void LDA16() { Registers.A.W = S9xGetWord(OpAddress); SetZN16(Registers.A.W); } -static inline void LDA8() +static INLINE void LDA8() { Registers.AL = S9xGetByte(OpAddress); SetZN8(Registers.AL); } -static inline void LDX16() +static INLINE void LDX16() { Registers.X.W = S9xGetWord(OpAddress); SetZN16(Registers.X.W); } -static inline void LDX8() +static INLINE void LDX8() { Registers.XL = S9xGetByte(OpAddress); SetZN8(Registers.XL); } -static inline void LDY16() +static INLINE void LDY16() { Registers.Y.W = S9xGetWord(OpAddress); SetZN16(Registers.Y.W); } -static inline void LDY8() +static INLINE void LDY8() { Registers.YL = S9xGetByte(OpAddress); SetZN8(Registers.YL); } -static inline void A_LSR16() +static INLINE void A_LSR16() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -462,7 +462,7 @@ static inline void A_LSR16() SetZN16(Registers.A.W); } -static inline void A_LSR8() +static INLINE void A_LSR8() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -472,7 +472,7 @@ static inline void A_LSR8() SetZN8(Registers.AL); } -static inline void LSR16() +static INLINE void LSR16() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -484,7 +484,7 @@ static inline void LSR16() SetZN16(Work16); } -static inline void LSR8() +static INLINE void LSR8() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -496,19 +496,19 @@ static inline void LSR8() SetZN8(Work8); } -static inline void ORA16() +static INLINE void ORA16() { Registers.A.W |= S9xGetWord(OpAddress); SetZN16(Registers.A.W); } -static inline void ORA8() +static INLINE void ORA8() { Registers.AL |= S9xGetByte(OpAddress); SetZN8(Registers.AL); } -static inline void A_ROL16() +static INLINE void A_ROL16() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -519,7 +519,7 @@ static inline void A_ROL16() SetZN16((uint16) Work32); } -static inline void A_ROL8() +static INLINE void A_ROL8() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -532,7 +532,7 @@ static inline void A_ROL8() SetZN8((uint8) Work16); } -static inline void ROL16() +static INLINE void ROL16() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -545,7 +545,7 @@ static inline void ROL16() SetZN16((uint16) Work32); } -static inline void ROL8() +static INLINE void ROL8() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -558,7 +558,7 @@ static inline void ROL8() SetZN8((uint8) Work16); } -static inline void A_ROR16() +static INLINE void A_ROR16() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -571,7 +571,7 @@ static inline void A_ROR16() SetZN16((uint16) Work32); } -static inline void A_ROR8() +static INLINE void A_ROR8() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -583,7 +583,7 @@ static inline void A_ROR8() SetZN8((uint8) Work16); } -static inline void ROR16() +static INLINE void ROR16() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -596,7 +596,7 @@ static inline void ROR16() SetZN16((uint16) Work32); } -static inline void ROR8() +static INLINE void ROR8() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -609,7 +609,7 @@ static inline void ROR8() SetZN8((uint8) Work16); } -static inline void SBC16() +static INLINE void SBC16() { uint16 Work16 = S9xGetWord(OpAddress); @@ -677,7 +677,7 @@ static inline void SBC16() } } -static inline void SBC8() +static INLINE void SBC8() { uint8 Work8 = S9xGetByte(OpAddress); if (CheckDecimal()) @@ -726,47 +726,47 @@ static inline void SBC8() } } -static inline void STA16() +static INLINE void STA16() { S9xSetWord(Registers.A.W, OpAddress); } -static inline void STA8() +static INLINE void STA8() { S9xSetByte(Registers.AL, OpAddress); } -static inline void STX16() +static INLINE void STX16() { S9xSetWord(Registers.X.W, OpAddress); } -static inline void STX8() +static INLINE void STX8() { S9xSetByte(Registers.XL, OpAddress); } -static inline void STY16() +static INLINE void STY16() { S9xSetWord(Registers.Y.W, OpAddress); } -static inline void STY8() +static INLINE void STY8() { S9xSetByte(Registers.YL, OpAddress); } -static inline void STZ16() +static INLINE void STZ16() { S9xSetWord(0, OpAddress); } -static inline void STZ8() +static INLINE void STZ8() { S9xSetByte(0, OpAddress); } -static inline void TSB16() +static INLINE void TSB16() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -777,7 +777,7 @@ static inline void TSB16() S9xSetWord(Work16, OpAddress); } -static inline void TSB8() +static INLINE void TSB8() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -788,7 +788,7 @@ static inline void TSB8() S9xSetByte(Work8, OpAddress); } -static inline void TRB16() +static INLINE void TRB16() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -799,7 +799,7 @@ static inline void TRB16() S9xSetWord(Work16, OpAddress); } -static inline void TRB8() +static INLINE void TRB8() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; diff --git a/src/cpuops.c b/src/cpuops.c index b87bd66..b0c4b78 100644 --- a/src/cpuops.c +++ b/src/cpuops.c @@ -2495,7 +2495,7 @@ static void Op0CM0(void) #ifdef CPU_SHUTDOWN #ifndef SA1_OPCODES -static inline void CPUShutdown() +static INLINE void CPUShutdown() { if (Settings.Shutdown && CPU.PC == CPU.WaitAddress) { @@ -2522,7 +2522,7 @@ static inline void CPUShutdown() } } #else -static inline void CPUShutdown() +static INLINE void CPUShutdown() { if (Settings.Shutdown && CPU.PC == CPU.WaitAddress) { diff --git a/src/fxemu.c b/src/fxemu.c index a6af324..a988cf2 100644 --- a/src/fxemu.c +++ b/src/fxemu.c @@ -153,7 +153,7 @@ void FxCacheWriteAccess(uint16 vAddress) // GSU.vPipe = 0x1; } -static inline void fx_backupCache() +static INLINE void fx_backupCache() { #if 0 uint32 i; @@ -189,7 +189,7 @@ static inline void fx_backupCache() #endif } -static inline void fx_restoreCache() +static INLINE void fx_restoreCache() { #if 0 uint32 i; @@ -241,7 +241,7 @@ void fx_updateRamBank(uint8 Byte) } -static inline void fx_readRegisterSpace() +static INLINE void fx_readRegisterSpace() { int i; uint8* p; @@ -453,7 +453,7 @@ void fx_computeScreenPointers() } } -static inline void fx_writeRegisterSpace() +static INLINE void fx_writeRegisterSpace() { int i; uint8* p; diff --git a/src/fxinst.c b/src/fxinst.c index 15c54ba..fd20a74 100644 --- a/src/fxinst.c +++ b/src/fxinst.c @@ -114,7 +114,7 @@ int gsu_bank [512] = {0}; */ /* 00 - stop - stop GSU execution (and maybe generate an IRQ) */ -static inline void fx_stop() +static INLINE void fx_stop() { CF(G); GSU.vCounter = 0; @@ -131,7 +131,7 @@ static inline void fx_stop() } /* 01 - nop - no operation */ -static inline void fx_nop() +static INLINE void fx_nop() { CLRFLAGS; R15++; @@ -140,7 +140,7 @@ static inline void fx_nop() extern void fx_flushCache(); /* 02 - cache - reintialize GSU cache */ -static inline void fx_cache() +static INLINE void fx_cache() { uint32 c = R15 & 0xfff0; if (GSU.vCacheBaseReg != c || !GSU.bCacheActive) @@ -171,7 +171,7 @@ static inline void fx_cache() } /* 03 - lsr - logic shift right */ -static inline void fx_lsr() +static INLINE void fx_lsr() { uint32 v; GSU.vCarry = SREG & 1; @@ -185,7 +185,7 @@ static inline void fx_lsr() } /* 04 - rol - rotate left */ -static inline void fx_rol() +static INLINE void fx_rol() { uint32 v = USEX16((SREG << 1) + GSU.vCarry); GSU.vCarry = (SREG >> 15) & 1; @@ -198,7 +198,7 @@ static inline void fx_rol() } /* 05 - bra - branch always */ -static inline void fx_bra() +static INLINE void fx_bra() { uint8 v = PIPE; R15++; @@ -215,61 +215,61 @@ static inline void fx_bra() #define TEST_CY (GSU.vCarry & 1) /* 06 - blt - branch on less than */ -static inline void fx_blt() +static INLINE void fx_blt() { BRA_COND((TEST_S != 0) != (TEST_OV != 0)); } /* 07 - bge - branch on greater or equals */ -static inline void fx_bge() +static INLINE void fx_bge() { BRA_COND((TEST_S != 0) == (TEST_OV != 0)); } /* 08 - bne - branch on not equal */ -static inline void fx_bne() +static INLINE void fx_bne() { BRA_COND(!TEST_Z); } /* 09 - beq - branch on equal */ -static inline void fx_beq() +static INLINE void fx_beq() { BRA_COND(TEST_Z); } /* 0a - bpl - branch on plus */ -static inline void fx_bpl() +static INLINE void fx_bpl() { BRA_COND(!TEST_S); } /* 0b - bmi - branch on minus */ -static inline void fx_bmi() +static INLINE void fx_bmi() { BRA_COND(TEST_S); } /* 0c - bcc - branch on carry clear */ -static inline void fx_bcc() +static INLINE void fx_bcc() { BRA_COND(!TEST_CY); } /* 0d - bcs - branch on carry set */ -static inline void fx_bcs() +static INLINE void fx_bcs() { BRA_COND(TEST_CY); } /* 0e - bvc - branch on overflow clear */ -static inline void fx_bvc() +static INLINE void fx_bvc() { BRA_COND(!TEST_OV); } /* 0f - bvs - branch on overflow set */ -static inline void fx_bvs() +static INLINE void fx_bvs() { BRA_COND(TEST_OV); } @@ -285,134 +285,134 @@ else { GSU.pvDreg = &GSU.avReg[reg]; } R15++; #define FX_TO_R15(reg) \ if(TF(B)) { GSU.avReg[(reg)] = SREG; CLRFLAGS; } \ else { GSU.pvDreg = &GSU.avReg[reg]; R15++; } -static inline void fx_to_r0() +static INLINE void fx_to_r0() { FX_TO(0); } -static inline void fx_to_r1() +static INLINE void fx_to_r1() { FX_TO(1); } -static inline void fx_to_r2() +static INLINE void fx_to_r2() { FX_TO(2); } -static inline void fx_to_r3() +static INLINE void fx_to_r3() { FX_TO(3); } -static inline void fx_to_r4() +static INLINE void fx_to_r4() { FX_TO(4); } -static inline void fx_to_r5() +static INLINE void fx_to_r5() { FX_TO(5); } -static inline void fx_to_r6() +static INLINE void fx_to_r6() { FX_TO(6); } -static inline void fx_to_r7() +static INLINE void fx_to_r7() { FX_TO(7); } -static inline void fx_to_r8() +static INLINE void fx_to_r8() { FX_TO(8); } -static inline void fx_to_r9() +static INLINE void fx_to_r9() { FX_TO(9); } -static inline void fx_to_r10() +static INLINE void fx_to_r10() { FX_TO(10); } -static inline void fx_to_r11() +static INLINE void fx_to_r11() { FX_TO(11); } -static inline void fx_to_r12() +static INLINE void fx_to_r12() { FX_TO(12); } -static inline void fx_to_r13() +static INLINE void fx_to_r13() { FX_TO(13); } -static inline void fx_to_r14() +static INLINE void fx_to_r14() { FX_TO_R14(14); } -static inline void fx_to_r15() +static INLINE void fx_to_r15() { FX_TO_R15(15); } /* 20-2f - to rn - set register n as source and destination register */ #define FX_WITH(reg) SF(B); GSU.pvSreg = GSU.pvDreg = &GSU.avReg[reg]; R15++; -static inline void fx_with_r0() +static INLINE void fx_with_r0() { FX_WITH(0); } -static inline void fx_with_r1() +static INLINE void fx_with_r1() { FX_WITH(1); } -static inline void fx_with_r2() +static INLINE void fx_with_r2() { FX_WITH(2); } -static inline void fx_with_r3() +static INLINE void fx_with_r3() { FX_WITH(3); } -static inline void fx_with_r4() +static INLINE void fx_with_r4() { FX_WITH(4); } -static inline void fx_with_r5() +static INLINE void fx_with_r5() { FX_WITH(5); } -static inline void fx_with_r6() +static INLINE void fx_with_r6() { FX_WITH(6); } -static inline void fx_with_r7() +static INLINE void fx_with_r7() { FX_WITH(7); } -static inline void fx_with_r8() +static INLINE void fx_with_r8() { FX_WITH(8); } -static inline void fx_with_r9() +static INLINE void fx_with_r9() { FX_WITH(9); } -static inline void fx_with_r10() +static INLINE void fx_with_r10() { FX_WITH(10); } -static inline void fx_with_r11() +static INLINE void fx_with_r11() { FX_WITH(11); } -static inline void fx_with_r12() +static INLINE void fx_with_r12() { FX_WITH(12); } -static inline void fx_with_r13() +static INLINE void fx_with_r13() { FX_WITH(13); } -static inline void fx_with_r14() +static INLINE void fx_with_r14() { FX_WITH(14); } -static inline void fx_with_r15() +static INLINE void fx_with_r15() { FX_WITH(15); } @@ -423,51 +423,51 @@ GSU.vLastRamAdr = GSU.avReg[reg]; \ RAM(GSU.avReg[reg]) = (uint8)SREG; \ RAM(GSU.avReg[reg]^1) = (uint8)(SREG>>8); \ CLRFLAGS; R15++ -static inline void fx_stw_r0() +static INLINE void fx_stw_r0() { FX_STW(0); } -static inline void fx_stw_r1() +static INLINE void fx_stw_r1() { FX_STW(1); } -static inline void fx_stw_r2() +static INLINE void fx_stw_r2() { FX_STW(2); } -static inline void fx_stw_r3() +static INLINE void fx_stw_r3() { FX_STW(3); } -static inline void fx_stw_r4() +static INLINE void fx_stw_r4() { FX_STW(4); } -static inline void fx_stw_r5() +static INLINE void fx_stw_r5() { FX_STW(5); } -static inline void fx_stw_r6() +static INLINE void fx_stw_r6() { FX_STW(6); } -static inline void fx_stw_r7() +static INLINE void fx_stw_r7() { FX_STW(7); } -static inline void fx_stw_r8() +static INLINE void fx_stw_r8() { FX_STW(8); } -static inline void fx_stw_r9() +static INLINE void fx_stw_r9() { FX_STW(9); } -static inline void fx_stw_r10() +static INLINE void fx_stw_r10() { FX_STW(10); } -static inline void fx_stw_r11() +static INLINE void fx_stw_r11() { FX_STW(11); } @@ -477,57 +477,57 @@ static inline void fx_stw_r11() GSU.vLastRamAdr = GSU.avReg[reg]; \ RAM(GSU.avReg[reg]) = (uint8)SREG; \ CLRFLAGS; R15++ -static inline void fx_stb_r0() +static INLINE void fx_stb_r0() { FX_STB(0); } -static inline void fx_stb_r1() +static INLINE void fx_stb_r1() { FX_STB(1); } -static inline void fx_stb_r2() +static INLINE void fx_stb_r2() { FX_STB(2); } -static inline void fx_stb_r3() +static INLINE void fx_stb_r3() { FX_STB(3); } -static inline void fx_stb_r4() +static INLINE void fx_stb_r4() { FX_STB(4); } -static inline void fx_stb_r5() +static INLINE void fx_stb_r5() { FX_STB(5); } -static inline void fx_stb_r6() +static INLINE void fx_stb_r6() { FX_STB(6); } -static inline void fx_stb_r7() +static INLINE void fx_stb_r7() { FX_STB(7); } -static inline void fx_stb_r8() +static INLINE void fx_stb_r8() { FX_STB(8); } -static inline void fx_stb_r9() +static INLINE void fx_stb_r9() { FX_STB(9); } -static inline void fx_stb_r10() +static INLINE void fx_stb_r10() { FX_STB(10); } -static inline void fx_stb_r11() +static INLINE void fx_stb_r11() { FX_STB(11); } /* 3c - loop - decrement loop counter, and branch on not zero */ -static inline void fx_loop() +static INLINE void fx_loop() { GSU.vSign = GSU.vZero = --R12; if ((uint16) R12 != 0) @@ -539,7 +539,7 @@ static inline void fx_loop() } /* 3d - alt1 - set alt1 mode */ -static inline void fx_alt1() +static INLINE void fx_alt1() { SF(ALT1); CF(B); @@ -547,7 +547,7 @@ static inline void fx_alt1() } /* 3e - alt2 - set alt2 mode */ -static inline void fx_alt2() +static INLINE void fx_alt2() { SF(ALT2); CF(B); @@ -555,7 +555,7 @@ static inline void fx_alt2() } /* 3f - alt3 - set alt3 mode */ -static inline void fx_alt3() +static INLINE void fx_alt3() { SF(ALT1); SF(ALT2); @@ -571,51 +571,51 @@ v |= ((uint32)RAM(GSU.avReg[reg]^1))<<8; \ R15++; DREG = v; \ TESTR14; \ CLRFLAGS -static inline void fx_ldw_r0() +static INLINE void fx_ldw_r0() { FX_LDW(0); } -static inline void fx_ldw_r1() +static INLINE void fx_ldw_r1() { FX_LDW(1); } -static inline void fx_ldw_r2() +static INLINE void fx_ldw_r2() { FX_LDW(2); } -static inline void fx_ldw_r3() +static INLINE void fx_ldw_r3() { FX_LDW(3); } -static inline void fx_ldw_r4() +static INLINE void fx_ldw_r4() { FX_LDW(4); } -static inline void fx_ldw_r5() +static INLINE void fx_ldw_r5() { FX_LDW(5); } -static inline void fx_ldw_r6() +static INLINE void fx_ldw_r6() { FX_LDW(6); } -static inline void fx_ldw_r7() +static INLINE void fx_ldw_r7() { FX_LDW(7); } -static inline void fx_ldw_r8() +static INLINE void fx_ldw_r8() { FX_LDW(8); } -static inline void fx_ldw_r9() +static INLINE void fx_ldw_r9() { FX_LDW(9); } -static inline void fx_ldw_r10() +static INLINE void fx_ldw_r10() { FX_LDW(10); } -static inline void fx_ldw_r11() +static INLINE void fx_ldw_r11() { FX_LDW(11); } @@ -627,57 +627,57 @@ v = (uint32)RAM(GSU.avReg[reg]); \ R15++; DREG = v; \ TESTR14; \ CLRFLAGS -static inline void fx_ldb_r0() +static INLINE void fx_ldb_r0() { FX_LDB(0); } -static inline void fx_ldb_r1() +static INLINE void fx_ldb_r1() { FX_LDB(1); } -static inline void fx_ldb_r2() +static INLINE void fx_ldb_r2() { FX_LDB(2); } -static inline void fx_ldb_r3() +static INLINE void fx_ldb_r3() { FX_LDB(3); } -static inline void fx_ldb_r4() +static INLINE void fx_ldb_r4() { FX_LDB(4); } -static inline void fx_ldb_r5() +static INLINE void fx_ldb_r5() { FX_LDB(5); } -static inline void fx_ldb_r6() +static INLINE void fx_ldb_r6() { FX_LDB(6); } -static inline void fx_ldb_r7() +static INLINE void fx_ldb_r7() { FX_LDB(7); } -static inline void fx_ldb_r8() +static INLINE void fx_ldb_r8() { FX_LDB(8); } -static inline void fx_ldb_r9() +static INLINE void fx_ldb_r9() { FX_LDB(9); } -static inline void fx_ldb_r10() +static INLINE void fx_ldb_r10() { FX_LDB(10); } -static inline void fx_ldb_r11() +static INLINE void fx_ldb_r11() { FX_LDB(11); } /* 4c - plot - plot pixel with R1,R2 as x,y and the color register as the color */ -static inline void fx_plot_2bit() +static INLINE void fx_plot_2bit() { uint32 x = USEX8(R1); uint32 y = USEX8(R2); @@ -707,7 +707,7 @@ static inline void fx_plot_2bit() } /* 2c(ALT1) - rpix - read color of the pixel with R1,R2 as x,y */ -static inline void fx_rpix_2bit() +static INLINE void fx_rpix_2bit() { uint32 x = USEX8(R1); uint32 y = USEX8(R2); @@ -730,7 +730,7 @@ static inline void fx_rpix_2bit() } /* 4c - plot - plot pixel with R1,R2 as x,y and the color register as the color */ -static inline void fx_plot_4bit() +static INLINE void fx_plot_4bit() { uint32 x = USEX8(R1); uint32 y = USEX8(R2); @@ -765,7 +765,7 @@ static inline void fx_plot_4bit() } /* 4c(ALT1) - rpix - read color of the pixel with R1,R2 as x,y */ -static inline void fx_rpix_4bit() +static INLINE void fx_rpix_4bit() { uint32 x = USEX8(R1); uint32 y = USEX8(R2); @@ -791,7 +791,7 @@ static inline void fx_rpix_4bit() } /* 8c - plot - plot pixel with R1,R2 as x,y and the color register as the color */ -static inline void fx_plot_8bit() +static INLINE void fx_plot_8bit() { uint32 x = USEX8(R1); uint32 y = USEX8(R2); @@ -834,7 +834,7 @@ static inline void fx_plot_8bit() } /* 4c(ALT1) - rpix - read color of the pixel with R1,R2 as x,y */ -static inline void fx_rpix_8bit() +static INLINE void fx_rpix_8bit() { uint32 x = USEX8(R1); uint32 y = USEX8(R2); @@ -864,19 +864,19 @@ static inline void fx_rpix_8bit() } /* 4o - plot - plot pixel with R1,R2 as x,y and the color register as the color */ -static inline void fx_plot_obj() +static INLINE void fx_plot_obj() { printf("ERROR fx_plot_obj called\n"); } /* 4c(ALT1) - rpix - read color of the pixel with R1,R2 as x,y */ -static inline void fx_rpix_obj() +static INLINE void fx_rpix_obj() { printf("ERROR fx_rpix_obj called\n"); } /* 4d - swap - swap upper and lower byte of a register */ -static inline void fx_swap() +static INLINE void fx_swap() { uint8 c = (uint8)SREG; uint8 d = (uint8)(SREG >> 8); @@ -890,7 +890,7 @@ static inline void fx_swap() } /* 4e - color - copy source register to color register */ -static inline void fx_color() +static INLINE void fx_color() { uint8 c = (uint8)SREG; if (GSU.vPlotOptionReg & 0x04) @@ -907,7 +907,7 @@ static inline void fx_color() } /* 4e(ALT1) - cmode - set plot option register */ -static inline void fx_cmode() +static INLINE void fx_cmode() { GSU.vPlotOptionReg = SREG; @@ -925,7 +925,7 @@ static inline void fx_cmode() } /* 4f - not - perform exclusive exor with 1 on all bits */ -static inline void fx_not() +static INLINE void fx_not() { uint32 v = ~SREG; R15++; @@ -946,67 +946,67 @@ GSU.vZero = s; \ R15++; DREG = s; \ TESTR14; \ CLRFLAGS -static inline void fx_add_r0() +static INLINE void fx_add_r0() { FX_ADD(0); } -static inline void fx_add_r1() +static INLINE void fx_add_r1() { FX_ADD(1); } -static inline void fx_add_r2() +static INLINE void fx_add_r2() { FX_ADD(2); } -static inline void fx_add_r3() +static INLINE void fx_add_r3() { FX_ADD(3); } -static inline void fx_add_r4() +static INLINE void fx_add_r4() { FX_ADD(4); } -static inline void fx_add_r5() +static INLINE void fx_add_r5() { FX_ADD(5); } -static inline void fx_add_r6() +static INLINE void fx_add_r6() { FX_ADD(6); } -static inline void fx_add_r7() +static INLINE void fx_add_r7() { FX_ADD(7); } -static inline void fx_add_r8() +static INLINE void fx_add_r8() { FX_ADD(8); } -static inline void fx_add_r9() +static INLINE void fx_add_r9() { FX_ADD(9); } -static inline void fx_add_r10() +static INLINE void fx_add_r10() { FX_ADD(10); } -static inline void fx_add_r11() +static INLINE void fx_add_r11() { FX_ADD(11); } -static inline void fx_add_r12() +static INLINE void fx_add_r12() { FX_ADD(12); } -static inline void fx_add_r13() +static INLINE void fx_add_r13() { FX_ADD(13); } -static inline void fx_add_r14() +static INLINE void fx_add_r14() { FX_ADD(14); } -static inline void fx_add_r15() +static INLINE void fx_add_r15() { FX_ADD(15); } @@ -1021,67 +1021,67 @@ GSU.vZero = s; \ R15++; DREG = s; \ TESTR14; \ CLRFLAGS -static inline void fx_adc_r0() +static INLINE void fx_adc_r0() { FX_ADC(0); } -static inline void fx_adc_r1() +static INLINE void fx_adc_r1() { FX_ADC(1); } -static inline void fx_adc_r2() +static INLINE void fx_adc_r2() { FX_ADC(2); } -static inline void fx_adc_r3() +static INLINE void fx_adc_r3() { FX_ADC(3); } -static inline void fx_adc_r4() +static INLINE void fx_adc_r4() { FX_ADC(4); } -static inline void fx_adc_r5() +static INLINE void fx_adc_r5() { FX_ADC(5); } -static inline void fx_adc_r6() +static INLINE void fx_adc_r6() { FX_ADC(6); } -static inline void fx_adc_r7() +static INLINE void fx_adc_r7() { FX_ADC(7); } -static inline void fx_adc_r8() +static INLINE void fx_adc_r8() { FX_ADC(8); } -static inline void fx_adc_r9() +static INLINE void fx_adc_r9() { FX_ADC(9); } -static inline void fx_adc_r10() +static INLINE void fx_adc_r10() { FX_ADC(10); } -static inline void fx_adc_r11() +static INLINE void fx_adc_r11() { FX_ADC(11); } -static inline void fx_adc_r12() +static INLINE void fx_adc_r12() { FX_ADC(12); } -static inline void fx_adc_r13() +static INLINE void fx_adc_r13() { FX_ADC(13); } -static inline void fx_adc_r14() +static INLINE void fx_adc_r14() { FX_ADC(14); } -static inline void fx_adc_r15() +static INLINE void fx_adc_r15() { FX_ADC(15); } @@ -1096,67 +1096,67 @@ GSU.vZero = s; \ R15++; DREG = s; \ TESTR14; \ CLRFLAGS -static inline void fx_add_i0() +static INLINE void fx_add_i0() { FX_ADD_I(0); } -static inline void fx_add_i1() +static INLINE void fx_add_i1() { FX_ADD_I(1); } -static inline void fx_add_i2() +static INLINE void fx_add_i2() { FX_ADD_I(2); } -static inline void fx_add_i3() +static INLINE void fx_add_i3() { FX_ADD_I(3); } -static inline void fx_add_i4() +static INLINE void fx_add_i4() { FX_ADD_I(4); } -static inline void fx_add_i5() +static INLINE void fx_add_i5() { FX_ADD_I(5); } -static inline void fx_add_i6() +static INLINE void fx_add_i6() { FX_ADD_I(6); } -static inline void fx_add_i7() +static INLINE void fx_add_i7() { FX_ADD_I(7); } -static inline void fx_add_i8() +static INLINE void fx_add_i8() { FX_ADD_I(8); } -static inline void fx_add_i9() +static INLINE void fx_add_i9() { FX_ADD_I(9); } -static inline void fx_add_i10() +static INLINE void fx_add_i10() { FX_ADD_I(10); } -static inline void fx_add_i11() +static INLINE void fx_add_i11() { FX_ADD_I(11); } -static inline void fx_add_i12() +static INLINE void fx_add_i12() { FX_ADD_I(12); } -static inline void fx_add_i13() +static INLINE void fx_add_i13() { FX_ADD_I(13); } -static inline void fx_add_i14() +static INLINE void fx_add_i14() { FX_ADD_I(14); } -static inline void fx_add_i15() +static INLINE void fx_add_i15() { FX_ADD_I(15); } @@ -1171,67 +1171,67 @@ GSU.vZero = s; \ R15++; DREG = s; \ TESTR14; \ CLRFLAGS -static inline void fx_adc_i0() +static INLINE void fx_adc_i0() { FX_ADC_I(0); } -static inline void fx_adc_i1() +static INLINE void fx_adc_i1() { FX_ADC_I(1); } -static inline void fx_adc_i2() +static INLINE void fx_adc_i2() { FX_ADC_I(2); } -static inline void fx_adc_i3() +static INLINE void fx_adc_i3() { FX_ADC_I(3); } -static inline void fx_adc_i4() +static INLINE void fx_adc_i4() { FX_ADC_I(4); } -static inline void fx_adc_i5() +static INLINE void fx_adc_i5() { FX_ADC_I(5); } -static inline void fx_adc_i6() +static INLINE void fx_adc_i6() { FX_ADC_I(6); } -static inline void fx_adc_i7() +static INLINE void fx_adc_i7() { FX_ADC_I(7); } -static inline void fx_adc_i8() +static INLINE void fx_adc_i8() { FX_ADC_I(8); } -static inline void fx_adc_i9() +static INLINE void fx_adc_i9() { FX_ADC_I(9); } -static inline void fx_adc_i10() +static INLINE void fx_adc_i10() { FX_ADC_I(10); } -static inline void fx_adc_i11() +static INLINE void fx_adc_i11() { FX_ADC_I(11); } -static inline void fx_adc_i12() +static INLINE void fx_adc_i12() { FX_ADC_I(12); } -static inline void fx_adc_i13() +static INLINE void fx_adc_i13() { FX_ADC_I(13); } -static inline void fx_adc_i14() +static INLINE void fx_adc_i14() { FX_ADC_I(14); } -static inline void fx_adc_i15() +static INLINE void fx_adc_i15() { FX_ADC_I(15); } @@ -1246,67 +1246,67 @@ GSU.vZero = s; \ R15++; DREG = s; \ TESTR14; \ CLRFLAGS -static inline void fx_sub_r0() +static INLINE void fx_sub_r0() { FX_SUB(0); } -static inline void fx_sub_r1() +static INLINE void fx_sub_r1() { FX_SUB(1); } -static inline void fx_sub_r2() +static INLINE void fx_sub_r2() { FX_SUB(2); } -static inline void fx_sub_r3() +static INLINE void fx_sub_r3() { FX_SUB(3); } -static inline void fx_sub_r4() +static INLINE void fx_sub_r4() { FX_SUB(4); } -static inline void fx_sub_r5() +static INLINE void fx_sub_r5() { FX_SUB(5); } -static inline void fx_sub_r6() +static INLINE void fx_sub_r6() { FX_SUB(6); } -static inline void fx_sub_r7() +static INLINE void fx_sub_r7() { FX_SUB(7); } -static inline void fx_sub_r8() +static INLINE void fx_sub_r8() { FX_SUB(8); } -static inline void fx_sub_r9() +static INLINE void fx_sub_r9() { FX_SUB(9); } -static inline void fx_sub_r10() +static INLINE void fx_sub_r10() { FX_SUB(10); } -static inline void fx_sub_r11() +static INLINE void fx_sub_r11() { FX_SUB(11); } -static inline void fx_sub_r12() +static INLINE void fx_sub_r12() { FX_SUB(12); } -static inline void fx_sub_r13() +static INLINE void fx_sub_r13() { FX_SUB(13); } -static inline void fx_sub_r14() +static INLINE void fx_sub_r14() { FX_SUB(14); } -static inline void fx_sub_r15() +static INLINE void fx_sub_r15() { FX_SUB(15); } @@ -1321,67 +1321,67 @@ GSU.vZero = s; \ R15++; DREG = s; \ TESTR14; \ CLRFLAGS -static inline void fx_sbc_r0() +static INLINE void fx_sbc_r0() { FX_SBC(0); } -static inline void fx_sbc_r1() +static INLINE void fx_sbc_r1() { FX_SBC(1); } -static inline void fx_sbc_r2() +static INLINE void fx_sbc_r2() { FX_SBC(2); } -static inline void fx_sbc_r3() +static INLINE void fx_sbc_r3() { FX_SBC(3); } -static inline void fx_sbc_r4() +static INLINE void fx_sbc_r4() { FX_SBC(4); } -static inline void fx_sbc_r5() +static INLINE void fx_sbc_r5() { FX_SBC(5); } -static inline void fx_sbc_r6() +static INLINE void fx_sbc_r6() { FX_SBC(6); } -static inline void fx_sbc_r7() +static INLINE void fx_sbc_r7() { FX_SBC(7); } -static inline void fx_sbc_r8() +static INLINE void fx_sbc_r8() { FX_SBC(8); } -static inline void fx_sbc_r9() +static INLINE void fx_sbc_r9() { FX_SBC(9); } -static inline void fx_sbc_r10() +static INLINE void fx_sbc_r10() { FX_SBC(10); } -static inline void fx_sbc_r11() +static INLINE void fx_sbc_r11() { FX_SBC(11); } -static inline void fx_sbc_r12() +static INLINE void fx_sbc_r12() { FX_SBC(12); } -static inline void fx_sbc_r13() +static INLINE void fx_sbc_r13() { FX_SBC(13); } -static inline void fx_sbc_r14() +static INLINE void fx_sbc_r14() { FX_SBC(14); } -static inline void fx_sbc_r15() +static INLINE void fx_sbc_r15() { FX_SBC(15); } @@ -1396,67 +1396,67 @@ GSU.vZero = s; \ R15++; DREG = s; \ TESTR14; \ CLRFLAGS -static inline void fx_sub_i0() +static INLINE void fx_sub_i0() { FX_SUB_I(0); } -static inline void fx_sub_i1() +static INLINE void fx_sub_i1() { FX_SUB_I(1); } -static inline void fx_sub_i2() +static INLINE void fx_sub_i2() { FX_SUB_I(2); } -static inline void fx_sub_i3() +static INLINE void fx_sub_i3() { FX_SUB_I(3); } -static inline void fx_sub_i4() +static INLINE void fx_sub_i4() { FX_SUB_I(4); } -static inline void fx_sub_i5() +static INLINE void fx_sub_i5() { FX_SUB_I(5); } -static inline void fx_sub_i6() +static INLINE void fx_sub_i6() { FX_SUB_I(6); } -static inline void fx_sub_i7() +static INLINE void fx_sub_i7() { FX_SUB_I(7); } -static inline void fx_sub_i8() +static INLINE void fx_sub_i8() { FX_SUB_I(8); } -static inline void fx_sub_i9() +static INLINE void fx_sub_i9() { FX_SUB_I(9); } -static inline void fx_sub_i10() +static INLINE void fx_sub_i10() { FX_SUB_I(10); } -static inline void fx_sub_i11() +static INLINE void fx_sub_i11() { FX_SUB_I(11); } -static inline void fx_sub_i12() +static INLINE void fx_sub_i12() { FX_SUB_I(12); } -static inline void fx_sub_i13() +static INLINE void fx_sub_i13() { FX_SUB_I(13); } -static inline void fx_sub_i14() +static INLINE void fx_sub_i14() { FX_SUB_I(14); } -static inline void fx_sub_i15() +static INLINE void fx_sub_i15() { FX_SUB_I(15); } @@ -1470,73 +1470,73 @@ GSU.vSign = s; \ GSU.vZero = s; \ R15++; \ CLRFLAGS; -static inline void fx_cmp_r0() +static INLINE void fx_cmp_r0() { FX_CMP(0); } -static inline void fx_cmp_r1() +static INLINE void fx_cmp_r1() { FX_CMP(1); } -static inline void fx_cmp_r2() +static INLINE void fx_cmp_r2() { FX_CMP(2); } -static inline void fx_cmp_r3() +static INLINE void fx_cmp_r3() { FX_CMP(3); } -static inline void fx_cmp_r4() +static INLINE void fx_cmp_r4() { FX_CMP(4); } -static inline void fx_cmp_r5() +static INLINE void fx_cmp_r5() { FX_CMP(5); } -static inline void fx_cmp_r6() +static INLINE void fx_cmp_r6() { FX_CMP(6); } -static inline void fx_cmp_r7() +static INLINE void fx_cmp_r7() { FX_CMP(7); } -static inline void fx_cmp_r8() +static INLINE void fx_cmp_r8() { FX_CMP(8); } -static inline void fx_cmp_r9() +static INLINE void fx_cmp_r9() { FX_CMP(9); } -static inline void fx_cmp_r10() +static INLINE void fx_cmp_r10() { FX_CMP(10); } -static inline void fx_cmp_r11() +static INLINE void fx_cmp_r11() { FX_CMP(11); } -static inline void fx_cmp_r12() +static INLINE void fx_cmp_r12() { FX_CMP(12); } -static inline void fx_cmp_r13() +static INLINE void fx_cmp_r13() { FX_CMP(13); } -static inline void fx_cmp_r14() +static INLINE void fx_cmp_r14() { FX_CMP(14); } -static inline void fx_cmp_r15() +static INLINE void fx_cmp_r15() { FX_CMP(15); } /* 70 - merge - R7 as upper byte, R8 as lower byte (used for texture-mapping) */ -static inline void fx_merge() +static INLINE void fx_merge() { uint32 v = (R7 & 0xff00) | ((R8 & 0xff00) >> 8); R15++; @@ -1557,63 +1557,63 @@ GSU.vSign = v; \ GSU.vZero = v; \ TESTR14; \ CLRFLAGS; -static inline void fx_and_r1() +static INLINE void fx_and_r1() { FX_AND(1); } -static inline void fx_and_r2() +static INLINE void fx_and_r2() { FX_AND(2); } -static inline void fx_and_r3() +static INLINE void fx_and_r3() { FX_AND(3); } -static inline void fx_and_r4() +static INLINE void fx_and_r4() { FX_AND(4); } -static inline void fx_and_r5() +static INLINE void fx_and_r5() { FX_AND(5); } -static inline void fx_and_r6() +static INLINE void fx_and_r6() { FX_AND(6); } -static inline void fx_and_r7() +static INLINE void fx_and_r7() { FX_AND(7); } -static inline void fx_and_r8() +static INLINE void fx_and_r8() { FX_AND(8); } -static inline void fx_and_r9() +static INLINE void fx_and_r9() { FX_AND(9); } -static inline void fx_and_r10() +static INLINE void fx_and_r10() { FX_AND(10); } -static inline void fx_and_r11() +static INLINE void fx_and_r11() { FX_AND(11); } -static inline void fx_and_r12() +static INLINE void fx_and_r12() { FX_AND(12); } -static inline void fx_and_r13() +static INLINE void fx_and_r13() { FX_AND(13); } -static inline void fx_and_r14() +static INLINE void fx_and_r14() { FX_AND(14); } -static inline void fx_and_r15() +static INLINE void fx_and_r15() { FX_AND(15); } @@ -1626,63 +1626,63 @@ GSU.vSign = v; \ GSU.vZero = v; \ TESTR14; \ CLRFLAGS; -static inline void fx_bic_r1() +static INLINE void fx_bic_r1() { FX_BIC(1); } -static inline void fx_bic_r2() +static INLINE void fx_bic_r2() { FX_BIC(2); } -static inline void fx_bic_r3() +static INLINE void fx_bic_r3() { FX_BIC(3); } -static inline void fx_bic_r4() +static INLINE void fx_bic_r4() { FX_BIC(4); } -static inline void fx_bic_r5() +static INLINE void fx_bic_r5() { FX_BIC(5); } -static inline void fx_bic_r6() +static INLINE void fx_bic_r6() { FX_BIC(6); } -static inline void fx_bic_r7() +static INLINE void fx_bic_r7() { FX_BIC(7); } -static inline void fx_bic_r8() +static INLINE void fx_bic_r8() { FX_BIC(8); } -static inline void fx_bic_r9() +static INLINE void fx_bic_r9() { FX_BIC(9); } -static inline void fx_bic_r10() +static INLINE void fx_bic_r10() { FX_BIC(10); } -static inline void fx_bic_r11() +static INLINE void fx_bic_r11() { FX_BIC(11); } -static inline void fx_bic_r12() +static INLINE void fx_bic_r12() { FX_BIC(12); } -static inline void fx_bic_r13() +static INLINE void fx_bic_r13() { FX_BIC(13); } -static inline void fx_bic_r14() +static INLINE void fx_bic_r14() { FX_BIC(14); } -static inline void fx_bic_r15() +static INLINE void fx_bic_r15() { FX_BIC(15); } @@ -1695,63 +1695,63 @@ GSU.vSign = v; \ GSU.vZero = v; \ TESTR14; \ CLRFLAGS; -static inline void fx_and_i1() +static INLINE void fx_and_i1() { FX_AND_I(1); } -static inline void fx_and_i2() +static INLINE void fx_and_i2() { FX_AND_I(2); } -static inline void fx_and_i3() +static INLINE void fx_and_i3() { FX_AND_I(3); } -static inline void fx_and_i4() +static INLINE void fx_and_i4() { FX_AND_I(4); } -static inline void fx_and_i5() +static INLINE void fx_and_i5() { FX_AND_I(5); } -static inline void fx_and_i6() +static INLINE void fx_and_i6() { FX_AND_I(6); } -static inline void fx_and_i7() +static INLINE void fx_and_i7() { FX_AND_I(7); } -static inline void fx_and_i8() +static INLINE void fx_and_i8() { FX_AND_I(8); } -static inline void fx_and_i9() +static INLINE void fx_and_i9() { FX_AND_I(9); } -static inline void fx_and_i10() +static INLINE void fx_and_i10() { FX_AND_I(10); } -static inline void fx_and_i11() +static INLINE void fx_and_i11() { FX_AND_I(11); } -static inline void fx_and_i12() +static INLINE void fx_and_i12() { FX_AND_I(12); } -static inline void fx_and_i13() +static INLINE void fx_and_i13() { FX_AND_I(13); } -static inline void fx_and_i14() +static INLINE void fx_and_i14() { FX_AND_I(14); } -static inline void fx_and_i15() +static INLINE void fx_and_i15() { FX_AND_I(15); } @@ -1764,63 +1764,63 @@ GSU.vSign = v; \ GSU.vZero = v; \ TESTR14; \ CLRFLAGS; -static inline void fx_bic_i1() +static INLINE void fx_bic_i1() { FX_BIC_I(1); } -static inline void fx_bic_i2() +static INLINE void fx_bic_i2() { FX_BIC_I(2); } -static inline void fx_bic_i3() +static INLINE void fx_bic_i3() { FX_BIC_I(3); } -static inline void fx_bic_i4() +static INLINE void fx_bic_i4() { FX_BIC_I(4); } -static inline void fx_bic_i5() +static INLINE void fx_bic_i5() { FX_BIC_I(5); } -static inline void fx_bic_i6() +static INLINE void fx_bic_i6() { FX_BIC_I(6); } -static inline void fx_bic_i7() +static INLINE void fx_bic_i7() { FX_BIC_I(7); } -static inline void fx_bic_i8() +static INLINE void fx_bic_i8() { FX_BIC_I(8); } -static inline void fx_bic_i9() +static INLINE void fx_bic_i9() { FX_BIC_I(9); } -static inline void fx_bic_i10() +static INLINE void fx_bic_i10() { FX_BIC_I(10); } -static inline void fx_bic_i11() +static INLINE void fx_bic_i11() { FX_BIC_I(11); } -static inline void fx_bic_i12() +static INLINE void fx_bic_i12() { FX_BIC_I(12); } -static inline void fx_bic_i13() +static INLINE void fx_bic_i13() { FX_BIC_I(13); } -static inline void fx_bic_i14() +static INLINE void fx_bic_i14() { FX_BIC_I(14); } -static inline void fx_bic_i15() +static INLINE void fx_bic_i15() { FX_BIC_I(15); } @@ -1833,67 +1833,67 @@ GSU.vSign = v; \ GSU.vZero = v; \ TESTR14; \ CLRFLAGS; -static inline void fx_mult_r0() +static INLINE void fx_mult_r0() { FX_MULT(0); } -static inline void fx_mult_r1() +static INLINE void fx_mult_r1() { FX_MULT(1); } -static inline void fx_mult_r2() +static INLINE void fx_mult_r2() { FX_MULT(2); } -static inline void fx_mult_r3() +static INLINE void fx_mult_r3() { FX_MULT(3); } -static inline void fx_mult_r4() +static INLINE void fx_mult_r4() { FX_MULT(4); } -static inline void fx_mult_r5() +static INLINE void fx_mult_r5() { FX_MULT(5); } -static inline void fx_mult_r6() +static INLINE void fx_mult_r6() { FX_MULT(6); } -static inline void fx_mult_r7() +static INLINE void fx_mult_r7() { FX_MULT(7); } -static inline void fx_mult_r8() +static INLINE void fx_mult_r8() { FX_MULT(8); } -static inline void fx_mult_r9() +static INLINE void fx_mult_r9() { FX_MULT(9); } -static inline void fx_mult_r10() +static INLINE void fx_mult_r10() { FX_MULT(10); } -static inline void fx_mult_r11() +static INLINE void fx_mult_r11() { FX_MULT(11); } -static inline void fx_mult_r12() +static INLINE void fx_mult_r12() { FX_MULT(12); } -static inline void fx_mult_r13() +static INLINE void fx_mult_r13() { FX_MULT(13); } -static inline void fx_mult_r14() +static INLINE void fx_mult_r14() { FX_MULT(14); } -static inline void fx_mult_r15() +static INLINE void fx_mult_r15() { FX_MULT(15); } @@ -1906,67 +1906,67 @@ GSU.vSign = v; \ GSU.vZero = v; \ TESTR14; \ CLRFLAGS; -static inline void fx_umult_r0() +static INLINE void fx_umult_r0() { FX_UMULT(0); } -static inline void fx_umult_r1() +static INLINE void fx_umult_r1() { FX_UMULT(1); } -static inline void fx_umult_r2() +static INLINE void fx_umult_r2() { FX_UMULT(2); } -static inline void fx_umult_r3() +static INLINE void fx_umult_r3() { FX_UMULT(3); } -static inline void fx_umult_r4() +static INLINE void fx_umult_r4() { FX_UMULT(4); } -static inline void fx_umult_r5() +static INLINE void fx_umult_r5() { FX_UMULT(5); } -static inline void fx_umult_r6() +static INLINE void fx_umult_r6() { FX_UMULT(6); } -static inline void fx_umult_r7() +static INLINE void fx_umult_r7() { FX_UMULT(7); } -static inline void fx_umult_r8() +static INLINE void fx_umult_r8() { FX_UMULT(8); } -static inline void fx_umult_r9() +static INLINE void fx_umult_r9() { FX_UMULT(9); } -static inline void fx_umult_r10() +static INLINE void fx_umult_r10() { FX_UMULT(10); } -static inline void fx_umult_r11() +static INLINE void fx_umult_r11() { FX_UMULT(11); } -static inline void fx_umult_r12() +static INLINE void fx_umult_r12() { FX_UMULT(12); } -static inline void fx_umult_r13() +static INLINE void fx_umult_r13() { FX_UMULT(13); } -static inline void fx_umult_r14() +static INLINE void fx_umult_r14() { FX_UMULT(14); } -static inline void fx_umult_r15() +static INLINE void fx_umult_r15() { FX_UMULT(15); } @@ -1979,67 +1979,67 @@ GSU.vSign = v; \ GSU.vZero = v; \ TESTR14; \ CLRFLAGS; -static inline void fx_mult_i0() +static INLINE void fx_mult_i0() { FX_MULT_I(0); } -static inline void fx_mult_i1() +static INLINE void fx_mult_i1() { FX_MULT_I(1); } -static inline void fx_mult_i2() +static INLINE void fx_mult_i2() { FX_MULT_I(2); } -static inline void fx_mult_i3() +static INLINE void fx_mult_i3() { FX_MULT_I(3); } -static inline void fx_mult_i4() +static INLINE void fx_mult_i4() { FX_MULT_I(4); } -static inline void fx_mult_i5() +static INLINE void fx_mult_i5() { FX_MULT_I(5); } -static inline void fx_mult_i6() +static INLINE void fx_mult_i6() { FX_MULT_I(6); } -static inline void fx_mult_i7() +static INLINE void fx_mult_i7() { FX_MULT_I(7); } -static inline void fx_mult_i8() +static INLINE void fx_mult_i8() { FX_MULT_I(8); } -static inline void fx_mult_i9() +static INLINE void fx_mult_i9() { FX_MULT_I(9); } -static inline void fx_mult_i10() +static INLINE void fx_mult_i10() { FX_MULT_I(10); } -static inline void fx_mult_i11() +static INLINE void fx_mult_i11() { FX_MULT_I(11); } -static inline void fx_mult_i12() +static INLINE void fx_mult_i12() { FX_MULT_I(12); } -static inline void fx_mult_i13() +static INLINE void fx_mult_i13() { FX_MULT_I(13); } -static inline void fx_mult_i14() +static INLINE void fx_mult_i14() { FX_MULT_I(14); } -static inline void fx_mult_i15() +static INLINE void fx_mult_i15() { FX_MULT_I(15); } @@ -2052,73 +2052,73 @@ GSU.vSign = v; \ GSU.vZero = v; \ TESTR14; \ CLRFLAGS; -static inline void fx_umult_i0() +static INLINE void fx_umult_i0() { FX_UMULT_I(0); } -static inline void fx_umult_i1() +static INLINE void fx_umult_i1() { FX_UMULT_I(1); } -static inline void fx_umult_i2() +static INLINE void fx_umult_i2() { FX_UMULT_I(2); } -static inline void fx_umult_i3() +static INLINE void fx_umult_i3() { FX_UMULT_I(3); } -static inline void fx_umult_i4() +static INLINE void fx_umult_i4() { FX_UMULT_I(4); } -static inline void fx_umult_i5() +static INLINE void fx_umult_i5() { FX_UMULT_I(5); } -static inline void fx_umult_i6() +static INLINE void fx_umult_i6() { FX_UMULT_I(6); } -static inline void fx_umult_i7() +static INLINE void fx_umult_i7() { FX_UMULT_I(7); } -static inline void fx_umult_i8() +static INLINE void fx_umult_i8() { FX_UMULT_I(8); } -static inline void fx_umult_i9() +static INLINE void fx_umult_i9() { FX_UMULT_I(9); } -static inline void fx_umult_i10() +static INLINE void fx_umult_i10() { FX_UMULT_I(10); } -static inline void fx_umult_i11() +static INLINE void fx_umult_i11() { FX_UMULT_I(11); } -static inline void fx_umult_i12() +static INLINE void fx_umult_i12() { FX_UMULT_I(12); } -static inline void fx_umult_i13() +static INLINE void fx_umult_i13() { FX_UMULT_I(13); } -static inline void fx_umult_i14() +static INLINE void fx_umult_i14() { FX_UMULT_I(14); } -static inline void fx_umult_i15() +static INLINE void fx_umult_i15() { FX_UMULT_I(15); } /* 90 - sbk - store word to last accessed RAM address */ -static inline void fx_sbk() +static INLINE void fx_sbk() { RAM(GSU.vLastRamAdr) = (uint8)SREG; RAM(GSU.vLastRamAdr ^ 1) = (uint8)(SREG >> 8); @@ -2128,25 +2128,25 @@ static inline void fx_sbk() /* 91-94 - link #n - R11 = R15 + immediate */ #define FX_LINK_I(lkn) R11 = R15 + lkn; CLRFLAGS; R15++ -static inline void fx_link_i1() +static INLINE void fx_link_i1() { FX_LINK_I(1); } -static inline void fx_link_i2() +static INLINE void fx_link_i2() { FX_LINK_I(2); } -static inline void fx_link_i3() +static INLINE void fx_link_i3() { FX_LINK_I(3); } -static inline void fx_link_i4() +static INLINE void fx_link_i4() { FX_LINK_I(4); } /* 95 - sex - sign extend 8 bit to 16 bit */ -static inline void fx_sex() +static INLINE void fx_sex() { uint32 v = (uint32)SEX8(SREG); R15++; @@ -2158,7 +2158,7 @@ static inline void fx_sex() } /* 96 - asr - aritmetric shift right by one */ -static inline void fx_asr() +static INLINE void fx_asr() { uint32 v; GSU.vCarry = SREG & 1; @@ -2172,7 +2172,7 @@ static inline void fx_asr() } /* 96(ALT1) - div2 - aritmetric shift right by one */ -static inline void fx_div2() +static INLINE void fx_div2() { uint32 v; int32 s = SEX16(SREG); @@ -2190,7 +2190,7 @@ static inline void fx_div2() } /* 97 - ror - rotate right by one */ -static inline void fx_ror() +static INLINE void fx_ror() { uint32 v = (USEX16(SREG) >> 1) | (GSU.vCarry << 15); GSU.vCarry = SREG & 1; @@ -2206,27 +2206,27 @@ static inline void fx_ror() #define FX_JMP(reg) \ R15 = GSU.avReg[reg]; \ CLRFLAGS; -static inline void fx_jmp_r8() +static INLINE void fx_jmp_r8() { FX_JMP(8); } -static inline void fx_jmp_r9() +static INLINE void fx_jmp_r9() { FX_JMP(9); } -static inline void fx_jmp_r10() +static INLINE void fx_jmp_r10() { FX_JMP(10); } -static inline void fx_jmp_r11() +static INLINE void fx_jmp_r11() { FX_JMP(11); } -static inline void fx_jmp_r12() +static INLINE void fx_jmp_r12() { FX_JMP(12); } -static inline void fx_jmp_r13() +static INLINE void fx_jmp_r13() { FX_JMP(13); } @@ -2237,33 +2237,33 @@ GSU.vPrgBankReg = GSU.avReg[reg] & 0x7f; \ GSU.pvPrgBank = GSU.apvRomBank[GSU.vPrgBankReg]; \ R15 = SREG; \ GSU.bCacheActive = FALSE; fx_cache(); R15--; -static inline void fx_ljmp_r8() +static INLINE void fx_ljmp_r8() { FX_LJMP(8); } -static inline void fx_ljmp_r9() +static INLINE void fx_ljmp_r9() { FX_LJMP(9); } -static inline void fx_ljmp_r10() +static INLINE void fx_ljmp_r10() { FX_LJMP(10); } -static inline void fx_ljmp_r11() +static INLINE void fx_ljmp_r11() { FX_LJMP(11); } -static inline void fx_ljmp_r12() +static INLINE void fx_ljmp_r12() { FX_LJMP(12); } -static inline void fx_ljmp_r13() +static INLINE void fx_ljmp_r13() { FX_LJMP(13); } /* 9e - lob - set upper byte to zero (keep low byte) */ -static inline void fx_lob() +static INLINE void fx_lob() { uint32 v = USEX8(SREG); R15++; @@ -2275,7 +2275,7 @@ static inline void fx_lob() } /* 9f - fmult - 16 bit to 32 bit signed multiplication, upper 16 bits only */ -static inline void fx_fmult() +static INLINE void fx_fmult() { uint32 v; uint32 c = (uint32)(SEX16(SREG) * SEX16(R6)); @@ -2290,7 +2290,7 @@ static inline void fx_fmult() } /* 9f(ALT1) - lmult - 16 bit to 32 bit signed multiplication */ -static inline void fx_lmult() +static INLINE void fx_lmult() { uint32 v; uint32 c = (uint32)(SEX16(SREG) * SEX16(R6)); @@ -2312,68 +2312,68 @@ uint8 v = PIPE; R15++; \ FETCHPIPE; R15++; \ GSU.avReg[reg] = SEX8(v); \ CLRFLAGS; -static inline void fx_ibt_r0() +static INLINE void fx_ibt_r0() { FX_IBT(0); } -static inline void fx_ibt_r1() +static INLINE void fx_ibt_r1() { FX_IBT(1); } -static inline void fx_ibt_r2() +static INLINE void fx_ibt_r2() { FX_IBT(2); } -static inline void fx_ibt_r3() +static INLINE void fx_ibt_r3() { FX_IBT(3); } -static inline void fx_ibt_r4() +static INLINE void fx_ibt_r4() { FX_IBT(4); } -static inline void fx_ibt_r5() +static INLINE void fx_ibt_r5() { FX_IBT(5); } -static inline void fx_ibt_r6() +static INLINE void fx_ibt_r6() { FX_IBT(6); } -static inline void fx_ibt_r7() +static INLINE void fx_ibt_r7() { FX_IBT(7); } -static inline void fx_ibt_r8() +static INLINE void fx_ibt_r8() { FX_IBT(8); } -static inline void fx_ibt_r9() +static INLINE void fx_ibt_r9() { FX_IBT(9); } -static inline void fx_ibt_r10() +static INLINE void fx_ibt_r10() { FX_IBT(10); } -static inline void fx_ibt_r11() +static INLINE void fx_ibt_r11() { FX_IBT(11); } -static inline void fx_ibt_r12() +static INLINE void fx_ibt_r12() { FX_IBT(12); } -static inline void fx_ibt_r13() +static INLINE void fx_ibt_r13() { FX_IBT(13); } -static inline void fx_ibt_r14() +static INLINE void fx_ibt_r14() { FX_IBT(14); READR14; } -static inline void fx_ibt_r15() +static INLINE void fx_ibt_r15() { FX_IBT(15); } @@ -2385,68 +2385,68 @@ R15++; FETCHPIPE; R15++; \ GSU.avReg[reg] = (uint32)RAM(GSU.vLastRamAdr); \ GSU.avReg[reg] |= ((uint32)RAM(GSU.vLastRamAdr+1))<<8; \ CLRFLAGS; -static inline void fx_lms_r0() +static INLINE void fx_lms_r0() { FX_LMS(0); } -static inline void fx_lms_r1() +static INLINE void fx_lms_r1() { FX_LMS(1); } -static inline void fx_lms_r2() +static INLINE void fx_lms_r2() { FX_LMS(2); } -static inline void fx_lms_r3() +static INLINE void fx_lms_r3() { FX_LMS(3); } -static inline void fx_lms_r4() +static INLINE void fx_lms_r4() { FX_LMS(4); } -static inline void fx_lms_r5() +static INLINE void fx_lms_r5() { FX_LMS(5); } -static inline void fx_lms_r6() +static INLINE void fx_lms_r6() { FX_LMS(6); } -static inline void fx_lms_r7() +static INLINE void fx_lms_r7() { FX_LMS(7); } -static inline void fx_lms_r8() +static INLINE void fx_lms_r8() { FX_LMS(8); } -static inline void fx_lms_r9() +static INLINE void fx_lms_r9() { FX_LMS(9); } -static inline void fx_lms_r10() +static INLINE void fx_lms_r10() { FX_LMS(10); } -static inline void fx_lms_r11() +static INLINE void fx_lms_r11() { FX_LMS(11); } -static inline void fx_lms_r12() +static INLINE void fx_lms_r12() { FX_LMS(12); } -static inline void fx_lms_r13() +static INLINE void fx_lms_r13() { FX_LMS(13); } -static inline void fx_lms_r14() +static INLINE void fx_lms_r14() { FX_LMS(14); READR14; } -static inline void fx_lms_r15() +static INLINE void fx_lms_r15() { FX_LMS(15); } @@ -2460,67 +2460,67 @@ R15++; FETCHPIPE; \ RAM(GSU.vLastRamAdr) = (uint8)v; \ RAM(GSU.vLastRamAdr+1) = (uint8)(v>>8); \ CLRFLAGS; R15++; -static inline void fx_sms_r0() +static INLINE void fx_sms_r0() { FX_SMS(0); } -static inline void fx_sms_r1() +static INLINE void fx_sms_r1() { FX_SMS(1); } -static inline void fx_sms_r2() +static INLINE void fx_sms_r2() { FX_SMS(2); } -static inline void fx_sms_r3() +static INLINE void fx_sms_r3() { FX_SMS(3); } -static inline void fx_sms_r4() +static INLINE void fx_sms_r4() { FX_SMS(4); } -static inline void fx_sms_r5() +static INLINE void fx_sms_r5() { FX_SMS(5); } -static inline void fx_sms_r6() +static INLINE void fx_sms_r6() { FX_SMS(6); } -static inline void fx_sms_r7() +static INLINE void fx_sms_r7() { FX_SMS(7); } -static inline void fx_sms_r8() +static INLINE void fx_sms_r8() { FX_SMS(8); } -static inline void fx_sms_r9() +static INLINE void fx_sms_r9() { FX_SMS(9); } -static inline void fx_sms_r10() +static INLINE void fx_sms_r10() { FX_SMS(10); } -static inline void fx_sms_r11() +static INLINE void fx_sms_r11() { FX_SMS(11); } -static inline void fx_sms_r12() +static INLINE void fx_sms_r12() { FX_SMS(12); } -static inline void fx_sms_r13() +static INLINE void fx_sms_r13() { FX_SMS(13); } -static inline void fx_sms_r14() +static INLINE void fx_sms_r14() { FX_SMS(14); } -static inline void fx_sms_r15() +static INLINE void fx_sms_r15() { FX_SMS(15); } @@ -2531,73 +2531,73 @@ static inline void fx_sms_r15() if(TF(B)) { uint32 v = GSU.avReg[reg]; R15++; DREG = v; \ GSU.vOverflow = (v&0x80) << 16; GSU.vSign = v; GSU.vZero = v; TESTR14; CLRFLAGS; } \ else { GSU.pvSreg = &GSU.avReg[reg]; R15++; } -static inline void fx_from_r0() +static INLINE void fx_from_r0() { FX_FROM(0); } -static inline void fx_from_r1() +static INLINE void fx_from_r1() { FX_FROM(1); } -static inline void fx_from_r2() +static INLINE void fx_from_r2() { FX_FROM(2); } -static inline void fx_from_r3() +static INLINE void fx_from_r3() { FX_FROM(3); } -static inline void fx_from_r4() +static INLINE void fx_from_r4() { FX_FROM(4); } -static inline void fx_from_r5() +static INLINE void fx_from_r5() { FX_FROM(5); } -static inline void fx_from_r6() +static INLINE void fx_from_r6() { FX_FROM(6); } -static inline void fx_from_r7() +static INLINE void fx_from_r7() { FX_FROM(7); } -static inline void fx_from_r8() +static INLINE void fx_from_r8() { FX_FROM(8); } -static inline void fx_from_r9() +static INLINE void fx_from_r9() { FX_FROM(9); } -static inline void fx_from_r10() +static INLINE void fx_from_r10() { FX_FROM(10); } -static inline void fx_from_r11() +static INLINE void fx_from_r11() { FX_FROM(11); } -static inline void fx_from_r12() +static INLINE void fx_from_r12() { FX_FROM(12); } -static inline void fx_from_r13() +static INLINE void fx_from_r13() { FX_FROM(13); } -static inline void fx_from_r14() +static INLINE void fx_from_r14() { FX_FROM(14); } -static inline void fx_from_r15() +static INLINE void fx_from_r15() { FX_FROM(15); } /* c0 - hib - move high-byte to low-byte */ -static inline void fx_hib() +static INLINE void fx_hib() { uint32 v = USEX8(SREG >> 8); R15++; @@ -2615,63 +2615,63 @@ GSU.vSign = v; \ GSU.vZero = v; \ TESTR14; \ CLRFLAGS; -static inline void fx_or_r1() +static INLINE void fx_or_r1() { FX_OR(1); } -static inline void fx_or_r2() +static INLINE void fx_or_r2() { FX_OR(2); } -static inline void fx_or_r3() +static INLINE void fx_or_r3() { FX_OR(3); } -static inline void fx_or_r4() +static INLINE void fx_or_r4() { FX_OR(4); } -static inline void fx_or_r5() +static INLINE void fx_or_r5() { FX_OR(5); } -static inline void fx_or_r6() +static INLINE void fx_or_r6() { FX_OR(6); } -static inline void fx_or_r7() +static INLINE void fx_or_r7() { FX_OR(7); } -static inline void fx_or_r8() +static INLINE void fx_or_r8() { FX_OR(8); } -static inline void fx_or_r9() +static INLINE void fx_or_r9() { FX_OR(9); } -static inline void fx_or_r10() +static INLINE void fx_or_r10() { FX_OR(10); } -static inline void fx_or_r11() +static INLINE void fx_or_r11() { FX_OR(11); } -static inline void fx_or_r12() +static INLINE void fx_or_r12() { FX_OR(12); } -static inline void fx_or_r13() +static INLINE void fx_or_r13() { FX_OR(13); } -static inline void fx_or_r14() +static INLINE void fx_or_r14() { FX_OR(14); } -static inline void fx_or_r15() +static INLINE void fx_or_r15() { FX_OR(15); } @@ -2683,63 +2683,63 @@ GSU.vSign = v; \ GSU.vZero = v; \ TESTR14; \ CLRFLAGS; -static inline void fx_xor_r1() +static INLINE void fx_xor_r1() { FX_XOR(1); } -static inline void fx_xor_r2() +static INLINE void fx_xor_r2() { FX_XOR(2); } -static inline void fx_xor_r3() +static INLINE void fx_xor_r3() { FX_XOR(3); } -static inline void fx_xor_r4() +static INLINE void fx_xor_r4() { FX_XOR(4); } -static inline void fx_xor_r5() +static INLINE void fx_xor_r5() { FX_XOR(5); } -static inline void fx_xor_r6() +static INLINE void fx_xor_r6() { FX_XOR(6); } -static inline void fx_xor_r7() +static INLINE void fx_xor_r7() { FX_XOR(7); } -static inline void fx_xor_r8() +static INLINE void fx_xor_r8() { FX_XOR(8); } -static inline void fx_xor_r9() +static INLINE void fx_xor_r9() { FX_XOR(9); } -static inline void fx_xor_r10() +static INLINE void fx_xor_r10() { FX_XOR(10); } -static inline void fx_xor_r11() +static INLINE void fx_xor_r11() { FX_XOR(11); } -static inline void fx_xor_r12() +static INLINE void fx_xor_r12() { FX_XOR(12); } -static inline void fx_xor_r13() +static INLINE void fx_xor_r13() { FX_XOR(13); } -static inline void fx_xor_r14() +static INLINE void fx_xor_r14() { FX_XOR(14); } -static inline void fx_xor_r15() +static INLINE void fx_xor_r15() { FX_XOR(15); } @@ -2751,63 +2751,63 @@ GSU.vSign = v; \ GSU.vZero = v; \ TESTR14; \ CLRFLAGS; -static inline void fx_or_i1() +static INLINE void fx_or_i1() { FX_OR_I(1); } -static inline void fx_or_i2() +static INLINE void fx_or_i2() { FX_OR_I(2); } -static inline void fx_or_i3() +static INLINE void fx_or_i3() { FX_OR_I(3); } -static inline void fx_or_i4() +static INLINE void fx_or_i4() { FX_OR_I(4); } -static inline void fx_or_i5() +static INLINE void fx_or_i5() { FX_OR_I(5); } -static inline void fx_or_i6() +static INLINE void fx_or_i6() { FX_OR_I(6); } -static inline void fx_or_i7() +static INLINE void fx_or_i7() { FX_OR_I(7); } -static inline void fx_or_i8() +static INLINE void fx_or_i8() { FX_OR_I(8); } -static inline void fx_or_i9() +static INLINE void fx_or_i9() { FX_OR_I(9); } -static inline void fx_or_i10() +static INLINE void fx_or_i10() { FX_OR_I(10); } -static inline void fx_or_i11() +static INLINE void fx_or_i11() { FX_OR_I(11); } -static inline void fx_or_i12() +static INLINE void fx_or_i12() { FX_OR_I(12); } -static inline void fx_or_i13() +static INLINE void fx_or_i13() { FX_OR_I(13); } -static inline void fx_or_i14() +static INLINE void fx_or_i14() { FX_OR_I(14); } -static inline void fx_or_i15() +static INLINE void fx_or_i15() { FX_OR_I(15); } @@ -2819,63 +2819,63 @@ GSU.vSign = v; \ GSU.vZero = v; \ TESTR14; \ CLRFLAGS; -static inline void fx_xor_i1() +static INLINE void fx_xor_i1() { FX_XOR_I(1); } -static inline void fx_xor_i2() +static INLINE void fx_xor_i2() { FX_XOR_I(2); } -static inline void fx_xor_i3() +static INLINE void fx_xor_i3() { FX_XOR_I(3); } -static inline void fx_xor_i4() +static INLINE void fx_xor_i4() { FX_XOR_I(4); } -static inline void fx_xor_i5() +static INLINE void fx_xor_i5() { FX_XOR_I(5); } -static inline void fx_xor_i6() +static INLINE void fx_xor_i6() { FX_XOR_I(6); } -static inline void fx_xor_i7() +static INLINE void fx_xor_i7() { FX_XOR_I(7); } -static inline void fx_xor_i8() +static INLINE void fx_xor_i8() { FX_XOR_I(8); } -static inline void fx_xor_i9() +static INLINE void fx_xor_i9() { FX_XOR_I(9); } -static inline void fx_xor_i10() +static INLINE void fx_xor_i10() { FX_XOR_I(10); } -static inline void fx_xor_i11() +static INLINE void fx_xor_i11() { FX_XOR_I(11); } -static inline void fx_xor_i12() +static INLINE void fx_xor_i12() { FX_XOR_I(12); } -static inline void fx_xor_i13() +static INLINE void fx_xor_i13() { FX_XOR_I(13); } -static inline void fx_xor_i14() +static INLINE void fx_xor_i14() { FX_XOR_I(14); } -static inline void fx_xor_i15() +static INLINE void fx_xor_i15() { FX_XOR_I(15); } @@ -2886,70 +2886,70 @@ GSU.avReg[reg] += 1; \ GSU.vSign = GSU.avReg[reg]; \ GSU.vZero = GSU.avReg[reg]; \ CLRFLAGS; R15++; -static inline void fx_inc_r0() +static INLINE void fx_inc_r0() { FX_INC(0); } -static inline void fx_inc_r1() +static INLINE void fx_inc_r1() { FX_INC(1); } -static inline void fx_inc_r2() +static INLINE void fx_inc_r2() { FX_INC(2); } -static inline void fx_inc_r3() +static INLINE void fx_inc_r3() { FX_INC(3); } -static inline void fx_inc_r4() +static INLINE void fx_inc_r4() { FX_INC(4); } -static inline void fx_inc_r5() +static INLINE void fx_inc_r5() { FX_INC(5); } -static inline void fx_inc_r6() +static INLINE void fx_inc_r6() { FX_INC(6); } -static inline void fx_inc_r7() +static INLINE void fx_inc_r7() { FX_INC(7); } -static inline void fx_inc_r8() +static INLINE void fx_inc_r8() { FX_INC(8); } -static inline void fx_inc_r9() +static INLINE void fx_inc_r9() { FX_INC(9); } -static inline void fx_inc_r10() +static INLINE void fx_inc_r10() { FX_INC(10); } -static inline void fx_inc_r11() +static INLINE void fx_inc_r11() { FX_INC(11); } -static inline void fx_inc_r12() +static INLINE void fx_inc_r12() { FX_INC(12); } -static inline void fx_inc_r13() +static INLINE void fx_inc_r13() { FX_INC(13); } -static inline void fx_inc_r14() +static INLINE void fx_inc_r14() { FX_INC(14); READR14; } /* df - getc - transfer ROM buffer to color register */ -static inline void fx_getc() +static INLINE void fx_getc() { #ifndef FX_DO_ROMBUFFER uint8 c; @@ -2971,7 +2971,7 @@ static inline void fx_getc() } /* df(ALT2) - ramb - set current RAM bank */ -static inline void fx_ramb() +static INLINE void fx_ramb() { GSU.vRamBankReg = SREG & (FX_RAM_BANKS - 1); GSU.pvRamBank = GSU.apvRamBank[GSU.vRamBankReg & 0x3]; @@ -2980,7 +2980,7 @@ static inline void fx_ramb() } /* df(ALT3) - romb - set current ROM bank */ -static inline void fx_romb() +static INLINE void fx_romb() { GSU.vRomBankReg = USEX8(SREG) & 0x7f; GSU.pvRomBank = GSU.apvRomBank[GSU.vRomBankReg]; @@ -2994,70 +2994,70 @@ GSU.avReg[reg] -= 1; \ GSU.vSign = GSU.avReg[reg]; \ GSU.vZero = GSU.avReg[reg]; \ CLRFLAGS; R15++; -static inline void fx_dec_r0() +static INLINE void fx_dec_r0() { FX_DEC(0); } -static inline void fx_dec_r1() +static INLINE void fx_dec_r1() { FX_DEC(1); } -static inline void fx_dec_r2() +static INLINE void fx_dec_r2() { FX_DEC(2); } -static inline void fx_dec_r3() +static INLINE void fx_dec_r3() { FX_DEC(3); } -static inline void fx_dec_r4() +static INLINE void fx_dec_r4() { FX_DEC(4); } -static inline void fx_dec_r5() +static INLINE void fx_dec_r5() { FX_DEC(5); } -static inline void fx_dec_r6() +static INLINE void fx_dec_r6() { FX_DEC(6); } -static inline void fx_dec_r7() +static INLINE void fx_dec_r7() { FX_DEC(7); } -static inline void fx_dec_r8() +static INLINE void fx_dec_r8() { FX_DEC(8); } -static inline void fx_dec_r9() +static INLINE void fx_dec_r9() { FX_DEC(9); } -static inline void fx_dec_r10() +static INLINE void fx_dec_r10() { FX_DEC(10); } -static inline void fx_dec_r11() +static INLINE void fx_dec_r11() { FX_DEC(11); } -static inline void fx_dec_r12() +static INLINE void fx_dec_r12() { FX_DEC(12); } -static inline void fx_dec_r13() +static INLINE void fx_dec_r13() { FX_DEC(13); } -static inline void fx_dec_r14() +static INLINE void fx_dec_r14() { FX_DEC(14); READR14; } /* ef - getb - get byte from ROM at address R14 */ -static inline void fx_getb() +static INLINE void fx_getb() { uint32 v; #ifndef FX_DO_ROMBUFFER @@ -3072,7 +3072,7 @@ static inline void fx_getb() } /* ef(ALT1) - getbh - get high-byte from ROM at address R14 */ -static inline void fx_getbh() +static INLINE void fx_getbh() { uint32 v; #ifndef FX_DO_ROMBUFFER @@ -3089,7 +3089,7 @@ static inline void fx_getbh() } /* ef(ALT2) - getbl - get low-byte from ROM at address R14 */ -static inline void fx_getbl() +static INLINE void fx_getbl() { uint32 v; #ifndef FX_DO_ROMBUFFER @@ -3106,7 +3106,7 @@ static inline void fx_getbl() } /* ef(ALT3) - getbs - get sign extended byte from ROM at address R14 */ -static inline void fx_getbs() +static INLINE void fx_getbs() { uint32 v; #ifndef FX_DO_ROMBUFFER @@ -3128,68 +3128,68 @@ uint32 v = PIPE; R15++; FETCHPIPE; R15++; \ v |= USEX8(PIPE) << 8; FETCHPIPE; R15++; \ GSU.avReg[reg] = v; \ CLRFLAGS; -static inline void fx_iwt_r0() +static INLINE void fx_iwt_r0() { FX_IWT(0); } -static inline void fx_iwt_r1() +static INLINE void fx_iwt_r1() { FX_IWT(1); } -static inline void fx_iwt_r2() +static INLINE void fx_iwt_r2() { FX_IWT(2); } -static inline void fx_iwt_r3() +static INLINE void fx_iwt_r3() { FX_IWT(3); } -static inline void fx_iwt_r4() +static INLINE void fx_iwt_r4() { FX_IWT(4); } -static inline void fx_iwt_r5() +static INLINE void fx_iwt_r5() { FX_IWT(5); } -static inline void fx_iwt_r6() +static INLINE void fx_iwt_r6() { FX_IWT(6); } -static inline void fx_iwt_r7() +static INLINE void fx_iwt_r7() { FX_IWT(7); } -static inline void fx_iwt_r8() +static INLINE void fx_iwt_r8() { FX_IWT(8); } -static inline void fx_iwt_r9() +static INLINE void fx_iwt_r9() { FX_IWT(9); } -static inline void fx_iwt_r10() +static INLINE void fx_iwt_r10() { FX_IWT(10); } -static inline void fx_iwt_r11() +static INLINE void fx_iwt_r11() { FX_IWT(11); } -static inline void fx_iwt_r12() +static INLINE void fx_iwt_r12() { FX_IWT(12); } -static inline void fx_iwt_r13() +static INLINE void fx_iwt_r13() { FX_IWT(13); } -static inline void fx_iwt_r14() +static INLINE void fx_iwt_r14() { FX_IWT(14); READR14; } -static inline void fx_iwt_r15() +static INLINE void fx_iwt_r15() { FX_IWT(15); } @@ -3201,68 +3201,68 @@ GSU.vLastRamAdr |= USEX8(PIPE) << 8; FETCHPIPE; R15++; \ GSU.avReg[reg] = RAM(GSU.vLastRamAdr); \ GSU.avReg[reg] |= USEX8(RAM(GSU.vLastRamAdr^1)) << 8; \ CLRFLAGS; -static inline void fx_lm_r0() +static INLINE void fx_lm_r0() { FX_LM(0); } -static inline void fx_lm_r1() +static INLINE void fx_lm_r1() { FX_LM(1); } -static inline void fx_lm_r2() +static INLINE void fx_lm_r2() { FX_LM(2); } -static inline void fx_lm_r3() +static INLINE void fx_lm_r3() { FX_LM(3); } -static inline void fx_lm_r4() +static INLINE void fx_lm_r4() { FX_LM(4); } -static inline void fx_lm_r5() +static INLINE void fx_lm_r5() { FX_LM(5); } -static inline void fx_lm_r6() +static INLINE void fx_lm_r6() { FX_LM(6); } -static inline void fx_lm_r7() +static INLINE void fx_lm_r7() { FX_LM(7); } -static inline void fx_lm_r8() +static INLINE void fx_lm_r8() { FX_LM(8); } -static inline void fx_lm_r9() +static INLINE void fx_lm_r9() { FX_LM(9); } -static inline void fx_lm_r10() +static INLINE void fx_lm_r10() { FX_LM(10); } -static inline void fx_lm_r11() +static INLINE void fx_lm_r11() { FX_LM(11); } -static inline void fx_lm_r12() +static INLINE void fx_lm_r12() { FX_LM(12); } -static inline void fx_lm_r13() +static INLINE void fx_lm_r13() { FX_LM(13); } -static inline void fx_lm_r14() +static INLINE void fx_lm_r14() { FX_LM(14); READR14; } -static inline void fx_lm_r15() +static INLINE void fx_lm_r15() { FX_LM(15); } @@ -3276,67 +3276,67 @@ GSU.vLastRamAdr |= USEX8(PIPE) << 8; FETCHPIPE; \ RAM(GSU.vLastRamAdr) = (uint8)v; \ RAM(GSU.vLastRamAdr^1) = (uint8)(v>>8); \ CLRFLAGS; R15++; -static inline void fx_sm_r0() +static INLINE void fx_sm_r0() { FX_SM(0); } -static inline void fx_sm_r1() +static INLINE void fx_sm_r1() { FX_SM(1); } -static inline void fx_sm_r2() +static INLINE void fx_sm_r2() { FX_SM(2); } -static inline void fx_sm_r3() +static INLINE void fx_sm_r3() { FX_SM(3); } -static inline void fx_sm_r4() +static INLINE void fx_sm_r4() { FX_SM(4); } -static inline void fx_sm_r5() +static INLINE void fx_sm_r5() { FX_SM(5); } -static inline void fx_sm_r6() +static INLINE void fx_sm_r6() { FX_SM(6); } -static inline void fx_sm_r7() +static INLINE void fx_sm_r7() { FX_SM(7); } -static inline void fx_sm_r8() +static INLINE void fx_sm_r8() { FX_SM(8); } -static inline void fx_sm_r9() +static INLINE void fx_sm_r9() { FX_SM(9); } -static inline void fx_sm_r10() +static INLINE void fx_sm_r10() { FX_SM(10); } -static inline void fx_sm_r11() +static INLINE void fx_sm_r11() { FX_SM(11); } -static inline void fx_sm_r12() +static INLINE void fx_sm_r12() { FX_SM(12); } -static inline void fx_sm_r13() +static INLINE void fx_sm_r13() { FX_SM(13); } -static inline void fx_sm_r14() +static INLINE void fx_sm_r14() { FX_SM(14); } -static inline void fx_sm_r15() +static INLINE void fx_sm_r15() { FX_SM(15); } diff --git a/src/gfx.c b/src/gfx.c index f7be1da..72f13e1 100644 --- a/src/gfx.c +++ b/src/gfx.c @@ -2072,7 +2072,7 @@ void DrawBackground_16(uint32 BGMode, uint32 bg, uint8 Z1, uint8 Z2) GFX.Z1 = GFX.Z2 = depths [(Tile & 0x2000) >> 13]; } -static inline void DrawBackground(uint32 BGMode, uint32 bg, uint8 Z1, uint8 Z2) +static INLINE void DrawBackground(uint32 BGMode, uint32 bg, uint8 Z1, uint8 Z2) { //StartAnalyze(); diff --git a/src/gfx16.c b/src/gfx16.c index 5c520f5..5653a44 100644 --- a/src/gfx16.c +++ b/src/gfx16.c @@ -2244,7 +2244,7 @@ void DrawBackground_16(uint32 BGMode, uint32 bg, uint8 Z1, uint8 Z2) } -static inline void DrawBackground(uint32 BGMode, uint32 bg, uint8 Z1, uint8 Z2) +static INLINE void DrawBackground(uint32 BGMode, uint32 bg, uint8 Z1, uint8 Z2) { //StartAnalyze(); diff --git a/src/port.h b/src/port.h index 7ef9a13..81cc42f 100644 --- a/src/port.h +++ b/src/port.h @@ -61,7 +61,9 @@ I can't take it anymore, it's too convoluted. So I've commented out the entire #include #include #include + #include +#include //Types Defined typedef uint8_t bool8; @@ -141,14 +143,4 @@ void _splitpath(const char* path, char* drive, char* dir, char* fname, #define strcasecmp strcmp #define strncasecmp strncmp -#ifdef INLINE -#undef INLINE -#define INLINE __inline -#endif - -#ifdef inline -#undef inline -#define inline __inline -#endif - #endif // _PORT_H_ diff --git a/src/sa1.h b/src/sa1.h index 1de6b94..aaea698 100644 --- a/src/sa1.h +++ b/src/sa1.h @@ -149,7 +149,7 @@ END_EXTERN_C #define TIMER_IRQ_SOURCE (1 << 6) #define DMA_IRQ_SOURCE (1 << 5) -static inline void S9xSA1UnpackStatus() +static INLINE void S9xSA1UnpackStatus() { SA1._Zero = (SA1Registers.PL & Zero) == 0; SA1._Negative = (SA1Registers.PL & Negative); @@ -157,14 +157,14 @@ static inline void S9xSA1UnpackStatus() SA1._Overflow = (SA1Registers.PL & Overflow) >> 6; } -static inline void S9xSA1PackStatus() +static INLINE void S9xSA1PackStatus() { SA1Registers.PL &= ~(Zero | Negative | Carry | Overflow); SA1Registers.PL |= SA1._Carry | ((SA1._Zero == 0) << 1) | (SA1._Negative & 0x80) | (SA1._Overflow << 6); } -static inline void S9xSA1FixCycles() +static INLINE void S9xSA1FixCycles() { if (SA1CheckEmulation()) SA1.S9xOpcodes = S9xSA1OpcodesM1X1; diff --git a/src/sar.h b/src/sar.h index 891d29b..479eb44 100644 --- a/src/sar.h +++ b/src/sar.h @@ -87,7 +87,7 @@ #define SAR64(b, n) ((b)>>(n)) #else -static inline int8_t SAR8(const int8_t b, const int32_t n) +static INLINE int8_t SAR8(const int8_t b, const int32_t n) { #ifndef RIGHTSHIFT_INT8_IS_SAR if (b < 0) return (b >> n) | (-1 << (8 - n)); @@ -95,7 +95,7 @@ static inline int8_t SAR8(const int8_t b, const int32_t n) return b >> n; } -static inline int16_t SAR16(const int16_t b, const int32_t n) +static INLINE int16_t SAR16(const int16_t b, const int32_t n) { #ifndef RIGHTSHIFT_INT16_IS_SAR if (b < 0) return (b >> n) | (-1 << (16 - n)); @@ -103,7 +103,7 @@ static inline int16_t SAR16(const int16_t b, const int32_t n) return b >> n; } -static inline int32_t SAR32(const int32_t b, const int32_t n) +static INLINE int32_t SAR32(const int32_t b, const int32_t n) { #ifndef RIGHTSHIFT_INT32_IS_SAR if (b < 0) return (b >> n) | (-1 << (32 - n)); @@ -111,7 +111,7 @@ static inline int32_t SAR32(const int32_t b, const int32_t n) return b >> n; } -static inline int64_t SAR64(const int64_t b, const int32_t n) +static INLINE int64_t SAR64(const int64_t b, const int32_t n) { #ifndef RIGHTSHIFT_INT64_IS_SAR if (b < 0) return (b >> n) | (-1 << (64 - n)); diff --git a/src/sdd1emu.c b/src/sdd1emu.c index 3f178a5..baa8098 100644 --- a/src/sdd1emu.c +++ b/src/sdd1emu.c @@ -173,7 +173,7 @@ static uint8 run_table[128] = 113, 49, 81, 17, 97, 33, 65, 1 }; -static inline uint8 GetCodeword(int bits) +static INLINE uint8 GetCodeword(int bits) { uint8 tmp; @@ -197,7 +197,7 @@ static inline uint8 GetCodeword(int bits) return run_table[tmp]; } -static inline uint8 GolombGetBit(int code_size) +static INLINE uint8 GolombGetBit(int code_size) { if (!bit_ctr[code_size]) bit_ctr[code_size] = GetCodeword(code_size); bit_ctr[code_size]--; @@ -209,7 +209,7 @@ static inline uint8 GolombGetBit(int code_size) return (bit_ctr[code_size] == 0) ? 1 : 0; } -static inline uint8 ProbGetBit(uint8 context) +static INLINE uint8 ProbGetBit(uint8 context) { uint8 state = context_states[context]; uint8 bit = GolombGetBit(evolution_table[state].code_size); @@ -235,7 +235,7 @@ static inline uint8 ProbGetBit(uint8 context) return context_MPS[context]; /* we know bit is 0, so don't bother xoring */ } -static inline uint8 GetBit(uint8 cur_bitplane) +static INLINE uint8 GetBit(uint8 cur_bitplane) { uint8 bit; diff --git a/src/soundux.c b/src/soundux.c index af037f1..56e5edb 100644 --- a/src/soundux.c +++ b/src/soundux.c @@ -119,7 +119,7 @@ void DecodeBlockAsm(int8*, int16*, int32*, int32*); #define JUST_PLAYED_LAST_SAMPLE(c) ((c)->sample_pointer >= LAST_SAMPLE) -static inline void S9xAPUSetEndOfSample(int i, Channel* ch) +static INLINE void S9xAPUSetEndOfSample(int i, Channel* ch) { ch->state = SOUND_SILENT; ch->mode = MODE_NONE; @@ -132,7 +132,7 @@ static inline void S9xAPUSetEndOfSample(int i, Channel* ch) END_OF_FUNCTION(S9xAPUSetEndOfSample) #endif -static inline void S9xAPUSetEndX(int ch) +static INLINE void S9xAPUSetEndX(int ch) { APU.DSP [APU_ENDX] |= 1 << ch; } diff --git a/src/soundux.h b/src/soundux.h index 9088283..d79dfca 100644 --- a/src/soundux.h +++ b/src/soundux.h @@ -203,14 +203,14 @@ else \ if ((v) > 127) \ (v) = 127 -static inline void S9xSetSoundMute(bool8 mute) +static INLINE void S9xSetSoundMute(bool8 mute) { //bool8 old = so.mute_sound; so.mute_sound = mute; //return (old); } -static inline void S9xSetEnvRate(Channel* ch, unsigned long rate, int direction, int target, unsigned int mode) +static INLINE void S9xSetEnvRate(Channel* ch, unsigned long rate, int direction, int target, unsigned int mode) { ch->envx_target = target; @@ -273,7 +273,7 @@ static inline void S9xSetEnvRate(Channel* ch, unsigned long rate, int direction, #endif } -static inline void S9xSetEchoEnable(uint8 byte) +static INLINE void S9xSetEchoEnable(uint8 byte) { int i; SoundData.echo_channel_enable = byte; @@ -295,13 +295,13 @@ static inline void S9xSetEchoEnable(uint8 byte) } } -static inline void S9xSetEchoFeedback(int feedback) +static INLINE void S9xSetEchoFeedback(int feedback) { CLIP8(feedback); SoundData.echo_feedback = feedback; } -static inline void S9xSetFilterCoefficient(int tap, int value) +static INLINE void S9xSetFilterCoefficient(int tap, int value) { FilterTaps [tap & 7] = value; SoundData.no_filter = (FilterTaps [0] == 127 || FilterTaps [0] == 0) && @@ -314,13 +314,13 @@ static inline void S9xSetFilterCoefficient(int tap, int value) FilterTaps [7] == 0; } -static inline uint16* S9xGetSampleAddress(int sample_number) +static INLINE uint16* S9xGetSampleAddress(int sample_number) { uint32 addr = (((APU.DSP[APU_DIR] << 8) + (sample_number << 2)) & 0xffff); return (uint16*)(IAPU.RAM + addr); } -static inline void S9xSetSoundFrequency(int channel, int hertz) // hertz [0~64K<<1] +static INLINE void S9xSetSoundFrequency(int channel, int hertz) // hertz [0~64K<<1] { if (so.playback_rate) { diff --git a/src/tile.c b/src/tile.c index 0be6489..edb9333 100644 --- a/src/tile.c +++ b/src/tile.c @@ -230,7 +230,7 @@ static INLINE void WRITE_4PIXELS_FLIPPED(int32 Offset, uint8* Pixels) #undef FN } -static inline void WRITE_4PIXELSHI16(int32 Offset, uint8* Pixels) +static INLINE void WRITE_4PIXELSHI16(int32 Offset, uint8* Pixels) { uint32 Pixel; uint16* Screen = (uint16*) GFX.S + Offset; @@ -250,7 +250,7 @@ static inline void WRITE_4PIXELSHI16(int32 Offset, uint8* Pixels) #undef FN } -static inline void WRITE_4PIXELSHI16_FLIPPED(int32 Offset, uint8* Pixels) +static INLINE void WRITE_4PIXELSHI16_FLIPPED(int32 Offset, uint8* Pixels) { uint32 Pixel; uint16* Screen = (uint16*) GFX.S + Offset; diff --git a/src/tile16.c b/src/tile16.c index 1ee7cd6..874d34f 100644 --- a/src/tile16.c +++ b/src/tile16.c @@ -364,7 +364,7 @@ void SelectPalette() } -static inline void WRITE_4PIXELSHI16(uint32 Offset, uint8* Pixels) +static INLINE void WRITE_4PIXELSHI16(uint32 Offset, uint8* Pixels) { uint32 Pixel; uint16* Screen = (uint16*) GFX.S + Offset; @@ -384,7 +384,7 @@ static inline void WRITE_4PIXELSHI16(uint32 Offset, uint8* Pixels) #undef FN } -static inline void WRITE_4PIXELSHI16_FLIPPED(uint32 Offset, uint8* Pixels) +static INLINE void WRITE_4PIXELSHI16_FLIPPED(uint32 Offset, uint8* Pixels) { uint32 Pixel; uint16* Screen = (uint16*) GFX.S + Offset; -- cgit v1.2.3