From ad4a95e51190f18c0a5d03945ca049d19cfc48be Mon Sep 17 00:00:00 2001 From: twinaphex Date: Mon, 8 Aug 2016 03:57:40 +0200 Subject: Cleanups --- src/apu.h | 4 +- src/cpuaddr.h | 44 ++++++++++---------- src/cpuexec.h | 8 ++-- src/cpumacro.h | 124 ++++++++++++++++++++++++++++----------------------------- src/port.h | 1 - src/ppu.h | 24 +++++------ src/sa1.h | 6 +-- 7 files changed, 105 insertions(+), 106 deletions(-) (limited to 'src') diff --git a/src/apu.h b/src/apu.h index 201c68c..88d393b 100644 --- a/src/apu.h +++ b/src/apu.h @@ -103,7 +103,7 @@ typedef struct EXTERN_C SAPU APU; EXTERN_C SIAPU IAPU; -STATIC inline void S9xAPUUnpackStatus() +static inline void S9xAPUUnpackStatus(void) { IAPU._Zero = ((IAPU.P & Zero) == 0) | (IAPU.P & Negative); @@ -116,7 +116,7 @@ STATIC inline void S9xAPUUnpackStatus() } } -STATIC inline void S9xAPUPackStatus() +static inline void S9xAPUPackStatus(void) { #ifdef ASM_SPC700 if (Settings.asmspc700) diff --git a/src/cpuaddr.h b/src/cpuaddr.h index 7d47431..920e9c5 100644 --- a/src/cpuaddr.h +++ b/src/cpuaddr.h @@ -48,19 +48,19 @@ EXTERN_C long OpAddress; -STATIC inline void Immediate8() +static inline void Immediate8() { OpAddress = ICPU.ShiftedPB + CPU.PC - CPU.PCBase; CPU.PC++; } -STATIC inline void Immediate16() +static inline void Immediate16() { OpAddress = ICPU.ShiftedPB + CPU.PC - CPU.PCBase; CPU.PC += 2; } -STATIC inline void Relative() +static inline void Relative() { signed char s9xInt8 = *CPU.PC++; #ifdef VAR_CYCLES @@ -69,7 +69,7 @@ STATIC inline void Relative() OpAddress = ((int)(CPU.PC - CPU.PCBase) + s9xInt8) & 0xffff; } -STATIC inline void RelativeLong() +static inline void RelativeLong() { #ifdef FAST_LSB_WORD_ACCESS OpAddress = *(uint16*) CPU.PC; @@ -84,7 +84,7 @@ STATIC inline void RelativeLong() OpAddress &= 0xffff; } -STATIC inline void AbsoluteIndexedIndirect() +static inline void AbsoluteIndexedIndirect() { #ifdef FAST_LSB_WORD_ACCESS OpAddress = (Registers.X.W + * (uint16*) CPU.PC) & 0xffff; @@ -98,7 +98,7 @@ STATIC inline void AbsoluteIndexedIndirect() OpAddress = S9xGetWord(ICPU.ShiftedPB + OpAddress); } -STATIC inline void AbsoluteIndirectLong() +static inline void AbsoluteIndirectLong() { #ifdef FAST_LSB_WORD_ACCESS OpAddress = *(uint16*) CPU.PC; @@ -113,7 +113,7 @@ STATIC inline void AbsoluteIndirectLong() OpAddress = S9xGetWord(OpAddress) | (S9xGetByte(OpAddress + 2) << 16); } -STATIC inline void AbsoluteIndirect() +static inline void AbsoluteIndirect() { #ifdef FAST_LSB_WORD_ACCESS OpAddress = *(uint16*) CPU.PC; @@ -128,7 +128,7 @@ STATIC inline void AbsoluteIndirect() OpAddress = S9xGetWord(OpAddress) + ICPU.ShiftedPB; } -STATIC inline void Absolute() +static inline void Absolute() { #ifdef FAST_LSB_WORD_ACCESS OpAddress = *(uint16*) CPU.PC + ICPU.ShiftedDB; @@ -141,7 +141,7 @@ STATIC inline void Absolute() #endif } -STATIC inline void AbsoluteLong() +static inline void AbsoluteLong() { #ifdef FAST_LSB_WORD_ACCESS OpAddress = (*(uint32*) CPU.PC) & 0xffffff; @@ -154,7 +154,7 @@ STATIC inline void AbsoluteLong() #endif } -STATIC inline void Direct(void) +static inline void Direct(void) { OpAddress = (*CPU.PC++ + Registers.D.W) & 0xffff; #ifdef VAR_CYCLES @@ -163,7 +163,7 @@ STATIC inline void Direct(void) // if (Registers.DL != 0) CPU.Cycles += ONE_CYCLE; } -STATIC inline void DirectIndirectIndexed() +static inline void DirectIndirectIndexed() { OpAddress = (*CPU.PC++ + Registers.D.W) & 0xffff; #ifdef VAR_CYCLES @@ -177,7 +177,7 @@ STATIC inline void DirectIndirectIndexed() // XXX: else Add one cycle if crosses page boundary } -STATIC inline void DirectIndirectIndexedLong() +static inline void DirectIndirectIndexedLong() { OpAddress = (*CPU.PC++ + Registers.D.W) & 0xffff; #ifdef VAR_CYCLES @@ -189,7 +189,7 @@ STATIC inline void DirectIndirectIndexedLong() // if (Registers.DL != 0) CPU.Cycles += ONE_CYCLE; } -STATIC inline void DirectIndexedIndirect(void) +static inline void DirectIndexedIndirect(void) { OpAddress = (*CPU.PC++ + Registers.D.W + Registers.X.W) & 0xffff; #ifdef VAR_CYCLES @@ -206,7 +206,7 @@ STATIC inline void DirectIndexedIndirect(void) #endif } -STATIC inline void DirectIndexedX() +static inline void DirectIndexedX() { OpAddress = (*CPU.PC++ + Registers.D.W + Registers.X.W) & 0xffff; #ifdef VAR_CYCLES @@ -221,7 +221,7 @@ STATIC inline void DirectIndexedX() #endif } -STATIC inline void DirectIndexedY() +static inline void DirectIndexedY() { OpAddress = (*CPU.PC++ + Registers.D.W + Registers.Y.W) & 0xffff; #ifdef VAR_CYCLES @@ -236,7 +236,7 @@ STATIC inline void DirectIndexedY() #endif } -STATIC inline void AbsoluteIndexedX() +static inline void AbsoluteIndexedX() { #ifdef FAST_LSB_WORD_ACCESS OpAddress = ICPU.ShiftedDB + *(uint16*) CPU.PC + Registers.X.W; @@ -252,7 +252,7 @@ STATIC inline void AbsoluteIndexedX() // XXX: else is cross page boundary add one cycle } -STATIC inline void AbsoluteIndexedY() +static inline void AbsoluteIndexedY() { #ifdef FAST_LSB_WORD_ACCESS OpAddress = ICPU.ShiftedDB + *(uint16*) CPU.PC + Registers.Y.W; @@ -268,7 +268,7 @@ STATIC inline void AbsoluteIndexedY() // XXX: else is cross page boundary add one cycle } -STATIC inline void AbsoluteLongIndexedX() +static inline void AbsoluteLongIndexedX() { #ifdef FAST_LSB_WORD_ACCESS OpAddress = (*(uint32*) CPU.PC + Registers.X.W) & 0xffffff; @@ -281,7 +281,7 @@ STATIC inline void AbsoluteLongIndexedX() #endif } -STATIC inline void DirectIndirect() +static inline void DirectIndirect() { OpAddress = (*CPU.PC++ + Registers.D.W) & 0xffff; #ifdef VAR_CYCLES @@ -292,7 +292,7 @@ STATIC inline void DirectIndirect() // if (Registers.DL != 0) CPU.Cycles += ONE_CYCLE; } -STATIC inline void DirectIndirectLong() +static inline void DirectIndirectLong() { OpAddress = (*CPU.PC++ + Registers.D.W) & 0xffff; #ifdef VAR_CYCLES @@ -303,7 +303,7 @@ STATIC inline void DirectIndirectLong() // if (Registers.DL != 0) CPU.Cycles += ONE_CYCLE; } -STATIC inline void StackRelative() +static inline void StackRelative() { OpAddress = (*CPU.PC++ + Registers.S.W) & 0xffff; #ifdef VAR_CYCLES @@ -312,7 +312,7 @@ STATIC inline void StackRelative() #endif } -STATIC inline void StackRelativeIndirectIndexed() +static inline void StackRelativeIndirectIndexed() { OpAddress = (*CPU.PC++ + Registers.S.W) & 0xffff; #ifdef VAR_CYCLES diff --git a/src/cpuexec.h b/src/cpuexec.h index 407c7e5..e5872de 100644 --- a/src/cpuexec.h +++ b/src/cpuexec.h @@ -97,14 +97,14 @@ extern uint8 S9xE0M0X1 [256]; extern SICPU ICPU; END_EXTERN_C -STATIC inline void CLEAR_IRQ_SOURCE(uint32 M) +static inline void CLEAR_IRQ_SOURCE(uint32 M) { CPU.IRQActive &= ~M; if (!CPU.IRQActive) CPU.Flags &= ~IRQ_PENDING_FLAG; } -STATIC inline void S9xUnpackStatus() +static inline void S9xUnpackStatus() { ICPU._Zero = (Registers.PL & Zero) == 0; ICPU._Negative = (Registers.PL & Negative); @@ -112,14 +112,14 @@ STATIC inline void S9xUnpackStatus() ICPU._Overflow = (Registers.PL & Overflow) >> 6; } -STATIC inline void S9xPackStatus() +static inline void S9xPackStatus() { Registers.PL &= ~(Zero | Negative | Carry | Overflow); Registers.PL |= ICPU._Carry | ((ICPU._Zero == 0) << 1) | (ICPU._Negative & 0x80) | (ICPU._Overflow << 6); } -STATIC inline void S9xFixCycles() +static inline void S9xFixCycles() { if (CheckEmulation()) { diff --git a/src/cpumacro.h b/src/cpumacro.h index f063e34..d2a4954 100644 --- a/src/cpumacro.h +++ b/src/cpumacro.h @@ -41,19 +41,19 @@ #ifndef _CPUMACRO_H_ #define _CPUMACRO_H_ -STATIC inline void SetZN16(uint16 Work) +static inline void SetZN16(uint16 Work) { ICPU._Zero = Work != 0; ICPU._Negative = (uint8)(Work >> 8); } -STATIC inline void SetZN8(uint8 Work) +static inline void SetZN8(uint8 Work) { ICPU._Zero = Work; ICPU._Negative = Work; } -STATIC inline void ADC8() +static inline void ADC8() { uint8 Work8 = S9xGetByte(OpAddress); @@ -106,7 +106,7 @@ STATIC inline void ADC8() } } -STATIC inline void ADC16() +static inline void ADC16() { uint16 Work16 = S9xGetWord(OpAddress); @@ -176,19 +176,19 @@ STATIC inline void ADC16() } } -STATIC inline void AND16() +static inline void AND16() { Registers.A.W &= S9xGetWord(OpAddress); SetZN16(Registers.A.W); } -STATIC inline void AND8() +static inline void AND8() { Registers.AL &= S9xGetByte(OpAddress); SetZN8(Registers.AL); } -STATIC inline void A_ASL16() +static inline void A_ASL16() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -198,7 +198,7 @@ STATIC inline void A_ASL16() SetZN16(Registers.A.W); } -STATIC inline void A_ASL8() +static inline void A_ASL8() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -208,7 +208,7 @@ STATIC inline void A_ASL8() SetZN8(Registers.AL); } -STATIC inline void ASL16() +static inline void ASL16() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -220,7 +220,7 @@ STATIC inline void ASL16() SetZN16(Work16); } -STATIC inline void ASL8() +static inline void ASL8() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -232,7 +232,7 @@ STATIC inline void ASL8() SetZN8(Work8); } -STATIC inline void BIT16() +static inline void BIT16() { uint16 Work16 = S9xGetWord(OpAddress); ICPU._Overflow = (Work16 & 0x4000) != 0; @@ -240,7 +240,7 @@ STATIC inline void BIT16() ICPU._Zero = (Work16 & Registers.A.W) != 0; } -STATIC inline void BIT8() +static inline void BIT8() { uint8 Work8 = S9xGetByte(OpAddress); ICPU._Overflow = (Work8 & 0x40) != 0; @@ -248,7 +248,7 @@ STATIC inline void BIT8() ICPU._Zero = Work8 & Registers.AL; } -STATIC inline void CMP16() +static inline void CMP16() { long s9xInt32 = (long) Registers.A.W - (long) S9xGetWord(OpAddress); @@ -256,7 +256,7 @@ STATIC inline void CMP16() SetZN16((uint16) s9xInt32); } -STATIC inline void CMP8() +static inline void CMP8() { short s9xInt16 = (short) Registers.AL - (short) S9xGetByte(OpAddress); @@ -264,7 +264,7 @@ STATIC inline void CMP8() SetZN8((uint8) s9xInt16); } -STATIC inline void CMX16() +static inline void CMX16() { long s9xInt32 = (long) Registers.X.W - (long) S9xGetWord(OpAddress); @@ -272,7 +272,7 @@ STATIC inline void CMX16() SetZN16((uint16) s9xInt32); } -STATIC inline void CMX8() +static inline void CMX8() { short s9xInt16 = (short) Registers.XL - (short) S9xGetByte(OpAddress); @@ -280,7 +280,7 @@ STATIC inline void CMX8() SetZN8((uint8) s9xInt16); } -STATIC inline void CMY16() +static inline void CMY16() { long s9xInt32 = (long) Registers.Y.W - (long) S9xGetWord(OpAddress); @@ -288,7 +288,7 @@ STATIC inline void CMY16() SetZN16((uint16) s9xInt32); } -STATIC inline void CMY8() +static inline void CMY8() { short s9xInt16 = (short) Registers.YL - (short) S9xGetByte(OpAddress); @@ -296,7 +296,7 @@ STATIC inline void CMY8() SetZN8((uint8) s9xInt16); } -STATIC inline void A_DEC16() +static inline void A_DEC16() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -309,7 +309,7 @@ STATIC inline void A_DEC16() SetZN16(Registers.A.W); } -STATIC inline void A_DEC8() +static inline void A_DEC8() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -322,7 +322,7 @@ STATIC inline void A_DEC8() SetZN8(Registers.AL); } -STATIC inline void DEC16() +static inline void DEC16() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -336,7 +336,7 @@ STATIC inline void DEC16() SetZN16(Work16); } -STATIC inline void DEC8() +static inline void DEC8() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -350,19 +350,19 @@ STATIC inline void DEC8() SetZN8(Work8); } -STATIC inline void EOR16() +static inline void EOR16() { Registers.A.W ^= S9xGetWord(OpAddress); SetZN16(Registers.A.W); } -STATIC inline void EOR8() +static inline void EOR8() { Registers.AL ^= S9xGetByte(OpAddress); SetZN8(Registers.AL); } -STATIC inline void A_INC16() +static inline void A_INC16() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -375,7 +375,7 @@ STATIC inline void A_INC16() SetZN16(Registers.A.W); } -STATIC inline void A_INC8() +static inline void A_INC8() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -388,7 +388,7 @@ STATIC inline void A_INC8() SetZN8(Registers.AL); } -STATIC inline void INC16() +static inline void INC16() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -402,7 +402,7 @@ STATIC inline void INC16() SetZN16(Work16); } -STATIC inline void INC8() +static inline void INC8() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -416,43 +416,43 @@ STATIC inline void INC8() SetZN8(Work8); } -STATIC inline void LDA16() +static inline void LDA16() { Registers.A.W = S9xGetWord(OpAddress); SetZN16(Registers.A.W); } -STATIC inline void LDA8() +static inline void LDA8() { Registers.AL = S9xGetByte(OpAddress); SetZN8(Registers.AL); } -STATIC inline void LDX16() +static inline void LDX16() { Registers.X.W = S9xGetWord(OpAddress); SetZN16(Registers.X.W); } -STATIC inline void LDX8() +static inline void LDX8() { Registers.XL = S9xGetByte(OpAddress); SetZN8(Registers.XL); } -STATIC inline void LDY16() +static inline void LDY16() { Registers.Y.W = S9xGetWord(OpAddress); SetZN16(Registers.Y.W); } -STATIC inline void LDY8() +static inline void LDY8() { Registers.YL = S9xGetByte(OpAddress); SetZN8(Registers.YL); } -STATIC inline void A_LSR16() +static inline void A_LSR16() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -462,7 +462,7 @@ STATIC inline void A_LSR16() SetZN16(Registers.A.W); } -STATIC inline void A_LSR8() +static inline void A_LSR8() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -472,7 +472,7 @@ STATIC inline void A_LSR8() SetZN8(Registers.AL); } -STATIC inline void LSR16() +static inline void LSR16() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -484,7 +484,7 @@ STATIC inline void LSR16() SetZN16(Work16); } -STATIC inline void LSR8() +static inline void LSR8() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -496,19 +496,19 @@ STATIC inline void LSR8() SetZN8(Work8); } -STATIC inline void ORA16() +static inline void ORA16() { Registers.A.W |= S9xGetWord(OpAddress); SetZN16(Registers.A.W); } -STATIC inline void ORA8() +static inline void ORA8() { Registers.AL |= S9xGetByte(OpAddress); SetZN8(Registers.AL); } -STATIC inline void A_ROL16() +static inline void A_ROL16() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -519,7 +519,7 @@ STATIC inline void A_ROL16() SetZN16((uint16) Work32); } -STATIC inline void A_ROL8() +static inline void A_ROL8() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -532,7 +532,7 @@ STATIC inline void A_ROL8() SetZN8((uint8) Work16); } -STATIC inline void ROL16() +static inline void ROL16() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -545,7 +545,7 @@ STATIC inline void ROL16() SetZN16((uint16) Work32); } -STATIC inline void ROL8() +static inline void ROL8() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -558,7 +558,7 @@ STATIC inline void ROL8() SetZN8((uint8) Work16); } -STATIC inline void A_ROR16() +static inline void A_ROR16() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -571,7 +571,7 @@ STATIC inline void A_ROR16() SetZN16((uint16) Work32); } -STATIC inline void A_ROR8() +static inline void A_ROR8() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -583,7 +583,7 @@ STATIC inline void A_ROR8() SetZN8((uint8) Work16); } -STATIC inline void ROR16() +static inline void ROR16() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -596,7 +596,7 @@ STATIC inline void ROR16() SetZN16((uint16) Work32); } -STATIC inline void ROR8() +static inline void ROR8() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -609,7 +609,7 @@ STATIC inline void ROR8() SetZN8((uint8) Work16); } -STATIC inline void SBC16() +static inline void SBC16() { uint16 Work16 = S9xGetWord(OpAddress); @@ -677,7 +677,7 @@ STATIC inline void SBC16() } } -STATIC inline void SBC8() +static inline void SBC8() { uint8 Work8 = S9xGetByte(OpAddress); if (CheckDecimal()) @@ -726,47 +726,47 @@ STATIC inline void SBC8() } } -STATIC inline void STA16() +static inline void STA16() { S9xSetWord(Registers.A.W, OpAddress); } -STATIC inline void STA8() +static inline void STA8() { S9xSetByte(Registers.AL, OpAddress); } -STATIC inline void STX16() +static inline void STX16() { S9xSetWord(Registers.X.W, OpAddress); } -STATIC inline void STX8() +static inline void STX8() { S9xSetByte(Registers.XL, OpAddress); } -STATIC inline void STY16() +static inline void STY16() { S9xSetWord(Registers.Y.W, OpAddress); } -STATIC inline void STY8() +static inline void STY8() { S9xSetByte(Registers.YL, OpAddress); } -STATIC inline void STZ16() +static inline void STZ16() { S9xSetWord(0, OpAddress); } -STATIC inline void STZ8() +static inline void STZ8() { S9xSetByte(0, OpAddress); } -STATIC inline void TSB16() +static inline void TSB16() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -777,7 +777,7 @@ STATIC inline void TSB16() S9xSetWord(Work16, OpAddress); } -STATIC inline void TSB8() +static inline void TSB8() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -788,7 +788,7 @@ STATIC inline void TSB8() S9xSetByte(Work8, OpAddress); } -STATIC inline void TRB16() +static inline void TRB16() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; @@ -799,7 +799,7 @@ STATIC inline void TRB16() S9xSetWord(Work16, OpAddress); } -STATIC inline void TRB8() +static inline void TRB8() { #ifdef VAR_CYCLES CPU.Cycles += ONE_CYCLE; diff --git a/src/port.h b/src/port.h index 0f12e7a..24cc7a0 100644 --- a/src/port.h +++ b/src/port.h @@ -111,7 +111,6 @@ typedef short int16_32; //Misc Items #define VAR_CYCLES //#define SPC700_SHUTDOWN -#define STATIC static #define FASTCALL #define PIXEL_FORMAT RGB565 #define CPU_SHUTDOWN diff --git a/src/ppu.h b/src/ppu.h index ecb2c2d..87b14b7 100644 --- a/src/ppu.h +++ b/src/ppu.h @@ -275,7 +275,7 @@ END_EXTERN_C #include "gfx.h" #include "memmap.h" -STATIC INLINE uint8 REGISTER_4212() +static INLINE uint8 REGISTER_4212() { GetBank = 0; if (CPU.V_Counter >= PPU.ScreenHeight + FIRST_VISIBLE_LINE && @@ -290,7 +290,7 @@ STATIC INLINE uint8 REGISTER_4212() } /* -STATIC INLINE void FLUSH_REDRAW () +static INLINE void FLUSH_REDRAW () { if (IPPU.PreviousLine != IPPU.CurrentLine) S9xUpdateScreen (); @@ -300,7 +300,7 @@ STATIC INLINE void FLUSH_REDRAW () #define FLUSH_REDRAW() if (IPPU.PreviousLine != IPPU.CurrentLine) S9xUpdateScreen () -STATIC INLINE void REGISTER_2104(uint8 byte) +static INLINE void REGISTER_2104(uint8 byte) { if (PPU.OAMAddr & 0x100) { @@ -388,7 +388,7 @@ STATIC INLINE void REGISTER_2104(uint8 byte) Memory.FillRAM [0x2104] = byte; } -STATIC INLINE void REGISTER_2118(uint8 Byte) +static INLINE void REGISTER_2118(uint8 Byte) { uint32 address; if (PPU.VMA.FullGraphicCount) @@ -419,7 +419,7 @@ STATIC INLINE void REGISTER_2118(uint8 Byte) // Memory.FillRAM [0x2118] = Byte; } -STATIC INLINE void REGISTER_2118_tile(uint8 Byte) +static INLINE void REGISTER_2118_tile(uint8 Byte) { uint32 address; uint32 rem = PPU.VMA.Address & PPU.VMA.Mask1; @@ -435,7 +435,7 @@ STATIC INLINE void REGISTER_2118_tile(uint8 Byte) // Memory.FillRAM [0x2118] = Byte; } -STATIC INLINE void REGISTER_2118_linear(uint8 Byte) +static INLINE void REGISTER_2118_linear(uint8 Byte) { uint32 address; Memory.VRAM[address = (PPU.VMA.Address << 1) & 0xFFFF] = Byte; @@ -447,7 +447,7 @@ STATIC INLINE void REGISTER_2118_linear(uint8 Byte) // Memory.FillRAM [0x2118] = Byte; } -STATIC INLINE void REGISTER_2119(uint8 Byte) +static INLINE void REGISTER_2119(uint8 Byte) { uint32 address; if (PPU.VMA.FullGraphicCount) @@ -478,7 +478,7 @@ STATIC INLINE void REGISTER_2119(uint8 Byte) // Memory.FillRAM [0x2119] = Byte; } -STATIC INLINE void REGISTER_2119_tile(uint8 Byte) +static INLINE void REGISTER_2119_tile(uint8 Byte) { uint32 rem = PPU.VMA.Address & PPU.VMA.Mask1; uint32 address = ((((PPU.VMA.Address & ~PPU.VMA.Mask1) + @@ -493,7 +493,7 @@ STATIC INLINE void REGISTER_2119_tile(uint8 Byte) // Memory.FillRAM [0x2119] = Byte; } -STATIC INLINE void REGISTER_2119_linear(uint8 Byte) +static INLINE void REGISTER_2119_linear(uint8 Byte) { uint32 address; Memory.VRAM[address = ((PPU.VMA.Address << 1) + 1) & 0xFFFF] = Byte; @@ -506,7 +506,7 @@ STATIC INLINE void REGISTER_2119_linear(uint8 Byte) } #ifndef __OLD_RASTER_FX__ -STATIC INLINE void REGISTER_2122(uint8 Byte) +static INLINE void REGISTER_2122(uint8 Byte) { // CG-RAM (palette) write @@ -546,7 +546,7 @@ STATIC INLINE void REGISTER_2122(uint8 Byte) } #else // __OLD_RASTER_FX__ -STATIC INLINE void REGISTER_2122(uint8 Byte) +static INLINE void REGISTER_2122(uint8 Byte) { // CG-RAM (palette) write @@ -600,7 +600,7 @@ STATIC INLINE void REGISTER_2122(uint8 Byte) #endif -STATIC INLINE void REGISTER_2180(uint8 Byte) +static INLINE void REGISTER_2180(uint8 Byte) { Memory.RAM[PPU.WRAM++] = Byte; PPU.WRAM &= 0x1FFFF; diff --git a/src/sa1.h b/src/sa1.h index 3d42722..1de6b94 100644 --- a/src/sa1.h +++ b/src/sa1.h @@ -149,7 +149,7 @@ END_EXTERN_C #define TIMER_IRQ_SOURCE (1 << 6) #define DMA_IRQ_SOURCE (1 << 5) -STATIC inline void S9xSA1UnpackStatus() +static inline void S9xSA1UnpackStatus() { SA1._Zero = (SA1Registers.PL & Zero) == 0; SA1._Negative = (SA1Registers.PL & Negative); @@ -157,14 +157,14 @@ STATIC inline void S9xSA1UnpackStatus() SA1._Overflow = (SA1Registers.PL & Overflow) >> 6; } -STATIC inline void S9xSA1PackStatus() +static inline void S9xSA1PackStatus() { SA1Registers.PL &= ~(Zero | Negative | Carry | Overflow); SA1Registers.PL |= SA1._Carry | ((SA1._Zero == 0) << 1) | (SA1._Negative & 0x80) | (SA1._Overflow << 6); } -STATIC inline void S9xSA1FixCycles() +static inline void S9xSA1FixCycles() { if (SA1CheckEmulation()) SA1.S9xOpcodes = S9xSA1OpcodesM1X1; -- cgit v1.2.3