From e708c127fa51beab567a9ce0e3ab53b58c997773 Mon Sep 17 00:00:00 2001
From: Nebuleon Fumika
Date: Tue, 18 Dec 2012 22:53:49 -0500
Subject: Un-inline a bunch of stuff.

With the MIPS instruction cache, this means that two consecutive SNES CPU instructions using e.g. the same addressing style or the same opcode have a chance that the second one will use the first one's code and that it will be cached.
---
 Makefile | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

(limited to 'Makefile')

diff --git a/Makefile b/Makefile
index a972f16..6bcaba6 100644
--- a/Makefile
+++ b/Makefile
@@ -63,7 +63,8 @@ OBJECTS      = $(C_OBJECTS) $(CPP_OBJECTS)
 # - - - Compilation flags - - -
 CFLAGS := -mips32 -Os -mno-abicalls -fno-pic -fno-builtin \
 	      -fno-exceptions -fno-function-sections -mlong-calls \
-	      -fomit-frame-pointer -msoft-float -G 4
+	      -fomit-frame-pointer -msoft-float -G 4 \
+          -fno-inline -fno-early-inlining
 
 DEFS   := -DSPC700_C -DEXECUTE_SUPERFX_PER_LINE -DSDD1_DECOMP \
           -DVAR_CYCLES -DCPU_SHUTDOWN -DSPC700_SHUTDOWN \
-- 
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