From 8b1e490a551b2fe5e184aa9111f837d5b3a69bc7 Mon Sep 17 00:00:00 2001
From: João Silva
Date: Sat, 14 Jan 2017 19:45:43 +0000
Subject: Imported code from the speed-hacks branch.

---
 source/cpuops.c | 211 ++++++++++++++++++++++++++++++++++++++++++++++++++++++--
 1 file changed, 207 insertions(+), 4 deletions(-)

(limited to 'source/cpuops.c')

diff --git a/source/cpuops.c b/source/cpuops.c
index d7f90e6..977f97e 100644
--- a/source/cpuops.c
+++ b/source/cpuops.c
@@ -3424,6 +3424,31 @@ static inline void CPUShutdown()
 #define CPUShutdown()
 #endif
 
+// From the speed-hacks branch of CatSFC
+static inline void ForceShutdown()
+{
+#ifdef CPU_SHUTDOWN
+#ifndef SA1_OPCODES
+   CPU.WaitAddress = NULL;
+   if (Settings.SA1)
+      S9xSA1ExecuteDuringSleep ();
+   CPU.Cycles = CPU.NextEvent;
+   if (IAPU.APUExecuting)
+   {
+      ICPU.CPUExecuting = false;
+      do
+      {
+         APU_EXECUTE1();
+      } while (APU.Cycles < CPU.NextEvent);
+      ICPU.CPUExecuting = true;
+   }
+#else
+   SA1.Executing = false;
+   SA1.CPUExecuting = false;
+#endif
+#endif
+}
+
 /* BCC */
 static void Op90(void)
 {
@@ -5008,16 +5033,194 @@ static void OpCB(void)
 #endif // SA1_OPCODES
 }
 
-// STP
+// Usually an STP opcode
+// SNESAdvance speed hack, not implemented in Snes9xTYL | Snes9x-Euphoria (from the speed-hacks branch of CatSFC)
 static void OpDB(void)
 {
-   CPU.PC--;
-   CPU.Flags |= DEBUG_MODE_FLAG;
+#if !defined NO_SPEEDHACKS && defined CPU_SHUTDOWN
+   uint8_t NextByte = *CPU.PC++;
+
+   ForceShutdown();
+
+   int8_t BranchOffset = (NextByte & 0x7F) | ((NextByte & 0x40) << 1);
+   // ^ -64 .. +63, sign extend bit 6 into 7 for unpacking
+   long TargetAddress = ((int) (CPU.PC - CPU.PCBase) + BranchOffset) & 0xffff;
+
+   switch (NextByte & 0x80)
+   {
+   case 0x00: // BNE
+      BranchCheck1 ();
+      if (!CheckZero ()) {
+         CPU.PC = CPU.PCBase + TargetAddress;
+#ifdef VAR_CYCLES
+         CPU.Cycles += ONE_CYCLE;
+#else
+#ifndef SA1_OPCODES
+         CPU.Cycles++;
+#endif
+#endif
+         CPUShutdown ();
+      }
+      return;
+   case 0x80: // BEQ
+      BranchCheck2 ();
+      if (CheckZero ()) {
+         CPU.PC = CPU.PCBase + TargetAddress;
+#ifdef VAR_CYCLES
+         CPU.Cycles += ONE_CYCLE;
+#else
+#ifndef SA1_OPCODES
+         CPU.Cycles++;
+#endif
+#endif
+         CPUShutdown ();
+      }
+      return;
+   }
+#else
+     CPU.PC--;
+     CPU.Flags |= DEBUG_MODE_FLAG;
+#endif
 }
 
-// Reserved S9xOpcode
+// SNESAdvance speed hack, as implemented in Snes9xTYL / Snes9x-Euphoria (from the speed-hacks branch of CatSFC)
 static void Op42(void)
 {
+#if !defined NO_SPEEDHACKS && defined CPU_SHUTDOWN
+   uint8_t NextByte = *CPU.PC++;
+
+   ForceShutdown();
+
+   int8_t BranchOffset = 0xF0 | (NextByte & 0xF); // always negative
+   long TargetAddress = ((int) (CPU.PC - CPU.PCBase) + BranchOffset) & 0xffff;
+
+   switch (NextByte & 0xF0)
+   {
+   case 0x10: // BPL
+      BranchCheck1 ();
+      if (!CheckNegative ()) {
+         CPU.PC = CPU.PCBase + TargetAddress;
+#ifdef VAR_CYCLES
+         CPU.Cycles += ONE_CYCLE;
+#else
+#ifndef SA1_OPCODES
+         CPU.Cycles++;
+#endif
+#endif
+         CPUShutdown ();
+      }
+      return;
+   case 0x30: // BMI
+      BranchCheck1 ();
+      if (CheckNegative ()) {
+         CPU.PC = CPU.PCBase + TargetAddress;
+#ifdef VAR_CYCLES
+         CPU.Cycles += ONE_CYCLE;
+#else
+#ifndef SA1_OPCODES
+         CPU.Cycles++;
+#endif
+#endif
+         CPUShutdown ();
+      }
+      return;
+   case 0x50: // BVC
+      BranchCheck0 ();
+      if (!CheckOverflow ()) {
+         CPU.PC = CPU.PCBase + TargetAddress;
+#ifdef VAR_CYCLES
+         CPU.Cycles += ONE_CYCLE;
+#else
+#ifndef SA1_OPCODES
+         CPU.Cycles++;
+#endif
+#endif
+         CPUShutdown ();
+      }
+      return;
+   case 0x70: // BVS
+      BranchCheck0 ();
+      if (CheckOverflow ()) {
+         CPU.PC = CPU.PCBase + TargetAddress;
+#ifdef VAR_CYCLES
+         CPU.Cycles += ONE_CYCLE;
+#else
+#ifndef SA1_OPCODES
+         CPU.Cycles++;
+#endif
+#endif
+         CPUShutdown ();
+      }
+      return;
+   case 0x80: // BRA
+      CPU.PC = CPU.PCBase + TargetAddress;
+#ifdef VAR_CYCLES
+      CPU.Cycles += ONE_CYCLE;
+#else
+#ifndef SA1_OPCODES
+      CPU.Cycles++;
+#endif
+#endif
+      CPUShutdown ();
+      return;
+   case 0x90: // BCC
+      BranchCheck0 ();
+      if (!CheckCarry ()) {
+         CPU.PC = CPU.PCBase + TargetAddress;
+#ifdef VAR_CYCLES
+         CPU.Cycles += ONE_CYCLE;
+#else
+#ifndef SA1_OPCODES
+         CPU.Cycles++;
+#endif
+#endif
+         CPUShutdown ();
+      }
+      return;
+   case 0xB0: // BCS
+      BranchCheck0 ();
+      if (CheckCarry ()) {
+         CPU.PC = CPU.PCBase + TargetAddress;
+#ifdef VAR_CYCLES
+         CPU.Cycles += ONE_CYCLE;
+#else
+#ifndef SA1_OPCODES
+         CPU.Cycles++;
+#endif
+#endif
+         CPUShutdown ();
+      }
+      return;
+   case 0xD0: // BNE
+      BranchCheck1 ();
+      if (!CheckZero ()) {
+         CPU.PC = CPU.PCBase + TargetAddress;
+#ifdef VAR_CYCLES
+         CPU.Cycles += ONE_CYCLE;
+#else
+#ifndef SA1_OPCODES
+         CPU.Cycles++;
+#endif
+#endif
+         CPUShutdown ();
+      }
+      return;
+   case 0xF0: // BEQ
+      BranchCheck2 ();
+      if (CheckZero ()) {
+         CPU.PC = CPU.PCBase + TargetAddress;
+#ifdef VAR_CYCLES
+         CPU.Cycles += ONE_CYCLE;
+#else
+#ifndef SA1_OPCODES
+         CPU.Cycles++;
+#endif
+#endif
+         CPUShutdown ();
+      }
+      return;
+   }
+#endif
 }
 
 /*****************************************************************************/
-- 
cgit v1.2.3


From d59c856fbf576daa91fa4a8bade38d97b4edbbe4 Mon Sep 17 00:00:00 2001
From: João Silva
Date: Sat, 14 Jan 2017 21:09:57 +0000
Subject: Moved copyright information to copyright file.

---
 source/cpuops.c | 91 +--------------------------------------------------------
 1 file changed, 1 insertion(+), 90 deletions(-)

(limited to 'source/cpuops.c')

diff --git a/source/cpuops.c b/source/cpuops.c
index 977f97e..093007c 100644
--- a/source/cpuops.c
+++ b/source/cpuops.c
@@ -1,93 +1,4 @@
-/*******************************************************************************
-  Snes9x - Portable Super Nintendo Entertainment System (TM) emulator.
-
-  (c) Copyright 1996 - 2002 Gary Henderson (gary.henderson@ntlworld.com) and
-                            Jerremy Koot (jkoot@snes9x.com)
-
-  (c) Copyright 2001 - 2004 John Weidman (jweidman@slip.net)
-
-  (c) Copyright 2002 - 2004 Brad Jorsch (anomie@users.sourceforge.net),
-                            funkyass (funkyass@spam.shaw.ca),
-                            Joel Yliluoma (http://iki.fi/bisqwit/)
-                            Kris Bleakley (codeviolation@hotmail.com),
-                            Matthew Kendora,
-                            Nach (n-a-c-h@users.sourceforge.net),
-                            Peter Bortas (peter@bortas.org) and
-                            zones (kasumitokoduck@yahoo.com)
-
-  C4 x86 assembler and some C emulation code
-  (c) Copyright 2000 - 2003 zsKnight (zsknight@zsnes.com),
-                            _Demo_ (_demo_@zsnes.com), and Nach
-
-  C4 C++ code
-  (c) Copyright 2003 Brad Jorsch
-
-  DSP-1 emulator code
-  (c) Copyright 1998 - 2004 Ivar (ivar@snes9x.com), _Demo_, Gary Henderson,
-                            John Weidman, neviksti (neviksti@hotmail.com),
-                            Kris Bleakley, Andreas Naive
-
-  DSP-2 emulator code
-  (c) Copyright 2003 Kris Bleakley, John Weidman, neviksti, Matthew Kendora, and
-                     Lord Nightmare (lord_nightmare@users.sourceforge.net
-
-  OBC1 emulator code
-  (c) Copyright 2001 - 2004 zsKnight, pagefault (pagefault@zsnes.com) and
-                            Kris Bleakley
-  Ported from x86 assembler to C by sanmaiwashi
-
-  SPC7110 and RTC C++ emulator code
-  (c) Copyright 2002 Matthew Kendora with research by
-                     zsKnight, John Weidman, and Dark Force
-
-  S-DD1 C emulator code
-  (c) Copyright 2003 Brad Jorsch with research by
-                     Andreas Naive and John Weidman
-
-  S-RTC C emulator code
-  (c) Copyright 2001 John Weidman
-
-  ST010 C++ emulator code
-  (c) Copyright 2003 Feather, Kris Bleakley, John Weidman and Matthew Kendora
-
-  Super FX x86 assembler emulator code
-  (c) Copyright 1998 - 2003 zsKnight, _Demo_, and pagefault
-
-  Super FX C emulator code
-  (c) Copyright 1997 - 1999 Ivar, Gary Henderson and John Weidman
-
-
-  SH assembler code partly based on x86 assembler code
-  (c) Copyright 2002 - 2004 Marcus Comstedt (marcus@mc.pp.se)
-
-  (c) Copyright 2014 - 2016 Daniel De Matteis. (UNDER NO CIRCUMSTANCE 
-  WILL COMMERCIAL RIGHTS EVER BE APPROPRIATED TO ANY PARTY)
-
-  Specific ports contains the works of other authors. See headers in
-  individual files.
-
-  Snes9x homepage: http://www.snes9x.com
-
-  Permission to use, copy, modify and distribute Snes9x in both binary and
-  source form, for non-commercial purposes, is hereby granted without fee,
-  providing that this license information and copyright notice appear with
-  all copies and any derived work.
-
-  This software is provided 'as-is', without any express or implied
-  warranty. In no event shall the authors be held liable for any damages
-  arising from the use of this software.
-
-  Snes9x is freeware for PERSONAL USE only. Commercial users should
-  seek permission of the copyright holders first. Commercial use includes
-  charging money for Snes9x or software derived from Snes9x.
-
-  The copyright holders request that bug fixes and improvements to the code
-  should be forwarded to them so everyone can benefit from the modifications
-  in future versions.
-
-  Super NES and Super Nintendo Entertainment System are trademarks of
-  Nintendo Co., Limited and its subsidiary companies.
-*******************************************************************************/
+#include "../copyright"
 
 /*****************************************************************************/
 /* CPU-S9xOpcodes.CPP                                                                            */
-- 
cgit v1.2.3


From 3b8323853f4eeddb61398e77c51bb2349f430227 Mon Sep 17 00:00:00 2001
From: João Silva
Date: Sat, 14 Jan 2017 23:08:50 +0000
Subject: Removed a LOT of useless stuff.

---
 source/cpuops.c | 198 +-------------------------------------------------------
 1 file changed, 1 insertion(+), 197 deletions(-)

(limited to 'source/cpuops.c')

diff --git a/source/cpuops.c b/source/cpuops.c
index 093007c..302a17f 100644
--- a/source/cpuops.c
+++ b/source/cpuops.c
@@ -58,10 +58,6 @@ static void Op75M1(void)
    DirectIndexedX(READ, ADC8);
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-   //    if (ICPU.Registers.DL != 0)
-   // CPU.Cycles += TWO_CYCLES;
-   //    else
-   // CPU.Cycles += ONE_CYCLE;
 #endif
 }
 
@@ -70,10 +66,6 @@ static void Op75M0(void)
    DirectIndexedX(READ, ADC16);
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-   //    if (ICPU.Registers.DL != 0)
-   // CPU.Cycles += TWO_CYCLES;
-   //    else
-   // CPU.Cycles += ONE_CYCLE;
 #endif
 }
 
@@ -316,10 +308,6 @@ static void Op35M1(void)
    DirectIndexedX(READ, AND8);
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-   //    if (ICPU.Registers.DL != 0)
-   // CPU.Cycles += TWO_CYCLES;
-   //    else
-   // CPU.Cycles += ONE_CYCLE;
 #endif
 }
 
@@ -328,10 +316,6 @@ static void Op35M0(void)
    DirectIndexedX(READ, AND16);
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-   //    if (ICPU.Registers.DL != 0)
-   // CPU.Cycles += TWO_CYCLES;
-   //    else
-   // CPU.Cycles += ONE_CYCLE;
 #endif
 }
 
@@ -647,10 +631,6 @@ static void Op34M1(void)
    DirectIndexedX(READ, BIT8);
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-   //    if (ICPU.Registers.DL != 0)
-   // CPU.Cycles += TWO_CYCLES;
-   //    else
-   // CPU.Cycles += ONE_CYCLE;
 #endif
 }
 
@@ -659,10 +639,6 @@ static void Op34M0(void)
    DirectIndexedX(READ, BIT16);
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-   //    if (ICPU.Registers.DL != 0)
-   // CPU.Cycles += TWO_CYCLES;
-   //    else
-   // CPU.Cycles += ONE_CYCLE;
 #endif
 }
 
@@ -748,10 +724,6 @@ static void OpD5M1(void)
    DirectIndexedX(READ, CMP8);
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-   //    if (ICPU.Registers.DL != 0)
-   // CPU.Cycles += TWO_CYCLES;
-   //    else
-   // CPU.Cycles += ONE_CYCLE;
 #endif
 }
 
@@ -760,10 +732,6 @@ static void OpD5M0(void)
    DirectIndexedX(READ, CMP16);
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-   //    if (ICPU.Registers.DL != 0)
-   // CPU.Cycles += TWO_CYCLES;
-   //    else
-   // CPU.Cycles += ONE_CYCLE;
 #endif
 }
 
@@ -1117,10 +1085,6 @@ static void OpD6M1(void)
    DirectIndexedX(MODIFY, DEC8);
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeed + ONE_CYCLE /* memory */ + ONE_CYCLE /* opcode */;
-   //    if (ICPU.Registers.DL != 0)
-   // CPU.Cycles += TWO_CYCLES;
-   //    else
-   // CPU.Cycles += ONE_CYCLE;
 #endif
 }
 
@@ -1129,10 +1093,6 @@ static void OpD6M0(void)
    DirectIndexedX(MODIFY, DEC16);
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeed + ONE_CYCLE /* memory */ + ONE_CYCLE /* opcode */;
-   //    if (ICPU.Registers.DL != 0)
-   // CPU.Cycles += TWO_CYCLES;
-   //    else
-   // CPU.Cycles += ONE_CYCLE;
 #endif
 }
 
@@ -1215,10 +1175,6 @@ static void Op55M1(void)
    DirectIndexedX(READ, EOR8);
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-   //    if (ICPU.Registers.DL != 0)
-   // CPU.Cycles += TWO_CYCLES;
-   //    else
-   // CPU.Cycles += ONE_CYCLE;
 #endif
 }
 
@@ -1227,10 +1183,6 @@ static void Op55M0(void)
    DirectIndexedX(READ, EOR16);
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-   //    if (ICPU.Registers.DL != 0)
-   // CPU.Cycles += TWO_CYCLES;
-   //    else
-   // CPU.Cycles += ONE_CYCLE;
 #endif
 }
 
@@ -1460,10 +1412,6 @@ static void OpF6M1(void)
    DirectIndexedX(MODIFY, INC8);
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeed + ONE_CYCLE /* memory */ + ONE_CYCLE /* opcode */;
-   //    if (ICPU.Registers.DL != 0)
-   // CPU.Cycles += TWO_CYCLES;
-   //    else
-   // CPU.Cycles += ONE_CYCLE;
 #endif
 }
 
@@ -1472,10 +1420,6 @@ static void OpF6M0(void)
    DirectIndexedX(MODIFY, INC16);
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeed + ONE_CYCLE /* memory */ + ONE_CYCLE /* opcode */;
-   //    if (ICPU.Registers.DL != 0)
-   // CPU.Cycles += TWO_CYCLES;
-   //    else
-   // CPU.Cycles += ONE_CYCLE;
 #endif
 }
 
@@ -1558,10 +1502,6 @@ static void OpB5M1(void)
    DirectIndexedX(READ, LDA8);
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-   //    if (ICPU.Registers.DL != 0)
-   // CPU.Cycles += TWO_CYCLES;
-   //    else
-   // CPU.Cycles += ONE_CYCLE;
 #endif
 }
 
@@ -1570,10 +1510,6 @@ static void OpB5M0(void)
    DirectIndexedX(READ, LDA16);
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-   //    if (ICPU.Registers.DL != 0)
-   // CPU.Cycles += TWO_CYCLES;
-   //    else
-   // CPU.Cycles += ONE_CYCLE;
 #endif
 }
 
@@ -1816,10 +1752,6 @@ static void OpB6X1(void)
    DirectIndexedY(READ, LDX8);
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-   //    if (ICPU.Registers.DL != 0)
-   // CPU.Cycles += TWO_CYCLES;
-   //    else
-   // CPU.Cycles += ONE_CYCLE;
 #endif
 }
 
@@ -1828,10 +1760,6 @@ static void OpB6X0(void)
    DirectIndexedY(READ, LDX16);
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-   //    if (ICPU.Registers.DL != 0)
-   // CPU.Cycles += TWO_CYCLES;
-   //    else
-   // CPU.Cycles += ONE_CYCLE;
 #endif
 }
 
@@ -1914,10 +1842,6 @@ static void OpB4X1(void)
    DirectIndexedX(READ, LDY8);
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-   //    if (ICPU.Registers.DL != 0)
-   // CPU.Cycles += TWO_CYCLES;
-   //    else
-   // CPU.Cycles += ONE_CYCLE;
 #endif
 }
 
@@ -1926,10 +1850,6 @@ static void OpB4X0(void)
    DirectIndexedX(READ, LDY16);
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-   //    if (ICPU.Registers.DL != 0)
-   // CPU.Cycles += TWO_CYCLES;
-   //    else
-   // CPU.Cycles += ONE_CYCLE;
 #endif
 }
 
@@ -1998,10 +1918,6 @@ static void Op56M1(void)
    DirectIndexedX(MODIFY, LSR8);
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeed + ONE_CYCLE /* memory */ + ONE_CYCLE /* opcode */;
-   //    if (ICPU.Registers.DL != 0)
-   // CPU.Cycles += TWO_CYCLES;
-   //    else
-   // CPU.Cycles += ONE_CYCLE;
 #endif
 }
 
@@ -2010,10 +1926,6 @@ static void Op56M0(void)
    DirectIndexedX(MODIFY, LSR16);
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeed + ONE_CYCLE /* memory */ + ONE_CYCLE /* opcode */;
-   //    if (ICPU.Registers.DL != 0)
-   // CPU.Cycles += TWO_CYCLES;
-   //    else
-   // CPU.Cycles += ONE_CYCLE;
 #endif
 }
 
@@ -2096,10 +2008,6 @@ static void Op15M1(void)
    DirectIndexedX(READ, ORA8);
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-   //    if (ICPU.Registers.DL != 0)
-   // CPU.Cycles += TWO_CYCLES;
-   //    else
-   // CPU.Cycles += ONE_CYCLE;
 #endif
 }
 
@@ -2108,10 +2016,6 @@ static void Op15M0(void)
    DirectIndexedX(READ, ORA16);
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-   //    if (ICPU.Registers.DL != 0)
-   // CPU.Cycles += TWO_CYCLES;
-   //    else
-   // CPU.Cycles += ONE_CYCLE;
 #endif
 }
 
@@ -2341,10 +2245,6 @@ static void Op36M1(void)
    DirectIndexedX(MODIFY, ROL8);
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeed + ONE_CYCLE /* memory */ + ONE_CYCLE /* opcode */;
-   //    if (ICPU.Registers.DL != 0)
-   // CPU.Cycles += TWO_CYCLES;
-   //    else
-   // CPU.Cycles += ONE_CYCLE;
 #endif
 }
 
@@ -2353,10 +2253,6 @@ static void Op36M0(void)
    DirectIndexedX(MODIFY, ROL16);
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeed + ONE_CYCLE /* memory */ + ONE_CYCLE /* opcode */;
-   //    if (ICPU.Registers.DL != 0)
-   // CPU.Cycles += TWO_CYCLES;
-   //    else
-   // CPU.Cycles += ONE_CYCLE;
 #endif
 }
 
@@ -2425,10 +2321,6 @@ static void Op76M1(void)
    DirectIndexedX(MODIFY, ROR8);
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeed + ONE_CYCLE /* memory */ + ONE_CYCLE /* opcode */;
-   //    if (ICPU.Registers.DL != 0)
-   // CPU.Cycles += TWO_CYCLES;
-   //    else
-   // CPU.Cycles += ONE_CYCLE;
 #endif
 }
 
@@ -2437,10 +2329,6 @@ static void Op76M0(void)
    DirectIndexedX(MODIFY, ROR16);
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeed + ONE_CYCLE /* memory */ + ONE_CYCLE /* opcode */;
-   //    if (ICPU.Registers.DL != 0)
-   // CPU.Cycles += TWO_CYCLES;
-   //    else
-   // CPU.Cycles += ONE_CYCLE;
 #endif
 }
 
@@ -2509,10 +2397,6 @@ static void OpF5M1(void)
    DirectIndexedX(READ, SBC8);
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-   //    if (ICPU.Registers.DL != 0)
-   // CPU.Cycles += TWO_CYCLES;
-   //    else
-   // CPU.Cycles += ONE_CYCLE;
 #endif
 }
 
@@ -2521,10 +2405,6 @@ static void OpF5M0(void)
    DirectIndexedX(READ, SBC16);
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-   //    if (ICPU.Registers.DL != 0)
-   // CPU.Cycles += TWO_CYCLES;
-   //    else
-   // CPU.Cycles += ONE_CYCLE;
 #endif
 }
 
@@ -2743,10 +2623,6 @@ static void Op95M1(void)
    DirectIndexedX(WRITE, STA8);
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-   //    if (ICPU.Registers.DL != 0)
-   // CPU.Cycles += TWO_CYCLES;
-   //    else
-   // CPU.Cycles += ONE_CYCLE;
 #endif
 }
 
@@ -2755,10 +2631,6 @@ static void Op95M0(void)
    DirectIndexedX(WRITE, STA16);
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-   //    if (ICPU.Registers.DL != 0)
-   // CPU.Cycles += TWO_CYCLES;
-   //    else
-   // CPU.Cycles += ONE_CYCLE;
 #endif
 }
 
@@ -2985,10 +2857,6 @@ static void Op96X1(void)
    DirectIndexedY(WRITE, STX8);
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-   //    if (ICPU.Registers.DL != 0)
-   // CPU.Cycles += TWO_CYCLES;
-   //    else
-   // CPU.Cycles += ONE_CYCLE;
 #endif
 }
 
@@ -2997,10 +2865,6 @@ static void Op96X0(void)
    DirectIndexedY(WRITE, STX16);
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-   //    if (ICPU.Registers.DL != 0)
-   // CPU.Cycles += TWO_CYCLES;
-   //    else
-   // CPU.Cycles += ONE_CYCLE;
 #endif
 }
 
@@ -3043,10 +2907,6 @@ static void Op94X1(void)
    DirectIndexedX(WRITE, STY8);
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-   //    if (ICPU.Registers.DL != 0)
-   // CPU.Cycles += TWO_CYCLES;
-   //    else
-   // CPU.Cycles += ONE_CYCLE;
 #endif
 }
 
@@ -3055,10 +2915,6 @@ static void Op94X0(void)
    DirectIndexedX(WRITE, STY16);
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-   //    if (ICPU.Registers.DL != 0)
-   // CPU.Cycles += TWO_CYCLES;
-   //    else
-   // CPU.Cycles += ONE_CYCLE;
 #endif
 }
 
@@ -3101,10 +2957,6 @@ static void Op74M1(void)
    DirectIndexedX(WRITE, STZ8);
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-   //    if (ICPU.Registers.DL != 0)
-   // CPU.Cycles += TWO_CYCLES;
-   //    else
-   // CPU.Cycles += ONE_CYCLE;
 #endif
 }
 
@@ -3113,10 +2965,6 @@ static void Op74M0(void)
    DirectIndexedX(WRITE, STZ16);
 #ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
-   //    if (ICPU.Registers.DL != 0)
-   // CPU.Cycles += TWO_CYCLES;
-   //    else
-   // CPU.Cycles += ONE_CYCLE;
 #endif
 }
 
@@ -3294,8 +3142,6 @@ static inline void CPUShutdown()
             !(CPU.Flags & (IRQ_PENDING_FLAG | NMI_FLAG)))
       {
          CPU.WaitAddress = NULL;
-         if (Settings.SA1)
-            S9xSA1ExecuteDuringSleep();
 #ifndef USE_BLARGG_APU
          CPU.Cycles = CPU.NextEvent;
          if (IAPU.APUExecuting)
@@ -3341,8 +3187,6 @@ static inline void ForceShutdown()
 #ifdef CPU_SHUTDOWN
 #ifndef SA1_OPCODES
    CPU.WaitAddress = NULL;
-   if (Settings.SA1)
-      S9xSA1ExecuteDuringSleep ();
    CPU.Cycles = CPU.NextEvent;
    if (IAPU.APUExecuting)
    {
@@ -3683,10 +3527,7 @@ static void OpEA(void)
 /**********************************************************************************************/
 
 /* PUSH Instructions ************************************************************************* */
-/* #define PushW(w) \
- *    S9xSetWord (w, ICPU.Registers.S.W - 1);\
- *    ICPU.Registers.S.W -= 2;
- */
+
 #define PushB(b)\
     S9xSetByte (b, ICPU.Registers.S.W--);
 
@@ -3919,10 +3760,6 @@ static void Op5AX0(void)
    w = S9xGetByte (++ICPU.Registers.S.W); \
    w |= (S9xGetByte (++ICPU.Registers.S.W)<<8);
 
-/* w = S9xGetWord (ICPU.Registers.S.W + 1); \
-   ICPU.Registers.S.W += 2;
-*/
-
 #define PullB(b)\
    b = S9xGetByte (++ICPU.Registers.S.W);
 
@@ -4027,7 +3864,6 @@ static void Op28E1(void)
       ICPU.Registers.YH = 0;
    }
    S9xFixCycles();
-   /*     CHECK_FOR_IRQ();*/
 }
 
 static void Op28(void)
@@ -4044,7 +3880,6 @@ static void Op28(void)
       ICPU.Registers.YH = 0;
    }
    S9xFixCycles();
-   /*     CHECK_FOR_IRQ();*/
 }
 
 //PLX
@@ -4802,7 +4637,6 @@ static void OpC2(void)
       ICPU.Registers.YH = 0;
    }
    S9xFixCycles();
-   /*    CHECK_FOR_IRQ(); */
 }
 
 static void OpE2(void)
@@ -4871,7 +4705,6 @@ static void Op40(void)
    CPU.Cycles += TWO_CYCLES;
 #endif
    S9xFixCycles();
-   /*    CHECK_FOR_IRQ(); */
 }
 
 /**********************************************************************************************/
@@ -4880,39 +4713,10 @@ static void Op40(void)
 // WAI
 static void OpCB(void)
 {
-
-   // Ok, let's just C-ify the ASM versions separately.
 #ifdef SA1_OPCODES
    SA1.WaitingForInterrupt = true;
    SA1.PC--;
-#if 0
-   // XXX: FIXME
-   if (Settings.Shutdown)
-   {
-      SA1.Cycles = SA1.NextEvent;
-      if (IAPU.APUExecuting)
-      {
-         SA1.Executing = false;
-         do
-         {
-            APU_EXECUTE1(,
-         }
-         while (APU.Cycles < SA1.NextEvent,         SA1.Executing = true;
-      }
-}
-#endif
 #else // SA1_OPCODES
-#if 0
-
-
-   if (CPU.IRQActive)
-   {
-#ifndef SA1_OPCODES
-      CPU.Cycles += TWO_CYCLES;
-#endif
-   }
-   else
-#endif
    {
       CPU.WaitingForInterrupt = true;
       CPU.PC--;
-- 
cgit v1.2.3


From f1ca19db63461fd36a5739b0b7bd172185811d50 Mon Sep 17 00:00:00 2001
From: João Silva
Date: Sun, 15 Jan 2017 01:56:01 +0000
Subject: Fixed build with Blargg's APU.

---
 source/cpuops.c | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'source/cpuops.c')

diff --git a/source/cpuops.c b/source/cpuops.c
index 302a17f..c640763 100644
--- a/source/cpuops.c
+++ b/source/cpuops.c
@@ -3187,6 +3187,7 @@ static inline void ForceShutdown()
 #ifdef CPU_SHUTDOWN
 #ifndef SA1_OPCODES
    CPU.WaitAddress = NULL;
+#ifndef USE_BLARGG_APU
    CPU.Cycles = CPU.NextEvent;
    if (IAPU.APUExecuting)
    {
@@ -3197,6 +3198,7 @@ static inline void ForceShutdown()
       } while (APU.Cycles < CPU.NextEvent);
       ICPU.CPUExecuting = true;
    }
+#endif
 #else
    SA1.Executing = false;
    SA1.CPUExecuting = false;
-- 
cgit v1.2.3