From 0e59b999fa976de2d00490f552a1ff0a27d40f63 Mon Sep 17 00:00:00 2001 From: João Silva Date: Sun, 29 Jan 2017 04:55:23 +0000 Subject: Converted most types to stdint-style (fixing a few in the process). --- source/getset.h | 197 ++++++++++++-------------------------------------------- 1 file changed, 40 insertions(+), 157 deletions(-) (limited to 'source/getset.h') diff --git a/source/getset.h b/source/getset.h index ebd377a..b0abba5 100644 --- a/source/getset.h +++ b/source/getset.h @@ -15,9 +15,8 @@ extern uint8_t OpenBus; INLINE uint8_t S9xGetByte(uint32_t Address) { - int block; - uint8_t* GetAddress = Memory.Map [block = (Address >> MEMMAP_SHIFT) & - MEMMAP_MASK]; + int32_t block; + uint8_t* GetAddress = Memory.Map [block = (Address >> MEMMAP_SHIFT) & MEMMAP_MASK]; if (!CPU.InDMA) CPU.Cycles += Memory.MemorySpeed [block]; @@ -48,49 +47,26 @@ INLINE uint8_t S9xGetByte(uint32_t Address) //Address&0xFF0000 -bank //bank>>1 | offset = s-ram address, unbound //unbound & SRAMMask = Sram offset - return (*(Memory.SRAM + ((((Address & 0xFF0000) >> 1) | - (Address & 0x7FFF)) &Memory.SRAMMask))); - + return (*(Memory.SRAM + ((((Address & 0xFF0000) >> 1) | (Address & 0x7FFF)) &Memory.SRAMMask))); case MAP_RONLY_SRAM: case MAP_HIROM_SRAM: - return (*(Memory.SRAM + (((Address & 0x7fff) - 0x6000 + - ((Address & 0xf0000) >> 3)) & Memory.SRAMMask))); - + return (*(Memory.SRAM + (((Address & 0x7fff) - 0x6000 + ((Address & 0xf0000) >> 3)) & Memory.SRAMMask))); case MAP_BWRAM: return (*(Memory.BWRAM + ((Address & 0x7fff) - 0x6000))); - case MAP_C4: return (S9xGetC4(Address & 0xffff)); - case MAP_SPC7110_ROM: return S9xGetSPC7110Byte(Address); - case MAP_SPC7110_DRAM: return S9xGetSPC7110(0x4800); - case MAP_OBC_RAM: return GetOBC1(Address & 0xffff); - case MAP_SETA_DSP: return S9xGetSetaDSP(Address); - case MAP_SETA_RISC: return S9xGetST018(Address); - - - case MAP_DEBUG: - return OpenBus; - - default: - case MAP_NONE: -#ifdef MK_TRACE_BAD_READS - char address[20]; - sprintf(address, TEXT("%06X"), Address); - MessageBox(GUI.hWnd, address, TEXT("GetByte"), MB_OK); -#endif - return OpenBus; } } @@ -102,7 +78,7 @@ INLINE uint16_t S9xGetWord(uint32_t Address) OpenBus = S9xGetByte(Address); return (OpenBus | (S9xGetByte(Address + 1) << 8)); } - int block; + int32_t block; uint8_t* GetAddress = Memory.Map [block = (Address >> MEMMAP_SHIFT) & MEMMAP_MASK]; @@ -151,7 +127,6 @@ INLINE uint16_t S9xGetWord(uint32_t Address) &Memory.SRAMMask))) | ((*(Memory.SRAM + (((((Address + 1) & 0xFF0000) >> 1) | (( Address + 1) & 0x7FFF)) &Memory.SRAMMask))) << 8); - case MAP_RONLY_SRAM: case MAP_HIROM_SRAM: /* BJ: no FAST_LSB_WORD_ACCESS here, since if Memory.SRAMMask=0x7ff @@ -162,7 +137,6 @@ INLINE uint16_t S9xGetWord(uint32_t Address) (*(Memory.SRAM + ((((Address + 1) & 0x7fff) - 0x6000 + (((Address + 1) & 0xf0000) >> 3)) & Memory.SRAMMask)) << 8)); - case MAP_BWRAM: #ifdef FAST_LSB_WORD_ACCESS return (*(uint16_t*)(Memory.BWRAM + ((Address & 0x7fff) - 0x6000))); @@ -170,11 +144,9 @@ INLINE uint16_t S9xGetWord(uint32_t Address) return (*(Memory.BWRAM + ((Address & 0x7fff) - 0x6000)) | (*(Memory.BWRAM + (((Address + 1) & 0x7fff) - 0x6000)) << 8)); #endif - case MAP_C4: return (S9xGetC4(Address & 0xffff) | (S9xGetC4((Address + 1) & 0xffff) << 8)); - case MAP_SPC7110_ROM: return (S9xGetSPC7110Byte(Address) | (S9xGetSPC7110Byte(Address + 1)) << 8); @@ -183,24 +155,11 @@ INLINE uint16_t S9xGetWord(uint32_t Address) (S9xGetSPC7110(0x4800) << 8)); case MAP_OBC_RAM: return GetOBC1(Address & 0xFFFF) | (GetOBC1((Address + 1) & 0xFFFF) << 8); - case MAP_SETA_DSP: return S9xGetSetaDSP(Address) | (S9xGetSetaDSP((Address + 1)) << 8); - case MAP_SETA_RISC: return S9xGetST018(Address) | (S9xGetST018((Address + 1)) << 8); - - case MAP_DEBUG: - return (OpenBus | (OpenBus << 8)); - default: - case MAP_NONE: -#ifdef MK_TRACE_BAD_READS - char address[20]; - sprintf(address, TEXT("%06X"), Address); - MessageBox(GUI.hWnd, address, TEXT("GetWord"), MB_OK); -#endif - return (OpenBus | (OpenBus << 8)); } } @@ -210,7 +169,7 @@ INLINE void S9xSetByte(uint8_t Byte, uint32_t Address) #if defined(CPU_SHUTDOWN) CPU.WaitAddress = NULL; #endif - int block; + int32_t block; uint8_t* SetAddress = Memory.WriteMap [block = ((Address >> MEMMAP_SHIFT) & MEMMAP_MASK)]; @@ -240,18 +199,15 @@ INLINE void S9xSetByte(uint8_t Byte, uint32_t Address) case MAP_PPU: S9xSetPPU(Byte, Address & 0xffff); return; - case MAP_CPU: S9xSetCPU(Byte, Address & 0xffff); return; - case MAP_DSP: #ifdef DSP_DUMMY_LOOPS printf("DSP Byte: %02X to %06X\n", Byte, Address); #endif S9xSetDSP(Byte, Address & 0xffff); return; - case MAP_LOROM_SRAM: if (Memory.SRAMMask) { @@ -260,7 +216,6 @@ INLINE void S9xSetByte(uint8_t Byte, uint32_t Address) CPU.SRAMModified = true; } return; - case MAP_HIROM_SRAM: if (Memory.SRAMMask) { @@ -269,46 +224,31 @@ INLINE void S9xSetByte(uint8_t Byte, uint32_t Address) CPU.SRAMModified = true; } return; - case MAP_BWRAM: *(Memory.BWRAM + ((Address & 0x7fff) - 0x6000)) = Byte; CPU.SRAMModified = true; return; - case MAP_DEBUG: - case MAP_SA1RAM: *(Memory.SRAM + (Address & 0xffff)) = Byte; SA1.Executing = !SA1.Waiting; break; - case MAP_C4: S9xSetC4(Byte, Address & 0xffff); return; - case MAP_SPC7110_DRAM: s7r.bank50[(Address & 0xffff)] = (uint8_t) Byte; break; - case MAP_OBC_RAM: SetOBC1(Byte, Address & 0xFFFF); return; - case MAP_SETA_DSP: S9xSetSetaDSP(Byte, Address); return; - case MAP_SETA_RISC: S9xSetST018(Byte, Address); return; default: - case MAP_NONE: -#ifdef MK_TRACE_BAD_WRITES - char address[20]; - sprintf(address, TEXT("%06X"), Address); - MessageBox(GUI.hWnd, address, TEXT("SetByte"), MB_OK); -#endif - return; } } @@ -325,7 +265,7 @@ INLINE void S9xSetWord(uint16_t Word, uint32_t Address) #if defined(CPU_SHUTDOWN) CPU.WaitAddress = NULL; #endif - int block; + int32_t block; uint8_t* SetAddress = Memory.WriteMap [block = ((Address >> MEMMAP_SHIFT) & MEMMAP_MASK)]; @@ -366,12 +306,10 @@ INLINE void S9xSetWord(uint16_t Word, uint32_t Address) S9xSetPPU((uint8_t) Word, Address & 0xffff); S9xSetPPU(Word >> 8, (Address & 0xffff) + 1); return; - case MAP_CPU: S9xSetCPU((uint8_t) Word, (Address & 0xffff)); S9xSetCPU(Word >> 8, (Address & 0xffff) + 1); return; - case MAP_DSP: #ifdef DSP_DUMMY_LOOPS printf("DSP Word: %04X to %06X\n", Word, Address); @@ -379,7 +317,6 @@ INLINE void S9xSetWord(uint16_t Word, uint32_t Address) S9xSetDSP((uint8_t) Word, (Address & 0xffff)); S9xSetDSP(Word >> 8, (Address & 0xffff) + 1); return; - case MAP_LOROM_SRAM: if (Memory.SRAMMask) { @@ -393,7 +330,6 @@ INLINE void S9xSetWord(uint16_t Word, uint32_t Address) CPU.SRAMModified = true; } return; - case MAP_HIROM_SRAM: if (Memory.SRAMMask) { @@ -408,7 +344,6 @@ INLINE void S9xSetWord(uint16_t Word, uint32_t Address) CPU.SRAMModified = true; } return; - case MAP_BWRAM: #ifdef FAST_LSB_WORD_ACCESS *(uint16_t*)(Memory.BWRAM + ((Address & 0x7fff) - 0x6000)) = Word; @@ -418,9 +353,7 @@ INLINE void S9xSetWord(uint16_t Word, uint32_t Address) #endif CPU.SRAMModified = true; return; - case MAP_DEBUG: - case MAP_SPC7110_DRAM: s7r.bank50[(Address & 0xffff)] = (uint8_t) Word; s7r.bank50[((Address + 1) & 0xffff)] = (uint8_t) Word; @@ -430,35 +363,23 @@ INLINE void S9xSetWord(uint16_t Word, uint32_t Address) *(Memory.SRAM + ((Address + 1) & 0xffff)) = (uint8_t)(Word >> 8); SA1.Executing = !SA1.Waiting; break; - case MAP_C4: S9xSetC4(Word & 0xff, Address & 0xffff); S9xSetC4((uint8_t)(Word >> 8), (Address + 1) & 0xffff); return; - case MAP_OBC_RAM: SetOBC1(Word & 0xff, Address & 0xFFFF); SetOBC1((uint8_t)(Word >> 8), (Address + 1) & 0xffff); return; - case MAP_SETA_DSP: S9xSetSetaDSP(Word & 0xff, Address); S9xSetSetaDSP((uint8_t)(Word >> 8), (Address + 1)); return; - case MAP_SETA_RISC: S9xSetST018(Word & 0xff, Address); S9xSetST018((uint8_t)(Word >> 8), (Address + 1)); return; - default: - case MAP_NONE: -#ifdef MK_TRACE_BAD_WRITES - char address[20]; - sprintf(address, TEXT("%06X"), Address); - MessageBox(GUI.hWnd, address, TEXT("SetWord"), MB_OK); -#endif - return; } } @@ -473,9 +394,7 @@ INLINE uint8_t* GetBasePointer(uint32_t Address) switch ((intptr_t) GetAddress) { case MAP_SPC7110_DRAM: - { return s7r.bank50; - } case MAP_SPC7110_ROM: return Get7110BasePtr(Address); case MAP_PPU: //just a guess, but it looks like this should match the CPU as a source. @@ -495,16 +414,7 @@ INLINE uint8_t* GetBasePointer(uint32_t Address) return (Memory.C4RAM - 0x6000); case MAP_SETA_DSP: return Memory.SRAM; - case MAP_DEBUG: - default: - case MAP_NONE: -#if defined(MK_TRACE_BAD_READS) || defined(MK_TRACE_BAD_WRITES) - char fsd[12]; - sprintf(fsd, TEXT("%06X"), Address); - MessageBox(GUI.hWnd, fsd, TEXT("Rogue DMA"), MB_OK); -#endif - return (0); } } @@ -541,80 +451,53 @@ INLINE uint8_t* S9xGetMemPointer(uint32_t Address) return GetMemPointerOBC1(Address); case MAP_SETA_DSP: return Memory.SRAM + ((Address & 0xffff) & Memory.SRAMMask); - case MAP_DEBUG: default: - case MAP_NONE: -#if defined(MK_TRACE_BAD_READS) || defined(MK_TRACE_BAD_WRITES) - char fsd[12]; - sprintf(fsd, TEXT("%06X"), Address); - MessageBox(GUI.hWnd, fsd, TEXT("Rogue DMA"), MB_OK); -#endif - return (0); } } INLINE void S9xSetPCBase(uint32_t Address) { - int block; - uint8_t* GetAddress = Memory.Map [block = (Address >> MEMMAP_SHIFT) & - MEMMAP_MASK]; - + int32_t block; + uint8_t* GetAddress = Memory.Map [block = (Address >> MEMMAP_SHIFT) & MEMMAP_MASK]; CPU.MemSpeed = Memory.MemorySpeed [block]; CPU.MemSpeedx2 = CPU.MemSpeed << 1; if (GetAddress >= (uint8_t*) MAP_LAST) - { CPU.PCBase = GetAddress; - CPU.PC = GetAddress + (Address & 0xffff); - return; - } - - switch ((intptr_t) GetAddress) + else { - case MAP_PPU: - CPU.PCBase = Memory.FillRAM; - CPU.PC = CPU.PCBase + (Address & 0xffff); - return; - - case MAP_CPU: - CPU.PCBase = Memory.FillRAM; - CPU.PC = CPU.PCBase + (Address & 0xffff); - return; - - case MAP_DSP: - CPU.PCBase = Memory.FillRAM - 0x6000; - CPU.PC = CPU.PCBase + (Address & 0xffff); - return; - - case MAP_SA1RAM: - case MAP_LOROM_SRAM: - CPU.PCBase = Memory.SRAM; - CPU.PC = CPU.PCBase + (Address & 0xffff); - return; - - case MAP_BWRAM: - CPU.PCBase = Memory.BWRAM - 0x6000; - CPU.PC = CPU.PCBase + (Address & 0xffff); - return; - case MAP_HIROM_SRAM: - CPU.PCBase = Memory.SRAM - 0x6000; - CPU.PC = CPU.PCBase + (Address & 0xffff); - return; - - case MAP_C4: - CPU.PCBase = Memory.C4RAM - 0x6000; - CPU.PC = CPU.PCBase + (Address & 0xffff); - return; - - case MAP_DEBUG: - - default: - case MAP_NONE: - CPU.PCBase = Memory.SRAM; - CPU.PC = Memory.SRAM + (Address & 0xffff); - return; + switch ((intptr_t) GetAddress) + { + case MAP_PPU: + CPU.PCBase = Memory.FillRAM; + break; + case MAP_CPU: + CPU.PCBase = Memory.FillRAM; + break; + case MAP_DSP: + CPU.PCBase = Memory.FillRAM - 0x6000; + break; + case MAP_SA1RAM: + case MAP_LOROM_SRAM: + CPU.PCBase = Memory.SRAM; + break; + case MAP_BWRAM: + CPU.PCBase = Memory.BWRAM - 0x6000; + break; + case MAP_HIROM_SRAM: + CPU.PCBase = Memory.SRAM - 0x6000; + break; + case MAP_C4: + CPU.PCBase = Memory.C4RAM - 0x6000; + break; + default: + CPU.PCBase = Memory.SRAM; + break; + } } + + CPU.PC = CPU.PCBase + (Address & 0xffff); } #endif -- cgit v1.2.3