From e5869adc4469115c7eac9abf70145fc178e017de Mon Sep 17 00:00:00 2001
From: Nebuleon Fumika
Date: Wed, 26 Dec 2012 14:42:02 -0500
Subject: Merge Registers structures into their respective CPUs to avoid
 additional memory addresses being loaded every opcode.

---
 source/sa1.cpp | 26 +++++++++++++-------------
 1 file changed, 13 insertions(+), 13 deletions(-)

(limited to 'source/sa1.cpp')

diff --git a/source/sa1.cpp b/source/sa1.cpp
index eb10d33..1f6b13f 100644
--- a/source/sa1.cpp
+++ b/source/sa1.cpp
@@ -122,16 +122,16 @@ void S9xSA1Init ()
 
 void S9xSA1Reset ()
 {
-    SA1Registers.PB = 0;
-    SA1Registers.PC = Memory.FillRAM [0x2203] |
+    SA1.Registers.PB = 0;
+    SA1.Registers.PC = Memory.FillRAM [0x2203] |
 		      (Memory.FillRAM [0x2204] << 8);
-    SA1Registers.D.W = 0;
-    SA1Registers.DB = 0;
-    SA1Registers.SH = 1;
-    SA1Registers.SL = 0xFF;
-    SA1Registers.XH = 0;
-    SA1Registers.YH = 0;
-    SA1Registers.P.W = 0;
+    SA1.Registers.D.W = 0;
+    SA1.Registers.DB = 0;
+    SA1.Registers.SH = 1;
+    SA1.Registers.SL = 0xFF;
+    SA1.Registers.XH = 0;
+    SA1.Registers.YH = 0;
+    SA1.Registers.P.W = 0;
 
     SA1.ShiftedPB = 0;
     SA1.ShiftedDB = 0;
@@ -141,7 +141,7 @@ void S9xSA1Reset ()
     SA1.WaitingForInterrupt = FALSE;
     SA1.PC = NULL;
     SA1.PCBase = NULL;
-    S9xSA1SetPCBase (SA1Registers.PC);
+    S9xSA1SetPCBase (SA1.Registers.PC);
     SA1.S9xOpcodes = S9xSA1OpcodesM1X1;
 
     S9xSA1UnpackStatus();
@@ -181,10 +181,10 @@ void S9xSA1SetBWRAMMemMap (uint8 val)
 
 void S9xFixSA1AfterSnapshotLoad ()
 {
-    SA1.ShiftedPB = (uint32) SA1Registers.PB << 16;
-    SA1.ShiftedDB = (uint32) SA1Registers.DB << 16;
+    SA1.ShiftedPB = (uint32) SA1.Registers.PB << 16;
+    SA1.ShiftedDB = (uint32) SA1.Registers.DB << 16;
 
-    S9xSA1SetPCBase (SA1.ShiftedPB + SA1Registers.PC);
+    S9xSA1SetPCBase (SA1.ShiftedPB + SA1.Registers.PC);
     S9xSA1UnpackStatus ();
     S9xSA1FixCycles ();
     SA1.VirtualBitmapFormat = (Memory.FillRAM [0x223f] & 0x80) ? 2 : 4;
-- 
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