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| author | notaz | 2011-06-22 16:02:04 +0300 |
|---|---|---|
| committer | notaz | 2011-07-08 00:15:07 +0300 |
| commit | 0c1fe38bf0d4077fb38ee1d1f42ec819b17a0be0 (patch) | |
| tree | 1d6be2e94e59b69168bf8c5c6a7fc4fe49805dc8 | |
| parent | b7217e13a765d299feaac0f7646880e53039d9e2 (diff) | |
| download | pcsx_rearmed-0c1fe38bf0d4077fb38ee1d1f42ec819b17a0be0.tar.gz pcsx_rearmed-0c1fe38bf0d4077fb38ee1d1f42ec819b17a0be0.tar.bz2 pcsx_rearmed-0c1fe38bf0d4077fb38ee1d1f42ec819b17a0be0.zip | |
drc: merge Ari64's patch: 04_constant_address_pagefaults
causes problems in PCSX, so ifdefed out but left there to reduce drift
from Ari64's version.
| -rw-r--r-- | libpcsxcore/new_dynarec/assem_arm.c | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/libpcsxcore/new_dynarec/assem_arm.c b/libpcsxcore/new_dynarec/assem_arm.c index 55eef84..dd4b070 100644 --- a/libpcsxcore/new_dynarec/assem_arm.c +++ b/libpcsxcore/new_dynarec/assem_arm.c @@ -2739,6 +2739,18 @@ inline_readstub(int type, int i, u_int addr, signed char regmap[], int target, i emit_writeword(rs,(int)&address); //emit_pusha(); save_regs(reglist); +#ifndef PCSX + if((signed int)addr>=(signed int)0xC0000000) { + // Theoretically we can have a pagefault here, if the TLB has never + // been enabled and the address is outside the range 80000000..BFFFFFFF + // Write out the registers so the pagefault can be handled. This is + // a very rare case and likely represents a bug. + int ds=regmap!=regs[i].regmap; + if(!ds) load_all_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty,i); + if(!ds) wb_dirtys(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty); + else wb_dirtys(branch_regs[i-1].regmap_entry,branch_regs[i-1].was32,branch_regs[i-1].wasdirty); + } +#endif //emit_shrimm(rs,16,1); int cc=get_reg(regmap,CCREG); if(cc<0) { @@ -2929,6 +2941,19 @@ inline_writestub(int type, int i, u_int addr, signed char regmap[], int target, } //emit_pusha(); save_regs(reglist); +#ifndef PCSX + // rearmed note: load_all_consts prevents BIOS boot, some bug? + if((signed int)addr>=(signed int)0xC0000000) { + // Theoretically we can have a pagefault here, if the TLB has never + // been enabled and the address is outside the range 80000000..BFFFFFFF + // Write out the registers so the pagefault can be handled. This is + // a very rare case and likely represents a bug. + int ds=regmap!=regs[i].regmap; + if(!ds) load_all_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty,i); + if(!ds) wb_dirtys(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty); + else wb_dirtys(branch_regs[i-1].regmap_entry,branch_regs[i-1].was32,branch_regs[i-1].wasdirty); + } +#endif //emit_shrimm(rs,16,1); int cc=get_reg(regmap,CCREG); if(cc<0) { |