aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authornotaz2011-01-03 00:09:30 +0200
committernotaz2011-01-03 00:09:30 +0200
commite7267688b48c7e6619cab3dafe61212b166b389b (patch)
treea86ac0cfa15c8c1a52a00dd3032075638ccf0b5d
parentbe013764c44be5330e49c3ce13fceec9bacc7ac2 (diff)
downloadpcsx_rearmed-e7267688b48c7e6619cab3dafe61212b166b389b.tar.gz
pcsx_rearmed-e7267688b48c7e6619cab3dafe61212b166b389b.tar.bz2
pcsx_rearmed-e7267688b48c7e6619cab3dafe61212b166b389b.zip
gpu_unai: avoid useless blits
-rw-r--r--plugins/gpu_unai/gpu.cpp13
1 files changed, 11 insertions, 2 deletions
diff --git a/plugins/gpu_unai/gpu.cpp b/plugins/gpu_unai/gpu.cpp
index 991610c..8a13521 100644
--- a/plugins/gpu_unai/gpu.cpp
+++ b/plugins/gpu_unai/gpu.cpp
@@ -40,6 +40,8 @@ bool frameLimit = false; /* frames to wait */
bool light = true; /* lighting */
bool blend = true; /* blending */
+bool fb_dirty = false;
+
bool enableAbbeyHack = false; /* Abe's Odyssey hack */
u8 BLEND_MODE;
u8 TEXT_MODE;
@@ -298,6 +300,7 @@ void GPU_writeDataMem(u32* dmaAddress, s32 dmaCount)
}
GPU_GP1 = (GPU_GP1 | 0x14000000) & ~0x60000000;
+ fb_dirty = true;
pcsx4all_prof_end_with_resume(PCSX4ALL_PROF_GPU,PCSX4ALL_PROF_HW_WRITE);
pcsx4all_prof_resume(PCSX4ALL_PROF_CPU);
}
@@ -390,6 +393,7 @@ void GPU_writeData(u32 data)
gpuCheckPacket(data);
}
GPU_GP1 |= 0x14000000;
+ fb_dirty = true;
pcsx4all_prof_end_with_resume(PCSX4ALL_PROF_GPU,PCSX4ALL_PROF_HW_WRITE);
pcsx4all_prof_resume(PCSX4ALL_PROF_CPU);
@@ -529,10 +533,12 @@ void GPU_writeStatus(u32 data)
case 0x05:
DisplayArea[0] = (data & 0x000003FF); //(short)(data & 0x3ff);
DisplayArea[1] = ((data & 0x0007FC00)>>10); //(data & 0x000FFC00) >> 10; //(short)((data>>10)&0x1ff);
+ fb_dirty = true;
break;
case 0x07:
DisplayArea[4] = data & 0x000003FF; //(short)(data & 0x3ff);
DisplayArea[5] = (data & 0x000FFC00) >> 10; //(short)((data>>10) & 0x3ff);
+ fb_dirty = true;
break;
case 0x08:
{
@@ -543,6 +549,7 @@ void GPU_writeStatus(u32 data)
DisplayArea[3] = VerticalResolution[(GPU_GP1 >> 19) & 3];
isPAL = (data & 0x08) ? true : false; // if 1 - PAL mode, else NTSC
}
+ fb_dirty = true;
break;
case 0x10:
switch (data & 0xffff) {
@@ -901,8 +908,10 @@ void GPU_updateLace(void)
// Interlace bit toggle
GPU_GP1 ^= 0x80000000;
- if (!((GPU_GP1&0x08000000) || (GPU_GP1&0x00800000)))
- blit();
+ if (!fb_dirty || (GPU_GP1&0x08800000))
+ return;
+
+ blit();
}
long GPUopen(unsigned long *, char *, char *)