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authorPaul Cercueil2020-01-30 12:33:44 -0300
committerPaul Cercueil2020-02-08 11:44:52 -0300
commit4a71579b757d3a2eb6902c84391f429838ad4912 (patch)
treec57430315f1b82497eebd3fef24c0f4c0336bf0d /deps/lightning/check/jmpr.tst
parentea884d3029c673e06a4084156ceb662598d8945a (diff)
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git subrepo clone https://git.savannah.gnu.org/git/lightning.git deps/lightning
subrepo: subdir: "deps/lightning" merged: "b0b8eb5" upstream: origin: "https://git.savannah.gnu.org/git/lightning.git" branch: "master" commit: "b0b8eb5" git-subrepo: version: "0.4.1" origin: "https://github.com/ingydotnet/git-subrepo.git" commit: "a04d8c2"
Diffstat (limited to 'deps/lightning/check/jmpr.tst')
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1 files changed, 66 insertions, 0 deletions
diff --git a/deps/lightning/check/jmpr.tst b/deps/lightning/check/jmpr.tst
new file mode 100644
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+++ b/deps/lightning/check/jmpr.tst
@@ -0,0 +1,66 @@
+/*
+This is a very simple check to a condition that on lightning 2.0.5
+could cause an assertion on some backends, due to correcting a problem
+with temporaries that could not be saved/reloaded due to being used only
+in the hardware instruction, or being considered live for too long on the
+lightning instruction, and that could not be reloaded after the jump target
+(or after false/true target on conditional branches).
+
+If this code in lib/lightning.c:_jit_update():
+
+ for (regno = 0; regno < _jitc->reglen; regno++) {
+ spec = jit_class(_rvs[regno].spec);
+ if (jit_regset_tstbit(mask, regno) &&
+ (spec & (jit_class_gpr|jit_class_fpr)) &&
+ !(spec & jit_class_sav))
+ jit_regset_clrbit(mask, regno);
+ }
+
+were removed, this test case, on x86_64 would fail like this:
+
+lt-lightning: lightning.c:305: _jit_get_reg: Assertion `regspec & 0x02000000' failed.
+Aborted (core dumped)
+ */
+
+.data 32
+ret:
+#if __WORDSIZE == 32
+.i 0
+#else
+.l 0
+#endif
+ok:
+.c "ok"
+
+.code
+ prolog
+ jmpi start
+
+add_v1_v2:
+ addr %v1 %v1 %v2
+ ldi %r0 ret
+ jmpr %r0
+
+start:
+ movi %v1 1
+ movi %v2 2
+ movi %r0 ret_add_v1_v2
+ sti ret %r0
+ movi %v0 add_v1_v2
+ jmpr %v0
+ movi_d %f0 3
+ beqi_d pass_movi_f0 %f0 3
+ calli @abort
+pass_movi_f0:
+ beqi pass_check_v2 %v2 2
+ calli @abort
+pass_check_v2:
+ret_add_v1_v2:
+ beqi pass_add_v1_v2 %v1 3
+ calli @abort
+pass_add_v1_v2:
+ prepare
+ pushargi ok
+ finishi @puts
+ ret
+ epilog