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author | Twinaphex | 2020-02-08 16:24:22 +0100 |
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committer | GitHub | 2020-02-08 16:24:22 +0100 |
commit | 0adc619b5a5705d16cc6caea64951776ababbb96 (patch) | |
tree | fbae9b1d18d04d8e7908aa1c3446782ebf6e8785 /deps/lightning/check/ret.tst | |
parent | 0204c39a68a1fd4bf667aa8ece5a769f2983b7d0 (diff) | |
parent | 6f1edc3c7fd1f7f58155107d0c99d0ac7d22443b (diff) | |
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Merge pull request #377 from pcercuei/libretro
Lightrec dynarec
Diffstat (limited to 'deps/lightning/check/ret.tst')
-rw-r--r-- | deps/lightning/check/ret.tst | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/deps/lightning/check/ret.tst b/deps/lightning/check/ret.tst new file mode 100644 index 0000000..de1d82c --- /dev/null +++ b/deps/lightning/check/ret.tst @@ -0,0 +1,51 @@ +.data 16 +ok: +.c "ok" + +.code + jmpi main + +/* + * very simple test on purpose because otherwise it would not trigger + * the bug where the retr %r0 or retr_d %f0 would be omitted because + * the argument was already the return register, but the register end + * clobbered by another instruction, like the div*, and the wrong + * value returned because the retr* was removed and this way, lost + * information that the register was live at function exit. + */ + +check_r0: + prolog + movi %r0 1 + movi %r2 10 + // on x86 this changes %rax on other arches could use %r0 as temporary + divi %r1 %r2 3 + // %r0 must still be 1 + retr %r0 + epilog + +check_f0: + prolog + movi_d %f0 0.5 + movi_d %f2 10 + divi_d %f1 %f2 3 + retr_d %f0 + epilog + +main: + prolog + calli check_r0 + retval %r1 + beqi r0_ok %r1 1 + calli @abort +r0_ok: + calli check_f0 + retval_d %f1 + beqi_d f0_ok %f1 0.5 + calli @abort +f0_ok: + prepare + pushargi ok + finishi @puts + ret + epilog |