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| author | negativeExponent | 2020-08-04 19:49:04 +0800 |
|---|---|---|
| committer | negativeExponent | 2020-08-04 20:40:58 +0800 |
| commit | 908e426cc1ef2187357ed8fb59edd99b8a8060c9 (patch) | |
| tree | 21a394548a7357d12af17014efc0453ad32be23e /libpcsxcore/new_dynarec/arm/assem_arm.h | |
| parent | 996dfb25c3a7ef8a485c3ce394a532cb0ee2e5c2 (diff) | |
| download | pcsx_rearmed-908e426cc1ef2187357ed8fb59edd99b8a8060c9.tar.gz pcsx_rearmed-908e426cc1ef2187357ed8fb59edd99b8a8060c9.tar.bz2 pcsx_rearmed-908e426cc1ef2187357ed8fb59edd99b8a8060c9.zip | |
Add header guards
Diffstat (limited to 'libpcsxcore/new_dynarec/arm/assem_arm.h')
| -rw-r--r-- | libpcsxcore/new_dynarec/arm/assem_arm.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/libpcsxcore/new_dynarec/arm/assem_arm.h b/libpcsxcore/new_dynarec/arm/assem_arm.h index bb6114c..1dcc55f 100644 --- a/libpcsxcore/new_dynarec/arm/assem_arm.h +++ b/libpcsxcore/new_dynarec/arm/assem_arm.h @@ -1,3 +1,6 @@ +#ifndef __ASSEM_ARM_H__ +#define __ASSEM_ARM_H__ + #define HOST_REGS 13 #define HOST_CCREG 10 #define HOST_BTREG 8 @@ -55,3 +58,5 @@ extern char *invc_ptr; extern char translation_cache[1 << TARGET_SIZE_2]; #define BASE_ADDR (u_int)translation_cache #endif + +#endif /* __ASSEM_ARM_H__ */ |