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| author | notaz | 2012-01-14 17:50:23 +0200 |
|---|---|---|
| committer | notaz | 2012-01-14 17:50:23 +0200 |
| commit | bdeade4633d41d76e0c22b3810241bbf7cb5a8a3 (patch) | |
| tree | 3472eb7a64f242f50f22344b166c9389ccf59b59 /libpcsxcore/new_dynarec/assem_arm.h | |
| parent | 3609c474ee3cec2e06fa5d2c1578dd9de1d3f7a5 (diff) | |
| download | pcsx_rearmed-bdeade4633d41d76e0c22b3810241bbf7cb5a8a3.tar.gz pcsx_rearmed-bdeade4633d41d76e0c22b3810241bbf7cb5a8a3.tar.bz2 pcsx_rearmed-bdeade4633d41d76e0c22b3810241bbf7cb5a8a3.zip | |
drc: allow translation cache in data segment
useful for Android
Diffstat (limited to 'libpcsxcore/new_dynarec/assem_arm.h')
| -rw-r--r-- | libpcsxcore/new_dynarec/assem_arm.h | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/libpcsxcore/new_dynarec/assem_arm.h b/libpcsxcore/new_dynarec/assem_arm.h index 917d276..7ed8caf 100644 --- a/libpcsxcore/new_dynarec/assem_arm.h +++ b/libpcsxcore/new_dynarec/assem_arm.h @@ -22,6 +22,10 @@ //#undef USE_MINI_HT #endif +#ifndef __ANDROID__ +#define BASE_ADDR_FIXED 1 +#endif + #ifdef FORCE32 #define REG_SHIFT 2 #else @@ -54,8 +58,16 @@ extern char *invc_ptr; -#define BASE_ADDR 0x1000000 // Code generator target address #define TARGET_SIZE_2 24 // 2^24 = 16 megabytes +// Code generator target address +#ifdef BASE_ADDR_FIXED +// "round" address helpful for debug +#define BASE_ADDR 0x1000000 +#else +extern char translation_cache[1 << TARGET_SIZE_2]; +#define BASE_ADDR translation_cache +#endif + // This is defined in linkage_arm.s, but gcc -O3 likes this better #define rdram ((unsigned int *)0x80000000) |