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| author | notaz | 2011-06-29 19:55:38 +0300 |
|---|---|---|
| committer | notaz | 2011-07-08 00:15:20 +0300 |
| commit | 1f77c86322bf6567909da192fdbf6c28c0596a13 (patch) | |
| tree | 53ebe1996edd59efbf3dcc4ac16de28ccffc67b5 /libpcsxcore/new_dynarec/pcsxmem.c | |
| parent | ad418c19cd4ca9a80820593609b786c6993b2eda (diff) | |
| download | pcsx_rearmed-1f77c86322bf6567909da192fdbf6c28c0596a13.tar.gz pcsx_rearmed-1f77c86322bf6567909da192fdbf6c28c0596a13.tar.bz2 pcsx_rearmed-1f77c86322bf6567909da192fdbf6c28c0596a13.zip | |
dma: more accurate ICR register handling
based on tests on ther real thing.
Diffstat (limited to 'libpcsxcore/new_dynarec/pcsxmem.c')
| -rw-r--r-- | libpcsxcore/new_dynarec/pcsxmem.c | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/libpcsxcore/new_dynarec/pcsxmem.c b/libpcsxcore/new_dynarec/pcsxmem.c index 8b6714b..601a6ee 100644 --- a/libpcsxcore/new_dynarec/pcsxmem.c +++ b/libpcsxcore/new_dynarec/pcsxmem.c @@ -179,8 +179,15 @@ static void io_write_imask32(u32 value) static void io_write_dma_icr32(u32 value) { - u32 tmp = ~value & HW_DMA_ICR; - HW_DMA_ICR = ((tmp ^ value) & 0xffffff) ^ tmp; + u32 tmp = value & 0x00ff803f; + tmp |= (SWAPu32(HW_DMA_ICR) & ~value) & 0x7f000000; + if ((tmp & HW_DMA_ICR_GLOBAL_ENABLE && tmp & 0x7f000000) + || tmp & HW_DMA_ICR_BUS_ERROR) { + if (!(SWAPu32(HW_DMA_ICR) & HW_DMA_ICR_IRQ_SENT)) + psxHu32ref(0x1070) |= SWAP32(8); + tmp |= HW_DMA_ICR_IRQ_SENT; + } + HW_DMA_ICR = SWAPu32(tmp); } #define make_dma_func(n) \ |