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author | notaz | 2011-12-04 23:33:50 +0200 |
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committer | notaz | 2011-12-05 01:08:25 +0200 |
commit | ddbaf678c49d33cf60f1eac5069e3275baa2c685 (patch) | |
tree | 6ed9f1a9d0dd5673baabf909cb6338fb1941c104 /libpcsxcore/new_dynarec/pcsxmem.c | |
parent | adb4b2c6fff620ecd65e3786a2f961413507c1a4 (diff) | |
download | pcsx_rearmed-ddbaf678c49d33cf60f1eac5069e3275baa2c685.tar.gz pcsx_rearmed-ddbaf678c49d33cf60f1eac5069e3275baa2c685.tar.bz2 pcsx_rearmed-ddbaf678c49d33cf60f1eac5069e3275baa2c685.zip |
move some gpu status handling to core
this removes need to update each gpu plugin when this stuff is changed
Diffstat (limited to 'libpcsxcore/new_dynarec/pcsxmem.c')
-rw-r--r-- | libpcsxcore/new_dynarec/pcsxmem.c | 20 |
1 files changed, 16 insertions, 4 deletions
diff --git a/libpcsxcore/new_dynarec/pcsxmem.c b/libpcsxcore/new_dynarec/pcsxmem.c index c9fb5a8..2306ca7 100644 --- a/libpcsxcore/new_dynarec/pcsxmem.c +++ b/libpcsxcore/new_dynarec/pcsxmem.c @@ -10,6 +10,7 @@ #include "../psxhw.h" #include "../cdrom.h" #include "../mdec.h" +#include "../gpu.h" #include "emu_if.h" #include "pcsxmem.h" @@ -209,6 +210,19 @@ static void io_spu_write32(u32 value) wfunc(a + 2, value >> 16); } +static u32 io_gpu_read_status(void) +{ + // meh2, syncing for img bit, might want to avoid it.. + gpuSyncPluginSR(); + return HW_GPU_STATUS; +} + +static void io_gpu_write_status(u32 value) +{ + GPU_writeStatus(value); + gpuSyncPluginSR(); +} + static void map_ram_write(void) { int i; @@ -346,7 +360,7 @@ void new_dyna_pcsx_mem_init(void) map_item(&mem_iortab[IOMEM32(0x1124)], io_rcnt_read_mode2, 1); map_item(&mem_iortab[IOMEM32(0x1128)], io_rcnt_read_target2, 1); // map_item(&mem_iortab[IOMEM32(0x1810)], GPU_readData, 1); -// map_item(&mem_iortab[IOMEM32(0x1814)], GPU_readStatus, 1); + map_item(&mem_iortab[IOMEM32(0x1814)], io_gpu_read_status, 1); map_item(&mem_iortab[IOMEM32(0x1820)], mdecRead0, 1); map_item(&mem_iortab[IOMEM32(0x1824)], mdecRead1, 1); @@ -392,7 +406,7 @@ void new_dyna_pcsx_mem_init(void) map_item(&mem_iowtab[IOMEM32(0x1124)], io_rcnt_write_mode2, 1); map_item(&mem_iowtab[IOMEM32(0x1128)], io_rcnt_write_target2, 1); // map_item(&mem_iowtab[IOMEM32(0x1810)], GPU_writeData, 1); -// map_item(&mem_iowtab[IOMEM32(0x1814)], GPU_writeStatus, 1); + map_item(&mem_iowtab[IOMEM32(0x1814)], io_gpu_write_status, 1); map_item(&mem_iowtab[IOMEM32(0x1820)], mdecWrite0, 1); map_item(&mem_iowtab[IOMEM32(0x1824)], mdecWrite1, 1); @@ -441,11 +455,9 @@ void new_dyna_pcsx_mem_reset(void) // plugins might change so update the pointers map_item(&mem_iortab[IOMEM32(0x1810)], GPU_readData, 1); - map_item(&mem_iortab[IOMEM32(0x1814)], GPU_readStatus, 1); for (i = 0x1c00; i < 0x1e00; i += 2) map_item(&mem_iortab[IOMEM16(i)], SPU_readRegister, 1); map_item(&mem_iowtab[IOMEM32(0x1810)], GPU_writeData, 1); - map_item(&mem_iowtab[IOMEM32(0x1814)], GPU_writeStatus, 1); } |