aboutsummaryrefslogtreecommitdiff
path: root/libpcsxcore/new_dynarec
diff options
context:
space:
mode:
authortwinaphex2016-03-02 04:03:11 +0100
committertwinaphex2016-03-02 04:03:11 +0100
commitb9c86313f1a99cd8193fbf36ccc08295a9639725 (patch)
treee5f9f1e2ab31509f72b93af4533dc7276a40bea5 /libpcsxcore/new_dynarec
parent966a06cd644d812dc75c9b91a58168fef6ab6db8 (diff)
parent5644b26c23a4abd9511c56f39c369a46017585b8 (diff)
downloadpcsx_rearmed-b9c86313f1a99cd8193fbf36ccc08295a9639725.tar.gz
pcsx_rearmed-b9c86313f1a99cd8193fbf36ccc08295a9639725.tar.bz2
pcsx_rearmed-b9c86313f1a99cd8193fbf36ccc08295a9639725.zip
Merge https://github.com/notaz/pcsx_rearmed
Diffstat (limited to 'libpcsxcore/new_dynarec')
-rw-r--r--libpcsxcore/new_dynarec/assem_arm.c28
1 files changed, 20 insertions, 8 deletions
diff --git a/libpcsxcore/new_dynarec/assem_arm.c b/libpcsxcore/new_dynarec/assem_arm.c
index 8e0c634..3cc3737 100644
--- a/libpcsxcore/new_dynarec/assem_arm.c
+++ b/libpcsxcore/new_dynarec/assem_arm.c
@@ -1169,18 +1169,30 @@ void emit_addimm(u_int rs,int imm,u_int rt)
}else if(genimm(-imm,&armval)) {
assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],-imm);
output_w32(0xe2400000|rd_rn_rm(rt,rs,0)|armval);
- }else if(imm<0) {
- assert(imm>-65536);
+ #ifdef HAVE_ARMV7
+ }else if(rt!=rs&&(u_int)imm<65536) {
+ emit_movw(imm&0x0000ffff,rt);
+ emit_add(rs,rt,rt);
+ }else if(rt!=rs&&(u_int)-imm<65536) {
+ emit_movw(-imm&0x0000ffff,rt);
+ emit_sub(rs,rt,rt);
+ #endif
+ }else if((u_int)-imm<65536) {
assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],(-imm)&0xFF00);
assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rt],(-imm)&0xFF);
output_w32(0xe2400000|rd_rn_imm_shift(rt,rs,(-imm)>>8,8));
output_w32(0xe2400000|rd_rn_imm_shift(rt,rt,(-imm)&0xff,0));
- }else{
- assert(imm<65536);
- assem_debug("add %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF00);
- assem_debug("add %s,%s,#%d\n",regname[rt],regname[rt],imm&0xFF);
- output_w32(0xe2800000|rd_rn_imm_shift(rt,rs,imm>>8,8));
- output_w32(0xe2800000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
+ }else {
+ do {
+ int shift = (ffs(imm) - 1) & ~1;
+ int imm8 = imm & (0xff << shift);
+ genimm_checked(imm8,&armval);
+ assem_debug("add %s,%s,#0x%x\n",regname[rt],regname[rs],imm8);
+ output_w32(0xe2800000|rd_rn_rm(rt,rs,0)|armval);
+ rs = rt;
+ imm &= ~imm8;
+ }
+ while (imm != 0);
}
}
else if(rs!=rt) emit_mov(rs,rt);