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| author | notaz | 2014-12-18 03:56:01 +0200 |
|---|---|---|
| committer | notaz | 2014-12-20 02:57:25 +0200 |
| commit | 2b30c1291db9d9801d51cf85f71f40fe54958898 (patch) | |
| tree | 0ffdcba9ad3d9db9335b4855529a4da313bccd5a /libpcsxcore/spu.c | |
| parent | e391d21cdbf06afd68d137537b7e82585ecffa1a (diff) | |
| download | pcsx_rearmed-2b30c1291db9d9801d51cf85f71f40fe54958898.tar.gz pcsx_rearmed-2b30c1291db9d9801d51cf85f71f40fe54958898.tar.bz2 pcsx_rearmed-2b30c1291db9d9801d51cf85f71f40fe54958898.zip | |
spu: add a schedule callback
Diffstat (limited to 'libpcsxcore/spu.c')
| -rw-r--r-- | libpcsxcore/spu.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/libpcsxcore/spu.c b/libpcsxcore/spu.c index a60c047..f23051e 100644 --- a/libpcsxcore/spu.c +++ b/libpcsxcore/spu.c @@ -26,3 +26,15 @@ void CALLBACK SPUirq(void) { psxHu32ref(0x1070) |= SWAPu32(0x200); } + +// spuUpdate +void CALLBACK SPUschedule(unsigned int cycles_after) { + psxRegs.interrupt |= (1 << PSXINT_SPU_UPDATE); + psxRegs.intCycle[PSXINT_SPU_UPDATE].cycle = cycles_after; + psxRegs.intCycle[PSXINT_SPU_UPDATE].sCycle = psxRegs.cycle; + new_dyna_set_event(PSXINT_SPU_UPDATE, cycles_after); +} + +void spuUpdate() { + SPU_async(psxRegs.cycle); +} |