Merge pull request #11 from notaz/upstream_merge

Upstream merge

13 files changed, 54 insertions, 39 deletions

diff --git a/libpcsxcore/misc.c b/libpcsxcore/misc.c
index a27f60f..917a567 100644
--- a/libpcsxcore/misc.c
+++ b/libpcsxcore/misc.c
@@ -601,11 +601,11 @@ int SaveState(const char *file) {
 
 	// spu
 	spufP = (SPUFreeze_t *) malloc(16);
-	SPU_freeze(2, spufP);
+	SPU_freeze(2, spufP, psxRegs.cycle);
 	Size = spufP->Size; SaveFuncs.write(f, &Size, 4);
 	free(spufP);
 	spufP = (SPUFreeze_t *) malloc(Size);
-	SPU_freeze(1, spufP);
+	SPU_freeze(1, spufP, psxRegs.cycle);
 	SaveFuncs.write(f, spufP, Size);
 	free(spufP);
 
@@ -670,7 +670,7 @@ int LoadState(const char *file) {
 	SaveFuncs.read(f, &Size, 4);
 	spufP = (SPUFreeze_t *)malloc(Size);
 	SaveFuncs.read(f, spufP, Size);
-	SPU_freeze(0, spufP);
+	SPU_freeze(0, spufP, psxRegs.cycle);
 	free(spufP);
 
 	sioFreeze(f, 0);
diff --git a/libpcsxcore/new_dynarec/emu_if.c b/libpcsxcore/new_dynarec/emu_if.c
index cb95cb1..89e2bd6 100644
--- a/libpcsxcore/new_dynarec/emu_if.c
+++ b/libpcsxcore/new_dynarec/emu_if.c
@@ -60,6 +60,7 @@ static irq_func * const irq_funcs[] = {
 	[PSXINT_CDRDMA] = cdrDmaInterrupt,
 	[PSXINT_CDRLID] = cdrLidSeekInterrupt,
 	[PSXINT_CDRPLAY] = cdrPlayInterrupt,
+	[PSXINT_SPU_UPDATE] = spuUpdate,
 	[PSXINT_RCNT] = psxRcntUpdate,
 };
 
diff --git a/libpcsxcore/new_dynarec/pcsxmem.c b/libpcsxcore/new_dynarec/pcsxmem.c
index 0a75442..d5c32be 100644
--- a/libpcsxcore/new_dynarec/pcsxmem.c
+++ b/libpcsxcore/new_dynarec/pcsxmem.c
@@ -210,7 +210,7 @@ make_dma_func(6)
 static void io_spu_write16(u32 value)
 {
 	// meh
-	SPU_writeRegister(address, value);
+	SPU_writeRegister(address, value, psxRegs.cycle);
 }
 
 static void io_spu_write32(u32 value)
@@ -218,8 +218,8 @@ static void io_spu_write32(u32 value)
 	SPUwriteRegister wfunc = SPU_writeRegister;
 	u32 a = address;
 
-	wfunc(a, value & 0xffff);
-	wfunc(a + 2, value >> 16);
+	wfunc(a, value & 0xffff, psxRegs.cycle);
+	wfunc(a + 2, value >> 16, psxRegs.cycle);
 }
 
 static u32 io_gpu_read_status(void)
diff --git a/libpcsxcore/plugins.c b/libpcsxcore/plugins.c
index 57078ba..e6d8a11 100644
--- a/libpcsxcore/plugins.c
+++ b/libpcsxcore/plugins.c
@@ -88,6 +88,7 @@ SPUreadDMAMem         SPU_readDMAMem;
 SPUplayADPCMchannel   SPU_playADPCMchannel;

 SPUfreeze             SPU_freeze;

 SPUregisterCallback   SPU_registerCallback;

+SPUregisterScheduleCb SPU_registerScheduleCb;

 SPUasync              SPU_async;

 SPUplayCDDAchannel    SPU_playCDDAchannel;

 

@@ -320,6 +321,7 @@ void *hSPUDriver = NULL;
 long CALLBACK SPU__configure(void) { return 0; }

 void CALLBACK SPU__about(void) {}

 long CALLBACK SPU__test(void) { return 0; }

+void CALLBACK SPU__registerScheduleCb(void (CALLBACK *cb)(unsigned int)) {}

 

 #define LoadSpuSym1(dest, name) \

 	LoadSym(SPU_##dest, SPU##dest, name, TRUE);

@@ -356,6 +358,7 @@ static int LoadSPUplugin(const char *SPUdll) {
 	LoadSpuSym1(playADPCMchannel, "SPUplayADPCMchannel");

 	LoadSpuSym1(freeze, "SPUfreeze");

 	LoadSpuSym1(registerCallback, "SPUregisterCallback");

+	LoadSpuSym0(registerScheduleCb, "SPUregisterScheduleCb");

 	LoadSpuSymN(async, "SPUasync");

 	LoadSpuSymN(playCDDAchannel, "SPUplayCDDAchannel");

 

diff --git a/libpcsxcore/plugins.h b/libpcsxcore/plugins.h
index dfa8722..e6ac694 100644
--- a/libpcsxcore/plugins.h
+++ b/libpcsxcore/plugins.h
@@ -184,14 +184,15 @@ typedef long (CALLBACK* SPUinit)(void);
 typedef long (CALLBACK* SPUshutdown)(void);	

 typedef long (CALLBACK* SPUclose)(void);			

 typedef void (CALLBACK* SPUplaySample)(unsigned char);		

-typedef void (CALLBACK* SPUwriteRegister)(unsigned long, unsigned short);

+typedef void (CALLBACK* SPUwriteRegister)(unsigned long, unsigned short, unsigned int);

 typedef unsigned short (CALLBACK* SPUreadRegister)(unsigned long);

 typedef void (CALLBACK* SPUwriteDMA)(unsigned short);

 typedef unsigned short (CALLBACK* SPUreadDMA)(void);

-typedef void (CALLBACK* SPUwriteDMAMem)(unsigned short *, int);

-typedef void (CALLBACK* SPUreadDMAMem)(unsigned short *, int);

+typedef void (CALLBACK* SPUwriteDMAMem)(unsigned short *, int, unsigned int);

+typedef void (CALLBACK* SPUreadDMAMem)(unsigned short *, int, unsigned int);

 typedef void (CALLBACK* SPUplayADPCMchannel)(xa_decode_t *);

 typedef void (CALLBACK* SPUregisterCallback)(void (CALLBACK *callback)(void));

+typedef void (CALLBACK* SPUregisterScheduleCb)(void (CALLBACK *callback)(unsigned int cycles_after));

 typedef long (CALLBACK* SPUconfigure)(void);

 typedef long (CALLBACK* SPUtest)(void);

 typedef void (CALLBACK* SPUabout)(void);

@@ -204,8 +205,8 @@ typedef struct {
 	xa_decode_t xa;

 	unsigned char *SPUInfo;

 } SPUFreeze_t;

-typedef long (CALLBACK* SPUfreeze)(uint32_t, SPUFreeze_t *);

-typedef void (CALLBACK* SPUasync)(uint32_t);

+typedef long (CALLBACK* SPUfreeze)(uint32_t, SPUFreeze_t *, uint32_t);

+typedef void (CALLBACK* SPUasync)(uint32_t, uint32_t);

 typedef int  (CALLBACK* SPUplayCDDAchannel)(short *, int);

 

 // SPU function pointers

@@ -226,6 +227,7 @@ extern SPUreadDMAMem       SPU_readDMAMem;
 extern SPUplayADPCMchannel SPU_playADPCMchannel;

 extern SPUfreeze           SPU_freeze;

 extern SPUregisterCallback SPU_registerCallback;

+extern SPUregisterScheduleCb SPU_registerScheduleCb;

 extern SPUasync            SPU_async;

 extern SPUplayCDDAchannel  SPU_playCDDAchannel;

 

diff --git a/libpcsxcore/psxcounters.c b/libpcsxcore/psxcounters.c
index 50f1792..35823da 100644
--- a/libpcsxcore/psxcounters.c
+++ b/libpcsxcore/psxcounters.c
@@ -61,7 +61,6 @@ static const u32 CountToTarget    = 1;
 
 static const u32 FrameRate[]      = { 60, 50 };
 static const u32 HSyncTotal[]     = { 263, 313 };
-static const u32 SpuUpdInterval[] = { 32, 32 };
 #define VBlankStart 240
 
 #define VERBOSE_LEVEL 0
@@ -73,7 +72,6 @@ Rcnt rcnts[ CounterQuantity ];
 
 u32 hSyncCount = 0;
 u32 frame_counter = 0;
-static u32 spuSyncCount = 0;
 static u32 hsync_steps = 0;
 static u32 base_cycle = 0;
 
@@ -323,22 +321,10 @@ void psxRcntUpdate()
     if( cycle - rcnts[3].cycleStart >= rcnts[3].cycle )
     {
         u32 leftover_cycles = cycle - rcnts[3].cycleStart - rcnts[3].cycle;
-        u32 next_vsync, next_lace;
+        u32 next_vsync;
 
-        spuSyncCount += hsync_steps;
         hSyncCount += hsync_steps;
 
-        // Update spu.
-        if( spuSyncCount >= SpuUpdInterval[Config.PsxType] )
-        {
-            spuSyncCount = 0;
-
-            if( SPU_async )
-            {
-                SPU_async( SpuUpdInterval[Config.PsxType] * rcnts[3].target );
-            }
-        }
-        
         // VSync irq.
         if( hSyncCount == VBlankStart )
         {
@@ -348,6 +334,11 @@ void psxRcntUpdate()
 
             EmuUpdate();
             GPU_updateLace();
+
+            if( SPU_async )
+            {
+                SPU_async( cycle, 1 );
+            }
         }
         
         // Update lace. (with InuYasha fix)
@@ -363,13 +354,10 @@ void psxRcntUpdate()
         }
 
         // Schedule next call, in hsyncs
-        hsync_steps = SpuUpdInterval[Config.PsxType] - spuSyncCount;
+        hsync_steps = HSyncTotal[Config.PsxType] - hSyncCount;
         next_vsync = VBlankStart - hSyncCount; // ok to overflow
-        next_lace = HSyncTotal[Config.PsxType] - hSyncCount;
         if( next_vsync && next_vsync < hsync_steps )
             hsync_steps = next_vsync;
-        if( next_lace && next_lace < hsync_steps )
-            hsync_steps = next_lace;
 
         rcnts[3].cycleStart = cycle - leftover_cycles;
         if (Config.PsxType)
@@ -493,7 +481,6 @@ void psxRcntInit()
     }
 
     hSyncCount = 0;
-    spuSyncCount = 0;
     hsync_steps = 1;
 
     psxRcntSet();
@@ -503,6 +490,7 @@ void psxRcntInit()
 
 s32 psxRcntFreeze( void *f, s32 Mode )
 {
+    u32 spuSyncCount = 0;
     u32 count;
     s32 i;
 
diff --git a/libpcsxcore/psxdma.c b/libpcsxcore/psxdma.c
index 63c2724..ff7d6a3 100644
--- a/libpcsxcore/psxdma.c
+++ b/libpcsxcore/psxdma.c
@@ -51,7 +51,7 @@ void psxDma4(u32 madr, u32 bcr, u32 chcr) { // SPU
 #endif
 				break;
 			}
-			SPU_writeDMAMem(ptr, (bcr >> 16) * (bcr & 0xffff) * 2);
+			SPU_writeDMAMem(ptr, (bcr >> 16) * (bcr & 0xffff) * 2, psxRegs.cycle);
 			SPUDMA_INT((bcr >> 16) * (bcr & 0xffff) / 2);
 			return;
 
@@ -67,7 +67,7 @@ void psxDma4(u32 madr, u32 bcr, u32 chcr) { // SPU
 				break;
 			}
 			size = (bcr >> 16) * (bcr & 0xffff) * 2;
-			SPU_readDMAMem(ptr, size);
+			SPU_readDMAMem(ptr, size, psxRegs.cycle);
 			psxCpu->Clear(madr, size);
 			break;
 
diff --git a/libpcsxcore/psxhw.c b/libpcsxcore/psxhw.c
index 6b9125d..c90f8c7 100644
--- a/libpcsxcore/psxhw.c
+++ b/libpcsxcore/psxhw.c
@@ -493,7 +493,7 @@ void psxHwWrite16(u32 add, u16 value) {
 
 		default:
 			if (add>=0x1f801c00 && add<0x1f801e00) {
-            	SPU_writeRegister(add, value);
+				SPU_writeRegister(add, value, psxRegs.cycle);
 				return;
 			}
 
@@ -747,8 +747,8 @@ void psxHwWrite32(u32 add, u32 value) {
 		default:
 			// Dukes of Hazard 2 - car engine noise
 			if (add>=0x1f801c00 && add<0x1f801e00) {
-				SPU_writeRegister(add, value&0xffff);
-				SPU_writeRegister(add + 2, value>>16);
+				SPU_writeRegister(add, value&0xffff, psxRegs.cycle);
+				SPU_writeRegister(add + 2, value>>16, psxRegs.cycle);
 				return;
 			}
 
diff --git a/libpcsxcore/psxinterpreter.c b/libpcsxcore/psxinterpreter.c
index ff49491..cf3de79 100644
--- a/libpcsxcore/psxinterpreter.c
+++ b/libpcsxcore/psxinterpreter.c
@@ -727,9 +727,9 @@ void psxLWR() {
 	*/
 }
 
-void psxSB() { psxMemWrite8 (_oB_, _u8 (_rRt_)); }
-void psxSH() { psxMemWrite16(_oB_, _u16(_rRt_)); }
-void psxSW() { psxMemWrite32(_oB_, _u32(_rRt_)); }
+void psxSB() { psxMemWrite8 (_oB_, _rRt_ &   0xff); }
+void psxSH() { psxMemWrite16(_oB_, _rRt_ & 0xffff); }
+void psxSW() { psxMemWrite32(_oB_, _rRt_); }
 
 u32 SWL_MASK[4] = { 0xffffff00, 0xffff0000, 0xff000000, 0 };
 u32 SWL_SHIFT[4] = { 24, 16, 8, 0 };
diff --git a/libpcsxcore/r3000a.c b/libpcsxcore/r3000a.c
index f5996ac..82eb885 100644
--- a/libpcsxcore/r3000a.c
+++ b/libpcsxcore/r3000a.c
@@ -185,6 +185,12 @@ void psxBranchTest() {
 				cdrLidSeekInterrupt();
 			}
 		}
+		if (psxRegs.interrupt & (1 << PSXINT_SPU_UPDATE)) { // scheduled spu update
+			if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SPU_UPDATE].sCycle) >= psxRegs.intCycle[PSXINT_SPU_UPDATE].cycle) {
+				psxRegs.interrupt &= ~(1 << PSXINT_SPU_UPDATE);
+				spuUpdate();
+			}
+		}
 	}
 
 	if (psxHu32(0x1070) & psxHu32(0x1074)) {
diff --git a/libpcsxcore/r3000a.h b/libpcsxcore/r3000a.h
index 13aaa59..a6a6254 100644
--- a/libpcsxcore/r3000a.h
+++ b/libpcsxcore/r3000a.h
@@ -160,6 +160,7 @@ enum {
 	PSXINT_RCNT,
 	PSXINT_CDRLID,
 	PSXINT_CDRPLAY,
+	PSXINT_SPU_UPDATE,
 	PSXINT_COUNT
 };
 
diff --git a/libpcsxcore/spu.c b/libpcsxcore/spu.c
index a60c047..90d2f4d 100644
--- a/libpcsxcore/spu.c
+++ b/libpcsxcore/spu.c
@@ -26,3 +26,15 @@
 void CALLBACK SPUirq(void) {
 	psxHu32ref(0x1070) |= SWAPu32(0x200);
 }
+
+// spuUpdate
+void CALLBACK SPUschedule(unsigned int cycles_after) {
+	psxRegs.interrupt |= (1 << PSXINT_SPU_UPDATE);
+	psxRegs.intCycle[PSXINT_SPU_UPDATE].cycle = cycles_after;
+	psxRegs.intCycle[PSXINT_SPU_UPDATE].sCycle = psxRegs.cycle;
+	new_dyna_set_event(PSXINT_SPU_UPDATE, cycles_after);
+}
+
+void spuUpdate() {
+	SPU_async(psxRegs.cycle, 0);
+}
diff --git a/libpcsxcore/spu.h b/libpcsxcore/spu.h
index 85010cb..44a35d5 100644
--- a/libpcsxcore/spu.h
+++ b/libpcsxcore/spu.h
@@ -40,6 +40,8 @@ extern "C" {
 #define H_SPUoff2        0x0d8e
 
 void CALLBACK SPUirq(void);
+void CALLBACK SPUschedule(unsigned int cycles_after);
+void spuUpdate();
 
 #ifdef __cplusplus
 }