diff options
author | notaz | 2011-06-22 19:02:33 +0300 |
---|---|---|
committer | notaz | 2011-07-08 00:15:08 +0300 |
commit | 311301dc26918fcb95577247257380960f2313ba (patch) | |
tree | eed47a86e86429b8d1992c660b876e87b22d8dce /libpcsxcore | |
parent | 5a05d80c2ed15a50915dc7f820155893c4735e01 (diff) | |
download | pcsx_rearmed-311301dc26918fcb95577247257380960f2313ba.tar.gz pcsx_rearmed-311301dc26918fcb95577247257380960f2313ba.tar.bz2 pcsx_rearmed-311301dc26918fcb95577247257380960f2313ba.zip |
drc: merge Ari64's patch: 20_delay_slot_64bit_register_fix
Diffstat (limited to 'libpcsxcore')
-rw-r--r-- | libpcsxcore/new_dynarec/new_dynarec.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/libpcsxcore/new_dynarec/new_dynarec.c b/libpcsxcore/new_dynarec/new_dynarec.c index b0c0b4c..c1fa775 100644 --- a/libpcsxcore/new_dynarec/new_dynarec.c +++ b/libpcsxcore/new_dynarec/new_dynarec.c @@ -8688,7 +8688,9 @@ int new_recompile_block(int addr) } if(temp_is32!=current.is32) { //printf("dumping 32-bit regs (%x)\n",start+i*4); - #ifdef DESTRUCTIVE_WRITEBACK + #ifndef DESTRUCTIVE_WRITEBACK + if(ds) + #endif for(hr=0;hr<HOST_REGS;hr++) { int r=current.regmap[hr]; @@ -8700,7 +8702,6 @@ int new_recompile_block(int addr) } } } - #endif current.is32=temp_is32; } } |