diff options
| author | notaz | 2011-01-15 23:01:50 +0200 |
|---|---|---|
| committer | notaz | 2011-01-16 00:03:53 +0200 |
| commit | ca7c944853bbb689040c530655e2da231c40db5b (patch) | |
| tree | 7bf2b73e9e70c090051053045413a8d50515ff1e /libpcsxcore | |
| parent | e9fda093d29f703068dd3e5bae7a4b3683e33b5c (diff) | |
| download | pcsx_rearmed-ca7c944853bbb689040c530655e2da231c40db5b.tar.gz pcsx_rearmed-ca7c944853bbb689040c530655e2da231c40db5b.tar.bz2 pcsx_rearmed-ca7c944853bbb689040c530655e2da231c40db5b.zip | |
drc: fix a bug with loop reg allocation
Diffstat (limited to 'libpcsxcore')
| -rw-r--r-- | libpcsxcore/new_dynarec/new_dynarec.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/libpcsxcore/new_dynarec/new_dynarec.c b/libpcsxcore/new_dynarec/new_dynarec.c index f1a0def..680617a 100644 --- a/libpcsxcore/new_dynarec/new_dynarec.c +++ b/libpcsxcore/new_dynarec/new_dynarec.c @@ -9693,6 +9693,13 @@ int new_recompile_block(int addr) else f_regmap[hr]=-1; } else if(branch_regs[i].regmap[hr]>=0) f_regmap[hr]=branch_regs[i].regmap[hr]; + // make sure mapping hasn't changed + int hr2; + for(hr2=0;hr2<HOST_REGS;hr2++) + if(hr2!=hr&&f_regmap[hr]==branch_regs[i].regmap[hr2]) { + f_regmap[hr]=-1; + break; + } if(itype[i+1]==STORE||itype[i+1]==STORELR||itype[i+1]==C1LS ||itype[i+1]==SHIFT||itype[i+1]==COP1||itype[i+1]==FLOAT ||itype[i+1]==FCOMP||itype[i+1]==FCONV |