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| author | notaz | 2011-11-01 22:00:29 +0200 |
|---|---|---|
| committer | notaz | 2011-11-01 22:00:29 +0200 |
| commit | db481db412d4dd180c49507dff5b054852c9acbf (patch) | |
| tree | 45a3d9a83882c5d3bb2c72c013fe41dd043d59fb /libpcsxcore | |
| parent | ce89e68525ec029cd0d1f61013b0d9df77aba40d (diff) | |
| download | pcsx_rearmed-db481db412d4dd180c49507dff5b054852c9acbf.tar.gz pcsx_rearmed-db481db412d4dd180c49507dff5b054852c9acbf.tar.bz2 pcsx_rearmed-db481db412d4dd180c49507dff5b054852c9acbf.zip | |
drc/gte: fix dep list
Diffstat (limited to 'libpcsxcore')
| -rw-r--r-- | libpcsxcore/new_dynarec/emu_if.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/libpcsxcore/new_dynarec/emu_if.c b/libpcsxcore/new_dynarec/emu_if.c index 00af7f7..9011f9c 100644 --- a/libpcsxcore/new_dynarec/emu_if.c +++ b/libpcsxcore/new_dynarec/emu_if.c @@ -210,13 +210,13 @@ const uint64_t gte_reg_reads[64] = { [GTE_OP] = GCBITS3(0,2,4) | GDBITS3(9,10,11), [GTE_DPCS] = GCBITS3(21,22,23) | GDBITS4(6,8,21,22), [GTE_INTPL] = GCBITS3(21,22,23) | GDBITS7(6,8,9,10,11,21,22), - [GTE_MVMVA] = 0x00ffffff00000000ll | GDBITS6(0,1,2,3,4,5), // XXX: maybe decode further? - [GTE_NCDS] = 0x00ffff0000000000ll | GDBITS5(0,1,6,21,22), - [GTE_CDP] = 0x00fff00000000000ll | GDBITS7(6,8,9,10,11,21,22), + [GTE_MVMVA] = 0x00ffffff00000000ll | GDBITS9(0,1,2,3,4,5,9,10,11), // XXX: maybe decode further? + [GTE_NCDS] = 0x00ffff0000000000ll | GDBITS6(0,1,6,8,21,22), + [GTE_CDP] = 0x00ffe00000000000ll | GDBITS7(6,8,9,10,11,21,22), [GTE_NCDT] = 0x00ffff0000000000ll | GDBITS8(0,1,2,3,4,5,6,8), - [GTE_NCCS] = 0x00ffff0000000000ll | GDBITS6(0,1,6,8,21,22), + [GTE_NCCS] = 0x001fff0000000000ll | GDBITS5(0,1,6,21,22), [GTE_CC] = 0x001fe00000000000ll | GDBITS6(6,9,10,11,21,22), - [GTE_NCS] = 0x001fff0000000000ll | GDBITS4(0,1,21,22), + [GTE_NCS] = 0x001fff0000000000ll | GDBITS5(0,1,6,21,22), [GTE_NCT] = 0x001fff0000000000ll | GDBITS7(0,1,2,3,4,5,6), [GTE_SQR] = GDBITS3(9,10,11), [GTE_DCPL] = GCBITS3(21,22,23) | GDBITS7(6,8,9,10,11,21,22), |