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| author | notaz | 2011-06-22 17:46:24 +0300 |
|---|---|---|
| committer | notaz | 2011-07-08 00:15:07 +0300 |
| commit | e3234ecf9665738e35a749fbb9d4120f25a0c7cf (patch) | |
| tree | d6e539c850d146576652a0bb2b734056415df253 /libpcsxcore | |
| parent | 2a70696411b92af26a72c2b28212e4fe73cdd2d8 (diff) | |
| download | pcsx_rearmed-e3234ecf9665738e35a749fbb9d4120f25a0c7cf.tar.gz pcsx_rearmed-e3234ecf9665738e35a749fbb9d4120f25a0c7cf.tar.bz2 pcsx_rearmed-e3234ecf9665738e35a749fbb9d4120f25a0c7cf.zip | |
drc: merge Ari64's patch: 17_branch_target_liveness_analysis
Diffstat (limited to 'libpcsxcore')
| -rw-r--r-- | libpcsxcore/new_dynarec/new_dynarec.c | 15 |
1 files changed, 10 insertions, 5 deletions
diff --git a/libpcsxcore/new_dynarec/new_dynarec.c b/libpcsxcore/new_dynarec/new_dynarec.c index 9fdaa72..c6d83c2 100644 --- a/libpcsxcore/new_dynarec/new_dynarec.c +++ b/libpcsxcore/new_dynarec/new_dynarec.c @@ -7453,6 +7453,10 @@ void clean_registers(int istart,int iend,int wr) will_dirty_i|=will_dirty[(ba[i]-start)>>2]&(1<<r); wont_dirty_i|=wont_dirty[(ba[i]-start)>>2]&(1<<r); } + if(branch_regs[i].regmap[r]>=0) { + will_dirty_i|=((unneeded_reg[(ba[i]-start)>>2]>>(branch_regs[i].regmap[r]&63))&1)<<r; + wont_dirty_i|=((unneeded_reg[(ba[i]-start)>>2]>>(branch_regs[i].regmap[r]&63))&1)<<r; + } } } //} @@ -7482,13 +7486,14 @@ void clean_registers(int istart,int iend,int wr) //if(ba[i]>start+i*4) { // Disable recursion (for debugging) for(r=0;r<HOST_REGS;r++) { if(r!=EXCLUDE_REG) { - if(branch_regs[i].regmap[r]==regs[(ba[i]-start)>>2].regmap_entry[r]) { + signed char target_reg=branch_regs[i].regmap[r]; + if(target_reg==regs[(ba[i]-start)>>2].regmap_entry[r]) { will_dirty_i&=will_dirty[(ba[i]-start)>>2]&(1<<r); wont_dirty_i|=wont_dirty[(ba[i]-start)>>2]&(1<<r); } - else - { - will_dirty_i&=~(1<<r); + else if(target_reg>=0) { + will_dirty_i&=((unneeded_reg[(ba[i]-start)>>2]>>(target_reg&63))&1)<<r; + wont_dirty_i|=((unneeded_reg[(ba[i]-start)>>2]>>(target_reg&63))&1)<<r; } // Treat delay slot as part of branch too /*if(regs[i+1].regmap[r]==regs[(ba[i]-start)>>2].regmap_entry[r]) { @@ -7525,7 +7530,7 @@ void clean_registers(int istart,int iend,int wr) } } } - // Merge in delay slot + // Merge in delay slot (won't dirty) for(r=0;r<HOST_REGS;r++) { if(r!=EXCLUDE_REG) { if((regs[i].regmap[r]&63)==rt1[i]) wont_dirty_i|=1<<r; |