Merge pull request #443 from negativeExponent/add-header-guards

Add header guards

11 files changed, 52 insertions, 1 deletions

diff --git a/libpcsxcore/gpu.h b/libpcsxcore/gpu.h
index 63a5572..98a22a0 100644
--- a/libpcsxcore/gpu.h
+++ b/libpcsxcore/gpu.h
@@ -21,6 +21,9 @@
  *    that GPU plugin doesn't.
  */
 
+#ifndef __GPU_H__
+#define __GPU_H__
+
 #define PSXGPU_LCF     (1<<31)
 #define PSXGPU_nBUSY   (1<<26)
 #define PSXGPU_ILACE   (1<<22)
@@ -38,3 +41,5 @@
 	HW_GPU_STATUS &= PSXGPU_TIMING_BITS; \
 	HW_GPU_STATUS |= GPU_readStatus() & ~PSXGPU_TIMING_BITS; \
 }
+
+#endif /* __GPU_H__ */
diff --git a/libpcsxcore/gte_arm.h b/libpcsxcore/gte_arm.h
index 6b240db..0288944 100644
--- a/libpcsxcore/gte_arm.h
+++ b/libpcsxcore/gte_arm.h
@@ -15,6 +15,9 @@
  *  along with this program; if not, see <http://www.gnu.org/licenses>.
  */
 
+#ifndef __GTE_ARM_H__
+#define __GTE_ARM_H__
+
 void gteRTPS_nf_arm(void *cp2_regs, int opcode);
 void gteRTPT_nf_arm(void *cp2_regs, int opcode);
 void gteNCLIP_arm(void *cp2_regs, int opcode);
@@ -28,3 +31,5 @@ void gteMACtoIR_lm0(void *cp2_regs);
 void gteMACtoIR_lm1(void *cp2_regs);
 void gteMACtoIR_lm0_nf(void *cp2_regs);
 void gteMACtoIR_lm1_nf(void *cp2_regs);
+
+#endif /* __GTE_ARM_H__ */
diff --git a/libpcsxcore/gte_divider.h b/libpcsxcore/gte_divider.h
index 0c98826..a407213 100644
--- a/libpcsxcore/gte_divider.h
+++ b/libpcsxcore/gte_divider.h
@@ -15,4 +15,9 @@
  *  along with this program; if not, see <http://www.gnu.org/licenses>.
  */
 
+#ifndef __GTE_DIVIDER_H__
+#define __GTE_DIVIDER_H__
+
 u32 DIVIDE(s16 n, u16 d);
+
+#endif /* __GTE_DIVIDER_H__ */
diff --git a/libpcsxcore/gte_neon.h b/libpcsxcore/gte_neon.h
index 2fd9e4d..f371640 100644
--- a/libpcsxcore/gte_neon.h
+++ b/libpcsxcore/gte_neon.h
@@ -15,6 +15,9 @@
  *  along with this program; if not, see <http://www.gnu.org/licenses>.
  */
 
+#ifndef __GTE_NEON_H__
+#define __GTE_NEON_H__
+
 void gteRTPS_neon(void *cp2_regs, int opcode);
 void gteRTPT_neon(void *cp2_regs, int opcode);
 
@@ -23,3 +26,5 @@ void gteMVMVA_part_neon(void *cp2_regs, int opcode);
 
 // after NEON call only, does not do gteIR
 void gteMACtoIR_flags_neon(void *cp2_regs, int lm);
+
+#endif /* __GTE_NEON_H__ */
diff --git a/libpcsxcore/new_dynarec/arm/assem_arm.h b/libpcsxcore/new_dynarec/arm/assem_arm.h
index bb6114c..1dcc55f 100644
--- a/libpcsxcore/new_dynarec/arm/assem_arm.h
+++ b/libpcsxcore/new_dynarec/arm/assem_arm.h
@@ -1,3 +1,6 @@
+#ifndef __ASSEM_ARM_H__
+#define __ASSEM_ARM_H__
+
 #define HOST_REGS 13
 #define HOST_CCREG 10
 #define HOST_BTREG 8
@@ -55,3 +58,5 @@ extern char *invc_ptr;
   extern char translation_cache[1 << TARGET_SIZE_2];
   #define BASE_ADDR (u_int)translation_cache
 #endif
+
+#endif /* __ASSEM_ARM_H__ */
diff --git a/libpcsxcore/new_dynarec/arm/linkage_offsets.h b/libpcsxcore/new_dynarec/arm/linkage_offsets.h
index f7e1911..c7abff0 100644
--- a/libpcsxcore/new_dynarec/arm/linkage_offsets.h
+++ b/libpcsxcore/new_dynarec/arm/linkage_offsets.h
@@ -1,3 +1,5 @@
+#ifndef __LINKAGE_OFFSETS_H__
+#define __LINKAGE_OFFSETS_H__
 
 #define LO_next_interupt	64
 #define LO_cycle_count		(LO_next_interupt + 4)
@@ -39,3 +41,5 @@
 #define LO_FCR31		(LO_align0)
 
 #define LO_cop2_to_scratch_buf	(LO_scratch_buf_ptr - LO_reg_cop2d)
+
+#endif /* __LINKAGE_OFFSETS_H__ */
diff --git a/libpcsxcore/new_dynarec/backends/psx/emu_if.h b/libpcsxcore/new_dynarec/backends/psx/emu_if.h
index d8c7990..323764c 100644
--- a/libpcsxcore/new_dynarec/backends/psx/emu_if.h
+++ b/libpcsxcore/new_dynarec/backends/psx/emu_if.h
@@ -1,3 +1,6 @@
+#ifndef __EMU_IF_H__
+#define __EMU_IF_H__
+
 #include "../../new_dynarec.h"
 #include "../../../r3000a.h"
 
@@ -106,3 +109,5 @@ extern void SysPrintf(const char *fmt, ...);
 #else
 #define rdram ((u_int)psxM)
 #endif
+
+#endif /* __EMU_IF_H__ */
diff --git a/libpcsxcore/new_dynarec/backends/psx/pcsxmem.h b/libpcsxcore/new_dynarec/backends/psx/pcsxmem.h
index 72892a8..9d292a6 100644
--- a/libpcsxcore/new_dynarec/backends/psx/pcsxmem.h
+++ b/libpcsxcore/new_dynarec/backends/psx/pcsxmem.h
@@ -1,3 +1,5 @@
+#ifndef __PCSXMEM_H__
+#define __PCSXMEM_H__
 
 extern u8 zero_mem[0x1000];
 
@@ -7,3 +9,5 @@ void new_dyna_pcsx_mem_load_state(void);
 void new_dyna_pcsx_mem_shutdown(void);
 
 int pcsxmem_is_handler_dynamic(unsigned int addr);
+
+#endif /* __PCSXMEM_H__ */
diff --git a/libpcsxcore/new_dynarec/new_dynarec.h b/libpcsxcore/new_dynarec/new_dynarec.h
index d196f59..8c89051 100644
--- a/libpcsxcore/new_dynarec/new_dynarec.h
+++ b/libpcsxcore/new_dynarec/new_dynarec.h
@@ -1,3 +1,6 @@
+#ifndef __NEW_DYNAREC_H__
+#define __NEW_DYNAREC_H__
+
 /* #define NEW_DYNAREC 1 */
 
 extern int pcaddr;
@@ -20,3 +23,5 @@ void new_dynarec_load_blocks(const void *save, int size);
 
 void invalidate_all_pages(void);
 void invalidate_block(unsigned int block);
+
+#endif /* __NEW_DYNAREC_H__ */
diff --git a/libpcsxcore/new_dynarec/new_dynarec_config.h b/libpcsxcore/new_dynarec/new_dynarec_config.h
index d55f128..3b00780 100644
--- a/libpcsxcore/new_dynarec/new_dynarec_config.h
+++ b/libpcsxcore/new_dynarec/new_dynarec_config.h
@@ -1,4 +1,5 @@
-
+#ifndef __NEW_DYNAREC_CONFIG_H__
+#define __NEW_DYNAREC_CONFIG_H__
 
 #define CORTEX_A8_BRANCH_PREDICTION_HACK 1
 #define USE_MINI_HT 1
@@ -10,3 +11,5 @@
 #ifdef VITA
 #define BASE_ADDR_DYNAMIC 1
 #endif
+
+#endif /* __NEW_DYNAREC_CONFIG_H__ */
diff --git a/libpcsxcore/sjisfont.h b/libpcsxcore/sjisfont.h
index 105d624..0692648 100644
--- a/libpcsxcore/sjisfont.h
+++ b/libpcsxcore/sjisfont.h
@@ -21,6 +21,9 @@
 // Converted to binary format by Wei Mingzhi <whistler_wmz@users.sf.net>.
 //
 
+#ifndef __SJISFONT_H__
+#define __SJISFONT_H__
+
 const unsigned char font_8140[] = {
 	0x78, 0xda, 0xad, 0x3b, 0x3b, 0x90, 0x1b, 0xc9,
 	0x75, 0x3d, 0x9f, 0x05, 0x1a, 0xcb, 0xe1, 0x4e,
@@ -6954,3 +6957,5 @@ const unsigned char font_889f[] = {
 	0xeb, 0xe7, 0xa8, 0x89, 0x0a, 0x11, 0xbc, 0xbc,
 	0x33, 0xf9, 0xff, 0xe8, 0xc4, 0x21, 0xbf
 };
+
+#endif /* __SJISFONT_H__ */