pcsxr-1.9.92

author: PCSX* teams 2010-11-16 14:15:22 +0200
committer: Grazvydas Ignotas 2010-11-16 14:15:22 +0200
commit: ef79bbde537d6b9c745a7d86cb9df1d04c35590d (patch)
tree: ef8d2520dbb9e1e345b41b12c9959f300ca8fd10 /libpcsxcore
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pcsx_rearmed-ef79bbde537d6b9c745a7d86cb9df1d04c35590d.zip
73 files changed, 50938 insertions, 0 deletions
diff --git a/libpcsxcore/Makefile.am b/libpcsxcore/Makefile.am
new file mode 100644
index 0000000..6c0dae8
--- /dev/null
+++ b/libpcsxcore/Makefile.am
@@ -0,0 +1,84 @@
+INCLUDES = -DLOCALE_DIR=\"${datadir}/locale/\" \
+	-I$(top_srcdir)/include
+
+noinst_LIBRARIES = libpcsxcore.a
+
+libpcsxcore_a_SOURCES = \
+	$(top_builddir)/libpcsxcore/psxbios.c	\
+	$(top_builddir)/libpcsxcore/cdrom.c	\
+	$(top_builddir)/libpcsxcore/psxcounters.c	\
+	$(top_builddir)/libpcsxcore/psxdma.c	\
+	$(top_builddir)/libpcsxcore/disr3000a.c	\
+	$(top_builddir)/libpcsxcore/spu.c	\
+	$(top_builddir)/libpcsxcore/sio.c	\
+	$(top_builddir)/libpcsxcore/psxhw.c	\
+	$(top_builddir)/libpcsxcore/mdec.c	\
+	$(top_builddir)/libpcsxcore/psxmem.c	\
+	$(top_builddir)/libpcsxcore/misc.c	\
+	$(top_builddir)/libpcsxcore/plugins.c	\
+	$(top_builddir)/libpcsxcore/decode_xa.c	\
+	$(top_builddir)/libpcsxcore/r3000a.c	\
+	$(top_builddir)/libpcsxcore/psxinterpreter.c	\
+	$(top_builddir)/libpcsxcore/gte.c	\
+	$(top_builddir)/libpcsxcore/psxhle.c	\
+	$(top_builddir)/libpcsxcore/cdrom.h \
+	$(top_builddir)/libpcsxcore/coff.h \
+	$(top_builddir)/libpcsxcore/debug.c \
+	$(top_builddir)/libpcsxcore/debug.h \
+	$(top_builddir)/libpcsxcore/decode_xa.h \
+	$(top_builddir)/libpcsxcore/gte.h \
+	$(top_builddir)/libpcsxcore/gte_divider.h \
+	$(top_builddir)/libpcsxcore/mdec.h \
+	$(top_builddir)/libpcsxcore/misc.h \
+	$(top_builddir)/libpcsxcore/plugins.h \
+	$(top_builddir)/libpcsxcore/psemu_plugin_defs.h \
+	$(top_builddir)/libpcsxcore/psxbios.h \
+	$(top_builddir)/libpcsxcore/psxcommon.c \
+	$(top_builddir)/libpcsxcore/psxcommon.h \
+	$(top_builddir)/libpcsxcore/psxcounters.h \
+	$(top_builddir)/libpcsxcore/psxdma.h \
+	$(top_builddir)/libpcsxcore/psxhle.h \
+	$(top_builddir)/libpcsxcore/psxhw.h \
+	$(top_builddir)/libpcsxcore/psxmem.h \
+	$(top_builddir)/libpcsxcore/r3000a.h \
+	$(top_builddir)/libpcsxcore/sio.h \
+	$(top_builddir)/libpcsxcore/sjisfont.h \
+	$(top_builddir)/libpcsxcore/spu.h \
+	$(top_builddir)/libpcsxcore/system.h \
+	$(top_builddir)/libpcsxcore/cdriso.c \
+	$(top_builddir)/libpcsxcore/cdriso.h \
+	$(top_builddir)/libpcsxcore/cheat.c \
+	$(top_builddir)/libpcsxcore/cheat.h \
+	$(top_builddir)/libpcsxcore/socket.c \
+	$(top_builddir)/libpcsxcore/socket.h \
+	$(top_builddir)/libpcsxcore/ppf.c \
+	$(top_builddir)/libpcsxcore/ppf.h
+
+if ARCH_X86_64
+libpcsxcore_a_SOURCES += \
+	$(top_builddir)/libpcsxcore/ix86_64/iR3000A-64.c	\
+	$(top_builddir)/libpcsxcore/ix86_64/ix86-64.c	\
+	$(top_builddir)/libpcsxcore/ix86_64/ix86_cpudetect.c	\
+	$(top_builddir)/libpcsxcore/ix86_64/ix86_fpu.c	\
+	$(top_builddir)/libpcsxcore/ix86_64/ix86_3dnow.c	\
+	$(top_builddir)/libpcsxcore/ix86_64/ix86_mmx.c	\
+	$(top_builddir)/libpcsxcore/ix86_64/ix86_sse.c	\
+	$(top_builddir)/libpcsxcore/
+else		
+if ARCH_X86
+libpcsxcore_a_SOURCES += \
+	$(top_builddir)/libpcsxcore/ix86/iR3000A.c	\
+	$(top_builddir)/libpcsxcore/ix86/ix86.c	\
+	$(top_builddir)/libpcsxcore/
+endif
+endif
+
+if ARCH_PPC
+libpcsxcore_a_SOURCES += \
+	$(top_builddir)/libpcsxcore/ppc/pR3000A.c	\
+	$(top_builddir)/libpcsxcore/ppc/ppc.c	\
+	$(top_builddir)/libpcsxcore/ppc/reguse.c	\
+	$(top_builddir)/libpcsxcore/ppc/pasm.s	\
+	$(top_builddir)/libpcsxcore/
+libpcsxcore_a_CCASFLAGS = -x assembler-with-cpp -mregnames
+endif
diff --git a/libpcsxcore/Makefile.in b/libpcsxcore/Makefile.in
new file mode 100644
index 0000000..18721a5
--- /dev/null
+++ b/libpcsxcore/Makefile.in
@@ -0,0 +1,1174 @@
+# Makefile.in generated by automake 1.10.2 from Makefile.am.
+# @configure_input@
+
+# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
+# 2003, 2004, 2005, 2006, 2007, 2008  Free Software Foundation, Inc.
+# This Makefile.in is free software; the Free Software Foundation
+# gives unlimited permission to copy and/or distribute it,
+# with or without modifications, as long as this notice is preserved.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
+# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
+# PARTICULAR PURPOSE.
+
+@SET_MAKE@
+
+VPATH = @srcdir@
+pkgdatadir = $(datadir)/@PACKAGE@
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+host_triplet = @host@
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+@ARCH_X86_64_TRUE@am__append_1 = \
+@ARCH_X86_64_TRUE@	$(top_builddir)/libpcsxcore/ix86_64/iR3000A-64.c	\
+@ARCH_X86_64_TRUE@	$(top_builddir)/libpcsxcore/ix86_64/ix86-64.c	\
+@ARCH_X86_64_TRUE@	$(top_builddir)/libpcsxcore/ix86_64/ix86_cpudetect.c	\
+@ARCH_X86_64_TRUE@	$(top_builddir)/libpcsxcore/ix86_64/ix86_fpu.c	\
+@ARCH_X86_64_TRUE@	$(top_builddir)/libpcsxcore/ix86_64/ix86_3dnow.c	\
+@ARCH_X86_64_TRUE@	$(top_builddir)/libpcsxcore/ix86_64/ix86_mmx.c	\
+@ARCH_X86_64_TRUE@	$(top_builddir)/libpcsxcore/ix86_64/ix86_sse.c	\
+@ARCH_X86_64_TRUE@	$(top_builddir)/libpcsxcore/
+
+@ARCH_X86_64_FALSE@@ARCH_X86_TRUE@am__append_2 = \
+@ARCH_X86_64_FALSE@@ARCH_X86_TRUE@	$(top_builddir)/libpcsxcore/ix86/iR3000A.c	\
+@ARCH_X86_64_FALSE@@ARCH_X86_TRUE@	$(top_builddir)/libpcsxcore/ix86/ix86.c	\
+@ARCH_X86_64_FALSE@@ARCH_X86_TRUE@	$(top_builddir)/libpcsxcore/
+
+@ARCH_PPC_TRUE@am__append_3 = \
+@ARCH_PPC_TRUE@	$(top_builddir)/libpcsxcore/ppc/pR3000A.c	\
+@ARCH_PPC_TRUE@	$(top_builddir)/libpcsxcore/ppc/ppc.c	\
+@ARCH_PPC_TRUE@	$(top_builddir)/libpcsxcore/ppc/reguse.c	\
+@ARCH_PPC_TRUE@	$(top_builddir)/libpcsxcore/ppc/pasm.s	\
+@ARCH_PPC_TRUE@	$(top_builddir)/libpcsxcore/
+
+subdir = libpcsxcore
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+CONFIG_HEADER = $(top_builddir)/include/config.h
+CONFIG_CLEAN_FILES =
+LIBRARIES = $(noinst_LIBRARIES)
+ARFLAGS = cru
+libpcsxcore_a_AR = $(AR) $(ARFLAGS)
+libpcsxcore_a_LIBADD =
+am__libpcsxcore_a_SOURCES_DIST =  \
+	$(top_builddir)/libpcsxcore/psxbios.c \
+	$(top_builddir)/libpcsxcore/cdrom.c \
+	$(top_builddir)/libpcsxcore/psxcounters.c \
+	$(top_builddir)/libpcsxcore/psxdma.c \
+	$(top_builddir)/libpcsxcore/disr3000a.c \
+	$(top_builddir)/libpcsxcore/spu.c \
+	$(top_builddir)/libpcsxcore/sio.c \
+	$(top_builddir)/libpcsxcore/psxhw.c \
+	$(top_builddir)/libpcsxcore/mdec.c \
+	$(top_builddir)/libpcsxcore/psxmem.c \
+	$(top_builddir)/libpcsxcore/misc.c \
+	$(top_builddir)/libpcsxcore/plugins.c \
+	$(top_builddir)/libpcsxcore/decode_xa.c \
+	$(top_builddir)/libpcsxcore/r3000a.c \
+	$(top_builddir)/libpcsxcore/psxinterpreter.c \
+	$(top_builddir)/libpcsxcore/gte.c \
+	$(top_builddir)/libpcsxcore/psxhle.c \
+	$(top_builddir)/libpcsxcore/cdrom.h \
+	$(top_builddir)/libpcsxcore/coff.h \
+	$(top_builddir)/libpcsxcore/debug.c \
+	$(top_builddir)/libpcsxcore/debug.h \
+	$(top_builddir)/libpcsxcore/decode_xa.h \
+	$(top_builddir)/libpcsxcore/gte.h \
+	$(top_builddir)/libpcsxcore/gte_divider.h \
+	$(top_builddir)/libpcsxcore/mdec.h \
+	$(top_builddir)/libpcsxcore/misc.h \
+	$(top_builddir)/libpcsxcore/plugins.h \
+	$(top_builddir)/libpcsxcore/psemu_plugin_defs.h \
+	$(top_builddir)/libpcsxcore/psxbios.h \
+	$(top_builddir)/libpcsxcore/psxcommon.c \
+	$(top_builddir)/libpcsxcore/psxcommon.h \
+	$(top_builddir)/libpcsxcore/psxcounters.h \
+	$(top_builddir)/libpcsxcore/psxdma.h \
+	$(top_builddir)/libpcsxcore/psxhle.h \
+	$(top_builddir)/libpcsxcore/psxhw.h \
+	$(top_builddir)/libpcsxcore/psxmem.h \
+	$(top_builddir)/libpcsxcore/r3000a.h \
+	$(top_builddir)/libpcsxcore/sio.h \
+	$(top_builddir)/libpcsxcore/sjisfont.h \
+	$(top_builddir)/libpcsxcore/spu.h \
+	$(top_builddir)/libpcsxcore/system.h \
+	$(top_builddir)/libpcsxcore/cdriso.c \
+	$(top_builddir)/libpcsxcore/cdriso.h \
+	$(top_builddir)/libpcsxcore/cheat.c \
+	$(top_builddir)/libpcsxcore/cheat.h \
+	$(top_builddir)/libpcsxcore/socket.c \
+	$(top_builddir)/libpcsxcore/socket.h \
+	$(top_builddir)/libpcsxcore/ppf.c \
+	$(top_builddir)/libpcsxcore/ppf.h \
+	$(top_builddir)/libpcsxcore/ix86_64/iR3000A-64.c \
+	$(top_builddir)/libpcsxcore/ix86_64/ix86-64.c \
+	$(top_builddir)/libpcsxcore/ix86_64/ix86_cpudetect.c \
+	$(top_builddir)/libpcsxcore/ix86_64/ix86_fpu.c \
+	$(top_builddir)/libpcsxcore/ix86_64/ix86_3dnow.c \
+	$(top_builddir)/libpcsxcore/ix86_64/ix86_mmx.c \
+	$(top_builddir)/libpcsxcore/ix86_64/ix86_sse.c \
+	$(top_builddir)/libpcsxcore/ \
+	$(top_builddir)/libpcsxcore/ix86/iR3000A.c \
+	$(top_builddir)/libpcsxcore/ix86/ix86.c \
+	$(top_builddir)/libpcsxcore/ppc/pR3000A.c \
+	$(top_builddir)/libpcsxcore/ppc/ppc.c \
+	$(top_builddir)/libpcsxcore/ppc/reguse.c \
+	$(top_builddir)/libpcsxcore/ppc/pasm.s
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+	psxmem.$(OBJEXT) misc.$(OBJEXT) plugins.$(OBJEXT) \
+	decode_xa.$(OBJEXT) r3000a.$(OBJEXT) psxinterpreter.$(OBJEXT) \
+	gte.$(OBJEXT) psxhle.$(OBJEXT) debug.$(OBJEXT) \
+	psxcommon.$(OBJEXT) cdriso.$(OBJEXT) cheat.$(OBJEXT) \
+	socket.$(OBJEXT) ppf.$(OBJEXT) $(am__objects_1) \
+	$(am__objects_2) $(am__objects_3)
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+	$(top_builddir)/libpcsxcore/cdrom.c \
+	$(top_builddir)/libpcsxcore/psxcounters.c \
+	$(top_builddir)/libpcsxcore/psxdma.c \
+	$(top_builddir)/libpcsxcore/disr3000a.c \
+	$(top_builddir)/libpcsxcore/spu.c \
+	$(top_builddir)/libpcsxcore/sio.c \
+	$(top_builddir)/libpcsxcore/psxhw.c \
+	$(top_builddir)/libpcsxcore/mdec.c \
+	$(top_builddir)/libpcsxcore/psxmem.c \
+	$(top_builddir)/libpcsxcore/misc.c \
+	$(top_builddir)/libpcsxcore/plugins.c \
+	$(top_builddir)/libpcsxcore/decode_xa.c \
+	$(top_builddir)/libpcsxcore/r3000a.c \
+	$(top_builddir)/libpcsxcore/psxinterpreter.c \
+	$(top_builddir)/libpcsxcore/gte.c \
+	$(top_builddir)/libpcsxcore/psxhle.c \
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+@AMDEP_TRUE@@am__fastdepCC_FALSE@	source='$(top_builddir)/libpcsxcore/ppc/pR3000A.c' object='pR3000A.o' libtool=no @AMDEPBACKSLASH@
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+
+pR3000A.obj: $(top_builddir)/libpcsxcore/ppc/pR3000A.c
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+@am__fastdepCC_TRUE@	mv -f $(DEPDIR)/pR3000A.Tpo $(DEPDIR)/pR3000A.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@	source='$(top_builddir)/libpcsxcore/ppc/pR3000A.c' object='pR3000A.obj' libtool=no @AMDEPBACKSLASH@
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+
+ppc.o: $(top_builddir)/libpcsxcore/ppc/ppc.c
+@am__fastdepCC_TRUE@	$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT ppc.o -MD -MP -MF $(DEPDIR)/ppc.Tpo -c -o ppc.o `test -f '$(top_builddir)/libpcsxcore/ppc/ppc.c' || echo '$(srcdir)/'`$(top_builddir)/libpcsxcore/ppc/ppc.c
+@am__fastdepCC_TRUE@	mv -f $(DEPDIR)/ppc.Tpo $(DEPDIR)/ppc.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@	source='$(top_builddir)/libpcsxcore/ppc/ppc.c' object='ppc.o' libtool=no @AMDEPBACKSLASH@
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+
+ppc.obj: $(top_builddir)/libpcsxcore/ppc/ppc.c
+@am__fastdepCC_TRUE@	$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT ppc.obj -MD -MP -MF $(DEPDIR)/ppc.Tpo -c -o ppc.obj `if test -f '$(top_builddir)/libpcsxcore/ppc/ppc.c'; then $(CYGPATH_W) '$(top_builddir)/libpcsxcore/ppc/ppc.c'; else $(CYGPATH_W) '$(srcdir)/$(top_builddir)/libpcsxcore/ppc/ppc.c'; fi`
+@am__fastdepCC_TRUE@	mv -f $(DEPDIR)/ppc.Tpo $(DEPDIR)/ppc.Po
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+
+reguse.o: $(top_builddir)/libpcsxcore/ppc/reguse.c
+@am__fastdepCC_TRUE@	$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT reguse.o -MD -MP -MF $(DEPDIR)/reguse.Tpo -c -o reguse.o `test -f '$(top_builddir)/libpcsxcore/ppc/reguse.c' || echo '$(srcdir)/'`$(top_builddir)/libpcsxcore/ppc/reguse.c
+@am__fastdepCC_TRUE@	mv -f $(DEPDIR)/reguse.Tpo $(DEPDIR)/reguse.Po
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+
+reguse.obj: $(top_builddir)/libpcsxcore/ppc/reguse.c
+@am__fastdepCC_TRUE@	$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT reguse.obj -MD -MP -MF $(DEPDIR)/reguse.Tpo -c -o reguse.obj `if test -f '$(top_builddir)/libpcsxcore/ppc/reguse.c'; then $(CYGPATH_W) '$(top_builddir)/libpcsxcore/ppc/reguse.c'; else $(CYGPATH_W) '$(srcdir)/$(top_builddir)/libpcsxcore/ppc/reguse.c'; fi`
+@am__fastdepCC_TRUE@	mv -f $(DEPDIR)/reguse.Tpo $(DEPDIR)/reguse.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@	source='$(top_builddir)/libpcsxcore/ppc/reguse.c' object='reguse.obj' libtool=no @AMDEPBACKSLASH@
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+
+.s.o:
+	$(CCASCOMPILE) -c -o $@ $<
+
+.s.obj:
+	$(CCASCOMPILE) -c -o $@ `$(CYGPATH_W) '$<'`
+
+.s.lo:
+	$(LTCCASCOMPILE) -c -o $@ $<
+
+libpcsxcore_a-pasm.o: $(top_builddir)/libpcsxcore/ppc/pasm.s
+	$(CCAS) $(libpcsxcore_a_CCASFLAGS) $(CCASFLAGS) -c -o libpcsxcore_a-pasm.o `test -f '$(top_builddir)/libpcsxcore/ppc/pasm.s' || echo '$(srcdir)/'`$(top_builddir)/libpcsxcore/ppc/pasm.s
+
+libpcsxcore_a-pasm.obj: $(top_builddir)/libpcsxcore/ppc/pasm.s
+	$(CCAS) $(libpcsxcore_a_CCASFLAGS) $(CCASFLAGS) -c -o libpcsxcore_a-pasm.obj `if test -f '$(top_builddir)/libpcsxcore/ppc/pasm.s'; then $(CYGPATH_W) '$(top_builddir)/libpcsxcore/ppc/pasm.s'; else $(CYGPATH_W) '$(srcdir)/$(top_builddir)/libpcsxcore/ppc/pasm.s'; fi`
+
+mostlyclean-libtool:
+	-rm -f *.lo
+
+clean-libtool:
+	-rm -rf .libs _libs
+
+ID: $(HEADERS) $(SOURCES) $(LISP) $(TAGS_FILES)
+	list='$(SOURCES) $(HEADERS) $(LISP) $(TAGS_FILES)'; \
+	unique=`for i in $$list; do \
+	    if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
+	  done | \
+	  $(AWK) '{ files[$$0] = 1; nonempty = 1; } \
+	      END { if (nonempty) { for (i in files) print i; }; }'`; \
+	mkid -fID $$unique
+tags: TAGS
+
+TAGS:  $(HEADERS) $(SOURCES)  $(TAGS_DEPENDENCIES) \
+		$(TAGS_FILES) $(LISP)
+	tags=; \
+	here=`pwd`; \
+	list='$(SOURCES) $(HEADERS)  $(LISP) $(TAGS_FILES)'; \
+	unique=`for i in $$list; do \
+	    if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
+	  done | \
+	  $(AWK) '{ files[$$0] = 1; nonempty = 1; } \
+	      END { if (nonempty) { for (i in files) print i; }; }'`; \
+	if test -z "$(ETAGS_ARGS)$$tags$$unique"; then :; else \
+	  test -n "$$unique" || unique=$$empty_fix; \
+	  $(ETAGS) $(ETAGSFLAGS) $(AM_ETAGSFLAGS) $(ETAGS_ARGS) \
+	    $$tags $$unique; \
+	fi
+ctags: CTAGS
+CTAGS:  $(HEADERS) $(SOURCES)  $(TAGS_DEPENDENCIES) \
+		$(TAGS_FILES) $(LISP)
+	tags=; \
+	list='$(SOURCES) $(HEADERS)  $(LISP) $(TAGS_FILES)'; \
+	unique=`for i in $$list; do \
+	    if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
+	  done | \
+	  $(AWK) '{ files[$$0] = 1; nonempty = 1; } \
+	      END { if (nonempty) { for (i in files) print i; }; }'`; \
+	test -z "$(CTAGS_ARGS)$$tags$$unique" \
+	  || $(CTAGS) $(CTAGSFLAGS) $(AM_CTAGSFLAGS) $(CTAGS_ARGS) \
+	     $$tags $$unique
+
+GTAGS:
+	here=`$(am__cd) $(top_builddir) && pwd` \
+	  && cd $(top_srcdir) \
+	  && gtags -i $(GTAGS_ARGS) $$here
+
+distclean-tags:
+	-rm -f TAGS ID GTAGS GRTAGS GSYMS GPATH tags
+
+distdir: $(DISTFILES)
+	@srcdirstrip=`echo "$(srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \
+	topsrcdirstrip=`echo "$(top_srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \
+	list='$(DISTFILES)'; \
+	  dist_files=`for file in $$list; do echo $$file; done | \
+	  sed -e "s|^$$srcdirstrip/||;t" \
+	      -e "s|^$$topsrcdirstrip/|$(top_builddir)/|;t"`; \
+	case $$dist_files in \
+	  */*) $(MKDIR_P) `echo "$$dist_files" | \
+			   sed '/\//!d;s|^|$(distdir)/|;s,/[^/]*$$,,' | \
+			   sort -u` ;; \
+	esac; \
+	for file in $$dist_files; do \
+	  if test -f $$file || test -d $$file; then d=.; else d=$(srcdir); fi; \
+	  if test -d $$d/$$file; then \
+	    dir=`echo "/$$file" | sed -e 's,/[^/]*$$,,'`; \
+	    if test -d $(srcdir)/$$file && test $$d != $(srcdir); then \
+	      cp -pR $(srcdir)/$$file $(distdir)$$dir || exit 1; \
+	    fi; \
+	    cp -pR $$d/$$file $(distdir)$$dir || exit 1; \
+	  else \
+	    test -f $(distdir)/$$file \
+	    || cp -p $$d/$$file $(distdir)/$$file \
+	    || exit 1; \
+	  fi; \
+	done
+check-am: all-am
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+
+installcheck: installcheck-am
+install-strip:
+	$(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
+	  install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
+	  `test -z '$(STRIP)' || \
+	    echo "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'"` install
+mostlyclean-generic:
+
+clean-generic:
+
+distclean-generic:
+	-test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES)
+
+maintainer-clean-generic:
+	@echo "This command is intended for maintainers to use"
+	@echo "it deletes files that may require special tools to rebuild."
+clean: clean-am
+
+clean-am: clean-generic clean-libtool clean-noinstLIBRARIES \
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+	-rm -rf ./$(DEPDIR)
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+.MAKE: install-am install-strip
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+.PHONY: CTAGS GTAGS all all-am check check-am clean clean-generic \
+	clean-libtool clean-noinstLIBRARIES ctags distclean \
+	distclean-compile distclean-generic distclean-libtool \
+	distclean-tags distdir dvi dvi-am html html-am info info-am \
+	install install-am install-data install-data-am install-dvi \
+	install-dvi-am install-exec install-exec-am install-html \
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+# Tell versions [3.59,3.63) of GNU make to not export all variables.
+# Otherwise a system limit (for SysV at least) may be exceeded.
+.NOEXPORT:
diff --git a/libpcsxcore/cdriso.c b/libpcsxcore/cdriso.c
new file mode 100644
index 0000000..18b0de9
--- /dev/null
+++ b/libpcsxcore/cdriso.c
@@ -0,0 +1,881 @@
+/***************************************************************************
+ *   Copyright (C) 2007 PCSX-df Team                                       *
+ *   Copyright (C) 2009 Wei Mingzhi                                        *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+#include "psxcommon.h"
+#include "plugins.h"
+#include "cdrom.h"
+#include "cdriso.h"
+
+#ifdef _WIN32
+#include <process.h>
+#include <windows.h>
+#else
+#include <pthread.h>
+#include <sys/time.h>
+#endif
+
+static FILE *cdHandle = NULL;
+static FILE *cddaHandle = NULL;
+static FILE *subHandle = NULL;
+
+static boolean subChanMixed = FALSE;
+static boolean subChanRaw = FALSE;
+
+static unsigned char cdbuffer[DATA_SIZE];
+static unsigned char subbuffer[SUB_FRAMESIZE];
+
+static unsigned char sndbuffer[CD_FRAMESIZE_RAW * 10];
+
+#define CDDA_FRAMETIME			(1000 * (sizeof(sndbuffer) / CD_FRAMESIZE_RAW) / 75)
+
+#ifdef _WIN32
+static HANDLE threadid;
+#else
+static pthread_t threadid;
+#endif
+static unsigned int initial_offset = 0;
+static volatile boolean playing = FALSE;
+static boolean cddaBigEndian = FALSE;
+static volatile unsigned int cddaCurOffset = 0;
+
+char* CALLBACK CDR__getDriveLetter(void);
+long CALLBACK CDR__configure(void);
+long CALLBACK CDR__test(void);
+void CALLBACK CDR__about(void);
+long CALLBACK CDR__setfilename(char *filename);
+long CALLBACK CDR__getStatus(struct CdrStat *stat);
+
+extern void *hCDRDriver;
+
+struct trackinfo {
+	enum {DATA, CDDA} type;
+	char start[3];		// MSF-format
+	char length[3];		// MSF-format
+};
+
+#define MAXTRACKS 100 /* How many tracks can a CD hold? */
+
+static int numtracks = 0;
+static struct trackinfo ti[MAXTRACKS];
+
+// get a sector from a msf-array
+static unsigned int msf2sec(char *msf) {
+	return ((msf[0] * 60 + msf[1]) * 75) + msf[2];
+}
+
+static void sec2msf(unsigned int s, char *msf) {
+	msf[0] = s / 75 / 60;
+	s = s - msf[0] * 75 * 60;
+	msf[1] = s / 75;
+	s = s - msf[1] * 75;
+	msf[2] = s;
+}
+
+// divide a string of xx:yy:zz into m, s, f
+static void tok2msf(char *time, char *msf) {
+	char *token;
+
+	token = strtok(time, ":");
+	if (token) {
+		msf[0] = atoi(token);
+	}
+	else {
+		msf[0] = 0;
+	}
+
+	token = strtok(NULL, ":");
+	if (token) {
+		msf[1] = atoi(token);
+	}
+	else {
+		msf[1] = 0;
+	}
+
+	token = strtok(NULL, ":");
+	if (token) {
+		msf[2] = atoi(token);
+	}
+	else {
+		msf[2] = 0;
+	}
+}
+
+#ifndef _WIN32
+static long GetTickCount(void) {
+	static time_t		initial_time = 0;
+	struct timeval		now;
+
+	gettimeofday(&now, NULL);
+
+	if (initial_time == 0) {
+		initial_time = now.tv_sec;
+	}
+
+	return (now.tv_sec - initial_time) * 1000L + now.tv_usec / 1000L;
+}
+#endif
+
+// this thread plays audio data
+#ifdef _WIN32
+static void playthread(void *param)
+#else
+static void *playthread(void *param)
+#endif
+{
+	long			d, t, i, s;
+	unsigned char	tmp;
+
+	t = GetTickCount();
+
+	while (playing) {
+		d = t - (long)GetTickCount();
+		if (d <= 0) {
+			d = 1;
+		}
+		else if (d > CDDA_FRAMETIME) {
+			d = CDDA_FRAMETIME;
+		}
+#ifdef _WIN32
+		Sleep(d);
+#else
+		usleep(d * 1000);
+#endif
+
+		t = GetTickCount() + CDDA_FRAMETIME;
+
+		if (subChanMixed) {
+			s = 0;
+
+			for (i = 0; i < sizeof(sndbuffer) / CD_FRAMESIZE_RAW; i++) {
+				// read one sector
+				d = fread(sndbuffer + CD_FRAMESIZE_RAW * i, 1, CD_FRAMESIZE_RAW, cddaHandle);
+				if (d < CD_FRAMESIZE_RAW) {
+					break;
+				}
+
+				s += d;
+
+				// skip the subchannel data
+				fseek(cddaHandle, SUB_FRAMESIZE, SEEK_CUR);
+			}
+		}
+		else {
+			s = fread(sndbuffer, 1, sizeof(sndbuffer), cddaHandle);
+		}
+
+		if (s == 0) {
+			playing = FALSE;
+			fclose(cddaHandle);
+			cddaHandle = NULL;
+			initial_offset = 0;
+			break;
+		}
+
+		if (!cdr.Muted && playing) {
+			if (cddaBigEndian) {
+				for (i = 0; i < s / 2; i++) {
+					tmp = sndbuffer[i * 2];
+					sndbuffer[i * 2] = sndbuffer[i * 2 + 1];
+					sndbuffer[i * 2 + 1] = tmp;
+				}
+			}
+
+			SPU_playCDDAchannel((short *)sndbuffer, s);
+		}
+
+		cddaCurOffset += s;
+	}
+
+#ifdef _WIN32
+	_endthread();
+#else
+	pthread_exit(0);
+	return NULL;
+#endif
+}
+
+// stop the CDDA playback
+static void stopCDDA() {
+	if (!playing) {
+		return;
+	}
+
+	playing = FALSE;
+#ifdef _WIN32
+	WaitForSingleObject(threadid, INFINITE);
+#else
+	pthread_join(threadid, NULL);
+#endif
+
+	if (cddaHandle != NULL) {
+		fclose(cddaHandle);
+		cddaHandle = NULL;
+	}
+
+	initial_offset = 0;
+}
+
+// start the CDDA playback
+static void startCDDA(unsigned int offset) {
+	if (playing) {
+		if (initial_offset == offset) {
+			return;
+		}
+		stopCDDA();
+	}
+
+	cddaHandle = fopen(GetIsoFile(), "rb");
+	if (cddaHandle == NULL) {
+		return;
+	}
+
+	initial_offset = offset;
+	cddaCurOffset = initial_offset;
+	fseek(cddaHandle, initial_offset, SEEK_SET);
+
+	playing = TRUE;
+
+#ifdef _WIN32
+	threadid = (HANDLE)_beginthread(playthread, 0, NULL);
+#else
+	pthread_create(&threadid, NULL, playthread, NULL);
+#endif
+}
+
+// this function tries to get the .toc file of the given .bin
+// the necessary data is put into the ti (trackinformation)-array
+static int parsetoc(const char *isofile) {
+	char			tocname[MAXPATHLEN];
+	FILE			*fi;
+	char			linebuf[256], dummy[256], name[256];
+	char			*token;
+	char			time[20], time2[20];
+	unsigned int	t;
+
+	numtracks = 0;
+
+	// copy name of the iso and change extension from .bin to .toc
+	strncpy(tocname, isofile, sizeof(tocname));
+	tocname[MAXPATHLEN - 1] = '\0';
+	if (strlen(tocname) >= 4) {
+		strcpy(tocname + strlen(tocname) - 4, ".toc");
+	}
+	else {
+		return -1;
+	}
+
+	if ((fi = fopen(tocname, "r")) == NULL) {
+		// try changing extension to .cue (to satisfy some stupid tutorials)
+		strcpy(tocname + strlen(tocname) - 4, ".cue");
+		if ((fi = fopen(tocname, "r")) == NULL) {
+			// if filename is image.toc.bin, try removing .bin (for Brasero)
+			strcpy(tocname, isofile);
+			t = strlen(tocname);
+			if (t >= 8 && strcmp(tocname + t - 8, ".toc.bin") == 0) {
+				tocname[t - 4] = '\0';
+				if ((fi = fopen(tocname, "r")) == NULL) {
+					return -1;
+				}
+			}
+			else {
+				return -1;
+			}
+		}
+	}
+
+	memset(&ti, 0, sizeof(ti));
+	cddaBigEndian = TRUE; // cdrdao uses big-endian for CD Audio
+
+	// parse the .toc file
+	while (fgets(linebuf, sizeof(linebuf), fi) != NULL) {
+		// search for tracks
+		strncpy(dummy, linebuf, sizeof(linebuf));
+		token = strtok(dummy, " ");
+
+		if (token == NULL) continue;
+
+		if (!strcmp(token, "TRACK")) {
+			// get type of track
+			token = strtok(NULL, " ");
+			numtracks++;
+
+			if (!strncmp(token, "MODE2_RAW", 9)) {
+				ti[numtracks].type = DATA;
+				sec2msf(2 * 75, ti[numtracks].start); // assume data track on 0:2:0
+
+				// check if this image contains mixed subchannel data
+				token = strtok(NULL, " ");
+				if (token != NULL && !strncmp(token, "RW_RAW", 6)) {
+					subChanMixed = TRUE;
+					subChanRaw = TRUE;
+				}
+			}
+			else if (!strncmp(token, "AUDIO", 5)) {
+				ti[numtracks].type = CDDA;
+			}
+		}
+		else if (!strcmp(token, "DATAFILE")) {
+			if (ti[numtracks].type == CDDA) {
+				sscanf(linebuf, "DATAFILE \"%[^\"]\" #%d %8s", name, &t, time2);
+				t /= CD_FRAMESIZE_RAW + (subChanMixed ? SUB_FRAMESIZE : 0);
+				t += 2 * 75;
+				sec2msf(t, (char *)&ti[numtracks].start);
+				tok2msf((char *)&time2, (char *)&ti[numtracks].length);
+			}
+			else {
+				sscanf(linebuf, "DATAFILE \"%[^\"]\" %8s", name, time);
+				tok2msf((char *)&time, (char *)&ti[numtracks].length);
+			}
+		}
+		else if (!strcmp(token, "FILE")) {
+			sscanf(linebuf, "FILE \"%[^\"]\" #%d %8s %8s", name, &t, time, time2);
+			tok2msf((char *)&time, (char *)&ti[numtracks].start);
+			t /= CD_FRAMESIZE_RAW + (subChanMixed ? SUB_FRAMESIZE : 0);
+			t += msf2sec(ti[numtracks].start) + 2 * 75;
+			sec2msf(t, (char *)&ti[numtracks].start);
+			tok2msf((char *)&time2, (char *)&ti[numtracks].length);
+		}
+	}
+
+	fclose(fi);
+
+	return 0;
+}
+
+// this function tries to get the .cue file of the given .bin
+// the necessary data is put into the ti (trackinformation)-array
+static int parsecue(const char *isofile) {
+	char			cuename[MAXPATHLEN];
+	FILE			*fi;
+	char			*token;
+	char			time[20];
+	char			*tmp;
+	char			linebuf[256], dummy[256];
+	unsigned int	t;
+
+	numtracks = 0;
+
+	// copy name of the iso and change extension from .bin to .cue
+	strncpy(cuename, isofile, sizeof(cuename));
+	cuename[MAXPATHLEN - 1] = '\0';
+	if (strlen(cuename) >= 4) {
+		strcpy(cuename + strlen(cuename) - 4, ".cue");
+	}
+	else {
+		return -1;
+	}
+
+	if ((fi = fopen(cuename, "r")) == NULL) {
+		return -1;
+	}
+
+	// Some stupid tutorials wrongly tell users to use cdrdao to rip a
+	// "bin/cue" image, which is in fact a "bin/toc" image. So let's check
+	// that...
+	if (fgets(linebuf, sizeof(linebuf), fi) != NULL) {
+		if (!strncmp(linebuf, "CD_ROM_XA", 9)) {
+			// Don't proceed further, as this is actually a .toc file rather
+			// than a .cue file.
+			fclose(fi);
+			return parsetoc(isofile);
+		}
+		fseek(fi, 0, SEEK_SET);
+	}
+
+	memset(&ti, 0, sizeof(ti));
+
+	while (fgets(linebuf, sizeof(linebuf), fi) != NULL) {
+		strncpy(dummy, linebuf, sizeof(linebuf));
+		token = strtok(dummy, " ");
+
+		if (token == NULL) {
+			continue;
+		}
+
+		if (!strcmp(token, "TRACK")){
+			numtracks++;
+
+			if (strstr(linebuf, "AUDIO") != NULL) {
+				ti[numtracks].type = CDDA;
+			}
+			else if (strstr(linebuf, "MODE1/2352") != NULL || strstr(linebuf, "MODE2/2352") != NULL) {
+				ti[numtracks].type = DATA;
+			}
+		}
+		else if (!strcmp(token, "INDEX")) {
+			tmp = strstr(linebuf, "INDEX");
+			if (tmp != NULL) {
+				tmp += strlen("INDEX") + 3; // 3 - space + numeric index
+				while (*tmp == ' ') tmp++;
+				if (*tmp != '\n') sscanf(tmp, "%8s", time);
+			}
+
+			tok2msf((char *)&time, (char *)&ti[numtracks].start);
+
+			t = msf2sec(ti[numtracks].start) + 2 * 75;
+			sec2msf(t, ti[numtracks].start);
+
+			// If we've already seen another track, this is its end
+			if (numtracks > 1) {
+				t = msf2sec(ti[numtracks].start) - msf2sec(ti[numtracks - 1].start);
+				sec2msf(t, ti[numtracks - 1].length);
+			}
+		}
+	}
+
+	fclose(fi);
+
+	// Fill out the last track's end based on size
+	if (numtracks >= 1) {
+		fseek(cdHandle, 0, SEEK_END);
+		t = ftell(cdHandle) / 2352 - msf2sec(ti[numtracks].start) + 2 * 75;
+		sec2msf(t, ti[numtracks].length);
+	}
+
+	return 0;
+}
+
+// this function tries to get the .ccd file of the given .img
+// the necessary data is put into the ti (trackinformation)-array
+static int parseccd(const char *isofile) {
+	char			ccdname[MAXPATHLEN];
+	FILE			*fi;
+	char			linebuf[256];
+	unsigned int	t;
+
+	numtracks = 0;
+
+	// copy name of the iso and change extension from .img to .ccd
+	strncpy(ccdname, isofile, sizeof(ccdname));
+	ccdname[MAXPATHLEN - 1] = '\0';
+	if (strlen(ccdname) >= 4) {
+		strcpy(ccdname + strlen(ccdname) - 4, ".ccd");
+	}
+	else {
+		return -1;
+	}
+
+	if ((fi = fopen(ccdname, "r")) == NULL) {
+		return -1;
+	}
+
+	memset(&ti, 0, sizeof(ti));
+
+	while (fgets(linebuf, sizeof(linebuf), fi) != NULL) {
+		if (!strncmp(linebuf, "[TRACK", 6)){
+			numtracks++;
+		}
+		else if (!strncmp(linebuf, "MODE=", 5)) {
+			sscanf(linebuf, "MODE=%d", &t);
+			ti[numtracks].type = ((t == 0) ? CDDA : DATA);
+		}
+		else if (!strncmp(linebuf, "INDEX 1=", 8)) {
+			sscanf(linebuf, "INDEX 1=%d", &t);
+			sec2msf(t + 2 * 75, ti[numtracks].start);
+
+			// If we've already seen another track, this is its end
+			if (numtracks > 1) {
+				t = msf2sec(ti[numtracks].start) - msf2sec(ti[numtracks - 1].start);
+				sec2msf(t, ti[numtracks - 1].length);
+			}
+		}
+	}
+
+	fclose(fi);
+
+	// Fill out the last track's end based on size
+	if (numtracks >= 1) {
+		fseek(cdHandle, 0, SEEK_END);
+		t = ftell(cdHandle) / 2352 - msf2sec(ti[numtracks].start) + 2 * 75;
+		sec2msf(t, ti[numtracks].length);
+	}
+
+	return 0;
+}
+
+// this function tries to get the .mds file of the given .mdf
+// the necessary data is put into the ti (trackinformation)-array
+static int parsemds(const char *isofile) {
+	char			mdsname[MAXPATHLEN];
+	FILE			*fi;
+	unsigned int	offset, extra_offset, l, i;
+	unsigned short	s;
+
+	numtracks = 0;
+
+	// copy name of the iso and change extension from .mdf to .mds
+	strncpy(mdsname, isofile, sizeof(mdsname));
+	mdsname[MAXPATHLEN - 1] = '\0';
+	if (strlen(mdsname) >= 4) {
+		strcpy(mdsname + strlen(mdsname) - 4, ".mds");
+	}
+	else {
+		return -1;
+	}
+
+	if ((fi = fopen(mdsname, "rb")) == NULL) {
+		return -1;
+	}
+
+	memset(&ti, 0, sizeof(ti));
+
+	// check if it's a valid mds file
+	fread(&i, 1, sizeof(unsigned int), fi);
+	i = SWAP32(i);
+	if (i != 0x4944454D) {
+		// not an valid mds file
+		fclose(fi);
+		return -1;
+	}
+
+	// get offset to session block
+	fseek(fi, 0x50, SEEK_SET);
+	fread(&offset, 1, sizeof(unsigned int), fi);
+	offset = SWAP32(offset);
+
+	// get total number of tracks
+	offset += 14;
+	fseek(fi, offset, SEEK_SET);
+	fread(&s, 1, sizeof(unsigned short), fi);
+	s = SWAP16(s);
+	numtracks = s;
+
+	// get offset to track blocks
+	fseek(fi, 4, SEEK_CUR);
+	fread(&offset, 1, sizeof(unsigned int), fi);
+	offset = SWAP32(offset);
+
+	// skip lead-in data
+	while (1) {
+		fseek(fi, offset + 4, SEEK_SET);
+		if (fgetc(fi) < 0xA0) {
+			break;
+		}
+		offset += 0x50;
+	}
+
+	// check if the image contains mixed subchannel data
+	fseek(fi, offset + 1, SEEK_SET);
+	subChanMixed = (fgetc(fi) ? TRUE : FALSE);
+
+	// read track data
+	for (i = 1; i <= numtracks; i++) {
+		fseek(fi, offset, SEEK_SET);
+
+		// get the track type
+		ti[i].type = ((fgetc(fi) == 0xA9) ? CDDA : DATA);
+		fseek(fi, 8, SEEK_CUR);
+
+		// get the track starting point
+		ti[i].start[0] = fgetc(fi);
+		ti[i].start[1] = fgetc(fi);
+		ti[i].start[2] = fgetc(fi);
+
+		if (i > 1) {
+			l = msf2sec(ti[i].start);
+			sec2msf(l - 2 * 75, ti[i].start); // ???
+		}
+
+		// get the track length
+		fread(&extra_offset, 1, sizeof(unsigned int), fi);
+		extra_offset = SWAP32(extra_offset);
+
+		fseek(fi, extra_offset + 4, SEEK_SET);
+		fread(&l, 1, sizeof(unsigned int), fi);
+		l = SWAP32(l);
+		sec2msf(l, ti[i].length);
+
+		offset += 0x50;
+	}
+
+	fclose(fi);
+	return 0;
+}
+
+// this function tries to get the .sub file of the given .img
+static int opensubfile(const char *isoname) {
+	char		subname[MAXPATHLEN];
+
+	// copy name of the iso and change extension from .img to .sub
+	strncpy(subname, isoname, sizeof(subname));
+	subname[MAXPATHLEN - 1] = '\0';
+	if (strlen(subname) >= 4) {
+		strcpy(subname + strlen(subname) - 4, ".sub");
+	}
+	else {
+		return -1;
+	}
+
+	subHandle = fopen(subname, "rb");
+	if (subHandle == NULL) {
+		return -1;
+	}
+
+	return 0;
+}
+
+static long CALLBACK ISOinit(void) {
+	assert(cdHandle == NULL);
+	assert(subHandle == NULL);
+
+	return 0; // do nothing
+}
+
+static long CALLBACK ISOshutdown(void) {
+	if (cdHandle != NULL) {
+		fclose(cdHandle);
+		cdHandle = NULL;
+	}
+	if (subHandle != NULL) {
+		fclose(subHandle);
+		subHandle = NULL;
+	}
+	stopCDDA();
+	return 0;
+}
+
+static void PrintTracks(void) {
+	int i;
+
+	for (i = 1; i <= numtracks; i++) {
+		SysPrintf(_("Track %.2d (%s) - Start %.2d:%.2d:%.2d, Length %.2d:%.2d:%.2d\n"),
+			i, (ti[i].type == DATA ? "DATA" : "AUDIO"),
+			ti[i].start[0], ti[i].start[1], ti[i].start[2],
+			ti[i].length[0], ti[i].length[1], ti[i].length[2]);
+	}
+}
+
+// This function is invoked by the front-end when opening an ISO
+// file for playback
+static long CALLBACK ISOopen(void) {
+	if (cdHandle != NULL) {
+		return 0; // it's already open
+	}
+
+	cdHandle = fopen(GetIsoFile(), "rb");
+	if (cdHandle == NULL) {
+		return -1;
+	}
+
+	SysPrintf(_("Loaded CD Image: %s"), GetIsoFile());
+
+	cddaBigEndian = FALSE;
+	subChanMixed = FALSE;
+	subChanRaw = FALSE;
+
+	if (parsecue(GetIsoFile()) == 0) {
+		SysPrintf("[+cue]");
+	}
+	else if (parsetoc(GetIsoFile()) == 0) {
+		SysPrintf("[+toc]");
+	}
+	else if (parseccd(GetIsoFile()) == 0) {
+		SysPrintf("[+ccd]");
+	}
+	else if (parsemds(GetIsoFile()) == 0) {
+		SysPrintf("[+mds]");
+	}
+
+	if (!subChanMixed && opensubfile(GetIsoFile()) == 0) {
+		SysPrintf("[+sub]");
+	}
+
+	SysPrintf(".\n");
+
+	PrintTracks();
+
+	return 0;
+}
+
+static long CALLBACK ISOclose(void) {
+	if (cdHandle != NULL) {
+		fclose(cdHandle);
+		cdHandle = NULL;
+	}
+	if (subHandle != NULL) {
+		fclose(subHandle);
+		subHandle = NULL;
+	}
+	stopCDDA();
+	return 0;
+}
+
+// return Starting and Ending Track
+// buffer:
+//  byte 0 - start track
+//  byte 1 - end track
+static long CALLBACK ISOgetTN(unsigned char *buffer) {
+	buffer[0] = 1;
+
+	if (numtracks > 0) {
+		buffer[1] = numtracks;
+	}
+	else {
+		buffer[1] = 1;
+	}
+
+	return 0;
+}
+
+// return Track Time
+// buffer:
+//  byte 0 - frame
+//  byte 1 - second
+//  byte 2 - minute
+static long CALLBACK ISOgetTD(unsigned char track, unsigned char *buffer) {
+	if (numtracks > 0 && track <= numtracks) {
+		buffer[2] = ti[track].start[0];
+		buffer[1] = ti[track].start[1];
+		buffer[0] = ti[track].start[2];
+	}
+	else {
+		buffer[2] = 0;
+		buffer[1] = 2;
+		buffer[0] = 0;
+	}
+
+	return 0;
+}
+
+// decode 'raw' subchannel data ripped by cdrdao
+static void DecodeRawSubData(void) {
+	unsigned char subQData[12];
+	int i;
+
+	memset(subQData, 0, sizeof(subQData));
+
+	for (i = 0; i < 8 * 12; i++) {
+		if (subbuffer[i] & (1 << 6)) { // only subchannel Q is needed
+			subQData[i >> 3] |= (1 << (7 - (i & 7)));
+		}
+	}
+
+	memcpy(&subbuffer[12], subQData, 12);
+}
+
+// read track
+// time: byte 0 - minute; byte 1 - second; byte 2 - frame
+// uses bcd format
+static long CALLBACK ISOreadTrack(unsigned char *time) {
+	if (cdHandle == NULL) {
+		return -1;
+	}
+
+	if (subChanMixed) {
+		fseek(cdHandle, MSF2SECT(btoi(time[0]), btoi(time[1]), btoi(time[2])) * (CD_FRAMESIZE_RAW + SUB_FRAMESIZE) + 12, SEEK_SET);
+		fread(cdbuffer, 1, DATA_SIZE, cdHandle);
+		fread(subbuffer, 1, SUB_FRAMESIZE, cdHandle);
+
+		if (subChanRaw) DecodeRawSubData();
+	}
+	else {
+		fseek(cdHandle, MSF2SECT(btoi(time[0]), btoi(time[1]), btoi(time[2])) * CD_FRAMESIZE_RAW + 12, SEEK_SET);
+		fread(cdbuffer, 1, DATA_SIZE, cdHandle);
+
+		if (subHandle != NULL) {
+			fseek(subHandle, MSF2SECT(btoi(time[0]), btoi(time[1]), btoi(time[2])) * SUB_FRAMESIZE, SEEK_SET);
+			fread(subbuffer, 1, SUB_FRAMESIZE, subHandle);
+
+			if (subChanRaw) DecodeRawSubData();
+		}
+	}
+
+	return 0;
+}
+
+// return readed track
+static unsigned char * CALLBACK ISOgetBuffer(void) {
+	return cdbuffer;
+}
+
+// plays cdda audio
+// sector: byte 0 - minute; byte 1 - second; byte 2 - frame
+// does NOT uses bcd format
+static long CALLBACK ISOplay(unsigned char *time) {
+	if (SPU_playCDDAchannel != NULL) {
+		if (subChanMixed) {
+			startCDDA(MSF2SECT(time[0], time[1], time[2]) * (CD_FRAMESIZE_RAW + SUB_FRAMESIZE));
+		}
+		else {
+			startCDDA(MSF2SECT(time[0], time[1], time[2]) * CD_FRAMESIZE_RAW);
+		}
+	}
+	return 0;
+}
+
+// stops cdda audio
+static long CALLBACK ISOstop(void) {
+	stopCDDA();
+	return 0;
+}
+
+// gets subchannel data
+static unsigned char* CALLBACK ISOgetBufferSub(void) {
+	if (subHandle != NULL || subChanMixed) {
+		return subbuffer;
+	}
+
+	return NULL;
+}
+
+static long CALLBACK ISOgetStatus(struct CdrStat *stat) {
+	int sec;
+
+	CDR__getStatus(stat);
+
+	if (playing) {
+		stat->Type = 0x02;
+		stat->Status |= 0x80;
+		sec = cddaCurOffset / CD_FRAMESIZE_RAW;
+		sec2msf(sec, (char *)stat->Time);
+	}
+	else {
+		stat->Type = 0x01;
+	}
+
+	return 0;
+}
+
+void cdrIsoInit(void) {
+	CDR_init = ISOinit;
+	CDR_shutdown = ISOshutdown;
+	CDR_open = ISOopen;
+	CDR_close = ISOclose;
+	CDR_getTN = ISOgetTN;
+	CDR_getTD = ISOgetTD;
+	CDR_readTrack = ISOreadTrack;
+	CDR_getBuffer = ISOgetBuffer;
+	CDR_play = ISOplay;
+	CDR_stop = ISOstop;
+	CDR_getBufferSub = ISOgetBufferSub;
+	CDR_getStatus = ISOgetStatus;
+
+	CDR_getDriveLetter = CDR__getDriveLetter;
+	CDR_configure = CDR__configure;
+	CDR_test = CDR__test;
+	CDR_about = CDR__about;
+	CDR_setfilename = CDR__setfilename;
+
+	numtracks = 0;
+}
+
+int cdrIsoActive(void) {
+	return (cdHandle != NULL);
+}
diff --git a/libpcsxcore/cdriso.h b/libpcsxcore/cdriso.h
new file mode 100644
index 0000000..27d1ecd
--- /dev/null
+++ b/libpcsxcore/cdriso.h
@@ -0,0 +1,34 @@
+/***************************************************************************
+ *   Copyright (C) 2007 PCSX-df Team                                       *
+ *   Copyright (C) 2009 Wei Mingzhi                                        *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+#ifndef CDRISO_H
+#define CDRISO_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void cdrIsoInit(void);
+int cdrIsoActive(void);
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/libpcsxcore/cdrom.c b/libpcsxcore/cdrom.c
new file mode 100644
index 0000000..92e4b7f
--- /dev/null
+++ b/libpcsxcore/cdrom.c
@@ -0,0 +1,1138 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+/* 
+* Handles all CD-ROM registers and functions.
+*/
+
+#include "cdrom.h"
+#include "ppf.h"
+
+cdrStruct cdr;
+
+/* CD-ROM magic numbers */
+#define CdlSync        0
+#define CdlNop         1
+#define CdlSetloc      2
+#define CdlPlay        3
+#define CdlForward     4
+#define CdlBackward    5
+#define CdlReadN       6
+#define CdlStandby     7
+#define CdlStop        8
+#define CdlPause       9
+#define CdlInit        10
+#define CdlMute        11
+#define CdlDemute      12
+#define CdlSetfilter   13
+#define CdlSetmode     14
+#define CdlGetmode     15
+#define CdlGetlocL     16
+#define CdlGetlocP     17
+#define CdlReadT       18
+#define CdlGetTN       19
+#define CdlGetTD       20
+#define CdlSeekL       21
+#define CdlSeekP       22
+#define CdlSetclock    23
+#define CdlGetclock    24
+#define CdlTest        25
+#define CdlID          26
+#define CdlReadS       27
+#define CdlReset       28
+#define CdlReadToc     30
+
+#define AUTOPAUSE      249
+#define READ_ACK       250
+#define READ           251
+#define REPPLAY_ACK    252
+#define REPPLAY        253
+#define ASYNC          254
+/* don't set 255, it's reserved */
+
+char *CmdName[0x100]= {
+    "CdlSync",     "CdlNop",       "CdlSetloc",  "CdlPlay",
+    "CdlForward",  "CdlBackward",  "CdlReadN",   "CdlStandby",
+    "CdlStop",     "CdlPause",     "CdlInit",    "CdlMute",
+    "CdlDemute",   "CdlSetfilter", "CdlSetmode", "CdlGetmode",
+    "CdlGetlocL",  "CdlGetlocP",   "CdlReadT",   "CdlGetTN",
+    "CdlGetTD",    "CdlSeekL",     "CdlSeekP",   "CdlSetclock",
+    "CdlGetclock", "CdlTest",      "CdlID",      "CdlReadS",
+    "CdlReset",    NULL,           "CDlReadToc", NULL
+};
+
+unsigned char Test04[] = { 0 };
+unsigned char Test05[] = { 0 };
+unsigned char Test20[] = { 0x98, 0x06, 0x10, 0xC3 };
+unsigned char Test22[] = { 0x66, 0x6F, 0x72, 0x20, 0x45, 0x75, 0x72, 0x6F };
+unsigned char Test23[] = { 0x43, 0x58, 0x44, 0x32, 0x39 ,0x34, 0x30, 0x51 };
+
+// 1x = 75 sectors per second
+// PSXCLK = 1 sec in the ps
+// so (PSXCLK / 75) = cdr read time (linuzappz)
+#define cdReadTime (PSXCLK / 75)
+
+static struct CdrStat stat;
+static struct SubQ *subq;
+
+#define CDR_INT(eCycle) { \
+	psxRegs.interrupt |= 0x4; \
+	psxRegs.intCycle[2 + 1] = eCycle; \
+	psxRegs.intCycle[2] = psxRegs.cycle; }
+
+#define CDREAD_INT(eCycle) { \
+	psxRegs.interrupt |= 0x40000; \
+	psxRegs.intCycle[2 + 16 + 1] = eCycle; \
+	psxRegs.intCycle[2 + 16] = psxRegs.cycle; }
+
+#define StartReading(type, eCycle) { \
+   	cdr.Reading = type; \
+  	cdr.FirstSector = 1; \
+  	cdr.Readed = 0xff; \
+	AddIrqQueue(READ_ACK, eCycle); \
+}
+
+#define StopReading() { \
+	if (cdr.Reading) { \
+		cdr.Reading = 0; \
+		psxRegs.interrupt &= ~0x40000; \
+	} \
+	cdr.StatP &= ~0x20;\
+}
+
+#define StopCdda() { \
+	if (cdr.Play) { \
+		if (!Config.Cdda) CDR_stop(); \
+		cdr.StatP &= ~0x80; \
+		cdr.Play = FALSE; \
+	} \
+}
+
+#define SetResultSize(size) { \
+    cdr.ResultP = 0; \
+	cdr.ResultC = size; \
+	cdr.ResultReady = 1; \
+}
+
+static void ReadTrack() {
+	cdr.Prev[0] = itob(cdr.SetSector[0]);
+	cdr.Prev[1] = itob(cdr.SetSector[1]);
+	cdr.Prev[2] = itob(cdr.SetSector[2]);
+
+#ifdef CDR_LOG
+	CDR_LOG("ReadTrack() Log: KEY *** %x:%x:%x\n", cdr.Prev[0], cdr.Prev[1], cdr.Prev[2]);
+#endif
+	cdr.RErr = CDR_readTrack(cdr.Prev);
+}
+
+// cdr.Stat:
+#define NoIntr		0
+#define DataReady	1
+#define Complete	2
+#define Acknowledge	3
+#define DataEnd		4
+#define DiskError	5
+
+void AddIrqQueue(unsigned char irq, unsigned long ecycle) {
+	cdr.Irq = irq;
+	if (cdr.Stat) {
+		cdr.eCycle = ecycle;
+	} else {
+		CDR_INT(ecycle);
+	}
+}
+
+void cdrInterrupt() {
+	int i;
+	unsigned char Irq = cdr.Irq;
+
+	if (cdr.Stat) {
+		CDR_INT(0x1000);
+		return;
+	}
+
+	cdr.Irq = 0xff;
+	cdr.Ctrl &= ~0x80;
+
+	switch (Irq) {
+		case CdlSync:
+			SetResultSize(1);
+			cdr.StatP |= 0x2;
+			cdr.Result[0] = cdr.StatP;
+			cdr.Stat = Acknowledge; 
+			break;
+
+		case CdlNop:
+			SetResultSize(1);
+			cdr.Result[0] = cdr.StatP;
+			cdr.Stat = Acknowledge;
+			i = stat.Status;
+			if (CDR_getStatus(&stat) != -1) {
+				if (stat.Type == 0xff) cdr.Stat = DiskError;
+				if (stat.Status & 0x10) {
+					cdr.Stat = DiskError;
+					cdr.Result[0] |= 0x11;
+					cdr.Result[0] &= ~0x02;
+				}
+				else if (i & 0x10) {
+					cdr.StatP |= 0x2;
+					cdr.Result[0] |= 0x2;
+					CheckCdrom();
+				}
+			}
+			break;
+
+		case CdlSetloc:
+			cdr.CmdProcess = 0;
+			SetResultSize(1);
+			cdr.StatP |= 0x2;
+			cdr.Result[0] = cdr.StatP;
+			cdr.Stat = Acknowledge;
+			break;
+
+		case CdlPlay:
+			cdr.CmdProcess = 0;
+			SetResultSize(1);
+			cdr.StatP |= 0x2;
+			cdr.Result[0] = cdr.StatP;
+			cdr.Stat = Acknowledge;
+			cdr.StatP |= 0x80;
+//			if ((cdr.Mode & 0x5) == 0x5) AddIrqQueue(REPPLAY, cdReadTime);
+			break;
+
+    	case CdlForward:
+			cdr.CmdProcess = 0;
+			SetResultSize(1);
+			cdr.StatP |= 0x2;
+        	cdr.Result[0] = cdr.StatP;
+        	cdr.Stat = Complete;
+			break;
+
+    	case CdlBackward:
+			cdr.CmdProcess = 0;
+			SetResultSize(1);
+			cdr.StatP |= 0x2;
+        	cdr.Result[0] = cdr.StatP;
+        	cdr.Stat = Complete;
+			break;
+
+    	case CdlStandby:
+			cdr.CmdProcess = 0;
+			SetResultSize(1);
+			cdr.StatP |= 0x2;
+			cdr.Result[0] = cdr.StatP;
+			cdr.Stat = Complete;
+			break;
+
+		case CdlStop:
+			cdr.CmdProcess = 0;
+			SetResultSize(1);
+			cdr.StatP &= ~0x2;
+			cdr.Result[0] = cdr.StatP;
+			cdr.Stat = Complete;
+//			cdr.Stat = Acknowledge;
+
+			// check case open/close -shalma
+			i = stat.Status;
+			if (CDR_getStatus(&stat) != -1) {
+				if (stat.Type == 0xff) cdr.Stat = DiskError;
+				if (stat.Status & 0x10) {
+					cdr.Stat = DiskError;
+					cdr.Result[0] |= 0x11;
+					cdr.Result[0] &= ~0x02;
+				}
+				else if (i & 0x10) {
+					cdr.StatP |= 0x2;
+					cdr.Result[0] |= 0x2;
+					CheckCdrom();
+				}
+			}
+			break;
+
+		case CdlPause:
+			SetResultSize(1);
+			cdr.Result[0] = cdr.StatP;
+        	cdr.Stat = Acknowledge;
+			AddIrqQueue(CdlPause + 0x20, 0x1000);
+			cdr.Ctrl |= 0x80;
+			break;
+
+		case CdlPause + 0x20:
+			SetResultSize(1);
+        	cdr.StatP &= ~0x20;
+			cdr.StatP |= 0x2;
+			cdr.Result[0] = cdr.StatP;
+        	cdr.Stat = Complete;
+			break;
+
+    	case CdlInit:
+			SetResultSize(1);
+        	cdr.StatP = 0x2;
+			cdr.Result[0] = cdr.StatP;
+        	cdr.Stat = Acknowledge;
+//			if (!cdr.Init) {
+				AddIrqQueue(CdlInit + 0x20, 0x1000);
+//			}
+        	break;
+
+		case CdlInit + 0x20:
+			SetResultSize(1);
+			cdr.Result[0] = cdr.StatP;
+        	cdr.Stat = Complete;
+			cdr.Init = 1;
+			break;
+
+    	case CdlMute:
+			SetResultSize(1);
+			cdr.StatP |= 0x2;
+        	cdr.Result[0] = cdr.StatP;
+        	cdr.Stat = Acknowledge;
+			break;
+
+    	case CdlDemute:
+			SetResultSize(1);
+			cdr.StatP |= 0x2;
+        	cdr.Result[0] = cdr.StatP;
+        	cdr.Stat = Acknowledge;
+			break;
+
+    	case CdlSetfilter:
+			SetResultSize(1);
+			cdr.StatP |= 0x2;
+        	cdr.Result[0] = cdr.StatP;
+        	cdr.Stat = Acknowledge; 
+        	break;
+
+		case CdlSetmode:
+			SetResultSize(1);
+			cdr.StatP |= 0x2;
+        	cdr.Result[0] = cdr.StatP;
+        	cdr.Stat = Acknowledge;
+        	break;
+
+    	case CdlGetmode:
+			SetResultSize(6);
+			cdr.StatP |= 0x2;
+        	cdr.Result[0] = cdr.StatP;
+        	cdr.Result[1] = cdr.Mode;
+        	cdr.Result[2] = cdr.File;
+        	cdr.Result[3] = cdr.Channel;
+        	cdr.Result[4] = 0;
+        	cdr.Result[5] = 0;
+        	cdr.Stat = Acknowledge;
+        	break;
+
+    	case CdlGetlocL:
+			SetResultSize(8);
+//        	for (i = 0; i < 8; i++)
+//				cdr.Result[i] = itob(cdr.Transfer[i]);
+        	for (i = 0; i < 8; i++)
+				cdr.Result[i] = cdr.Transfer[i];
+        	cdr.Stat = Acknowledge;
+        	break;
+
+		case CdlGetlocP:
+			SetResultSize(8);
+			subq = (struct SubQ *)CDR_getBufferSub();
+
+			if (subq != NULL) {
+				cdr.Result[0] = subq->TrackNumber;
+				cdr.Result[1] = subq->IndexNumber;
+				memcpy(cdr.Result + 2, subq->TrackRelativeAddress, 3);
+				memcpy(cdr.Result + 5, subq->AbsoluteAddress, 3);
+
+				// subQ integrity check
+				if (calcCrc((u8 *)subq + 12, 10) != (((u16)subq->CRC[0] << 8) | subq->CRC[1])) {
+					memset(cdr.Result + 2, 0, 3 + 3); // CRC wrong, wipe out time data
+				}
+			} else {
+				cdr.Result[0] = 1;
+				cdr.Result[1] = 1;
+
+				cdr.Result[2] = btoi(cdr.Prev[0]);
+				cdr.Result[3] = btoi(cdr.Prev[1]) - 2;
+				cdr.Result[4] = cdr.Prev[2];
+
+				// m:s adjustment
+				if ((s8)cdr.Result[3] < 0) {
+					cdr.Result[3] += 60;
+					cdr.Result[2] -= 1;
+				}
+
+				cdr.Result[2] = itob(cdr.Result[2]);
+				cdr.Result[3] = itob(cdr.Result[3]);
+
+				memcpy(cdr.Result + 5, cdr.Prev, 3);
+			}
+
+			cdr.Stat = Acknowledge;
+			break;
+
+    	case CdlGetTN:
+			cdr.CmdProcess = 0;
+			SetResultSize(3);
+			cdr.StatP |= 0x2;
+        	cdr.Result[0] = cdr.StatP;
+        	if (CDR_getTN(cdr.ResultTN) == -1) {
+				cdr.Stat = DiskError;
+				cdr.Result[0] |= 0x01;
+        	} else {
+        		cdr.Stat = Acknowledge;
+        	    cdr.Result[1] = itob(cdr.ResultTN[0]);
+        	    cdr.Result[2] = itob(cdr.ResultTN[1]);
+        	}
+        	break;
+
+    	case CdlGetTD:
+			cdr.CmdProcess = 0;
+			cdr.Track = btoi(cdr.Param[0]);
+			SetResultSize(4);
+			cdr.StatP |= 0x2;
+			if (CDR_getTD(cdr.Track, cdr.ResultTD) == -1) {
+				cdr.Stat = DiskError;
+				cdr.Result[0] |= 0x01;
+			} else {
+				cdr.Stat = Acknowledge;
+				cdr.Result[0] = cdr.StatP;
+				cdr.Result[1] = itob(cdr.ResultTD[2]);
+				cdr.Result[2] = itob(cdr.ResultTD[1]);
+				cdr.Result[3] = itob(cdr.ResultTD[0]);
+			}
+			break;
+
+    	case CdlSeekL:
+			SetResultSize(1);
+			cdr.StatP |= 0x2;
+        	cdr.Result[0] = cdr.StatP;
+			cdr.StatP |= 0x40;
+        	cdr.Stat = Acknowledge;
+			cdr.Seeked = TRUE;
+			AddIrqQueue(CdlSeekL + 0x20, 0x1000);
+			break;
+
+    	case CdlSeekL + 0x20:
+			SetResultSize(1);
+			cdr.StatP |= 0x2;
+			cdr.StatP &= ~0x40;
+        	cdr.Result[0] = cdr.StatP;
+        	cdr.Stat = Complete;
+			break;
+
+    	case CdlSeekP:
+			SetResultSize(1);
+			cdr.StatP |= 0x2;
+        	cdr.Result[0] = cdr.StatP;
+			cdr.StatP |= 0x40;
+        	cdr.Stat = Acknowledge;
+			AddIrqQueue(CdlSeekP + 0x20, 0x1000);
+			break;
+
+    	case CdlSeekP + 0x20:
+			SetResultSize(1);
+			cdr.StatP |= 0x2;
+			cdr.StatP &= ~0x40;
+        	cdr.Result[0] = cdr.StatP;
+        	cdr.Stat = Complete;
+			break;
+
+		case CdlTest:
+        	cdr.Stat = Acknowledge;
+        	switch (cdr.Param[0]) {
+        	    case 0x20: // System Controller ROM Version
+					SetResultSize(4);
+					memcpy(cdr.Result, Test20, 4);
+					break;
+				case 0x22:
+					SetResultSize(8);
+					memcpy(cdr.Result, Test22, 4);
+					break;
+				case 0x23: case 0x24:
+					SetResultSize(8);
+					memcpy(cdr.Result, Test23, 4);
+					break;
+        	}
+			break;
+
+    	case CdlID:
+			SetResultSize(1);
+			cdr.StatP |= 0x2;
+        	cdr.Result[0] = cdr.StatP;
+        	cdr.Stat = Acknowledge;
+			AddIrqQueue(CdlID + 0x20, 0x1000);
+			break;
+
+		case CdlID + 0x20:
+			SetResultSize(8);
+        	if (CDR_getStatus(&stat) == -1) {
+        		cdr.Result[0] = 0x00; // 0x08 and cdr.Result[1]|0x10 : audio cd, enters cd player
+                cdr.Result[1] = 0x00; // 0x80 leads to the menu in the bios, else loads CD
+        	}
+        	else {
+                if (stat.Type == 2) {
+                	cdr.Result[0] = 0x08;
+                    cdr.Result[1] = 0x10;
+	        	}
+	        	else {
+                    cdr.Result[0] = 0x00;
+                    cdr.Result[1] = 0x00;
+	        	}
+        	}
+			cdr.Result[1] |= 0x80;
+			cdr.Result[2] = 0x00;
+			cdr.Result[3] = 0x00;
+			strncpy((char *)&cdr.Result[4], "PCSX", 4);
+			cdr.Stat = Complete;
+			break;
+
+		case CdlReset:
+			SetResultSize(1);
+        	cdr.StatP = 0x2;
+			cdr.Result[0] = cdr.StatP;
+        	cdr.Stat = Acknowledge;
+			break;
+
+    	case CdlReadToc:
+			SetResultSize(1);
+			cdr.StatP |= 0x2;
+        	cdr.Result[0] = cdr.StatP;
+        	cdr.Stat = Acknowledge;
+			AddIrqQueue(CdlReadToc + 0x20, 0x1000);
+			break;
+
+    	case CdlReadToc + 0x20:
+			SetResultSize(1);
+			cdr.StatP |= 0x2;
+        	cdr.Result[0] = cdr.StatP;
+        	cdr.Stat = Complete;
+			break;
+
+		case AUTOPAUSE:
+			cdr.OCUP = 0;
+/*			SetResultSize(1);
+			StopCdda();
+			StopReading();
+			cdr.OCUP = 0;
+        	cdr.StatP&=~0x20;
+			cdr.StatP|= 0x2;
+        	cdr.Result[0] = cdr.StatP;
+    		cdr.Stat = DataEnd;
+*/			AddIrqQueue(CdlPause, 0x800);
+			break;
+
+		case READ_ACK:
+			if (!cdr.Reading) return;
+
+			SetResultSize(1);
+			cdr.StatP |= 0x2;
+        	cdr.Result[0] = cdr.StatP;
+			if (!cdr.Seeked) {
+				cdr.Seeked = TRUE;
+				cdr.StatP |= 0x40;
+			}
+			cdr.StatP |= 0x20;
+        	cdr.Stat = Acknowledge;
+
+//			CDREAD_INT((cdr.Mode & 0x80) ? (cdReadTime / 2) : cdReadTime);
+			CDREAD_INT(0x80000);
+			break;
+
+		case REPPLAY_ACK:
+			cdr.Stat = Acknowledge;
+			cdr.Result[0] = cdr.StatP;
+			SetResultSize(1);
+			AddIrqQueue(REPPLAY, cdReadTime);
+			break;
+
+		case REPPLAY: 
+			if ((cdr.Mode & 5) != 5) break;
+/*			if (CDR_getStatus(&stat) == -1) {
+				cdr.Result[0] = 0;
+				cdr.Result[1] = 0;
+				cdr.Result[2] = 0;
+				cdr.Result[3] = 0;
+				cdr.Result[4] = 0;
+				cdr.Result[5] = 0;
+				cdr.Result[6] = 0;
+				cdr.Result[7] = 0;
+			} else memcpy(cdr.Result, &stat.Track, 8);
+			cdr.Stat = 1;
+			SetResultSize(8);
+			AddIrqQueue(REPPLAY_ACK, cdReadTime);
+*/			break;
+
+		case 0xff:
+			return;
+
+		default:
+			cdr.Stat = Complete;
+			break;
+	}
+
+	if (cdr.Stat != NoIntr && cdr.Reg2 != 0x18) {
+		psxHu32ref(0x1070) |= SWAP32((u32)0x4);
+	}
+
+#ifdef CDR_LOG
+	CDR_LOG("cdrInterrupt() Log: CDR Interrupt IRQ %x\n", Irq);
+#endif
+}
+
+void cdrReadInterrupt() {
+	u8 *buf;
+
+	if (!cdr.Reading)
+		return;
+
+	if (cdr.Stat) {
+		CDREAD_INT(0x1000);
+		return;
+	}
+
+#ifdef CDR_LOG
+	CDR_LOG("cdrReadInterrupt() Log: KEY END");
+#endif
+
+    cdr.OCUP = 1;
+	SetResultSize(1);
+	cdr.StatP |= 0x22;
+	cdr.StatP &= ~0x40;
+    cdr.Result[0] = cdr.StatP;
+
+	ReadTrack();
+
+	buf = CDR_getBuffer();
+	if (buf == NULL)
+		cdr.RErr = -1;
+
+	if (cdr.RErr == -1) {
+#ifdef CDR_LOG
+		fprintf(emuLog, "cdrReadInterrupt() Log: err\n");
+#endif
+		memset(cdr.Transfer, 0, DATA_SIZE);
+		cdr.Stat = DiskError;
+		cdr.Result[0] |= 0x01;
+		CDREAD_INT((cdr.Mode & 0x80) ? (cdReadTime / 2) : cdReadTime);
+		return;
+	}
+
+	memcpy(cdr.Transfer, buf, DATA_SIZE);
+	CheckPPFCache(cdr.Transfer, cdr.Prev[0], cdr.Prev[1], cdr.Prev[2]);
+
+    cdr.Stat = DataReady;
+
+#ifdef CDR_LOG
+	fprintf(emuLog, "cdrReadInterrupt() Log: cdr.Transfer %x:%x:%x\n", cdr.Transfer[0], cdr.Transfer[1], cdr.Transfer[2]);
+#endif
+
+	if ((!cdr.Muted) && (cdr.Mode & 0x40) && (!Config.Xa) && (cdr.FirstSector != -1)) { // CD-XA
+		if ((cdr.Transfer[4 + 2] & 0x4) &&
+			((cdr.Mode & 0x8) ? (cdr.Transfer[4 + 1] == cdr.Channel) : 1) &&
+			(cdr.Transfer[4 + 0] == cdr.File)) {
+			int ret = xa_decode_sector(&cdr.Xa, cdr.Transfer+4, cdr.FirstSector);
+
+			if (!ret) {
+				SPU_playADPCMchannel(&cdr.Xa);
+				cdr.FirstSector = 0;
+			}
+			else cdr.FirstSector = -1;
+		}
+	}
+
+	cdr.SetSector[2]++;
+    if (cdr.SetSector[2] == 75) {
+        cdr.SetSector[2] = 0;
+        cdr.SetSector[1]++;
+        if (cdr.SetSector[1] == 60) {
+            cdr.SetSector[1] = 0;
+            cdr.SetSector[0]++;
+        }
+    }
+
+    cdr.Readed = 0;
+
+	if ((cdr.Transfer[4 + 2] & 0x80) && (cdr.Mode & 0x2)) { // EOF
+#ifdef CDR_LOG
+		CDR_LOG("cdrReadInterrupt() Log: Autopausing read\n");
+#endif
+//		AddIrqQueue(AUTOPAUSE, 0x1000);
+		AddIrqQueue(CdlPause, 0x1000);
+	}
+	else {
+		CDREAD_INT((cdr.Mode & 0x80) ? (cdReadTime / 2) : cdReadTime);
+	}
+	psxHu32ref(0x1070) |= SWAP32((u32)0x4);
+}
+
+/*
+cdrRead0:
+	bit 0 - 0 REG1 command send / 1 REG1 data read
+	bit 1 - 0 data transfer finish / 1 data transfer ready/in progress
+	bit 2 - unknown
+	bit 3 - unknown
+	bit 4 - unknown
+	bit 5 - 1 result ready
+	bit 6 - 1 dma ready
+	bit 7 - 1 command being processed
+*/
+
+unsigned char cdrRead0(void) {
+	if (cdr.ResultReady)
+		cdr.Ctrl |= 0x20;
+	else
+		cdr.Ctrl &= ~0x20;
+
+	if (cdr.OCUP)
+		cdr.Ctrl |= 0x40;
+//  else
+//		cdr.Ctrl &= ~0x40;
+
+	// What means the 0x10 and the 0x08 bits? I only saw it used by the bios
+	cdr.Ctrl |= 0x18;
+
+#ifdef CDR_LOG
+	CDR_LOG("cdrRead0() Log: CD0 Read: %x\n", cdr.Ctrl);
+#endif
+
+	return psxHu8(0x1800) = cdr.Ctrl;
+}
+
+/*
+cdrWrite0:
+	0 - to send a command / 1 - to get the result
+*/
+
+void cdrWrite0(unsigned char rt) {
+#ifdef CDR_LOG
+	CDR_LOG("cdrWrite0() Log: CD0 write: %x\n", rt);
+#endif
+	cdr.Ctrl = rt | (cdr.Ctrl & ~0x3);
+
+    if (rt == 0) {
+		cdr.ParamP = 0;
+		cdr.ParamC = 0;
+		cdr.ResultReady = 0;
+	}
+}
+
+unsigned char cdrRead1(void) {
+    if (cdr.ResultReady) { // && cdr.Ctrl & 0x1) {
+		psxHu8(0x1801) = cdr.Result[cdr.ResultP++];
+		if (cdr.ResultP == cdr.ResultC)
+			cdr.ResultReady = 0;
+	} else {
+		psxHu8(0x1801) = 0;
+	}
+#ifdef CDR_LOG
+	CDR_LOG("cdrRead1() Log: CD1 Read: %x\n", psxHu8(0x1801));
+#endif
+	return psxHu8(0x1801);
+}
+
+void cdrWrite1(unsigned char rt) {
+	int i;
+
+#ifdef CDR_LOG
+	CDR_LOG("cdrWrite1() Log: CD1 write: %x (%s)\n", rt, CmdName[rt]);
+#endif
+//	psxHu8(0x1801) = rt;
+    cdr.Cmd = rt;
+	cdr.OCUP = 0;
+
+#ifdef CDRCMD_DEBUG
+	SysPrintf("cdrWrite1() Log: CD1 write: %x (%s)", rt, CmdName[rt]);
+	if (cdr.ParamC) {
+		SysPrintf(" Param[%d] = {", cdr.ParamC);
+		for (i = 0; i < cdr.ParamC; i++)
+			SysPrintf(" %x,", cdr.Param[i]);
+		SysPrintf("}\n");
+	} else {
+		SysPrintf("\n");
+	}
+#endif
+
+	if (cdr.Ctrl & 0x1) return;
+
+    switch (cdr.Cmd) {
+    	case CdlSync:
+			cdr.Ctrl |= 0x80;
+    		cdr.Stat = NoIntr; 
+    		AddIrqQueue(cdr.Cmd, 0x1000);
+        	break;
+
+    	case CdlNop:
+			cdr.Ctrl |= 0x80;
+    		cdr.Stat = NoIntr; 
+    		AddIrqQueue(cdr.Cmd, 0x1000);
+        	break;
+
+    	case CdlSetloc:
+			StopReading();
+			cdr.Seeked = FALSE;
+        	for (i = 0; i < 3; i++)
+				cdr.SetSector[i] = btoi(cdr.Param[i]);
+        	cdr.SetSector[3] = 0;
+/*        	if ((cdr.SetSector[0] | cdr.SetSector[1] | cdr.SetSector[2]) == 0) {
+				*(u32 *)cdr.SetSector = *(u32 *)cdr.SetSectorSeek;
+			}*/
+			cdr.Ctrl |= 0x80;
+        	cdr.Stat = NoIntr;
+    		AddIrqQueue(cdr.Cmd, 0x1000);
+        	break;
+
+    	case CdlPlay:
+        	if (!cdr.SetSector[0] & !cdr.SetSector[1] & !cdr.SetSector[2]) {
+            	if (CDR_getTN(cdr.ResultTN) != -1) {
+	                if (cdr.CurTrack > cdr.ResultTN[1])
+						cdr.CurTrack = cdr.ResultTN[1];
+                    if (CDR_getTD((unsigned char)(cdr.CurTrack), cdr.ResultTD) != -1) {
+		               	int tmp = cdr.ResultTD[2];
+                        cdr.ResultTD[2] = cdr.ResultTD[0];
+						cdr.ResultTD[0] = tmp;
+	                    if (!Config.Cdda) CDR_play(cdr.ResultTD);
+					}
+                }
+			} else if (!Config.Cdda) {
+				CDR_play(cdr.SetSector);
+			}
+    		cdr.Play = TRUE;
+			cdr.Ctrl |= 0x80;
+    		cdr.Stat = NoIntr; 
+    		AddIrqQueue(cdr.Cmd, 0x1000);
+    		break;
+
+    	case CdlForward:
+        	if (cdr.CurTrack < 0xaa)
+				cdr.CurTrack++;
+			cdr.Ctrl |= 0x80;
+    		cdr.Stat = NoIntr; 
+    		AddIrqQueue(cdr.Cmd, 0x1000);
+        	break;
+
+    	case CdlBackward:
+        	if (cdr.CurTrack > 1)
+				cdr.CurTrack--;
+			cdr.Ctrl |= 0x80;
+    		cdr.Stat = NoIntr; 
+    		AddIrqQueue(cdr.Cmd, 0x1000);
+        	break;
+
+    	case CdlReadN:
+			cdr.Irq = 0;
+			StopReading();
+			cdr.Ctrl|= 0x80;
+        	cdr.Stat = NoIntr; 
+			StartReading(1, 0x1000);
+        	break;
+
+    	case CdlStandby:
+			StopCdda();
+			StopReading();
+			cdr.Ctrl |= 0x80;
+    		cdr.Stat = NoIntr;
+    		AddIrqQueue(cdr.Cmd, 0x1000);
+        	break;
+
+    	case CdlStop:
+			StopCdda();
+			StopReading();
+			cdr.Ctrl |= 0x80;
+    		cdr.Stat = NoIntr;
+    		AddIrqQueue(cdr.Cmd, 0x1000);
+        	break;
+
+    	case CdlPause:
+			StopCdda();
+			StopReading();
+			cdr.Ctrl |= 0x80;
+    		cdr.Stat = NoIntr;
+    		AddIrqQueue(cdr.Cmd, 0x80000);
+        	break;
+
+		case CdlReset:
+    	case CdlInit:
+			StopCdda();
+			StopReading();
+			cdr.Ctrl |= 0x80;
+    		cdr.Stat = NoIntr; 
+    		AddIrqQueue(cdr.Cmd, 0x1000);
+        	break;
+
+    	case CdlMute:
+        	cdr.Muted = TRUE;
+			cdr.Ctrl |= 0x80;
+    		cdr.Stat = NoIntr; 
+    		AddIrqQueue(cdr.Cmd, 0x1000);
+        	break;
+
+    	case CdlDemute:
+        	cdr.Muted = FALSE;
+			cdr.Ctrl |= 0x80;
+    		cdr.Stat = NoIntr; 
+    		AddIrqQueue(cdr.Cmd, 0x1000);
+        	break;
+
+    	case CdlSetfilter:
+        	cdr.File = cdr.Param[0];
+        	cdr.Channel = cdr.Param[1];
+			cdr.Ctrl |= 0x80;
+    		cdr.Stat = NoIntr; 
+    		AddIrqQueue(cdr.Cmd, 0x1000);
+        	break;
+
+    	case CdlSetmode:
+#ifdef CDR_LOG
+			CDR_LOG("cdrWrite1() Log: Setmode %x\n", cdr.Param[0]);
+#endif 
+        	cdr.Mode = cdr.Param[0];
+			cdr.Ctrl |= 0x80;
+    		cdr.Stat = NoIntr; 
+    		AddIrqQueue(cdr.Cmd, 0x1000);
+        	break;
+
+    	case CdlGetmode:
+			cdr.Ctrl |= 0x80;
+    		cdr.Stat = NoIntr; 
+    		AddIrqQueue(cdr.Cmd, 0x1000);
+        	break;
+
+    	case CdlGetlocL:
+			cdr.Ctrl |= 0x80;
+    		cdr.Stat = NoIntr; 
+    		AddIrqQueue(cdr.Cmd, 0x1000);
+        	break;
+
+    	case CdlGetlocP:
+			cdr.Ctrl |= 0x80;
+    		cdr.Stat = NoIntr; 
+			AddIrqQueue(cdr.Cmd, 0x1000);
+        	break;
+
+    	case CdlGetTN:
+			cdr.Ctrl |= 0x80;
+    		cdr.Stat = NoIntr; 
+    		AddIrqQueue(cdr.Cmd, 0x1000);
+        	break;
+
+    	case CdlGetTD:
+			cdr.Ctrl |= 0x80;
+    		cdr.Stat = NoIntr; 
+    		AddIrqQueue(cdr.Cmd, 0x1000);
+        	break;
+
+    	case CdlSeekL:
+//			((u32 *)cdr.SetSectorSeek)[0] = ((u32 *)cdr.SetSector)[0];
+			cdr.Ctrl |= 0x80;
+    		cdr.Stat = NoIntr; 
+    		AddIrqQueue(cdr.Cmd, 0x1000);
+        	break;
+
+    	case CdlSeekP:
+//        	((u32 *)cdr.SetSectorSeek)[0] = ((u32 *)cdr.SetSector)[0];
+			cdr.Ctrl |= 0x80;
+    		cdr.Stat = NoIntr; 
+    		AddIrqQueue(cdr.Cmd, 0x1000);
+        	break;
+
+    	case CdlTest:
+			cdr.Ctrl |= 0x80;
+    		cdr.Stat = NoIntr; 
+    		AddIrqQueue(cdr.Cmd, 0x1000);
+        	break;
+
+    	case CdlID:
+			cdr.Ctrl |= 0x80;
+    		cdr.Stat = NoIntr; 
+    		AddIrqQueue(cdr.Cmd, 0x1000);
+        	break;
+
+    	case CdlReadS:
+			cdr.Irq = 0;
+			StopReading();
+			cdr.Ctrl |= 0x80;
+    		cdr.Stat = NoIntr; 
+			StartReading(2, 0x1000);
+        	break;
+
+    	case CdlReadToc:
+			cdr.Ctrl |= 0x80;
+    		cdr.Stat = NoIntr; 
+    		AddIrqQueue(cdr.Cmd, 0x1000);
+        	break;
+
+    	default:
+#ifdef CDR_LOG
+			CDR_LOG("cdrWrite1() Log: Unknown command: %x\n", cdr.Cmd);
+#endif
+			return;
+    }
+	if (cdr.Stat != NoIntr) {
+		psxHu32ref(0x1070) |= SWAP32((u32)0x4);
+	}
+}
+
+unsigned char cdrRead2(void) {
+	unsigned char ret;
+
+	if (cdr.Readed == 0) {
+		ret = 0;
+	} else {
+		ret = *cdr.pTransfer++;
+	}
+
+#ifdef CDR_LOG
+	CDR_LOG("cdrRead2() Log: CD2 Read: %x\n", ret);
+#endif
+	return ret;
+}
+
+void cdrWrite2(unsigned char rt) {
+#ifdef CDR_LOG
+	CDR_LOG("cdrWrite2() Log: CD2 write: %x\n", rt);
+#endif
+    if (cdr.Ctrl & 0x1) {
+		switch (rt) {
+			case 0x07:
+	    		cdr.ParamP = 0;
+				cdr.ParamC = 0;
+				cdr.ResultReady = 1; //0;
+				cdr.Ctrl &= ~3; //cdr.Ctrl = 0;
+				break;
+
+			default:
+				cdr.Reg2 = rt;
+				break;
+		}
+    } else if (!(cdr.Ctrl & 0x1) && cdr.ParamP < 8) {
+		cdr.Param[cdr.ParamP++] = rt;
+		cdr.ParamC++;
+	}
+}
+
+unsigned char cdrRead3(void) {
+	if (cdr.Stat) {
+		if (cdr.Ctrl & 0x1)
+			psxHu8(0x1803) = cdr.Stat | 0xE0;
+		else
+			psxHu8(0x1803) = 0xff;
+	} else {
+		psxHu8(0x1803) = 0;
+	}
+#ifdef CDR_LOG
+	CDR_LOG("cdrRead3() Log: CD3 Read: %x\n", psxHu8(0x1803));
+#endif
+	return psxHu8(0x1803);
+}
+
+void cdrWrite3(unsigned char rt) {
+#ifdef CDR_LOG
+	CDR_LOG("cdrWrite3() Log: CD3 write: %x\n", rt);
+#endif
+    if (rt == 0x07 && cdr.Ctrl & 0x1) {
+		cdr.Stat = 0;
+
+		if (cdr.Irq == 0xff) {
+			cdr.Irq = 0;
+			return;
+		}
+		if (cdr.Irq)
+			CDR_INT(cdr.eCycle);
+		if (cdr.Reading && !cdr.ResultReady) 
+            CDREAD_INT((cdr.Mode & 0x80) ? (cdReadTime / 2) : cdReadTime);
+
+		return;
+	}
+	if (rt == 0x80 && !(cdr.Ctrl & 0x1) && cdr.Readed == 0) {
+		cdr.Readed = 1;
+		cdr.pTransfer = cdr.Transfer;
+
+		switch (cdr.Mode & 0x30) {
+			case 0x10:
+			case 0x00:
+				cdr.pTransfer += 12;
+				break;
+			default:
+				break;
+		}
+	}
+}
+
+void psxDma3(u32 madr, u32 bcr, u32 chcr) {
+	u32 cdsize;
+	u8 *ptr;
+
+#ifdef CDR_LOG
+	CDR_LOG("psxDma3() Log: *** DMA 3 *** %x addr = %x size = %x\n", chcr, madr, bcr);
+#endif
+
+	switch (chcr) {
+		case 0x11000000:
+		case 0x11400100:
+			if (cdr.Readed == 0) {
+#ifdef CDR_LOG
+				CDR_LOG("psxDma3() Log: *** DMA 3 *** NOT READY\n");
+#endif
+				break;
+			}
+
+			cdsize = (bcr & 0xffff) * 4;
+
+			ptr = (u8 *)PSXM(madr);
+			if (ptr == NULL) {
+#ifdef CPU_LOG
+				CDR_LOG("psxDma3() Log: *** DMA 3 *** NULL Pointer!\n");
+#endif
+				break;
+			}
+			memcpy(ptr, cdr.pTransfer, cdsize);
+			psxCpu->Clear(madr, cdsize / 4);
+			cdr.pTransfer += cdsize;
+			break;
+		default:
+#ifdef CDR_LOG
+			CDR_LOG("psxDma3() Log: Unknown cddma %x\n", chcr);
+#endif
+			break;
+	}
+
+	HW_DMA3_CHCR &= SWAP32(~0x01000000);
+	DMA_INTERRUPT(3);
+}
+
+void cdrReset() {
+	memset(&cdr, 0, sizeof(cdr));
+	cdr.CurTrack = 1;
+	cdr.File = 1;
+	cdr.Channel = 1;
+}
+
+int cdrFreeze(gzFile f, int Mode) {
+	uintptr_t tmp;
+
+	gzfreeze(&cdr, sizeof(cdr));
+
+	if (Mode == 1)
+		tmp = cdr.pTransfer - cdr.Transfer;
+
+	gzfreeze(&tmp, sizeof(tmp));
+
+	if (Mode == 0)
+		cdr.pTransfer = cdr.Transfer + tmp;
+
+	return 0;
+}
diff --git a/libpcsxcore/cdrom.h b/libpcsxcore/cdrom.h
new file mode 100644
index 0000000..c5d448c
--- /dev/null
+++ b/libpcsxcore/cdrom.h
@@ -0,0 +1,110 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+#ifndef __CDROM_H__
+#define __CDROM_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "psxcommon.h"
+#include "decode_xa.h"
+#include "r3000a.h"
+#include "plugins.h"
+#include "psxmem.h"
+#include "psxhw.h"
+
+#define btoi(b)     ((b) / 16 * 10 + (b) % 16) /* BCD to u_char */
+#define itob(i)     ((i) / 10 * 16 + (i) % 10) /* u_char to BCD */
+
+#define MSF2SECT(m, s, f)		(((m) * 60 + (s) - 2) * 75 + (f))
+
+#define CD_FRAMESIZE_RAW		2352
+#define DATA_SIZE				(CD_FRAMESIZE_RAW - 12)
+
+#define SUB_FRAMESIZE			96
+
+typedef struct {
+	unsigned char OCUP;
+	unsigned char Reg1Mode;
+	unsigned char Reg2;
+	unsigned char CmdProcess;
+	unsigned char Ctrl;
+	unsigned char Stat;
+
+	unsigned char StatP;
+
+	unsigned char Transfer[CD_FRAMESIZE_RAW];
+	unsigned char *pTransfer;
+
+	unsigned char Prev[4];
+	unsigned char Param[8];
+	unsigned char Result[8];
+
+	unsigned char ParamC;
+	unsigned char ParamP;
+	unsigned char ResultC;
+	unsigned char ResultP;
+	unsigned char ResultReady;
+	unsigned char Cmd;
+	unsigned char Readed;
+	u32 Reading;
+
+	unsigned char ResultTN[6];
+	unsigned char ResultTD[4];
+	unsigned char SetSector[4];
+	unsigned char SetSectorSeek[4];
+	unsigned char Track;
+	boolean Play, Muted;
+	int CurTrack;
+	int Mode, File, Channel;
+	int Reset;
+	int RErr;
+	int FirstSector;
+
+	xa_decode_t Xa;
+
+	int Init;
+
+	unsigned char Irq;
+	u32 eCycle;
+
+	boolean Seeked;
+} cdrStruct;
+
+extern cdrStruct cdr;
+
+void cdrReset();
+void cdrInterrupt();
+void cdrReadInterrupt();
+unsigned char cdrRead0(void);
+unsigned char cdrRead1(void);
+unsigned char cdrRead2(void);
+unsigned char cdrRead3(void);
+void cdrWrite0(unsigned char rt);
+void cdrWrite1(unsigned char rt);
+void cdrWrite2(unsigned char rt);
+void cdrWrite3(unsigned char rt);
+int cdrFreeze(gzFile f, int Mode);
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/libpcsxcore/cheat.c b/libpcsxcore/cheat.c
new file mode 100644
index 0000000..21d88b8
--- /dev/null
+++ b/libpcsxcore/cheat.c
@@ -0,0 +1,1024 @@
+/*  Cheat Support for PCSX-Reloaded
+ *  Copyright (c) 2009, Wei Mingzhi <whistler_wmz@users.sf.net>.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA
+ */
+
+#include "psxcommon.h"
+#include "r3000a.h"
+#include "psxmem.h"
+
+#include "cheat.h"
+
+Cheat *Cheats = NULL;
+int NumCheats = 0;
+static int NumCheatsAllocated = 0;
+
+CheatCode *CheatCodes = NULL;
+int NumCodes = 0;
+static int NumCodesAllocated = 0;
+
+s8 *prevM = NULL;
+u32 *SearchResults = NULL;
+int NumSearchResults = 0;
+static int NumSearchResultsAllocated = 0;
+
+#define ALLOC_INCREMENT		100
+
+void ClearAllCheats() {
+	int i;
+
+	if (Cheats != NULL) {
+		for (i = 0; i < NumCheats; i++) {
+			free(Cheats[i].Descr);
+		}
+		free(Cheats);
+	}
+
+	Cheats = NULL;
+	NumCheats = 0;
+	NumCheatsAllocated = 0;
+
+	if (CheatCodes != NULL) {
+		free(CheatCodes);
+	}
+
+	CheatCodes = NULL;
+	NumCodes = 0;
+	NumCodesAllocated = 0;
+}
+
+// load cheats from the specific filename
+void LoadCheats(const char *filename) {
+	FILE				*fp;
+	char				buf[256];
+	int					count = 0;
+	unsigned int		t1, t2;
+
+	fp = fopen(filename, "r");
+	if (fp == NULL) {
+		return;
+	}
+
+	ClearAllCheats();
+
+	while (fgets(buf, 255, fp) != NULL) {
+		buf[255] = '\0';
+		trim(buf);
+
+		// Skip comment or blank lines
+		if (buf[0] == '#' || buf[0] == ';' || buf[0] == '/' || buf[0] == '\"' || buf[0] == '\0')
+			continue;
+
+		if (buf[0] == '[' && buf[strlen(buf) - 1] == ']') {
+			if (NumCheats > 0)
+				Cheats[NumCheats - 1].n = count;
+
+			if (NumCheats >= NumCheatsAllocated) {
+				NumCheatsAllocated += ALLOC_INCREMENT;
+
+				if (Cheats == NULL) {
+					assert(NumCheats == 0);
+					assert(NumCheatsAllocated == ALLOC_INCREMENT);
+					Cheats = (Cheat *)malloc(sizeof(Cheat) * NumCheatsAllocated);
+				} else {
+					Cheats = (Cheat *)realloc(Cheats, sizeof(Cheat) * NumCheatsAllocated);
+				}
+			}
+
+			buf[strlen(buf) - 1] = '\0';
+			count = 0;
+
+			if (buf[1] == '*') {
+				Cheats[NumCheats].Descr = strdup(buf + 2);
+				Cheats[NumCheats].Enabled = 1;
+			} else {
+				Cheats[NumCheats].Descr = strdup(buf + 1);
+				Cheats[NumCheats].Enabled = 0;
+			}
+
+			Cheats[NumCheats].First = NumCodes;
+
+			NumCheats++;
+			continue;
+		}
+
+		if (NumCheats <= 0)
+			continue;
+
+		if (NumCodes >= NumCodesAllocated) {
+			NumCodesAllocated += ALLOC_INCREMENT;
+
+			if (CheatCodes == NULL) {
+				assert(NumCodes == 0);
+				assert(NumCodesAllocated == ALLOC_INCREMENT);
+				CheatCodes = (CheatCode *)malloc(sizeof(CheatCode) * NumCodesAllocated);
+			} else {
+				CheatCodes = (CheatCode *)realloc(CheatCodes, sizeof(CheatCode) * NumCodesAllocated);
+			}
+		}
+
+		sscanf(buf, "%x %x", &t1, &t2);
+
+		CheatCodes[NumCodes].Addr = t1;
+		CheatCodes[NumCodes].Val = t2;
+
+		NumCodes++;
+		count++;
+	}
+
+	if (NumCheats > 0)
+		Cheats[NumCheats - 1].n = count;
+
+	fclose(fp);
+
+	SysPrintf(_("Cheats loaded from: %s\n"), filename);
+}
+
+// save all cheats to the specified filename
+void SaveCheats(const char *filename) {
+	FILE		*fp;
+	int			i, j;
+
+	fp = fopen(filename, "w");
+	if (fp == NULL) {
+		return;
+	}
+
+	for (i = 0; i < NumCheats; i++) {
+		// write the description
+		if (Cheats[i].Enabled)
+			fprintf(fp, "[*%s]\n", Cheats[i].Descr);
+		else
+			fprintf(fp, "[%s]\n", Cheats[i].Descr);
+
+		// write all cheat codes
+		for (j = 0; j < Cheats[i].n; j++) {
+			fprintf(fp, "%.8X %.4X\n",
+				CheatCodes[Cheats[i].First + j].Addr,
+				CheatCodes[Cheats[i].First + j].Val);
+		}
+
+		fprintf(fp, "\n");
+	}
+
+	fclose(fp);
+
+	SysPrintf(_("Cheats saved to: %s\n"), filename);
+}
+
+// apply all enabled cheats
+void ApplyCheats() {
+	int		i, j, k, endindex;
+
+	for (i = 0; i < NumCheats; i++) {
+		if (!Cheats[i].Enabled) {
+			continue;
+		}
+
+		// process all cheat codes
+		endindex = Cheats[i].First + Cheats[i].n;
+
+		for (j = Cheats[i].First; j < endindex; j++) {
+			u8		type = (uint8_t)(CheatCodes[j].Addr >> 24);
+			u32		addr = (CheatCodes[j].Addr & 0x001FFFFF);
+			u16		val = CheatCodes[j].Val;
+			u32		taddr;
+
+			switch (type) {
+				case CHEAT_CONST8:
+					psxMu8ref(addr) = (u8)val;
+					break;
+
+				case CHEAT_CONST16:
+					psxMu16ref(addr) = SWAPu16(val);
+					break;
+
+				case CHEAT_INC16:
+					psxMu16ref(addr) = SWAPu16(psxMu16(addr) + val);
+					break;
+
+				case CHEAT_DEC16:
+					psxMu16ref(addr) = SWAPu16(psxMu16(addr) - val);
+					break;
+
+				case CHEAT_INC8:
+					psxMu8ref(addr) += (u8)val;
+					break;
+
+				case CHEAT_DEC8:
+					psxMu8ref(addr) -= (u8)val;
+					break;
+
+				case CHEAT_SLIDE:
+					j++;
+					if (j >= endindex)
+						break;
+
+					type = (uint8_t)(CheatCodes[j].Addr >> 24);
+					taddr = (CheatCodes[j].Addr & 0x001FFFFF);
+					val = CheatCodes[j].Val;
+
+					if (type == CHEAT_CONST8) {
+						for (k = 0; k < ((addr >> 8) & 0xFF); k++) {
+							psxMu8ref(taddr) = (u8)val;
+							taddr += (s8)(addr & 0xFF);
+							val += (s8)(CheatCodes[j - 1].Val & 0xFF);
+						}
+					}
+					else if (type == CHEAT_CONST16) {
+						for (k = 0; k < ((addr >> 8) & 0xFF); k++) {
+							psxMu16ref(taddr) = SWAPu16(val);
+							taddr += (s8)(addr & 0xFF);
+							val += (s8)(CheatCodes[j - 1].Val & 0xFF);
+						}
+					}
+					break;
+
+				case CHEAT_MEMCPY:
+					j++;
+					if (j >= endindex)
+						break;
+
+					taddr = (CheatCodes[j].Addr & 0x001FFFFF);
+					for (k = 0; k < val; k++) {
+						psxMu8ref(taddr + k) = PSXMu8(addr + k);
+					}
+					break;
+
+				case CHEAT_EQU8:
+					if (PSXMu8(addr) != (u8)val)
+						j++; // skip the next code
+					break;
+
+				case CHEAT_NOTEQU8:
+					if (PSXMu8(addr) == (u8)val)
+						j++; // skip the next code
+					break;
+
+				case CHEAT_LESSTHAN8:
+					if (PSXMu8(addr) >= (u8)val)
+						j++; // skip the next code
+					break;
+
+				case CHEAT_GREATERTHAN8:
+					if (PSXMu8(addr) <= (u8)val)
+						j++; // skip the next code
+					break;
+
+				case CHEAT_EQU16:
+					if (PSXMu16(addr) != val)
+						j++; // skip the next code
+					break;
+
+				case CHEAT_NOTEQU16:
+					if (PSXMu16(addr) == val)
+						j++; // skip the next code
+					break;
+
+				case CHEAT_LESSTHAN16:
+					if (PSXMu16(addr) >= val)
+						j++; // skip the next code
+					break;
+
+				case CHEAT_GREATERTHAN16:
+					if (PSXMu16(addr) <= val)
+						j++; // skip the next code
+					break;
+			}
+		}
+	}
+}
+
+int AddCheat(const char *descr, char *code) {
+	int c = 1;
+	char *p1, *p2;
+
+	if (NumCheats >= NumCheatsAllocated) {
+		NumCheatsAllocated += ALLOC_INCREMENT;
+
+		if (Cheats == NULL) {
+			assert(NumCheats == 0);
+			assert(NumCheatsAllocated == ALLOC_INCREMENT);
+			Cheats = (Cheat *)malloc(sizeof(Cheat) * NumCheatsAllocated);
+		}
+		else {
+			Cheats = (Cheat *)realloc(Cheats, sizeof(Cheat) * NumCheatsAllocated);
+		}
+	}
+
+	Cheats[NumCheats].Descr = strdup(descr[0] ? descr : _("(Untitled)"));
+	Cheats[NumCheats].Enabled = 0;
+	Cheats[NumCheats].First = NumCodes;
+	Cheats[NumCheats].n = 0;
+
+	p1 = code;
+	p2 = code;
+
+	while (c) {
+		unsigned int t1, t2;
+
+		while (*p2 != '\n' && *p2 != '\0')
+			p2++;
+
+		if (*p2 == '\0')
+			c = 0;
+
+		*p2 = '\0';
+		p2++;
+
+		t1 = 0;
+		t2 = 0;
+		sscanf(p1, "%x %x", &t1, &t2);
+
+		if (t1 > 0x10000000) {
+			if (NumCodes >= NumCodesAllocated) {
+				NumCodesAllocated += ALLOC_INCREMENT;
+
+				if (CheatCodes == NULL) {
+					assert(NumCodes == 0);
+					assert(NumCodesAllocated == ALLOC_INCREMENT);
+					CheatCodes = (CheatCode *)malloc(sizeof(CheatCode) * NumCodesAllocated);
+				}
+				else {
+					CheatCodes = (CheatCode *)realloc(CheatCodes, sizeof(CheatCode) * NumCodesAllocated);
+				}
+			}
+
+			CheatCodes[NumCodes].Addr = t1;
+			CheatCodes[NumCodes].Val = t2;
+			NumCodes++;
+			Cheats[NumCheats].n++;
+		}
+
+		p1 = p2;
+	}
+
+	if (Cheats[NumCheats].n == 0) {
+		return -1;
+	}
+
+	NumCheats++;
+	return 0;
+}
+
+void RemoveCheat(int index) {
+	assert(index >= 0 && index < NumCheats);
+
+	free(Cheats[index].Descr);
+
+	while (index < NumCheats - 1) {
+		Cheats[index] = Cheats[index + 1];
+		index++;
+	}
+
+	NumCheats--;
+}
+
+int EditCheat(int index, const char *descr, char *code) {
+	int c = 1;
+	int prev = NumCodes;
+	char *p1, *p2;
+
+	assert(index >= 0 && index < NumCheats);
+
+	p1 = code;
+	p2 = code;
+
+	while (c) {
+		unsigned int t1, t2;
+
+		while (*p2 != '\n' && *p2 != '\0')
+			p2++;
+
+		if (*p2 == '\0')
+			c = 0;
+
+		*p2 = '\0';
+		p2++;
+
+		t1 = 0;
+		t2 = 0;
+		sscanf(p1, "%x %x", &t1, &t2);
+
+		if (t1 > 0x10000000) {
+			if (NumCodes >= NumCodesAllocated) {
+				NumCodesAllocated += ALLOC_INCREMENT;
+
+				if (CheatCodes == NULL) {
+					assert(NumCodes == 0);
+					assert(NumCodesAllocated == ALLOC_INCREMENT);
+					CheatCodes = (CheatCode *)malloc(sizeof(CheatCode) * NumCodesAllocated);
+				}
+				else {
+					CheatCodes = (CheatCode *)realloc(CheatCodes, sizeof(CheatCode) * NumCodesAllocated);
+				}
+			}
+
+			CheatCodes[NumCodes].Addr = t1;
+			CheatCodes[NumCodes].Val = t2;
+			NumCodes++;
+		}
+
+		p1 = p2;
+	}
+
+	if (NumCodes == prev) {
+		return -1;
+	}
+
+	free(Cheats[index].Descr);
+	Cheats[index].Descr = strdup(descr[0] ? descr : _("(Untitled)"));
+	Cheats[index].First = prev;
+	Cheats[index].n = NumCodes - prev;
+
+	return 0;
+}
+
+void FreeCheatSearchResults() {
+	if (SearchResults != NULL) {
+		free(SearchResults);
+	}
+	SearchResults = NULL;
+
+	NumSearchResults = 0;
+	NumSearchResultsAllocated = 0;
+}
+
+void FreeCheatSearchMem() {
+	if (prevM != NULL) {
+		free(prevM);
+	}
+	prevM = NULL;
+}
+
+void CheatSearchBackupMemory() {
+	if (prevM != NULL) {
+		memcpy(prevM, psxM, 0x200000);
+	}
+}
+
+static void CheatSearchInitBackupMemory() {
+	if (prevM == NULL) {
+		prevM = (s8 *)malloc(0x200000);
+		CheatSearchBackupMemory();
+	}
+}
+
+static void CheatSearchAddResult(u32 addr) {
+	if (NumSearchResults >= NumSearchResultsAllocated) {
+		NumSearchResultsAllocated += ALLOC_INCREMENT;
+
+		if (SearchResults == NULL) {
+			SearchResults = (u32 *)malloc(sizeof(u32) * NumSearchResultsAllocated);
+		}
+		else {
+			SearchResults = (u32 *)realloc(SearchResults, sizeof(u32) * NumSearchResultsAllocated);
+		}
+	}
+
+	SearchResults[NumSearchResults++] = addr;
+}
+
+void CheatSearchEqual8(u8 val) {
+	u32 i, j;
+
+	CheatSearchInitBackupMemory();
+
+	if (SearchResults == NULL) {
+		// search the whole memory
+		for (i = 0; i < 0x200000; i++) {
+			if (PSXMu8(i) == val) {
+				CheatSearchAddResult(i);
+			}
+		}
+	}
+	else {
+		// only search within the previous results
+		j = 0;
+
+		for (i = 0; i < NumSearchResults; i++) {
+			if (PSXMu8(SearchResults[i]) == val) {
+				SearchResults[j++] = SearchResults[i];
+			}
+		}
+
+		NumSearchResults = j;
+	}
+}
+
+void CheatSearchEqual16(u16 val) {
+	u32 i, j;
+
+	CheatSearchInitBackupMemory();
+
+	if (SearchResults == NULL) {
+		// search the whole memory
+		for (i = 0; i < 0x200000; i += 2) {
+			if (PSXMu16(i) == val) {
+				CheatSearchAddResult(i);
+			}
+		}
+	}
+	else {
+		// only search within the previous results
+		j = 0;
+
+		for (i = 0; i < NumSearchResults; i++) {
+			if (PSXMu16(SearchResults[i]) == val) {
+				SearchResults[j++] = SearchResults[i];
+			}
+		}
+
+		NumSearchResults = j;
+	}
+}
+
+void CheatSearchEqual32(u32 val) {
+	u32 i, j;
+
+	CheatSearchInitBackupMemory();
+
+	if (SearchResults == NULL) {
+		// search the whole memory
+		for (i = 0; i < 0x200000; i += 4) {
+			if (PSXMu32(i) == val) {
+				CheatSearchAddResult(i);
+			}
+		}
+	}
+	else {
+		// only search within the previous results
+		j = 0;
+
+		for (i = 0; i < NumSearchResults; i++) {
+			if (PSXMu32(SearchResults[i]) == val) {
+				SearchResults[j++] = SearchResults[i];
+			}
+		}
+
+		NumSearchResults = j;
+	}
+}
+
+void CheatSearchNotEqual8(u8 val) {
+	u32 i, j;
+
+	CheatSearchInitBackupMemory();
+
+	if (SearchResults == NULL) {
+		// search the whole memory
+		for (i = 0; i < 0x200000; i++) {
+			if (PSXMu8(i) != val) {
+				CheatSearchAddResult(i);
+			}
+		}
+	}
+	else {
+		// only search within the previous results
+		j = 0;
+
+		for (i = 0; i < NumSearchResults; i++) {
+			if (PSXMu8(SearchResults[i]) != val) {
+				SearchResults[j++] = SearchResults[i];
+			}
+		}
+
+		NumSearchResults = j;
+	}
+}
+
+void CheatSearchNotEqual16(u16 val) {
+	u32 i, j;
+
+	CheatSearchInitBackupMemory();
+
+	if (SearchResults == NULL) {
+		// search the whole memory
+		for (i = 0; i < 0x200000; i += 2) {
+			if (PSXMu16(i) != val) {
+				CheatSearchAddResult(i);
+			}
+		}
+	}
+	else {
+		// only search within the previous results
+		j = 0;
+
+		for (i = 0; i < NumSearchResults; i++) {
+			if (PSXMu16(SearchResults[i]) != val) {
+				SearchResults[j++] = SearchResults[i];
+			}
+		}
+
+		NumSearchResults = j;
+	}
+}
+
+void CheatSearchNotEqual32(u32 val) {
+	u32 i, j;
+
+	CheatSearchInitBackupMemory();
+
+	if (SearchResults == NULL) {
+		// search the whole memory
+		for (i = 0; i < 0x200000; i += 4) {
+			if (PSXMu32(i) != val) {
+				CheatSearchAddResult(i);
+			}
+		}
+	}
+	else {
+		// only search within the previous results
+		j = 0;
+
+		for (i = 0; i < NumSearchResults; i++) {
+			if (PSXMu32(SearchResults[i]) != val) {
+				SearchResults[j++] = SearchResults[i];
+			}
+		}
+
+		NumSearchResults = j;
+	}
+}
+
+void CheatSearchRange8(u8 min, u8 max) {
+	u32 i, j;
+
+	CheatSearchInitBackupMemory();
+
+	if (SearchResults == NULL) {
+		// search the whole memory
+		for (i = 0; i < 0x200000; i++) {
+			if (PSXMu8(i) >= min && PSXMu8(i) <= max) {
+				CheatSearchAddResult(i);
+			}
+		}
+	}
+	else {
+		// only search within the previous results
+		j = 0;
+
+		for (i = 0; i < NumSearchResults; i++) {
+			if (PSXMu8(SearchResults[i]) >= min && PSXMu8(SearchResults[i]) <= max) {
+				SearchResults[j++] = SearchResults[i];
+			}
+		}
+
+		NumSearchResults = j;
+	}
+}
+
+void CheatSearchRange16(u16 min, u16 max) {
+	u32 i, j;
+
+	CheatSearchInitBackupMemory();
+
+	if (SearchResults == NULL) {
+		// search the whole memory
+		for (i = 0; i < 0x200000; i += 2) {
+			if (PSXMu16(i) >= min && PSXMu16(i) <= max) {
+				CheatSearchAddResult(i);
+			}
+		}
+	}
+	else {
+		// only search within the previous results
+		j = 0;
+
+		for (i = 0; i < NumSearchResults; i++) {
+			if (PSXMu16(SearchResults[i]) >= min && PSXMu16(SearchResults[i]) <= max) {
+				SearchResults[j++] = SearchResults[i];
+			}
+		}
+
+		NumSearchResults = j;
+	}
+}
+
+void CheatSearchRange32(u32 min, u32 max) {
+	u32 i, j;
+
+	CheatSearchInitBackupMemory();
+
+	if (SearchResults == NULL) {
+		// search the whole memory
+		for (i = 0; i < 0x200000; i += 4) {
+			if (PSXMu32(i) >= min && PSXMu32(i) <= max) {
+				CheatSearchAddResult(i);
+			}
+		}
+	}
+	else {
+		// only search within the previous results
+		j = 0;
+
+		for (i = 0; i < NumSearchResults; i++) {
+			if (PSXMu32(SearchResults[i]) >= min && PSXMu32(SearchResults[i]) <= max) {
+				SearchResults[j++] = SearchResults[i];
+			}
+		}
+
+		NumSearchResults = j;
+	}
+}
+
+void CheatSearchIncreasedBy8(u8 val) {
+	u32 i, j;
+
+	assert(prevM != NULL); // not possible for the first search
+
+	j = 0;
+
+	for (i = 0; i < NumSearchResults; i++) {
+		if (PSXMu8(SearchResults[i]) - PrevMu8(SearchResults[i]) == val) {
+			SearchResults[j++] = SearchResults[i];
+		}
+	}
+
+	NumSearchResults = j;
+}
+
+void CheatSearchIncreasedBy16(u16 val) {
+	u32 i, j;
+
+	assert(prevM != NULL); // not possible for the first search
+
+	j = 0;
+
+	for (i = 0; i < NumSearchResults; i++) {
+		if (PSXMu16(SearchResults[i]) - PrevMu16(SearchResults[i]) == val) {
+			SearchResults[j++] = SearchResults[i];
+		}
+	}
+
+	NumSearchResults = j;
+}
+
+void CheatSearchIncreasedBy32(u32 val) {
+	u32 i, j;
+
+	assert(prevM != NULL); // not possible for the first search
+
+	j = 0;
+
+	for (i = 0; i < NumSearchResults; i++) {
+		if (PSXMu32(SearchResults[i]) - PrevMu32(SearchResults[i]) == val) {
+			SearchResults[j++] = SearchResults[i];
+		}
+	}
+
+	NumSearchResults = j;
+}
+
+void CheatSearchDecreasedBy8(u8 val) {
+	u32 i, j;
+
+	assert(prevM != NULL); // not possible for the first search
+
+	j = 0;
+
+	for (i = 0; i < NumSearchResults; i++) {
+		if (PrevMu8(SearchResults[i]) - PSXMu8(SearchResults[i]) == val) {
+			SearchResults[j++] = SearchResults[i];
+		}
+	}
+
+	NumSearchResults = j;
+}
+
+void CheatSearchDecreasedBy16(u16 val) {
+	u32 i, j;
+
+	assert(prevM != NULL); // not possible for the first search
+
+	j = 0;
+
+	for (i = 0; i < NumSearchResults; i++) {
+		if (PrevMu16(SearchResults[i]) - PSXMu16(SearchResults[i]) == val) {
+			SearchResults[j++] = SearchResults[i];
+		}
+	}
+
+	NumSearchResults = j;
+}
+
+void CheatSearchDecreasedBy32(u32 val) {
+	u32 i, j;
+
+	assert(prevM != NULL); // not possible for the first search
+
+	j = 0;
+
+	for (i = 0; i < NumSearchResults; i++) {
+		if (PrevMu32(SearchResults[i]) - PSXMu32(SearchResults[i]) == val) {
+			SearchResults[j++] = SearchResults[i];
+		}
+	}
+
+	NumSearchResults = j;
+}
+
+void CheatSearchIncreased8() {
+	u32 i, j;
+
+	assert(prevM != NULL); // not possible for the first search
+
+	j = 0;
+
+	for (i = 0; i < NumSearchResults; i++) {
+		if (PrevMu8(SearchResults[i]) < PSXMu8(SearchResults[i])) {
+			SearchResults[j++] = SearchResults[i];
+		}
+	}
+
+	NumSearchResults = j;
+}
+
+void CheatSearchIncreased16() {
+	u32 i, j;
+
+	assert(prevM != NULL); // not possible for the first search
+
+	j = 0;
+
+	for (i = 0; i < NumSearchResults; i++) {
+		if (PrevMu16(SearchResults[i]) < PSXMu16(SearchResults[i])) {
+			SearchResults[j++] = SearchResults[i];
+		}
+	}
+
+	NumSearchResults = j;
+}
+
+void CheatSearchIncreased32() {
+	u32 i, j;
+
+	assert(prevM != NULL); // not possible for the first search
+
+	j = 0;
+
+	for (i = 0; i < NumSearchResults; i++) {
+		if (PrevMu32(SearchResults[i]) < PSXMu32(SearchResults[i])) {
+			SearchResults[j++] = SearchResults[i];
+		}
+	}
+
+	NumSearchResults = j;
+}
+
+void CheatSearchDecreased8() {
+	u32 i, j;
+
+	assert(prevM != NULL); // not possible for the first search
+
+	j = 0;
+
+	for (i = 0; i < NumSearchResults; i++) {
+		if (PrevMu8(SearchResults[i]) > PSXMu8(SearchResults[i])) {
+			SearchResults[j++] = SearchResults[i];
+		}
+	}
+
+	NumSearchResults = j;
+}
+
+void CheatSearchDecreased16() {
+	u32 i, j;
+
+	assert(prevM != NULL); // not possible for the first search
+
+	j = 0;
+
+	for (i = 0; i < NumSearchResults; i++) {
+		if (PrevMu16(SearchResults[i]) > PSXMu16(SearchResults[i])) {
+			SearchResults[j++] = SearchResults[i];
+		}
+	}
+
+	NumSearchResults = j;
+}
+
+void CheatSearchDecreased32() {
+	u32 i, j;
+
+	assert(prevM != NULL); // not possible for the first search
+
+	j = 0;
+
+	for (i = 0; i < NumSearchResults; i++) {
+		if (PrevMu32(SearchResults[i]) > PSXMu32(SearchResults[i])) {
+			SearchResults[j++] = SearchResults[i];
+		}
+	}
+
+	NumSearchResults = j;
+}
+
+void CheatSearchDifferent8() {
+	u32 i, j;
+
+	assert(prevM != NULL); // not possible for the first search
+
+	j = 0;
+
+	for (i = 0; i < NumSearchResults; i++) {
+		if (PrevMu8(SearchResults[i]) != PSXMu8(SearchResults[i])) {
+			SearchResults[j++] = SearchResults[i];
+		}
+	}
+
+	NumSearchResults = j;
+}
+
+void CheatSearchDifferent16() {
+	u32 i, j;
+
+	assert(prevM != NULL); // not possible for the first search
+
+	j = 0;
+
+	for (i = 0; i < NumSearchResults; i++) {
+		if (PrevMu16(SearchResults[i]) != PSXMu16(SearchResults[i])) {
+			SearchResults[j++] = SearchResults[i];
+		}
+	}
+
+	NumSearchResults = j;
+}
+
+void CheatSearchDifferent32() {
+	u32 i, j;
+
+	assert(prevM != NULL); // not possible for the first search
+
+	j = 0;
+
+	for (i = 0; i < NumSearchResults; i++) {
+		if (PrevMu32(SearchResults[i]) != PSXMu32(SearchResults[i])) {
+			SearchResults[j++] = SearchResults[i];
+		}
+	}
+
+	NumSearchResults = j;
+}
+
+void CheatSearchNoChange8() {
+	u32 i, j;
+
+	assert(prevM != NULL); // not possible for the first search
+
+	j = 0;
+
+	for (i = 0; i < NumSearchResults; i++) {
+		if (PrevMu8(SearchResults[i]) == PSXMu8(SearchResults[i])) {
+			SearchResults[j++] = SearchResults[i];
+		}
+	}
+
+	NumSearchResults = j;
+}
+
+void CheatSearchNoChange16() {
+	u32 i, j;
+
+	assert(prevM != NULL); // not possible for the first search
+
+	j = 0;
+
+	for (i = 0; i < NumSearchResults; i++) {
+		if (PrevMu16(SearchResults[i]) == PSXMu16(SearchResults[i])) {
+			SearchResults[j++] = SearchResults[i];
+		}
+	}
+
+	NumSearchResults = j;
+}
+
+void CheatSearchNoChange32() {
+	u32 i, j;
+
+	assert(prevM != NULL); // not possible for the first search
+
+	j = 0;
+
+	for (i = 0; i < NumSearchResults; i++) {
+		if (PrevMu32(SearchResults[i]) == PSXMu32(SearchResults[i])) {
+			SearchResults[j++] = SearchResults[i];
+		}
+	}
+
+	NumSearchResults = j;
+}
diff --git a/libpcsxcore/cheat.h b/libpcsxcore/cheat.h
new file mode 100644
index 0000000..d54f22c
--- /dev/null
+++ b/libpcsxcore/cheat.h
@@ -0,0 +1,117 @@
+/*  Cheat Support for PCSX-Reloaded
+ *  Copyright (C) 2009, Wei Mingzhi <whistler_wmz@users.sf.net>.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA
+ */
+
+#ifndef CHEAT_H
+#define CHEAT_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct {
+	uint32_t	Addr;
+	uint16_t	Val;
+} CheatCode;
+
+typedef struct {
+	char		*Descr;
+	int			First;		// index of the first cheat code
+	int			n;			// number of cheat codes for this cheat
+	int			Enabled;
+} Cheat;
+
+void ClearAllCheats();
+
+void LoadCheats(const char *filename);
+void SaveCheats(const char *filename);
+
+void ApplyCheats();
+
+int AddCheat(const char *descr, char *code);
+void RemoveCheat(int index);
+int EditCheat(int index, const char *descr, char *code);
+
+void FreeCheatSearchResults();
+void FreeCheatSearchMem();
+void CheatSearchBackupMemory();
+
+void CheatSearchEqual8(u8 val);
+void CheatSearchEqual16(u16 val);
+void CheatSearchEqual32(u32 val);
+void CheatSearchNotEqual8(u8 val);
+void CheatSearchNotEqual16(u16 val);
+void CheatSearchNotEqual32(u32 val);
+void CheatSearchRange8(u8 min, u8 max);
+void CheatSearchRange16(u16 min, u16 max);
+void CheatSearchRange32(u32 min, u32 max);
+void CheatSearchIncreasedBy8(u8 val);
+void CheatSearchIncreasedBy16(u16 val);
+void CheatSearchIncreasedBy32(u32 val);
+void CheatSearchDecreasedBy8(u8 val);
+void CheatSearchDecreasedBy16(u16 val);
+void CheatSearchDecreasedBy32(u32 val);
+void CheatSearchIncreased8();
+void CheatSearchIncreased16();
+void CheatSearchIncreased32();
+void CheatSearchDecreased8();
+void CheatSearchDecreased16();
+void CheatSearchDecreased32();
+void CheatSearchDifferent8();
+void CheatSearchDifferent16();
+void CheatSearchDifferent32();
+void CheatSearchNoChange8();
+void CheatSearchNoChange16();
+void CheatSearchNoChange32();
+
+extern Cheat *Cheats;
+extern CheatCode *CheatCodes;
+extern int NumCheats;
+extern int NumCodes;
+
+extern s8 *prevM;
+extern u32 *SearchResults;
+extern int NumSearchResults;
+
+#define PREVM(mem)		(&prevM[mem])
+#define PrevMu8(mem)	(*(u8 *)PREVM(mem))
+#define PrevMu16(mem)	(SWAP16(*(u16 *)PREVM(mem)))
+#define PrevMu32(mem)	(SWAP32(*(u32 *)PREVM(mem)))
+
+// cheat types
+#define CHEAT_CONST8		0x30	/* 8-bit Constant Write */
+#define CHEAT_CONST16		0x80	/* 16-bit Constant Write */
+#define CHEAT_INC16			0x10	/* 16-bit Increment */
+#define CHEAT_DEC16			0x11	/* 16-bit Decrement */
+#define CHEAT_INC8			0x20	/* 8-bit Increment */
+#define CHEAT_DEC8			0x21	/* 8-bit Decrement */
+#define CHEAT_SLIDE			0x50	/* Slide Codes */
+#define CHEAT_MEMCPY		0xC2	/* Memory Copy */
+
+#define CHEAT_EQU8			0xE0	/* 8-bit Equal To */
+#define CHEAT_NOTEQU8		0xE1	/* 8-bit Not Equal To */
+#define CHEAT_LESSTHAN8		0xE2	/* 8-bit Less Than */
+#define CHEAT_GREATERTHAN8  0xE3	/* 8-bit Greater Than */
+#define CHEAT_EQU16			0xD0	/* 16-bit Equal To */
+#define CHEAT_NOTEQU16		0xD1	/* 16-bit Not Equal To */
+#define CHEAT_LESSTHAN16	0xD2	/* 16-bit Less Than */
+#define CHEAT_GREATERTHAN16 0xD3	/* 16-bit Greater Than */
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/libpcsxcore/coff.h b/libpcsxcore/coff.h
new file mode 100644
index 0000000..1d084d2
--- /dev/null
+++ b/libpcsxcore/coff.h
@@ -0,0 +1,38 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+#ifndef __COFF_H__
+#define __COFF_H__
+
+/********************** FILE HEADER **********************/
+
+struct external_filehdr {
+	unsigned short f_magic;		/* magic number			*/
+	unsigned short f_nscns;		/* number of sections		*/
+	unsigned long f_timdat;	/* time & date stamp		*/
+	unsigned long f_symptr;	/* file pointer to symtab	*/
+	unsigned long f_nsyms;		/* number of symtab entries	*/
+	unsigned short f_opthdr;	/* sizeof(optional hdr)		*/
+	unsigned short f_flags;		/* flags			*/
+};
+
+#define	FILHDR	struct external_filehdr
+#define	FILHSZ	sizeof(FILHDR)
+
+#endif
diff --git a/libpcsxcore/debug.c b/libpcsxcore/debug.c
new file mode 100644
index 0000000..307a002
--- /dev/null
+++ b/libpcsxcore/debug.c
@@ -0,0 +1,1145 @@
+/*  Pcsx - Pc Psx Emulator
+ *  Copyright (C) 1999-2003  Pcsx Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, see <http://www.gnu.org/licenses>.
+ */
+
+#include "psxcommon.h"
+#include "r3000a.h"
+#include "debug.h"
+#include "socket.h"
+
+/*
+PCSX Debug console protocol description, version 1.0
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+Commands number are formatted using %03X (yes)
+Registers number are formatted using %02X.
+Breakpoints numbers are formatted using %X
+All other values are formatted using %08X, unless specified.
+
+
+Client inputs:
+~~~~~~~~~~~~~
+Basic commands (1xx):
+--------------------
+100 <message>
+    Sends a dumb message. Will be replied with a 200 reply, followed by the message.
+101
+    Gets PCSX version.
+102
+    Gets protocol version.
+103
+    Gets status
+110
+    Gets PC.
+111 [reg]
+    Gets GP register, or all, if no argument.
+112
+    Gets LO/HI registers.
+113 [reg]
+    Gets COP0 register, or all, if no argument.
+114 [reg]
+    Gets COP2 control register, or all, if no argument.
+115 [reg]
+    Gets COP2 data register, or all, if no argument.
+119 [pc]
+    Disassemble current PC, or given PC.
+121 <reg>=<value>
+    Sets a GP register. Will return a 221 message.
+122 <LO|HI>=<value>
+    Sets LO or HI register. Will return a 222 message.
+123 <reg>=<value>
+    Sets a COP0 register. Will return a 223 message.
+124 <reg>=<value>
+    Sets a COP2 control register. Will return a 224 message.
+125 <reg>=<value>
+    Sets a COP2 data register. Will return a 225 message.
+130 <size>@<addr>
+    Dumps a range of memory, of size bytes starting at addr.
+140 <size>@<addr>
+    Sets a range of memory, of size bytes starting at addr.
+    Will have to send immediately exactly size bytes afterward.
+150 [number]
+    Starts/reset mapping execution flow, or stop it if number = 0
+151 [number]
+    Starts/reset mapping read8 flow, or stop it if number = 0
+152 [number]
+    Starts/reset mapping read16 flow, or stop it if number = 0
+153 [number]
+    Starts/reset mapping read32 flow, or stop it if number = 0
+154 [number]
+    Starts/reset mapping write8 flow, or stop it if number = 0
+155 [number]
+    Starts/reset mapping write16 flow, or stop it if number = 0
+156 [number]
+    Starts/reset mapping write32 flow, or stop it if number = 0
+160 [number]
+    Breaks on map exec flow, or stop it if number = 0
+161 [number]
+    Breaks on map read8 flow, or stop it if number = 0
+162 [number]
+    Breaks on map read16 flow, or stop it if number = 0
+163 [number]
+    Breaks on map read32 flow, or stop it if number = 0
+164 [number]
+    Breaks on map write8 flow, or stop it if number = 0
+165 [number]
+    Breaks on map write16 flow, or stop it if number = 0
+166 [number]
+    Breaks on map write32 flow, or stop it if number = 0
+170
+    Dumps the execution flow map in an IDC file
+
+Execution flow control commands (3xx):
+-------------------------------------
+300 [number]
+    Get a list of the actual breakpoints. Will get '400' answers.
+301 [number]
+    Deletes a breakpoint, or all, if no arguments.
+310 <address>
+    Sets an exec breakpoint.
+320 <address>
+    Sets a read breakpoint, 1 byte / 8 bits.
+321 <address>
+    Sets a read breakpoint, 2 bytes / 16 bits, has to be on an even address.
+322 <address>
+    Sets a read breakpoint, 4 bytes / 32 bits, address has to be 4-bytes aligned.
+330 <address>
+    Sets a write breakpoint, 1 byte / 8 bits.
+331 <address>
+    Sets a write breakpoint, 2 bytes / 16 bits, has to be on an even address.
+332 <address>
+    Sets a write breakpoint, 4 bytes / 32 bits, address has to be 4-bytes aligned.
+390
+    Pauses execution. Equivalents to a breakpoint.
+391
+    Restarts execution.
+395 [number]
+    Traces execution, 1 instruction by default. Formatted using %i
+398
+    Soft (quick) resets.
+399
+    Resets.
+    
+
+Server outputs:
+~~~~~~~~~~~~~~
+Spontaneous messages (0xx):
+--------------------------
+000 <message>
+    Greeting banner.
+010 / 011 / 012 / 013 / 014 / 015 / 016
+    Execution hit mapping flow automatic breakpoint.
+030 <number>@<PC>
+    Execution hit breakpoint, PCSX is paused. Displays PC's value.
+
+Basic commands acknowledge (2xx):
+--------------------------------
+200 <message>
+    Sends a dumb message.
+201 <message>
+    Returns PCSX version.
+202 <message>
+    Returns protocol version.
+203 <status>
+    status = 0: running; = 1: paused; = 2: trace
+210 PC=<value>
+    Displays current PC value.
+211 <reg>=<value>
+    Displays one GP register value.
+212 LO=<value> HI=<value>
+    Displays LO/HI registers.
+213 <reg>=<value>
+    Displays one COP0 register value.
+214 <reg>=<value>
+    Displays one COP2 control register value.
+215 <reg>=<value>
+    Displays one COP2 data register value.
+219 <message>
+    Displays one line of disassembled code.
+221 <reg>=<value>
+    Displays one GP register value, ack for modification.
+222 LO=<value> HI=<value>
+    Displays LO/HI registers, ack for modification.
+223 <reg>=<value>
+    Displays one COP0 register value, ack for modification.
+224 <reg>=<value>
+    Displays one COP2 control register value, ack for modification.
+225 <reg>=<value>
+    Displays one COP2 data register value, ack for modification.
+230 <size>@<addr>
+    Dumping memory. Will then raw outputs size bytes.
+240 <size>@<addr>
+    Memory set acknowledge.
+250 / 251 / 252 / 253 / 254 / 255 / 256
+    Acknolwedge of 15x commands.
+260 / 261 / 262 / 263 / 264 / 265 / 266
+    Acknolwedge of 16x commands.
+270
+    Acknolwedge of 170 command.
+
+Execution flow control commands acknowledge (4xx):
+-------------------------------------------------
+400 <number>@<address>-<type>
+    Displays a breakpoint, where 'type' can be of E, R1, R2, R4, W1, W2 or W4.
+401 <message>
+    Breakpoint deleting acknowledge.
+410, 420, 421, 422, 430, 431, 432 <number>
+    Breakpoint adding acknowledge. Returns the number of the added breakpoint.
+490 <message>
+    Pausing.
+491 <message>
+    Resuming.
+495 <message>
+    Tracing.
+498 <message>
+    Soft resetting.
+499 <message>
+    Resetting.
+
+Error messages (5xx):
+--------------------
+500 <message>
+    Command not understood.
+511 <message>
+    Invalid GPR register.
+512 <message>
+    Invalid LO/HI register.
+513, 514 <message>
+    Invalid range or address.
+530 <message>
+    Non existant breakpoint.
+531, 532, 533 <message>
+    Invalid breakpoint address.
+*/
+
+static int debugger_active = 0, paused = 0, trace = 0, reset = 0, resetting = 0;
+static int mapping_e = 0, mapping_r8 = 0, mapping_r16 = 0, mapping_r32 = 0, mapping_w8 = 0, mapping_w16 = 0, mapping_w32 = 0;
+static int breakmp_e = 0, breakmp_r8 = 0, breakmp_r16 = 0, breakmp_r32 = 0, breakmp_w8 = 0, breakmp_w16 = 0, breakmp_w32 = 0;
+
+static void ProcessCommands();
+
+static u8 *MemoryMap = NULL;
+
+enum {
+    MAP_EXEC = 1,
+    MAP_R8 = 2,
+    MAP_R16 = 4,
+    MAP_R32 = 8,
+    MAP_W8 = 16,
+    MAP_W16 = 32,
+    MAP_W32 = 64,
+    MAP_EXEC_JAL = 128,
+};
+
+char *breakpoint_type_names[] = {
+    "E", "R1", "R2", "R4", "W1", "W2", "W4"
+};
+
+typedef struct breakpoint_s {
+    struct breakpoint_s *next, *prev;
+    int number, type;
+    u32 address;
+} breakpoint_t;
+
+static breakpoint_t *first = NULL;
+
+int add_breakpoint(int type, u32 address) {
+    breakpoint_t *bp = (breakpoint_t *)malloc(sizeof(breakpoint_t));
+
+    bp->type = type;
+    bp->address = address;
+
+    if (first) {
+        bp->number = first->prev->number + 1;
+        bp->next = first;
+        bp->prev = first->prev;
+        first->prev = bp;
+        bp->prev->next = bp;
+    } else {
+        first = bp;
+        bp->number = 1;
+        bp->next = bp;
+        bp->prev = bp;
+    }
+
+    return bp->number;
+}
+
+void delete_breakpoint(breakpoint_t * bp) {
+    if (bp == first) {
+        if (bp->next == bp) {
+            first = NULL;
+        } else {
+            first = bp->next;
+        }
+    }
+
+    bp->next->prev = bp->prev;
+    bp->prev->next = bp->next;
+
+    free(bp);
+}
+
+breakpoint_t *next_breakpoint(breakpoint_t *bp) {
+    return bp->next != first ? bp->next : 0;
+}
+
+breakpoint_t *find_breakpoint(int number) {
+    breakpoint_t *p;
+
+    for (p = first; p; p = next_breakpoint(p)) {
+        if (p->number == number)
+            return p;
+    }
+
+    return 0;
+}
+
+void StartDebugger() {
+    if (debugger_active)
+        return;
+
+    MemoryMap = (u8 *)malloc(0x200000);
+    if (MemoryMap == NULL) {
+        SysMessage(_("Error allocating memory"));
+        return;
+    }
+
+    if (StartServer() == -1) {
+        SysPrintf(_("Unable to start debug server.\n"));
+        return;
+    }
+
+    SysPrintf(_("Debugger started.\n"));
+    debugger_active = 1;
+}
+
+void StopDebugger() {
+    if (debugger_active) {
+        StopServer();
+        SysPrintf(_("Debugger stopped.\n"));
+    }
+
+    if (MemoryMap != NULL) {
+        free(MemoryMap);
+        MemoryMap = NULL;
+    }
+
+    while (first != NULL) delete_breakpoint(first);
+
+    debugger_active = 0;
+}
+
+void PauseDebugger() {
+    trace = 0;
+    paused = 1;
+}
+
+void ResumeDebugger() {
+    trace = 0;
+    paused = 0;
+}
+
+void DebugVSync() {
+    if (!debugger_active || resetting)
+        return;
+
+    if (reset) {
+        resetting = 1;
+        CheckCdrom();
+        SysReset();
+        if (reset == 2)
+            LoadCdrom();
+        reset = resetting = 0;
+        return;
+    }
+
+    GetClient();
+    ProcessCommands();
+}
+
+void MarkMap(u32 address, int mask) {
+    if ((address & 0xff000000) != 0x80000000) return;
+    MemoryMap[address & 0x001fffff] |= mask;
+}
+
+int IsMapMarked(u32 address, int mask) {
+    return (MemoryMap[address & 0x001fffff] & mask) != 0;
+}
+
+void ProcessDebug() {
+    if (!debugger_active || reset || resetting)
+        return;
+    if (trace) {
+        if (!(--trace)) {
+            paused = 1;
+        }
+    }
+    if (!paused) {
+        DebugCheckBP(psxRegs.pc, E);
+    }
+    if (mapping_e) {
+        MarkMap(psxRegs.pc, MAP_EXEC);
+        if ((psxRegs.code >> 26) == 3) {
+            MarkMap(_JumpTarget_, MAP_EXEC_JAL);
+        }
+        if (((psxRegs.code >> 26) == 0) && ((psxRegs.code && 0x3F) == 9)) {
+            MarkMap(_Rd_, MAP_EXEC_JAL);
+        }
+    }
+    while (paused) {
+        GetClient();
+        ProcessCommands();
+        GPU_updateLace();
+        SysUpdate();
+    }
+}
+
+static void ProcessCommands() {
+    int code, i, dumping;
+    FILE *sfile;
+    char cmd[257], *arguments, *p, reply[10240], *save, *dump;
+    u32 reg, value, size, address;
+    breakpoint_t *bp;
+
+    if (!HasClient())
+        return;
+    if (ReadSocket(cmd, 256) > 0) {
+        arguments = NULL;
+        if (strlen(cmd) <= 2) {
+            code = 0;
+        } else if (strlen(cmd) == 3) {
+            code = strtol(cmd, 0, 16);
+        } else if (!(isxdigit(cmd[0]) && isxdigit(cmd[1]) && isxdigit(cmd[2]) && (cmd[3] == 0x20))) {
+            code = 0;
+        } else if (sscanf(cmd, "%3X ", &code) != 1) {
+            code = 0;
+        } else {
+            arguments = cmd + 4;
+        }
+        code = strtol(cmd, &arguments, 16);
+        while (arguments && *arguments && *arguments == 0x20)
+            arguments++;
+
+        if (*arguments == '\0')
+            arguments = NULL;
+
+        dumping = 0;
+        save = NULL;
+
+        switch (code) {
+        case 0x100:
+            sprintf(reply, "200 %s\r\n", arguments == NULL ? "OK" : arguments);
+            break;
+        case 0x101:
+            sprintf(reply, "201 %s\r\n", PACKAGE_VERSION);
+            break;
+        case 0x102:
+            sprintf(reply, "202 1.0\r\n");
+            break;
+        case 0x103:
+            sprintf(reply, "203 %i\r\n", paused ? 1 : trace ? 2 : 0);
+            break;
+        case 0x110:
+            sprintf(reply, "210 PC=%08X\r\n", psxRegs.pc);
+            break;
+        case 0x111:
+            if (arguments) {
+                if (sscanf(arguments, "%02X", &code) != 1) {
+                    sprintf(reply, "511 Malformed 111 command '%s'\r\n", cmd);
+                    break;
+                }
+            }
+            if (!arguments) {
+                reply[0] = 0;
+                for (i = 0; i < 32; i++) {
+                    sprintf(reply, "%s211 %02X=%08X\r\n", reply, i, psxRegs.GPR.r[i]);
+                }
+            } else {
+                if ((code >= 0) && (code < 32)) {
+                    sprintf(reply, "211 %02X=%08X\r\n", code, psxRegs.GPR.r[code]);
+                } else {
+                    sprintf(reply, "511 Invalid GPR register: %X\r\n", code);
+                }
+            }
+            break;
+        case 0x112:
+            sprintf(reply, "212 LO=%08X HI=%08X\r\n", psxRegs.GPR.n.lo, psxRegs.GPR.n.hi);
+            break;
+        case 0x113:
+            if (arguments) {
+                if (sscanf(arguments, "%02X", &code) != 1) {
+                    sprintf(reply, "511 Malformed 113 command '%s'\r\n", cmd);
+                    break;
+                }
+            }
+            if (!arguments) {
+                reply[0] = 0;
+                for (i = 0; i < 32; i++) {
+                    sprintf(reply, "%s213 %02X=%08X\r\n", reply, i, psxRegs.CP0.r[i]);
+                }
+            } else {
+                if ((code >= 0) && (code < 32)) {
+                    sprintf(reply, "213 %02X=%08X\r\n", code, psxRegs.CP0.r[code]);
+                } else {
+                    sprintf(reply, "511 Invalid COP0 register: %X\r\n", code);
+                }
+            }
+            break;
+        case 0x114:
+            if (arguments) {
+                if (sscanf(arguments, "%02X", &code) != 1) {
+                    sprintf(reply, "511 Malformed 114 command '%s'\r\n", cmd);
+                    break;
+                }
+            }
+            if (!arguments) {
+                reply[0] = 0;
+                for (i = 0; i < 32; i++) {
+                    sprintf(reply, "%s214 %02X=%08X\r\n", reply, i, psxRegs.CP2C.r[i]);
+                }
+            } else {
+                if ((code >= 0) && (code < 32)) {
+                    sprintf(reply, "214 %02X=%08X\r\n", code, psxRegs.CP2C.r[code]);
+                } else {
+                    sprintf(reply, "511 Invalid COP2C register: %X\r\n", code);
+                }
+            }
+            break;
+        case 0x115:
+            if (arguments) {
+                if (sscanf(arguments, "%02X", &code) != 1) {
+                    sprintf(reply, "511 Malformed 111 command '%s'\r\n", cmd);
+                    break;
+                }
+            }
+            if (!arguments) {
+                reply[0] = 0;
+                for (i = 0; i < 32; i++) {
+                    sprintf(reply, "%s215 %02X=%08X\r\n", reply, i, psxRegs.CP2D.r[i]);
+                }
+            } else {
+                if ((code >= 0) && (code < 32)) {
+                    sprintf(reply, "215 %02X=%08X\r\n", code, psxRegs.CP2D.r[code]);
+                } else {
+                    sprintf(reply, "511 Invalid COP2D register: %X\r\n", code);
+                }
+            }
+            break;
+        case 0x119:
+            if (arguments) {
+                if (sscanf(arguments, "%08X", &code) != 1) {
+                    sprintf(reply, "511 Malformed 119 command '%s'\r\n", cmd);
+                    break;
+                }
+            }
+            if (!arguments)
+                code = psxRegs.pc;
+
+            sprintf(reply, "219 %s\r\n", disR3000AF(psxMemRead32(code), code));
+            break;
+        case 0x121:
+            if (!arguments || sscanf(arguments, "%02X=%08X", &reg, &value) != 2) {
+                sprintf(reply, "500 Malformed 121 command '%s'\r\n", arguments);
+                break;
+            }
+
+            if (reg < 32) {
+                psxRegs.GPR.r[reg] = value;
+                sprintf(reply, "221 %02X=%08X\r\n", reg, value);
+            } else {
+                sprintf(reply, "512 Invalid GPR register: %02X\r\n", reg);
+            }
+            break;
+        case 0x122:
+            if (!arguments || strncmp(arguments, "HI=", 3) == 0) {
+                reg = 33;
+            } else if (arguments && strncmp(arguments, "LO=", 3) == 0) {
+                reg = 32;
+            } else {
+                arguments[2] = 0;
+                sprintf(reply, "512 Invalid LO/HI register: '%s'\r\n", arguments);
+                break;
+            }
+
+            if (sscanf(arguments + 3, "%08X", &value) != 1) {
+                sprintf(reply, "500 Malformed 122 command '%s'\r\n", arguments);
+            } else {
+                psxRegs.GPR.r[reg] = value;
+                sprintf(reply, "222 LO=%08X HI=%08X\r\n", psxRegs.GPR.n.lo, psxRegs.GPR.n.hi);
+            }
+            break;
+        case 0x123:
+            if (!arguments || sscanf(arguments, "%02X=%08X", &reg, &value) != 2) {
+                sprintf(reply, "500 Malformed 123 command '%s'\r\n", arguments);
+                break;
+            }
+
+            if (reg < 32) {
+                psxRegs.CP0.r[reg] = value;
+                sprintf(reply, "223 %02X=%08X\r\n", reg, value);
+            } else {
+                sprintf(reply, "512 Invalid COP0 register: %02X\r\n", reg);
+            }
+            break;
+        case 0x124:
+            if (!arguments || sscanf(arguments, "%02X=%08X", &reg, &value) != 2) {
+                sprintf(reply, "500 Malformed 124 command '%s'\r\n", arguments);
+                break;
+            }
+
+            if (reg < 32) {
+                psxRegs.CP2C.r[reg] = value;
+                sprintf(reply, "224 %02X=%08X\r\n", reg, value);
+            } else {
+                sprintf(reply, "512 Invalid COP2C register: %02X\r\n", reg);
+            }
+            break;
+        case 0x125:
+            if (!arguments || sscanf(arguments, "%02X=%08X", &reg, &value) != 2) {
+                sprintf(reply, "500 Malformed 121 command '%s'\r\n", arguments);
+                break;
+            }
+
+            if (reg < 32) {
+                psxRegs.CP2D.r[reg] = value;
+                sprintf(reply, "225 %02X=%08X\r\n", reg, value);
+            } else {
+                sprintf(reply, "512 Invalid COP2D register: %02X\r\n", reg);
+            }
+            break;
+        case 0x130:
+            if (!arguments || sscanf(arguments, "%08X@%08X", &size, &address) != 2) {
+                sprintf(reply, "500 Malformed 130 command '%s'\r\n", arguments);
+                break;
+            }
+
+            if ((address >= 0x80000000) && ((address + size) <= 0x80200000)) {
+                sprintf(reply, "230 %08X@%08X\r\n", size, address);
+                dump = (char *) PSXM(address);
+                dumping = 1;
+            } else {
+                sprintf(reply, "513 Invalid address or range: '%s'\r\n", arguments);
+            }
+            break;
+        case 0x140:
+            if (!arguments || sscanf(arguments, "%08X@%08X", &size, &address) != 2) {
+                sprintf(reply, "500 Malformed 140 command '%s'\r\n", arguments);
+                break;
+            }
+
+            if ((address >= 0x80000000) && ((address + size) <= 0x80200000)) {
+                sprintf(reply, "240 %08X@%08X\r\n", size, address);
+                RawReadSocket((char *)PSXM(address), size);
+            } else {
+                sprintf(reply, "514 Invalid address or range: '%s'\r\n", arguments);
+            }
+            break;
+        case 0x150:
+            code = 1;
+            if (arguments) {
+                if (sscanf(arguments, "%02X", &code) != 1) {
+                    sprintf(reply, "500 Malformed 150 command '%s'\r\n", cmd);
+                    break;
+                }
+            }
+            if (code) {
+                mapping_e = 1;
+                for (i = 0; i < 0x00200000; i++) {
+                    MemoryMap[i] &= ~MAP_EXEC;
+                    MemoryMap[i] &= ~MAP_EXEC_JAL;
+                }
+            } else {
+                mapping_e = 0;
+            }
+            sprintf(reply, "250 Mapping of exec flow %s\r\n", code ? "started" : "stopped");
+            break;
+        case 0x151:
+            code = 1;
+            if (arguments) {
+                if (sscanf(arguments, "%02X", &code) != 1) {
+                    sprintf(reply, "500 Malformed 151 command '%s'\r\n", cmd);
+                    break;
+                }
+            }
+            if (code) {
+                mapping_r8 = 1;
+                for (i = 0; i < 0x00200000; i++) {
+                    MemoryMap[i] &= ~MAP_R8;
+                }
+            } else {
+                mapping_r8 = 0;
+            }
+            sprintf(reply, "251 Mapping of read8 flow %s\r\n", code ? "started" : "stopped");
+            break;
+        case 0x152:
+            code = 1;
+            if (arguments) {
+                if (sscanf(arguments, "%02X", &code) != 1) {
+                    sprintf(reply, "500 Malformed 152 command '%s'\r\n", cmd);
+                    break;
+                }
+            }
+            if (code) {
+                mapping_r16 = 1;
+                for (i = 0; i < 0x00200000; i++) {
+                    MemoryMap[i] &= ~MAP_R16;
+                }
+            } else {
+                mapping_r16 = 0;
+            }
+            sprintf(reply, "252 Mapping of read16 flow %s\r\n", code ? "started" : "stopped");
+            break;
+        case 0x153:
+            code = 1;
+            if (arguments) {
+                if (sscanf(arguments, "%02X", &code) != 1) {
+                    sprintf(reply, "500 Malformed 153 command '%s'\r\n", cmd);
+                    break;
+                }
+            }
+            if (code) {
+                mapping_r32 = 1;
+                for (i = 0; i < 0x00200000; i++) {
+                    MemoryMap[i] &= ~MAP_R32;
+                }
+            } else {
+                mapping_r32 = 0;
+            }
+            sprintf(reply, "253 Mapping of read32 flow %s\r\n", code ? "started" : "stopped");
+            break;
+        case 0x154:
+            code = 1;
+            if (arguments) {
+                if (sscanf(arguments, "%02X", &code) != 1) {
+                    sprintf(reply, "500 Malformed 154 command '%s'\r\n", cmd);
+                    break;
+                }
+            }
+            if (code) {
+                mapping_w8 = 1;
+                for (i = 0; i < 0x00200000; i++) {
+                    MemoryMap[i] &= ~MAP_W8;
+                }
+            } else {
+                mapping_w8 = 0;
+            }
+            sprintf(reply, "254 Mapping of write8 flow %s\r\n", code ? "started" : "stopped");
+            break;
+        case 0x155:
+            code = 1;
+            if (arguments) {
+                if (sscanf(arguments, "%02X", &code) != 1) {
+                    sprintf(reply, "500 Malformed 155 command '%s'\r\n", cmd);
+                    break;
+                }
+            }
+            if (code) {
+                mapping_w16 = 1;
+                for (i = 0; i < 0x00200000; i++) {
+                    MemoryMap[i] &= ~MAP_W16;
+                }
+            } else {
+                mapping_w16 = 0;
+            }
+            sprintf(reply, "255 Mapping of write16 flow %s\r\n", code ? "started" : "stopped");
+            break;
+        case 0x156:
+            code = 1;
+            if (arguments) {
+                if (sscanf(arguments, "%02X", &code) != 1) {
+                    sprintf(reply, "500 Malformed 156 command '%s'\r\n", cmd);
+                    break;
+                }
+            }
+            if (code) {
+                mapping_w32 = 1;
+                for (i = 0; i < 0x00200000; i++) {
+                    MemoryMap[i] &= ~MAP_W32;
+                }
+            } else {
+                mapping_w32 = 0;
+            }
+            sprintf(reply, "256 Mapping of write32 flow %s\r\n", code ? "started" : "stopped");
+            break;
+        case 0x160:
+            code = 1;
+            if (arguments) {
+                if (sscanf(arguments, "%02X", &code) != 1) {
+                    sprintf(reply, "500 Malformed 160 command '%s'\r\n", cmd);
+                    break;
+                }
+            }
+            if (code) {
+                breakmp_e = 1;
+            } else {
+                breakmp_e = 0;
+            }
+            sprintf(reply, "260 Break on map of exec flow %s\r\n", code ? "started" : "stopped");
+            break;
+        case 0x161:
+            code = 1;
+            if (arguments) {
+                if (sscanf(arguments, "%02X", &code) != 1) {
+                    sprintf(reply, "500 Malformed 161 command '%s'\r\n", cmd);
+                    break;
+                }
+            }
+            if (code) {
+                breakmp_r8 = 1;
+            } else {
+                breakmp_r8 = 0;
+            }
+            sprintf(reply, "261 Break on map of read8 flow %s\r\n", code ? "started" : "stopped");
+            break;
+        case 0x162:
+            code = 1;
+            if (arguments) {
+                if (sscanf(arguments, "%02X", &code) != 1) {
+                    sprintf(reply, "500 Malformed 162 command '%s'\r\n", cmd);
+                    break;
+                }
+            }
+            if (code) {
+                breakmp_r16 = 1;
+            } else {
+                breakmp_r16 = 0;
+            }
+            sprintf(reply, "262 Break on map of read16 flow %s\r\n", code ? "started" : "stopped");
+            break;
+        case 0x163:
+            code = 1;
+            if (arguments) {
+                if (sscanf(arguments, "%02X", &code) != 1) {
+                    sprintf(reply, "500 Malformed 163 command '%s'\r\n", cmd);
+                    break;
+                }
+            }
+            if (code) {
+                breakmp_r32 = 1;
+            } else {
+                breakmp_r32 = 0;
+            }
+            sprintf(reply, "263 Break on map of read32 flow %s\r\n", code ? "started" : "stopped");
+            break;
+        case 0x164:
+            code = 1;
+            if (arguments) {
+                if (sscanf(arguments, "%02X", &code) != 1) {
+                    sprintf(reply, "500 Malformed 164 command '%s'\r\n", cmd);
+                    break;
+                }
+            }
+            if (code) {
+                breakmp_w8 = 1;
+            } else {
+                breakmp_w8 = 0;
+            }
+            sprintf(reply, "264 Break on map of write8 flow %s\r\n", code ? "started" : "stopped");
+            break;
+        case 0x165:
+            code = 1;
+            if (arguments) {
+                if (sscanf(arguments, "%02X", &code) != 1) {
+                    sprintf(reply, "500 Malformed 165 command '%s'\r\n", cmd);
+                    break;
+                }
+            }
+            if (code) {
+                breakmp_w16 = 1;
+            } else {
+                breakmp_w16 = 0;
+            }
+            sprintf(reply, "265 Break on map of write16 flow %s\r\n", code ? "started" : "stopped");
+            break;
+        case 0x166:
+            code = 1;
+            if (arguments) {
+                if (sscanf(arguments, "%02X", &code) != 1) {
+                    sprintf(reply, "500 Malformed 166 command '%s'\r\n", cmd);
+                    break;
+                }
+            }
+            if (code) {
+                breakmp_w32 = 1;
+            } else {
+                breakmp_w32 = 0;
+            }
+            sprintf(reply, "266 Break on map of write32 flow %s\r\n", code ? "started" : "stopped");
+            break;
+        case 0x170:
+            sfile = fopen("flow.idc", "wb");
+            fprintf(sfile, "#include <idc.idc>\r\n\r\n");
+            fprintf(sfile, "static main(void) {\r\n");
+            for (i = 0; i < 0x00200000; i++) {
+                if (IsMapMarked(i, MAP_EXEC_JAL)) {
+                    fprintf(sfile, "\tMakeFunction(0X8%07X,BADADDR);\r\n", i);
+                }
+            }
+            fprintf(sfile, "}\r\n");
+            fclose(sfile);
+            sfile = fopen("markcode.idc", "wb");
+            fprintf(sfile, "#include <idc.idc>\r\n\r\n");
+            fprintf(sfile, "static main(void) {\r\n");
+            for (i = 0; i < 0x00200000; i++) {
+                if (IsMapMarked(i, MAP_EXEC)) {
+                    fprintf(sfile, "\tMakeCode(0X8%07X);\r\n", i);
+                }
+            }
+            fprintf(sfile, "}\r\n");
+            fclose(sfile);
+            sprintf(reply, "270 flow.idc and markcode.idc dumped\r\n");
+            break;
+        case 0x300:
+            p = arguments;
+            if (arguments) {
+                code = strtol(arguments, &p, 16);
+            }
+            if (p == arguments) {
+                if (first) {
+                    reply[0] = 0;
+                    for (bp = first; bp; bp = next_breakpoint(bp)) {
+                        sprintf(reply, "%s400 %X@%08X-%s\r\n", reply, bp->number, bp->address, breakpoint_type_names[bp->type]);
+                    }
+                } else {
+                    sprintf(reply, "530 No breakpoint\r\n");
+                }
+            } else {
+                if ((bp = find_breakpoint(code))) {
+                    sprintf(reply, "400 %X@%08X-%s\r\n", bp->number, bp->address, breakpoint_type_names[bp->type]);
+                } else {
+                    sprintf(reply, "530 Invalid breakpoint number: %X\r\n", code);
+                }
+            }
+            break;
+        case 0x301:
+            p = arguments;
+            if (arguments) {
+                code = strtol(arguments, &p, 16);
+            }
+            if (p == arguments) {
+                while (first != NULL) delete_breakpoint(first);
+                sprintf(reply, "401 All breakpoints deleted.\r\n");
+            } else {
+                if ((bp = find_breakpoint(code))) {
+                    delete_breakpoint(bp);
+                    sprintf(reply, "401 Breakpoint %X deleted.\r\n", code);
+                } else {
+                    sprintf(reply, "530 Invalid breakpoint number: %X\r\n", code);
+                }
+            }
+            break;
+        case 0x310:
+            if (!arguments || sscanf(arguments, "%08X", &address) != 1) {
+                sprintf(reply, "500 Malformed 310 command '%s'\r\n", arguments);
+                break;
+            }
+//            if ((address & 3) || (address < 0x80000000) || (address >= 0x80200000)) {
+//                sprintf(reply, "531 Invalid address %08X\r\n", address);
+//                break;
+//            }
+            code = add_breakpoint(E, address);
+            sprintf(reply, "410 %X\r\n", code);
+            break;
+        case 0x320:
+            if (!arguments || sscanf(arguments, "%08X", &address) != 1) {
+                sprintf(reply, "500 Malformed 320 command '%s'\r\n", arguments);
+                break;
+            }
+            if ((address < 0x80000000) || (address >= 0x80200000)) {
+                sprintf(reply, "532 Invalid address %08X\r\n", address);
+                break;
+            }
+            code = add_breakpoint(R1, address);
+            sprintf(reply, "420 %X\r\n", code);
+            break;
+        case 0x321:
+            if (!arguments || sscanf(arguments, "%08X", &address) != 1) {
+                sprintf(reply, "500 Malformed 321 command '%s'\r\n", arguments);
+                break;
+            }
+            if ((address & 1) || (address < 0x80000000) || (address >= 0x80200000)) {
+                sprintf(reply, "532 Invalid address %08X\r\n", address);
+                break;
+            }
+            code = add_breakpoint(R2, address);
+            sprintf(reply, "421 %X\r\n", code);
+            break;
+        case 0x322:
+            if (!arguments || sscanf(arguments, "%08X", &address) != 1) {
+                sprintf(reply, "500 Malformed 322 command '%s'\r\n", arguments);
+                break;
+            }
+            if ((address & 3) || (address < 0x80000000) || (address >= 0x80200000)) {
+                sprintf(reply, "532 Invalid address %08X\r\n", address);
+                break;
+            }
+            code = add_breakpoint(R4, address);
+            sprintf(reply, "422 %X\r\n", code);
+            break;
+        case 0x330:
+            if (!arguments || sscanf(arguments, "%08X", &address) != 1) {
+                sprintf(reply, "500 Malformed 330 command '%s'\r\n", arguments);
+                break;
+            }
+            if ((address < 0x80000000) || (address >= 0x80200000)) {
+                sprintf(reply, "533 Invalid address %08X\r\n", address);
+                break;
+            }
+            code = add_breakpoint(W1, address);
+            sprintf(reply, "430 %X\r\n", code);
+            break;
+        case 0x331:
+            if (!arguments || sscanf(arguments, "%08X", &address) != 1) {
+                sprintf(reply, "500 Malformed 331 command '%s'\r\n", arguments);
+                break;
+            }
+            if ((address & 1) || (address < 0x80000000) || (address >= 0x80200000)) {
+                sprintf(reply, "533 Invalid address %08X\r\n", address);
+                break;
+            }
+            code = add_breakpoint(W2, address);
+            sprintf(reply, "431 %X\r\n", code);
+            break;
+        case 0x332:
+            if (!arguments || sscanf(arguments, "%08X", &address) != 1) {
+                sprintf(reply, "500 Malformed 332 command '%s'\r\n", arguments);
+                break;
+            }
+            if ((address & 3) || (address < 0x80000000) || (address >= 0x80200000)) {
+                sprintf(reply, "533 Invalid address %08X\r\n", address);
+                break;
+            }
+            code = add_breakpoint(W4, address);
+            sprintf(reply, "432 %X\r\n", code);
+            break;
+        case 0x390:
+            paused = 1;
+            sprintf(reply, "490 Paused\r\n");
+            break;
+        case 0x391:
+            paused = 0;
+            sprintf(reply, "491 Resumed\r\n");
+            break;
+        case 0x395:
+            p = arguments;
+            if (arguments) {
+                trace = strtol(arguments, &p, 10);
+            }
+            if (p == arguments) {
+                trace = 1;
+            }
+            paused = 0;
+            sprintf(reply, "495 Tracing\r\n");
+            break;
+        case 0x398:
+            paused = 0;
+            trace = 0;
+            reset = 2;
+            sprintf(reply, "498 Soft resetting\r\n");
+            break;
+        case 0x399:
+            paused = 0;
+            trace = 0;
+            reset = 1;
+            sprintf(reply, "499 Resetting\r\n");
+            break;
+        default:
+            sprintf(reply, "500 Unknown command '%s'\r\n", cmd);
+            break;
+        }
+        WriteSocket(reply, strlen(reply));
+
+        if (dumping) {
+            WriteSocket(dump, size);
+        }
+
+        if (save) {
+            free(save);
+        }
+    }
+}
+
+void DebugCheckBP(u32 address, enum breakpoint_types type) {
+    breakpoint_t *bp;
+    char reply[512];
+
+    if (!debugger_active || reset)
+        return;
+    for (bp = first; bp; bp = next_breakpoint(bp)) {
+        if ((bp->type == type) && (bp->address == address)) {
+            sprintf(reply, "030 %X@%08X\r\n", bp->number, psxRegs.pc);
+            WriteSocket(reply, strlen(reply));
+            paused = 1;
+            return;
+        }
+    }
+    if (breakmp_e && type == E) {
+        if (!IsMapMarked(address, MAP_EXEC)) {
+            sprintf(reply, "010 %08X@%08X\r\n", address, psxRegs.pc);
+            WriteSocket(reply, strlen(reply));
+            paused = 1;
+        }
+    }
+    if (breakmp_r8 && type == R1) {
+        if (!IsMapMarked(address, MAP_R8)) {
+            sprintf(reply, "011 %08X@%08X\r\n", address, psxRegs.pc);
+            WriteSocket(reply, strlen(reply));
+            paused = 1;
+        }
+    }
+    if (breakmp_r16 && type == R2) {
+        if (!IsMapMarked(address, MAP_R16)) {
+            sprintf(reply, "012 %08X@%08X\r\n", address, psxRegs.pc);
+            WriteSocket(reply, strlen(reply));
+            paused = 1;
+        }
+    }
+    if (breakmp_r32 && type == R4) {
+        if (!IsMapMarked(address, MAP_R32)) {
+            sprintf(reply, "013 %08X@%08X\r\n", address, psxRegs.pc);
+            WriteSocket(reply, strlen(reply));
+            paused = 1;
+        }
+    }
+    if (breakmp_w8 && type == W1) {
+        if (!IsMapMarked(address, MAP_W8)) {
+            sprintf(reply, "014 %08X@%08X\r\n", address, psxRegs.pc);
+            WriteSocket(reply, strlen(reply));
+            paused = 1;
+        }
+    }
+    if (breakmp_w16 && type == W2) {
+        if (!IsMapMarked(address, MAP_W16)) {
+            sprintf(reply, "015 %08X@%08X\r\n", address, psxRegs.pc);
+            WriteSocket(reply, strlen(reply));
+            paused = 1;
+        }
+    }
+    if (breakmp_w32 && type == W4) {
+        if (!IsMapMarked(address, MAP_W32)) {
+            sprintf(reply, "016 %08X@%08X\r\n", address, psxRegs.pc);
+            WriteSocket(reply, strlen(reply));
+            paused = 1;
+        }
+    }
+    if (mapping_r8 && type == R1) MarkMap(address, MAP_R8);
+    if (mapping_r16 && type == R2) MarkMap(address, MAP_R16);
+    if (mapping_r32 && type == R4) MarkMap(address, MAP_R32);
+    if (mapping_w8 && type == W1) MarkMap(address, MAP_W8);
+    if (mapping_w16 && type == W2) MarkMap(address, MAP_W16);
+    if (mapping_w32 && type == W4) MarkMap(address, MAP_W32);
+ }
diff --git a/libpcsxcore/debug.h b/libpcsxcore/debug.h
new file mode 100644
index 0000000..5c5336d
--- /dev/null
+++ b/libpcsxcore/debug.h
@@ -0,0 +1,72 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+#ifndef __DEBUG_H__
+#define __DEBUG_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+enum breakpoint_types {
+	E, R1, R2, R4, W1, W2, W4
+};
+
+void StartDebugger();
+void StopDebugger();
+
+void DebugVSync();
+void ProcessDebug();
+
+void DebugCheckBP(u32 address, enum breakpoint_types type);
+
+void PauseDebugger();
+void ResumeDebugger();
+
+extern char *disRNameCP0[];
+
+char* disR3000AF(u32 code, u32 pc);
+
+/* 
+ * Specficies which logs should be activated.
+ */
+
+//#define LOG_STDOUT
+
+//#define PAD_LOG  __Log
+//#define GTE_LOG  __Log
+//#define CDR_LOG  __Log("%8.8lx %8.8lx: ", psxRegs.pc, psxRegs.cycle); __Log
+
+//#define PSXHW_LOG   __Log("%8.8lx %8.8lx: ", psxRegs.pc, psxRegs.cycle); __Log
+//#define PSXBIOS_LOG __Log("%8.8lx %8.8lx: ", psxRegs.pc, psxRegs.cycle); __Log
+//#define PSXDMA_LOG  __Log
+//#define PSXMEM_LOG  __Log("%8.8lx %8.8lx: ", psxRegs.pc, psxRegs.cycle); __Log
+//#define PSXCPU_LOG  __Log
+
+//#define CDRCMD_DEBUG
+
+#if defined (PSXCPU_LOG) || defined(PSXDMA_LOG) || defined(CDR_LOG) || defined(PSXHW_LOG) || \
+	defined(PSXBIOS_LOG) || defined(PSXMEM_LOG) || defined(GTE_LOG)    || defined(PAD_LOG)
+#define EMU_LOG __Log
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/libpcsxcore/decode_xa.c b/libpcsxcore/decode_xa.c
new file mode 100644
index 0000000..ee1dd6f
--- /dev/null
+++ b/libpcsxcore/decode_xa.c
@@ -0,0 +1,367 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+/* 
+* XA audio decoding functions (Kazzuya).
+*/
+
+#include "decode_xa.h"
+
+#define FIXED
+
+#define NOT(_X_)				(!(_X_))
+#define XACLAMP(_X_,_MI_,_MA_)	{if(_X_<_MI_)_X_=_MI_;if(_X_>_MA_)_X_=_MA_;}
+
+#define SH	4
+#define SHC	10
+
+//============================================
+//===  ADPCM DECODING ROUTINES
+//============================================
+
+#ifndef FIXED
+static double K0[4] = {
+    0.0,
+    0.9375,
+    1.796875,
+    1.53125
+};
+
+static double K1[4] = {
+    0.0,
+    0.0,
+    -0.8125,
+    -0.859375
+};
+#else
+static int K0[4] = {
+	0.0       * (1<<SHC),
+	0.9375    * (1<<SHC),
+	1.796875  * (1<<SHC),
+	1.53125   * (1<<SHC)
+};
+ 
+static int K1[4] = {
+	0.0       * (1<<SHC),
+	0.0       * (1<<SHC),
+	-0.8125   * (1<<SHC),
+	-0.859375 * (1<<SHC)
+};
+#endif
+
+#define BLKSIZ 28       /* block size (32 - 4 nibbles) */
+
+//===========================================
+void ADPCM_InitDecode(ADPCM_Decode_t *decp) {
+	decp->y0 = 0;
+	decp->y1 = 0;
+}
+
+//===========================================
+#ifndef FIXED
+#define IK0(fid)	((int)((-K0[fid]) * (1<<SHC)))
+#define IK1(fid)	((int)((-K1[fid]) * (1<<SHC)))
+#else
+#define IK0(fid)	(-K0[fid])
+#define IK1(fid)	(-K1[fid])
+#endif
+
+static __inline void ADPCM_DecodeBlock16( ADPCM_Decode_t *decp, u8 filter_range, const void *vblockp, short *destp, int inc ) {
+	int i;
+	int range, filterid;
+	s32 fy0, fy1;
+	const u16 *blockp;
+
+	blockp = (const unsigned short *)vblockp;
+	filterid = (filter_range >>  4) & 0x0f;
+	range    = (filter_range >>  0) & 0x0f;
+
+	fy0 = decp->y0;
+	fy1 = decp->y1;
+
+	for (i = BLKSIZ/4; i; --i) {
+		s32 y;
+		s32 x0, x1, x2, x3;
+
+		y = *blockp++;
+		x3 = (short)( y        & 0xf000) >> range; x3 <<= SH;
+		x2 = (short)((y <<  4) & 0xf000) >> range; x2 <<= SH;
+		x1 = (short)((y <<  8) & 0xf000) >> range; x1 <<= SH;
+		x0 = (short)((y << 12) & 0xf000) >> range; x0 <<= SH;
+
+		x0 -= (IK0(filterid) * fy0 + (IK1(filterid) * fy1)) >> SHC; fy1 = fy0; fy0 = x0;
+		x1 -= (IK0(filterid) * fy0 + (IK1(filterid) * fy1)) >> SHC; fy1 = fy0; fy0 = x1;
+		x2 -= (IK0(filterid) * fy0 + (IK1(filterid) * fy1)) >> SHC; fy1 = fy0; fy0 = x2;
+		x3 -= (IK0(filterid) * fy0 + (IK1(filterid) * fy1)) >> SHC; fy1 = fy0; fy0 = x3;
+
+		XACLAMP( x0, -32768<<SH, 32767<<SH ); *destp = x0 >> SH; destp += inc;
+		XACLAMP( x1, -32768<<SH, 32767<<SH ); *destp = x1 >> SH; destp += inc;
+		XACLAMP( x2, -32768<<SH, 32767<<SH ); *destp = x2 >> SH; destp += inc;
+		XACLAMP( x3, -32768<<SH, 32767<<SH ); *destp = x3 >> SH; destp += inc;
+	}
+	decp->y0 = fy0;
+	decp->y1 = fy1;
+}
+
+static int headtable[4] = {0,2,8,10};
+
+//===========================================
+static void xa_decode_data( xa_decode_t *xdp, unsigned char *srcp ) {
+	const u8    *sound_groupsp;
+	const u8    *sound_datap, *sound_datap2;
+	int         i, j, k, nbits;
+	u16			data[4096], *datap;
+	short		*destp;
+
+	destp = xdp->pcm;
+	nbits = xdp->nbits == 4 ? 4 : 2;
+
+	if (xdp->stereo) { // stereo
+		if ((xdp->nbits == 8) && (xdp->freq == 37800)) { // level A
+			for (j=0; j < 18; j++) {
+				sound_groupsp = srcp + j * 128;		// sound groups header
+				sound_datap = sound_groupsp + 16;	// sound data just after the header
+
+				for (i=0; i < nbits; i++) {
+    				datap = data;
+    				sound_datap2 = sound_datap + i;
+
+					for (k=0; k < 14; k++, sound_datap2 += 8) {
+        	   				*(datap++) = (u16)sound_datap2[0] |
+        	               			     (u16)(sound_datap2[4] << 8);
+					}
+
+    				ADPCM_DecodeBlock16( &xdp->left,  sound_groupsp[headtable[i]+0], data,
+        	           				    destp+0, 2 );
+
+        			datap = data;
+        			sound_datap2 = sound_datap + i;
+        			for (k=0; k < 14; k++, sound_datap2 += 8) {
+           					*(datap++) = (u16)sound_datap2[0] |
+            	          			     (u16)(sound_datap2[4] << 8);
+					}
+					ADPCM_DecodeBlock16( &xdp->right,  sound_groupsp[headtable[i]+1], data,
+                           			    destp+1, 2 );
+
+	        		destp += 28*2;
+				}
+    		}
+		} else { // level B/C
+			for (j=0; j < 18; j++) {
+				sound_groupsp = srcp + j * 128;		// sound groups header
+				sound_datap = sound_groupsp + 16;	// sound data just after the header
+
+				for (i=0; i < nbits; i++) {
+	    			datap = data;
+	    			sound_datap2 = sound_datap + i;
+
+        			for (k=0; k < 7; k++, sound_datap2 += 16) {
+           					*(datap++) = (u16)(sound_datap2[ 0] & 0x0f) |
+                       				    ((u16)(sound_datap2[ 4] & 0x0f) <<  4) |
+                       				    ((u16)(sound_datap2[ 8] & 0x0f) <<  8) |
+                       				    ((u16)(sound_datap2[12] & 0x0f) << 12);
+					}
+	    			ADPCM_DecodeBlock16( &xdp->left,  sound_groupsp[headtable[i]+0], data,
+                   				    destp+0, 2 );
+
+	        		datap = data;
+	        		sound_datap2 = sound_datap + i;
+        			for (k=0; k < 7; k++, sound_datap2 += 16) {
+           					*(datap++) = (u16)(sound_datap2[ 0] >> 4) |
+                       	    			((u16)(sound_datap2[ 4] >> 4) <<  4) |
+                       				    ((u16)(sound_datap2[ 8] >> 4) <<  8) |
+                       				    ((u16)(sound_datap2[12] >> 4) << 12);
+					}
+					ADPCM_DecodeBlock16( &xdp->right,  sound_groupsp[headtable[i]+1], data,
+                           			    destp+1, 2 );
+
+	        		destp += 28*2;
+				}
+	    	}
+		}
+	} else { // mono
+		if ((xdp->nbits == 8) && (xdp->freq == 37800)) { // level A
+			for (j=0; j < 18; j++) {
+    			sound_groupsp = srcp + j * 128;		// sound groups header
+    			sound_datap = sound_groupsp + 16;	// sound data just after the header
+
+    			for (i=0; i < nbits; i++) {
+        			datap = data;
+        			sound_datap2 = sound_datap + i;
+        			for (k=0; k < 14; k++, sound_datap2 += 8) {
+           					*(datap++) = (u16)sound_datap2[0] |
+                       				     (u16)(sound_datap2[4] << 8);
+					}
+	        		ADPCM_DecodeBlock16( &xdp->left,  sound_groupsp[headtable[i]+0], data,
+                           			    destp, 1 );
+
+	        		destp += 28;
+
+	        		datap = data;
+	        		sound_datap2 = sound_datap + i;
+        			for (k=0; k < 14; k++, sound_datap2 += 8) {
+           					*(datap++) = (u16)sound_datap2[0] |
+                       				     (u16)(sound_datap2[4] << 8);
+					}
+	       			ADPCM_DecodeBlock16( &xdp->left,  sound_groupsp[headtable[i]+1], data,
+                           			    destp, 1 );
+
+					destp += 28;
+				}
+	    	}
+		} else { // level B/C
+			for (j=0; j < 18; j++) {
+	    		sound_groupsp = srcp + j * 128;		// sound groups header
+	    		sound_datap = sound_groupsp + 16;	// sound data just after the header
+
+	    		for (i=0; i < nbits; i++) {
+	        		datap = data;
+	        		sound_datap2 = sound_datap + i;
+        			for (k=0; k < 7; k++, sound_datap2 += 16) {
+           					*(datap++) = (u16)(sound_datap2[ 0] & 0x0f) |
+                       				    ((u16)(sound_datap2[ 4] & 0x0f) <<  4) |
+                       				    ((u16)(sound_datap2[ 8] & 0x0f) <<  8) |
+                       				    ((u16)(sound_datap2[12] & 0x0f) << 12);
+					}
+	        		ADPCM_DecodeBlock16( &xdp->left,  sound_groupsp[headtable[i]+0], data,
+                           			    destp, 1 );
+
+	        		destp += 28;
+
+	        		datap = data;
+	        		sound_datap2 = sound_datap + i;
+        			for (k=0; k < 7; k++, sound_datap2 += 16) {
+            				*(datap++) = (u16)(sound_datap2[ 0] >> 4) |
+                       	    		    ((u16)(sound_datap2[ 4] >> 4) <<  4) |
+                        				((u16)(sound_datap2[ 8] >> 4) <<  8) |
+                        				((u16)(sound_datap2[12] >> 4) << 12);
+        			}
+	       			ADPCM_DecodeBlock16( &xdp->left,  sound_groupsp[headtable[i]+1], data,
+                           			    destp, 1 );
+
+					destp += 28;
+				}
+    		}
+		}
+	}
+}
+
+//============================================
+//===  XA SPECIFIC ROUTINES
+//============================================
+typedef struct {
+u8  filenum;
+u8  channum;
+u8  submode;
+u8  coding;
+
+u8  filenum2;
+u8  channum2;
+u8  submode2;
+u8  coding2;
+} xa_subheader_t;
+
+#define SUB_SUB_EOF     (1<<7)  // end of file
+#define SUB_SUB_RT      (1<<6)  // real-time sector
+#define SUB_SUB_FORM    (1<<5)  // 0 form1  1 form2
+#define SUB_SUB_TRIGGER (1<<4)  // used for interrupt
+#define SUB_SUB_DATA    (1<<3)  // contains data
+#define SUB_SUB_AUDIO   (1<<2)  // contains audio
+#define SUB_SUB_VIDEO   (1<<1)  // contains video
+#define SUB_SUB_EOR     (1<<0)  // end of record
+
+#define AUDIO_CODING_GET_STEREO(_X_)    ( (_X_) & 3)
+#define AUDIO_CODING_GET_FREQ(_X_)      (((_X_) >> 2) & 3)
+#define AUDIO_CODING_GET_BPS(_X_)       (((_X_) >> 4) & 3)
+#define AUDIO_CODING_GET_EMPHASIS(_X_)  (((_X_) >> 6) & 1)
+
+#define SUB_UNKNOWN 0
+#define SUB_VIDEO   1
+#define SUB_AUDIO   2
+
+//============================================
+static int parse_xa_audio_sector( xa_decode_t *xdp, 
+								  xa_subheader_t *subheadp,
+								  unsigned char *sectorp,
+								  int is_first_sector ) {
+    if ( is_first_sector ) {
+		switch ( AUDIO_CODING_GET_FREQ(subheadp->coding) ) {
+			case 0: xdp->freq = 37800;   break;
+			case 1: xdp->freq = 18900;   break;
+			default: xdp->freq = 0;      break;
+		}
+		switch ( AUDIO_CODING_GET_BPS(subheadp->coding) ) {
+			case 0: xdp->nbits = 4; break;
+			case 1: xdp->nbits = 8; break;
+			default: xdp->nbits = 0; break;
+		}
+		switch ( AUDIO_CODING_GET_STEREO(subheadp->coding) ) {
+			case 0: xdp->stereo = 0; break;
+			case 1: xdp->stereo = 1; break;
+			default: xdp->stereo = 0; break;
+		}
+
+		if ( xdp->freq == 0 )
+			return -1;
+
+		ADPCM_InitDecode( &xdp->left );
+		ADPCM_InitDecode( &xdp->right );
+
+		xdp->nsamples = 18 * 28 * 8;
+		if (xdp->stereo == 1) xdp->nsamples /= 2;
+    }
+	xa_decode_data( xdp, sectorp );
+
+	return 0;
+}
+
+//================================================================
+//=== THIS IS WHAT YOU HAVE TO CALL
+//=== xdp              - structure were all important data are returned
+//=== sectorp          - data in input
+//=== pcmp             - data in output
+//=== is_first_sector  - 1 if it's the 1st sector of the stream
+//===                  - 0 for any other successive sector
+//=== return -1 if error
+//================================================================
+s32 xa_decode_sector( xa_decode_t *xdp,
+					   unsigned char *sectorp, int is_first_sector ) {
+	if (parse_xa_audio_sector(xdp, (xa_subheader_t *)sectorp, sectorp + sizeof(xa_subheader_t), is_first_sector))
+		return -1;
+
+	return 0;
+}
+
+/* EXAMPLE:
+"nsamples" is the number of 16 bit samples
+every sample is 2 bytes in mono and 4 bytes in stereo
+
+xa_decode_t	xa;
+
+	sectorp = read_first_sector();
+	xa_decode_sector( &xa, sectorp, 1 );
+	play_wave( xa.pcm, xa.freq, xa.nsamples );
+
+	while ( --n_sectors )
+	{
+		sectorp = read_next_sector();
+		xa_decode_sector( &xa, sectorp, 0 );
+		play_wave( xa.pcm, xa.freq, xa.nsamples );
+	}
+*/
diff --git a/libpcsxcore/decode_xa.h b/libpcsxcore/decode_xa.h
new file mode 100644
index 0000000..a5994e1
--- /dev/null
+++ b/libpcsxcore/decode_xa.h
@@ -0,0 +1,49 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+#ifndef __DECODE_XA_H__
+#define __DECODE_XA_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "psxcommon.h"
+
+typedef struct {
+	s32	y0, y1;
+} ADPCM_Decode_t;
+
+typedef struct {
+	int				freq;
+	int				nbits;
+	int				stereo;
+	int				nsamples;
+	ADPCM_Decode_t	left, right;
+	short			pcm[16384];
+} xa_decode_t;
+
+s32 xa_decode_sector( xa_decode_t *xdp,
+					   unsigned char *sectorp,
+					   int is_first_sector );
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/libpcsxcore/disr3000a.c b/libpcsxcore/disr3000a.c
new file mode 100644
index 0000000..23667c1
--- /dev/null
+++ b/libpcsxcore/disr3000a.c
@@ -0,0 +1,323 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+/* 
+* R3000A disassembler.
+*/
+
+#include "psxcommon.h"
+
+char ostr[256];
+
+// Names of registers
+static char *disRNameGPR[] = {
+	"r0", "at", "v0", "v1", "a0", "a1","a2", "a3",
+	"t0", "t1", "t2", "t3", "t4", "t5","t6", "t7",
+	"s0", "s1", "s2", "s3", "s4", "s5","s6", "s7",
+	"t8", "t9", "k0", "k1", "gp", "sp","fp", "ra"};
+
+char *disRNameCP0[] = {
+	"Index"     , "Random"    , "EntryLo0", "EntryLo1", "Context" , "PageMask"  , "Wired"     , "*Check me*",
+	"BadVAddr"  , "Count"     , "EntryHi" , "Compare" , "Status"  , "Cause"     , "ExceptPC"  , "PRevID"    ,
+	"Config"    , "LLAddr"    , "WatchLo" , "WatchHi" , "XContext", "*RES*"     , "*RES*"     , "*RES*"     ,
+	"*RES*"     , "*RES* "    , "PErr"    , "CacheErr", "TagLo"   , "TagHi"     , "ErrorEPC"  , "*RES*"     };
+
+
+// Type deffinition of our functions
+
+typedef char* (*TdisR3000AF)(u32 code, u32 pc);
+
+// These macros are used to assemble the disassembler functions
+#define MakeDisFg(fn, b) char* fn(u32 code, u32 pc) { b; return ostr; }
+#define MakeDisF(fn, b) \
+	static char* fn(u32 code, u32 pc) { \
+		sprintf (ostr, "%8.8x %8.8x:", pc, code); \
+		b; /*ostr[(strlen(ostr) - 1)] = 0;*/ return ostr; \
+	}
+
+
+#include "r3000a.h"
+
+#undef _Funct_
+#undef _Rd_
+#undef _Rt_
+#undef _Rs_
+#undef _Sa_
+#undef _Im_
+#undef _Target_
+
+#define _Funct_  ((code      ) & 0x3F) // The funct part of the instruction register 
+#define _Rd_     ((code >> 11) & 0x1F) // The rd part of the instruction register 
+#define _Rt_     ((code >> 16) & 0x1F) // The rt part of the instruction register 
+#define _Rs_     ((code >> 21) & 0x1F) // The rs part of the instruction register 
+#define _Sa_     ((code >>  6) & 0x1F) // The sa part of the instruction register
+#define _Im_     ( code & 0xFFFF)      // The immediate part of the instruction register
+
+#define _Target_  ((pc & 0xf0000000) + ((code & 0x03ffffff) * 4))
+#define _Branch_  (pc + 4 + ((short)_Im_ * 4))
+#define _OfB_     _Im_, _nRs_
+
+#define dName(i)	sprintf(ostr, "%s %-7s,", ostr, i)
+#define dGPR(i)		sprintf(ostr, "%s %8.8x (%s),", ostr, psxRegs.GPR.r[i], disRNameGPR[i])
+#define dCP0(i)		sprintf(ostr, "%s %8.8x (%s),", ostr, psxRegs.CP0.r[i], disRNameCP0[i])
+#define dHI()		sprintf(ostr, "%s %8.8x (%s),", ostr, psxRegs.GPR.n.hi, "hi")
+#define dLO()		sprintf(ostr, "%s %8.8x (%s),", ostr, psxRegs.GPR.n.lo, "lo")
+#define dImm()		sprintf(ostr, "%s %4.4x (%d),", ostr, _Im_, _Im_)
+#define dTarget()	sprintf(ostr, "%s %8.8x,", ostr, _Target_)
+#define dSa()		sprintf(ostr, "%s %2.2x (%d),", ostr, _Sa_, _Sa_)
+#define dOfB()		sprintf(ostr, "%s %4.4x (%8.8x (%s)),", ostr, _Im_, psxRegs.GPR.r[_Rs_], disRNameGPR[_Rs_])
+#define dOffset()	sprintf(ostr, "%s %8.8x,", ostr, _Branch_)
+#define dCode()		sprintf(ostr, "%s %8.8x,", ostr, (code >> 6) & 0xffffff)
+
+/*********************************************************
+* Arithmetic with immediate operand                      *
+* Format:  OP rt, rs, immediate                          *
+*********************************************************/
+MakeDisF(disADDI,		dName("ADDI");  dGPR(_Rt_); dGPR(_Rs_); dImm();)
+MakeDisF(disADDIU,		dName("ADDIU"); dGPR(_Rt_); dGPR(_Rs_); dImm();)
+MakeDisF(disANDI,		dName("ANDI");  dGPR(_Rt_); dGPR(_Rs_); dImm();)
+MakeDisF(disORI,		dName("ORI");   dGPR(_Rt_); dGPR(_Rs_); dImm();)
+MakeDisF(disSLTI,		dName("SLTI");  dGPR(_Rt_); dGPR(_Rs_); dImm();)
+MakeDisF(disSLTIU,		dName("SLTIU"); dGPR(_Rt_); dGPR(_Rs_); dImm();)
+MakeDisF(disXORI,		dName("XORI");  dGPR(_Rt_); dGPR(_Rs_); dImm();)
+
+/*********************************************************
+* Register arithmetic                                    *
+* Format:  OP rd, rs, rt                                 *
+*********************************************************/
+MakeDisF(disADD,		dName("ADD");  dGPR(_Rd_); dGPR(_Rs_); dGPR(_Rt_);)
+MakeDisF(disADDU,		dName("ADDU"); dGPR(_Rd_); dGPR(_Rs_); dGPR(_Rt_);)
+MakeDisF(disAND,		dName("AND");  dGPR(_Rd_); dGPR(_Rs_); dGPR(_Rt_);)
+MakeDisF(disNOR,		dName("NOR");  dGPR(_Rd_); dGPR(_Rs_); dGPR(_Rt_);)
+MakeDisF(disOR,			dName("OR");   dGPR(_Rd_); dGPR(_Rs_); dGPR(_Rt_);)
+MakeDisF(disSLT,		dName("SLT");  dGPR(_Rd_); dGPR(_Rs_); dGPR(_Rt_);)
+MakeDisF(disSLTU,		dName("SLTU"); dGPR(_Rd_); dGPR(_Rs_); dGPR(_Rt_);)
+MakeDisF(disSUB,		dName("SUB");  dGPR(_Rd_); dGPR(_Rs_); dGPR(_Rt_);)
+MakeDisF(disSUBU,		dName("SUBU"); dGPR(_Rd_); dGPR(_Rs_); dGPR(_Rt_);)
+MakeDisF(disXOR,		dName("XOR");  dGPR(_Rd_); dGPR(_Rs_); dGPR(_Rt_);)
+
+/*********************************************************
+* Register arithmetic & Register trap logic              *
+* Format:  OP rs, rt                                     *
+*********************************************************/
+MakeDisF(disDIV,		dName("DIV");   dGPR(_Rs_); dGPR(_Rt_);)
+MakeDisF(disDIVU,		dName("DIVU");  dGPR(_Rs_); dGPR(_Rt_);)
+MakeDisF(disMULT,		dName("MULT");  dGPR(_Rs_); dGPR(_Rt_);)
+MakeDisF(disMULTU,		dName("MULTU"); dGPR(_Rs_); dGPR(_Rt_);)
+
+/*********************************************************
+* Register branch logic                                  *
+* Format:  OP rs, offset                                 *
+*********************************************************/
+MakeDisF(disBGEZ,		dName("BGEZ");   dGPR(_Rs_); dOffset();)
+MakeDisF(disBGEZAL,		dName("BGEZAL"); dGPR(_Rs_); dOffset();)
+MakeDisF(disBGTZ,		dName("BGTZ");   dGPR(_Rs_); dOffset();)
+MakeDisF(disBLEZ,		dName("BLEZ");   dGPR(_Rs_); dOffset();)
+MakeDisF(disBLTZ,		dName("BLTZ");   dGPR(_Rs_); dOffset();)
+MakeDisF(disBLTZAL,		dName("BLTZAL"); dGPR(_Rs_); dOffset();)
+
+/*********************************************************
+* Shift arithmetic with constant shift                   *
+* Format:  OP rd, rt, sa                                 *
+*********************************************************/
+MakeDisF(disSLL,		if (code) { dName("SLL"); dGPR(_Rd_); dGPR(_Rt_); dSa(); } else { dName("NOP"); })
+MakeDisF(disSRA,		dName("SRA"); dGPR(_Rd_); dGPR(_Rt_); dSa();)
+MakeDisF(disSRL,		dName("SRL"); dGPR(_Rd_); dGPR(_Rt_); dSa();)
+
+/*********************************************************
+* Shift arithmetic with variant register shift           *
+* Format:  OP rd, rt, rs                                 *
+*********************************************************/
+MakeDisF(disSLLV,		dName("SLLV");  dGPR(_Rd_); dGPR(_Rt_); dGPR(_Rs_);)
+MakeDisF(disSRAV,		dName("SRAV");  dGPR(_Rd_); dGPR(_Rt_); dGPR(_Rs_);)
+MakeDisF(disSRLV,		dName("SRLV");  dGPR(_Rd_); dGPR(_Rt_); dGPR(_Rs_);)
+
+/*********************************************************
+* Load higher 16 bits of the first word in GPR with imm  *
+* Format:  OP rt, immediate                              *
+*********************************************************/
+MakeDisF(disLUI,		dName("LUI"); dGPR(_Rt_); dImm();)
+
+/*********************************************************
+* Move from HI/LO to GPR                                 *
+* Format:  OP rd                                         *
+*********************************************************/
+MakeDisF(disMFHI,		dName("MFHI"); dGPR(_Rd_); dHI();)
+MakeDisF(disMFLO,		dName("MFLO"); dGPR(_Rd_); dLO();)
+
+/*********************************************************
+* Move from GPR to HI/LO                                 *
+* Format:  OP rd                                         *
+*********************************************************/
+MakeDisF(disMTHI,		dName("MTHI"); dHI(); dGPR(_Rs_);)
+MakeDisF(disMTLO,		dName("MTLO"); dLO(); dGPR(_Rs_);)
+
+/*********************************************************
+* Special purpose instructions                           *
+* Format:  OP                                            *
+*********************************************************/
+MakeDisF(disBREAK,		dName("BREAK"))
+MakeDisF(disRFE,		dName("RFE"))
+MakeDisF(disSYSCALL,	dName("SYSCALL"))
+MakeDisF(disHLE,		dName("HLE"))
+
+
+MakeDisF(disRTPS,		dName("RTPS"))
+MakeDisF(disOP  ,		dName("OP"))
+MakeDisF(disNCLIP,		dName("NCLIP"))
+MakeDisF(disDPCS,		dName("DPCS"))
+MakeDisF(disINTPL,		dName("INTPL"))
+MakeDisF(disMVMVA,		dName("MVMVA"))
+MakeDisF(disNCDS ,		dName("NCDS"))
+MakeDisF(disCDP ,		dName("CDP"))
+MakeDisF(disNCDT ,		dName("NCDT"))
+MakeDisF(disNCCS ,		dName("NCCS"))
+MakeDisF(disCC  ,		dName("CC"))
+MakeDisF(disNCS ,		dName("NCS"))
+MakeDisF(disNCT  ,		dName("NCT"))
+MakeDisF(disSQR  ,		dName("SQR"))
+MakeDisF(disDCPL ,		dName("DCPL"))
+MakeDisF(disDPCT ,		dName("DPCT"))
+MakeDisF(disAVSZ3,		dName("AVSZ3"))
+MakeDisF(disAVSZ4,		dName("AVSZ4"))
+MakeDisF(disRTPT ,		dName("RTPT"))
+MakeDisF(disGPF  ,		dName("GPF"))
+MakeDisF(disGPL  ,		dName("GPL"))
+MakeDisF(disNCCT ,		dName("NCCT"))
+
+MakeDisF(disMFC2,		dName("MFC2"); dGPR(_Rt_);)
+MakeDisF(disCFC2,		dName("CFC2"); dGPR(_Rt_);)
+MakeDisF(disMTC2,		dName("MTC2"); dGPR(_Rt_);)
+MakeDisF(disCTC2,		dName("CTC2"); dGPR(_Rt_);)
+
+/*********************************************************
+* Register branch logic                                  *
+* Format:  OP rs, rt, offset                             *
+*********************************************************/
+MakeDisF(disBEQ,		dName("BEQ"); dGPR(_Rs_); dGPR(_Rt_); dOffset();)
+MakeDisF(disBNE,		dName("BNE"); dGPR(_Rs_); dGPR(_Rt_); dOffset();)
+
+/*********************************************************
+* Jump to target                                         *
+* Format:  OP target                                     *
+*********************************************************/
+MakeDisF(disJ,			dName("J");   dTarget();)
+MakeDisF(disJAL,		dName("JAL"); dTarget(); dGPR(31);)
+
+/*********************************************************
+* Register jump                                          *
+* Format:  OP rs, rd                                     *
+*********************************************************/
+MakeDisF(disJR,			dName("JR");   dGPR(_Rs_);)
+MakeDisF(disJALR,		dName("JALR"); dGPR(_Rs_); dGPR(_Rd_))
+
+/*********************************************************
+* Load and store for GPR                                 *
+* Format:  OP rt, offset(base)                           *
+*********************************************************/
+MakeDisF(disLB,			dName("LB");    dGPR(_Rt_);  dOfB();)
+MakeDisF(disLBU,		dName("LBU");   dGPR(_Rt_);  dOfB();)
+MakeDisF(disLH,			dName("LH");    dGPR(_Rt_);  dOfB();)
+MakeDisF(disLHU,		dName("LHU");   dGPR(_Rt_);  dOfB();)
+MakeDisF(disLW,			dName("LW");    dGPR(_Rt_);  dOfB();)
+MakeDisF(disLWL,		dName("LWL");   dGPR(_Rt_);  dOfB();)
+MakeDisF(disLWR,		dName("LWR");   dGPR(_Rt_);  dOfB();)
+MakeDisF(disLWC2,		dName("LWC2");  dGPR(_Rt_);  dOfB();)
+MakeDisF(disSB,			dName("SB");    dGPR(_Rt_);  dOfB();)
+MakeDisF(disSH,			dName("SH");    dGPR(_Rt_);  dOfB();)
+MakeDisF(disSW,			dName("SW");    dGPR(_Rt_);  dOfB();)
+MakeDisF(disSWL,		dName("SWL");   dGPR(_Rt_);  dOfB();)
+MakeDisF(disSWR,		dName("SWR");   dGPR(_Rt_);  dOfB();)
+MakeDisF(disSWC2,		dName("SWC2");  dGPR(_Rt_);  dOfB();)
+
+/*********************************************************
+* Moves between GPR and COPx                             *
+* Format:  OP rt, fs                                     *
+*********************************************************/
+MakeDisF(disMFC0,		dName("MFC0"); dGPR(_Rt_); dCP0(_Rd_);)
+MakeDisF(disMTC0,		dName("MTC0"); dCP0(_Rd_); dGPR(_Rt_);)
+MakeDisF(disCFC0,		dName("CFC0"); dGPR(_Rt_); dCP0(_Rd_);)
+MakeDisF(disCTC0,		dName("CTC0"); dCP0(_Rd_); dGPR(_Rt_);)
+
+/*********************************************************
+* Unknow instruction (would generate an exception)       *
+* Format:  ?                                             *
+*********************************************************/
+MakeDisF(disNULL,		dName("*** Bad OP ***");)
+
+
+TdisR3000AF disR3000A_SPECIAL[] = { // Subset of disSPECIAL
+	disSLL , disNULL , disSRL , disSRA , disSLLV   , disNULL  , disSRLV  , disSRAV ,
+	disJR  , disJALR , disNULL, disNULL, disSYSCALL, disBREAK , disNULL  , disNULL ,
+	disMFHI, disMTHI , disMFLO, disMTLO, disNULL   , disNULL  , disNULL  , disNULL ,
+	disMULT, disMULTU, disDIV , disDIVU, disNULL   , disNULL  , disNULL  , disNULL ,
+	disADD , disADDU , disSUB , disSUBU, disAND    , disOR    , disXOR   , disNOR  ,
+	disNULL, disNULL , disSLT , disSLTU, disNULL   , disNULL  , disNULL  , disNULL ,
+	disNULL, disNULL , disNULL, disNULL, disNULL   , disNULL  , disNULL   , disNULL ,
+	disNULL, disNULL , disNULL, disNULL, disNULL   , disNULL  , disNULL  , disNULL};
+
+MakeDisF(disSPECIAL,	disR3000A_SPECIAL[_Funct_](code, pc))
+
+TdisR3000AF disR3000A_BCOND[] = { // Subset of disBCOND
+	disBLTZ  , disBGEZ  , disNULL, disNULL, disNULL, disNULL, disNULL, disNULL,
+	disNULL  , disNULL  , disNULL, disNULL, disNULL, disNULL, disNULL, disNULL,
+	disBLTZAL, disBGEZAL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL,
+	disNULL  , disNULL  , disNULL, disNULL, disNULL, disNULL, disNULL, disNULL};
+
+MakeDisF(disBCOND,	disR3000A_BCOND[_Rt_](code, pc))
+
+TdisR3000AF disR3000A_COP0[] = { // Subset of disCOP0
+	disMFC0, disNULL, disCFC0, disNULL, disMTC0, disNULL, disCTC0, disNULL,
+	disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL,
+	disRFE , disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL,
+	disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL};
+
+MakeDisF(disCOP0,		disR3000A_COP0[_Rs_](code, pc))
+
+TdisR3000AF disR3000A_BASIC[] = { // Subset of disBASIC (based on rs)
+	disMFC2, disNULL, disCFC2, disNULL, disMTC2, disNULL, disCTC2, disNULL,
+	disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL,
+	disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL,
+	disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL, disNULL};
+
+MakeDisF(disBASIC,		disR3000A_BASIC[_Rs_](code, pc))
+
+TdisR3000AF disR3000A_COP2[] = { // Subset of disR3000F_COP2 (based on funct)
+	disBASIC, disRTPS , disNULL , disNULL , disNULL, disNULL , disNCLIP, disNULL,
+	disNULL , disNULL , disNULL , disNULL , disOP  , disNULL , disNULL , disNULL,
+	disDPCS , disINTPL, disMVMVA, disNCDS , disCDP , disNULL , disNCDT , disNULL,
+	disNULL , disNULL , disNULL , disNCCS , disCC  , disNULL , disNCS  , disNULL,
+	disNCT  , disNULL , disNULL , disNULL , disNULL, disNULL , disNULL , disNULL,
+	disSQR  , disDCPL , disDPCT , disNULL , disNULL, disAVSZ3, disAVSZ4, disNULL, 
+	disRTPT , disNULL , disNULL , disNULL , disNULL, disNULL , disNULL , disNULL,
+	disNULL , disNULL , disNULL , disNULL , disNULL, disGPF  , disGPL  , disNCCT   };
+
+MakeDisF(disCOP2,		disR3000A_COP2[_Funct_](code, pc))
+
+TdisR3000AF disR3000A[] = {
+	disSPECIAL    , disBCOND     , disJ       , disJAL  , disBEQ , disBNE , disBLEZ , disBGTZ ,
+	disADDI       , disADDIU     , disSLTI    , disSLTIU, disANDI, disORI , disXORI , disLUI  ,
+	disCOP0       , disNULL      , disCOP2    , disNULL , disNULL, disNULL, disNULL , disNULL ,
+	disNULL       , disNULL      , disNULL    , disNULL , disNULL, disNULL, disNULL , disNULL ,
+	disLB         , disLH        , disLWL     , disLW   , disLBU , disLHU , disLWR  , disNULL ,
+	disSB         , disSH        , disSWL     , disSW   , disNULL, disNULL, disSWR  , disNULL , 
+	disNULL       , disNULL      , disLWC2    , disNULL , disNULL, disNULL, disNULL , disNULL ,
+	disNULL       , disNULL      , disSWC2    , disHLE  , disNULL, disNULL, disNULL , disNULL };
+
+MakeDisFg(disR3000AF,	disR3000A[code >> 26](code, pc))
diff --git a/libpcsxcore/gte.c b/libpcsxcore/gte.c
new file mode 100644
index 0000000..72210d3
--- /dev/null
+++ b/libpcsxcore/gte.c
@@ -0,0 +1,904 @@
+/***************************************************************************
+ *   PCSX-Revolution - PlayStation Emulator for Nintendo Wii               *
+ *   Copyright (C) 2009-2010  PCSX-Revolution Dev Team                     *
+ *   <http://code.google.com/p/pcsx-revolution/>                           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+/*
+* GTE functions.
+*/
+
+#include "gte.h"
+#include "psxmem.h"
+
+#define VX(n) (n < 3 ? psxRegs.CP2D.p[n << 1].sw.l : psxRegs.CP2D.p[9].sw.l)
+#define VY(n) (n < 3 ? psxRegs.CP2D.p[n << 1].sw.h : psxRegs.CP2D.p[10].sw.l)
+#define VZ(n) (n < 3 ? psxRegs.CP2D.p[(n << 1) + 1].sw.l : psxRegs.CP2D.p[11].sw.l)
+#define MX11(n) (n < 3 ? psxRegs.CP2C.p[(n << 3)].sw.l : 0)
+#define MX12(n) (n < 3 ? psxRegs.CP2C.p[(n << 3)].sw.h : 0)
+#define MX13(n) (n < 3 ? psxRegs.CP2C.p[(n << 3) + 1].sw.l : 0)
+#define MX21(n) (n < 3 ? psxRegs.CP2C.p[(n << 3) + 1].sw.h : 0)
+#define MX22(n) (n < 3 ? psxRegs.CP2C.p[(n << 3) + 2].sw.l : 0)
+#define MX23(n) (n < 3 ? psxRegs.CP2C.p[(n << 3) + 2].sw.h : 0)
+#define MX31(n) (n < 3 ? psxRegs.CP2C.p[(n << 3) + 3].sw.l : 0)
+#define MX32(n) (n < 3 ? psxRegs.CP2C.p[(n << 3) + 3].sw.h : 0)
+#define MX33(n) (n < 3 ? psxRegs.CP2C.p[(n << 3) + 4].sw.l : 0)
+#define CV1(n) (n < 3 ? (s32)psxRegs.CP2C.r[(n << 3) + 5] : 0)
+#define CV2(n) (n < 3 ? (s32)psxRegs.CP2C.r[(n << 3) + 6] : 0)
+#define CV3(n) (n < 3 ? (s32)psxRegs.CP2C.r[(n << 3) + 7] : 0)
+
+#define fSX(n) ((psxRegs.CP2D.p)[((n) + 12)].sw.l)
+#define fSY(n) ((psxRegs.CP2D.p)[((n) + 12)].sw.h)
+#define fSZ(n) ((psxRegs.CP2D.p)[((n) + 17)].w.l) /* (n == 0) => SZ1; */
+
+#define gteVXY0 (psxRegs.CP2D.r[0])
+#define gteVX0  (psxRegs.CP2D.p[0].sw.l)
+#define gteVY0  (psxRegs.CP2D.p[0].sw.h)
+#define gteVZ0  (psxRegs.CP2D.p[1].sw.l)
+#define gteVXY1 (psxRegs.CP2D.r[2])
+#define gteVX1  (psxRegs.CP2D.p[2].sw.l)
+#define gteVY1  (psxRegs.CP2D.p[2].sw.h)
+#define gteVZ1  (psxRegs.CP2D.p[3].sw.l)
+#define gteVXY2 (psxRegs.CP2D.r[4])
+#define gteVX2  (psxRegs.CP2D.p[4].sw.l)
+#define gteVY2  (psxRegs.CP2D.p[4].sw.h)
+#define gteVZ2  (psxRegs.CP2D.p[5].sw.l)
+#define gteRGB  (psxRegs.CP2D.r[6])
+#define gteR    (psxRegs.CP2D.p[6].b.l)
+#define gteG    (psxRegs.CP2D.p[6].b.h)
+#define gteB    (psxRegs.CP2D.p[6].b.h2)
+#define gteCODE (psxRegs.CP2D.p[6].b.h3)
+#define gteOTZ  (psxRegs.CP2D.p[7].w.l)
+#define gteIR0  (psxRegs.CP2D.p[8].sw.l)
+#define gteIR1  (psxRegs.CP2D.p[9].sw.l)
+#define gteIR2  (psxRegs.CP2D.p[10].sw.l)
+#define gteIR3  (psxRegs.CP2D.p[11].sw.l)
+#define gteSXY0 (psxRegs.CP2D.r[12])
+#define gteSX0  (psxRegs.CP2D.p[12].sw.l)
+#define gteSY0  (psxRegs.CP2D.p[12].sw.h)
+#define gteSXY1 (psxRegs.CP2D.r[13])
+#define gteSX1  (psxRegs.CP2D.p[13].sw.l)
+#define gteSY1  (psxRegs.CP2D.p[13].sw.h)
+#define gteSXY2 (psxRegs.CP2D.r[14])
+#define gteSX2  (psxRegs.CP2D.p[14].sw.l)
+#define gteSY2  (psxRegs.CP2D.p[14].sw.h)
+#define gteSXYP (psxRegs.CP2D.r[15])
+#define gteSXP  (psxRegs.CP2D.p[15].sw.l)
+#define gteSYP  (psxRegs.CP2D.p[15].sw.h)
+#define gteSZ0  (psxRegs.CP2D.p[16].w.l)
+#define gteSZ1  (psxRegs.CP2D.p[17].w.l)
+#define gteSZ2  (psxRegs.CP2D.p[18].w.l)
+#define gteSZ3  (psxRegs.CP2D.p[19].w.l)
+#define gteRGB0  (psxRegs.CP2D.r[20])
+#define gteR0    (psxRegs.CP2D.p[20].b.l)
+#define gteG0    (psxRegs.CP2D.p[20].b.h)
+#define gteB0    (psxRegs.CP2D.p[20].b.h2)
+#define gteCODE0 (psxRegs.CP2D.p[20].b.h3)
+#define gteRGB1  (psxRegs.CP2D.r[21])
+#define gteR1    (psxRegs.CP2D.p[21].b.l)
+#define gteG1    (psxRegs.CP2D.p[21].b.h)
+#define gteB1    (psxRegs.CP2D.p[21].b.h2)
+#define gteCODE1 (psxRegs.CP2D.p[21].b.h3)
+#define gteRGB2  (psxRegs.CP2D.r[22])
+#define gteR2    (psxRegs.CP2D.p[22].b.l)
+#define gteG2    (psxRegs.CP2D.p[22].b.h)
+#define gteB2    (psxRegs.CP2D.p[22].b.h2)
+#define gteCODE2 (psxRegs.CP2D.p[22].b.h3)
+#define gteRES1  (psxRegs.CP2D.r[23])
+#define gteMAC0  (((s32 *)psxRegs.CP2D.r)[24])
+#define gteMAC1  (((s32 *)psxRegs.CP2D.r)[25])
+#define gteMAC2  (((s32 *)psxRegs.CP2D.r)[26])
+#define gteMAC3  (((s32 *)psxRegs.CP2D.r)[27])
+#define gteIRGB  (psxRegs.CP2D.r[28])
+#define gteORGB  (psxRegs.CP2D.r[29])
+#define gteLZCS  (psxRegs.CP2D.r[30])
+#define gteLZCR  (psxRegs.CP2D.r[31])
+
+#define gteR11R12 (((s32 *)psxRegs.CP2C.r)[0])
+#define gteR22R23 (((s32 *)psxRegs.CP2C.r)[2])
+#define gteR11 (psxRegs.CP2C.p[0].sw.l)
+#define gteR12 (psxRegs.CP2C.p[0].sw.h)
+#define gteR13 (psxRegs.CP2C.p[1].sw.l)
+#define gteR21 (psxRegs.CP2C.p[1].sw.h)
+#define gteR22 (psxRegs.CP2C.p[2].sw.l)
+#define gteR23 (psxRegs.CP2C.p[2].sw.h)
+#define gteR31 (psxRegs.CP2C.p[3].sw.l)
+#define gteR32 (psxRegs.CP2C.p[3].sw.h)
+#define gteR33 (psxRegs.CP2C.p[4].sw.l)
+#define gteTRX (((s32 *)psxRegs.CP2C.r)[5])
+#define gteTRY (((s32 *)psxRegs.CP2C.r)[6])
+#define gteTRZ (((s32 *)psxRegs.CP2C.r)[7])
+#define gteL11 (psxRegs.CP2C.p[8].sw.l)
+#define gteL12 (psxRegs.CP2C.p[8].sw.h)
+#define gteL13 (psxRegs.CP2C.p[9].sw.l)
+#define gteL21 (psxRegs.CP2C.p[9].sw.h)
+#define gteL22 (psxRegs.CP2C.p[10].sw.l)
+#define gteL23 (psxRegs.CP2C.p[10].sw.h)
+#define gteL31 (psxRegs.CP2C.p[11].sw.l)
+#define gteL32 (psxRegs.CP2C.p[11].sw.h)
+#define gteL33 (psxRegs.CP2C.p[12].sw.l)
+#define gteRBK (((s32 *)psxRegs.CP2C.r)[13])
+#define gteGBK (((s32 *)psxRegs.CP2C.r)[14])
+#define gteBBK (((s32 *)psxRegs.CP2C.r)[15])
+#define gteLR1 (psxRegs.CP2C.p[16].sw.l)
+#define gteLR2 (psxRegs.CP2C.p[16].sw.h)
+#define gteLR3 (psxRegs.CP2C.p[17].sw.l)
+#define gteLG1 (psxRegs.CP2C.p[17].sw.h)
+#define gteLG2 (psxRegs.CP2C.p[18].sw.l)
+#define gteLG3 (psxRegs.CP2C.p[18].sw.h)
+#define gteLB1 (psxRegs.CP2C.p[19].sw.l)
+#define gteLB2 (psxRegs.CP2C.p[19].sw.h)
+#define gteLB3 (psxRegs.CP2C.p[20].sw.l)
+#define gteRFC (((s32 *)psxRegs.CP2C.r)[21])
+#define gteGFC (((s32 *)psxRegs.CP2C.r)[22])
+#define gteBFC (((s32 *)psxRegs.CP2C.r)[23])
+#define gteOFX (((s32 *)psxRegs.CP2C.r)[24])
+#define gteOFY (((s32 *)psxRegs.CP2C.r)[25])
+#define gteH   (psxRegs.CP2C.p[26].sw.l)
+#define gteDQA (psxRegs.CP2C.p[27].sw.l)
+#define gteDQB (((s32 *)psxRegs.CP2C.r)[28])
+#define gteZSF3 (psxRegs.CP2C.p[29].sw.l)
+#define gteZSF4 (psxRegs.CP2C.p[30].sw.l)
+#define gteFLAG (psxRegs.CP2C.r[31])
+
+#define GTE_OP(op) ((op >> 20) & 31)
+#define GTE_SF(op) ((op >> 19) & 1)
+#define GTE_MX(op) ((op >> 17) & 3)
+#define GTE_V(op) ((op >> 15) & 3)
+#define GTE_CV(op) ((op >> 13) & 3)
+#define GTE_CD(op) ((op >> 11) & 3) /* not used */
+#define GTE_LM(op) ((op >> 10) & 1)
+#define GTE_CT(op) ((op >> 6) & 15) /* not used */
+#define GTE_FUNCT(op) (op & 63)
+
+#define gteop (psxRegs.code & 0x1ffffff)
+
+static inline s64 BOUNDS(s64 n_value, s64 n_max, int n_maxflag, s64 n_min, int n_minflag) {
+	if (n_value > n_max) {
+		gteFLAG |= n_maxflag;
+	} else if (n_value < n_min) {
+		gteFLAG |= n_minflag;
+	}
+	return n_value;
+}
+
+static inline s32 LIM(s32 value, s32 max, s32 min, u32 flag) {
+	s32 ret = value;
+	if (value > max) {
+		gteFLAG |= flag;
+		ret = max;
+	} else if (value < min) {
+		gteFLAG |= flag;
+		ret = min;
+	}
+	return ret;
+}
+
+#define A1(a) BOUNDS((a), 0x7fffffff, (1 << 30), -(s64)0x80000000, (1 << 31) | (1 << 27))
+#define A2(a) BOUNDS((a), 0x7fffffff, (1 << 29), -(s64)0x80000000, (1 << 31) | (1 << 26))
+#define A3(a) BOUNDS((a), 0x7fffffff, (1 << 28), -(s64)0x80000000, (1 << 31) | (1 << 25))
+#define limB1(a, l) LIM((a), 0x7fff, -0x8000 * !l, (1 << 31) | (1 << 24))
+#define limB2(a, l) LIM((a), 0x7fff, -0x8000 * !l, (1 << 31) | (1 << 23))
+#define limB3(a, l) LIM((a), 0x7fff, -0x8000 * !l, (1 << 22))
+#define limC1(a) LIM((a), 0x00ff, 0x0000, (1 << 21))
+#define limC2(a) LIM((a), 0x00ff, 0x0000, (1 << 20))
+#define limC3(a) LIM((a), 0x00ff, 0x0000, (1 << 19))
+#define limD(a) LIM((a), 0xffff, 0x0000, (1 << 31) | (1 << 18))
+
+static inline u32 limE(u32 result) {
+	if (result > 0x1ffff) {
+		gteFLAG |= (1 << 31) | (1 << 17);
+		return 0x1ffff;
+	}
+	return result;
+}
+
+#define F(a) BOUNDS((a), 0x7fffffff, (1 << 31) | (1 << 16), -(s64)0x80000000, (1 << 31) | (1 << 15))
+#define limG1(a) LIM((a), 0x3ff, -0x400, (1 << 31) | (1 << 14))
+#define limG2(a) LIM((a), 0x3ff, -0x400, (1 << 31) | (1 << 13))
+#define limH(a) LIM((a), 0xfff, 0x000, (1 << 12))
+
+#include "gte_divider.h"
+
+static inline u32 MFC2(int reg) {
+	switch (reg) {
+		case 1:
+		case 3:
+		case 5:
+		case 8:
+		case 9:
+		case 10:
+		case 11:
+			psxRegs.CP2D.r[reg] = (s32)psxRegs.CP2D.p[reg].sw.l;
+			break;
+
+		case 7:
+		case 16:
+		case 17:
+		case 18:
+		case 19:
+			psxRegs.CP2D.r[reg] = (u32)psxRegs.CP2D.p[reg].w.l;
+			break;
+
+		case 15:
+			psxRegs.CP2D.r[reg] = gteSXY2;
+			break;
+
+		case 28:
+		case 30:
+			return 0;
+
+		case 29:
+			psxRegs.CP2D.r[reg] = LIM(gteIR1 >> 7, 0x1f, 0, 0) |
+									(LIM(gteIR2 >> 7, 0x1f, 0, 0) << 5) |
+									(LIM(gteIR3 >> 7, 0x1f, 0, 0) << 10);
+			break;
+	}
+	return psxRegs.CP2D.r[reg];
+}
+
+static inline void MTC2(u32 value, int reg) {
+	switch (reg) {
+		case 15:
+			gteSXY0 = gteSXY1;
+			gteSXY1 = gteSXY2;
+			gteSXY2 = value;
+			gteSXYP = value;
+			break;
+
+		case 28:
+			gteIRGB = value;
+			gteIR1 = (value & 0x1f) << 7;
+			gteIR2 = (value & 0x3e0) << 2;
+			gteIR3 = (value & 0x7c00) >> 3;
+			break;
+
+		case 30:
+			{
+				int a;
+				gteLZCS = value;
+
+				a = gteLZCS;
+				if (a > 0) {
+					int i;
+					for (i = 31; (a & (1 << i)) == 0 && i >= 0; i--);
+					gteLZCR = 31 - i;
+				} else if (a < 0) {
+					int i;
+					a ^= 0xffffffff;
+					for (i = 31; (a & (1 << i)) == 0 && i >= 0; i--);
+					gteLZCR = 31 - i;
+				} else {
+					gteLZCR = 32;
+				}
+			}
+			break;
+
+		case 7:
+		case 29:
+		case 31:
+			return;
+
+		default:
+			psxRegs.CP2D.r[reg] = value;
+	}
+}
+
+static inline void CTC2(u32 value, int reg) {
+	switch (reg) {
+		case 4:
+		case 12:
+		case 20:
+		case 26:
+		case 27:
+		case 29:
+		case 30:
+			value = (s32)(s16)value;
+			break;
+
+		case 31:
+			value = value & 0x7ffff000;
+			if (value & 0x7f87e000) value |= 0x80000000;
+			break;
+	}
+
+	psxRegs.CP2C.r[reg] = value;
+}
+
+void gteMFC2() {
+	if (!_Rt_) return;
+	psxRegs.GPR.r[_Rt_] = MFC2(_Rd_);
+}
+
+void gteCFC2() {
+	if (!_Rt_) return;
+	psxRegs.GPR.r[_Rt_] = psxRegs.CP2C.r[_Rd_];
+}
+
+void gteMTC2() {
+	MTC2(psxRegs.GPR.r[_Rt_], _Rd_);
+}
+
+void gteCTC2() {
+	CTC2(psxRegs.GPR.r[_Rt_], _Rd_);
+}
+
+#define _oB_ (psxRegs.GPR.r[_Rs_] + _Imm_)
+
+void gteLWC2() {
+	MTC2(psxMemRead32(_oB_), _Rt_);
+}
+
+void gteSWC2() {
+	psxMemWrite32(_oB_, MFC2(_Rt_));
+}
+
+void gteRTPS() {
+	int quotient;
+
+#ifdef GTE_LOG
+	GTE_LOG("GTE RTPS\n");
+#endif
+	gteFLAG = 0;
+
+	gteMAC1 = A1((((s64)gteTRX << 12) + (gteR11 * gteVX0) + (gteR12 * gteVY0) + (gteR13 * gteVZ0)) >> 12);
+	gteMAC2 = A2((((s64)gteTRY << 12) + (gteR21 * gteVX0) + (gteR22 * gteVY0) + (gteR23 * gteVZ0)) >> 12);
+	gteMAC3 = A3((((s64)gteTRZ << 12) + (gteR31 * gteVX0) + (gteR32 * gteVY0) + (gteR33 * gteVZ0)) >> 12);
+	gteIR1 = limB1(gteMAC1, 0);
+	gteIR2 = limB2(gteMAC2, 0);
+	gteIR3 = limB3(gteMAC3, 0);
+	gteSZ0 = gteSZ1;
+	gteSZ1 = gteSZ2;
+	gteSZ2 = gteSZ3;
+	gteSZ3 = limD(gteMAC3);
+	quotient = limE(DIVIDE(gteH, gteSZ3));
+	gteSXY0 = gteSXY1;
+	gteSXY1 = gteSXY2;
+	gteSX2 = limG1(F((s64)gteOFX + ((s64)gteIR1 * quotient)) >> 16);
+	gteSY2 = limG2(F((s64)gteOFY + ((s64)gteIR2 * quotient)) >> 16);
+
+	gteMAC0 = F((s64)(gteDQB + ((s64)gteDQA * quotient)) >> 12);
+	gteIR0 = limH(gteMAC0);
+}
+
+void gteRTPT() {
+	int quotient;
+	int v;
+	s32 vx, vy, vz;
+
+#ifdef GTE_LOG
+	GTE_LOG("GTE RTPT\n");
+#endif
+	gteFLAG = 0;
+
+	gteSZ0 = gteSZ3;
+	for (v = 0; v < 3; v++) {
+		vx = VX(v);
+		vy = VY(v);
+		vz = VZ(v);
+		gteMAC1 = A1((((s64)gteTRX << 12) + (gteR11 * vx) + (gteR12 * vy) + (gteR13 * vz)) >> 12);
+		gteMAC2 = A2((((s64)gteTRY << 12) + (gteR21 * vx) + (gteR22 * vy) + (gteR23 * vz)) >> 12);
+		gteMAC3 = A3((((s64)gteTRZ << 12) + (gteR31 * vx) + (gteR32 * vy) + (gteR33 * vz)) >> 12);
+		gteIR1 = limB1(gteMAC1, 0);
+		gteIR2 = limB2(gteMAC2, 0);
+		gteIR3 = limB3(gteMAC3, 0);
+		fSZ(v) = limD(gteMAC3);
+		quotient = limE(DIVIDE(gteH, fSZ(v)));
+		fSX(v) = limG1(F((s64)gteOFX + ((s64)gteIR1 * quotient)) >> 16);
+		fSY(v) = limG2(F((s64)gteOFY + ((s64)gteIR2 * quotient)) >> 16);
+	}
+	gteMAC0 = F((s64)(gteDQB + ((s64)gteDQA * quotient)) >> 12);
+	gteIR0 = limH(gteMAC0);
+}
+
+void gteMVMVA() {
+	int shift = 12 * GTE_SF(gteop);
+	int mx = GTE_MX(gteop);
+	int v = GTE_V(gteop);
+	int cv = GTE_CV(gteop);
+	int lm = GTE_LM(gteop);
+	s32 vx = VX(v);
+	s32 vy = VY(v);
+	s32 vz = VZ(v);
+
+#ifdef GTE_LOG
+	GTE_LOG("GTE MVMVA\n");
+#endif
+	gteFLAG = 0;
+
+	gteMAC1 = A1((((s64)CV1(cv) << 12) + (MX11(mx) * vx) + (MX12(mx) * vy) + (MX13(mx) * vz)) >> shift);
+	gteMAC2 = A2((((s64)CV2(cv) << 12) + (MX21(mx) * vx) + (MX22(mx) * vy) + (MX23(mx) * vz)) >> shift);
+	gteMAC3 = A3((((s64)CV3(cv) << 12) + (MX31(mx) * vx) + (MX32(mx) * vy) + (MX33(mx) * vz)) >> shift);
+
+	gteIR1 = limB1(gteMAC1, lm);
+	gteIR2 = limB2(gteMAC2, lm);
+	gteIR3 = limB3(gteMAC3, lm);
+}
+
+void gteNCLIP() {
+#ifdef GTE_LOG
+	GTE_LOG("GTE NCLIP\n");
+#endif
+	gteFLAG = 0;
+
+	gteMAC0 = F((s64)gteSX0 * (gteSY1 - gteSY2) +
+				gteSX1 * (gteSY2 - gteSY0) +
+				gteSX2 * (gteSY0 - gteSY1));
+}
+
+void gteAVSZ3() {
+#ifdef GTE_LOG
+	GTE_LOG("GTE AVSZ3\n");
+#endif
+	gteFLAG = 0;
+
+	gteMAC0 = F((s64)(gteZSF3 * gteSZ1) + (gteZSF3 * gteSZ2) + (gteZSF3 * gteSZ3));
+	gteOTZ = limD(gteMAC0 >> 12);
+}
+
+void gteAVSZ4() {
+#ifdef GTE_LOG
+	GTE_LOG("GTE AVSZ4\n");
+#endif
+	gteFLAG = 0;
+
+	gteMAC0 = F((s64)(gteZSF4 * (gteSZ0 + gteSZ1 + gteSZ2 + gteSZ3)));
+	gteOTZ = limD(gteMAC0 >> 12);
+}
+
+void gteSQR() {
+	int shift = 12 * GTE_SF(gteop);
+	int lm = GTE_LM(gteop);
+
+#ifdef GTE_LOG
+	GTE_LOG("GTE SQR\n");
+#endif
+	gteFLAG = 0;
+
+	gteMAC1 = A1((gteIR1 * gteIR1) >> shift);
+	gteMAC2 = A2((gteIR2 * gteIR2) >> shift);
+	gteMAC3 = A3((gteIR3 * gteIR3) >> shift);
+	gteIR1 = limB1(gteMAC1 >> shift, lm);
+	gteIR2 = limB2(gteMAC2 >> shift, lm);
+	gteIR3 = limB3(gteMAC3 >> shift, lm);
+}
+
+void gteNCCS() {
+#ifdef GTE_LOG
+	GTE_LOG("GTE NCCS\n");
+#endif
+	gteFLAG = 0;
+
+	gteMAC1 = A1((((s64)gteL11 * gteVX0) + (gteL12 * gteVY0) + (gteL13 * gteVZ0)) >> 12);
+	gteMAC2 = A2((((s64)gteL21 * gteVX0) + (gteL22 * gteVY0) + (gteL23 * gteVZ0)) >> 12);
+	gteMAC3 = A3((((s64)gteL31 * gteVX0) + (gteL32 * gteVY0) + (gteL33 * gteVZ0)) >> 12);
+	gteIR1 = limB1(gteMAC1, 1);
+	gteIR2 = limB2(gteMAC2, 1);
+	gteIR3 = limB3(gteMAC3, 1);
+	gteMAC1 = A1((((s64)gteRBK << 12) + (gteLR1 * gteIR1) + (gteLR2 * gteIR2) + (gteLR3 * gteIR3)) >> 12);
+	gteMAC2 = A2((((s64)gteGBK << 12) + (gteLG1 * gteIR1) + (gteLG2 * gteIR2) + (gteLG3 * gteIR3)) >> 12);
+	gteMAC3 = A3((((s64)gteBBK << 12) + (gteLB1 * gteIR1) + (gteLB2 * gteIR2) + (gteLB3 * gteIR3)) >> 12);
+	gteIR1 = limB1(gteMAC1, 1);
+	gteIR2 = limB2(gteMAC2, 1);
+	gteIR3 = limB3(gteMAC3, 1);
+	gteMAC1 = A1(((s64)gteR * gteIR1) >> 8);
+	gteMAC2 = A2(((s64)gteG * gteIR2) >> 8);
+	gteMAC3 = A3(((s64)gteB * gteIR3) >> 8);
+	gteIR1 = limB1(gteMAC1, 1);
+	gteIR2 = limB2(gteMAC2, 1);
+	gteIR3 = limB3(gteMAC3, 1);
+
+	gteRGB0 = gteRGB1;
+	gteRGB1 = gteRGB2;
+	gteCODE2 = gteCODE;
+	gteR2 = limC1(gteMAC1 >> 4);
+	gteG2 = limC2(gteMAC2 >> 4);
+	gteB2 = limC3(gteMAC3 >> 4);
+}
+
+void gteNCCT() {
+	int v;
+	s32 vx, vy, vz;
+
+#ifdef GTE_LOG
+	GTE_LOG("GTE NCCT\n");
+#endif
+	gteFLAG = 0;
+
+	for (v = 0; v < 3; v++) {
+		vx = VX(v);
+		vy = VY(v);
+		vz = VZ(v);
+		gteMAC1 = A1((((s64)gteL11 * vx) + (gteL12 * vy) + (gteL13 * vz)) >> 12);
+		gteMAC2 = A2((((s64)gteL21 * vx) + (gteL22 * vy) + (gteL23 * vz)) >> 12);
+		gteMAC3 = A3((((s64)gteL31 * vx) + (gteL32 * vy) + (gteL33 * vz)) >> 12);
+		gteIR1 = limB1(gteMAC1, 1);
+		gteIR2 = limB2(gteMAC2, 1);
+		gteIR3 = limB3(gteMAC3, 1);
+		gteMAC1 = A1((((s64)gteRBK << 12) + (gteLR1 * gteIR1) + (gteLR2 * gteIR2) + (gteLR3 * gteIR3)) >> 12);
+		gteMAC2 = A2((((s64)gteGBK << 12) + (gteLG1 * gteIR1) + (gteLG2 * gteIR2) + (gteLG3 * gteIR3)) >> 12);
+		gteMAC3 = A3((((s64)gteBBK << 12) + (gteLB1 * gteIR1) + (gteLB2 * gteIR2) + (gteLB3 * gteIR3)) >> 12);
+		gteIR1 = limB1(gteMAC1, 1);
+		gteIR2 = limB2(gteMAC2, 1);
+		gteIR3 = limB3(gteMAC3, 1);
+		gteMAC1 = A1(((s64)gteR * gteIR1) >> 8);
+		gteMAC2 = A2(((s64)gteG * gteIR2) >> 8);
+		gteMAC3 = A3(((s64)gteB * gteIR3) >> 8);
+
+		gteRGB0 = gteRGB1;
+		gteRGB1 = gteRGB2;
+		gteCODE2 = gteCODE;
+		gteR2 = limC1(gteMAC1 >> 4);
+		gteG2 = limC2(gteMAC2 >> 4);
+		gteB2 = limC3(gteMAC3 >> 4);
+	}
+	gteIR1 = limB1(gteMAC1, 1);
+	gteIR2 = limB2(gteMAC2, 1);
+	gteIR3 = limB3(gteMAC3, 1);
+}
+
+void gteNCDS() {
+#ifdef GTE_LOG
+	GTE_LOG("GTE NCDS\n");
+#endif
+	gteFLAG = 0;
+
+	gteMAC1 = A1((((s64)gteL11 * gteVX0) + (gteL12 * gteVY0) + (gteL13 * gteVZ0)) >> 12);
+	gteMAC2 = A2((((s64)gteL21 * gteVX0) + (gteL22 * gteVY0) + (gteL23 * gteVZ0)) >> 12);
+	gteMAC3 = A3((((s64)gteL31 * gteVX0) + (gteL32 * gteVY0) + (gteL33 * gteVZ0)) >> 12);
+	gteIR1 = limB1(gteMAC1, 1);
+	gteIR2 = limB2(gteMAC2, 1);
+	gteIR3 = limB3(gteMAC3, 1);
+	gteMAC1 = A1((((s64)gteRBK << 12) + (gteLR1 * gteIR1) + (gteLR2 * gteIR2) + (gteLR3 * gteIR3)) >> 12);
+	gteMAC2 = A2((((s64)gteGBK << 12) + (gteLG1 * gteIR1) + (gteLG2 * gteIR2) + (gteLG3 * gteIR3)) >> 12);
+	gteMAC3 = A3((((s64)gteBBK << 12) + (gteLB1 * gteIR1) + (gteLB2 * gteIR2) + (gteLB3 * gteIR3)) >> 12);
+	gteIR1 = limB1(gteMAC1, 1);
+	gteIR2 = limB2(gteMAC2, 1);
+	gteIR3 = limB3(gteMAC3, 1);
+	gteMAC1 = A1(((((s64)gteR << 4) * gteIR1) + (gteIR0 * limB1(gteRFC - ((gteR * gteIR1) >> 8), 0))) >> 12);
+	gteMAC2 = A2(((((s64)gteG << 4) * gteIR2) + (gteIR0 * limB2(gteGFC - ((gteG * gteIR2) >> 8), 0))) >> 12);
+	gteMAC3 = A3(((((s64)gteB << 4) * gteIR3) + (gteIR0 * limB3(gteBFC - ((gteB * gteIR3) >> 8), 0))) >> 12);
+	gteIR1 = limB1(gteMAC1, 1);
+	gteIR2 = limB2(gteMAC2, 1);
+	gteIR3 = limB3(gteMAC3, 1);
+
+	gteRGB0 = gteRGB1;
+	gteRGB1 = gteRGB2;
+	gteCODE2 = gteCODE;
+	gteR2 = limC1(gteMAC1 >> 4);
+	gteG2 = limC2(gteMAC2 >> 4);
+	gteB2 = limC3(gteMAC3 >> 4);
+}
+
+void gteNCDT() {
+	int v;
+	s32 vx, vy, vz;
+
+#ifdef GTE_LOG
+	GTE_LOG("GTE NCDT\n");
+#endif
+	gteFLAG = 0;
+
+	for (v = 0; v < 3; v++) {
+		vx = VX(v);
+		vy = VY(v);
+		vz = VZ(v);
+		gteMAC1 = A1((((s64)gteL11 * vx) + (gteL12 * vy) + (gteL13 * vz)) >> 12);
+		gteMAC2 = A2((((s64)gteL21 * vx) + (gteL22 * vy) + (gteL23 * vz)) >> 12);
+		gteMAC3 = A3((((s64)gteL31 * vx) + (gteL32 * vy) + (gteL33 * vz)) >> 12);
+		gteIR1 = limB1(gteMAC1, 1);
+		gteIR2 = limB2(gteMAC2, 1);
+		gteIR3 = limB3(gteMAC3, 1);
+		gteMAC1 = A1((((s64)gteRBK << 12) + (gteLR1 * gteIR1) + (gteLR2 * gteIR2) + (gteLR3 * gteIR3)) >> 12);
+		gteMAC2 = A2((((s64)gteGBK << 12) + (gteLG1 * gteIR1) + (gteLG2 * gteIR2) + (gteLG3 * gteIR3)) >> 12);
+		gteMAC3 = A3((((s64)gteBBK << 12) + (gteLB1 * gteIR1) + (gteLB2 * gteIR2) + (gteLB3 * gteIR3)) >> 12);
+		gteIR1 = limB1(gteMAC1, 1);
+		gteIR2 = limB2(gteMAC2, 1);
+		gteIR3 = limB3(gteMAC3, 1);
+		gteMAC1 = A1(((((s64)gteR << 4) * gteIR1) + (gteIR0 * limB1(gteRFC - ((gteR * gteIR1) >> 8), 0))) >> 12);
+		gteMAC2 = A2(((((s64)gteG << 4) * gteIR2) + (gteIR0 * limB2(gteGFC - ((gteG * gteIR2) >> 8), 0))) >> 12);
+		gteMAC3 = A3(((((s64)gteB << 4) * gteIR3) + (gteIR0 * limB3(gteBFC - ((gteB * gteIR3) >> 8), 0))) >> 12);
+
+		gteRGB0 = gteRGB1;
+		gteRGB1 = gteRGB2;
+		gteCODE2 = gteCODE;
+		gteR2 = limC1(gteMAC1 >> 4);
+		gteG2 = limC2(gteMAC2 >> 4);
+		gteB2 = limC3(gteMAC3 >> 4);
+	}
+	gteIR1 = limB1(gteMAC1, 1);
+	gteIR2 = limB2(gteMAC2, 1);
+	gteIR3 = limB3(gteMAC3, 1);
+}
+
+void gteOP() {
+	int shift = 12 * GTE_SF(gteop);
+	int lm = GTE_LM(gteop);
+
+#ifdef GTE_LOG
+	GTE_LOG("GTE OP\n");
+#endif
+	gteFLAG = 0;
+
+	gteMAC1 = A1(((s64)(gteR22 * gteIR3) - (gteR33 * gteIR2)) >> shift);
+	gteMAC2 = A2(((s64)(gteR33 * gteIR1) - (gteR11 * gteIR3)) >> shift);
+	gteMAC3 = A3(((s64)(gteR11 * gteIR2) - (gteR22 * gteIR1)) >> shift);
+	gteIR1 = limB1(gteMAC1, lm);
+	gteIR2 = limB2(gteMAC2, lm);
+	gteIR3 = limB3(gteMAC3, lm);
+}
+
+void gteDCPL() {
+	int lm = GTE_LM(gteop);
+
+	s64 RIR1 = ((s64)gteR * gteIR1) >> 8;
+	s64 GIR2 = ((s64)gteG * gteIR2) >> 8;
+	s64 BIR3 = ((s64)gteB * gteIR3) >> 8;
+
+#ifdef GTE_LOG
+	GTE_LOG("GTE DCPL\n");
+#endif
+	gteFLAG = 0;
+
+	gteMAC1 = A1(RIR1 + ((gteIR0 * limB1(gteRFC - RIR1, 0)) >> 12));
+	gteMAC2 = A2(GIR2 + ((gteIR0 * limB1(gteGFC - GIR2, 0)) >> 12));
+	gteMAC3 = A3(BIR3 + ((gteIR0 * limB1(gteBFC - BIR3, 0)) >> 12));
+
+	gteIR1 = limB1(gteMAC1, lm);
+	gteIR2 = limB2(gteMAC2, lm);
+	gteIR3 = limB3(gteMAC3, lm);
+
+	gteRGB0 = gteRGB1;
+	gteRGB1 = gteRGB2;
+	gteCODE2 = gteCODE;
+	gteR2 = limC1(gteMAC1 >> 4);
+	gteG2 = limC2(gteMAC2 >> 4);
+	gteB2 = limC3(gteMAC3 >> 4);
+}
+
+void gteGPF() {
+	int shift = 12 * GTE_SF(gteop);
+
+#ifdef GTE_LOG
+	GTE_LOG("GTE GPF\n");
+#endif
+	gteFLAG = 0;
+
+	gteMAC1 = A1(((s64)gteIR0 * gteIR1) >> shift);
+	gteMAC2 = A2(((s64)gteIR0 * gteIR2) >> shift);
+	gteMAC3 = A3(((s64)gteIR0 * gteIR3) >> shift);
+	gteIR1 = limB1(gteMAC1, 0);
+	gteIR2 = limB2(gteMAC2, 0);
+	gteIR3 = limB3(gteMAC3, 0);
+
+	gteRGB0 = gteRGB1;
+	gteRGB1 = gteRGB2;
+	gteCODE2 = gteCODE;
+	gteR2 = limC1(gteMAC1 >> 4);
+	gteG2 = limC2(gteMAC2 >> 4);
+	gteB2 = limC3(gteMAC3 >> 4);
+}
+
+void gteGPL() {
+	int shift = 12 * GTE_SF(gteop);
+
+#ifdef GTE_LOG
+	GTE_LOG("GTE GPL\n");
+#endif
+	gteFLAG = 0;
+
+	gteMAC1 = A1((((s64)gteMAC1 << shift) + (gteIR0 * gteIR1)) >> shift);
+	gteMAC2 = A2((((s64)gteMAC2 << shift) + (gteIR0 * gteIR2)) >> shift);
+	gteMAC3 = A3((((s64)gteMAC3 << shift) + (gteIR0 * gteIR3)) >> shift);
+	gteIR1 = limB1(gteMAC1, 0);
+	gteIR2 = limB2(gteMAC2, 0);
+	gteIR3 = limB3(gteMAC3, 0);
+
+	gteRGB0 = gteRGB1;
+	gteRGB1 = gteRGB2;
+	gteCODE2 = gteCODE;
+	gteR2 = limC1(gteMAC1 >> 4);
+	gteG2 = limC2(gteMAC2 >> 4);
+	gteB2 = limC3(gteMAC3 >> 4);
+}
+
+void gteDPCS() {
+	int shift = 12 * GTE_SF(gteop);
+
+#ifdef GTE_LOG
+	GTE_LOG("GTE DPCS\n");
+#endif
+	gteFLAG = 0;
+
+	gteMAC1 = A1(((gteR << 16) + (gteIR0 * limB1(A1((s64)gteRFC - (gteR << 4)) << (12 - shift), 0))) >> 12);
+	gteMAC2 = A2(((gteG << 16) + (gteIR0 * limB2(A2((s64)gteGFC - (gteG << 4)) << (12 - shift), 0))) >> 12);
+	gteMAC3 = A3(((gteB << 16) + (gteIR0 * limB3(A3((s64)gteBFC - (gteB << 4)) << (12 - shift), 0))) >> 12);
+
+	gteIR1 = limB1(gteMAC1, 0);
+	gteIR2 = limB2(gteMAC2, 0);
+	gteIR3 = limB3(gteMAC3, 0);
+	gteRGB0 = gteRGB1;
+	gteRGB1 = gteRGB2;
+	gteCODE2 = gteCODE;
+	gteR2 = limC1(gteMAC1 >> 4);
+	gteG2 = limC2(gteMAC2 >> 4);
+	gteB2 = limC3(gteMAC3 >> 4);
+}
+
+void gteDPCT() {
+	int v;
+
+#ifdef GTE_LOG
+	GTE_LOG("GTE DPCT\n");
+#endif
+	gteFLAG = 0;
+
+	for (v = 0; v < 3; v++) {
+		gteMAC1 = A1((((s64)gteR0 << 16) + ((s64)gteIR0 * (limB1(gteRFC - (gteR0 << 4), 0)))) >> 12);
+		gteMAC2 = A2((((s64)gteG0 << 16) + ((s64)gteIR0 * (limB1(gteGFC - (gteG0 << 4), 0)))) >> 12);
+		gteMAC3 = A3((((s64)gteB0 << 16) + ((s64)gteIR0 * (limB1(gteBFC - (gteB0 << 4), 0)))) >> 12);
+
+		gteRGB0 = gteRGB1;
+		gteRGB1 = gteRGB2;
+		gteCODE2 = gteCODE;
+		gteR2 = limC1(gteMAC1 >> 4);
+		gteG2 = limC2(gteMAC2 >> 4);
+		gteB2 = limC3(gteMAC3 >> 4);
+	}
+	gteIR1 = limB1(gteMAC1, 0);
+	gteIR2 = limB2(gteMAC2, 0);
+	gteIR3 = limB3(gteMAC3, 0);
+}
+
+void gteNCS() {
+#ifdef GTE_LOG
+	GTE_LOG("GTE NCS\n");
+#endif
+	gteFLAG = 0;
+
+	gteMAC1 = A1((((s64)gteL11 * gteVX0) + (gteL12 * gteVY0) + (gteL13 * gteVZ0)) >> 12);
+	gteMAC2 = A2((((s64)gteL21 * gteVX0) + (gteL22 * gteVY0) + (gteL23 * gteVZ0)) >> 12);
+	gteMAC3 = A3((((s64)gteL31 * gteVX0) + (gteL32 * gteVY0) + (gteL33 * gteVZ0)) >> 12);
+	gteIR1 = limB1(gteMAC1, 1);
+	gteIR2 = limB2(gteMAC2, 1);
+	gteIR3 = limB3(gteMAC3, 1);
+	gteMAC1 = A1((((s64)gteRBK << 12) + (gteLR1 * gteIR1) + (gteLR2 * gteIR2) + (gteLR3 * gteIR3)) >> 12);
+	gteMAC2 = A2((((s64)gteGBK << 12) + (gteLG1 * gteIR1) + (gteLG2 * gteIR2) + (gteLG3 * gteIR3)) >> 12);
+	gteMAC3 = A3((((s64)gteBBK << 12) + (gteLB1 * gteIR1) + (gteLB2 * gteIR2) + (gteLB3 * gteIR3)) >> 12);
+	gteIR1 = limB1(gteMAC1, 1);
+	gteIR2 = limB2(gteMAC2, 1);
+	gteIR3 = limB3(gteMAC3, 1);
+
+	gteRGB0 = gteRGB1;
+	gteRGB1 = gteRGB2;
+	gteCODE2 = gteCODE;
+	gteR2 = limC1(gteMAC1 >> 4);
+	gteG2 = limC2(gteMAC2 >> 4);
+	gteB2 = limC3(gteMAC3 >> 4);
+}
+
+void gteNCT() {
+	int v;
+	s32 vx, vy, vz;
+
+#ifdef GTE_LOG
+	GTE_LOG("GTE NCT\n");
+#endif
+	gteFLAG = 0;
+
+	for (v = 0; v < 3; v++) {
+		vx = VX(v);
+		vy = VY(v);
+		vz = VZ(v);
+		gteMAC1 = A1((((s64)gteL11 * vx) + (gteL12 * vy) + (gteL13 * vz)) >> 12);
+		gteMAC2 = A2((((s64)gteL21 * vx) + (gteL22 * vy) + (gteL23 * vz)) >> 12);
+		gteMAC3 = A3((((s64)gteL31 * vx) + (gteL32 * vy) + (gteL33 * vz)) >> 12);
+		gteIR1 = limB1(gteMAC1, 1);
+		gteIR2 = limB2(gteMAC2, 1);
+		gteIR3 = limB3(gteMAC3, 1);
+		gteMAC1 = A1((((s64)gteRBK << 12) + (gteLR1 * gteIR1) + (gteLR2 * gteIR2) + (gteLR3 * gteIR3)) >> 12);
+		gteMAC2 = A2((((s64)gteGBK << 12) + (gteLG1 * gteIR1) + (gteLG2 * gteIR2) + (gteLG3 * gteIR3)) >> 12);
+		gteMAC3 = A3((((s64)gteBBK << 12) + (gteLB1 * gteIR1) + (gteLB2 * gteIR2) + (gteLB3 * gteIR3)) >> 12);
+		gteRGB0 = gteRGB1;
+		gteRGB1 = gteRGB2;
+		gteCODE2 = gteCODE;
+		gteR2 = limC1(gteMAC1 >> 4);
+		gteG2 = limC2(gteMAC2 >> 4);
+		gteB2 = limC3(gteMAC3 >> 4);
+	}
+	gteIR1 = limB1(gteMAC1, 1);
+	gteIR2 = limB2(gteMAC2, 1);
+	gteIR3 = limB3(gteMAC3, 1);
+}
+
+void gteCC() {
+#ifdef GTE_LOG
+	GTE_LOG("GTE CC\n");
+#endif
+	gteFLAG = 0;
+
+	gteMAC1 = A1((((s64)gteRBK << 12) + (gteLR1 * gteIR1) + (gteLR2 * gteIR2) + (gteLR3 * gteIR3)) >> 12);
+	gteMAC2 = A2((((s64)gteGBK << 12) + (gteLG1 * gteIR1) + (gteLG2 * gteIR2) + (gteLG3 * gteIR3)) >> 12);
+	gteMAC3 = A3((((s64)gteBBK << 12) + (gteLB1 * gteIR1) + (gteLB2 * gteIR2) + (gteLB3 * gteIR3)) >> 12);
+	gteIR1 = limB1(gteMAC1, 1);
+	gteIR2 = limB2(gteMAC2, 1);
+	gteIR3 = limB3(gteMAC3, 1);
+	gteMAC1 = A1(((s64)gteR * gteIR1) >> 8);
+	gteMAC2 = A2(((s64)gteG * gteIR2) >> 8);
+	gteMAC3 = A3(((s64)gteB * gteIR3) >> 8);
+	gteIR1 = limB1(gteMAC1, 1);
+	gteIR2 = limB2(gteMAC2, 1);
+	gteIR3 = limB3(gteMAC3, 1);
+
+	gteRGB0 = gteRGB1;
+	gteRGB1 = gteRGB2;
+	gteCODE2 = gteCODE;
+	gteR2 = limC1(gteMAC1 >> 4);
+	gteG2 = limC2(gteMAC2 >> 4);
+	gteB2 = limC3(gteMAC3 >> 4);
+}
+
+void gteINTPL() {
+	int shift = 12 * GTE_SF(gteop);
+	int lm = GTE_LM(gteop);
+
+#ifdef GTE_LOG
+	GTE_LOG("GTE INTPL\n");
+#endif
+	gteFLAG = 0;
+
+	gteMAC1 = A1(((gteIR1 << 12) + (gteIR0 * limB1(((s64)gteRFC - gteIR1), 0))) >> shift);
+	gteMAC2 = A2(((gteIR2 << 12) + (gteIR0 * limB2(((s64)gteGFC - gteIR2), 0))) >> shift);
+	gteMAC3 = A3(((gteIR3 << 12) + (gteIR0 * limB3(((s64)gteBFC - gteIR3), 0))) >> shift);
+	gteIR1 = limB1(gteMAC1, lm);
+	gteIR2 = limB2(gteMAC2, lm);
+	gteIR3 = limB3(gteMAC3, lm);
+	gteRGB0 = gteRGB1;
+	gteRGB1 = gteRGB2;
+	gteCODE2 = gteCODE;
+	gteR2 = limC1(gteMAC1 >> 4);
+	gteG2 = limC2(gteMAC2 >> 4);
+	gteB2 = limC3(gteMAC3 >> 4);
+}
+
+void gteCDP() {
+#ifdef GTE_LOG
+	GTE_LOG("GTE CDP\n");
+#endif
+	gteFLAG = 0;
+
+	gteMAC1 = A1((((s64)gteRBK << 12) + (gteLR1 * gteIR1) + (gteLR2 * gteIR2) + (gteLR3 * gteIR3)) >> 12);
+	gteMAC2 = A2((((s64)gteGBK << 12) + (gteLG1 * gteIR1) + (gteLG2 * gteIR2) + (gteLG3 * gteIR3)) >> 12);
+	gteMAC3 = A3((((s64)gteBBK << 12) + (gteLB1 * gteIR1) + (gteLB2 * gteIR2) + (gteLB3 * gteIR3)) >> 12);
+	gteIR1 = limB1(gteMAC1, 1);
+	gteIR2 = limB2(gteMAC2, 1);
+	gteIR3 = limB3(gteMAC3, 1);
+	gteMAC1 = A1(((((s64)gteR << 4) * gteIR1) + (gteIR0 * limB1(gteRFC - ((gteR * gteIR1) >> 8), 0))) >> 12);
+	gteMAC2 = A2(((((s64)gteG << 4) * gteIR2) + (gteIR0 * limB2(gteGFC - ((gteG * gteIR2) >> 8), 0))) >> 12);
+	gteMAC3 = A3(((((s64)gteB << 4) * gteIR3) + (gteIR0 * limB3(gteBFC - ((gteB * gteIR3) >> 8), 0))) >> 12);
+	gteIR1 = limB1(gteMAC1, 1);
+	gteIR2 = limB2(gteMAC2, 1);
+	gteIR3 = limB3(gteMAC3, 1);
+
+	gteRGB0 = gteRGB1;
+	gteRGB1 = gteRGB2;
+	gteCODE2 = gteCODE;
+	gteR2 = limC1(gteMAC1 >> 4);
+	gteG2 = limC2(gteMAC2 >> 4);
+	gteB2 = limC3(gteMAC3 >> 4);
+}
diff --git a/libpcsxcore/gte.h b/libpcsxcore/gte.h
new file mode 100644
index 0000000..2cea026
--- /dev/null
+++ b/libpcsxcore/gte.h
@@ -0,0 +1,65 @@
+/***************************************************************************
+ *   PCSX-Revolution - PlayStation Emulator for Nintendo Wii               *
+ *   Copyright (C) 2009-2010  PCSX-Revolution Dev Team                     *
+ *   <http://code.google.com/p/pcsx-revolution/>                           *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+#ifndef __GTE_H__
+#define __GTE_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "psxcommon.h"
+#include "r3000a.h"
+
+void gteMFC2();
+void gteCFC2();
+void gteMTC2();
+void gteCTC2();
+void gteLWC2();
+void gteSWC2();
+
+void gteRTPS();
+void gteOP();
+void gteNCLIP();
+void gteDPCS();
+void gteINTPL();
+void gteMVMVA();
+void gteNCDS();
+void gteNCDT();
+void gteCDP();
+void gteNCCS();
+void gteCC();
+void gteNCS();
+void gteNCT();
+void gteSQR();
+void gteDCPL();
+void gteDPCT();
+void gteAVSZ3();
+void gteAVSZ4();
+void gteRTPT();
+void gteGPF();
+void gteGPL();
+void gteNCCT();
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/libpcsxcore/gte_divider.h b/libpcsxcore/gte_divider.h
new file mode 100644
index 0000000..ae32db0
--- /dev/null
+++ b/libpcsxcore/gte_divider.h
@@ -0,0 +1,4133 @@
+// GTE Divider by shalma
+// http://forums.ngemu.com/1844192-post72.html
+
+static u16 initial_guess[32768] = {
+	0x0000, 0xFE93, 0xFE91, 0xFE8F, 0xFE8D, 0xFE8B, 0xFE89, 0xFE87,
+	0xFE85, 0xFE83, 0xFE81, 0xFE7F, 0xFE7D, 0xFE7B, 0xFE79, 0xFE77,
+	0xFE75, 0xFE71, 0xFE6F, 0xFE6D, 0xFE6B, 0xFE69, 0xFE67, 0xFE65,
+	0xFE63, 0xFE61, 0xFE5D, 0xFE5B, 0xFE59, 0xFE57, 0xFE55, 0xFE53,
+	0xFE4F, 0xFE4D, 0xFE4B, 0xFE49, 0xFE47, 0xFE45, 0xFE41, 0xFE3F,
+	0xFE3D, 0xFE3B, 0xFE37, 0xFE35, 0xFE33, 0xFE31, 0xFE2F, 0xFE2B,
+	0xFE29, 0xFE27, 0xFE25, 0xFE21, 0xFE1F, 0xFE1D, 0xFE19, 0xFE17,
+	0xFE15, 0xFE13, 0xFE0F, 0xFE0D, 0xFE0B, 0xFE07, 0xFE05, 0xFE03,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFDB6, 0xFDB2, 0xFDB0, 0xFDAC, 0xFDAA,
+	0xFDA6, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xEB72, 0xEB70, 0xEB6E,
+	0xEB86, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xEBDF, 0xEBF9,
+	0xEBF7, 0xEBF5, 0xE64A, 0xE65C, 0xE65A, 0xE66E, 0xE66C, 0xE65F,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xEC3E, 0xEC3C, 0xEC56, 0xE6B7, 0xE6C9,
+	0xE6C7, 0xE6BA, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFF43, 0xEC94,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFF0E, 0xED15, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFE36,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFF44,
+	0xFD16, 0xE877, 0xE868, 0xE4DC, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFF5A, 0xFDBB, 0xED6C, 0xE891, 0xE528,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFED2, 0xFD10, 0xED52, 0xE8AA, 0xE554,
+	0xE28E, 0xE28C, 0xE040, 0xFFFE, 0xFF5C, 0xFDF1, 0xFBB1, 0xE8BC,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFF6E, 0xFE0A, 0xFC57,
+	0xE8C1, 0xE558, 0xE556, 0xE2A0, 0xE2B2, 0xE060, 0xDE5E, 0xFE56,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFF78, 0xFE4E, 0xFCDC, 0xED27, 0xE57A, 0xE56D, 0xE2C3, 0xE086,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFF04, 0xFDCB, 0xFC53, 0xED0A, 0xE57F, 0xE2D8, 0xE09E,
+	0xFFFF, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFF37, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFF88,
+	0xFE9A, 0xFD43, 0xFBD6, 0xECBE, 0xE574, 0xE2EF, 0xE0B1, 0xDED1,
+	0xFFFF, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFF86, 0xFE6F, 0xFD54,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFF8E, 0xFEAC, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFC5, 0xFEBB, 0xFDA6, 0xFC62, 0xFACC,
+	0xE885, 0xE2E9, 0xFF90, 0xFEB4, 0xFDA3, 0xFC59, 0xFAA5, 0xE867,
+	0xE561, 0xE0C5, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFF12,
+	0xFE21, 0xFCEC, 0xFBA5, 0xF9CA, 0xFFFF, 0xFF96, 0xFEC2, 0xFDBD,
+	0xFC83, 0xFB14, 0xF90C, 0xE551, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFF5B, 0xFE66, 0xFD69, 0xFC39, 0xFAD6, 0xF8DC, 0xFF67,
+	0xFE9D, 0xFDA2, 0xFCCE, 0xFB79, 0xF9E9, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xE80C, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFF9A, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFF71, 0xE519, 0xE0A5, 0xFFFE, 0xFFFE, 0xFFFE, 0xFF6B, 0xE4FF,
+	0xE0A1, 0xFFFF, 0xFFFF, 0xFFFF, 0xFF46, 0xE50A, 0xE0A8, 0xDED3,
+	0xDD3C, 0xDBAB, 0xDA53, 0xFFFF, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFF71, 0xFE96, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFFD3, 0xFF1F, 0xFE5B, 0xE293, 0xDEC3, 0xDD2C,
+	0xFFFF, 0xFFFF, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFA4, 0xFEDA, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFD2, 0xFF25, 0xFE6D, 0xE787, 0xE08E, 0xDEC7, 0xFFFF, 0xFFFF,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFF79, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFF7F, 0xFED7,
+	0xFE03, 0xE75E, 0xE276, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFF7D, 0xFEBB,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFF83, 0xFEDF, 0xFE17, 0xFD52, 0xE49F,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFD5, 0xFF25, 0xFE6C, 0xFDAC, 0xFFFF, 0xFFAE,
+	0xFF0E, 0xFE60, 0xFDA7, 0xFCDE, 0xE235, 0xDE95, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFAE, 0xE039, 0xFFFF, 0xFFFF, 0xFFFF, 0xFF8B, 0xE023, 0xDCE3,
+	0xDB7C, 0xDA35, 0xD7CD, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFD9, 0xFF35, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFB4, 0xFF1C, 0xE009, 0xDCE2, 0xDA2B, 0xFFFF, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFD9, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFF8F, 0xFEFB, 0xE1D1, 0xDE4C, 0xFFFF,
+	0xFFFF, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFF8D, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFB6, 0xFF26, 0xFE92,
+	0xE1C4, 0xDE3B, 0xFFFF, 0xFFFF, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFF91, 0xFEEF, 0xFFFF, 0xFFFF, 0xFFB8,
+	0xFF2A, 0xFE9C, 0xFDE9, 0xDFC1, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFE,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xE177, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFB8, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xE177,
+	0xDC8A, 0xD9DF, 0xFFFF, 0xFF99, 0xDF9C, 0xDB26, 0xD89E, 0xD792,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFF74, 0xDF88, 0xDB09, 0xFFFF, 0xFF7A, 0xE142, 0xDC6B, 0xD9CE,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFBC, 0xFF2E, 0xE12E, 0xFFFF, 0xFFBE, 0xFF3A, 0xFEB6, 0xDDC0,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFF78, 0xFEE8, 0xFE59, 0xFFFF, 0xFF7E, 0xFEFC, 0xFE74,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFC0, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFE0, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFC2, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFE0, 0xFF67, 0xDEDF, 0xFFFE, 0xFFE1,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFF, 0xFFFF,
+	0xFF21, 0xDEAE, 0xDA80, 0xFF86, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFFA5, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFA3, 0xFF23,
+	0xFE9B, 0xDD12, 0xFF6B, 0xFFE2, 0xFFC4, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFC3, 0xDA41, 0xFF8A, 0xFF8A, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFF8C,
+	0xDA41, 0xFFFF, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFC5, 0xFF54, 0xDB71,
+	0xFFFF, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFA9, 0xFFFF, 0xFFFF, 0xFFC5, 0xFF56, 0xFEE6, 0xDB56, 0xD6AF,
+	0xFFFF, 0xFFFE, 0xFFFE, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xD9FB, 0xD6A4, 0xFFFE,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFC7,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xDB1B, 0xD794, 0xD49C, 0xFFFE, 0xFFFE,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFAD, 0xDB12, 0xD68B,
+	0xFFE3, 0xFF73, 0xD893, 0xD573, 0xD3AC, 0xFFFE, 0xFFFE, 0xFFC8,
+	0xFF58, 0xD9C0, 0xFFE5, 0xFF79, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFE5, 0xFF75, 0xFF01, 0xD9A7,
+	0xFF94, 0xFFFF, 0xFFE4, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xD98E, 0xFFFE, 0xFFB1,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFFCB, 0xD843, 0xFF62, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFB0,
+	0xFF4B, 0xD719, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFB3, 0xFF4D, 0xD93E, 0xFFFF,
+	0xFFFE, 0xFFFE, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xD5FB, 0xFFFE, 0xFFB3, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFE5, 0xD6E4, 0xFFFE, 0xFFFE, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFF9C, 0xFFFE, 0xFFFE, 0xFFB3, 0xD7C7, 0xD3F1,
+	0xFFFE, 0xFFFE, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFB4, 0xFF53,
+	0xD6A8, 0xFFCE, 0xFF68, 0xD7B0, 0xD4C5, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xD5AF, 0xD2FC, 0xFFCD, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFE6, 0xD591,
+	0xFFFF, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFFE6, 0xFF87, 0xFFFF, 0xFFFF, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFE7, 0xFFFF, 0xFFFF, 0xFFCF, 0xFF70,
+	0xFFFF, 0xFFFF, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFCF, 0xFFFE, 0xFFFE, 0xFFD0,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFF8B, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFE8, 0xFFFE, 0xFFFE, 0xFFE7, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFBB, 0xFFFE, 0xFFFE,
+	0xFFB9, 0xFFFE, 0xFFFE, 0xFFFF, 0xFFFF, 0xFFE8, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFF, 0xFFFF, 0xFFBB, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xD406,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFBB, 0xD3F1, 0xFFE8, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFF8D, 0xD3DC, 0xFFD3, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFE,
+	0xFFFE, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xD217, 0xFFFF, 0xFFBC,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFD4, 0xD202, 0xFF7C, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFD3, 0xFF7C, 0xFFFF, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFBF, 0xFF67,
+	0xFFEA, 0xFFFE, 0xFFE9, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFA8, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFF, 0xFFEA, 0xFFEA, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFF, 0xFFFF, 0xFFBF, 0xFFBF, 0xFFFF, 0xFFFF,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFF, 0xFF80,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFD6, 0xFFFF, 0xFFEA, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFE,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFE, 0xFFC0, 0xFFFE,
+	0xFFFF, 0xFFFF, 0xCFC0, 0xFFFF, 0xFFFF, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFF, 0xFFFF, 0xFFD7, 0xFFFF, 0xFFFF, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFC1, 0xFFFF, 0xFFD7, 0xFF86,
+	0xFFFF, 0xFFFF, 0xFFFE, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFC2, 0xFFFE, 0xFFFE, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFFFE, 0xFFFE, 0xFF88, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFEC, 0xFFFE, 0xFE99, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFF, 0xFFEC, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFDB0, 0xFFD8, 0xFFD8, 0xFFFF, 0xFFFF, 0xFFC5, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFF, 0xFEEE, 0xFF9B, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFEB, 0xFFFE, 0xFF60, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFEB,
+	0xFE78, 0xFFC4, 0xFFC4, 0xFFFE, 0xFFFE, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFB2, 0xFFFF, 0xFF9F, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFF, 0xFFFF, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFDA, 0xFFDA,
+	0xFFFF, 0xFFFF, 0xCB8D, 0xFFFF, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFF, 0xFFFF, 0xFFEC, 0xFFFF, 0xFFFF, 0xFFFE, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFED, 0xFFFF, 0xFFFF, 0xFFB3, 0xFFFF, 0xFFFF,
+	0xFFFE, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFE, 0xFFFE, 0xFFC6,
+	0xFFFE, 0xFFFE, 0xFFC7, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFE,
+	0xFFFE, 0xFF90, 0xFFFE, 0xFFFE, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFFE, 0xFE23, 0xFFFE, 0xFFFE, 0xFFFF, 0xFFEC, 0xFFEC,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFF, 0xFE90, 0xFFC7, 0xFFFF, 0xFFFF,
+	0xFFB5, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFAE1, 0xFE5B, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFED, 0xFC33,
+	0xFECB, 0xFFEC, 0xFFEC, 0xFFFE, 0xFFED, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFC9, 0xFCAF, 0xFF20, 0xFFB7, 0xFFFE, 0xFFFE, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFF92, 0xFD1F, 0xFF81, 0xFFFE, 0xFFFE, 0xFFFE,
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFECF, 0xFFEE, 0xFD8F, 0xFFED, 0xFFED,
+	0xFFFF, 0xFFFF, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFB7, 0xFFB7, 0xFE8B,
+	0xFFB8, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFE, 0xFFFE, 0xFDD3, 0xFF83,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFF, 0xFD12, 0xFFEE, 0xFFEE,
+	0xFFFE, 0xFFDC, 0xFFDC, 0xFFFF, 0xFFFF, 0xFFFE, 0xFB9A, 0xFE14,
+	0xFFB9, 0xFFFE, 0xFFB8, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xF893,
+	0xFD47, 0xFF85, 0xFFFE, 0xFFFE, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFED7, 0xFB40, 0xFE43, 0xFFDC, 0xFFDC, 0xFFFF, 0xFFCA, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFB9, 0xFCE4, 0xFF1F, 0xFFFF, 0xFFFF, 0xFF98,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFF87, 0xFB81, 0xFE64, 0xFFFF, 0xFFEE,
+	0xFFFE, 0xFFED, 0xFFFF, 0xFFFF, 0xFECF, 0xFFDC, 0xFDA9, 0xFFCC,
+	0xFFCC, 0xFFFE, 0xFFFE, 0xFFFF, 0xFFFF, 0xFD89, 0xFFA9, 0xFFFF,
+	0xFF1B, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFF, 0xFFFF, 0xFCCA, 0xFEF0,
+	0xFFEE, 0xFE62, 0xFFEF, 0xFFEF, 0xFFFF, 0xFFFF, 0xFFFE, 0xFC04,
+	0xFEBF, 0xFFBC, 0xFFFE, 0xFFBC, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFB35, 0xFE06, 0xFF89, 0xFFFE, 0xFFFE, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFFF, 0xFDE2, 0xFFDE, 0xFFDE, 0xFFFF, 0xFFCC, 0xFFFE,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFDAB, 0xFF38, 0xFFFF, 0xFFFF, 0xFFFF,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFFFE, 0xFF89, 0xFFEE, 0xFFEE,
+	0xFBC5, 0xFDDF, 0xFFDD, 0xFFDD, 0xFFDE, 0xFFDE, 0xFFFF, 0xFFFF,
+	0xFFFE, 0xFB91, 0xFE43, 0xFFAD, 0xFFFE, 0xFFAD, 0xFFFF, 0xFFFF,
+	0xFFFF, 0xFFFE, 0xFB5E, 0xFE14, 0xFFFE, 0xFFFE, 0xFFEE, 0xFFDF,
+	0xFFFE, 0xFFFE, 0xFEE9, 0xFBCC, 0xFE61, 0xFFCD, 0xFFFF, 0xFFBD,
+	0xFFFE, 0xFFFE, 0xFFFE, 0xFF36, 0xFC22, 0xFE2C, 0xFFFF, 0xFFFF,
+	0xFF8D, 0xFFFE, 0xFFFE, 0xFC85, 0xFF05, 0xFBF6, 0xFE7C, 0xFFDF,
+	0xFFDF, 0xFFDE, 0xFFCF, 0xFFFF, 0xFCDA, 0xFED2, 0xFC4B, 0xFECD,
+	0xFFAF, 0xFFFE, 0xFFAD, 0xFFFF, 0xFA8D, 0xFDB0, 0xFF8D, 0xFD2B,
+	0xFE9E, 0xFFEF, 0xFFEF, 0xFFE0, 0xFFE0, 0xFAE5, 0xFE00, 0xFFCE,
+	0xFD7C, 0xFFCF, 0xFFCF, 0xFFFF, 0xFFAE, 0xF7CC, 0xFBD1, 0xFE42,
+	0xFFA0, 0xFDCB, 0xFF9E, 0xFFFF, 0xFFFF, 0xFFFE, 0xF8E6, 0xFCAB,
+	0xFF0B, 0xFFE0, 0xFE84, 0xFFD0, 0xFFD0, 0xFFFE, 0xFD79, 0xFA65,
+	0xFCFE, 0xFF42, 0xFFFF, 0xFEC4, 0xFFFE, 0xFFFE, 0xFFFE, 0xFE48,
+	0xFBD4, 0xFDC0, 0xFFF0, 0xFFF0, 0xFF73, 0xFFEF, 0xFFFF, 0xFD2C,
+	0xFEFC, 0xFCA3, 0xFE79, 0xFFC1, 0xFFFE, 0xFFC0, 0xFFFF, 0xFFFF,
+	0xFDE8, 0xFFB1, 0xFD61, 0xFF2F, 0xFFFE, 0xFFFE, 0xFFF0, 0xFFF0,
+	0xFFEF, 0xFFEF, 0xFFDF, 0xFFDF, 0xFBC2, 0xFE0F, 0xFFC2, 0xFDA3,
+	0xFF55, 0xFFFF, 0xFFFF, 0xFFFE, 0xFA18, 0xFD0B, 0xFECA, 0xFC82,
+	0xFEBE, 0xFFFF, 0xFFF0, 0xFFEF, 0xF8D5, 0xFB70, 0xFDC7, 0xFFE0,
+	0xFD3E, 0xFFD0, 0xFFD0, 0xFFFE, 0xF6F7, 0xFA42, 0xFCA7, 0xFEE2,
+	0xFCA8, 0xFE63, 0xFFFE, 0xFFFE, 0xFC97, 0xF87E, 0xFC0C, 0xFE4C,
+	0xFF84, 0xFDCB, 0xFF77, 0xFFE0, 0xFAFC, 0xF7CE, 0xFAF5, 0xFD35,
+	0xFEEE, 0xFCC4, 0xFEE4, 0xFFFF, 0xFA52, 0xFC36, 0xF9BD, 0xFC2A,
+	0xFE58, 0xFFFE, 0xFE50, 0xFFE1, 0xF8A1, 0xFB95, 0xF894, 0xFB8D,
+	0xFDC2, 0xFF68, 0xFDB8, 0xFEF0, 0xF7E3, 0xFAF2, 0xFCC5, 0xFA76,
+	0xFCBB, 0xFED7, 0xFFFF, 0xFE5C, 0xF60E, 0xF9D9, 0xFC25, 0xF9CE,
+	0xFC24, 0xFE45, 0xFFD3, 0xFE40, 0xF546, 0xF92D, 0xFB88, 0xFDB9,
+	0xFB85, 0xFDAD, 0xFFA6, 0xFFFE, 0xF32E, 0xF881, 0xFB69, 0xFD21,
+	0xFAE6, 0xFD81, 0xFF1B, 0xFFE2, 0xFAD5, 0xF7C7, 0xFACA, 0xFCEE,
+	0xFF03, 0xFCEF, 0xFE8B, 0xFFFF, 0xFA2D, 0xF7B2, 0xFA2B, 0xFCD5,
+	0xFE71, 0xFC50, 0xFECE, 0xFFE1, 0xF98C, 0xFC43, 0xF983, 0xFC3B,
+	0xFE46, 0xFFD3, 0xFE3E, 0xFFB6, 0xF9DF, 0xFBA6, 0xF9DF, 0xFC0D,
+	0xFDB6, 0xFC09, 0xFE0D, 0xFF3D, 0xFFF1, 0xFF88, 0xFFE1, 0xFFFE,
+	0xFD89, 0xFB70, 0xFD7E, 0xFF6E, 0xFFFF, 0xFF07, 0xFFFE, 0xFFFE,
+	0xFD69, 0xFBBF, 0xFD55, 0xFF43, 0xFFF0, 0xFF3F, 0xFFF1, 0xFB29,
+	0xFDA0, 0xFB8E, 0xFD39, 0xFF18, 0xFFC6, 0xFF12, 0xFFC4, 0xFAFB,
+	0xFD75, 0xFAF3, 0xFD6F, 0xFEED, 0xFFFE, 0xFF43, 0xF915, 0xFB49,
+	0xFD4E, 0xFAC7, 0xFD3E, 0xFF21, 0xFFD3, 0xFF1A, 0xF8E3, 0xFB89,
+	0xFD1F, 0xFB86, 0xFD16, 0xFEF6, 0xFFFF, 0xF539, 0xF8BA, 0xFB5D,
+	0xFCFF, 0xFB55, 0xFD52, 0xFF29, 0xFFD4, 0xF509, 0xF90E, 0xFB32,
+	0xFD38, 0xFB95, 0xFD8A, 0xFF00, 0xF8E7, 0xF5FA, 0xF958, 0xFB83,
+	0xFD74, 0xFB67, 0xFD5B, 0xFF8E, 0xF9B2, 0xF6E1, 0xF93A, 0xFC21,
+	0xFDAE, 0xFBB3, 0xFD92, 0xF6BE, 0xF9F7, 0xF6B1, 0xFA62, 0xFC5E,
+	0xFDD3, 0xFBF1, 0xFE2F, 0xF799, 0xFA3B, 0xF80B, 0xFAA0, 0xFC98,
+	0xFE06, 0xFC2B, 0xF45C, 0xF7E2, 0xFA79, 0xF84C, 0xFADC, 0xFCD4,
+	0xFEA1, 0xFCBD, 0xF5D2, 0xF8A1, 0xFB25, 0xF906, 0xFB88, 0xFD01,
+	0xFE76, 0xF969, 0xF627, 0xF8F3, 0xFBC9, 0xF951, 0xFBC4, 0xFD9A,
+	0xFF56, 0xF9B0, 0xF700, 0xF9A9, 0xFC05, 0xF9FD, 0xFBFE, 0xFDCE,
+	0xF7C8, 0xFA60, 0xFCA5, 0xFA46, 0xFC3D, 0xFE0E, 0xF88E, 0xFAA3,
+	0xF8F6, 0xFAF3, 0xFCD3, 0xFB56, 0xFD30, 0xF61A, 0xF943, 0xF68D,
+	0xF9AA, 0xFB98, 0xFD6C, 0xFB92, 0xFD53, 0xF6F0, 0xF9F1, 0xF7CD,
+	0xF9E5, 0xFC25, 0xFDF4, 0xFC85, 0xF568, 0xF886, 0xFAF0, 0xF8F4,
+	0xFAED, 0xFCC4, 0xFE73, 0xF2A2, 0xF6AD, 0xF93D, 0xFB30, 0xF933,
+	0xFBE7, 0xFD4A, 0xFBDA, 0xF496, 0xF7D2, 0xFA44, 0xFC21, 0xFAA5,
+	0xFC73, 0xFDD3, 0xF8FC, 0xF663, 0xF8F7, 0xFAEC, 0xF949, 0xFB3A,
+	0xFD5C, 0xF72F, 0xF99D, 0xF715, 0xF9FC, 0xFBCF, 0xF9F6, 0xFC28,
+	0xF528, 0xF8B4, 0xF61C, 0xF843, 0xFAF9, 0xFCBE, 0xFAF4, 0xFCB2,
+	0xF672, 0xF9C1, 0xF7B6, 0xF94A, 0xFB8B, 0xFD46, 0xFC3A, 0xF561,
+	0xF7FF, 0xFAB8, 0xF8CA, 0xFB09, 0xFCC9, 0xFE6E, 0xF353, 0xF700,
+	0xF96A, 0xFB4E, 0xF9CD, 0xFB9A, 0xFD4B, 0xFEDF, 0xF594, 0xF884,
+	0xFACE, 0xFC8C, 0xFB1E, 0xFCD5, 0xFE22, 0xF992, 0xF730, 0xF98E,
+	0xFBB3, 0xF9E2, 0xFBA6, 0xFDAB, 0xF84B, 0xFA29, 0xF905, 0xFAE1,
+	0xFCE6, 0xFB2B, 0xFC83, 0xFE74, 0xF9A9, 0xF7B5, 0xFA63, 0xFBBC,
+	0xFDBC, 0xFC09, 0xFDA1, 0xF860, 0xFAF6, 0xF91E, 0xFB46, 0xFC9A,
+	0xF77B, 0xFA26, 0xFB89, 0xFA76, 0xFBD5, 0xFD70, 0xF893, 0xF6F1,
+	0xF8E5, 0xFB0B, 0xF936, 0xFB59, 0xFCFD, 0xF80A, 0xF590, 0xF865,
+	0xFA8A, 0xFC95, 0xFADB, 0xFC30, 0xF782, 0xF905, 0xF70C, 0xF9BD,
+	0xFB6C, 0xFA0D, 0xF298, 0xF628, 0xF8E6, 0xF685, 0xF937, 0xFAF1,
+	0xFC97, 0xF1F9, 0xF59F, 0xF868, 0xF66B, 0xF8B8, 0xFA77, 0xFC1B,
+	0xEFB1, 0xF42C, 0xF7E1, 0xF9A9, 0xF7D7, 0xFA5A, 0xFC05, 0xF630,
+	0xF391, 0xF68A, 0xF990, 0xF754, 0xF9DE, 0xFB8A, 0xF5A8, 0xF28C,
+	0xF678, 0xF853, 0xFAC8, 0xF962, 0xFB16, 0xF516, 0xF77C, 0xF5E4,
+	0xF837, 0xFA4C, 0xF8E4, 0xFA9A, 0xF502, 0xF75D, 0xF55F, 0xF7B8,
+	0xF9D0, 0xFBC8, 0xFA1E, 0xF38C, 0xF6D6, 0xF904, 0xF731, 0xF956,
+	0xFB54, 0xF9A4, 0xF2F1, 0xF651, 0xF8E7, 0xF6AC, 0xF936, 0xFAD8,
+	0xF9DA, 0xF2DF, 0xF5CA, 0xF86D, 0xF6ED, 0xF914, 0xFB0E, 0xFC4B,
+	0xF244, 0xF5AD, 0xF7E8, 0xF9FA, 0xF88E, 0xFA95, 0xFC28, 0xF7D2,
+	0xF520, 0xF82B, 0xF9D1, 0xF879, 0xFA1D, 0xF434, 0xF752, 0xF56B,
+	0xF7A8, 0xFA0F, 0xFB9D, 0xFA59, 0xF486, 0xF6CF, 0xF943, 0xF77A,
+	0xF993, 0xFB27, 0xFA2D, 0xF3F6, 0xF70F, 0xF8C4, 0xF768, 0xF969,
+	0xF80B, 0xF9B5, 0xF860, 0xFA54, 0xFBDB, 0xF73C, 0xF557, 0xF78D,
+	0xF9EC, 0xF838, 0xF9DA, 0xFBB8, 0xF77F, 0xF53F, 0xF7CB, 0xF9CA,
+	0xF871, 0xFA60, 0xFBEE, 0xF6FC, 0xF517, 0xF7A2, 0xF99B, 0xF84F,
+	0xFA3F, 0xF4A5, 0xF794, 0xF560, 0xF7E4, 0xF9D9, 0xF885, 0xFA10,
+	0xF47B, 0xF715, 0xF536, 0xF7B8, 0xF9B1, 0xF860, 0xF1E9, 0xF4C0,
+	0xF7A7, 0xF57B, 0xF793, 0xF98A, 0xF83A, 0xF152, 0xF567, 0xF783,
+	0xF615, 0xF824, 0xFA10, 0xF484, 0xF213, 0xF53D, 0xF759, 0xF5EB,
+	0xF7FD, 0xFA39, 0xF4C7, 0xF265, 0xF582, 0xF7ED, 0xF62E, 0xF890,
+	0xF16C, 0xF49F, 0xF319, 0xF5B4, 0xF7C5, 0xF666, 0xF8BB, 0xF220,
+	0xF544, 0xF2E9, 0xF652, 0xF851, 0xF6FE, 0xF88E, 0xF2D7, 0xF57C,
+	0xF398, 0xF628, 0xF880, 0xF727, 0xEEBF, 0xF386, 0xF614, 0xF442,
+	0xF713, 0xF8AF, 0xF6FE, 0xEF96, 0xF3BE, 0xF64A, 0xF475, 0xF6F0,
+	0xF8D8, 0xF3AC, 0xF0CF, 0xF463, 0xF735, 0xF57A, 0xF71F, 0xF90C,
+	0xF384, 0xF188, 0xF49B, 0xF760, 0xF5A5, 0xF7AF, 0xF174, 0xF487,
+	0xF29E, 0xF592, 0xF78C, 0xF5E6, 0xF880, 0xF28C, 0xF4BF, 0xF2DB,
+	0xF5C7, 0xF810, 0xF9DF, 0xF8F8, 0xF2C9, 0xF60D, 0xF3E4, 0xF652,
+	0xF83B, 0xF74D, 0xF925, 0xFA8F, 0xF95C, 0xF47C, 0xF6E6, 0xF8B7,
+	0xF7C9, 0xF99A, 0xFAFE, 0xF283, 0xF570, 0xF762, 0xF60B, 0xF845,
+	0xF9C1, 0xFB6B, 0xF3EF, 0xF64C, 0xF7E1, 0xF692, 0xF8C1, 0xFA2A,
+	0xF594, 0xF47A, 0xF6D3, 0xF85F, 0xF710, 0xF93B, 0xF413, 0xF228,
+	0xF50E, 0xF750, 0xF91A, 0xF7E0, 0xF280, 0xF54D, 0xF326, 0xF5E8,
+	0xF7D2, 0xF63D, 0xF8AA, 0xF372, 0xF5D6, 0xF3C7, 0xF6C2, 0xF83D,
+	0xF6FC, 0xF176, 0xF462, 0xF65D, 0xF4B7, 0xF743, 0xF954, 0xEEE5,
+	0xF275, 0xF543, 0xF38F, 0xF5D8, 0xF7C1, 0xF2C1, 0xEFFC, 0xF367,
+	0xF621, 0xF474, 0xF701, 0xF8C7, 0xF40F, 0xF185, 0xF4AB, 0xF690,
+	0xF548, 0xF734, 0xF1C6, 0xF49D, 0xF2DE, 0xF58B, 0xF7B3, 0xF675,
+	0xEF46, 0xF377, 0xF1A2, 0xF414, 0xF612, 0xF4C3, 0xEC77, 0xF11E,
+	0xF45E, 0xF29D, 0xF553, 0xF726, 0xF63B, 0xEF7B, 0xF2DC, 0xF52E,
+	0xF38B, 0xF5D6, 0xF82E, 0xED3A, 0xF0F7, 0xF420, 0xF65B, 0xF50E,
+	0xF6E6, 0xF192, 0xEF3E, 0xF241, 0xF547, 0xF351, 0xF5D9, 0xEF30,
+	0xF2E7, 0xF112, 0xF3E5, 0xF5C8, 0xF4D6, 0xF6AB, 0xF153, 0xF473,
+	0xF25C, 0xF560, 0xF6DD, 0xF5F0, 0xEFC1, 0xF2A9, 0xF13A, 0xF3A2,
+	0xF29F, 0xF067, 0xF39B, 0xF573, 0xF435, 0xF6A8, 0xF809, 0xEE5A,
+	0xF1C5, 0xF4BF, 0xF2CC, 0xF554, 0xF766, 0xF25E, 0xF08F, 0xF35A,
+	0xF5DF, 0xF3FA, 0xF66A, 0xF0CE, 0xF3F1, 0xF234, 0xF488, 0xF69B,
+	0xF5B1, 0xF001, 0xF26E, 0xF111, 0xF41C, 0xF63A, 0xF4B1, 0xED88,
+	0xF1B1, 0xF44E, 0xF2AF, 0xF4E3, 0xF6F4, 0xEBA2, 0xF029, 0xF344,
+	0xF139, 0xF3DB, 0xF68D, 0xF0CD, 0xEE7A, 0xF1D2, 0xF4AC, 0xF373,
+	0xF53D, 0xEF20, 0xF2B4, 0xF0FB, 0xF3A5, 0xF5C8, 0xF441, 0xEE53,
+	0xF19C, 0xEF70, 0xF294, 0xF55E, 0xF3CF, 0xEC26, 0xF012, 0xF36D,
+	0xF224, 0xF40B, 0xF65F, 0xF534, 0xEF36, 0xF25E, 0xF0AD, 0xF347,
+	0xF56A, 0xF434, 0xEDF8, 0xF144, 0xF427, 0xF28E, 0xF502, 0xF6B3,
+	0xEBCD, 0xF0D3, 0xF31E, 0xF17C, 0xF3FE, 0xF652, 0xF110, 0xEF4B,
+	0xF2B0, 0xF4CA, 0xF2F1, 0xF55B, 0xEFEF, 0xF2E8, 0xF140, 0xF420,
+	0xF61A, 0xF4F3, 0xEF73, 0xF278, 0xF12D, 0xF3B0, 0xF523, 0xF3F1,
+	0xEDD9, 0xF16A, 0xF3E8, 0xF2AB, 0xF4BB, 0xF6B1, 0xEC90, 0xF0F3,
+	0xF37C, 0xF23A, 0xF453, 0xF64B, 0xF18E, 0xEFCF, 0xF275, 0xF484,
+	0xF3A9, 0xF5A8, 0xF11D, 0xF348, 0xF206, 0xF473, 0xF618, 0xF544,
+	0xF414, 0xF60A, 0xF4E5, 0xEF94, 0xF22F, 0xF0E3, 0xF3AE, 0xF5AB,
+	0xF47F, 0xEF7F, 0xF1C1, 0xF06F, 0xF2FB, 0xF547, 0xF3D7, 0xEE4C,
+	0xF1B0, 0xF3CC, 0xF28F, 0xF4DF, 0xF36D, 0xEDD4, 0xF098, 0xF35F,
+	0xF226, 0xF439, 0xF61A, 0xEC98, 0xF024, 0xF2F9, 0xF16C, 0xF3D3,
+	0xEE05, 0xF10B, 0xF00D, 0xF28A, 0xF443, 0xF365, 0xED89, 0xF0F6,
+	0xEF9E, 0xF27A, 0xF433, 0xF354, 0xED0A, 0xF087, 0xEE7A, 0xF16A,
+	0xF3C9, 0xF2E6, 0xEBC7, 0xF00E, 0xF286, 0xF0FB, 0xF360, 0xF27F,
+	0xEBB2, 0xEF55, 0xF276, 0xF0E9, 0xF350, 0xF536, 0xEB31, 0xEEDD,
+	0xF209, 0xF075, 0xF2E1, 0xECA8, 0xF06E, 0xEE67, 0xF19C, 0xF3F0,
+	0xF313, 0xEC2D, 0xF001, 0xEE50, 0xF188, 0xF38C, 0xF2AD, 0xEC18,
+	0xEF8B, 0xEDD8, 0xF11F, 0xF324, 0xF240, 0xEB99, 0xEF77, 0xF239,
+	0xF0B0, 0xF34F, 0xF22C, 0xEB82, 0xEF07, 0xF1CC, 0xF09B, 0xF2EB,
+	0xED46, 0xEAF9, 0xEEF0, 0xF1B6, 0xF0CD, 0xF2D2, 0xED83, 0xF067,
+	0xEF2D, 0xF151, 0xF38C, 0xF2AE, 0xED04, 0xF057, 0xEEB7, 0xF183,
+	0xF3BB, 0xF2A0, 0xECEF, 0xF08B, 0xEE41, 0xF1B3, 0xF357, 0xF233,
+	0xEC7B, 0xF01E, 0xF26C, 0xF148, 0xF385, 0xF265, 0xECB8, 0xEFAA,
+	0xEE67, 0xF178, 0xF31C, 0xF295, 0xF46C, 0xF62D, 0xEEA0, 0xF10D,
+	0xF34C, 0xF229, 0xF408, 0xF5C9, 0xEE30, 0xF13D, 0xF328, 0xF258,
+	0xF436, 0xEFAC, 0xEE62, 0xF16F, 0xF358, 0xF236, 0xF414, 0xEFDE,
+	0xEE9F, 0xF104, 0xF382, 0xF266, 0xECE6, 0xF010, 0xEED4, 0xF134,
+	0xF360, 0xF296, 0xECD1, 0xF043, 0xEF0C, 0xF165, 0xF389, 0xEF03,
+	0xED0E, 0xF07B, 0xF269, 0xF142, 0xF365, 0xEEDA, 0xED4B, 0xF051,
+	0xF2D9, 0xF172, 0xF395, 0xEF17, 0xEDCF, 0xF089, 0xF2B7, 0xF1EB,
+	0xEC6E, 0xEF47, 0xEE0A, 0xF0BB, 0xF2E3, 0xF1C9, 0xECA9, 0xEFC5,
+	0xEE3C, 0xF12E, 0xF34F, 0xE889, 0xEC8B, 0xEFFB, 0xEEC0, 0xF108,
+	0xF32D, 0xE8DC, 0xED75, 0xF074, 0xEEF9, 0xF138, 0xEB5E, 0xE9E7,
+	0xED4A, 0xF052, 0xEF72, 0xF1AE, 0xECA3, 0xEA2D, 0xEE32, 0xF082,
+	0xEF52, 0xF18C, 0xEC28, 0xEF8E, 0xEEAC, 0xF0F7, 0xEFC9, 0xE942,
+	0xED62, 0xF00B, 0xEF2D, 0xF115, 0xF040, 0xE9E5, 0xEDE4, 0xF082,
+	0xEF0D, 0xF18A, 0xEC92, 0xEA2B, 0xEE66, 0xF0F3, 0xEF84, 0xF1F6,
+	0xED1F, 0xEB79, 0xEE46, 0xF0CD, 0xEFF9, 0xE940, 0xEDA1, 0xEC04,
+	0xEEC6, 0xF188, 0xF070, 0xEA9E, 0xEE21, 0xEC91, 0xEF84, 0xF1F4,
+	0xF095, 0xF2A1, 0xE96C, 0xED63, 0xEFF9, 0xEE88, 0xF148, 0xEC0A,
+	0xEA5D, 0xEDE3, 0xF020, 0xEF47, 0xF126, 0xEC95, 0xEAF3, 0xEEAA,
+	0xF0D6, 0xEFC4, 0xE97F, 0xED67, 0xEC82, 0xEED1, 0xF18B, 0xF07A,
+	0xEB22, 0xEE33, 0xEC59, 0xEF8C, 0xF1A7, 0xE6A8, 0xEBAD, 0xEEF1,
+	0xED29, 0xF045, 0xF256, 0xE87C, 0xEC86, 0xEF16, 0xEDF9, 0xF06A,
+	0xEB28, 0xE974, 0xED9B, 0xEFD2, 0xEF03, 0xE8B6, 0xEC01, 0xEB15,
+	0xEE60, 0xF0CF, 0xEFBD, 0xE9A3, 0xED1F, 0xEBEE, 0xEE85, 0xF0EB,
+	0xE5D1, 0xEA90, 0xEDED, 0xED0C, 0xEF8D, 0xF15E, 0xE7B7, 0xEBB9,
+	0xEEF5, 0xED31, 0xEFA9, 0xEB0D, 0xE906, 0xEC8C, 0xEF57, 0xEE3A,
+	0xF0E3, 0xEC34, 0xEA41, 0xEDE6, 0xF053, 0xEF41, 0xE98E, 0xEC5B,
+	0xEB71, 0xEE0D, 0xF0B2, 0xEFAB, 0xEABE, 0xEDBA, 0xEC8D, 0xEF58,
+	0xF114, 0xE79B, 0xEBE3, 0xEEC0, 0xED9C, 0xEFB7, 0xEA90, 0xE93F,
+	0xEC56, 0xEF22, 0xEE06, 0xF0AE, 0xEBB7, 0xEA78, 0xEDB5, 0xEFD8,
+	0xEF4F, 0xEA13, 0xED14, 0xEBE9, 0xEE31, 0xF101, 0xEFF3, 0xEA91,
+	0xEDCC, 0xECA4, 0xEFA5, 0xF19A, 0xE88D, 0xEC02, 0xEF15, 0xEDFC,
+	0xF04D, 0xF231, 0xEA1B, 0xEDA2, 0xEFB7, 0xEEA9, 0xF0E7, 0xEC1B,
+	0xEF64, 0xF15C, 0xECEB, 0xEBBF, 0xEED0, 0xEDB9, 0xF00B, 0xEB19,
+	0xEDF7, 0xED68, 0xEFBE, 0xEEA8, 0xE92B, 0xECC9, 0xEB9C, 0xEE13,
+	0xF09B, 0xE5F0, 0xE9F7, 0xEDC2, 0xEC56, 0xEF01, 0xF13A, 0xE7F9,
+	0xEBFC, 0xEEB0, 0xED54, 0xEFE6, 0xEBA5, 0xEA26, 0xECFE, 0xEF98,
+	0xEE5A, 0xE9C3, 0xECA9, 0xEB31, 0xEDF7, 0xED71, 0xE649, 0xEAD7,
+	0xE8FD, 0xECD9, 0xEF26, 0xEEAB, 0xE89A, 0xEBF6, 0xEB5A, 0xEE13,
+	0xF009, 0xE625, 0xEAFE, 0xED7C, 0xECA1, 0xEEB9, 0xEA0B, 0xE915,
+	0xEC52, 0xEE68, 0xEDDC, 0xE813, 0xEBFA, 0xEA34, 0xED8A, 0xEC24,
+	0xE467, 0xE9D6, 0xE83C, 0xEBD5, 0xEE76, 0xED65, 0xE786, 0xEB7B,
+	0xE9C0, 0xED16, 0xEF4E, 0xE503, 0xE952, 0xED08, 0xEB61, 0xEE85,
+	0xE8F5, 0xE760, 0xEAFE, 0xEDF2, 0xECDF, 0xE698, 0xEAA2, 0xEA13,
+	0xECCF, 0xEBBD, 0xEE93, 0xE96E, 0xE7D2, 0xEB68, 0xEE02, 0xECB9,
+	0xE773, 0xEACA, 0xE9E1, 0xEC99, 0xEF19, 0xE4F4, 0xE9D5, 0xEC8D,
+	0xEBC4, 0xEE10, 0xE974, 0xE73B, 0xEB26, 0xEDC1, 0xECAC, 0xEF68,
+	0xEAD0, 0xE99D, 0xEC9D, 0xEBDA, 0xEE1F, 0xE98F, 0xE7BF, 0xEB82,
+	0xEDCF, 0xED03, 0xE760, 0xEB2A, 0xE9B8, 0xECF7, 0xEF27, 0xE5F4,
+	0xE2FA, 0xE8CE, 0xEBDC, 0xEA32, 0xED9A, 0xEC91, 0xE61D, 0xEA14,
+	0xE989, 0xEC44, 0xEEB3, 0xE402, 0xE933, 0xEBEC, 0xEACF, 0xEDAC,
+	0xE8D4, 0xE6AA, 0xEAC3, 0xED56, 0xEC54, 0xE68C, 0xEAF6, 0xE9E2,
+	0xEC34, 0xEBB4, 0xE580, 0xE939, 0xE76D, 0xEBA8, 0xEDDD, 0xE21D,
+	0xE7A2, 0xEB52, 0xE9F4, 0xED15, 0xE7E2, 0xE6AA, 0xE99E, 0xECC1,
+	0xEBB9, 0xE642, 0xE9CA, 0xE941, 0xEBA1, 0xEB1A, 0xED54, 0xE8E2,
+	0xE76D, 0xEB0E, 0xED87, 0xEC89, 0xE70C, 0xEAB8, 0xE9A4, 0xEC7B,
+	0xEB74, 0xE5A8, 0xE947, 0xE811, 0xEB23, 0xEDCD, 0xE3E8, 0xE8A2,
+	0xEBD6, 0xEACA, 0xED02, 0xE890, 0xE70F, 0xEA74, 0xECF4, 0xEBF6,
+	0xE6B2, 0xEA20, 0xE907, 0xEC1E, 0xEB5A, 0xE4FD, 0xE97B, 0xE8A1,
+	0xEB4E, 0xED7B, 0xE3EC, 0xE84D, 0xEB42, 0xEA32, 0xED25, 0xEEF6,
+	0xE6BC, 0xEA14, 0xECDA, 0xEC1D, 0xEDFE, 0xEA8F, 0xE981, 0xEBC8,
+	0xEB0A, 0xEDAA, 0xE924, 0xE855, 0xEB73, 0xED5D, 0xECE1, 0xE7F8,
+	0xEB67, 0xEAA3, 0xED0B, 0xEC8D, 0xE794, 0xEA4D, 0xECFD, 0xEC42,
+	0xEE8B, 0xEAC1, 0xE9F2, 0xEBF3, 0xEB31, 0xED8E, 0xE99E, 0xE8D1,
+	0xEB9A, 0xEDEE, 0xED3A, 0xE879, 0xEB8E, 0xEACA, 0xED2E, 0xEC73,
+	0xEBB8, 0xEB3A, 0xED4D, 0xE37F, 0xE80F, 0xEAE6, 0xEA24, 0xEC8F,
+	0xE88A, 0xE7B0, 0xEA94, 0xE903, 0xEC39, 0xE759, 0xE678, 0xE9BD,
+	0xEC29, 0xEB6D, 0xE616, 0xEA2F, 0xE89C, 0xEBD4, 0xEA9D, 0xE5B4,
+	0xE910, 0xE83A, 0xEB0F, 0xED1E, 0xE463, 0xE7E8, 0xEB33, 0xE9F9,
+	0xE3FF, 0xE8A9, 0xE7D5, 0xEA63, 0xE99E, 0xE396, 0xE77A, 0xE69F,
+	0xE994, 0xE8C9, 0xE22A, 0xE71D, 0xE55E, 0xE939, 0xEB6A, 0xE044,
+	0xE631, 0xE9AB, 0xE85B, 0xEB57, 0xE6B5, 0xE4EB, 0xE8D4, 0xE802,
+	0xEA89, 0xE576, 0xE489, 0xE87B, 0xEAB3, 0xEA37, 0xE47F, 0xE820,
+	0xE79D, 0xEAA0, 0xE964, 0xE416, 0xE80F, 0xE669, 0xE9D4, 0xEC23,
+	0xE2B7, 0xE6E2, 0xE658, 0xE97B, 0xEC10, 0xE146, 0xE6D1, 0xE9E9,
+	0xE8A6, 0xEB4D, 0xE74A, 0xE59D, 0xE916, 0xE84D, 0xEAFB, 0xE665,
+	0xE58C, 0xE8BD, 0xEB62, 0xEAA2, 0xE60C, 0xE92D, 0xE7E1, 0xEB0E,
+	0xE687, 0xE519, 0xE8D4, 0xE78A, 0xEA46, 0xE59B, 0xE4B9, 0xE801,
+	0xEB1F, 0xE9ED, 0xE53B, 0xE871, 0xE7A6, 0xEA5D, 0xE9DC, 0xE448,
+	0xE81A, 0xE712, 0xEA04, 0xE90E, 0xE3E8, 0xE807, 0xE6B6, 0xE9F1,
+	0xEBF5, 0xE2E5, 0xE72D, 0xEA1B, 0xE929, 0xEBA4, 0xE823, 0xE6D2,
+	0xE575, 0xE8D0, 0xE851, 0xEAA9, 0xEA30, 0xE564, 0xE8BF, 0xE83E,
+	0xEA58, 0xECC1, 0xE4FB, 0xE868, 0xE766, 0xEA47, 0xEC71, 0xE40A,
+	0xE855, 0xEA6F, 0xE9F7, 0xE56A, 0xE87F, 0xE77D, 0xEA1F, 0xE9A0,
+	0xE482, 0xE828, 0xE726, 0xEA0E, 0xE98D, 0xE41B, 0xE815, 0xE715,
+	0xE9B5, 0xE93F, 0xE40C, 0xE7C0, 0xE6BE, 0xE9A4, 0xE51D, 0xE3AE,
+	0xE7AD, 0xEA44, 0xE956, 0xE42E, 0xE39D, 0xE6D7, 0xE9EE, 0xE8FF,
+	0xE4AE, 0xE7CD, 0xE745, 0xE99F, 0xE964, 0xE3BF, 0xE76F, 0xE6F0,
+	0xE98C, 0xE4D0, 0xE3B0, 0xE763, 0xE6DF, 0xE937, 0xE472, 0xE349,
+	0xE707, 0xE681, 0xE92B, 0xE45B, 0xE33A, 0xE6B2, 0xE9C4, 0xE94E,
+	0xE3FC, 0xE2D5, 0xE720, 0xE976, 0xDE33, 0xE3ED, 0xE7C9, 0xE6CB,
+	0xE997, 0xE57E, 0xE46D, 0xE774, 0xE6BA, 0xE984, 0xE526, 0xE408,
+	0xE763, 0xE65C, 0xE932, 0xE515, 0xE3F7, 0xE70E, 0xE6CC, 0xE005,
+	0xE4B9, 0xE39B, 0xE773, 0xE9EE, 0xDF99, 0xE4A8, 0xE81A, 0xE71E,
+	0xE9A2, 0xDF83, 0xE4D4, 0xE7C5, 0xE70D, 0xE9FF, 0xE584, 0xE4C3,
+	0xE7ED, 0xE737, 0xE1E3, 0xE5F9, 0xE4ED, 0xE7DC, 0xE758, 0xE180,
+	0xE59D, 0xE491, 0xE7FD, 0xE74A, 0xE171, 0xE58C, 0xE508, 0xE7AA,
+	0xE2D0, 0xE677, 0xE635, 0xE8C3, 0xE3DD, 0xE350, 0xE666, 0xE5E2,
+	0xE8E6, 0xE410, 0xE2ED, 0xE704, 0xE940, 0xDFA6, 0xE43A, 0xE36B,
+	0xE6B1, 0xE92D, 0xDF33, 0xE4AF, 0xE756, 0xE6D7, 0xE94E, 0xDFCA,
+	0xE4D9, 0xE7F4, 0xE6FC, 0xE139, 0xE587, 0xE47F, 0xE815, 0xE6EB,
+	0xE256, 0xE5B1, 0xE4F4, 0xE837, 0xE789, 0xE1F3, 0xE5DB, 0xE59B,
+	0xE85E, 0xE340, 0xE271, 0xE5FC, 0xE548, 0xE87F, 0xE373, 0xE331,
+	0xE626, 0xE569, 0xE8A0, 0xE3E8, 0xE2D0, 0xE650, 0xE593, 0xDFEC,
+	0xE412, 0xE34C, 0xE6BC, 0xE638, 0xE021, 0xE4C0, 0xE378, 0xE6DD,
+	0xE217, 0xE0AF, 0xE4EA, 0xE42D, 0xE737, 0xE24A, 0xE176, 0xE514,
+	0xE80C, 0xE75F, 0xE276, 0xE236, 0xE5B9, 0xE82B, 0xDDFC, 0xE32B,
+	0xE695, 0xE5E1, 0xE84C, 0xDEDE, 0xE35E, 0xE6BF, 0xE60B, 0xE8A6,
+	0xE4CE, 0xE40C, 0xE719, 0xE665, 0xE115, 0xE573, 0xE4B8, 0xE738,
+	0xE686, 0xE1DC, 0xE59B, 0xE4E2, 0xE792, 0xE6E0, 0xE206, 0xE5C1,
+	0xE50A, 0xE7B3, 0xE3C8, 0xE2FD, 0xE61F, 0xE5DF, 0xE80D, 0xE474,
+	0xE3B2, 0xE640, 0xE609, 0xE82C, 0xE49A, 0xE3DC, 0xE713, 0xE663,
+	0xE17D, 0xE578, 0xE43D, 0xE76B, 0xE975, 0xE1E9, 0xE59B, 0xE4E3,
+	0xE427, 0xE367, 0xE6A6, 0xE8BF, 0xE103, 0xE50A, 0xE3C8, 0xE6FD,
+	0xE28F, 0xE1C8, 0xE52D, 0xE474, 0xE757, 0xE37D, 0xE2B4, 0xE58E,
+	0xE54E, 0xDF17, 0xE3DE, 0xE2E5, 0xE661, 0xE5B1, 0xE075, 0xE408,
+	0xE3C8, 0xE6B9, 0xE241, 0xE178, 0xE4E2, 0xE42B, 0xE70A, 0xE32B,
+	0xE1A2, 0xE543, 0xE505, 0xDF24, 0xE395, 0xE295, 0xE59D, 0xE566,
+	0xE0C0, 0xE3F6, 0xE37F, 0xE66E, 0xE1FA, 0xE0EA, 0xE4D0, 0xE3E2,
+	0xE6F6, 0xE2E4, 0xE1E4, 0xE52B, 0xE4BA, 0xDF68, 0xE345, 0xE307,
+	0xE602, 0xE54B, 0xE074, 0xE426, 0xE36F, 0xE65A, 0xDAEA, 0xE16E,
+	0xE487, 0xE449, 0xE6E2, 0xDCD6, 0xE25F, 0xE58F, 0xE4E1, 0xDFB5,
+	0xDED7, 0xE2F7, 0xE5E7, 0xE539, 0xE0B6, 0xDFE1, 0xE3D8, 0xE676,
+	0xDCF2, 0xE1E7, 0xE0E2, 0xE470, 0xE6FE, 0xDE13, 0xE248, 0xE20A,
+	0xE4CB, 0xE039, 0xDF64, 0xE367, 0xE2AB, 0xE5CE, 0xE171, 0xE065,
+	0xE3FF, 0xE38A, 0xDD91, 0xE297, 0xE194, 0xE50E, 0xE422, 0xDF77,
+	0xE2F8, 0xE2BA, 0xE594, 0xE0FB, 0xE0B6, 0xE43F, 0xE352, 0xE623,
+	0xE221, 0xE1E3, 0xE4D4, 0xE466, 0xDEFA, 0xE33E, 0xE282, 0xE55F,
+	0xE4F5, 0xE040, 0xE3D6, 0xE398, 0xE5E9, 0xE267, 0xE16D, 0xE463,
+	0xE027, 0xDF14, 0xE2FF, 0xE2CA, 0xE598, 0xE192, 0xE091, 0xE44A,
+	0xE360, 0xDE21, 0xE231, 0xE1B5, 0xE4D7, 0xE49E, 0xDF65, 0xE37C,
+	0xE28B, 0xE594, 0xDBF8, 0xE0D9, 0xDFD8, 0xE3D4, 0xE61A, 0xDD5C,
+	0xE1B6, 0xE141, 0xE466, 0xDFFD, 0xDEEE, 0xE308, 0xE217, 0xDC5B,
+	0xE15F, 0xE05E, 0xE39C, 0xE360, 0xDDFB, 0xE23A, 0xE1C0, 0xE460,
+	0xE083, 0xDF7D, 0xE2D0, 0xE294, 0xE524, 0xE160, 0xE0ED, 0xE447,
+	0xE35F, 0xDE93, 0xDE10, 0xE1C1, 0xE505, 0xDA79, 0xE00A, 0xDFCE,
+	0xE346, 0xE5BD, 0xDD1A, 0xE1A8, 0xE0A9, 0xE40A, 0xDF29, 0xDEE6,
+	0xE27C, 0xE23E, 0xE4CC, 0xE0CE, 0xE092, 0xE345, 0xE309, 0xDDFE,
+	0xE25A, 0xE16D, 0xE43E, 0xE3CB, 0xDFB1, 0xE35C, 0xE2F0, 0xE528,
+	0xDC7E, 0xE14D, 0xE41E, 0xE3E9, 0xDF9A, 0xDE51, 0xE256, 0xE50E,
+	0xE4D9, 0xE07C, 0xE039, 0xE31F, 0xE2EA, 0xDDA0, 0xE18C, 0xE150,
+	0xE416, 0xE3E1, 0xDF5A, 0xE33D, 0xE251, 0xE53B, 0xE1A8, 0xE130,
+	0xE432, 0xE34E, 0xDF81, 0xE2A8, 0xE237, 0xE4AF, 0xE445, 0xE096,
+	0xE39F, 0xE36C, 0xE594, 0xDE1A, 0xE1A4, 0xE4C4, 0xE45A, 0xE6A9,
+	0xDF7D, 0xE381, 0xE268, 0xE576, 0xE1BC, 0xE14A, 0xE3CE, 0xE399,
+	0xE32A, 0xE2F5, 0xE552, 0xDD92, 0xE1D9, 0xE0B0, 0xE418, 0xDFFE,
+	0xDFC2, 0xE30A, 0xE1F3, 0xDDB9, 0xE146, 0xE0CE, 0xE38E, 0xDA11,
+	0xDEE5, 0xE279, 0xE246, 0xE4A9, 0xDC8D, 0xE128, 0xDFF3, 0xE36E,
+	0xDF41, 0xDEC2, 0xE25B, 0xE13D, 0xDCB4, 0xE089, 0xE01A, 0xE2DD,
+	0xD88F, 0xDE23, 0xDDE0, 0xE18E, 0xE433, 0xDB73, 0xE06D, 0xDF38,
+	0xE2F4, 0xDE7F, 0xDE00, 0xE1E1, 0xE1A7, 0xDBE6, 0xE00A, 0xDF94,
+	0xE298, 0xE229, 0xDE63, 0xDD19, 0xE10F, 0xE3EC, 0xDBC5, 0xDFEE,
+	0xDFB4, 0xE2AF, 0xDDBF, 0xDD7C, 0xE19E, 0xE12F, 0xDB11, 0xDF8D,
+	0xDF15, 0xE253, 0xE1E4, 0xDDDF, 0xDD62, 0xE0CC, 0xE05D, 0xDAF7,
+	0xDFA4, 0xDF2E, 0xE26A, 0xDE77, 0xDCF3, 0xE152, 0xE0E3, 0xDBA6,
+	0xDB1B, 0xDFC4, 0xE210, 0xE1D6, 0xDD99, 0xDD13, 0xE089, 0xE048,
+	0xDBC8, 0xDF63, 0xDEED, 0xE254, 0xDE2F, 0xDDB9, 0xE144, 0xE0D5,
+	0xDB18, 0xDAD7, 0xDFB8, 0xE22E, 0xE1C6, 0xDE8B, 0xDCCD, 0xE0B0,
+	0xE03A, 0xDB84, 0xDF57, 0xDF16, 0xE278, 0xDE23, 0xDDAF, 0xE16B,
+	0xE0FC, 0xE38E, 0xDBE9, 0xDFDF, 0xDF6B, 0xE219, 0xDE7F, 0xDE04,
+	0xE0D7, 0xE09D, 0xDB7C, 0xDFBA, 0xDF46, 0xE2FE, 0xDE55, 0xDDDF,
+	0xDD64, 0xE18B, 0xE11C, 0xE3A3, 0xE33D, 0xDFCC, 0xDF58, 0xE237,
+	0xE4D6, 0xDDFA, 0xE0F7, 0xE08A, 0xE377, 0xDFEA, 0xDF7D, 0xE288,
+	0xE283, 0xDE90, 0xDE13, 0xE1A9, 0xE13C, 0xDC15, 0xE097, 0xE02A,
+	0xE2F0, 0xD9FB, 0xDED5, 0xE1EC, 0xE17F, 0xDD69, 0xDCEE, 0xE038,
+	0xDFDB, 0xE2C4, 0xDF60, 0xDF28, 0xE1CE, 0xE196, 0xDE3B, 0xDDC0,
+	0xE126, 0xE0B9, 0xDC4F, 0xDFD8, 0xDF6D, 0xE269, 0xDE85, 0xDDD7,
+	0xE167, 0xE0FA, 0xDC5F, 0xDBE4, 0xDFAE, 0xDF51, 0xDA16, 0xDED8,
+	0xDED3, 0xE13B, 0xD783, 0xDDAC, 0xDCF7, 0xE09A, 0xDBFA, 0xDB7A,
+	0xDF50, 0xDEDC, 0xE1BA, 0xDDF6, 0xDD7B, 0xE143, 0xE0DD, 0xDBD2,
+	0xDB0F, 0xDF59, 0xDEEE, 0xD935, 0xDE83, 0xDE4B, 0xE14A, 0xD647,
+	0xDD59, 0xE01E, 0xE019, 0xDBAB, 0xDAE8, 0xDF68, 0xDEFD, 0xD90E,
+	0xDDDD, 0xDD64, 0xE0C0, 0xD5D3, 0xDC05, 0xDBC6, 0xDFAB, 0xDB41,
+	0xDB00, 0xDE30, 0xDE2B, 0xE160, 0xDDEE, 0xDD7C, 0xE059, 0xDFE7,
+	0xDB94, 0xDB14, 0xDF1A, 0xDF15, 0xD8FB, 0xDE6B, 0xDDBF, 0xE0C8,
+	0xD5CB, 0xDC31, 0xDBF0, 0xDFF6, 0xDBA5, 0xDB66, 0xDEE1, 0xDE3E,
+	0xD95D, 0xDD9B, 0xDD63, 0xE071, 0xD5EE, 0xDCA6, 0xDBF3, 0xDF91,
+	0xDEEC, 0xE234, 0xD981, 0xDE4D, 0xDE48, 0xE0D9, 0xDD2C, 0xDC79,
+	0xE06B, 0xDFC8, 0xDB92, 0xDB8D, 0xDEFD, 0xDEF6, 0xD9CE, 0xDE14,
+	0xDD6A, 0xE10B, 0xDD03, 0xDCC4, 0xDFA9, 0xDFA4, 0xDB95, 0xDADD,
+	0xDF62, 0xDE8C, 0xD9A7, 0xDDB8, 0xDDB3, 0xE0D0, 0xD77A, 0xDCC5,
+	0xDC14, 0xDFD6, 0xDB6C, 0xDB2F, 0xDE92, 0xDE6A, 0xD9EB, 0xD8E6,
+	0xDE28, 0xDDB6, 0xD79B, 0xDC6B, 0xDC2C, 0xE008, 0xD4E9, 0xDBAB,
+	0xDABB, 0xDE9C, 0xD9C4, 0xD987, 0xDDEF, 0xDD1B, 0xD830, 0xDCE0,
+	0xDCDB, 0xE007, 0xD562, 0xDAFB, 0xDACC, 0xDECE, 0xDAC9, 0xDA85,
+	0xDDB8, 0xDD56, 0xE074, 0xD806, 0xDD14, 0xDCD7, 0xE003, 0xDB8E,
+	0xDB89, 0xDF09, 0xDF04, 0xDA8F, 0xD967, 0xDDC9, 0xDD8C, 0xD919,
+	0xDD89, 0xDD12, 0xE035, 0xD672, 0xDC03, 0xDBFE, 0xDF36, 0xDA92,
+	0xDA2B, 0xDDFD, 0xDDFF, 0xDA1C, 0xDDBB, 0xDDBD, 0xE02E, 0xD7E0,
+	0xDC78, 0xDC39, 0xDF35, 0xDB85, 0xDAE6, 0xDEF5, 0xDE23, 0xDA9F,
+	0xDA59, 0xDDF1, 0xDDEA, 0xD8AB, 0xDCB1, 0xDCAC, 0xE01F, 0xD696,
+	0xDC34, 0xDB23, 0xDF29, 0xDB19, 0xDB14, 0xDE2A, 0xDDED, 0xD974,
+	0xD96F, 0xDD42, 0xDCE2, 0xD776, 0xDCA7, 0xDCA2, 0xDF21, 0xD578,
+	0xDF1E, 0xDB51, 0xDB4C, 0xDE21, 0xDE1C, 0xD9ED, 0xDDE1, 0xDDDA,
+	0xE015, 0xD83C, 0xDCD6, 0xDCD1, 0xDFD5, 0xDBC4, 0xDB8E, 0xDEDF,
+	0xDEDA, 0xDB7F, 0xDA33, 0xDDDD, 0xDDDF, 0xDA24, 0xDA1F, 0xDDCE,
+	0xDCD6, 0xD8BB, 0xDCCC, 0xDCC7, 0xDF96, 0xD6F7, 0xDBBC, 0xDB7F,
+	0xDECC, 0xDB75, 0xDA61, 0xDDD1, 0xDDCF, 0xDA59, 0xDA1C, 0xDD93,
+	0xDCCA, 0xD8F2, 0xDCC0, 0xDCBB, 0xDF59, 0xD774, 0xDBB2, 0xDBAD,
+	0xDE8F, 0xDB6B, 0xDA96, 0xDE4F, 0xDE4A, 0xDA51, 0xDA4C, 0xDD87,
+	0xDD82, 0xD927, 0xD922, 0xDC79, 0xDC7B, 0xD7B4, 0xDC71, 0xDBA3,
+	0xD62F, 0xD62A, 0xDB5C, 0xDB5E, 0xD48B, 0xDA86, 0xDA42, 0xDE05,
+	0xD274, 0xD95E, 0xD921, 0xDD36, 0xD919, 0xD914, 0xDC67, 0xDC62,
+	0xD7EA, 0xD7E5, 0xDB5B, 0xDB56, 0xD664, 0xDB4C, 0xDB47, 0xDDF5,
+	0xD4C9, 0xDA32, 0xDA2D, 0xDDB4, 0xD94E, 0xD913, 0xD90E, 0xDCE7,
+	0xD904, 0xD81C, 0xDC18, 0xDC13, 0xD7D7, 0xD6A4, 0xDBD3, 0xDB07,
+	0xD697, 0xDAFD, 0xDAFA, 0xDE32, 0xD549, 0xDA1D, 0xDA18, 0xDD65,
+	0xD9D8, 0xD8FE, 0xDD2C, 0xDC98, 0xD8F1, 0xD8EC, 0xDC5A, 0xDC55,
+	0xD7C4, 0xDBC1, 0xDB86, 0xDE78, 0xD68D, 0xDB7E, 0xDAAD, 0xDDB2,
+	0xD53F, 0xDAA5, 0xDAA0, 0xDDA5, 0xD3E7, 0xD9C5, 0xD9C0, 0xDCD8,
+	0xD8DC, 0xD8A1, 0xDC9A, 0xDC0D, 0xD894, 0xD7AE, 0xDBFE, 0xDBF9,
+	0xD7A6, 0xD7A1, 0xDB2C, 0xDB27, 0xD66F, 0xDAE7, 0xDA55, 0xDDAF,
+	0xD569, 0xDA46, 0xDA0B, 0xDD1A, 0xD96B, 0xD968, 0xDCDC, 0xDCD7,
+	0xD923, 0xD881, 0xDC40, 0xD12B, 0xD837, 0xD839, 0xDBFD, 0xD750,
+	0xD74B, 0xDB66, 0xDB63, 0xD73E, 0xD653, 0xDA8F, 0xDA8A, 0xD646,
+	0xDA87, 0xDA84, 0xDA49, 0xD503, 0xD9AB, 0xD9A6, 0xDCD9, 0xD3F1,
+	0xD961, 0xD8C1, 0xDCCC, 0xD8BE, 0xD8BB, 0xDC35, 0xDC01, 0xD7D4,
+	0xD7CF, 0xDB65, 0xD7CE, 0xD7C9, 0xD6E0, 0xDB5A, 0xD6DD, 0xD6D8,
+	0xDA88, 0xDA8A, 0xD5E0, 0xD5E2, 0xDA7B, 0xDA76, 0xD4E3, 0xD9E1,
+	0xD9A6, 0xDCCE, 0xD4D1, 0xD997, 0xD994, 0xDC8B, 0xD37D, 0xD8F1,
+	0xD8B8, 0xDC7E, 0xD8AE, 0xD8A9, 0xDBEB, 0xDBEB, 0xD801, 0xD7C8,
+	0xDBA8, 0xD7BE, 0xD719, 0xDB13, 0xDB10, 0xD713, 0xD70E, 0xDB08,
+	0xDA76, 0xD61D, 0xD618, 0xDA33, 0xDA2E, 0xD612, 0xDA2B, 0xDA26,
+	0xDCD7, 0xD517, 0xDA20, 0xD987, 0xDCCC, 0xD949, 0xD944, 0xDC37,
+	0xDC32, 0xD93E, 0xD8A0, 0xDBFD, 0xDBF8, 0xD891, 0xD893, 0xDBE9,
+	0xDBEB, 0xDBE6, 0xD7AD, 0xD7A8, 0xDB53, 0xDB4E, 0xD7A2, 0xDB17,
+	0xDB12, 0xDB0D, 0xD6F7, 0xDB0A, 0xDB05, 0xDD69, 0xD6A8, 0xDA6D,
+	0xDA68, 0xD6A2, 0xD69D, 0xDA2A, 0xDA27, 0xD5AE, 0xDA24, 0xDA1F,
+	0xDC96, 0xD5A3, 0xD980, 0xD982, 0xDC89, 0xD4E7, 0xD93F, 0xD93A,
+	0xD49D, 0xD937, 0xD932, 0xD92F, 0xD3E1, 0xD925, 0xD927, 0xDBFF,
+	0xD3CF, 0xD888, 0xD883, 0xDBF2, 0xD845, 0xD842, 0xD83D, 0xDB5C,
+	0xD833, 0xD835, 0xDB54, 0xD2AD, 0xD828, 0xD78C, 0xDB13, 0xD19A,
+	0xD786, 0xD746, 0xDB08, 0xD73C, 0xD73E, 0xDACC, 0xDAC7, 0xD731,
+	0xD72C, 0xDABF, 0xCF87, 0xD688, 0xD685, 0xDA22, 0xD67B, 0xD63B,
+	0xD63F, 0xDA17, 0xD635, 0xD630, 0xD9DB, 0xD9D6, 0xD62A, 0xD625,
+	0xD9D0, 0xD57A, 0xD575, 0xD577, 0xD98F, 0xD56F, 0xD52F, 0xD982,
+	0xD984, 0xD5CC, 0xD5C7, 0xD975, 0xD972, 0xD517, 0xD514, 0xD936,
+	0xD511, 0xD4CC, 0xD92E, 0xD92B, 0xD4C4, 0xD4C1, 0xD91C, 0xD8E5,
+	0xD4B4, 0xD4B6, 0xD8DD, 0xD8D8, 0xD46E, 0xD46B, 0xD8D2, 0xD8CD,
+	0xD45E, 0xD891, 0xD893, 0xD456, 0xD453, 0xD884, 0xD881, 0xD44D,
+	0xD399, 0xD879, 0xD840, 0xD3FB, 0xD838, 0xD83A, 0xDB33, 0xD3F0,
+	0xD3EB, 0xD828, 0xD82A, 0xD3E5, 0xD3A0, 0xD877, 0xD879, 0xD39A,
+	0xD7DC, 0xD7DE, 0xDB2F, 0xD38A, 0xD832, 0xD82D, 0xD382, 0xD37F,
+	0xD820, 0xD7E7, 0xD339, 0xD3E3, 0xD7E1, 0xD7DC, 0xD327, 0xD7D9,
+	0xD7D6, 0xDAF1, 0xD38B, 0xD828, 0xD825, 0xD385, 0xD380, 0xD7E4,
+	0xD7DF, 0xD373, 0xD370, 0xD7D7, 0xD7D4, 0xD3D7, 0xD82B, 0xD826,
+	0xD322, 0xD31F, 0xD7EC, 0xD7E9, 0xD37F, 0xD381, 0xD7DA, 0xD7DC,
+	0xD374, 0xD371, 0xD829, 0xD82B, 0xD3D8, 0xD7EF, 0xD7EA, 0xD3CB,
+	0xD3C6, 0xD7E4, 0xD839, 0xD428, 0xD37D, 0xD833, 0xD82E, 0xD3E4,
+	0xD3DF, 0xD7ED, 0xD3D7, 0xD43F, 0xD841, 0xD83C, 0xD432, 0xD42F,
+	0xD88E, 0xD88B, 0xD48F, 0xD48A, 0xD851, 0xD489, 0xD4EA, 0xD4E5,
+	0xD89E, 0xD43E, 0xD49F, 0xD891, 0xD85A, 0xD499, 0xD496, 0xD8AC,
+	0xD8A7, 0xD4F4, 0xD4F1, 0xD8FB, 0xD54D, 0xD54A, 0xD545, 0xD8B5,
+	0xD50B, 0xD506, 0xD907, 0xD904, 0xD55F, 0xD55A, 0xD8CA, 0xCFA3,
+	0xD5B3, 0xD5B0, 0xD910, 0xD60C, 0xD609, 0xD56C, 0xD905, 0xD5C8,
+	0xD5C5, 0xD91E, 0xD973, 0xD61E, 0xD619, 0xD96B, 0xD156, 0xD672,
+	0xD634, 0xD97F, 0xD1BF, 0xD68D, 0xD688, 0xD99A, 0xD6DF, 0xD6DA,
+	0xD6D5, 0xD6D7, 0xD9DD, 0xD2E9, 0xD6F0, 0xD6F4, 0xD9F8, 0xD2A0,
+	0xD744, 0xD799, 0xD305, 0xD737, 0xD75A, 0xD75C, 0xD3C6, 0xD7AC,
+	0xD7A7, 0xD801, 0xD41F, 0xD7A1, 0xD7C2, 0xD3E0, 0xD441, 0xD814,
+	0xD80F, 0xD49A, 0xD495, 0xD82D, 0xD4F1, 0xD4F3, 0xD4F0, 0xD875,
+	0xD4AF, 0xD510, 0xD50B, 0xD890, 0xD567, 0xD5C1, 0xD8D9, 0xD06D,
+	0xD582, 0xD57F, 0xD945, 0xD146, 0xD633, 0xD630, 0xD216, 0xD211,
+	0xD64E, 0xD64B, 0xD20B, 0xD233, 0xD6FA, 0xD698, 0xD298, 0xD2FE,
+	0xD70E, 0xD361, 0xD35C, 0xD760, 0xD703, 0xD34F, 0xD377, 0xD779,
+	0xCD1E, 0xD439, 0xD436, 0xD794, 0xCE16, 0xD454, 0xD456, 0xD7E1,
+	0xCF7C, 0xD50C, 0xD564, 0xCFE6, 0xD05A, 0xD527, 0xD586, 0xD134,
+	0xD5DB, 0xD5D8, 0xD5A1, 0xD156, 0xD5F6, 0xD650, 0xD224, 0xD21F,
+	0xD611, 0xD669, 0xD284, 0xD27F, 0xD6BB, 0xCBEB, 0xD36C, 0xD367,
+	0xD72C, 0xD366, 0xD387, 0xD389, 0xD79D, 0xD447, 0xD444, 0xD43F,
+	0xCF4C, 0xD462, 0xD4C1, 0xD7D1, 0xCFEA, 0xD4E1, 0xD539, 0xD12B,
+	0xD128, 0xD589, 0xD58B, 0xD14D, 0xD1BA, 0xD601, 0xD5FE, 0xD216,
+	0xD23E, 0xD679, 0xD308, 0xD367, 0xD300, 0xD6EA, 0xD323, 0xD382,
+	0xD3E1, 0xD754, 0xCE73, 0xD406, 0xD45E, 0xD7C5, 0xCFC9, 0xD47C,
+	0xD4DB, 0xD05E, 0xD0C9, 0xD4FB, 0xD553, 0xD12C, 0xD0EB, 0xD571,
+	0xD223, 0xD21E, 0xD21B, 0xD5E2, 0xD2A7, 0xD304, 0xD306, 0xD6AE,
+	0xD329, 0xD388, 0xD6CC, 0xCECC, 0xD408, 0xD460, 0xD78C, 0xCF6A,
+	0xD480, 0xD4DD, 0xD040, 0xD03D, 0xD553, 0xD555, 0xD139, 0xD136,
+	0xD5C9, 0xCA0E, 0xD224, 0xD226, 0xD5E4, 0xD2AB, 0xD2A8, 0xD2AA,
+	0xCDD3, 0xD391, 0xD32A, 0xD3B2, 0xCE6F, 0xD40C, 0xD3D2, 0xD48A,
+	0xCFEC, 0xD482, 0xD4FE, 0xD04F, 0xD0E3, 0xD579, 0xD574, 0xD171,
+	0xD235, 0xD594, 0xCC23, 0xD2BC, 0xD2B9, 0xD627, 0xCDC4, 0xD339,
+	0xD33B, 0xCED8, 0xCF41, 0xD3B4, 0xD437, 0xCFD9, 0xCFD6, 0xD4B0,
+	0xD0D3, 0xD0D0, 0xD529, 0xD526, 0xD15C, 0xD182, 0xD568, 0xD5C0,
+	0xD269, 0xD2CD, 0xD632, 0xCD3B, 0xD34D, 0xD348, 0xD6C7, 0xCF60,
+	0xD3EC, 0xD444, 0xD05F, 0xD05A, 0xD462, 0xD4E3, 0xD0E6, 0xD113,
+	0xD557, 0xD172, 0xD261, 0xD25C, 0xD5EA, 0xD2DF, 0xD2DC, 0xD362,
+	0xCE4C, 0xD385, 0xD382, 0xD37D, 0xCFE9, 0xD3FB, 0xD47C, 0xD77B,
+	0xD077, 0xD4EE, 0xD568, 0xD1F5, 0xD1F0, 0xD586, 0xD583, 0xD270,
+	0xD2F6, 0xD291, 0xD616, 0xD689, 0xD395, 0xD397, 0xD6A7, 0xD009,
+	0xD48D, 0xD48A, 0xD4B0, 0xD0F7, 0xD527, 0xD522, 0xD20C, 0xD207,
+	0xD5B8, 0xD5B5, 0xD2B0, 0xD2AD, 0xD64B, 0xCED9, 0xD3AF, 0xD3AA,
+	0xD6D7, 0xD001, 0xD447, 0xD449, 0xD11B, 0xD118, 0xD4DF, 0xD559,
+	0xD226, 0xD2AC, 0xD577, 0xCDCD, 0xD2CA, 0xD349, 0xD679, 0xCF01,
+	0xD3C2, 0xD3E8, 0xD022, 0xD0B4, 0xD4D7, 0xCAEE, 0xD137, 0xD1BD,
+	0xD56F, 0xCCBE, 0xD2C4, 0xD266, 0xCE6D, 0xCF04, 0xD361, 0xD3E0,
+	0xCF8E, 0xD020, 0xD3FE, 0xCA3A, 0xD138, 0xD135, 0xD50C, 0xCCC1,
+	0xD1DC, 0xD260, 0xCD5E, 0xCE6B, 0xD302, 0xD304, 0xCF8F, 0xCFBC,
+	0xD39F, 0xD049, 0xD0D4, 0xD0CF, 0xD4B2, 0xD1E0, 0xD17D, 0xD201,
+	0xCD66, 0xD27D, 0xD2A3, 0xD29E, 0xCF2D, 0xCF28, 0xD3C2, 0xD043,
+	0xD0CE, 0xD06B, 0xCB80, 0xD17A, 0xD177, 0xD1FB, 0xCD69, 0xD21E,
+	0xD2A2, 0xCE99, 0xCF29, 0xD33B, 0xD361, 0xCFE1, 0xD06A, 0xD3FC,
+	0xCB8A, 0xD116, 0xD19C, 0xD508, 0xCD6C, 0xD241, 0xD2C0, 0xCE9A,
+	0xCEC7, 0xD35E, 0xD37F, 0xCFE2, 0xD06D, 0xD418, 0xCB8F, 0xD117,
+	0xD13D, 0xD4D0, 0xCD76, 0xD264, 0xD2E3, 0xCEC6, 0xCF56, 0xD323,
+	0xD3A0, 0xD00C, 0xD097, 0xD0BB, 0xD45A, 0xCCDE, 0xD162, 0xD1E4,
+	0xCDA2, 0xCE3C, 0xD284, 0xD2AA, 0xCEF4, 0xCF82, 0xD3BE, 0xD031,
+	0xD0BA, 0xD0E0, 0xCCE6, 0xCCE8, 0xD185, 0xD209, 0xCE3D, 0xCED2,
+	0xD2C9, 0xCF86, 0xCFB1, 0xD03A, 0xD403, 0xCBB1, 0xD166, 0xD105,
+	0xCD1E, 0xCDB3, 0xD22F, 0xCE73, 0xCF01, 0xCF8F, 0xD367, 0xC9C2,
+	0xD039, 0xD0E6, 0xCC5D, 0xCC5F, 0xD189, 0xD1AF, 0xCDB9, 0xCE75,
+	0xD276, 0xCF30, 0xCFB7, 0xCFDD, 0xD3AC, 0xCB25, 0xD10C, 0xD132,
+	0xCD2D, 0xCDC7, 0xD1D5, 0xCE80, 0xCEAB, 0xCF32, 0xD336, 0xCA5A,
+	0xD00A, 0xD093, 0xCC73, 0xCCA3, 0xD158, 0xD17E, 0xCDF6, 0xCE89,
+	0xD29C, 0xCF3B, 0xCFED, 0xD011, 0xCB45, 0xCBE4, 0xD0DD, 0xD15F,
+	0xCD41, 0xCE02, 0xD224, 0xCEB6, 0xCEE1, 0xCF68, 0xD303, 0xCAAC,
+	0xD0BE, 0xD0E4, 0xCCB5, 0xCD4F, 0xD1A9, 0xD1CD, 0xCEC2, 0xCEE8,
+	0xD306, 0xCA8F, 0xD043, 0xD040, 0xCBFD, 0xCCC3, 0xD133, 0xD1AE,
+	0xCE3D, 0xCE38, 0xD295, 0xCF18, 0xCF9F, 0xCFC5, 0xD36D, 0xCC0B,
+	0xD0B8, 0xD138, 0xCD8F, 0xCE44, 0xD21F, 0xCEFB, 0xCF1F, 0xCFCF,
+	0xD2FE, 0xCC1C, 0xD099, 0xD0BD, 0xCD99, 0xCDC4, 0xD224, 0xD248,
+	0xD267, 0xCF4F, 0xCFFD, 0xD31E, 0xD344, 0xD0C7, 0xD0ED, 0xD418,
+	0xCDCD, 0xD24B, 0xD26F, 0xCF59, 0xCF7D, 0xD2D1, 0xD347, 0xD04E,
+	0xD0F0, 0xD41B, 0xCDD7, 0xD1D5, 0xD1FB, 0xCF63, 0xCF89, 0xD2DB,
+	0xD371, 0xD07A, 0xD09E, 0xD11E, 0xCD59, 0xCE0C, 0xD1FE, 0xCEE5,
+	0xCF93, 0xCFB7, 0xD31F, 0xCC7E, 0xD0A8, 0xD14A, 0xCD8C, 0xCE18,
+	0xD22A, 0xC95B, 0xCF13, 0xCFC1, 0xD327, 0xCC8F, 0xD0AB, 0xD0F8,
+	0xCD96, 0xCE50, 0xD1DD, 0xC973, 0xCF46, 0xCFED, 0xD2D5, 0xCC07,
+	0xD0DE, 0xD0FB, 0xCDA7, 0xCDCD, 0xD202, 0xC9B9, 0xCF77, 0xD020,
+	0xCC16, 0xCCD3, 0xD108, 0xD127, 0xCDDA, 0xCE8D, 0xCEB1, 0xCA71,
+	0xCF83, 0xCFCE, 0xCC27, 0xCC52, 0xCD36, 0xD153, 0xCE12, 0xCEC0,
+	0xCEE4, 0xCB49, 0xCB79, 0xCFFA, 0xCC61, 0xCD17, 0xCD42, 0xD1A6,
+	0xC99A, 0xCEF1, 0xCF15, 0xCAC1, 0xCC45, 0xD02B, 0xC619, 0xCD51,
+	0xCE29, 0xD154, 0xC9E0, 0xCF24, 0xCF6F, 0xCB99, 0xCC84, 0xD079,
+	0xC72B, 0xCDB0, 0xCE5C, 0xCE85, 0xCABD, 0xCF77, 0xCF9B, 0xCC93,
+	0xCCB7, 0xCD94, 0xC82C, 0xCDE3, 0xCEB6, 0xCEDF, 0xCAFC, 0xCBE5,
+	0xCFEE, 0xCCCB, 0xCD1B, 0xCDCC, 0xC91A, 0xCA19, 0xCEE7, 0xCF32,
+	0xCBF9, 0xCCDD, 0xD041, 0xD103, 0xCE02, 0xCE26, 0xCEF9, 0xCB22,
+	0xCF68, 0xD006, 0xCC5A, 0xCD37, 0xCD60, 0xD154, 0xCE5C, 0xCF28,
+	0xCF4C, 0xCB88, 0xCC45, 0xD07B, 0xC77C, 0xCD96, 0xCDBF, 0xCA57,
+	0xCA87, 0xCF7B, 0xCFC6, 0xCC80, 0xCCA4, 0xD0CE, 0xC8A2, 0xCE9D,
+	0xCEC1, 0xCAC2, 0xCBB0, 0xCFF5, 0xD019, 0xCD06, 0xCDB5, 0xCE00,
+	0xC9E8, 0xCAA8, 0xCF3B, 0xCBE6, 0xCCC8, 0xCCEC, 0xC8A8, 0xC9A0,
+	0xCE36, 0xCE81, 0xCB16, 0xCBF8, 0xCFB3, 0xC6D3, 0xCD4E, 0xCE1D,
+	0xC9E7, 0xCAD3, 0xCF56, 0xCFA1, 0xCC33, 0xCC83, 0xD0C9, 0xC903,
+	0xCDCD, 0xCE9C, 0xCB15, 0xCB65, 0xCC45, 0xC6D9, 0xCD6B, 0xCD94,
+	0xCDDF, 0xCA3B, 0xCB27, 0xCF3D, 0xCC57, 0xCCA7, 0xCCF7, 0xC902,
+	0xCA24, 0xCE3A, 0xCF26, 0xCB89, 0xCC90, 0xCFD7, 0xC819, 0xCD54,
+	0xCE23, 0xCA92, 0xCABB, 0xCF7A, 0xC613, 0xCCF2, 0xCD3B, 0xCD64,
+	0xC9BA, 0xCE79, 0xCEC2, 0xCBD9, 0xCC29, 0xCC79, 0xC87C, 0xC977,
+	0xCE8C, 0xCEB0, 0xCB0D, 0xCC12, 0xCF83, 0xC867, 0xCD86, 0xCDCF,
+	0xCA11, 0xCAF6, 0xCF26, 0xC63C, 0xCCA0, 0xCCC2, 0xD0D7, 0xC9FA,
+	0xCE4C, 0xCE95, 0xCB84, 0xCC89, 0xCFE7, 0xC8C3, 0xCD44, 0xCE3A,
+	0xCA63, 0xCB72, 0xCF10, 0xC782, 0xCD0B, 0xCD59, 0xCA23, 0xCA78,
+	0xCED7, 0xC545, 0xCBF9, 0xCC49, 0xCD42, 0xC94D, 0xCA66, 0xCE1F,
+	0xCBC0, 0xCC0E, 0xCC5E, 0xC816, 0xC936, 0xCDEB, 0xC2B3, 0xCAF4,
+	0xCC25, 0xCFA4, 0xC82D, 0xCD05, 0xCDF9, 0xC9FA, 0xCB09, 0xCECF,
+	0xC6E7, 0xCCA5, 0xCCF5, 0xC990, 0xC9EA, 0xCB1E, 0xCEDF, 0xCBBC,
+	0xCC0C, 0xCD03, 0xC8E6, 0xC9FF, 0xCE05, 0xC5B0, 0xCBD1, 0xCC21,
+	0xC8A8, 0xC902, 0xCDD1, 0xCE15, 0xCAB9, 0xCBE6, 0xCC2F, 0xC893,
+	0xCCF4, 0xCDDF, 0xCA7E, 0xCAFA, 0xCBF6, 0xC785, 0xC7E4, 0xCD02,
+	0xC988, 0xCABA, 0xCB0F, 0xCF0A, 0xC7A1, 0xCCC9, 0xCD12, 0xC99D,
+	0xCACF, 0xCE12, 0xC658, 0xCBE7, 0xCD03, 0xC95F, 0xC9B2, 0xCDFE,
+	0xCE47, 0xCBAE, 0xCBF5, 0xCC6A, 0xC8B7, 0xC9F3, 0xCE33, 0xCAC0,
+	0xCBE8, 0xCC31, 0xC872, 0xC8CC, 0xCD36, 0xCE68, 0xCAD0, 0xCC1D,
+	0xCF57, 0xC8BA, 0xCD22, 0xCD90, 0xCAC3, 0xCB11, 0xCB84, 0xC87C,
+	0xCD0E, 0xCD57, 0xCDC5, 0xCAFD, 0xCB4B, 0xCEE0, 0xC8BD, 0xCD4A,
+	0xCDB1, 0xC9E7, 0xCB39, 0xCECC, 0xC78C, 0xCC68, 0xCCDB, 0xD01D,
+	0xCA4D, 0xCEB8, 0xCF01, 0xCC5B, 0xCCA2, 0xCD10, 0xCA11, 0xCDE7,
+	0xCB01, 0xCC47, 0xCC90, 0xC89C, 0xCD6C, 0xCDD3, 0xCAEF, 0xCB3D,
+	0xCBB0, 0xC88A, 0xC909, 0xCDC6, 0xC4D9, 0xCB55, 0xCB9C, 0xCF3C,
+	0xC8FC, 0xCCEB, 0xCD59, 0xCB41, 0xCBB4, 0xCBFD, 0xC8EA, 0xC962,
+	0xCD45, 0xC519, 0xCBA2, 0xCC0E, 0xC8D6, 0xC955, 0xCD58, 0xC509,
+	0xCABD, 0xCB30, 0xC7AE, 0xC830, 0xC9BB, 0xCDB2, 0xCAAB, 0xCB1E,
+	0xCB8F, 0xC84A, 0xC8C7, 0xCD03, 0xC578, 0xCB36, 0xCBA2, 0xC838,
+	0xC8B5, 0xCCEF, 0xC568, 0xCB22, 0xCBBA, 0xC850, 0xC8CD, 0xC94A,
+	0xCD8E, 0xC613, 0xCBCD, 0xCC39, 0xC8BB, 0xC962, 0xCDA1, 0xC601,
+	0xCAC5, 0xCB5B, 0xC8D3, 0xC950, 0xC9F2, 0xC620, 0xC6A9, 0xCB73,
+	0xC16F, 0xC968, 0xCA05, 0xCD6C, 0xC6C1, 0xCB86, 0xCC1E, 0xC878,
+	0xC918, 0xCA90, 0xC6E0, 0xC762, 0xCC2F, 0xC890, 0xC932, 0xC9A8,
+	0xC5A4, 0xC77F, 0xCB53, 0xC255, 0xC94A, 0xC9EC, 0xCA87, 0xC679,
+	0xCB8B, 0xCC21, 0xC987, 0xC9FD, 0xCA9A, 0xC698, 0xC749, 0xCC59,
+	0xC373, 0xCA3A, 0xCAD7, 0xC6E1, 0xC78B, 0xCC8F, 0xC392, 0xC954,
+	0xC9F1, 0xC728, 0xC7AA, 0xC84F, 0xCC49, 0xC47D, 0xCA2E, 0xCAC9,
+	0xC7EC, 0xC893, 0xCC81, 0xC4CB, 0xCA6B, 0xCB2B, 0xC830, 0xC8D5,
+	0xC45E, 0xC519, 0xCACB, 0xCB61, 0xC89C, 0xC93C, 0xCCEA, 0xC567,
+	0xCB2D, 0xCBBE, 0xC7A7, 0xC84E, 0xC8EE, 0xC5B5, 0xC66B, 0xCAE4,
+	0xC213, 0xC8BA, 0xC955, 0xC62D, 0xC6DC, 0xCB44, 0xC26B, 0xC8F7,
+	0xC9BC, 0xC674, 0xC74F, 0xC7F4, 0xCC55, 0xC3C3, 0xCA1C, 0xCADC,
+	0xC7BB, 0xC860, 0xCBB4, 0xC445, 0xCAA8, 0xCACA, 0xC827, 0xC8F1,
+	0xC93D, 0xC4C2, 0xC57D, 0xCA82, 0xC265, 0xC803, 0xC8CB, 0xC53F,
+	0xC622, 0xCB09, 0xC2EC, 0xC899, 0xC95C, 0xCA1C, 0xC693, 0xC767,
+	0xCBCE, 0xC496, 0xC9E8, 0xCAA1, 0xC730, 0xC7FD, 0xC8F1, 0xC511,
+	0xCA6D, 0xCA20, 0xC7C4, 0xC8B8, 0xC951, 0xC5B8, 0xC6B9, 0xCA96,
+	0xC191, 0xC7CA, 0xC8BC, 0xC4DB, 0xC5BE, 0xC6C4, 0xCBED, 0xC383,
+	0xC970, 0xCA53, 0xC688, 0xC784, 0xCB64, 0xC432, 0xCA1A, 0xCAAE,
+	0xC74B, 0xC83D, 0xC92A, 0xC50B, 0xC613, 0xCA43, 0xC28F, 0xC91B,
+	0xC918, 0xC604, 0xC705, 0xCB12, 0xC377, 0xC834, 0xC944, 0xCA25,
+	0xC747, 0xC735, 0xCB5E, 0xC5B9, 0xCA16, 0xCACF, 0xC6FC, 0xC816,
+	0xCC3F, 0xC4B9, 0xCA2E, 0xCA69, 0xC809, 0xC917, 0xC9B0, 0xC5B7,
+	0xC6E0, 0xCB79, 0xC327, 0xC90C, 0xC96A, 0xC6D1, 0xC815, 0xCB42,
+	0xC852, 0xCCD0, 0xC6EC, 0xCAC9, 0xCAE1, 0xC868, 0xC99B, 0xCA52,
+	0xC704, 0xC744, 0xCC0A, 0xC5A7, 0xC9D1, 0xCA0C, 0xC75F, 0xC897,
+	0xC97D, 0xC53E, 0xC62E, 0xCB3F, 0xC453, 0xC8D4, 0xC914, 0xC621,
+	0xC790, 0xC87B, 0xC375, 0xC4E4, 0xCA74, 0xC007, 0xC7D2, 0xC835,
+	0xC501, 0xC657, 0xC774, 0xCB28, 0xC388, 0xC9A1, 0xC99E, 0xC6C1,
+	0xC729, 0xCB16, 0xC53C, 0xC91D, 0xCA7D, 0xC76E, 0xC8C7, 0xC8CB,
+	0xC583, 0xC61A, 0xCA70, 0xC414, 0xC845, 0xC9AF, 0xC65D, 0xC7EA,
+	0xC7EE, 0xC431, 0xC4FC, 0xC99D, 0xC2B3, 0xC768, 0xC8FF, 0xC544,
+	0xC70F, 0xC70C, 0xC2D0, 0xC3D9, 0xC8EF, 0xC16D, 0xC683, 0xC824,
+	0xC450, 0xC623, 0xC625, 0xC0C3, 0xC2A2, 0xC83A, 0xC59A, 0xC597,
+	0xC76F, 0xC323, 0xC539, 0xC96B, 0xBEA9, 0xC785, 0xC75F, 0xC4A6,
+	0xC4A8, 0xC6B4, 0xC1E9, 0xC445, 0xC8BD, 0xBCE6, 0xC6CD, 0xC6A2,
+	0xC3AD, 0xC3AF, 0xC5F7, 0xC9C1, 0xC347, 0xC832, 0xC80C, 0xC612,
+	0xC5E7, 0xC7DB, 0xC2AE, 0xC537, 0xC93B, 0xC246, 0xC781, 0xC792,
+	0xC550, 0xC525, 0xC723, 0xC1A3, 0xC892, 0xC88F, 0xC5D8, 0xC6C4,
+	0xC72C, 0xC48B, 0xC460, 0xC994, 0xC08E, 0xC802, 0xC7FF, 0xC56A,
+	0xC93F, 0xC1CA, 0xC7A8, 0xC856, 0xC5D5, 0xC5D2, 0xC774, 0xC32B,
+	0xC4FA, 0xC8B4, 0xC0E7, 0xC71A, 0xC83D, 0xC544, 0xC519, 0xC6E6,
+	0xC28B, 0xC4B4, 0xC869, 0xC035, 0xC68C, 0xC7FA, 0xC47F, 0xC495,
+	0xC630, 0xC1B4, 0xC446, 0xC8DC, 0xBF7C, 0xC5FB, 0xC76E, 0xC3E4,
+	0xC4A6, 0xC59F, 0xC105, 0xC3AB, 0xC858, 0xBEBE, 0xC563, 0xC6E0,
+	0xC344, 0xC534, 0xC509, 0xC024, 0xC2DE, 0xC7CC, 0xBE39, 0xC5B5,
+	0xC654, 0xC2A4, 0xC49E, 0xC473, 0xBF72, 0xC239, 0xC743, 0xBE56,
+	0xC5C4, 0xC5C1, 0xC1FF, 0xC403, 0xC419, 0xBEB6, 0xC196, 0xC6B7,
+	0xBE73, 0xC52E, 0xC5E6, 0xC683, 0xC368, 0xC4FC, 0xC8B1, 0xC11B,
+	0xC770, 0xC76D, 0xC4C5, 0xC61D, 0xC5F2, 0xC2C8, 0xC48E, 0xC82F,
+	0xC073, 0xC70C, 0xC7FE, 0xC431, 0xC58C, 0xC6B0, 0xC257, 0xC3F8,
+	0xC8BB, 0xBFC1, 0xC680, 0xC79A, 0xC521, 0xC523, 0xC64C, 0xC38A,
+	0xC387, 0xC834, 0xC17B, 0xC711, 0xC713, 0xC4BA, 0xC5E8, 0xC5BD,
+	0xC2F1, 0xC459, 0xC8BE, 0xC100, 0xC6AD, 0xC7A4, 0xC424, 0xC557,
+	0xC67B, 0xC280, 0xC3ED, 0xC837, 0xC08A, 0xC649, 0xC740, 0xC4EC,
+	0xC4F0, 0xC617, 0xC384, 0xC381, 0xC8C3, 0xC1CF, 0xC6DF, 0xC7A9,
+	0xBFD3, 0xBFD0, 0xC6AD, 0xBD32, 0xC44E, 0xC57F, 0xC160, 0xC2DC,
+	0xC41C, 0xBF53, 0xC124, 0xC621, 0xBCA5, 0xC3E7, 0xC4F0, 0xC26E,
+	0xC26B, 0xC3B0, 0xBED5, 0xC0AE, 0xC6B7, 0xBC18, 0xC4AD, 0xC5B1,
+	0xC1FD, 0xC342, 0xC47B, 0xC038, 0xC1C1, 0xC64E, 0xBE16, 0xC54D,
+	0xC54A, 0xC2D9, 0xC412, 0xC40F, 0xC17B, 0xC2CA, 0xC6BC, 0xBDCA,
+	0xC4E6, 0xC5BD, 0xC268, 0xC3A6, 0xC4AF, 0xC10C, 0xC259, 0xC728,
+	0xBF35, 0xC57A, 0xC651, 0xC33F, 0xC44B, 0xC548, 0xC1ED, 0xC308,
+	0xC791, 0xC05A, 0xC5ED, 0xC6B8, 0xC3E2, 0xC4E4, 0xC5BB, 0xC2C7,
+	0xC3D3, 0xC4B2, 0xC170, 0xC290, 0xC726, 0xBE34, 0xC47D, 0xC559,
+	0xC256, 0xC36C, 0xC44D, 0xC101, 0xC221, 0xC6C4, 0xBF61, 0xC518,
+	0xC5C5, 0xC300, 0xC40A, 0xC4E6, 0xC1E0, 0xC2CE, 0xC708, 0xC081,
+	0xC589, 0xC631, 0xC3A3, 0xC482, 0xC557, 0xC288, 0xC371, 0xC76F,
+	0xC138, 0xC5F5, 0xC69D, 0xC446, 0xC4F3, 0xC5C8, 0xC330, 0xC40F,
+	0xC7B3, 0xC212, 0xC63E, 0xC7A7, 0xC4B7, 0xC564, 0xC6DA, 0xC3AD,
+	0xC485, 0xC88E, 0xC2BA, 0xC74B, 0xC7EB, 0xC5D3, 0xC67B, 0xC71E,
+	0xC444, 0xC5A1, 0xC8CD, 0xC335, 0xC791, 0xC82A, 0xC63F, 0xC6E2,
+	0xC4B8, 0xC565, 0xC212, 0xC3D6, 0xC753, 0xC0EC, 0xC5E0, 0xC683,
+	0xC456, 0xC508, 0xC5D6, 0xC372, 0xC44C, 0xC4F7, 0xC286, 0xC33D,
+	0xBF41, 0xC06C, 0xC572, 0xBDF5, 0xC3E8, 0xC495, 0xC21A, 0xC2FC,
+	0xC3B3, 0xC121, 0xC210, 0xC661, 0xBEF0, 0xC459, 0xC5AF, 0xC2C2,
+	0xC377, 0xC4D7, 0xC1A6, 0xC28B, 0xC41B, 0xC0AB, 0xC19C, 0xC5F8,
+	0xBE6D, 0xC49B, 0xC548, 0xC309, 0xC3B9, 0xC46B, 0xC156, 0xC2FA,
+	0xBF2F, 0xC02D, 0xC58F, 0xBCD0, 0xBF25, 0xC4D8, 0xBB2E, 0xC293,
+	0xC348, 0xC0E0, 0xC1A4, 0xC289, 0xBEE1, 0xC0AB, 0xC521, 0xBD97,
+	0xC3C1, 0xC46C, 0xC165, 0xC302, 0xC38F, 0xC06C, 0xC216, 0xC2D0,
+	0xBF64, 0xC05D, 0xC55E, 0xBE54, 0xC403, 0xC4AE, 0xC1D7, 0xC349,
+	0xC01C, 0xC0E3, 0xC1A2, 0xBE12, 0xBFE7, 0xC4F3, 0xBCBE, 0xC2E2,
+	0xC443, 0xC166, 0xC21E, 0xC2D8, 0xBFA3, 0xC131, 0xC1EE, 0xBE98,
+	0xC063, 0xC535, 0xBD85, 0xC329, 0xC480, 0xC0F2, 0xC265, 0xC3CB,
+	0xC021, 0xC1A3, 0xC5FA, 0xBF20, 0xC41E, 0xC54A, 0xBE10, 0xC36B,
+	0xB92E, 0xC21F, 0xC2AC, 0xBFAB, 0xC072, 0xC1EF, 0xBED2, 0xBF9C,
+	0xC460, 0xBCAC, 0xC323, 0xC3AB, 0xC0F3, 0xC266, 0xC2F3, 0xC022,
+	0xC17E, 0xC236, 0xC36F, 0xBFEF, 0xC16F, 0xC5A1, 0xBF19, 0xC46E,
+	0xBC1C, 0xC2AD, 0xC3BB, 0xC075, 0xC1EB, 0xC308, 0xBFA4, 0xC0FE,
+	0xC271, 0xBEA0, 0xC034, 0xC488, 0xBDC2, 0xC378, 0xC3FB, 0xC17F,
+	0xC2BB, 0xC348, 0xC0B5, 0xC205, 0xC28B, 0xBFE9, 0xC085, 0xBD74,
+	0xBE48, 0xC394, 0xBB70, 0xC24F, 0xC302, 0xC06F, 0xC1BA, 0xC245,
+	0xBFA0, 0xC03A, 0xC18A, 0xBDD1, 0xBF6B, 0xC455, 0xBCE9, 0xC296,
+	0xC3A2, 0xC149, 0xC1DB, 0xC315, 0xBFF1, 0xC13F, 0xBD83, 0xBF1D,
+	0xC07A, 0xBC9D, 0xBE4B, 0xC361, 0xBA87, 0xC21E, 0xC2A9, 0xC040,
+	0xC0D0, 0xC214, 0xBF71, 0xC0C9, 0xC159, 0xBDCD, 0xBF67, 0xC401,
+	0xBCEC, 0xC2EE, 0xC36F, 0xC118, 0xC233, 0xBF28, 0xC055, 0xC19C,
+	0xBE56, 0xBFB6, 0xC0DE, 0xBCA0, 0xBEE9, 0xC38C, 0xBBB7, 0xC1ED,
+	0xC2FC, 0xC00F, 0xC132, 0xC246, 0xBF42, 0xC098, 0xC4B2, 0xBEA0,
+	0xBFD0, 0xC427, 0xBDC9, 0xC319, 0xBA69, 0xC17A, 0xC289, 0xBFBA,
+	0xC0E2, 0xC1F9, 0xBEED, 0xC01D, 0xC444, 0xBD7D, 0xBF80, 0xC3B9,
+	0xBD71, 0xC224, 0xC32E, 0xC073, 0xC18F, 0xC322, 0xC06C, 0xC183,
+	0xC531, 0xBFCD, 0xC3D6, 0xBCFA, 0xBE67, 0xC34B, 0xBC46, 0xC25B,
+	0xC2BB, 0xC39A, 0xC474, 0xC22B, 0xC30F, 0xC081, 0xC224, 0xC284,
+	0xC075, 0xC191, 0xC512, 0xBFDB, 0xC045, 0xC491, 0xBE7A, 0xC352,
+	0xC406, 0xC241, 0xC2C2, 0xC0C2, 0xC1AE, 0xC295, 0xBFFF, 0xC11B,
+	0xC207, 0xBF62, 0xC086, 0xC423, 0xBEC0, 0xBFE9, 0xC417, 0xBE20,
+	0xC2B4, 0xC391, 0xC13D, 0xC224, 0xBFAF, 0xC0A5, 0xC196, 0xBF14,
+	0xC00D, 0xC127, 0xBE49, 0xBF70, 0xC3A9, 0xBD9D, 0xC267, 0xC3A2,
+	0xBCF3, 0xC23A, 0xBA05, 0xC0BB, 0xC1A7, 0xBF2A, 0xC025, 0xC13F,
+	0xBE8F, 0xBF8D, 0xC0AC, 0xBDEA, 0xBEF0, 0xC334, 0xBD45, 0xC1EF,
+	0xBA66, 0xC072, 0xC1BD, 0xB9A5, 0xBFDA, 0xC12F, 0xBE13, 0xBFCE,
+	0xC0C2, 0xBD6E, 0xBF38, 0xC02C, 0xBCC4, 0xBE96, 0xC2BC, 0xBC17,
+	0xC1D5, 0xBA06, 0xC07C, 0xC147, 0xBEED, 0xBFEB, 0xC0DA, 0xBE52,
+	0xBF4E, 0xC042, 0xBDAD, 0xBEB3, 0xC32B, 0xBD0A, 0xBEA9, 0xBA60,
+	0xBBBA, 0xC158, 0xB8AF, 0xC001, 0xC151, 0xBE6F, 0xBF6B, 0xC0C0,
+	0xBDCF, 0xBF5F, 0xC02D, 0xBD27, 0xBEC4, 0xC2B8, 0xBC7D, 0xC1CF,
+	0xB9CD, 0xBBD5, 0xC162, 0xB909, 0xBFE7, 0xC0D6, 0xBE80, 0xBF7C,
+	0xC0CF, 0xBDE0, 0xBEE1, 0xC039, 0xBD42, 0xBED5, 0xBAD7, 0xBC9A,
+	0xBE3A, 0xC290, 0xBBED, 0xC14D, 0xC289, 0xBFF8, 0xC141, 0xBE96,
+	0xBFEC, 0xC0B5, 0xBDF6, 0xBF56, 0xC048, 0xBD53, 0xBEC2, 0xBFB4,
+	0xBCB0, 0xBE4D, 0xC279, 0xBCA6, 0xC1B8, 0xB9B8, 0xC068, 0xC12C,
+	0xB8F4, 0xBFD7, 0xC0C1, 0xBE07, 0xBF67, 0xC030, 0xBE02, 0xBED3,
+	0xBBB5, 0xBD62, 0xBECC, 0xBB38, 0xBD58, 0xC19E, 0xBA88, 0xBCB5,
+	0xC192, 0xBA7C, 0xC049, 0xC10B, 0xBE88, 0xBFDC, 0xBD14, 0xBE7C,
+	0xBF4D, 0xBC6E, 0xBDE3, 0xBF41, 0xBC67, 0xBDD7, 0xBEAD, 0xBBBF,
+	0xBD39, 0xC1D9, 0xBB11, 0xC0B9, 0xB8B1, 0xBF61, 0xC028, 0xB72A,
+	0xBEF6, 0xC021, 0xBD8C, 0xBE5D, 0xBF8D, 0xBCEB, 0xBE56, 0xBAC3,
+	0xBC73, 0xBE4A, 0xBA3C, 0xBBD0, 0xC0FE, 0xBA37, 0xBBC6, 0xC0F4,
+	0xB97F, 0xBFA6, 0xC068, 0xBE71, 0xBF3B, 0xBC96, 0xBDD8, 0xBF34,
+	0xBC8C, 0xBD63, 0xBE9B, 0xBBE9, 0xBD5E, 0xBE96, 0xBB40, 0xBCBB,
+	0xB922, 0xBAC3, 0xC075, 0xB867, 0xBEC0, 0xBFEB, 0xB7A2, 0xBEB9,
+	0xBFDF, 0xBD7C, 0xBEAF, 0xBFD8, 0xBCE0, 0xBE3F, 0xBB87, 0xBCD4,
+	0xBDA8, 0xBAE1, 0xBC61, 0xC11B, 0xBA61, 0xBBBB, 0xC091, 0xB9AE,
+	0xBF8D, 0xC08A, 0xBE34, 0xBF62, 0xBCF4, 0xBE2F, 0xBF58, 0xBCED,
+	0xBE23, 0xBA84, 0xBC75, 0xC104, 0xBA7F, 0xBBD4, 0xC0FD, 0xB9D1,
+	0xBFDA, 0xB798, 0xBE48, 0xBFD0, 0xB78C, 0xBE3C, 0xBF41, 0xBD01,
+	0xBE37, 0xBED6, 0xBC65, 0xBDA0, 0xBA98, 0xBC5B, 0xBD99, 0xBA93,
+	0xBC54, 0xBD8D, 0xB9E5, 0xBBDC, 0xC055, 0xB9DB, 0xBFB2, 0xB7AC,
+	0xB9D4, 0xBF49, 0xB65C, 0xBE1B, 0xBF1E, 0xBCDB, 0xBE0F, 0xBF12,
+	0xBC68, 0xBD7D, 0xBA79, 0xBBC9, 0xBD71, 0xBA6D, 0xBBC2, 0xBD6C,
+	0xBA68, 0xBBB8, 0xC085, 0xBA5C, 0xBBB1, 0xB7C0, 0xBA57, 0xBEFD,
+	0xB7B9, 0xBE57, 0xBEF6, 0xB7AF, 0xBDEC, 0xBF4E, 0xBCB3, 0xBDBE,
+	0xBAF7, 0xBCA7, 0xBDB2, 0xBAEB, 0xBC0D, 0xBDAD, 0xBA49, 0xBC03,
+	0xBDA6, 0xBA3D, 0xBBFC, 0xC091, 0xBA38, 0xBF96, 0xB84B, 0xBA2C,
+	0xBF30, 0xB844, 0xBE04, 0xBF02, 0xBCF4, 0xBE61, 0xBF5A, 0xBCED,
+	0xBE55, 0xBBA7, 0xBCBF, 0xBDEC, 0xBBA0, 0xBCB3, 0xBDBE, 0xBB2A,
+	0xBCAE, 0xC0FC, 0xBAF7, 0xBCA2, 0xB8AA, 0xBAED, 0xBFA2, 0xB919,
+	0xBEA2, 0xBF77, 0xB912, 0xBE79, 0xBFCA, 0xBD6C, 0xBECF, 0xBC59,
+	0xBDC9, 0xBE66, 0xBBE6, 0xBD5B, 0xBE5C, 0xBBB8, 0xBD2D, 0xBE31,
+	0xBC18, 0xBD26, 0xBA87, 0xBC13, 0xC04B, 0xBA13, 0xBF52, 0xC03F,
+	0xBE16, 0xBB96, 0xBCE7, 0xC0FE, 0xBBCF, 0xBD42, 0xC0F9, 0xBBC8,
+	0xC003, 0xBA34, 0xBF0F, 0xBFFC, 0xBA01, 0xBF03, 0xC02B, 0xBE64,
+	0xBEFE, 0xB8C0, 0xBDFB, 0xBF2D, 0xBCF2, 0xBE2F, 0xBF26, 0xBCC4,
+	0xBE25, 0xBBAC, 0xBD1F, 0xBE1E, 0xBBA5, 0xBD18, 0xBDF0, 0xBC05,
+	0xBCAC, 0xBE4B, 0xBB94, 0xBCE0, 0xBA07, 0xBBCD, 0xBCD9, 0xBA43,
+	0xBBC6, 0xBFD4, 0xBAA8, 0xBBBC, 0xB90C, 0xBA32, 0xBF33, 0xB88B,
+	0xBE37, 0xBF05, 0xB858, 0xBE2D, 0xB68D, 0xBD27, 0xBE02, 0xB707,
+	0xBD22, 0xBE5A, 0xBC14, 0xBCF4, 0xB3C3, 0xBC0F, 0xBD4F, 0xBAF4,
+	0xBBDC, 0xBD43, 0xBA80, 0xBC3A, 0xBD77, 0xBABC, 0xBC0E, 0xB922,
+	0xBB1A, 0xBC67, 0xB98A, 0xBAAB, 0xBC62, 0xB985, 0xBB4C, 0xB850,
+	0xB979, 0xBB47, 0xB7CF, 0xBA29, 0xBE96, 0xB815, 0xBD5E, 0xB5CB,
+	0xB880, 0xBDF2, 0xB645, 0xBCB0, 0xBD8B, 0xB6BC, 0xBCE7, 0xB3BF,
+	0xBB9F, 0xBCDD, 0xB3B5, 0xBBD1, 0xBD14, 0xBA7C, 0xBBCC, 0xBD0A,
+	0xBAB3, 0xBC03, 0xB94F, 0xBAAC, 0xBBF7, 0xB98B, 0xBAE3, 0xBC90,
+	0xB986, 0xBADE, 0xB7E1, 0xB9C2, 0xBB15, 0xB84E, 0xBA25, 0xBB73,
+	0xB818, 0xB9F2, 0xB68A, 0xB8F5, 0xBA55, 0xB683, 0xB87E, 0xBDF0,
+	0xBBD7, 0xBCB5, 0xBA87, 0xBBD2, 0xB920, 0xBB28, 0xBC09, 0xB95C,
+	0xBAB9, 0xBC3B, 0xB998, 0xBB53, 0xB89B, 0xBA00, 0xBB27, 0xB81F,
+	0xBA37, 0xBB85, 0xB8D2, 0xBA30, 0xB6DC, 0xB8C6, 0xBA67, 0xB797,
+	0xB907, 0xBDD2, 0xB78B, 0xB9B0, 0xB5CB, 0xB841, 0xBCF2, 0xB645,
+	0xB80D, 0xBD26, 0xB6FE, 0xBC48, 0xB461, 0xB67F, 0xBC7F, 0xB4AA,
+	0xBB9C, 0xBD11, 0xB527, 0xBBCE, 0xB244, 0xBAE8, 0xBC05, 0xB3BA,
+	0xBB1F, 0xBBFB, 0xBA34, 0xBB1A, 0xB0F4, 0xB9C2, 0xBB4C, 0xB8CA,
+	0xBA66, 0xBB83, 0xB906, 0xBA9D, 0xB796, 0xB942, 0xBAD4, 0xB847,
+	0xB9E4, 0xBB0B, 0xB881, 0xBA1B, 0xB709, 0xB92A, 0xBA16, 0xB704,
+	0xB8B8, 0xBA4D, 0xB7B3, 0xB95F, 0xB5B6, 0xB7F4, 0xB996, 0xB672,
+	0xB8A0, 0xB9D0, 0xB72B, 0xB8DA, 0xB59E, 0xB76C, 0xB916, 0xB51C,
+	0xB81B, 0xBCCC, 0xB5DD, 0xB857, 0xB436, 0xB696, 0xBC25, 0xB504,
+	0xB6DA, 0xBC57, 0xB548, 0xBB7B, 0xB39E, 0xB609, 0xBBAD, 0xB46C,
+	0xBACE, 0xBBE4, 0xB532, 0xBB63, 0xB214, 0xBA84, 0xBB9A, 0xB2F4,
+	0xBAB6, 0xBBCC, 0xB924, 0xBAEB, 0xB16C, 0xBA04, 0xBB22, 0xB867,
+	0xBA3E, 0xBB59, 0xB90C, 0xBA75, 0xB7A8, 0xB948, 0xBAA7, 0xB852,
+	0xB9BE, 0xBADC, 0xB314, 0xB9FA, 0xBB13, 0xB365, 0xBA2F, 0xBBDF,
+	0xB9AB, 0xBAC9, 0xB18C, 0xB9E0, 0xBB37, 0xB8F6, 0xBA17, 0xBB6C,
+	0xB92B, 0xBA4E, 0xB788, 0xB967, 0xBABF, 0xB873, 0xB99C, 0xBAF6,
+	0xB8AD, 0xBA14, 0xB770, 0xB8E7, 0xBAAC, 0xB7F0, 0xB9C5, 0xBB1A,
+	0xB89A, 0xB9FA, 0xB79E, 0xB910, 0xBA31, 0xB7DB, 0xB94A, 0xB6DC,
+	0xB817, 0xB981, 0xB71B, 0xB892, 0xB9F7, 0xB809, 0xB973, 0xB656,
+	0xB843, 0xB9A8, 0xB695, 0xB87A, 0xB9DF, 0xB786, 0xB8F5, 0xB63E,
+	0xB7C2, 0xB92F, 0xB6C1, 0xB8A6, 0xB9A5, 0xB700, 0xB921, 0xB66F,
+	0xB7EE, 0xB956, 0xB6AE, 0xB869, 0xB5A7, 0xB72E, 0xB8A3, 0xB5E6,
+	0xB81A, 0xB97F, 0xB6DC, 0xB856, 0xB519, 0xB75F, 0xB8CA, 0xB617,
+	0xB799, 0xBC8C, 0xB69F, 0xB817, 0xB54F, 0xB78B, 0xB8F8, 0xB648,
+	0xB7C5, 0xBC55, 0xB687, 0xB840, 0xB580, 0xB70A, 0xBC10, 0xB5BF,
+	0xB788, 0xB464, 0xB6F9, 0xBB6D, 0xB5B1, 0xB736, 0xBBD6, 0xB5F0,
+	0xB7B4, 0xB49A, 0xB72A, 0xBBC8, 0xB5E4, 0xB7A8, 0xBC2F, 0xB66A,
+	0xBB25, 0xB51C, 0xB6A4, 0xBB91, 0xB559, 0xBB17, 0xBBFA, 0xB696,
+	0xBB83, 0xB54D, 0xB719, 0xBBEC, 0xB5D3, 0xBADD, 0xBC53, 0xB656,
+	0xB80B, 0xB9A8, 0xB745, 0xB886, 0xBCC7, 0xB7FF, 0xB8FA, 0xBD29,
+	0xB878, 0xB96E, 0xB705, 0xB8EC, 0xB9DF, 0xB82B, 0xB962, 0xB6F7,
+	0xB8DE, 0xB9D1, 0xB775, 0xB954, 0xBA3F, 0xB82D, 0xB9C5, 0xB767,
+	0xB8A1, 0xBA31, 0xB7E0, 0xB917, 0xB756, 0xB893, 0xB986, 0xB7D2,
+	0xB909, 0xB69B, 0xB887, 0xB978, 0xB719, 0xB8FB, 0xBA23, 0xB7D4,
+	0xB96C, 0xB70B, 0xB84A, 0xB97A, 0xB789, 0xB8FD, 0xB6FD, 0xB83C,
+	0xB96C, 0xB77B, 0xB8EF, 0xBA17, 0xB82E, 0xB960, 0xB6C2, 0xB8E1,
+	0xBA0B, 0xB77D, 0xB952, 0xB092, 0xB830, 0xB960, 0xB76F, 0xB8A4,
+	0xB081, 0xB822, 0xB954, 0xB24D, 0xB8D5, 0xB9FD, 0xB816, 0xB946,
+	0xB16C, 0xB8C9, 0xB9F1, 0xB2D4, 0xB8D7, 0xB160, 0xB3B1, 0xB982,
+	0xB1F9, 0xB8CB, 0xBA28, 0xB3A5, 0xB974, 0xB1ED, 0xB478, 0xBA1A,
+	0xB397, 0xB968, 0xB1E1, 0xB46C, 0xB976, 0xB3D2, 0xB534, 0xBA56,
+	0xB4A2, 0xB9A4, 0xB2B5, 0xB56A, 0xBA48, 0xB3D9, 0xB62D, 0xB2F5,
+	0xB55C, 0xB6EB, 0xB3CD, 0xB61F, 0xB2E7, 0xB49D, 0xB71E, 0xB3C1,
+	0xB563, 0xB72C, 0xB4D3, 0xB665, 0xB3FA, 0xB599, 0xB720, 0xB4C5,
+	0xB659, 0xB3EE, 0xB5CF, 0xB751, 0xB500, 0xB68D, 0xB841, 0xB5C3,
+	0xB782, 0xB851, 0xB5D1, 0xB792, 0xB502, 0xB6CE, 0xB87D, 0xB607,
+	0xB7C3, 0xB53D, 0xB6FF, 0xB8AB, 0xB63D, 0xB7F4, 0xB8BE, 0xB732,
+	0xB829, 0xB66E, 0xB7A9, 0xB8EA, 0xB6E5, 0xB830, 0xB0D9, 0xB776,
+	0xB918, 0xB6B4, 0xB861, 0xB11C, 0xB7A2, 0xB8D0, 0xB24E, 0xB850,
+	0xB15F, 0xB370, 0xB8D7, 0xB28E, 0xB822, 0xB9B5, 0xB3AB, 0xB93D,
+	0xB2CC, 0xB4BB, 0xB94D, 0xB3E4, 0xB510, 0xB1F8, 0xB43E, 0xB610,
+	0xB31A, 0xB546, 0xB236, 0xB474, 0xB680, 0xB39D, 0xB5B9, 0xB6F7,
+	0xB4AA, 0xB6B1, 0xB3D8, 0xB5EF, 0xB701, 0xB525, 0xB641, 0xB453,
+	0xB577, 0xB76C, 0xB490, 0xB6AF, 0xB391, 0xB5AD, 0xB760, 0xB4E3,
+	0xB71F, 0xAD7F, 0xB620, 0xB76C, 0xB556, 0xB670, 0xB850, 0xB612,
+	0xB7D5, 0xAFD5, 0xB6E0, 0xB81F, 0xB15F, 0xB752, 0xB06D, 0xB318,
+	0xB885, 0xB1EC, 0xB7D0, 0xB0B0, 0xB351, 0xB842, 0xB274, 0xB3ED,
+	0xB020, 0xB2CE, 0xB575, 0xB1A2, 0xB468, 0xB5C7, 0xB351, 0xB527,
+	0xB274, 0xB4E3, 0xB677, 0xB411, 0xB575, 0xB2F7, 0xB466, 0xB66B,
+	0xB3C0, 0xB625, 0xB330, 0xB520, 0xB672, 0xB411, 0xB5B2, 0xB726,
+	0xB554, 0xB6E0, 0xB4CE, 0xB662, 0xB7A4, 0xB560, 0xB6EC, 0xADEB,
+	0xB656, 0xB437, 0xB610, 0xB755, 0xB54D, 0xB69A, 0xB443, 0xB59D,
+	0xB724, 0xB53F, 0xB6CB, 0xAE7A, 0xB685, 0xB7C7, 0xB100, 0xB70F,
+	0xAF6C, 0xB1D7, 0xB7CE, 0xB186, 0xB740, 0xB09E, 0xB2C1, 0xB7FA,
+	0xB14D, 0xB3CA, 0xB045, 0xB381, 0xB523, 0xB264, 0xB45D, 0xB62F,
+	0xB34B, 0xB4EF, 0xB29D, 0xB491, 0xB5E6, 0xB448, 0xB5A2, 0xB338,
+	0xB51C, 0xB6A4, 0xB3FA, 0xB5EB, 0xB3B3, 0xB50E, 0xB6AD, 0xB50C,
+	0xB61A, 0xAD8B, 0xB613, 0xB716, 0xB06A, 0xB6D5, 0xAF27, 0xB1F0,
+	0xB794, 0xB02E, 0xB2D7, 0xAF6D, 0xB22E, 0xB3E0, 0xB1E2, 0xB397,
+	0xB068, 0xB309, 0xB4F0, 0xB18C, 0xB3E8, 0xB5BA, 0xB2FD, 0xB4FC,
+	0xB2FB, 0xB45E, 0xB640, 0xB415, 0xB52B, 0xB307, 0xB524, 0xB632,
+	0xB421, 0xB5EE, 0xACFA, 0xB56D, 0xB6B0, 0xAF97, 0xB66F, 0xAF3E,
+	0xB561, 0xB731, 0xB0D7, 0xB67B, 0xAEE2, 0xB253, 0xB7AA, 0xB113,
+	0xB3B7, 0xB0C4, 0xB28C, 0xB4C9, 0xB240, 0xB3A6, 0xB591, 0xB362,
+	0xB54D, 0xB2D6, 0xB437, 0xB612, 0xB430, 0xB519, 0xB30A, 0xB4FD,
+	0xB693, 0xB479, 0xB5C7, 0xB3DB, 0xB583, 0xB711, 0xB4AD, 0xB646,
+	0xAEB8, 0xB602, 0xB750, 0xB0B9, 0xB6C4, 0xB04D, 0xB2F8, 0xB7C9,
+	0xB1CA, 0xB3D2, 0xB5B0, 0xB349, 0xB49D, 0xB636, 0xB49B, 0xB62F,
+	0xAE5D, 0xB526, 0xB6B4, 0xB0D4, 0xB673, 0xAF3B, 0xB206, 0xB6F8,
+	0xB1FD, 0xB33B, 0xB079, 0xB2DA, 0xB48B, 0xB293, 0xB3C7, 0xB162,
+	0xB36B, 0xB50F, 0xB324, 0xB4CD, 0xB240, 0xB434, 0xB593, 0xB3F0,
+	0xB58C, 0xADC8, 0xB4BD, 0xB614, 0xAF68, 0xB5D5, 0xAF16, 0xB195,
+	0xB658, 0xB059, 0xB275, 0xB052, 0xB26E, 0xB422, 0xB13F, 0xB306,
+	0xB138, 0xB2FF, 0xB4AB, 0xB21B, 0xB427, 0xB1D1, 0xB38B, 0xB4ED,
+	0xB384, 0xB4EB, 0xABD3, 0xB417, 0xB571, 0xAF43, 0xB56A, 0xAD99,
+	0xB036, 0xB67A, 0xB034, 0xB5AE, 0xAEE5, 0xB204, 0xB6B9, 0xB0D0,
+	0xB377, 0xB0C9, 0xB298, 0xB402, 0xB291, 0xB3FE, 0xB1AA, 0xB324,
+	0xB514, 0xB31B, 0xB445, 0xB23E, 0xB43E, 0xB55B, 0xB367, 0xB554,
+	0xADC4, 0xB4C2, 0xB65F, 0xAFC2, 0xB59D, 0xAFC0, 0xB198, 0xB6A3,
+	0xB191, 0xB30B, 0xB0A4, 0xB304, 0xB42C, 0xB225, 0xB425, 0xB1DB,
+	0xB34E, 0xB53B, 0xB34C, 0xB46C, 0xB26D, 0xB46A, 0xB57F, 0xB393,
+	0xB540, 0xAEA7, 0xB4AC, 0xB649, 0xB090, 0xB5BD, 0xAF9B, 0xB20C,
+	0xB68B, 0xB1C7, 0xB337, 0xB120, 0xB333, 0xB458, 0xB256, 0xB414,
+	0xB5B4, 0xB689, 0xB16D, 0xB680, 0xB166, 0xB29E, 0xB454, 0xB297,
+	0xB44D, 0xB1F5, 0xB3B8, 0xB523, 0xB3B4, 0xB494, 0xB2DC, 0xB48D,
+	0xAD6E, 0xB3FB, 0xB563, 0xB013, 0xB55A, 0xAF19, 0xB14F, 0xB628,
+	0xB14B, 0xB27E, 0xB05E, 0xB27C, 0xB3F2, 0xB275, 0xB35D, 0xB193,
+	0xB359, 0xB4C7, 0xB2BF, 0xB435, 0xAD5A, 0xB42E, 0xB591, 0xAFF5,
+	0xB502, 0xAF00, 0xB134, 0xB61E, 0xB12D, 0xB2BB, 0xB045, 0xB21E,
+	0xB03E, 0xB217, 0xB393, 0xB17A, 0xB2FE, 0xAA45, 0xB2F7, 0xB468,
+	0xAD91, 0xB3D3, 0xAD8A, 0xAFDF, 0xB535, 0xAFD8, 0xB1B4, 0xAEE0,
+	0xB0D4, 0xB331, 0xB0CD, 0xB297, 0xB025, 0xB1FC, 0xB3CB, 0xB1B5,
+	0xB371, 0xAC03, 0xB32F, 0xB49B, 0xAE74, 0xB494, 0xAE70, 0xB067,
+	0xAD6F, 0xB060, 0xB1F4, 0xAF72, 0xB152, 0xAEC5, 0xB14B, 0xB2CF,
+	0xB0AB, 0xB2C8, 0xA8C7, 0xB230, 0xB3F5, 0xACFE, 0xB365, 0xABE8,
+	0xAF0C, 0xB48A, 0xAF05, 0xB0A7, 0xAE52, 0xB0A5, 0xB22A, 0xAFFD,
+	0xB228, 0xAFF6, 0xB18B, 0xB358, 0xB184, 0xB300, 0xAB6F, 0xB2BE,
+	0xAA46, 0xAD9E, 0xB3EB, 0xAD97, 0xB038, 0xACDE, 0xAF90, 0xB180,
+	0xAF8E, 0xB123, 0xAE9D, 0xB0DE, 0xB2EF, 0xB0D7, 0xB259, 0xA9C5,
+	0xB255, 0xB389, 0xAD26, 0xAF8A, 0xB4F7, 0xAF83, 0xB11B, 0xAED8,
+	0xB114, 0xB2E4, 0xB10D, 0xB24F, 0xB06F, 0xB248, 0xB37C, 0xB241,
+	0xB375, 0xAD67, 0xB336, 0xAC5E, 0xAF18, 0xB456, 0xAF11, 0xB105,
+	0xAE66, 0xB067, 0xB23D, 0xB060, 0xB239, 0xAFBD, 0xB1A3, 0xB32B,
+	0xB19C, 0xB324, 0xABE5, 0xB2CF, 0xABE3, 0xAE60, 0xB3BC, 0xAE59,
+	0xB055, 0xADAB, 0xB051, 0xB227, 0xAFB0, 0xB18F, 0xAFA9, 0xB18D,
+	0xB313, 0xB186, 0xB2BB, 0xAC27, 0xAE97, 0xB3F6, 0xAE4C, 0xB04B,
+	0xADE7, 0xB044, 0xAD97, 0xAFE4, 0xB182, 0xAF9A, 0xB17B, 0xAF3A,
+	0xB177, 0xB2FD, 0xAC1F, 0xB26A, 0xABB1, 0xAE88, 0xB3DE, 0xAE81,
+	0xB035, 0xADD3, 0xB02E, 0xADD1, 0xAFCE, 0xB1C0, 0xAF86, 0xB165,
+	0xA8DC, 0xB123, 0xB2AE, 0xAC5E, 0xB2A7, 0xABA2, 0xAE74, 0xB392,
+	0xAE6D, 0xB021, 0xAE69, 0xB01A, 0xB1B1, 0xB016, 0xB1AC, 0xB00F,
+	0xB1A5, 0xA930, 0xB10F, 0xB2E9, 0xAC4F, 0xAEC6, 0xAC48, 0xAEBF,
+	0xB0FD, 0xAE5C, 0xB064, 0xAE57, 0xB05D, 0xB1EE, 0xB05B, 0xB1EA,
+	0xAFFB, 0xB1A5, 0xAA42, 0xAD9E, 0xB2E6, 0xACED, 0xAF51, 0xACE6,
+	0xAF4A, 0xB13D, 0xAEA9, 0xB0A9, 0xAEA2, 0xB0A2, 0xB27A, 0xB09B,
+	0xAE99, 0xB097, 0xB1E5, 0xAAF5, 0xB1DE, 0xAAF3, 0xAD88, 0xB318,
+	0xAD3B, 0xAF92, 0xACD0, 0xAF90, 0xB13D, 0xAEEF, 0xB0E0, 0xAEE8,
+	0xB0DE, 0xA87D, 0xB0D7, 0xB271, 0xAC0C, 0xAED8, 0xAC05, 0xAE34,
+	0xB035, 0xAE2D, 0xB02E, 0xAE2B, 0xB02C, 0xADC3, 0xB025, 0xB174,
+	0xAA0D, 0xB16D, 0xAA06, 0xAD10, 0xB26E, 0xAD09, 0xAF77, 0xAD02,
+	0xAF19, 0xB0C9, 0xAED6, 0xB0C5, 0xAECF, 0xB0BE, 0xA852, 0xB027,
+	0xB1C7, 0xAC41, 0xAE63, 0xAB8A, 0xAE5C, 0xB017, 0xADB8, 0xB013,
+	0xADB3, 0xB00C, 0xA6D9, 0xAF72, 0xB118, 0xAA4C, 0xB116, 0xAA45,
+	0xAD9C, 0xB29D, 0xACF5, 0xAF5E, 0xACEE, 0xAF57, 0xB0FD, 0xAF50,
+	0xB0A7, 0xAEB6, 0xB067, 0xA967, 0xACD9, 0xB244, 0xACD5, 0xAEA6,
+	0xAC28, 0xAE9F, 0xB050, 0xAE98, 0xB049, 0xAE96, 0xB009, 0xA806,
+	0xB002, 0xB19D, 0xAAF5, 0xB196, 0xAAF3, 0xADE2, 0xAFF2, 0xADDD,
+	0xAFEB, 0xADD9, 0xAFE9, 0xB149, 0xAF8E, 0xB142, 0xAAD7, 0xB13D,
+	0xAA1A, 0xAD24, 0xB286, 0xAD1D, 0xAF3B, 0xAD1B, 0xAF34, 0xB09C,
+	0xAF32, 0xB09A, 0xAF2B, 0xB093, 0xA9FA, 0xB0E0, 0xB230, 0xAC5A,
+	0xAEDA, 0xAC55, 0xAED8, 0xB043, 0xAED1, 0xB03C, 0xAECA, 0xB03A,
+	0xAEC8, 0xAC9D, 0xAE6A, 0xAC9B, 0xAE24, 0xB079, 0xAE20, 0xB023,
+	0xA845, 0xABE5, 0xB18A, 0xABDE, 0xAE67, 0xABDC, 0xAE62, 0xABD5,
+	0xAE5E, 0xB020, 0xADC1, 0xB019, 0xA896, 0xAB7E, 0xB131, 0xAB77,
+	0xAE08, 0xAB75, 0xAE06, 0xAB6E, 0xADFF, 0xAFC2, 0xADF8, 0xAFBD,
+	0xA7AF, 0xAFB9, 0xB114, 0xABBB, 0xADA9, 0xABB9, 0xADA2, 0xAB09,
+	0xADA0, 0xAFBA, 0xADF3, 0xAFB3, 0xA808, 0xAFB1, 0xB10A, 0xAB54,
+	0xB0CA, 0xAB4F, 0xAD9D, 0xAB4B, 0xAD96, 0xAF61, 0xAD94, 0xAFAE,
+	0xADE4, 0xAFA7, 0xB0C7, 0xAAEF, 0xB111, 0xAAED, 0xAD7D, 0xAB48,
+	0xAD37, 0xAF57, 0xAD8C, 0xAFA4, 0xAD85, 0xAFA2, 0xA852, 0xAB95,
+	0xB107, 0xAB8E, 0xADCF, 0xAAE3, 0xAD73, 0xAFA1, 0xAD87, 0xAF9A,
+	0xAD80, 0xAF98, 0xA7E7, 0xAF3F, 0xB0FD, 0xABE8, 0xADCA, 0xABE6,
+	0xADC5, 0xAF99, 0xAD7F, 0xAF95, 0xADD2, 0xAF8E, 0xA910, 0xAF50,
+	0xB0F3, 0xABE8, 0xAE19, 0xAC3E, 0xADC0, 0xAFE1, 0xADCF, 0xAF8D,
+	0xAE24, 0xAF9C, 0xA910, 0xAFE9, 0xB14B, 0xAC3D, 0xB147, 0xAC3B,
+	0xAE28, 0xAFA0, 0xAE21, 0xAFE8, 0xAE71, 0xB033, 0xAE6A, 0xAFDF,
+	0xB141, 0xAC97, 0xB155, 0xACEA, 0xAE75, 0xB29D, 0xAEC0, 0xB030,
+	0xAE67, 0xAC96, 0xAE7B, 0xACEE, 0xAEC8, 0xB085, 0xAEC4, 0xB031,
+	0xAA96, 0xAC9C, 0xAAF1, 0xACF2, 0xAECC, 0xAD42, 0xAF17, 0xAD40,
+	0xAF13, 0xB044, 0xAED2, 0xB08C, 0xABB2, 0xADA0, 0xABAB, 0xAD99,
+	0xAF14, 0xAD92, 0xAF28, 0xADA6, 0xAF73, 0xA930, 0xAC09, 0xB0E4,
+	0xAC07, 0xAD98, 0xABC1, 0xAE01, 0xAC14, 0xAE4C, 0xAF6D, 0xA9FC,
+	0xAFCE, 0xA995, 0xAC1F, 0xAA0E, 0xAC72, 0xAE50, 0xACC8, 0xAE4E,
+	0xACC3, 0xAEAF, 0xA76C, 0xAA77, 0xB029, 0xAB32, 0xAD23, 0xAB2B,
+	0xAD1C, 0xAB26, 0xAD85, 0xAEFE, 0xA8B3, 0xAF0F, 0xA979, 0xAB8E,
+	0xA912, 0xAB87, 0xADDB, 0xABF8, 0xAD82, 0xA656, 0xADE8, 0xAF5E,
+	0xA9E0, 0xAC5B, 0xA9D9, 0xAC56, 0xAA50, 0xAC4F, 0xAE3E, 0xACBB,
+	0xAE52, 0xA7A9, 0xAE9D, 0xA7C0, 0xAB13, 0xAD6D, 0xAB11, 0xAD14,
+	0xAB80, 0xAD28, 0xA436, 0xAD78, 0xAF4F, 0xA962, 0xABE3, 0xA960,
+	0xABDE, 0xA9D7, 0xABDC, 0xADCC, 0xAC48, 0xAE32, 0xA790, 0xAA9F,
+	0xA720, 0xAA9D, 0xACA8, 0xAA96, 0xACA1, 0xAB05, 0xAD0A, 0xA51E,
+	0xAD03, 0xAE90, 0xA8E6, 0xAB6D, 0xA8DF, 0xAB66, 0xAD79, 0xAC2C,
+	0xADC4, 0xABD0, 0xADC0, 0xA779, 0xAA26, 0xAF53, 0xAA1F, 0xAC9E,
+	0xAAEE, 0xAC99, 0xAE2C, 0xACAB, 0xAE8D, 0xA8CF, 0xAB56, 0xA8C8,
+	0xAB6A, 0xAD5D, 0xABBB, 0xAD59, 0xAB77, 0xADBF, 0xA764, 0xAA0D,
+	0xAF4B, 0xAA08, 0xAC87, 0xAA7C, 0xAC2B, 0xAA78, 0xAC94, 0xAE85,
+	0xA8BD, 0xAE83, 0xA8B6, 0xAB51, 0xA92D, 0xAB4C, 0xAD53, 0xABB6,
+	0xADB7, 0xA752, 0xA99B, 0xA6E2, 0xAA6A, 0xAC84, 0xAA08, 0xAC7D,
+	0xAAD4, 0xACE6, 0xA560, 0xA840, 0xAE7D, 0xA91D, 0xABA8, 0xA91B,
+	0xABA6, 0xA98D, 0xAC0D, 0xADB4, 0xA740, 0xADAF, 0xA7BD, 0xAA6C,
+	0xA7BB, 0xAA67, 0xAC7C, 0xAAD6, 0xACE3, 0xA5C4, 0xAD47, 0xA649,
+	0xA97F, 0xABAA, 0xA97D, 0xAC11, 0xA9EF, 0xAC0A, 0xA3B0, 0xAC73,
+	0xAE12, 0xA88F, 0xAACB, 0xA82A, 0xAB32, 0xA902, 0xAB30, 0xAD48,
+	0xAB9A, 0xAD44, 0xA72C, 0xA9E1, 0xA811, 0xAA53, 0xAC10, 0xAABF,
+	0xAC77, 0xAAB8, 0xACDB, 0xA623, 0xA8F4, 0xAE81, 0xA96B, 0xABF5,
+	0xA9DD, 0xABA0, 0xAA47, 0xAC07, 0xADA4, 0xA79B, 0xADB8, 0xA87B,
+	0xAB1E, 0xA8ED, 0xAB32, 0xACDA, 0xAB2B, 0xAD3E, 0xA782, 0xA9CF,
+	0xA71A, 0xAA3C, 0xAC60, 0xAAA8, 0xAC74, 0xAABF, 0xAC6D, 0xA618,
+	0xA95B, 0xAE79, 0xA954, 0xAB89, 0xA9C6, 0xABF0, 0xAA35, 0xAC04,
+	0xAA47, 0xAC68, 0xA5FA, 0xA8E0, 0xAE0F, 0xA952, 0xAB84, 0xA9C4,
+	0xABEB, 0xAA2E, 0xAB94, 0xA477, 0xA7ED, 0xADA9, 0xA867, 0xAAAA,
+	0xA8D9, 0xAB14, 0xA94B, 0xAB7B, 0xAD34, 0xA6F4, 0xAA27, 0xA771,
+	0xAA3E, 0xA7E6, 0xAAA8, 0xAC67, 0xAB0D, 0xACC9, 0xA677, 0xA942,
+	0xA6F4, 0xAA23, 0xABEF, 0xA9C6, 0xABE8, 0xAA35, 0xAC65, 0xA5D9,
+	0xA8CE, 0xA6DB, 0xA940, 0xAB18, 0xA9AD, 0xABE8, 0xA4CE, 0xABE6,
+	0xA554, 0xA85C, 0xAA98, 0xA8CE, 0xAAFF, 0xA93E, 0xAB13, 0xA3B6,
+	0xA754, 0xAD42, 0xA843, 0xAA29, 0xA8B5, 0xAA93, 0xA8CC, 0xAAFD,
+	0xA288, 0xA6D7, 0xACDC, 0xA752, 0xAA13, 0xA7C7, 0xAA27, 0xA8B3,
+	0xAAFD, 0xAC64, 0xA6C1, 0xA937, 0xA6D8, 0xA9A4, 0xA750, 0xA9B8,
+	0xABEC, 0xAA91, 0xABFB, 0xA644, 0xA8C8, 0xA6C1, 0xA935, 0xAB6F,
+	0xAA11, 0xAB83, 0xAA25, 0xABE5, 0xA5C4, 0xA8AF, 0xA644, 0xA91C,
+	0xAB6F, 0xA9A2, 0xAB83, 0xA4A5, 0xABE5, 0xA5B0, 0xA83D, 0xAA88,
+	0xA91F, 0xAB03, 0xA933, 0xAB6A, 0xA422, 0xABE5, 0xAD37, 0xA83D,
+	0xAA88, 0xA8AD, 0xAA9C, 0xA91F, 0xAB68, 0xACD8, 0xA7B4, 0xAD37,
+	0xA829, 0xAA88, 0xA840, 0xAA9C, 0xA91F, 0xAB01, 0xAC74, 0xA7A0,
+	0xAA0A, 0xAB8B, 0xA59F, 0xABED, 0xA69C, 0xA91F, 0xA6B3, 0xA98C,
+	0x9F0C, 0xAA0A, 0xAB8B, 0xA5A4, 0xA89E, 0xA6A1, 0xA8B0, 0xA714,
+	0xA98C, 0xAB10, 0xA50F, 0xAB8B, 0xA612, 0xA89E, 0xA624, 0xA8B0,
+	0xA719, 0xA98C, 0xAB10, 0xA4FB, 0xA818, 0xA595, 0xA89E, 0xA68D,
+	0xA90B, 0xAB01, 0xA98C, 0xAB77, 0xA583, 0xA81A, 0xA59A, 0xA8A3,
+	0xA692, 0xA90E, 0xAB01, 0xA4EE, 0xAB77, 0xA588, 0xA88F, 0xA603,
+	0xA8A3, 0xAA9C, 0xA90E, 0xAB01, 0xA4F3, 0xA80B, 0xA58D, 0xA891,
+	0xA685, 0xA8A3, 0xAA9C, 0xA4E1, 0xAB15, 0xA4FB, 0xA810, 0xA5F6,
+	0xA894, 0xAA8D, 0xA915, 0xAB03, 0xA4E9, 0xA7A0, 0xA580, 0xA810,
+	0xA676, 0xA894, 0xAA8D, 0xA984, 0xAB03, 0xA56E, 0xA817, 0xA585,
+	0xA82E, 0xAA8F, 0xA903, 0xAB05, 0xA4DC, 0xAB7B, 0xA5F3, 0xA889,
+	0xA60A, 0xA90A, 0xAA8F, 0xA921, 0xAB05, 0xA561, 0xA808, 0xA670,
+	0xA889, 0xAA91, 0xA90D, 0xAB0A, 0xA4EB, 0xAB19, 0xA5E6, 0xA890,
+	0xA675, 0xA914, 0xAAAA, 0xA98D, 0xAB20, 0xA570, 0xA80F, 0xA607,
+	0xA893, 0xAA96, 0xA914, 0xAB0C, 0xA992, 0xAB20, 0xA66D, 0xA89A,
+	0xA6F7, 0xA91B, 0xAB13, 0xA994, 0xAB22, 0xA5E3, 0xAB98, 0xA689,
+	0xA4C1, 0xAAAE, 0xAC2B, 0xA80E, 0xAA17, 0xA88D, 0xAA26, 0xA90E,
+	0xAA9F, 0xA4C6, 0xA78A, 0xA9B2, 0xA827, 0xAA2B, 0xA910, 0xAAA1,
+	0xA550, 0xA7FE, 0xA5E2, 0xA815, 0xAA2F, 0xA8AD, 0xAAA8, 0xA4C0,
+	0xAB19, 0xA5E9, 0xA887, 0xA6EB, 0xA89B, 0xAAAA, 0xA930, 0xAB1E,
+	0xA5D7, 0xA88E, 0xA67D, 0xA8A2, 0xA779, 0xA91E, 0xAB22, 0xA5E1,
+	0xA828, 0xA66B, 0xA911, 0xA77E, 0xA923, 0xA254, 0xA660, 0xAB4C,
+	0xA6EA, 0xA913, 0xA6FC, 0xA92A, 0xA2E7, 0xA9B7, 0xA38A, 0xA6F1,
+	0xA91A, 0xA703, 0xA92C, 0xA810, 0xA9BE, 0xA417, 0xA6F6, 0xA4AC,
+	0xA77A, 0xA933, 0xA815, 0xA9C0, 0xA49F, 0xA6FD, 0xA4B6, 0xA781,
+	0xA5DA, 0xA81C, 0xA9C5, 0xA4AB, 0xA704, 0xA53B, 0xA78B, 0xA659,
+	0xA823, 0xA03A, 0xA4B5, 0xAA56, 0xA545, 0xA813, 0xA660, 0xA825,
+	0xA0E3, 0xA922, 0xA23F, 0xA551, 0xA818, 0xA66A, 0xA8AD, 0xA705,
+	0xA929, 0xA2D2, 0xA65A, 0xA40A, 0xA66F, 0xA8B2, 0xA70F, 0xA944,
+	0xA360, 0xA664, 0xA419, 0xA6FF, 0xA53B, 0xA781, 0xA946, 0xA409,
+	0xA9D3, 0xA49C, 0xA706, 0xA545, 0xA79F, 0xA025, 0xA834, 0xAA50,
+	0xA53A, 0xA794, 0xA5DB, 0xA827, 0xA665, 0xA83B, 0xA21D, 0xA541,
+	0xA796, 0xA5E5, 0xA82E, 0xA6F3, 0xA8BE, 0xAA6D, 0xA5DA, 0xA821,
+	0xA678, 0xA8B1, 0xA711, 0xA8D9, 0xA35A, 0xA66B, 0xA40E, 0xA706,
+	0xA8CC, 0xA79C, 0xA95C, 0xA401, 0xA672, 0xA4AD, 0xA70D, 0xA551,
+	0xA7A3, 0xA974, 0xA4A2, 0xA9FC, 0xA546, 0xA796, 0xA5E7, 0xA7BE,
+	0xA15D, 0xA536, 0xA2C2, 0xA5D7, 0xA7B1, 0xA675, 0xA844, 0xA2B2,
+	0xA8EA, 0xA369, 0xA66D, 0xA413, 0xA703, 0xA8DD, 0xA72E, 0xA968,
+	0xA408, 0xA688, 0xA4AF, 0xA721, 0x9F51, 0xA7B4, 0xA162, 0xA4A4,
+	0xA716, 0xA5D2, 0xA7A9, 0xA670, 0xA850, 0xA217, 0xA53B, 0xA2CC,
+	0xA5F5, 0xA843, 0xA68E, 0xA86B, 0xA2C1, 0xA5E5, 0xA406, 0xA683,
+	0xA4AF, 0xA730, 0xA902, 0xA3FB, 0xA608, 0xA49F, 0xA725, 0xA55F,
+	0xA7B6, 0xA0B1, 0xA41E, 0xA217, 0xA54F, 0xA743, 0xA5F0, 0xA7EA,
+	0xA20C, 0xA544, 0xA359, 0xA5F9, 0xA403, 0xA692, 0xA881, 0xA34C,
+	0xA5EC, 0xA40F, 0xA685, 0xA543, 0xA72F, 0x9FF0, 0xA404, 0xA15F,
+	0xA4AB, 0xA6BC, 0xA5ED, 0xA7CE, 0xA1F5, 0xA4B7, 0xA2AA, 0xA556,
+	0xA373, 0xA68D, 0xA7FD, 0xA220, 0xA89F, 0xA3F8, 0xA5FE, 0xA42B,
+	0xA6AD, 0x9FE0, 0xA374, 0xA14A, 0xA4AB, 0xA6B9, 0xA563, 0xA75E,
+	0xA5FC, 0xA7F1, 0xA6A9, 0xA890, 0xA35E, 0xA608, 0xA4AC, 0xA6B5,
+	0xA564, 0xA75F, 0xA143, 0xA42B, 0xA6A8, 0xA4E3, 0xA752, 0xA604,
+	0xA78E, 0xA2A5, 0xA560, 0xA36B, 0xA610, 0x9D69, 0xA6BD, 0xA828,
+	0xA35E, 0xA597, 0xA421, 0xA647, 0x9FC9, 0xA6F1, 0xA14A, 0xA4B5,
+	0xA21C, 0xA56D, 0xA6FD, 0xA13F, 0xA79F, 0xA2A7, 0xA4EF, 0xA370,
+	0xA626, 0x9EF3, 0xA2B8, 0xA848, 0xA37C, 0xA5B0, 0xA4C2, 0xA6DA,
+	0x9FD3, 0xA77F, 0xA154, 0xA4CE, 0xA2BC, 0xA581, 0xA788, 0xA201,
+	0xA7AE, 0xA2C8, 0xA58A, 0xA389, 0xA63A, 0x9F05, 0xA2D4, 0xA08F,
+	0xA425, 0xA646, 0xA4DB, 0xA6EB, 0xA144, 0xA431, 0xA211, 0xA4E7,
+	0xA2D5, 0xA597, 0x9E2E, 0xA2B3, 0xA4F3, 0xA374, 0xA5A3, 0xA449,
+	0xA662, 0xA084, 0xA385, 0xA154, 0xA455, 0xA2D0, 0xA508, 0xA727,
+	0xA1FE, 0xA4E6, 0xA2DC, 0xA514, 0xA39D, 0xA658, 0x9FB9, 0xA37B,
+	0xA099, 0xA434, 0xA661, 0xA503, 0xA71D, 0xA144, 0xA440, 0xA22A,
+	0xA50A, 0xA398, 0xA5CE, 0xA7DC, 0xA2CC, 0xA516, 0xA3A4, 0xA5DA,
+	0xA471, 0xA696, 0xA0A3, 0xA3B0, 0xA225, 0xA502, 0xA6A2, 0xA5C4,
+	0xA75B, 0xA231, 0xA50E, 0xA39A, 0xA5D0, 0x9F04, 0xA68C, 0xA0A0,
+	0xA3A6, 0xA5F0, 0x9FBD, 0xA2FB, 0xA14B, 0xA3CB, 0xA5FC, 0xA51B,
+	0xA6B8, 0xA15C, 0xA462, 0xA23D, 0xA527, 0xA3A1, 0xA5E6, 0x9FB8,
+	0xA2F6, 0xA0AF, 0xA3C6, 0xA60B, 0xA48E, 0xA6C2, 0xA16E, 0xA471,
+	0xA24F, 0xA536, 0x9E0D, 0xA575, 0x9F13, 0xA2EC, 0xA53F, 0xA3D8,
+	0xA615, 0x9FE3, 0xA314, 0xA169, 0xA3E4, 0xA2EF, 0xA4A9, 0x9E0D,
+	0xA194, 0xA48C, 0xA300, 0xA54C, 0xA3E7, 0xA61F, 0xA09C, 0xA323,
+	0xA180, 0xA48D, 0xA306, 0xA4CF, 0x9E2A, 0xA23C, 0xA499, 0xA312,
+	0xA56F, 0x9F05, 0xA5B1, 0xA097, 0xA335, 0xA195, 0xA419, 0x9C62,
+	0xA0C2, 0xA716, 0xA24E, 0xA4BF, 0xA338, 0xA57E, 0x9F05, 0xA276,
+	0xA0C8, 0xA3E6, 0xA254, 0xA4C2, 0xA66C, 0xA187, 0xA409, 0xA260,
+	0xA4E2, 0xA34A, 0xA5A4, 0x9FDB, 0xA32D, 0xA0DF, 0xA40C, 0x9B61,
+	0xA4E8, 0xA68F, 0xA19E, 0xA42F, 0xA330, 0xA508, 0x9F02, 0xA5D9,
+	0xA00F, 0xA353, 0xA1A1, 0xA432, 0xA5F9, 0xA0D1, 0xA415, 0xA274,
+	0xA455, 0xA359, 0xA52E, 0x9F39, 0xA297, 0xA0DC, 0xA37C, 0xA5DD,
+	0xA458, 0xA61C, 0xA1AD, 0xA43B, 0xA29D, 0xA50F, 0xA37F, 0xA563,
+	0xA00C, 0xA362, 0xA1B3, 0xA43C, 0xA614, 0xA0E8, 0xA6DA, 0xA1F2,
+	0xA014, 0xA37C, 0xA549, 0x9FEF, 0xA2BD, 0xA10A, 0xA39F, 0xA29D,
+	0xA476, 0x9E2E, 0xA1D8, 0xA014, 0xA2C0, 0xA544, 0xA3B9, 0xA581,
+	0xA0ED, 0xA39C, 0xA1DE, 0xA473, 0x9D69, 0xA113, 0x9F43, 0xA2C0,
+	0xA0F3, 0xA39F, 0xA57B, 0xA025, 0xA2E3, 0xA1DB, 0xA3D9, 0xA2C3,
+	0xA4C4, 0x9F26, 0xA203, 0xA042, 0xA302, 0x9B2C, 0xA022, 0xA5C7,
+	0xA11B, 0xA3D6, 0xA220, 0xA4BF, 0x9F26, 0xA200, 0xA028, 0xA2FA,
+	0xA138, 0xA3F0, 0x9D5C, 0xA118, 0xA339, 0xA21D, 0xA427, 0x9E4F,
+	0xA50D, 0xA02A, 0xA2F7, 0xA138, 0xA3E8, 0x9D44, 0xA06F, 0x9E77,
+	0xA21A, 0xA422, 0xA314, 0xA50A, 0x9F7B, 0xA30B, 0xA135, 0xA367,
+	0xA24E, 0xA450, 0x9E79, 0xA231, 0xA04C, 0xA328, 0xA519, 0xA043,
+	0xA56A, 0xA14E, 0xA35F, 0xA24B, 0xA44D, 0x9F4F, 0xA18B, 0xA063,
+	0xA339, 0xA16B, 0xA390, 0xA57B, 0xA0A5, 0xA373, 0xA262, 0xA473,
+	0x9E9A, 0xA553, 0xA07C, 0xA29E, 0xA182, 0xA3A4, 0x9D92, 0xA162,
+	0xA387, 0xA276, 0xA484, 0xA37E, 0xA4D8, 0xA07C, 0xA2B0, 0xA19B,
+	0xA3B8, 0x9E6E, 0xA4B2, 0x9F8D, 0xA28A, 0xA495, 0xA392, 0xA4FD,
+	0xA0AF, 0xA2DD, 0xA1AF, 0xA3E0, 0xA2BB, 0xA4D8, 0x9FBE, 0xA2B5,
+	0xA4BB, 0xA615, 0xA1E3, 0xA411, 0xA2EF, 0xA506, 0xA0A3, 0xA5F2,
+	0xA1BD, 0xA3E9, 0xA2C9, 0xA43D, 0x9FB7, 0xA20E, 0xA0DA, 0xA317,
+	0x9D83, 0xA0D1, 0xA58E, 0xA1E8, 0xA411, 0xA2F1, 0xA479, 0x9FED,
+	0xA2EB, 0xA10D, 0xA342, 0x9DBC, 0xA456, 0x9FBF, 0xA216, 0xA0E4,
+	0xA333, 0xA49C, 0xA0D9, 0xA316, 0xA138, 0xA381, 0x9DF5, 0xA479,
+	0x9FF5, 0xA241, 0xA112, 0xA35B, 0x9DAF, 0xA109, 0x9F03, 0xA232,
+	0x9A52, 0xA289, 0xA4B3, 0xA028, 0xA283, 0xA157, 0xA398, 0x9ED1,
+	0xA14E, 0x9FFF, 0xA25D, 0x9B8D, 0xA372, 0x9DDE, 0xA128, 0x9F2A,
+	0xA19C, 0xA3D7, 0x9F07, 0xA17C, 0xA047, 0xA29F, 0xA173, 0xA3B1,
+	0x9E14, 0xA16D, 0x9F60, 0xA290, 0x9BA5, 0x9F57, 0x9DEB, 0xA091,
+	0x97BD, 0xA1B8, 0xA402, 0x9F2E, 0xA1AF, 0xA082, 0xA2CD, 0x9CE1,
+	0xA062, 0x9F1F, 0xA1A0, 0xA059, 0xA2BE, 0x9BD7, 0x9F95, 0x9E2C,
+	0xA0C7, 0xA323, 0x9E23, 0xA0C1, 0x9F6C, 0xA1E5, 0xA0B8, 0xA314,
+	0x9D2A, 0xA0B2, 0x9F5D, 0xA1D6, 0x9A86, 0x9F54, 0x9CFE, 0x9FCE,
+	0x9E6D, 0xA117, 0xA365, 0x9E67, 0xA0F7, 0x9FC1, 0xA22F, 0x9CE6,
+	0x9FA1, 0x9E40, 0xA0E8, 0x9F98, 0xA220, 0x9BE1, 0x9F92, 0x9D64,
+	0xA3C4, 0x9F89, 0xA161, 0xA01A, 0xA291, 0x9D38, 0xA014, 0x9E9F,
+	0xA152, 0x9A9F, 0xA282, 0xA429, 0xA002, 0xA27C, 0xA143, 0xA2FE,
+	0x9E89, 0xA13D, 0x9FF3, 0xA281, 0x9C1E, 0xA2EA, 0x9E7A, 0xA12E,
+	0x9FE9, 0xA1B6, 0x9C11, 0x9FE0, 0xA1AD, 0xA06C, 0xA2EC, 0x9D9D,
+	0xA068, 0x9EFB, 0xA1B5, 0xA05F, 0xA2F4, 0x9D8B, 0xA056, 0x9F06,
+	0xA1A6, 0x9AEB, 0x9EFD, 0x9D81, 0xA061, 0x9EF7, 0xA1AE, 0xA370,
+	0x9EEE, 0xA0E1, 0xA052, 0xA228, 0x9D83, 0xA060, 0x9EF6, 0xA0E9,
+	0x9AE8, 0xA230, 0x9C8C, 0x9F81, 0x9E10, 0xA0DA, 0x9AD6, 0x9E0A,
+	0x9C7A, 0x9F8C, 0xA232, 0x9C71, 0x9F88, 0x9E12, 0xA0F3, 0x9F7F,
+	0xA235, 0x9C81, 0x9F90, 0x9E1D, 0xA0FB, 0x99A9, 0x9E14, 0x9C8C,
+	0x9F98, 0x9E10, 0xA103, 0xA2CB, 0x9E24, 0xA0FA, 0x9FA3, 0xA180,
+	0x9C93, 0x9F9A, 0x9E2C, 0xA03D, 0x99C3, 0xA19C, 0x9C84, 0x9FA2,
+	0x9E37, 0xA045, 0x99D6, 0x9E33, 0x9C91, 0x9FAD, 0xA1B5, 0x9CA5,
+	0x9FBE, 0x9E3E, 0xA05E, 0x9FCF, 0xA1BD, 0x9CB5, 0x9EDE, 0x9E46,
+	0xA066, 0x99F0, 0x9E57, 0x9CC0, 0x9F00, 0x9E68, 0xA06E, 0xA265,
+	0x9D6E, 0xA07F, 0x9F0B, 0xA1ED, 0x9CE1, 0x9F1C, 0x9E84, 0xA09E,
+	0x9A05, 0x9E95, 0xA0AF, 0x9F29, 0xA147, 0xA0C0, 0xA2AA, 0x9DAF,
+	0xA0B7, 0x9F4B, 0xA166, 0x9C0B, 0x9F57, 0x9DBC, 0xA0D4, 0x9A3F,
+	0x9DD0, 0x9C30, 0x9F79, 0x9DE1, 0xA0F3, 0x9A6C, 0x9DF2, 0xA101,
+	0x9F9B, 0xA1AD, 0x9D68, 0x9FA9, 0x9E17, 0xA135, 0x9BC1, 0x9E28,
+	0x9D8D, 0x9FCB, 0x9E39, 0xA154, 0x9BE6, 0x9E4A, 0x9DB2, 0x9FEA,
+	0x98D7, 0x9DC3, 0x9BF1, 0x9E6F, 0xA0AD, 0x9C0A, 0x9E80, 0x9DE5,
+	0xA02F, 0x9E91, 0xA0CA, 0x9C4C, 0x9EB9, 0x9E0A, 0xA051, 0x9A71,
+	0x9E1B, 0x9C71, 0x9EDB, 0x988C, 0x9C85, 0x9A9E, 0x9E57, 0x9C96,
+	0x9EFB, 0xA142, 0x9CAA, 0x9F23, 0x9E79, 0xA0C7, 0x9AF7, 0x9EA4,
+	0x9CE9, 0x9F5C, 0x9906, 0xA0FD, 0x9B24, 0x9EC1, 0x9D0E, 0x9F7C,
+	0x9951, 0x9D3C, 0x9B69, 0x9EFD, 0x9734, 0x9B7D, 0x9F25, 0x9D78,
+	0x9FD8, 0x9F36, 0xA187, 0x9CD6, 0x9F5C, 0x9DB7, 0xA00E, 0x9B11,
+	0x9DC8, 0x9D13, 0x9F95, 0x9926, 0x9D3E, 0x9B56, 0x9DFF, 0x9D4F,
+	0x9FE0, 0x9971, 0x9D7D, 0x9FEC, 0x9E55, 0xA0B0, 0x9BC9, 0x9E64,
+	0x9DB9, 0xA037, 0x99EF, 0x9DDF, 0x9C0B, 0x9EB7, 0x9E0A, 0xA082,
+	0x9B78, 0x9E33, 0x9C62, 0x9F05, 0x999B, 0x9C8D, 0x9BBA, 0x9E86,
+	0x9CA1, 0x9F53, 0x99E8, 0x9CCF, 0x9C16, 0x9ED4, 0x97C5, 0x9F9E,
+	0x9A4A, 0x9E3B, 0x9C6D, 0x9F22, 0x9991, 0x9C9B, 0x9F48, 0x9EA3,
+	0xA00F, 0x9C10, 0x9EC9, 0x9CEF, 0x9F93, 0x9A2A, 0x9D1D, 0x9C67,
+	0x9F17, 0x9D48, 0x9FF8, 0x9A8C, 0x9D6E, 0x9CC0, 0x9F7C, 0x9885,
+	0x9CE9, 0x9AEE, 0x9DD9, 0x97BD, 0x9B1C, 0x9A5A, 0x9D57, 0x9FFF,
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+	0x502F, 0x4E40, 0x502C, 0x51C9, 0x4FAB, 0x4D49, 0x4FA9, 0x50FD,
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+	0x4F5E, 0x4D69, 0x4F5B, 0x4D67, 0x4A9C, 0x511C, 0x4F53, 0x4D02,
+	0x497C, 0x50C8, 0x4EF8, 0x4CFA, 0x4973, 0x50BF, 0x4EF0, 0x4CF4,
+	0x4EED, 0x4C01, 0x4E95, 0x5014, 0x4E8F, 0x4BF8, 0x4E8C, 0x500F,
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+	0x4DA0, 0x4B15, 0x4D9E, 0x4F83, 0x4D98, 0x4F80, 0x4D3A, 0x4F7E,
+	0x4D37, 0x4F78, 0x50C5, 0x4F75, 0x4D2F, 0x51FC, 0x50BD, 0x4F1B,
+	0x4CCA, 0x51F4, 0x506C, 0x4F13, 0x4CC5, 0x4EBB, 0x5063, 0x4EB8,
+	0x4CC0, 0x4EB6, 0x505B, 0x4E5D, 0x5058, 0x4E57, 0x4C54, 0x4E2E,
+	0x5003, 0x4E28, 0x4B58, 0x5141, 0x4FAA, 0x4DC8, 0x4B4F, 0x5117,
+	0x4FA5, 0x4DC3, 0x4B4A, 0x4DC1, 0x4F7B, 0x4DBB, 0x4F75, 0x4DB8,
+	0x4F72, 0x4DB6, 0x4F70, 0x4DB3, 0x4ACF, 0x50B3, 0x4F16, 0x4D53,
+	0x4ACA, 0x50AE, 0x4F0D, 0x4D4B, 0x4A5A, 0x50AA, 0x4F08, 0x4CEA,
+	0x4F06, 0x4CE4, 0x4F00, 0x4C85, 0x4EFD, 0x4C82, 0x4EA5, 0x5025,
+	0x4EA3, 0x4C4E, 0x48B7, 0x501D, 0x4E48, 0x4BE8, 0x48B1, 0x5018,
+	0x4E3F, 0x4BDF, 0x4E16, 0x4BDD, 0x4E14, 0x4BDA, 0x4E0E, 0x4BD8,
+	0x4E0B, 0x5008, 0x4E09, 0x4BD3, 0x4E06, 0x4FB3, 0x4E04, 0x4BCA,
+	0x481B, 0x4FAE, 0x4DFB, 0x4BC5, 0x4DF9, 0x4F54, 0x4DF6, 0x4B5A,
+	0x4D99, 0x4B58, 0x4D97, 0x4F24, 0x4D94, 0x4AE9, 0x4D92, 0x4F1F,
+	0x4D34, 0x4A7D, 0x508E, 0x4F1A, 0x4D2C, 0x4A47, 0x4D29, 0x4F11,
+	0x4D00, 0x4A42, 0x4CFA, 0x4F0D, 0x4CF7, 0x4F07, 0x4CF5, 0x4A36,
+	0x4CF2, 0x4EB0, 0x4CF0, 0x4A2E, 0x5025, 0x4EA7, 0x4CE7, 0x4A28,
+	0x4285, 0x4E7D, 0x4CE2, 0x4A23, 0x4CE0, 0x4E78, 0x4C81, 0x4EC7,
+	0x4C7F, 0x4EC5, 0x4C78, 0x4E6D, 0x4C76, 0x49A7, 0x4FE3, 0x4E68,
+	0x4C10, 0x4930, 0x4FDE, 0x4E5F, 0x4C41, 0x492B, 0x4C3B, 0x4E04,
+	0x4C38, 0x4E32, 0x4C36, 0x4E2C, 0x4C33, 0x4E29, 0x4C8D, 0x4E27,
+	0x4FA4, 0x4E24, 0x4C2C, 0x48E4, 0x4F9C, 0x4E1C, 0x4C23, 0x48DF,
+	0x4F97, 0x4E17, 0x4BBD, 0x48D6, 0x4BBB, 0x4DBC, 0x4BB8, 0x4DE6,
+	0x4BB6, 0x4DE3, 0x4FB3, 0x4DE1, 0x4BE2, 0x4E31, 0x4F5D, 0x4DDC,
+	0x4BDA, 0x484D, 0x4F58, 0x4DD3, 0x4BD5, 0x4848, 0x4F7B, 0x4DCE,
+	0x4BD0, 0x4D75, 0x4B6C, 0x4DA3, 0x4F74, 0x4DA1, 0x4B67, 0x4DF1,
+	0x4F1E, 0x4DEF, 0x4B94, 0x4873, 0x4F41, 0x4D93, 0x4BEC, 0x48DC,
+	0x4F3C, 0x4D8B, 0x4B8A, 0x4D88, 0x4F38, 0x4DB6, 0x4F32, 0x4E06,
+	0x4B7F, 0x4DAD, 0x4F2D, 0x4DAB, 0x4B7A, 0x5095, 0x4F50, 0x4DA6,
+	0x4C04, 0x481D, 0x4F4B, 0x4D9D, 0x4BA2, 0x4DCB, 0x4F21, 0x4DC9,
+	0x4B9D, 0x4DC3, 0x4F69, 0x4DC0, 0x4F67, 0x4DBE, 0x4B66, 0x5057,
+	0x4F11, 0x4D8F, 0x4BBF, 0x507A, 0x4F85, 0x4DE0, 0x4BBA, 0x4DDE,
+	0x4F33, 0x4D85, 0x4BB5, 0x4D83, 0x4F2A, 0x4D80, 0x4F28, 0x4DFD,
+	0x4BDB, 0x4909, 0x4F4B, 0x4DA2, 0x4BD6, 0x4893, 0x4F46, 0x4D9D,
+	0x4BD1, 0x48CE, 0x4BA3, 0x4E17, 0x4BFE, 0x4932, 0x4BF8, 0x4DBF,
+	0x4BF5, 0x4DBD, 0x4BF3, 0x4927, 0x4BF0, 0x4DE1, 0x4BEE, 0x4921,
+	0x4F33, 0x4DDC, 0x4C1A, 0x49C0, 0x445B, 0x4DD7, 0x4C11, 0x4953,
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+	0x4C33, 0x49E2, 0x4C30, 0x4E1B, 0x4C5F, 0x49DD, 0x45AE, 0x4E16,
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+	0x4D80, 0x4B8B, 0x4D7A, 0x4B89, 0x4DA4, 0x4BB4, 0x4DA1, 0x4BB2,
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+	0x49B8, 0x4BD7, 0x4DE8, 0x4C02, 0x49E6, 0x4BFF, 0x4DE3, 0x4BFD,
+	0x4E0C, 0x4C80, 0x4A74, 0x4C7D, 0x4E04, 0x4C23, 0x4A0C, 0x4F4F,
+	0x4A0A, 0x4CA3, 0x4A9C, 0x4CA1, 0x4E52, 0x4CCB, 0x4A97, 0x4CC9,
+	0x4E49, 0x4CC6, 0x4AC5, 0x4818, 0x4E70, 0x4CEE, 0x4AF2, 0x4813,
+	0x4AEC, 0x4D16, 0x4B78, 0x48B4, 0x4B76, 0x4D0D, 0x4B16, 0x4D38,
+	0x4B9F, 0x48E4, 0x4B9C, 0x4D5F, 0x4B9A, 0x497B, 0x4EFE, 0x4D5A,
+	0x4BC6, 0x490E, 0x4553, 0x4D82, 0x4BEF, 0x49A4, 0x4611, 0x4DA5,
+	0x4BEA, 0x49D6, 0x4C15, 0x49D0, 0x4C12, 0x4A63, 0x4C41, 0x4A60,
+	0x46FE, 0x4DEE, 0x4CBD, 0x4A8D, 0x47A6, 0x4E15, 0x4C60, 0x4ABB,
+	0x4848, 0x4AB8, 0x4CE0, 0x4B41, 0x487B, 0x4AE5, 0x4D04, 0x4B6E,
+	0x4917, 0x4B68, 0x4914, 0x4B65, 0x4D29, 0x4B94, 0x4947, 0x4B92,
+	0x4D4D, 0x4BC1, 0x4975, 0x45A2, 0x4D74, 0x4BE9, 0x4A06, 0x465A,
+	0x4A04, 0x4BE1, 0x4A34, 0x4C0F, 0x4A31, 0x4C0D, 0x4A2F, 0x4C37,
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+	0x4B69, 0x48E3, 0x4B62, 0x4918, 0x4B91, 0x4D74, 0x4B8F, 0x49AA,
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+	0x4785, 0x4A35, 0x4C36, 0x4ABF, 0x4827, 0x4ABD, 0x4CB1, 0x4AE8,
+	0x4CDB, 0x4AEA, 0x4CD9, 0x4B15, 0x4D03, 0x4B13, 0x4CFD, 0x4B3E,
+	0x4920, 0x4E77, 0x4D24, 0x4B6B, 0x494E, 0x4EBE, 0x4D74, 0x4C19,
+	0x49B3, 0x46B5, 0x4D98, 0x4C3D, 0x4A3B, 0x4BE7, 0x4A6B, 0x4C65,
+	0x4A69, 0x4C8F, 0x4A98, 0x4C8D, 0x4E0C, 0x4CB7, 0x4AC2, 0x4897,
+	0x4E2F, 0x4CDB, 0x4AEE, 0x48CA, 0x4523, 0x4D03, 0x4B17, 0x4930,
+	0x4BC9, 0x4D53, 0x4BC6, 0x49BD, 0x4BF1, 0x49ED, 0x4C1C, 0x4A1D,
+	0x4C19, 0x4A1B, 0x4774, 0x4DC4, 0x4C41, 0x4A44, 0x4812, 0x4DE7,
+	0x4C96, 0x4AA3, 0x4879, 0x4545, 0x4CBA, 0x4B53, 0x490C, 0x4B51,
+	0x493D, 0x4B7C, 0x4971, 0x4BAB, 0x496B, 0x4BA5, 0x499F, 0x4BCF,
+	0x49CB, 0x4750, 0x4D7F, 0x4BF8, 0x4A85, 0x47BC, 0x4DCB, 0x4C4D,
+	0x4AAE, 0x488D, 0x44A8, 0x4C71, 0x4B09, 0x48BB, 0x4B06, 0x48F0,
+	0x4B32, 0x48ED, 0x4B61, 0x49B0, 0x4B88, 0x49DD, 0x4B85, 0x49DE,
+	0x47A1, 0x4D63, 0x4BDF, 0x4A3A, 0x47D4, 0x43BC, 0x4C03, 0x4A63,
+	0x483B, 0x44CB, 0x4C58, 0x4ABE, 0x4906, 0x4AEA, 0x4933, 0x4AEB,
+	0x4934, 0x4B16, 0x4961, 0x46E2, 0x4995, 0x4BEE, 0x49C1, 0x474F,
+	0x4D46, 0x4C12, 0x49EE, 0x4820, 0x43E4, 0x4C67, 0x4AD2, 0x4887,
+	0x4AFD, 0x4884, 0x4AFA, 0x48B5, 0x4B26, 0x48E6, 0x4B51, 0x49A9,
+	0x4B7C, 0x49D9, 0x472F, 0x4CDA, 0x4BD1, 0x4A02, 0x479B, 0x42F6,
+	0x4C23, 0x4A5E, 0x47CF, 0x450C, 0x4C4A, 0x4AB9, 0x48CE, 0x4AE4,
+	0x48FE, 0x4B0F, 0x492F, 0x4B0D, 0x495F, 0x46A9, 0x498C, 0x4B63,
+	0x49BC, 0x47B8, 0x4D61, 0x4BB5, 0x49E9, 0x481F, 0x4478, 0x4C0A,
+	0x4A45, 0x484E, 0x456D, 0x487F, 0x4B1F, 0x48B4, 0x4B4A, 0x4973,
+	0x4B74, 0x49A0, 0x4B9F, 0x49D0, 0x4737, 0x49FF, 0x4BF1, 0x4A2B,
+	0x4838, 0x44A0, 0x4BC9, 0x4A86, 0x489A, 0x45CF, 0x4C1A, 0x4ADD,
+	0x48FC, 0x4641, 0x492C, 0x4B33, 0x495D, 0x4B5E, 0x498D, 0x4B89,
+	0x49B9, 0x4BDD, 0x49E9, 0x47F0, 0x4A15, 0x4C2E, 0x4A40, 0x4853,
+	0x45ED, 0x4C7E, 0x4A9B, 0x4947, 0x465F, 0x4CCB, 0x4B1B, 0x49A3,
+	0x47A4, 0x49CF, 0x4B71, 0x4A2D, 0x4B9C, 0x4A59, 0x483D, 0x4A84,
+	0x4BED, 0x4AB0, 0x489E, 0x4ADB, 0x4C67, 0x4B06, 0x4900, 0x46B7,
+	0x4CB7, 0x4B85, 0x498F, 0x475C, 0x49BB, 0x4BD7, 0x49EB, 0x4C01,
+	0x4A13, 0x4C54, 0x4A42, 0x4BD9, 0x4A9C, 0x4919, 0x4AC7, 0x4C53,
+	0x4AF2, 0x4975, 0x4741, 0x4CA0, 0x4B71, 0x4A00, 0x47E1, 0x4D18,
+	0x4812, 0x4A5B, 0x4843, 0x4AB4, 0x4874, 0x4ADF, 0x48D8, 0x4B06,
+	0x4905, 0x4690, 0x4935, 0x4B85, 0x4961, 0x47CB, 0x446C, 0x4B5D,
+	0x49EB, 0x4861, 0x45D0, 0x4BD8, 0x4A71, 0x48F1, 0x467C, 0x4922,
+	0x4AF5, 0x494E, 0x46E9, 0x49AC, 0x474F, 0x49D8, 0x4785, 0x4A32,
+	0x47B6, 0x450E, 0x4C18, 0x4A89, 0x490A, 0x469B, 0x4C69, 0x4B09,
+	0x4995, 0x473C, 0x433E, 0x4B31, 0x496C, 0x47A3, 0x44FE, 0x4808,
+	0x49F2, 0x4839, 0x4A1E, 0x4899, 0x45E3, 0x48CA, 0x4AA3, 0x4929,
+	0x475E, 0x4955, 0x4B4C, 0x49B3, 0x47F4, 0x4522, 0x4BCA, 0x4A39,
+	0x4886, 0x45CF, 0x48E5, 0x4AB9, 0x4916, 0x4676, 0x4971, 0x46E1,
+	0x49A0, 0x4714, 0x49FA, 0x477D, 0x49A2, 0x47E3, 0x49CE, 0x4814,
+	0x462C, 0x4C08, 0x4A80, 0x48A5, 0x46CE, 0x43CA, 0x4B00, 0x4963,
+	0x479E, 0x4484, 0x47CF, 0x49E9, 0x4834, 0x453C, 0x4894, 0x4A97,
+	0x48C0, 0x4AF0, 0x4920, 0x4759, 0x497E, 0x4AEB, 0x49D8, 0x47EF,
+	0x44EC, 0x4B6C, 0x4A01, 0x48B0, 0x45D3, 0x490F, 0x4A5B, 0x4882,
+	0x4676, 0x48E2, 0x4ADB, 0x4940, 0x474B, 0x496C, 0x47AC, 0x49C6,
+	0x47DE, 0x4A20, 0x4842, 0x4630, 0x4BD7, 0x4ACA, 0x48FD, 0x4702,
+	0x495C, 0x4768, 0x49B6, 0x47CD, 0x4A0C, 0x4B73, 0x4A37, 0x4891,
+	0x468A, 0x4C16, 0x4A66, 0x494B, 0x4756, 0x43C4, 0x4B0F, 0x491E,
+	0x4820, 0x44B8, 0x478E, 0x4A00, 0x47EE, 0x45A0, 0x484F, 0x4AAA,
+	0x48AE, 0x467C, 0x490D, 0x4717, 0x4996, 0x4B00, 0x49F0, 0x47DE,
+	0x458F, 0x4BA4, 0x4A43, 0x489D, 0x466B, 0x429E, 0x4A9B, 0x4985,
+	0x476B, 0x44D1, 0x47CD, 0x4980, 0x4831, 0x45EE, 0x48BC, 0x4656,
+	0x48EC, 0x46C0, 0x4892, 0x475A, 0x48ED, 0x4ADD, 0x4976, 0x47ED,
+	0x45DD, 0x4B5E, 0x4A53, 0x4822, 0x45A9, 0x42BD, 0x4A27, 0x490B,
+	0x46B5, 0x4402, 0x471B, 0x49EA, 0x47B0, 0x452B, 0x4840, 0x4598,
+	0x489F, 0x463D, 0x4929, 0x46A4, 0x43F0, 0x4AE9, 0x4900, 0x47D3,
+	0x4515, 0x4B41, 0x4A08, 0x488F, 0x462C, 0x4366, 0x4A5B, 0x48BF,
+	0x475D, 0x4496, 0x47F1, 0x49A2, 0x47BC, 0x45AF, 0x47C4, 0x464F,
+	0x4853, 0x46EA, 0x48DD, 0x46B4, 0x4484, 0x4ACC, 0x4963, 0x4782,
+	0x45D7, 0x40D5, 0x49EB, 0x4871, 0x45D9, 0x4285, 0x4A6B, 0x48CE,
+	0x470F, 0x4401, 0x47A4, 0x49B3, 0x4834, 0x455B, 0x4860, 0x45FD,
+	0x4835, 0x469C, 0x48C3, 0x4732, 0x442F, 0x4AD9, 0x49A2, 0x4791,
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+	0x4A7C, 0x4911, 0x478A, 0x49C0, 0x4849, 0x4A19, 0x48A4, 0x4A13,
+	0x48A2, 0x4682, 0x48D5, 0x4AEB, 0x4987, 0x480C, 0x4565, 0x4B16,
+	0x4989, 0x480D, 0x463F, 0x443C, 0x4A87, 0x494B, 0x479F, 0x4442,
+	0x4798, 0x497B, 0x47D0, 0x45FC, 0x488A, 0x4A25, 0x48E4, 0x472D,
+	0x48E2, 0x46F7, 0x4942, 0x4792, 0x49C2, 0x484C, 0x4654, 0x4879,
+	0x4A1B, 0x4852, 0x468A, 0x445C, 0x4A6D, 0x495C, 0x4813, 0x4615,
+	0x41DD, 0x4A0D, 0x4844, 0x464B, 0x48F8, 0x4716, 0x4924, 0x47A2,
+	0x4928, 0x47A0, 0x4560, 0x4806, 0x49D3, 0x48BF, 0x4707, 0x44B1,
+	0x4A7F, 0x4919, 0x4709, 0x44ED, 0x4243, 0x496D, 0x4853, 0x46C5,
+	0x4431, 0x46C2, 0x490B, 0x46FA, 0x44A8, 0x47EA, 0x45BA, 0x47E7,
+	0x4652, 0x481E, 0x464F, 0x433A, 0x46F0, 0x48D0, 0x47B0, 0x4576,
+	0x4267, 0x49AD, 0x4810, 0x45B1, 0x42EF, 0x4A59, 0x4893, 0x473F,
+	0x4567, 0x3F93, 0x494A, 0x4830, 0x45A2, 0x429F, 0x46D3, 0x4861,
+	0x46D0, 0x4911, 0x4738, 0x44EB, 0x47F3, 0x49C2, 0x47F1, 0x4690,
+	0x4400, 0x4A1B, 0x48AA, 0x472A, 0x4441, 0x40A9, 0x498A, 0x478E,
+	0x4621, 0x43F1, 0x4625, 0x4871, 0x474B, 0x4468, 0x4749, 0x45E0,
+	0x47DF, 0x45AD, 0x4836, 0x464B, 0x436D, 0x46DD, 0x48EE, 0x46DB,
+	0x456C, 0x426B, 0x49A0, 0x47CE, 0x4671, 0x42B2, 0x3D9B, 0x4887,
+	0x46D7, 0x44F2, 0x425C, 0x4530, 0x4790, 0x4662, 0x42E3, 0x4630,
+	0x44B0, 0x4758, 0x4478, 0x4726, 0x458C, 0x47EB, 0x49B1, 0x4813,
+	0x45F7, 0x4435, 0x4A30, 0x48CB, 0x46EB, 0x45B2, 0x40FE, 0x494F,
+	0x47AB, 0x46B2, 0x43B5, 0x46AC, 0x4864, 0x4743, 0x4539, 0x4770,
+	0x453B, 0x4801, 0x466F, 0x482A, 0x4641, 0x44FC, 0x4734, 0x48E1,
+	0x4736, 0x45D2, 0x4327, 0x4965, 0x47F0, 0x46CD, 0x44B7, 0x3F17,
+	0x48A9, 0x47BC, 0x45C3, 0x42A0, 0x45C1, 0x4871, 0x46BF, 0x443D,
+	0x46BC, 0x451C, 0x477F, 0x4584, 0x477C, 0x4653, 0x43FA, 0x4680,
+	0x4895, 0x4743, 0x4543, 0x41C6, 0x4944, 0x4801, 0x4644, 0x43B5,
+	0x4611, 0x4887, 0x4709, 0x4503, 0x4798, 0x490C, 0x47C4, 0x4605,
+	0x4851, 0x46CE, 0x484E, 0x46CB, 0x48D6, 0x478D, 0x45C9, 0x4791,
+	0x4959, 0x4818, 0x4690, 0x4481, 0x49D8, 0x48A1, 0x4724, 0x4554,
+	0x42A5, 0x49A5, 0x4814, 0x4655, 0x4406, 0x4718, 0x48EE, 0x47A6,
+	0x461B, 0x47A8, 0x4619, 0x43C3, 0x46DD, 0x48B8, 0x46AF, 0x44D7,
+	0x4211, 0x493C, 0x47FA, 0x46A5, 0x4462, 0x3F9C, 0x487F, 0x4736,
+	0x45A0, 0x4374, 0x459D, 0x47C1, 0x4667, 0x4489, 0x46FA, 0x4563,
+	0x46F8, 0x4560, 0x47B5, 0x462B, 0x444B, 0x46EE, 0x4810, 0x46BC,
+	0x451F, 0x42E6, 0x491E, 0x4807, 0x45EC, 0x4406, 0x4124, 0x488C,
+	0x4743, 0x44DF, 0x429F, 0x45B0, 0x47CE, 0x4679, 0x44A4, 0x470C,
+	0x44A2, 0x4709, 0x4577, 0x4797, 0x4641, 0x437E, 0x463E, 0x4821,
+	0x46D2, 0x456B, 0x4210, 0x48FD, 0x47E9, 0x4602, 0x4458, 0x4035,
+	0x452E, 0x4729, 0x452B, 0x42FC, 0x45C6, 0x4416, 0x468A, 0x4413,
+	0x471D, 0x44EE, 0x42EF, 0x4589, 0x4779, 0x4652, 0x43D5, 0x4175,
+	0x4889, 0x46DF, 0x4581, 0x42A9, 0x3F83, 0x47FA, 0x4614, 0x446F,
+	0x4128, 0x4544, 0x4736, 0x4542, 0x438A, 0x45DC, 0x4467, 0x4670,
+	0x4507, 0x46FF, 0x4505, 0x4347, 0x459F, 0x478A, 0x4664, 0x4422,
+	0x4210, 0x486C, 0x4756, 0x4593, 0x4301, 0x4082, 0x47DC, 0x46BC,
+	0x44BB, 0x41C9, 0x455B, 0x4719, 0x45F0, 0x43A6, 0x4684, 0x447E,
+	0x4713, 0x451E, 0x4710, 0x45E4, 0x4399, 0x4649, 0x47F7, 0x4646,
+	0x4512, 0x46D9, 0x45AC, 0x4763, 0x4641, 0x4434, 0x463E, 0x4845,
+	0x46A2, 0x4570, 0x434A, 0x48F5, 0x47B5, 0x4602, 0x4497, 0x421C,
+	0x486B, 0x46F5, 0x4530, 0x43B8, 0x40D6, 0x47DC, 0x465A, 0x452B,
+	0x42C8, 0x45C1, 0x4748, 0x45BE, 0x444E, 0x4623, 0x44EE, 0x46B2,
+	0x44EB, 0x4740, 0x4586, 0x4445, 0x4617, 0x47F7, 0x467A, 0x457C,
+	0x4361, 0x48CF, 0x4767, 0x45DF, 0x44A5, 0x426F, 0x4544, 0x46D2,
+	0x45D5, 0x43C5, 0x45A6, 0x446B, 0x4637, 0x4507, 0x4315, 0x459D,
+	0x43BD, 0x462D, 0x445F, 0x4691, 0x44FB, 0x42D2, 0x4561, 0x4779,
+	0x45F6, 0x4421, 0x40E0, 0x47D0, 0x46E4, 0x4558, 0x4373, 0x3F85,
+	0x47A0, 0x464E, 0x44B6, 0x4286, 0x4520, 0x4737, 0x45B2, 0x43D7,
+	0x4616, 0x4478, 0x46A5, 0x4514, 0x4704, 0x4579, 0x43CF, 0x4080,
+	0x47B8, 0x466D, 0x44D7, 0x42E9, 0x3F1F, 0x4756, 0x45D2, 0x4433,
+	0x41F6, 0x3D93, 0x46C1, 0x4535, 0x4385, 0x402D, 0x43F5, 0x462A,
+	0x4492, 0x429D, 0x452D, 0x4346, 0x458E, 0x43E9, 0x4680, 0x4454,
+	0x4291, 0x4588, 0x473D, 0x45E9, 0x444F, 0x419D, 0x47F0, 0x46AC,
+	0x454C, 0x43A5, 0x4097, 0x4760, 0x4641, 0x44AD, 0x42F1, 0x3F84,
+	0x4367, 0x45A9, 0x4405, 0x4150, 0x44A1, 0x42B2, 0x4507, 0x435B,
+	0x4600, 0x43C7, 0x41FB, 0x4502, 0x46BE, 0x4567, 0x431C, 0x403C,
+	0x4776, 0x4628, 0x44C5, 0x426B, 0x3F1E, 0x46E5, 0x45C0, 0x4421,
+	0x41AF, 0x44BD, 0x46DC, 0x4523, 0x4377, 0x4588, 0x4419, 0x464A,
+	0x4480, 0x42C7, 0x457E, 0x436F, 0x45DF, 0x4477, 0x463E, 0x44E1,
+	0x42BF, 0x4546, 0x46F8, 0x45A7, 0x443D, 0x41D1, 0x3EB2, 0x46C3,
+	0x453A, 0x4398, 0x4113, 0x4435, 0x465D, 0x449C, 0x42ED, 0x4565,
+	0x438C, 0x45C6, 0x4492, 0x4629, 0x44F8, 0x42E0, 0x455D, 0x473B,
+	0x45BE, 0x4459, 0x422F, 0x47EE, 0x46D9, 0x45B4, 0x43B4, 0x4172,
+	0x4762, 0x4648, 0x451B, 0x433C, 0x40AF, 0x4759, 0x45DC, 0x447D,
+	0x428F, 0x44E3, 0x46F7, 0x45D7, 0x440A, 0x4632, 0x4475, 0x42F8,
+	0x453E, 0x471D, 0x459F, 0x446B, 0x4246, 0x47A5, 0x46BB, 0x4533,
+	0x43C7, 0x418F, 0x4744, 0x4629, 0x4495, 0x4321, 0x455E, 0x473B,
+	0x45C2, 0x448F, 0x42A7, 0x44F5, 0x46D9, 0x45B8, 0x43EF, 0x4618,
+	0x4456, 0x4648, 0x4520, 0x46FF, 0x4580, 0x43E3, 0x463E, 0x4787,
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+	0x4543, 0x43A0, 0x41A3, 0x3DFC, 0x465D, 0x44D6, 0x4396, 0x40E5,
+	0x4402, 0x420D, 0x44CC, 0x4280, 0x452E, 0x435C, 0x4159, 0x4432,
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+	0x400E, 0x46A5, 0x45B3, 0x441C, 0x41BB, 0x3F41, 0x429F, 0x451B,
+	0x437B, 0x4102, 0x43E3, 0x4229, 0x44B2, 0x4307, 0x4572, 0x43DD,
+	0x4176, 0x4444, 0x425B, 0x4509, 0x436A, 0x416C, 0x443A, 0x45FC,
+	0x446F, 0x42C3, 0x4030, 0x46DF, 0x4595, 0x4401, 0x4249, 0x4026,
+	0x4326, 0x4529, 0x43F8, 0x4243, 0x44C2, 0x42B1, 0x44F7, 0x4388,
+	0x4119, 0x43BE, 0x4204, 0x448A, 0x42E2, 0x454E, 0x43B9, 0x41FA,
+	0x4480, 0x4637, 0x44B5, 0x4345, 0x40CF, 0x3E78, 0x45A9, 0x444B,
+	0x433B, 0x40C5, 0x3CAB, 0x459F, 0x4442, 0x4224, 0x3F81, 0x4301,
+	0x4537, 0x43D3, 0x421E, 0x446D, 0x42FC, 0x4532, 0x43CE, 0x4562,
+	0x43FF, 0x4287, 0x44C9, 0x46A8, 0x455D, 0x43FA, 0x41D5, 0x3F2A,
+	0x4645, 0x44F4, 0x438B, 0x4159, 0x3E96, 0x45E3, 0x44EB, 0x431B,
+	0x4154, 0x43B7, 0x45D9, 0x4482, 0x42A6, 0x4516, 0x4348, 0x4572,
+	0x4414, 0x426A, 0x44AD, 0x4342, 0x410A, 0x43A5, 0x459D, 0x44A4,
+	0x42CE, 0x408C, 0x436E, 0x4567, 0x443A, 0x42C8, 0x44CF, 0x42FE,
+	0x4173, 0x43CC, 0x41E2, 0x4466, 0x42F5, 0x40BA, 0x4361, 0x455A,
+	0x4460, 0x4284, 0x4037, 0x4670, 0x4525, 0x43F2, 0x427A, 0x3FB3,
+	0x3BAC, 0x451B, 0x43ED, 0x4204, 0x3FA9, 0x42AB, 0x44B7, 0x437E,
+	0x4156, 0x4418, 0x4236, 0x44AD, 0x430E, 0x40D9, 0x440F, 0x4230,
+	0x3F5D, 0x42D7, 0x44D8, 0x43A1, 0x41BA, 0x3F53, 0x45F5, 0x44CF,
+	0x4335, 0x41B0, 0x3EC8, 0x4592, 0x4466, 0x42C5, 0x40C1, 0x3DF4,
+	0x41E2, 0x4460, 0x4289, 0x407F, 0x435C, 0x41DC, 0x43F7, 0x4284,
+	0x3FFC, 0x42EC, 0x4161, 0x43ED, 0x420E, 0x4482, 0x42E3, 0x40E9,
+	0x3DDB, 0x4546, 0x4419, 0x42AB, 0x4067, 0x3DD5, 0x453C, 0x4413,
+	0x423A, 0x4029, 0x3C56, 0x450B, 0x43A5, 0x4230, 0x3FA5, 0x42D2,
+	0x410C, 0x436E, 0x41BA, 0x3F9B, 0x4262, 0x4106, 0x4369, 0x41B4,
+	0x43FF, 0x425C, 0x4011, 0x42F9, 0x4523, 0x4395, 0x4252, 0x3FD2,
+	0x3CD5, 0x451D, 0x438F, 0x41E1, 0x3F49, 0x3B3F, 0x44B5, 0x4386,
+	0x41D7, 0x3F44, 0x427A, 0x44B0, 0x4380, 0x41CD, 0x3F3A, 0x4274,
+	0x4033, 0x4311, 0x4156, 0x43AC, 0x426B, 0x3FB0, 0x430C, 0x4504,
+	0x433E, 0x41F9, 0x440C, 0x45BE, 0x44A0, 0x4338, 0x4183, 0x46A2,
+	0x458D, 0x4496, 0x4301, 0x417D, 0x3EE2, 0x4584, 0x4491, 0x42FB,
+	0x4106, 0x43F7, 0x457E, 0x4428, 0x42F2, 0x40FC, 0x438D, 0x41E3,
+	0x441F, 0x42EC, 0x44E5, 0x4384, 0x41DA, 0x43EC, 0x42E3, 0x447D,
+	0x4319, 0x41D4, 0x3F84, 0x456E, 0x4477, 0x4313, 0x415D, 0x3F00,
+	0x4565, 0x446E, 0x42DC, 0x4158, 0x3EF6, 0x455B, 0x4409, 0x42D2,
+	0x414E, 0x436E, 0x41F6, 0x4400, 0x42CD, 0x40D6, 0x4364, 0x41BA,
+	0x442D, 0x42C3, 0x445E, 0x42F9, 0x41B4, 0x3FA2, 0x4257, 0x4458,
+	0x42F4, 0x41AF, 0x3F1D, 0x4574, 0x4482, 0x4322, 0x41A5, 0x3F18,
+	0x3B6E, 0x4479, 0x4319, 0x4132, 0x3ED4, 0x41D7, 0x4418, 0x42AD,
+	0x4129, 0x437D, 0x4206, 0x4000, 0x42A8, 0x4123, 0x4373, 0x4201,
+	0x3FFB, 0x429E, 0x4469, 0x436E, 0x41FB, 0x3FF5, 0x4267, 0x4463,
+	0x4303, 0x4185, 0x3F76, 0x3CD0, 0x448D, 0x42FE, 0x4180, 0x3F6C,
+	0x3CCA, 0x4428, 0x4328, 0x417A, 0x3F66, 0x4252, 0x40CB, 0x4323,
+	0x4142, 0x3F27, 0x424D, 0x4053, 0x42B8, 0x41A5, 0x4383, 0x4215,
+	0x4049, 0x3D8B, 0x44AA, 0x4379, 0x420B, 0x400F, 0x3D41, 0x44A0,
+	0x4374, 0x4206, 0x4079, 0x3DC3, 0x4123, 0x43A2, 0x41FC, 0x4073,
+	0x3DBD, 0x4153, 0x4338, 0x41C4, 0x3FFA, 0x4262, 0x414E, 0x4332,
+	0x4226, 0x3FF0, 0x4291, 0x40DB, 0x3F33, 0x41B9, 0x43C5, 0x428C,
+	0x40D1, 0x3EB3, 0x41AF, 0x43BC, 0x4286, 0x4106, 0x3EAD, 0x3BA1,
+	0x43B6, 0x42B5, 0x4100, 0x3EA3, 0x41DA, 0x43E0, 0x42AB, 0x40F6,
+	0x3EDF, 0x41D4, 0x3FD7, 0x4240, 0x40BE, 0x430C, 0x4204, 0x3FCD,
+	0x426F, 0x4125, 0x433A, 0x4192, 0x3FC7, 0x3CB3, 0x445E, 0x4335,
+	0x418D, 0x3FC1, 0x3D82, 0x442D, 0x42FE, 0x41C1, 0x3FF7, 0x3D78,
+	0x40DD, 0x42F9, 0x41B7, 0x3FF2, 0x3D72, 0x40D8, 0x4323, 0x41E7,
+	0x3FE8, 0x4252, 0x4108, 0x431E, 0x41E1, 0x4382, 0x424C, 0x4103,
+	0x3F2A, 0x4174, 0x43AC, 0x427B, 0x4133, 0x3EAA, 0x44F8, 0x43A7,
+	0x4272, 0x412D, 0x3F5B, 0x3B54, 0x43D1, 0x42A1, 0x40BB, 0x3EDC,
+	0x41CE, 0x43FA, 0x429B, 0x40EB, 0x3F8C, 0x41C4, 0x4073, 0x42C6,
+	0x40E6, 0x432B, 0x41F4, 0x3FFF, 0x425F, 0x411A, 0x4359, 0x41EE,
+	0x4030, 0x3E06, 0x4450, 0x4354, 0x421D, 0x40D3, 0x3E42, 0x4475,
+	0x4322, 0x4249, 0x4060, 0x3E38, 0x4470, 0x434C, 0x41E0, 0x4095,
+	0x3E74, 0x416F, 0x4342, 0x4210, 0x408B, 0x3E6E, 0x419F, 0x4370,
+	0x4206, 0x40C0, 0x3EAA, 0x3BB1, 0x439A, 0x4235, 0x40B6, 0x3EE1,
+	0x3C88, 0x43C4, 0x4264, 0x40EA, 0x3EDB, 0x3BF3, 0x4004, 0x4293,
+	0x411B, 0x3F12, 0x4187, 0x403A, 0x428A, 0x4115, 0x3FBC, 0x41B7,
+	0x4030, 0x3E0C, 0x4145, 0x434D, 0x41E6, 0x4065, 0x3E47, 0x4175,
+	0x437B, 0x4215, 0x409A, 0x3EF9, 0x3B3F, 0x4315, 0x4244, 0x40CA,
+	0x3F30, 0x3C18, 0x4052, 0x423B, 0x40C5, 0x3F2A, 0x3C5B, 0x3FDE,
+	0x426A, 0x40F5, 0x3F60, 0x4197, 0x4014, 0x3E66, 0x4125, 0x3F96,
+	0x41C6, 0x4045, 0x3E61, 0x4155, 0x42FB, 0x41F6, 0x407A, 0x3E9C,
+	0x3C42, 0x4325, 0x4225, 0x40AA, 0x3ED3, 0x3BAD, 0x434F, 0x4250,
+	0x40A5, 0x3F09, 0x3C7F, 0x402D, 0x427E, 0x40D5, 0x3F40, 0x3CBD,
+	0x405D, 0x3E08, 0x4105, 0x3F76, 0x41DB, 0x4025, 0x3E44, 0x4135,
+	0x3FAB, 0x420A, 0x4059, 0x3E7B, 0x3CAA, 0x4335, 0x4235, 0x408A,
+	0x3EB2, 0x3CEC, 0x4363, 0x4264, 0x40BB, 0x3EED, 0x3D29, 0x4047,
+	0x428F, 0x40EB, 0x3F23, 0x3D66, 0x4078, 0x425C, 0x411B, 0x3F55,
+	0x3DA2, 0x40A8, 0x3ED6, 0x4184, 0x3FC6, 0x421B, 0x40D8, 0x3F11,
+	0x41AF, 0x3FF7, 0x424A, 0x413E, 0x4313, 0x41DE, 0x402C, 0x3E52,
+	0x40D4, 0x433D, 0x4209, 0x405D, 0x3E89, 0x413A, 0x430B, 0x41D6,
+	0x40C8, 0x3EBF, 0x3CBC, 0x4335, 0x4235, 0x40F8, 0x3F32, 0x3CF9,
+	0x4085, 0x4264, 0x4127, 0x3F68, 0x3D36, 0x40B5, 0x428F, 0x418C,
+	0x3F9D, 0x4223, 0x411B, 0x3F1F, 0x41B7, 0x4009, 0x41F0, 0x40AD,
+	0x3F55, 0x3D66, 0x403A, 0x424F, 0x4117, 0x3FC6, 0x3DA2, 0x43A7,
+	0x427E, 0x4142, 0x3FF7, 0x3E1B, 0x3BBF, 0x42D8, 0x41A7, 0x4062,
+	0x3E52, 0x3BFE, 0x3F44, 0x4206, 0x408E, 0x3EC5, 0x4165, 0x3F7A,
+	0x3E08, 0x405A, 0x3F00, 0x4132, 0x3FE6, 0x3E80, 0x40C0, 0x3F6D,
+	0x4196, 0x404D, 0x3EB7, 0x3C71, 0x4321, 0x41F2, 0x407D, 0x3F25,
+	0x3CF6, 0x3981, 0x4220, 0x40E3, 0x3F91, 0x3D33, 0x39CC, 0x41ED,
+	0x4148, 0x3FFD, 0x3DAD, 0x3B48, 0x3EA6, 0x4114, 0x3F8D, 0x3E26,
+	0x40A2, 0x3F14, 0x3D62, 0x3FF9, 0x3E99, 0x40D2, 0x3F85, 0x3DDB,
+	0x4060, 0x3F0B, 0x4137, 0x3FEC, 0x3E4F, 0x3BC1, 0x426C, 0x41CC,
+	0x4057, 0x3EC2, 0x3C48, 0x384C, 0x4199, 0x40BD, 0x3F30, 0x3CC9,
+	0x39F1, 0x41F8, 0x4085, 0x3EFA, 0x3D44, 0x3FDC, 0x3E3F, 0x40EA,
+	0x3F67, 0x3DBD, 0x407C, 0x3EED, 0x3D3B, 0x3FD3, 0x3E36, 0x40DE,
+	0x3F5A, 0x3DB0, 0x403A, 0x4218, 0x4142, 0x3FC6, 0x3E29, 0x3B50,
+	0x4272, 0x410F, 0x402D, 0x3E9B, 0x3BDD, 0x38D5, 0x41A0, 0x3FF8,
+	0x3F09, 0x3CA2, 0x3F84, 0x3DA4, 0x4094, 0x3ECF, 0x3D21, 0x3FEC,
+	0x3E54, 0x40F6, 0x3F77, 0x3D96, 0x4088, 0x3EC6, 0x3D14, 0x3FDF,
+	0x3E47, 0x40ED, 0x3F6B, 0x3D89, 0x3A9F, 0x4252, 0x40EA, 0x3FD6,
+	0x3E3E, 0x3C3B, 0x424F, 0x414F, 0x3FCC, 0x3EAD, 0x3CBB, 0x39A2,
+	0x41AA, 0x403A, 0x3EE3, 0x3D73, 0x3FCB, 0x3DF7, 0x40D5, 0x3F1C,
+	0x3D38, 0x4067, 0x3E6A, 0x40D0, 0x3FBE, 0x3DEE, 0x4093, 0x3F13,
+	0x3D2F, 0x405B, 0x41CE, 0x40CA, 0x3FB1, 0x3DE1, 0x3B96, 0x422F,
+	0x415F, 0x3FAC, 0x3E8C, 0x3C5B, 0x425A, 0x412C, 0x404F, 0x3F34,
+	0x3D14, 0x3FAA, 0x41EC, 0x40E6, 0x3EFB, 0x3E07, 0x4047, 0x3E49,
+	0x40B2, 0x3FD4, 0x3DCD, 0x4044, 0x3F29, 0x4178, 0x403A, 0x3E78,
+	0x40DB, 0x3FC7, 0x3DC0, 0x403C, 0x423B, 0x413B, 0x3FC9, 0x3EA6,
+	0x3C3A, 0x426C, 0x416D, 0x4065, 0x3F13, 0x3D35, 0x3A8B, 0x41CC,
+	0x4090, 0x3F4C, 0x3DE6, 0x4058, 0x422D, 0x412D, 0x3FE9, 0x3E1D,
+	0x408F, 0x3F3F, 0x3DD9, 0x3FEB, 0x3ECA, 0x4120, 0x3FA7, 0x3DDB,
+	0x3C9C, 0x3FA3, 0x4122, 0x4014, 0x3EF8, 0x3C5B, 0x3AFA, 0x417D,
+	0x4076, 0x3EF3, 0x3D51, 0x3AB7, 0x372A, 0x40DD, 0x3F98, 0x3E76,
+	0x3BC8, 0x388C, 0x3DC2, 0x3FFF, 0x3E40, 0x3CC6, 0x3FC2, 0x3E31,
+	0x3BFF, 0x3F52, 0x3DF2, 0x3FC3, 0x3E6F, 0x3D38, 0x3F4C, 0x3DB7,
+	0x4090, 0x3F45, 0x3D32, 0x3B6B, 0x3ED0, 0x40C3, 0x3F7D, 0x3E23,
+	0x3CA8, 0x395C, 0x40F2, 0x3FE4, 0x3E90, 0x3C70, 0x3ACC, 0x3E89,
+	0x4082, 0x3F37, 0x3D9E, 0x3B94, 0x3E53, 0x3CDF, 0x3F68, 0x3E0D,
+	0x3BDE, 0x3F65, 0x3DCD, 0x403D, 0x3EB9, 0x3D14, 0x3F62, 0x3E0C,
+	0x3C53, 0x3EEB, 0x3D4B, 0x3FFF, 0x3EE8, 0x3D0B, 0x3A25, 0x3E72,
+	0x4098, 0x3F1C, 0x3D83, 0x3BC0, 0x37EF, 0x40CF, 0x3F83, 0x3E2E,
+	0x3C7B, 0x397E, 0x3E26, 0x4022, 0x3F0C, 0x3D3A, 0x3B6C, 0x3E28,
+	0x3C3B, 0x3F12, 0x3DA9, 0x3BAA, 0x3ECD, 0x3DA2, 0x3FDD, 0x3EC5,
+	0x3CEC, 0x3FA4, 0x3DE0, 0x3BEC, 0x3EC7, 0x4115, 0x3FA5, 0x3E86,
+	0x3D1C, 0x3A84, 0x4177, 0x403D, 0x3F2C, 0x3D98, 0x3B98, 0x3906,
+	0x40A0, 0x3F96, 0x3E02, 0x3C53, 0x394D, 0x3DC3, 0x3FC6, 0x3EE5,
+	0x3D4B, 0x3B04, 0x4199, 0x4060, 0x3F86, 0x3D8A, 0x3BC6, 0x3EA9,
+	0x40C3, 0x3FBD, 0x3E67, 0x3D3B, 0x3F47, 0x3E60, 0x3FE9, 0x3F0E,
+	0x3D3D, 0x3FE2, 0x3E99, 0x3CF5, 0x3FAE, 0x3DE4, 0x404B, 0x3ED2,
+	0x3DE1, 0x3BF3, 0x3EC7, 0x40E3, 0x3F6B, 0x3E89, 0x3C6A, 0x3A50,
+	0x4145, 0x400A, 0x3EC2, 0x3D5C, 0x3BE2, 0x3884, 0x406E, 0x3F29,
+	0x3E42, 0x3C27, 0x39AF, 0x3D98, 0x3FC9, 0x3EE8, 0x3D14, 0x3B93,
+	0x3E02, 0x3CD3, 0x3F57, 0x3DC3, 0x3C17, 0x3EA9, 0x3DBF, 0x3B47,
+	0x3EA2, 0x3C8D, 0x3F4A, 0x3E31, 0x3C86, 0x3A2D, 0x3D7B, 0x3FB3,
+	0x3E69, 0x3D73, 0x3ABE, 0x3E28, 0x404D, 0x3F0B, 0x3E21, 0x3BFE,
+	0x3A62, 0x40B0, 0x3F79, 0x3EC7, 0x3CF2, 0x3AEE, 0x374E, 0x400F,
+	0x3F32, 0x3DA1, 0x3BAF, 0x3A10, 0x3D9E, 0x3FCD, 0x3E4A, 0x3CA5,
+	0x3B65, 0x3E46, 0x3C64, 0x3EF0, 0x3D59, 0x3BE5, 0x3EE8, 0x3D56,
+	0x3B18, 0x3E02, 0x3CA0, 0x3F52, 0x3DFF, 0x3C1A, 0x39B9, 0x3D8D,
+	0x3FBB, 0x3E6F, 0x3CD0, 0x3A8B, 0x38C8, 0x401F, 0x3F11, 0x3D80,
+	0x3BCB, 0x3A79, 0x3D7D, 0x3F76, 0x3E28, 0x3C8F, 0x3B82, 0x3E21,
+	0x3C80, 0x3ED2, 0x3DE7, 0x3C3F, 0x3E91, 0x3D30, 0x3B3A, 0x3E8E,
+	0x3D2D, 0x3EFB, 0x3DDE, 0x3C36, 0x3A67, 0x3D9F, 0x3FA2, 0x3E88,
+	0x3D64, 0x3BED, 0x3988, 0x4068, 0x3F5B, 0x3E0D, 0x3CA4, 0x3A9B,
+	0x3756, 0x3FC3, 0x3EAF, 0x3D54, 0x3B9F, 0x392C, 0x3D19, 0x3F19,
+	0x3DC5, 0x3C5B, 0x3A4A, 0x3DC2, 0x3C58, 0x3E6D, 0x3D0C, 0x3B54,
+	0x3E33, 0x3CD0, 0x3B0D, 0x3E2B, 0x3CC9, 0x3E9E, 0x3D7B, 0x3BCC,
+	0x39F1, 0x3D73, 0x3FA4, 0x3E93, 0x3C83, 0x3AC2, 0x382B, 0x3FD7,
+	0x3EFE, 0x3DE1, 0x3C78, 0x3959, 0x35BF, 0x3F63, 0x3E4D, 0x3CF0,
+	0x3B77, 0x394E, 0x3CED, 0x3F27, 0x3D66, 0x3C2F, 0x3A62, 0x3D5F,
+	0x3BF2, 0x3E7B, 0x3D5C, 0x3B2C, 0x3DD0, 0x3CA4, 0x3EE5, 0x3DCD,
+	0x3CA1, 0x3EE2, 0x3DC6, 0x3BA4, 0x3E39, 0x3D14, 0x3F16, 0x3E36,
+	0x3D0C, 0x3AD9, 0x3E2E, 0x3FE4, 0x3F0C, 0x3D7E, 0x3C17, 0x3A8A,
+	0x4047, 0x3F71, 0x3E60, 0x3CC8, 0x3B4E, 0x396B, 0x400D, 0x3ECA,
+	0x3DB1, 0x3C85, 0x3EC7, 0x3DAA, 0x3F9A, 0x3E8E, 0x3CF8, 0x3EFB,
+	0x3E1A, 0x3CF5, 0x3EF4, 0x3E13, 0x3FC9, 0x3EF0, 0x3D67, 0x3C39,
+	0x3E4B, 0x4060, 0x3F24, 0x3E44, 0x3D5C, 0x3B71, 0x4092, 0x3FF2,
+	0x3F1A, 0x3D96, 0x3CA2, 0x3A66, 0x4088, 0x3F4D, 0x3E72, 0x3D14,
+	0x3BE4, 0x3DFF, 0x3CD9, 0x3B23, 0x393F, 0x3CD6, 0x3ADC, 0x3DBD,
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+	0x3A72, 0x3CD8, 0x3BAC, 0x39EC, 0x3CD1, 0x3BA9, 0x39E9, 0x37AF,
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+	0x38D4, 0x380F, 0x36C7, 0x35A9, 0x33E2, 0x374B, 0x3986, 0x38C9,
+	0x3744, 0x3632, 0x34C4, 0x328D, 0x39BB, 0x3903, 0x3805, 0x373D,
+	0x35E1, 0x3381, 0x3112, 0x393D, 0x387E, 0x377A, 0x366A, 0x3502,
+	0x3375, 0x36EF, 0x3932, 0x383A, 0x36AC, 0x358D, 0x3414, 0x3730,
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+	0x370A, 0x35F3, 0x33EA, 0x3A37, 0x3946, 0x388D, 0x37C8, 0x363B,
+	0x3515, 0x33E2, 0x36BC, 0x35A3, 0x3803, 0x3701, 0x362F, 0x342E,
+	0x377F, 0x3675, 0x34C4, 0x37BE, 0x3672, 0x3553, 0x383B, 0x36F2,
+	0x35E0, 0x3424, 0x3736, 0x3666, 0x34B5, 0x37B4, 0x36AC, 0x3549,
+	0x332D, 0x36A4, 0x3590, 0x3831, 0x36E9, 0x3617, 0x3463, 0x3321,
+	0x2FF0, 0x38E5, 0x37AB, 0x36E2, 0x3581, 0x3457, 0x321A, 0x2E2D,
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+	0x3630, 0x3482, 0x32A4, 0x3675, 0x3511, 0x37FA, 0x36B5, 0x359A,
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+	0x351E, 0x33EF, 0x36BB, 0x35A6, 0x37FF, 0x36FB, 0x35EC, 0x3512,
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+	0x2F76, 0x2E75, 0x2CFE, 0x2A87, 0x32D1, 0x323A, 0x319D, 0x306C,
+	0x2FBD, 0x2E68, 0x2CF1, 0x2A7F, 0x32C5, 0x322E, 0x3153, 0x30AD,
+	0x2F6B, 0x2EB7, 0x2D48, 0x2AE9, 0x2F67, 0x322B, 0x3147, 0x3059,
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+	0x2FAB, 0x2E51, 0x2CDE, 0x309E, 0x2F53, 0x2E4D, 0x313C, 0x3096,
+	0x2F54, 0x2EA0, 0x2CD6, 0x3045, 0x2F50, 0x2E45, 0x3130, 0x3045,
+	0x2F9B, 0x2DEE, 0x3135, 0x3042, 0x2F97, 0x2E42, 0x2C6F, 0x308B,
+	0x2F94, 0x2E3E, 0x3174, 0x3087, 0x2F45, 0x2E91, 0x2CC2, 0x307F,
+	0x2F90, 0x3201, 0x3125, 0x3037, 0x2F8C, 0x2E84, 0x2D1A, 0x2B20,
+	0x2FD7, 0x3247, 0x3164, 0x30C4, 0x2F80, 0x2E2A, 0x2D6B, 0x2B82,
+	0x2845, 0x31FE, 0x311A, 0x3079, 0x2F7D, 0x2ECF, 0x2D0F, 0x2B15,
+	0x28C3, 0x323C, 0x319F, 0x30B9, 0x2FC4, 0x2E76, 0x2D60, 0x2B77,
+	0x2FC0, 0x2E72, 0x3156, 0x3069, 0x2FC5, 0x2EC4, 0x2DB1, 0x2BD2,
+	0x2FBC, 0x2F10, 0x3194, 0x30F5, 0x3006, 0x2F0C, 0x2D56, 0x2C2C,
+	0x2FB5, 0x2EBD, 0x2DAA, 0x30AB, 0x2FB5, 0x2EB9, 0x2DFE, 0x30EE,
+	0x2FFF, 0x2F05, 0x2DFA, 0x30EA, 0x3049, 0x2F51, 0x2DF6, 0x30A3,
+	0x2FF8, 0x2EFE, 0x2D9F, 0x2C7E, 0x2FF8, 0x2EFE, 0x31C8, 0x312A,
+	0x3042, 0x2F4A, 0x2E46, 0x2CD6, 0x303E, 0x2F46, 0x31C4, 0x312B,
+	0x303E, 0x2F4B, 0x2E3E, 0x2CD3, 0x2BA6, 0x329B, 0x31C1, 0x311F,
+	0x3083, 0x2FE0, 0x2E91, 0x2D83, 0x2B99, 0x3298, 0x31BD, 0x3166,
+	0x30CC, 0x2F8F, 0x2E8D, 0x2D27, 0x2BFD, 0x2FD9, 0x31FB, 0x31A8,
+	0x307C, 0x2FD0, 0x2F2A, 0x2E26, 0x2CB1, 0x2FD5, 0x323C, 0x315F,
+	0x30BC, 0x301F, 0x2F27, 0x2DCC, 0x30C1, 0x3016, 0x2F72, 0x319D,
+	0x3104, 0x301B, 0x2F1A, 0x2E6C, 0x3100, 0x3060, 0x2F6E, 0x319A,
+	0x314B, 0x3018, 0x2FB9, 0x31E3, 0x3143, 0x3061, 0x2F67, 0x2EBA,
+	0x3148, 0x3058, 0x2FB5, 0x31E0, 0x313F, 0x305D, 0x2FB1, 0x2F0B,
+	0x3144, 0x30A1, 0x2FB6, 0x2F03, 0x2E03, 0x2C93, 0x2A91, 0x2F08,
+	0x3182, 0x30E9, 0x2FF8, 0x2F53, 0x2E00, 0x2CE5, 0x2B58, 0x28AE,
+	0x317F, 0x312C, 0x3041, 0x2F9D, 0x2E49, 0x2D92, 0x2BBC, 0x29A2,
+	0x23CB, 0x312D, 0x3089, 0x2F9F, 0x2EEB, 0x2D94, 0x2C16, 0x2A74,
+	0x2EA0, 0x2DE7, 0x30CD, 0x2F9B, 0x2F3B, 0x2DDE, 0x2CCD, 0x2B44,
+	0x2EE4, 0x2E3A, 0x30CE, 0x2FDC, 0x2F86, 0x2E31, 0x2D7F, 0x2B47,
+	0x2F34, 0x2E87, 0x2D76, 0x3026, 0x2FD0, 0x2E83, 0x2D7C, 0x2C5E,
+	0x2F7F, 0x2ED8, 0x2DCF, 0x2C5E, 0x3019, 0x2ED4, 0x2DC6, 0x2CB4,
+	0x2FC9, 0x2F23, 0x2E22, 0x2CB0, 0x2BEC, 0x2F20, 0x2E19, 0x2D67,
+	0x3012, 0x2F73, 0x2E6F, 0x2D63, 0x2C49, 0x2A47, 0x2E6B, 0x30F9,
+	0x305B, 0x2FBD, 0x2EC0, 0x2DB7, 0x2CA5, 0x2B12, 0x2872, 0x3140,
+	0x30A7, 0x3002, 0x2F0C, 0x2E0A, 0x2D00, 0x2BD9, 0x2951, 0x318A,
+	0x30EE, 0x304A, 0x2F57, 0x2E5C, 0x2DAC, 0x2C90, 0x2A99, 0x285B,
+	0x3130, 0x3047, 0x2FA1, 0x2EB1, 0x2DFA, 0x2CE6, 0x2B62, 0x28D5,
+	0x2DF6, 0x308F, 0x303A, 0x2F4B, 0x2E4C, 0x2D40, 0x2BC0, 0x29B1,
+	0x2E48, 0x2D97, 0x303B, 0x2F95, 0x2E9D, 0x2D94, 0x2C78, 0x2FE2,
+	0x2EEC, 0x2E3B, 0x2CD6, 0x2B4D, 0x2EE8, 0x3167, 0x30CA, 0x302B,
+	0x2F37, 0x2E37, 0x2D2B, 0x2C0C, 0x2F85, 0x2E8D, 0x30C7, 0x3028,
+	0x2F81, 0x2E89, 0x2D7F, 0x2C68, 0x2FCF, 0x2ED8, 0x2E27, 0x30BA,
+	0x301B, 0x2F2C, 0x2E7C, 0x2D72, 0x301B, 0x2F2C, 0x2E28, 0x2D6E,
+	0x2BFD, 0x2F76, 0x2E78, 0x2DC5, 0x3063, 0x2FBE, 0x2ECD, 0x2E1B,
+	0x2D0F, 0x2BEF, 0x2F1B, 0x2E6C, 0x2D67, 0x3010, 0x2F18, 0x2E68,
+	0x2D63, 0x2C4C, 0x2ABD, 0x2EBC, 0x2DBA, 0x3053, 0x2FB3, 0x2F0B,
+	0x2E10, 0x2D03, 0x2B7F, 0x29DB, 0x2E60, 0x309F, 0x3000, 0x2F5E,
+	0x2E5C, 0x2D52, 0x2C40, 0x2B0F, 0x2876, 0x312F, 0x3048, 0x2FA3,
+	0x2EFB, 0x2DFF, 0x2D4A, 0x2B73, 0x2A35, 0x2868, 0x308F, 0x2FF0,
+	0x2F4E, 0x2E4C, 0x2D99, 0x2C89, 0x2B66, 0x28E1, 0x2DEF, 0x3087,
+	0x2F97, 0x2EEF, 0x2E44, 0x2D3F, 0x2BC3, 0x2A8E, 0x2E44, 0x2D91,
+	0x2C1E, 0x2F3E, 0x2E99, 0x2D8D, 0x2C7D, 0x2BB6, 0x29AB, 0x2DE3,
+	0x2CD6, 0x2C16, 0x2F36, 0x2E34, 0x2D2E, 0x2C70, 0x2AE6, 0x2E88,
+	0x2D85, 0x2CC9, 0x2B49, 0x2E88, 0x2DDB, 0x2CC5, 0x2BAA, 0x2ED7,
+	0x2E2C, 0x2D1D, 0x2C0A, 0x2A71, 0x2E7C, 0x2D75, 0x2C65, 0x2F73,
+	0x2ECA, 0x2DCB, 0x2CBE, 0x2B3D, 0x2A04, 0x2DCB, 0x2D16, 0x2FC0,
+	0x2F1E, 0x2E20, 0x2D6D, 0x2C53, 0x2B30, 0x291E, 0x2DBE, 0x300C,
+	0x2F6B, 0x2F11, 0x2E14, 0x2D60, 0x2BF2, 0x2A5D, 0x2825, 0x3058,
+	0x3000, 0x2F5F, 0x2E68, 0x2DB6, 0x2CA5, 0x2BE4, 0x2A4F, 0x281D,
+	0x2298, 0x2FAC, 0x2F06, 0x2E5C, 0x2D54, 0x2C9D, 0x2B1C, 0x2971,
+	0x2710, 0x2CF0, 0x2FA4, 0x2EB0, 0x2DAB, 0x2CF5, 0x2BD9, 0x2B0E,
+	0x2963, 0x2D4D, 0x2C33, 0x2F47, 0x2EA3, 0x2D9E, 0x2CE8, 0x2BCB,
+	0x2A3B, 0x2E47, 0x2D40, 0x2C2B, 0x2EF1, 0x2E47, 0x2D96, 0x2C84,
+	0x2B03, 0x2E96, 0x2D96, 0x2C85, 0x2BC4, 0x2EE5, 0x2E3F, 0x2D38,
+	0x2C23, 0x2EEA, 0x2E8E, 0x2D89, 0x2C7C, 0x2BBB, 0x2E8F, 0x2DDF,
+	0x2D2B, 0x2F88, 0x2EDD, 0x2E38, 0x2D81, 0x2C6F, 0x2AF3, 0x2E87,
+	0x2D82, 0x2C75, 0x2F7B, 0x2E87, 0x2E2B, 0x2D23, 0x2C0E, 0x2AE5,
+	0x2940, 0x2D7A, 0x3012, 0x2F27, 0x2E7A, 0x2DCA, 0x2D16, 0x2C01,
+	0x2AD8, 0x28BF, 0x305D, 0x2F74, 0x2F1A, 0x2E6D, 0x2D6D, 0x2C60,
+	0x2B40, 0x2A05, 0x2847, 0x300B, 0x2FB7, 0x2F12, 0x2E17, 0x2D65,
+	0x2C53, 0x2B32, 0x29FC, 0x2DBF, 0x3003, 0x2F5B, 0x2EBD, 0x2E0F,
+	0x2D07, 0x2CA2, 0x2F06, 0x2E0F, 0x2DB2, 0x2CA7, 0x2BE4, 0x2ABA,
+	0x2DB7, 0x2CFF, 0x2BEA, 0x2EB0, 0x2E5A, 0x2D59, 0x2C9A, 0x2B82,
+	0x29E7, 0x2DAA, 0x2CF2, 0x2F9F, 0x2EF5, 0x2E03, 0x2D4C, 0x2C92,
+	0x2B74, 0x29DE, 0x27A4, 0x2C93, 0x2F42, 0x2EA4, 0x2DF6, 0x2D3F,
+	0x2C32, 0x2B6C, 0x2A39, 0x2812, 0x2FE2, 0x2F3E, 0x2E98, 0x2DE9,
+	0x2CE6, 0x2C25, 0x2B09, 0x2963, 0x280A, 0x2439, 0x2F32, 0x2E8B,
+	0x2D92, 0x2D33, 0x2C1C, 0x2AFB, 0x295B, 0x27FB, 0x2C79, 0x2F2E,
+	0x2E87, 0x2DD8, 0x2CD1, 0x2BBB, 0x2AEE, 0x29B7, 0x2703, 0x2C6C,
+	0x2B53, 0x2E31, 0x2D81, 0x2CCD, 0x2C0B, 0x2A89, 0x28DD, 0x2D1F,
+	0x2C11, 0x2B4B, 0x2E76, 0x2DCC, 0x2CC0, 0x2BAF, 0x2AE2, 0x2941,
+	0x2D1B, 0x2C60, 0x2B3E, 0x2E25, 0x2D75, 0x2CBC, 0x2BFF, 0x2ADA,
+	0x2E13, 0x2D0E, 0x2C05, 0x2B3A, 0x2A07, 0x2DBC, 0x2D0A, 0x2BF2,
+	0x2A70, 0x2DC1, 0x2D0A, 0x2C4F, 0x2B90, 0x2A04, 0x2D64, 0x2C55,
+	0x2B96, 0x2E63, 0x2E07, 0x2D02, 0x2C47, 0x2B2E, 0x29F6, 0x2843,
+	0x2CF9, 0x2BE6, 0x2EAC, 0x2DB0, 0x2CFE, 0x2C43, 0x2B7F, 0x29EE,
+	0x28A8, 0x2C9F, 0x2F02, 0x2E5B, 0x2DAC, 0x2CF1, 0x2C36, 0x2B22,
+	0x29EA, 0x3039, 0x2F9D, 0x2EFE, 0x2E9B, 0x2DF2, 0x2D42, 0x2C37,
+	0x2B73, 0x2A44, 0x3035, 0x2F90, 0x2F3C, 0x2E97, 0x2D9C, 0x2CE9,
+	0x2C2A, 0x2B6B, 0x29DE, 0x2D8E, 0x2FD6, 0x2F38, 0x2E8F, 0x2DE7,
+	0x2D36, 0x2C7D, 0x2B67, 0x2A99, 0x2DDD, 0x2CD8, 0x2F2C, 0x2E8B,
+	0x2E30, 0x2D32, 0x2C75, 0x2B5A, 0x2A3A, 0x2D86, 0x2CD0, 0x2C15,
+	0x2ED3, 0x2DDF, 0x2D25, 0x2CC7, 0x2BB4, 0x2A8D, 0x2D7E, 0x2D21,
+	0x2C11, 0x2AF3, 0x2E20, 0x2D75, 0x2CC3, 0x2BB0, 0x2E71, 0x2DC9,
+	0x2D1D, 0x2C0D, 0x2B45, 0x2A7B, 0x2D71, 0x2CBB, 0x2C00, 0x2E6E,
+	0x2DC5, 0x2D10, 0x2C5C, 0x2B9E, 0x2A7D, 0x2D6D, 0x2CB7, 0x2BFC,
+	0x2E6A, 0x2DC1, 0x2D60, 0x2CAE, 0x2B42, 0x2A6F, 0x299C, 0x2D08,
+	0x2BF8, 0x2EB2, 0x2E07, 0x2D5C, 0x2C54, 0x2BEA, 0x2B2B, 0x299E,
+	0x27DF, 0x2C47, 0x2EAE, 0x2E03, 0x2DAC, 0x2CA2, 0x2BE6, 0x2ACD,
+	0x2990, 0x2844, 0x25E1, 0x2EFA, 0x2DFF, 0x2DA8, 0x2CF3, 0x2C3E,
+	0x2B1F, 0x2A55, 0x291E, 0x26D4, 0x24A7, 0x2E48, 0x2DA4, 0x2CEF,
+	0x2C3B, 0x2B79, 0x2A52, 0x2910, 0x2744, 0x2BD1, 0x2B17, 0x2DEE,
+	0x2D3F, 0x2C37, 0x2BCD, 0x2A53, 0x2976, 0x282A, 0x2C29, 0x2B6C,
+	0x2A40, 0x2D3B, 0x2C80, 0x2C20, 0x2AA6, 0x2A3B, 0x282C, 0x2C7B,
+	0x2B6D, 0x2AA2, 0x2D86, 0x2CD1, 0x2C1C, 0x2B01, 0x2A38, 0x28F5,
+	0x2C77, 0x2BB8, 0x2AF8, 0x2965, 0x2CD6, 0x2C73, 0x2B56, 0x2A34,
+	0x295B, 0x2CC9, 0x2BBD, 0x2B52, 0x2A26, 0x28ED, 0x2C6F, 0x2BAF,
+	0x2A96, 0x29C0, 0x2CC5, 0x2C10, 0x2BA6, 0x2A82, 0x2953, 0x2802,
+	0x2C02, 0x2AEC, 0x2DC4, 0x2D15, 0x2CB7, 0x2BA7, 0x2ADE, 0x29B8,
+	0x286B, 0x260C, 0x2B9E, 0x2DC8, 0x2D68, 0x2CB3, 0x2BFA, 0x2ADA,
+	0x2A16, 0x293D, 0x2707, 0x257A, 0x2E11, 0x2DB2, 0x2D04, 0x2BF7,
+	0x2B3E, 0x2AD1, 0x299C, 0x27E8, 0x257D, 0x2E5A, 0x2DAE, 0x2D00,
+	0x2CA2, 0x2BE9, 0x2ACE, 0x29FF, 0x2857, 0x267C, 0x24DC, 0x2E00,
+	0x2D53, 0x2C9E, 0x2BE5, 0x2B23, 0x29FC, 0x28BE, 0x276D, 0x25E7,
+	0x2B1F, 0x2D9D, 0x2CEE, 0x2C37, 0x2B7C, 0x2A62, 0x29EE, 0x28B0,
+	0x26DD, 0x2B1B, 0x2A54, 0x2D42, 0x2C92, 0x2BD9, 0x2B16, 0x2A4A,
+	0x2916, 0x2C88, 0x2BCF, 0x2B0D, 0x29E5, 0x2CDD, 0x2C2B, 0x2B6B,
+	0x2A4C, 0x2975, 0x2C85, 0x2BCC, 0x2B0E, 0x2A42, 0x2971, 0x2C80,
+	0x2BC7, 0x2B05, 0x2A3E, 0x2D2D, 0x2C77, 0x2BBE, 0x2A9E, 0x296D,
+	0x2CCC, 0x2C19, 0x2B59, 0x2A3A, 0x2969, 0x2821, 0x2BBF, 0x2AFD,
+	0x2D80, 0x2D20, 0x2C6F, 0x2BB6, 0x2AF8, 0x2A2C, 0x295B, 0x2C6B,
+	0x2BB1, 0x2AEF, 0x2D72, 0x2CC4, 0x2C11, 0x2B4D, 0x2A88, 0x2957,
+	0x2CBF, 0x2BAE, 0x2AEB, 0x2A24, 0x2953, 0x2C5E, 0x2BA4, 0x2AE7,
+	0x2A20, 0x2CBC, 0x2C59, 0x2BA0, 0x2AE3, 0x2A16, 0x2873, 0x2C00,
+	0x2B9C, 0x2AD9, 0x2D0F, 0x2CAE, 0x2BFC, 0x2B3B, 0x2A18, 0x2946,
+	0x286A, 0x2BF2, 0x2AD5, 0x2A0E, 0x2D02, 0x2C51, 0x2BEE, 0x2AD1,
+	0x2A0A, 0x2938, 0x277D, 0x2B33, 0x2ACD, 0x2D55, 0x2CA6, 0x2C44,
+	0x2B2F, 0x2A6A, 0x2935, 0x2858, 0x276F, 0x24F5, 0x2DA2, 0x2CFA,
+	0x2C98, 0x2B86, 0x2B21, 0x2A5C, 0x292C, 0x284F, 0x2675, 0x23CA,
+	0x2D48, 0x2CEC, 0x2C32, 0x2B7E, 0x2ABB, 0x29EF, 0x291D, 0x2762,
+	0x256D, 0x21CC, 0x2D3F, 0x2C87, 0x2BD4, 0x2B70, 0x2A50, 0x2986,
+	0x283D, 0x2754, 0x255D, 0x2A46, 0x2CE4, 0x2C2A, 0x2BC7, 0x2B0B,
+	0x2A42, 0x2978, 0x2834, 0x2660, 0x2B07, 0x29E3, 0x28A4, 0x2C1D,
+	0x2B68, 0x2B03, 0x29D9, 0x289F, 0x27BF, 0x2B64, 0x2A9D, 0x29D5,
+	0x289B, 0x2BBF, 0x2B5A, 0x2A3A, 0x29CB, 0x2891, 0x273E, 0x2B56,
+	0x2A35, 0x2962, 0x288D, 0x2BB1, 0x2AFB, 0x2A31, 0x28FB, 0x2823,
+	0x2BAD, 0x2AF1, 0x2A28, 0x28F7, 0x281A, 0x2B52, 0x2AED, 0x2A23,
+	0x28ED, 0x2C0C, 0x2B4E, 0x2AE3, 0x29BF, 0x28E9, 0x27A0, 0x26AD,
+	0x2A82, 0x29BB, 0x2C61, 0x2BFE, 0x2B40, 0x2A82, 0x29B6, 0x287C,
+	0x2791, 0x25AE, 0x2A7E, 0x29AD, 0x2C53, 0x2BA0, 0x2AE1, 0x2A75,
+	0x29A8, 0x286E, 0x271B, 0x25A5, 0x2A70, 0x2CAB, 0x2C4F, 0x2B93,
+	0x2B2E, 0x2A13, 0x293F, 0x2860, 0x270C, 0x2596, 0x2D4F, 0x2C9E,
+	0x2C41, 0x2B85, 0x2ACE, 0x2A05, 0x2931, 0x27F2, 0x2693, 0x2488,
+	0x29FB, 0x2C99, 0x2BE4, 0x2B81, 0x2AC1, 0x29F7, 0x28C6, 0x27E3,
+	0x2685, 0x2478, 0x29F3, 0x2C8C, 0x2BD7, 0x2B22, 0x2A60, 0x2994,
+	0x28BD, 0x27DA, 0x267C, 0x2A56, 0x29EE, 0x2C88, 0x2BD2, 0x2B14,
+	0x2AAF, 0x29E5, 0x28AF, 0x2765, 0x2B10, 0x2AAA, 0x297C, 0x2C2C,
+	0x2BC5, 0x2B10, 0x2A4E, 0x2981, 0x28AA, 0x2BC5, 0x2B0C, 0x2A44,
+	0x297D, 0x2C23, 0x2BC1, 0x2B02, 0x2A9D, 0x29D8, 0x2903, 0x2BB7,
+	0x2AFE, 0x2A3C, 0x296F, 0x2898, 0x2BBC, 0x2AFE, 0x2A3C, 0x296F,
+	0x2C16, 0x2BB3, 0x2AFA, 0x2A37, 0x296B, 0x2894, 0x2BAF, 0x2AF6,
+	0x2A90, 0x29C6, 0x288F, 0x27AD, 0x25D6, 0x23B8, 0x2C6D, 0x2C08,
+	0x2BAA, 0x2AEC, 0x2A2A, 0x295D, 0x2823, 0x273D, 0x2644, 0x23A9,
+	0x2959, 0x2C04, 0x2BA6, 0x2AE4, 0x2A21, 0x29B4, 0x28E4, 0x27A0,
+	0x263B, 0x242D, 0x2950, 0x2BFF, 0x2B99, 0x2ADF, 0x2A7A, 0x2950,
+	0x2879, 0x272A, 0x2637, 0x24AE, 0x29AB, 0x28DC, 0x2B94, 0x2B31,
+	0x2A18, 0x294C, 0x28D2, 0x27FD, 0x26A3, 0x2A6C, 0x2948, 0x2870,
+	0x2789, 0x2AD2, 0x2A68, 0x29A2, 0x28D3, 0x2789, 0x262A, 0x2A68,
+	0x2999, 0x28C9, 0x27EF, 0x2ACD, 0x2A63, 0x299E, 0x28C5, 0x27EA,
+	0x2704, 0x2A5A, 0x2995, 0x28C5, 0x2781, 0x268C, 0x2A5F, 0x2990,
+	0x2927, 0x27E6, 0x2B1B, 0x2A5B, 0x29F4, 0x28C1, 0x27E2, 0x26FB,
+	0x2590, 0x29EA, 0x2922, 0x27E2, 0x2B16, 0x2AAD, 0x29EA, 0x2919,
+	0x2846, 0x26F7, 0x2581, 0x29E6, 0x291E, 0x2842, 0x2B12, 0x2AA9,
+	0x29E2, 0x2915, 0x2842, 0x275A, 0x2670, 0x2470, 0x291A, 0x2BC5,
+	0x2B0E, 0x2AA5, 0x29DD, 0x2975, 0x283E, 0x27C6, 0x25F7, 0x2467,
+	0x216D, 0x2BC1, 0x2B63, 0x2AFB, 0x2A36, 0x2971, 0x2897, 0x27C2,
+	0x2663, 0x2565, 0x233E, 0x2C0F, 0x2BB3, 0x2AF2, 0x2A32, 0x29CB,
+	0x2C0F, 0x2B56, 0x2AF7, 0x2A8E, 0x29C7, 0x28F9, 0x281D, 0x26D3,
+	0x2A32, 0x2CBC, 0x2C0B, 0x2BA5, 0x2B47, 0x2A8A, 0x29BD, 0x2955,
+	0x2880, 0x2736, 0x2A8A, 0x2A1F, 0x2C0B, 0x2BFD, 0x2B43, 0x2A80,
+	0x29C2, 0x2956, 0x287C, 0x279C, 0x2ADB, 0x2A1B, 0x294C, 0x2BF9,
+	0x2B3F, 0x2AD7, 0x2A72, 0x29B0, 0x28DE, 0x27A2, 0x2AD7, 0x2A17,
+	0x29B0, 0x28DE, 0x2B98, 0x2B31, 0x2A6E, 0x29A6, 0x28DA, 0x286F,
+	0x2789, 0x2A73, 0x2A09, 0x293A, 0x2865, 0x2B2D, 0x2A6A, 0x29AC,
+	0x293F, 0x286A, 0x278B, 0x2AC5, 0x29FF, 0x2935, 0x286B, 0x27F4,
+	0x270B, 0x2A5B, 0x2999, 0x28C7, 0x27F0, 0x2AC9, 0x2A60, 0x2999,
+	0x2927, 0x2852, 0x270D, 0x2617, 0x2995, 0x28CD, 0x2858, 0x2B1A,
+	0x2A5C, 0x29F2, 0x2923, 0x284E, 0x2773, 0x2687, 0x2515, 0x2986,
+	0x28B4, 0x2B6E, 0x2AB7, 0x2A4E, 0x2986, 0x28BA, 0x2845, 0x26FA,
+	0x260A, 0x248C, 0x291A, 0x2B6A, 0x2AB3, 0x2A4A, 0x2982, 0x2915,
+	0x2841, 0x2761, 0x2674, 0x2502, 0x2368, 0x2BC2, 0x2B08, 0x2AA5,
+	0x29E0, 0x2974, 0x28A7, 0x27D0, 0x26E7, 0x25F7, 0x24F8, 0x218E,
+	0x2B60, 0x2AFA, 0x2A3C, 0x29D1, 0x2907, 0x2899, 0x274E, 0x2667,
+	0x24F4, 0x23E0, 0x217D, 0x2AFF, 0x2A97, 0x2A2D, 0x2961, 0x2895,
+	0x27BD, 0x26D9, 0x25E9, 0x245F, 0x221D, 0x2825, 0x2AF1, 0x2A29,
+	0x29BF, 0x28FA, 0x2886, 0x27AE, 0x2654, 0x255F, 0x23D3, 0x2886,
+	0x27AE, 0x26C6, 0x2A1B, 0x2958, 0x28EB, 0x2816, 0x26C7, 0x25D6,
+	0x24D7, 0x28EB, 0x2878, 0x2732, 0x264B, 0x29B6, 0x294A, 0x287D,
+	0x279B, 0x26B7, 0x25C7, 0x294A, 0x28DD, 0x27A1, 0x2728, 0x263B,
+	0x29A8, 0x28DD, 0x2804, 0x2729, 0x2641, 0x29A8, 0x293C, 0x2809,
+	0x2792, 0x26AE, 0x2543, 0x2941, 0x28D4, 0x2793, 0x271A, 0x2A04,
+	0x2941, 0x28D4, 0x27FB, 0x2720, 0x269F, 0x2533, 0x2933, 0x285C,
+	0x2789, 0x2A68, 0x299F, 0x2933, 0x28C6, 0x27EC, 0x2711, 0x25B0,
+	0x242C, 0x28C6, 0x27F2, 0x277A, 0x2A5A, 0x2990, 0x2925, 0x2853,
+	0x277B, 0x2702, 0x25A1, 0x241C, 0x28BD, 0x27E3, 0x2A5A, 0x29F6,
+	0x292A, 0x28BD, 0x284E, 0x276C, 0x2616, 0x2598, 0x2412, 0x284E,
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+	0x235F, 0x2354, 0x22C8, 0x2239, 0x21A7, 0x210B, 0x206C, 0x1F27,
+	0x1E74, 0x1CFC, 0x2238, 0x21A6, 0x2469, 0x2459, 0x23D8, 0x234E,
+	0x22C2, 0x22B7, 0x2227, 0x2195, 0x206C, 0x1FC3, 0x1F15, 0x1DB6,
+	0x1C2A, 0x2227, 0x2467, 0x2458, 0x23D1, 0x234D, 0x22C1, 0x2232,
+	0x2222, 0x2189, 0x2066, 0x1FBD, 0x1F0F, 0x1DB0, 0x1CEB, 0x1A60,
+	0x24DB, 0x245B, 0x244C, 0x23CA, 0x2341, 0x22B5, 0x2226, 0x2194,
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+	0x1F6E, 0x2301, 0x227B, 0x21E7, 0x2156, 0x213F, 0x20A4, 0x2005,
+	0x2306, 0x22F6, 0x226F, 0x21DC, 0x2145, 0x20A9, 0x2005, 0x1F62,
+	0x1EB5, 0x226F, 0x21E0, 0x21D0, 0x2139, 0x2098, 0x1FFF, 0x2304,
+	0x22F4, 0x2263, 0x21CF, 0x2143, 0x212D, 0x1FFF, 0x1F5C, 0x1EA8,
+	0x1DEF, 0x225D, 0x21C9, 0x212C, 0x2097, 0x1FF2, 0x22FE, 0x22E8,
+	0x2262, 0x21CE, 0x2137, 0x209D, 0x1FFE, 0x1FEC, 0x1F3D, 0x1DE9,
+	0x1D30, 0x21C8, 0x212B, 0x2091, 0x1FEC, 0x2375, 0x22E7, 0x225C,
+	0x21CD, 0x21BC, 0x2125, 0x2085, 0x1FE0, 0x1F37, 0x1E8F, 0x1D23,
+	0x1C56, 0x212A, 0x2119, 0x207F, 0x236D, 0x22E5, 0x2255, 0x21C7,
+	0x21B0, 0x2119, 0x2084, 0x1FE6, 0x1F37, 0x1E89, 0x1DD0, 0x1C51,
+	0x1AAC, 0x208F, 0x207E, 0x236C, 0x22E4, 0x2253, 0x2243, 0x21AF,
+	0x2118, 0x207E, 0x1FE5, 0x1FCD, 0x1F24, 0x1DD0, 0x1D0A, 0x1B7D,
+	0x19A7, 0x2071, 0x236A, 0x22E2, 0x22D2, 0x2241, 0x21AE, 0x2117,
+	0x207D, 0x206B, 0x1FC7, 0x1F1E, 0x1E6A, 0x1D04, 0x1C37, 0x1A8B,
+	0x1760, 0x236D, 0x235D, 0x22D5, 0x2245, 0x2235, 0x21A7, 0x2110,
+	0x2070, 0x205F, 0x1F1D, 0x1E70, 0x1DB7, 0x1CF1, 0x1B63, 0x198C,
+	0x0FF8, 0x235C, 0x22D4, 0x2244, 0x2233, 0x21A6, 0x210F, 0x20F8,
+	0x205E, 0x1FBF, 0x1F17, 0x1E5D, 0x1DA4, 0x1C2B, 0x1B4F, 0x1870,
+	0x2058, 0x22D7, 0x22C7, 0x2237, 0x2227, 0x2199, 0x20F7, 0x205D,
+	0x1FBF, 0x1FAD, 0x1F04, 0x1E50, 0x1CE4, 0x1C17, 0x197A, 0x205C,
+	0x204B, 0x22CB, 0x22BB, 0x2230, 0x2198, 0x2101, 0x20F0, 0x2056,
+	0x1FB2, 0x1F04, 0x1E56, 0x1D9D, 0x1CD1, 0x1B43, 0x20F0, 0x204A,
+	0x1FAC, 0x22BE, 0x2234, 0x2224, 0x218B, 0x20F5, 0x20E4, 0x2049,
+	0x2345, 0x22B3, 0x2228, 0x2218, 0x218A, 0x20EF, 0x2055, 0x203D,
+	0x1F9F, 0x1EF1, 0x1E43, 0x1D84, 0x217F, 0x23DC, 0x2357, 0x2348,
+	0x22C0, 0x22B1, 0x2221, 0x218E, 0x217E, 0x20E2, 0x2048, 0x2037,
+	0x1F98, 0x1EE4, 0x1E36, 0x1D77, 0x1CB7, 0x20E1, 0x2355, 0x2346,
+	0x22B4, 0x22A4, 0x221A, 0x2209, 0x2171, 0x20E0, 0x20CF, 0x202A,
+	0x1F8B, 0x1EDD, 0x1E30, 0x1D70, 0x1BF1, 0x20D4, 0x203A, 0x2339,
+	0x22B2, 0x22A2, 0x220D, 0x2180, 0x216F, 0x20D4, 0x2034, 0x1F97,
+	0x1F85, 0x1ED7, 0x1E29, 0x1D6A, 0x1BEB, 0x20D3, 0x2034, 0x2022,
+	0x1F7E, 0x229A, 0x220B, 0x2173, 0x2163, 0x20D2, 0x20C1, 0x2022,
+	0x1F78, 0x1ED6, 0x1E1C, 0x1D5D, 0x1BE5, 0x20C6, 0x2032, 0x201B,
+	0x1F77, 0x1EC9, 0x2209, 0x21F9, 0x2161, 0x20C5, 0x2032, 0x201A,
+	0x1F77, 0x1EC9, 0x1E16, 0x1D63, 0x1C97, 0x20C5, 0x2026, 0x201A,
+	0x1F76, 0x1EC8, 0x1E15, 0x21F1, 0x215F, 0x20C4, 0x20B3, 0x2014,
+	0x1F76, 0x1F64, 0x1EB6, 0x1E02, 0x1C91, 0x20C3, 0x20B2, 0x2013,
+	0x1F75, 0x1F63, 0x1EB5, 0x1E02, 0x2158, 0x20C2, 0x20B1, 0x2012,
+	0x1F74, 0x1F63, 0x1EB5, 0x1E02, 0x1D42, 0x2146, 0x20B1, 0x2017,
+	0x2006, 0x1F62, 0x1EB4, 0x1E01, 0x1D42, 0x2150, 0x20B5, 0x20A4,
+	0x2005, 0x1F62, 0x1EB4, 0x1E01, 0x1DEE, 0x214A, 0x20B4, 0x20A3,
+	0x2004, 0x1F61, 0x1EB3, 0x1EA1, 0x1DEE, 0x1D2E, 0x20B3, 0x20A3,
+	0x2003, 0x1F60, 0x1F49, 0x1EA1, 0x1DEE, 0x2148, 0x20B3, 0x20A2,
+	0x2003, 0x1F60, 0x1F48, 0x1EA0, 0x1DED, 0x1D2E, 0x1C68, 0x20A6,
+	0x2095, 0x1FF6, 0x1F47, 0x1EA0, 0x1DED, 0x214B, 0x213B, 0x20A5,
+	0x2095, 0x1FF6, 0x1F53, 0x1F41, 0x1DED, 0x1DDA, 0x1D1A, 0x1C54,
+	0x2094, 0x1FF5, 0x1F52, 0x1F40, 0x1E92, 0x21D6, 0x213E, 0x212E,
+	0x2098, 0x1FFA, 0x1FE8, 0x1F40, 0x1E92, 0x1DDF, 0x1DCC, 0x1C5B,
+	0x1B88, 0x1FF9, 0x1FE8, 0x1F45, 0x1F33, 0x21DE, 0x21CD, 0x2137,
+	0x209C, 0x208B, 0x1FEC, 0x1FDB, 0x1F32, 0x1E8B, 0x1DD8, 0x1DC5,
+	0x1C4E, 0x1B73, 0x207F, 0x1FDA, 0x1F37, 0x21E1, 0x21D1, 0x213F,
+	0x212F, 0x208F, 0x207E, 0x1FE5, 0x1F37, 0x1F25, 0x1E7D, 0x1DCB,
+	0x1D0C, 0x1C47, 0x1B6C, 0x1FEA, 0x1FD8, 0x2267, 0x21DE, 0x21CE,
+	0x2132, 0x2122, 0x208D, 0x207C, 0x1FD8, 0x1F35, 0x1F23, 0x1E70,
+	0x1DC4, 0x1CFF, 0x1C33, 0x1B66, 0x1FDC, 0x2274, 0x2264, 0x21D6,
+	0x1E69, 0x2130, 0x211F, 0x207F, 0x1FE7, 0x1FD6, 0x1F28, 0x1F16,
+	0x1E6E, 0x1DB6, 0x2123, 0x208A, 0x2073, 0x1FDB, 0x1FC9, 0x1F21,
+	0x1E6E, 0x1DC2, 0x1DAF, 0x2117, 0x207D, 0x206D, 0x1FCE, 0x1FBD,
+	0x1F14, 0x1E67, 0x1DB5, 0x2121, 0x2082, 0x2071, 0x1FD9, 0x1FC7,
+	0x1F1F, 0x1E6D, 0x1E5A, 0x1DA2, 0x1CE9, 0x2075, 0x2065, 0x1FCC,
+	0x1FBB, 0x1F13, 0x1E60, 0x1DAE, 0x2119, 0x2085, 0x2074, 0x2063,
+	0x1FC0, 0x1F18, 0x1F06, 0x1E59, 0x1DA1, 0x1CE3, 0x1C17, 0x2068,
+	0x1FCA, 0x1FB9, 0x1F11, 0x1E5E, 0x1E4C, 0x1D94, 0x210B, 0x2072,
+	0x2061, 0x1FBE, 0x1F16, 0x1F04, 0x1E58, 0x1DA0, 0x1D8D, 0x1CCE,
+	0x1C02, 0x1B2F, 0x1FB1, 0x1F09, 0x1EF8, 0x1E4B, 0x1D92, 0x210E,
+	0x2075, 0x2064, 0x1FC1, 0x1FB0, 0x1F08, 0x1EF6, 0x1E4A, 0x1D8C,
+	0x1CCD, 0x1C02, 0x1B2F, 0x1A4B, 0x1FA3, 0x1F01, 0x1E4F, 0x1E3D,
+	0x2111, 0x2101, 0x205C, 0x2057, 0x1FAE, 0x1F06, 0x1EF5, 0x1E48,
+	0x1D90, 0x1D7E, 0x1CBF, 0x1BFB, 0x1B1A, 0x1A36, 0x1F05, 0x1EF4,
+	0x1E3B, 0x2114, 0x2103, 0x206A, 0x205A, 0x1FB1, 0x1FA0, 0x1EF9,
+	0x1EE7, 0x1E3A, 0x1D89, 0x1D70, 0x1BFA, 0x1BDF, 0x1B0B, 0x1948,
+	0x183E, 0x1EE6, 0x1E2D, 0x2106, 0x20F6, 0x205D, 0x204C, 0x1FA9,
+	0x1F98, 0x1EEB, 0x1E3F, 0x1E2C, 0x1D7B, 0x1CB7, 0x1BEC, 0x1BD8,
+	0x1A2F, 0x193A, 0x1827, 0x1E38, 0x210E, 0x20FE, 0x20ED, 0x204F,
+	0x1FAC, 0x1F9B, 0x1EFA, 0x1EE9, 0x1E37, 0x1E25, 0x1D6D, 0x1CA9,
+	0x1BE5, 0x1BCA, 0x1A28, 0x192C, 0x1820, 0x219A, 0x2105, 0x20F5,
+	0x2057, 0x2047, 0x1FAA, 0x1F99, 0x1EEC, 0x1EDB, 0x1E2F, 0x1E1D,
+	0x1D5F, 0x1C9B, 0x1BD6, 0x1BC2, 0x1A1A, 0x1A04, 0x180A, 0x2192,
+	0x2102, 0x20F2, 0x2055, 0x2044, 0x1FA1, 0x1F90, 0x1EEA, 0x1ED9,
+	0x1E21, 0x1E0F, 0x1D5D, 0x1C99, 0x1BCF, 0x1BB4, 0x1A13, 0x19FD,
+	0x1803, 0x1E20, 0x20FA, 0x20EA, 0x204C, 0x203B, 0x1F9F, 0x1F8E,
+	0x1F7D, 0x1ED0, 0x1E1F, 0x1E0D, 0x1D56, 0x1C98, 0x1C85, 0x1BB3,
+	0x1AD9, 0x19EE, 0x1ECF, 0x1E1E, 0x20FC, 0x20EC, 0x204F, 0x203E,
+	0x202D, 0x1F86, 0x1F7A, 0x1ECE, 0x1E1D, 0x1E0B, 0x1D4E, 0x1D47,
+	0x1C83, 0x1BB2, 0x1AD8, 0x1F73, 0x1ECD, 0x1EC1, 0x20F4, 0x20E3,
+	0x20DE, 0x2040, 0x2030, 0x1F88, 0x1F77, 0x1ED1, 0x1EC0, 0x1E0E,
+	0x1DFC, 0x1D3F, 0x1C82, 0x1BB1, 0x1B9D, 0x1F76, 0x1ED0, 0x1EBF,
+	0x1E0D, 0x1DFB, 0x1D3E, 0x1C81, 0x1C6E, 0x1F8B, 0x1F7A, 0x1ED4,
+	0x1EC3, 0x1E0D, 0x1DFA, 0x1D3D, 0x1C81, 0x202B, 0x1F8A, 0x1F79,
+	0x1ED3, 0x1EC2, 0x1E11, 0x1DFF, 0x1D49, 0x1D36, 0x1C73, 0x1B9C,
+	0x1AC2, 0x1F6C, 0x1EC6, 0x1EB5, 0x1DFE, 0x1D48, 0x1D2F, 0x1C72,
+	0x2022, 0x1F7C, 0x1F6B, 0x1EC5, 0x1EB3, 0x1E03, 0x1DF1, 0x1D3A,
+	0x1D28, 0x1C5E, 0x1B94, 0x1ABA, 0x19CA, 0x1EB8, 0x1E07, 0x1DF5,
+	0x1D39, 0x1D27, 0x2025, 0x1F84, 0x1F73, 0x1F62, 0x1EBC, 0x1EAB,
+	0x1DF4, 0x1D3E, 0x1D2C, 0x1C69, 0x1C56, 0x1B85, 0x1AAC, 0x19C2,
+	0x18CD, 0x1DF9, 0x1DE7, 0x1D31, 0x1D1E, 0x201C, 0x1F81, 0x1F70,
+	0x1F5F, 0x1EAE, 0x1E04, 0x1DF2, 0x1D30, 0x1D1D, 0x1C61, 0x1C4E,
+	0x1B76, 0x1AA4, 0x19B3, 0x18BE, 0x1DF6, 0x1DE4, 0x1D22, 0x1D10,
+	0x2018, 0x1F78, 0x1F67, 0x1EB7, 0x1EA5, 0x1DFB, 0x1DE9, 0x1DD7,
+	0x1D1B, 0x1C52, 0x1C45, 0x1B75, 0x1A95, 0x19AC, 0x18B6, 0x179C,
+	0x1DDC, 0x1D20, 0x2025, 0x2015, 0x1F6F, 0x1F5E, 0x1EB9, 0x1EA8,
+	0x1E96, 0x1DE7, 0x1DD5, 0x1D12, 0x1C50, 0x1C3D, 0x1B73, 0x1B5F,
+	0x1A7F, 0x1995, 0x1795, 0x165F, 0x1D1E, 0x2027, 0x2016, 0x1F71,
+	0x1F60, 0x1EB6, 0x1EA5, 0x1E93, 0x1DDE, 0x1DCC, 0x1D10, 0x1D03,
+	0x1C41, 0x1B72, 0x1B5E, 0x1A7E, 0x1995, 0x1898, 0x177D, 0x1DCA,
+	0x2023, 0x2018, 0x1F73, 0x1F62, 0x1F52, 0x1EA8, 0x1E96, 0x1DE1,
+	0x1DCF, 0x1D14, 0x1D01, 0x1C3F, 0x1C2C, 0x1B5C, 0x1A7D, 0x1994,
+	0x197E, 0x1881, 0x1640, 0x2025, 0x2014, 0x1F70, 0x1F5F, 0x1F4E,
+	0x1EA4, 0x1E93, 0x1DE4, 0x1DD2, 0x1DC0, 0x1D05, 0x1C43, 0x1C30,
+	0x1B61, 0x1B4D, 0x1A67, 0x197E, 0x1881, 0x176E, 0x1D16, 0x201B,
+	0x200B, 0x1F66, 0x1F5B, 0x1F4A, 0x1EA1, 0x1E8F, 0x1DD5, 0x1DC3,
+	0x1D08, 0x1CF6, 0x1C34, 0x1C21, 0x1B52, 0x1B3E, 0x1A58, 0x196E,
+	0x186A, 0x1DC2, 0x2022, 0x2012, 0x1F6E, 0x1F63, 0x1F52, 0x1E9D,
+	0x1E8C, 0x1DDE, 0x1DCC, 0x1DBA, 0x1CFF, 0x1CF3, 0x1C25, 0x1C12,
+	0x1B42, 0x1A64, 0x197C, 0x1966, 0x1DCA, 0x1DB8, 0x2019, 0x2008,
+	0x1F6A, 0x1F59, 0x1F48, 0x1E9A, 0x1E8E, 0x1E7D, 0x1DC9, 0x1DB7,
+	0x1CFC, 0x1CEA, 0x1C23, 0x1C10, 0x1B3A, 0x1A63, 0x1E8C, 0x1E7B,
+	0x1DC1, 0x1DAF, 0x2014, 0x200A, 0x1F61, 0x1F50, 0x1F44, 0x1E96,
+	0x1E85, 0x1DD1, 0x1DBF, 0x1DAE, 0x1CF3, 0x1CE1, 0x1C1A, 0x1C07,
+	0x1B31, 0x1A53, 0x1A3F, 0x1DD5, 0x1DC3, 0x1DB2, 0x1CF2, 0x1CDF,
+	0x1C19, 0x1C05, 0x1B30, 0x1E98, 0x1E87, 0x1E75, 0x1DC2, 0x1DB0,
+	0x1CF0, 0x1CDE, 0x1C17, 0x1C04, 0x1B2F, 0x1A52, 0x1A43, 0x1DCC,
+	0x1DBA, 0x1DA8, 0x1CEF, 0x1CE2, 0x1C1C, 0x1C09, 0x1B34, 0x1B20,
+	0x1A43, 0x1E77, 0x1DBE, 0x1DAC, 0x1CF3, 0x1CE1, 0x1C1B, 0x1C08,
+	0x1B33, 0x1B1F, 0x1A42, 0x1A2D, 0x1DBD, 0x1DAB, 0x1D9F, 0x1CD9,
+	0x1CD3, 0x1C00, 0x1B32, 0x1B1E, 0x1A41, 0x1A2C, 0x1DC1, 0x1DAF,
+	0x1CF0, 0x1CE4, 0x1CD1, 0x1C0B, 0x1BF8, 0x1B24, 0x1B10, 0x1A32,
+	0x1DC5, 0x1DB3, 0x1DA1, 0x1CE8, 0x1CD6, 0x1C10, 0x1BFD, 0x1B23,
+	0x1B0F, 0x1A31, 0x1A1C, 0x1DB7, 0x1DA5, 0x1CEC, 0x1CDA, 0x1CC8,
+	0x1BFC, 0x1B28, 0x1B14, 0x1A37, 0x1E6D, 0x1DBB, 0x1DA9, 0x1D97,
+	0x1CD9, 0x1CCC, 0x1C00, 0x1BED, 0x1B19, 0x1B05, 0x1A21, 0x193A,
+	0x191D, 0x1D9B, 0x1CDD, 0x1CCB, 0x1C05, 0x1BF2, 0x1B25, 0x1B11,
+	0x1A27, 0x1DC3, 0x1DB1, 0x1D9F, 0x1CE1, 0x1CD5, 0x1CC2, 0x1BF7,
+	0x1BE4, 0x1B10, 0x1AFC, 0x1A1F, 0x192A, 0x1914, 0x1D98, 0x1CD9,
+	0x1CC7, 0x1BFC, 0x1BE9, 0x1B15, 0x1B02, 0x1E76, 0x1DB9, 0x1DB3,
+	0x1DA1, 0x1CDD, 0x1CCB, 0x1CBF, 0x1BF4, 0x1BE1, 0x1E90, 0x1E7F,
+	0x1E6E, 0x1DB7, 0x1DA5, 0x1D93, 0x1CD6, 0x1F60, 0x1F50, 0x1F3F,
+	0x1E94, 0x1E83, 0x1E72, 0x1DBB, 0x1DA9, 0x1D9D, 0x1CE0, 0x1CCD,
+	0x1CBB, 0x1BF0, 0x1BDD, 0x1B0A, 0x1AF7, 0x1A13, 0x1DB2, 0x1DA1,
+	0x1D95, 0x1CD2, 0x1CBF, 0x1F51, 0x1F45, 0x1E94, 0x1E83, 0x1E78,
+	0x1E67, 0x1DB0, 0x1D9F, 0x1D8D, 0x1CD0, 0x1CBD, 0x1BF3, 0x1BE0,
+	0x1B0E, 0x1AFA, 0x1AE6, 0x1A03, 0x1916, 0x1D9D, 0x1CDA, 0x1CC7,
+	0x1CB5, 0x1BF1, 0x1F3B, 0x1E8A, 0x1E79, 0x1E6E, 0x1DB8, 0x1DA6,
+	0x1D94, 0x1CCC, 0x1CC6, 0x1CB3, 0x1BE3, 0x1BD0, 0x1AFE, 0x1AEA,
+	0x1A07, 0x19F3, 0x1905, 0x18F0, 0x1CCA, 0x1CB8, 0x1CB1, 0x1BE1,
+	0x1E91, 0x1E80, 0x1E6F, 0x1DB9, 0x1DAD, 0x1D9C, 0x1CD4, 0x1CC8,
+	0x1CBB, 0x1BEC, 0x1BD9, 0x1BC6, 0x1AF4, 0x1AE0, 0x19F7, 0x19E3,
+	0x18F5, 0x18DF, 0x17D6, 0x1CB9, 0x1BEA, 0x1BD7, 0x1E8B, 0x1E7A,
+	0x1E6F, 0x1DAE, 0x1DA3, 0x1D91, 0x1CD5, 0x1CC3, 0x1CB1, 0x1BE2,
+	0x1BCF, 0x1B04, 0x1AF0, 0x1ADD, 0x19F4, 0x19E0, 0x18F3, 0x18DD,
+	0x17CD, 0x16AC, 0x1565, 0x1BD3, 0x1E86, 0x1E7B, 0x1E6A, 0x1DB0,
+	0x1D9E, 0x1D8D, 0x1CD1, 0x1CBF, 0x1CB3, 0x1BE4, 0x1BD1, 0x1BBE,
+	0x1AE6, 0x1AD3, 0x19F8, 0x19E4, 0x18E9, 0x18D4, 0x17CB, 0x16AB,
+	0x1693, 0x13FA, 0x1BC2, 0x1E7B, 0x1E6A, 0x1DB0, 0x1DA5, 0x1D93,
+	0x1CD3, 0x1CC0, 0x1CAE, 0x1BE0, 0x1BD3, 0x1BC1, 0x1AE9, 0x1AD6,
+	0x19EE, 0x19DA, 0x18E7, 0x18D1, 0x17C9, 0x17B3, 0x1692, 0x1554,
+	0x13DF, 0x1E81, 0x1E70, 0x1DB7, 0x1DA5, 0x1D9A, 0x1CD4, 0x1CC8,
+	0x1CB6, 0x1CA4, 0x1BDC, 0x1BC9, 0x1AF2, 0x1ADF, 0x1ACB, 0x19DD,
+	0x19C9, 0x18D6, 0x18C0, 0x17B8, 0x1698, 0x1680, 0x153A, 0x1223,
+	0x1ADD, 0x1DBD, 0x1DAC, 0x1D9A, 0x1D89, 0x1CC9, 0x1CBD, 0x1CAB,
+	0x1BDD, 0x1BD1, 0x1BBE, 0x1AE2, 0x1AD4, 0x1AC1, 0x19DA, 0x19C6,
+	0x18D3, 0x18BE, 0x17AF, 0x168F, 0x1677, 0x1528, 0x1AEC, 0x1AD9,
+	0x1DB8, 0x1DA6, 0x1D95, 0x1CD6, 0x1CCA, 0x1CB8, 0x1CA6, 0x1BD9,
+	0x1BC6, 0x1BB4, 0x1ADD, 0x1ACA, 0x1AB6, 0x19D0, 0x19BB, 0x18C9,
+	0x18B3, 0x17A5, 0x167E, 0x1666, 0x151F, 0x1AE2, 0x1ACE, 0x1DB2,
+	0x1DA6, 0x1D9B, 0x1CD7, 0x1CC5, 0x1CB3, 0x1CA1, 0x1BD4, 0x1BC2,
+	0x1BAF, 0x1AE0, 0x1ACC, 0x1AB9, 0x19D3, 0x19BE, 0x18C6, 0x18B1,
+	0x17A3, 0x1EAD, 0x1E9C, 0x1E8B, 0x1E80, 0x1DC3, 0x1DB2, 0x1DA7,
+	0x1D9B, 0x1CD7, 0x1CCB, 0x1CB9, 0x1CA8, 0x1BDC, 0x1BC9, 0x1BB6,
+	0x1ADB, 0x1ACF, 0x1ABB, 0x19CF, 0x19C2, 0x18CA, 0x18B5, 0x17A8,
+	0x1791, 0x1663, 0x1E96, 0x1E85, 0x1DCF, 0x1DBD, 0x1DAC, 0x1DA1,
+	0x1CDE, 0x1CCC, 0x1CBA, 0x1CAE, 0x1BDD, 0x1BD0, 0x1BBE, 0x1AE3,
+	0x1AD0, 0x1AC3, 0x19D2, 0x19CB, 0x19B7, 0x18B8, 0x18A3, 0x1796,
+	0x177F, 0x1651, 0x1BB5, 0x1AE1, 0x1DC8, 0x1DB7, 0x1DA6, 0x1D9B,
+	0x1CD8, 0x1CC6, 0x1CB4, 0x1CA8, 0x1BD1, 0x1BC5, 0x1BB9, 0x1AD8,
+	0x1AC5, 0x1AB8, 0x19D4, 0x19C0, 0x19AC, 0x18AE, 0x1898, 0x1784,
+	0x177D, 0x164F, 0x1503, 0x1AD6, 0x1AC3, 0x1DB1, 0x1DAB, 0x1CE4,
+	0x1CD2, 0x1CC0, 0x1CB5, 0x1BDF, 0x1BD8, 0x1BC6, 0x1BB3, 0x1ADA,
+	0x1AC7, 0x1AB4, 0x19C9, 0x19B5, 0x19A1, 0x18B1, 0x189C, 0x1789,
+	0x1772, 0x164D, 0x1635, 0x14E8, 0x1ACB, 0x1AB7, 0x19CE, 0x1CE4,
+	0x1CD2, 0x1CC6, 0x1CB5, 0x1BE5, 0x1BD3, 0x1BC0, 0x1BB4, 0x1AD5,
+	0x1AC2, 0x1ABB, 0x1AA8, 0x19BE, 0x19AA, 0x18AD, 0x189F, 0x188A,
+	0x176F, 0x1643, 0x162B, 0x14E7, 0x1AC6, 0x1AB3, 0x1AAC, 0x19BC,
+	0x19A8, 0x1CCC, 0x1CC0, 0x1CAE, 0x1BDF, 0x1BCD, 0x1BBA, 0x1ADD,
+	0x1AD0, 0x1ABC, 0x1AB0, 0x19B9, 0x19AC, 0x18B0, 0x189B, 0x1886,
+	0x177B, 0x1764, 0x1639, 0x1621, 0x14D4, 0x1AC0, 0x1AB4, 0x19BE,
+	0x19B7, 0x19A3, 0x1CC5, 0x1CBA, 0x1BE0, 0x1BD4, 0x1BC7, 0x1BBB,
+	0x1AD7, 0x1AC4, 0x1AB1, 0x19CF, 0x19BB, 0x19A7, 0x1993, 0x1897,
+	0x1882, 0x1777, 0x1761, 0x162E, 0x1616, 0x1ACE, 0x1AC1, 0x1AAE,
+	0x19C0, 0x19AC, 0x1997, 0x18A3, 0x1CB9, 0x1BE6, 0x1BD3, 0x1BC1,
+	0x1BB5, 0x1AD2, 0x1ABF, 0x1AB8, 0x1AA5, 0x19B6, 0x19A2, 0x1995,
+	0x1893, 0x187E, 0x176D, 0x1756, 0x162B, 0x1613, 0x1ACF, 0x1ABC,
+	0x1AA9, 0x19C8, 0x19B4, 0x19A0, 0x189E, 0x1BF7, 0x1BE5, 0x1BD3,
+	0x1BC7, 0x1AE5, 0x1AD9, 0x1AC6, 0x1AB2, 0x1AAC, 0x19B8, 0x19AA,
+	0x1996, 0x1895, 0x1880, 0x1872, 0x175A, 0x1744, 0x1618, 0x1AD5,
+	0x1AC9, 0x1AB6, 0x19C3, 0x19B5, 0x19A8, 0x1994, 0x188C, 0x1BF1,
+	0x1BDF, 0x1BCD, 0x1BC1, 0x1ADF, 0x1AD2, 0x1ABF, 0x1AAC, 0x19C6,
+	0x19B2, 0x199E, 0x189F, 0x188A, 0x187B, 0x1765, 0x174E, 0x1BBD,
+	0x1ADC, 0x1ACF, 0x1AC3, 0x1AB0, 0x19BD, 0x19A9, 0x199C, 0x189C,
+	0x1BF6, 0x1BF0, 0x1BDE, 0x1BD2, 0x1BC0, 0x1ADF, 0x1ACC, 0x1AB9,
+	0x19D4, 0x19C0, 0x19AD, 0x1999, 0x1899, 0x1884, 0x186F, 0x1759,
+	0x1752, 0x173B, 0x160A, 0x15F2, 0x1ABC, 0x19CB, 0x1CFA, 0x1CEE,
+	0x1CE2, 0x1C0D, 0x1C01, 0x1BEF, 0x1BDD, 0x1BD1, 0x1AF2, 0x1ADF,
+	0x1ACC, 0x1AB9, 0x1AB3, 0x19C1, 0x19B4, 0x19A0, 0x18A2, 0x188D,
+	0x1878, 0x1863, 0x174D, 0x173E, 0x160E, 0x15F7, 0x149E, 0x1AB6,
+	0x19C5, 0x19B1, 0x1CE6, 0x1C17, 0x1C06, 0x1BF4, 0x1BE8, 0x1BD6,
+	0x1AF7, 0x1AE4, 0x1AD8, 0x1AC5, 0x1AB2, 0x19C8, 0x19B5, 0x19A8,
+	0x1994, 0x1896, 0x1881, 0x186C, 0x1750, 0x1749, 0x1732, 0x15FB,
+	0x15E3, 0x1493, 0x19CC, 0x19BE, 0x19B1, 0x199E, 0x189A, 0x1C04,
+	0x1BF2, 0x1BE6, 0x1BD4, 0x1AF0, 0x1AEA, 0x1AD7, 0x1AC5, 0x19D6,
+	0x19C2, 0x19AE, 0x19A1, 0x18A5, 0x1890, 0x187B, 0x1866, 0x1753,
+	0x173D, 0x1726, 0x15EF, 0x15D8, 0x1490, 0x1476, 0x19B8, 0x19AB,
+	0x1997, 0x1894, 0x1886, 0x1BFC, 0x1BEA, 0x1B08, 0x1AFC, 0x1AE9,
+	0x1AD6, 0x1AC4, 0x19D5, 0x19C2, 0x19B5, 0x19A1, 0x189F, 0x188A,
+	0x187D, 0x186E, 0x174E, 0x1738, 0x1730, 0x15F3, 0x15DC, 0x1485,
+	0x146B, 0x19C5, 0x19B1, 0x19A4, 0x18A3, 0x188E, 0x1879, 0x186C,
+	0x1B13, 0x1B01, 0x1AEE, 0x1AE2, 0x1ACF, 0x19E2, 0x19CF, 0x19BB,
+	0x19AE, 0x199B, 0x1899, 0x1884, 0x1876, 0x1862, 0x1748, 0x1739,
+	0x1723, 0x15E7, 0x15CF, 0x1481, 0x1468, 0x19BE, 0x19AB, 0x199E,
+	0x1896, 0x1888, 0x1873, 0x1865, 0x1B12, 0x1AFF, 0x1AED, 0x1AE0,
+	0x1ACE, 0x19E1, 0x19CE, 0x19C1, 0x19AE, 0x18A7, 0x1892, 0x1885,
+	0x1870, 0x1862, 0x174A, 0x1734, 0x171E, 0x15EA, 0x15D3, 0x1475,
+	0x19D1, 0x19BD, 0x19AA, 0x18AA, 0x1896, 0x1881, 0x1874, 0x1866,
+	0x1740, 0x1B03, 0x1AF1, 0x1AE5, 0x19F4, 0x19E0, 0x19CD, 0x19C6,
+	0x19B3, 0x19A6, 0x18A0, 0x188B, 0x187E, 0x1869, 0x174B, 0x173D,
+	0x1727, 0x15E5, 0x15D6, 0x15BE, 0x19D6, 0x19C9, 0x19B6, 0x18B1,
+	0x18A3, 0x188F, 0x187B, 0x186D, 0x174F, 0x1B13, 0x1B01, 0x1AEF,
+	0x19FF, 0x19F2, 0x19DF, 0x19CC, 0x19BF, 0x19AC, 0x18AD, 0x1899,
+	0x1885, 0x1877, 0x1754, 0x173E, 0x1730, 0x1721, 0x15E8, 0x19FB,
+	0x19E8, 0x19D5, 0x19C8, 0x19B5, 0x18B7, 0x18A3, 0x188F, 0x1881,
+	0x186D, 0x1B23, 0x1B17, 0x1B05, 0x1AF2, 0x19FD, 0x19F1, 0x19E4,
+	0x19D7, 0x19C4, 0x19B0, 0x18AD, 0x1899, 0x188B, 0x1877, 0x175C,
+	0x1746, 0x1730, 0x171B, 0x15E2, 0x15D3, 0x15BC, 0x1461, 0x1448,
+	0x142E, 0x18B7, 0x1C43, 0x1B56, 0x1B50, 0x1B3E, 0x1B32, 0x1B20,
+	0x1B0E, 0x1B02, 0x1A0E, 0x19FB, 0x19EF, 0x19DC, 0x19C8, 0x18C7,
+	0x18B3, 0x18A5, 0x1891, 0x187D, 0x1763, 0x1755, 0x173F, 0x172A,
+	0x171B, 0x15E4, 0x15CD, 0x15B6, 0x1454, 0x143B, 0x12A3, 0x1287,
+	0x10AE, 0x1B5F, 0x1B53, 0x1B41, 0x1B2F, 0x1B23, 0x1B11, 0x1A19,
+	0x1A12, 0x19FF, 0x19F3, 0x19E0, 0x19CC, 0x18C6, 0x18B1, 0x18A4,
+	0x1890, 0x1889, 0x1875, 0x1755, 0x173F, 0x1731, 0x171B, 0x15DE,
+	0x15C7, 0x15B0, 0x144F, 0x143F, 0x1425, 0x128D, 0x1271, 0x108D,
+	0x0E03, 0x1B49, 0x1B37, 0x1B2B, 0x1A35, 0x1A29, 0x1A16, 0x1A0F,
+	0x19FC, 0x19E9, 0x19DD, 0x18D8, 0x18C4, 0x18B0, 0x18A3, 0x188E,
+	0x187A, 0x1763, 0x174D, 0x1738, 0x172A, 0x15E8, 0x15D0, 0x15B9,
+	0x15B1, 0x144A, 0x1431, 0x1418, 0x1277, 0x10A1, 0x1081, 0x0DF8,
+	0x175F, 0x1B3F, 0x1A4B, 0x1A38, 0x1A2C, 0x1A19, 0x1A13, 0x1A00,
+	0x19ED, 0x18E3, 0x18D6, 0x18C2, 0x18AE, 0x18A1, 0x1893, 0x1770,
+	0x1762, 0x174D, 0x1737, 0x1729, 0x15E8, 0x15D1, 0x15C2, 0x15AB,
+	0x1445, 0x142C, 0x141B, 0x127D, 0x1260, 0x1080, 0x1054, 0x176C,
+	0x1757, 0x1A54, 0x1A41, 0x1A3A, 0x1A28, 0x1A1C, 0x1A09, 0x19FC,
+	0x18F4, 0x18E0, 0x18CD, 0x18C0, 0x18AC, 0x189F, 0x177D, 0x1768,
+	0x175A, 0x1745, 0x172F, 0x15F8, 0x15E1, 0x15CA, 0x15BB, 0x1450,
+	0x1437, 0x141E, 0x128B, 0x1278, 0x125C, 0x1069, 0x1779, 0x176B,
+	0x1756, 0x1A5C, 0x1A49, 0x1A3D, 0x1A2A, 0x1A1E, 0x1A11, 0x1905,
+	0x18F8, 0x18E4, 0x18D0, 0x18C3, 0x18B0, 0x1791, 0x1782, 0x1775,
+	0x175F, 0x174A, 0x173C, 0x15F8, 0x15E1, 0x15D2, 0x15BB, 0x15A4,
+	0x1441, 0x1428, 0x140F, 0x1274, 0x1258, 0x18AA, 0x1785, 0x1770,
+	0x175B, 0x1A69, 0x1A57, 0x1A4B, 0x1A38, 0x1A2C, 0x1922, 0x190E,
+	0x1901, 0x18EE, 0x18E7, 0x18D4, 0x18C7, 0x18B3, 0x1788, 0x1780,
+	0x176B, 0x175E, 0x1748, 0x173B, 0x15F0, 0x15D9, 0x15CA, 0x15B4,
+	0x15AC, 0x143A, 0x1422, 0x1411, 0x18CE, 0x18C1, 0x1797, 0x178A,
+	0x1775, 0x1A7D, 0x1A71, 0x1A64, 0x1A58, 0x1A46, 0x1937, 0x192B,
+	0x1917, 0x190A, 0x18F7, 0x18F0, 0x18DD, 0x18D0, 0x17A7, 0x179A,
+	0x1785, 0x1777, 0x1762, 0x174D, 0x160D, 0x15FE, 0x15E8, 0x15D1,
+	0x15C2, 0x1454, 0x190B, 0x18FF, 0x18EB, 0x18DE, 0x17B7, 0x17A9,
+	0x1795, 0x1787, 0x1772, 0x175D, 0x1756, 0x1610, 0x15FA, 0x194D,
+	0x1939, 0x1933, 0x1920, 0x1913, 0x18FF, 0x18F3, 0x18DF, 0x17C0,
+	0x17AB, 0x179D, 0x1789, 0x177B, 0x1766, 0x1751, 0x160C, 0x15FD,
+	0x15E7, 0x15DF, 0x15C8, 0x145D, 0x1445, 0x142C, 0x18FA, 0x18ED,
+	0x17C1, 0x17B4, 0x179F, 0x1792, 0x177D, 0x176F, 0x175A, 0x1616,
+	0x1600, 0x15F1, 0x15DA, 0x1941, 0x192E, 0x1921, 0x190E, 0x1901,
+	0x17DE, 0x17CA, 0x17B5, 0x17A8, 0x1793, 0x178C, 0x1777, 0x176A,
+	0x1620, 0x160A, 0x15FB, 0x15E5, 0x15DD, 0x15C7, 0x1455, 0x143D,
+	0x1424, 0x1414, 0x1267, 0x17C4, 0x17B7, 0x17A2, 0x1795, 0x1787,
+	0x1779, 0x1631, 0x161B, 0x160C, 0x15F6, 0x15E0, 0x194E, 0x193B,
+	0x192F, 0x191C, 0x17F5, 0x17E7, 0x17D3, 0x17BF, 0x17B8, 0x17AA,
+	0x1796, 0x1781, 0x1774, 0x162C, 0x1616, 0x1607, 0x15F1, 0x15E2,
+	0x15CC, 0x145D, 0x144D, 0x1434, 0x141C, 0x140C, 0x1258, 0x17C7,
+	0x17B2, 0x17AB, 0x1797, 0x1789, 0x163D, 0x1627, 0x1618, 0x1602,
+	0x15FB, 0x15E4, 0x1955, 0x1948, 0x1935, 0x180A, 0x17FD, 0x17E9,
+	0x17E2, 0x17D5, 0x17C1, 0x17AC, 0x179F, 0x178A, 0x1646, 0x1630,
+	0x1622, 0x160C, 0x15F6, 0x15EE, 0x15D8, 0x145C, 0x144C, 0x143C,
+	0x142C, 0x1413, 0x1263, 0x1247, 0x17CF, 0x17BB, 0x17AD, 0x1799,
+	0x1648, 0x1640, 0x162B, 0x161C, 0x1606, 0x197A, 0x1967, 0x1961,
+	0x1833, 0x1826, 0x1812, 0x1805, 0x17F7, 0x17EA, 0x17D6, 0x17C9,
+	0x17B5, 0x166D, 0x1658, 0x164A, 0x163B, 0x162C, 0x1616, 0x1601,
+	0x15F2, 0x147A, 0x146A, 0x1452, 0x1443, 0x142A, 0x1412, 0x1264,
+	0x1252, 0x17DD, 0x17C9, 0x17B5, 0x166E, 0x1660, 0x164B, 0x1635,
+	0x1627, 0x199D, 0x1991, 0x1867, 0x185B, 0x1847, 0x183A, 0x1826,
+	0x181F, 0x180C, 0x17FF, 0x17EB, 0x17DD, 0x17C9, 0x1685, 0x1677,
+	0x1661, 0x164C, 0x163E, 0x1628, 0x161A, 0x160B, 0x15FC, 0x1480,
+	0x1470, 0x1458, 0x1448, 0x1430, 0x1418, 0x1805, 0x17F8, 0x17E4,
+	0x169B, 0x1686, 0x1678, 0x1663, 0x165B, 0x19D2, 0x19C0, 0x189A,
+	0x188E, 0x187A, 0x1874, 0x1860, 0x1853, 0x1840, 0x1833, 0x181F,
+	0x1818, 0x1805, 0x17F8, 0x16AA, 0x1695, 0x1687, 0x1678, 0x166A,
+	0x1655, 0x18BA, 0x18AD, 0x189A, 0x188D, 0x1880, 0x1873, 0x1860,
+	0x1853, 0x183F, 0x1838, 0x182C, 0x1818, 0x180B, 0x16B8, 0x16AA,
+	0x1695, 0x1687, 0x1672, 0x166B, 0x165D, 0x1647, 0x1632, 0x1624,
+	0x14AD, 0x1496, 0x1487, 0x146F, 0x1460, 0x1448, 0x1430, 0x1283,
+	0x1268, 0x1257, 0x123C, 0x122A, 0x1013, 0x0FF4, 0x1681, 0x166B,
+	0x165D, 0x1648, 0x163A, 0x18B1, 0x189E, 0x1891, 0x187E, 0x1877,
+	0x186B, 0x1857, 0x184A, 0x1837, 0x16E9, 0x16DB, 0x16C7, 0x16C0,
+	0x16AB, 0x169D, 0x1688, 0x167A, 0x1665, 0x1657, 0x164F, 0x14C8,
+	0x14B9, 0x14A1, 0x1492, 0x147B, 0x1473, 0x145B, 0x144C, 0x128A,
+	0x1279, 0x125E, 0x124D, 0x1232, 0x1016, 0x1001, 0x0FE2, 0x168F,
+	0x167A, 0x166C, 0x1657, 0x14D9, 0x14C9, 0x14B2, 0x18A1, 0x189B,
+	0x188E, 0x187B, 0x172C, 0x171F, 0x170B, 0x16FD, 0x16F6, 0x16E1,
+	0x16D4, 0x16BF, 0x16B1, 0x169C, 0x168F, 0x1680, 0x1672, 0x14F0,
+	0x14E1, 0x14CA, 0x14C3, 0x14AC, 0x149C, 0x1485, 0x1476, 0x145E,
+	0x12A2, 0x1288, 0x1277, 0x125C, 0x124B, 0x1239, 0x1018, 0x0FF9,
+	0x0FEF, 0x169C, 0x168E, 0x150F, 0x1500, 0x14E9, 0x14DA, 0x14C4,
+	0x14B4, 0x1774, 0x1767, 0x1753, 0x1745, 0x1738, 0x1724, 0x171D,
+	0x1708, 0x16FB, 0x16E6, 0x16D9, 0x16D2, 0x16BD, 0x16B0, 0x169B,
+	0x151F, 0x1508, 0x14F9, 0x14EA, 0x14DB, 0x14C4, 0x14B5, 0x149E,
+	0x148F, 0x1478, 0x12B8, 0x12A7, 0x128D, 0x127C, 0x126B, 0x1259,
+	0x123F, 0x1019, 0x0FFB, 0x16C3, 0x1544, 0x152D, 0x1526, 0x1517,
+	0x1501, 0x14F2, 0x14DB, 0x17A6, 0x1792, 0x1785, 0x1777, 0x176A,
+	0x1756, 0x1749, 0x173C, 0x172E, 0x1721, 0x170C, 0x16FF, 0x16EA,
+	0x16DD, 0x16D6, 0x154B, 0x1543, 0x152D, 0x151E, 0x1510, 0x14F9,
+	0x14EA, 0x14D4, 0x14CC, 0x14B5, 0x14A6, 0x12DE, 0x12C5, 0x12B4,
+	0x12AB, 0x1292, 0x1281, 0x1267, 0x1711, 0x1704, 0x1585, 0x156F,
+	0x1560, 0x1551, 0x1543, 0x1534, 0x151E, 0x150F, 0x17DC, 0x17C8,
+	0x17BB, 0x17B4, 0x17A1, 0x1794, 0x1780, 0x1773, 0x176C, 0x1758,
+	0x174B, 0x1737, 0x172A, 0x1723, 0x1599, 0x158B, 0x1575, 0x156D,
+	0x155F, 0x1549, 0x153B, 0x1524, 0x1516, 0x150E, 0x14F8, 0x14E9,
+	0x14D3, 0x1313, 0x12FA, 0x12E9, 0x12D0, 0x12C0, 0x1769, 0x175C,
+	0x174F, 0x15D1, 0x15BB, 0x15AD, 0x1598, 0x1589, 0x1582, 0x156C,
+	0x155E, 0x1548, 0x1539, 0x1523, 0x151C, 0x150D, 0x14F7, 0x14E8,
+	0x131C, 0x130B, 0x12F2, 0x12EA, 0x12D9, 0x12C0, 0x1773, 0x15F9,
+	0x15E4, 0x15D6, 0x15C1, 0x15B3, 0x15AB, 0x1596, 0x1588, 0x1572,
+	0x1564, 0x154E, 0x1546, 0x1538, 0x1522, 0x1513, 0x14FD, 0x1335,
+	0x132C, 0x1314, 0x1303, 0x12EB, 0x12DA, 0x12C1, 0x12B0, 0x1605,
+	0x15F0, 0x15E2, 0x15D4, 0x15C6, 0x15B8, 0x15A2, 0x1594, 0x1586,
+	0x1577, 0x1569, 0x1553, 0x1545, 0x1536, 0x1520, 0x135D, 0x134D,
+	0x1335, 0x1324, 0x130C, 0x12FC, 0x12F3, 0x12DA, 0x12CA, 0x12B1,
+	0x160A, 0x15FB, 0x15ED, 0x15E0, 0x15CA, 0x15BC, 0x15B5, 0x15A0,
+	0x1591, 0x157C, 0x156E, 0x1566, 0x1551, 0x1384, 0x1375, 0x1364,
+	0x1354, 0x1344, 0x132C, 0x131C, 0x1303, 0x12F3, 0x12DA, 0x12D2,
+	0x12C1, 0x12A8, 0x1614, 0x15FF, 0x15F1, 0x15DC, 0x15CE, 0x15C7,
+	0x15B2, 0x15A4, 0x1596, 0x1580, 0x1579, 0x13AB, 0x139B, 0x1383,
+	0x1374, 0x1363, 0x1353, 0x1344, 0x132B, 0x131B, 0x1303, 0x12F3,
+	0x12EA, 0x12D1, 0x1633, 0x162C, 0x161F, 0x160A, 0x15FC, 0x15F5,
+	0x15E0, 0x15D2, 0x15BD, 0x15AF, 0x15A8, 0x13D8, 0x13C9, 0x13B1,
+	0x13A2, 0x139A, 0x1382, 0x1372, 0x135A, 0x134A, 0x1332, 0x132A,
+	0x131A, 0x1302, 0x12F1, 0x12D9, 0x10A8, 0x163D, 0x1636, 0x1621,
+	0x1614, 0x1606, 0x15F8, 0x15EA, 0x15DC, 0x140C, 0x1404, 0x13F5,
+	0x13DE, 0x13CE, 0x13B7, 0x13A7, 0x139F, 0x1388, 0x1378, 0x1360,
+	0x1351, 0x1339, 0x1329, 0x1320, 0x1691, 0x167C, 0x166F, 0x1668,
+	0x1654, 0x1646, 0x1631, 0x162A, 0x161D, 0x1455, 0x143E, 0x142F,
+	0x1420, 0x1411, 0x1402, 0x13EA, 0x13DB, 0x13D3, 0x13BC, 0x13AD,
+	0x1395, 0x1386, 0x1376, 0x1366, 0x1356, 0x133E, 0x132E, 0x131F,
+	0x10D8, 0x168B, 0x1685, 0x1670, 0x1663, 0x149C, 0x1494, 0x147E,
+	0x146F, 0x1459, 0x144A, 0x1442, 0x142C, 0x141D, 0x140E, 0x13F7,
+	0x13E7, 0x13E0, 0x13C8, 0x13B9, 0x13A2, 0x1392, 0x138A, 0x16FD,
+	0x16F0, 0x16DC, 0x16D5, 0x16C8, 0x16B4, 0x14EF, 0x14E1, 0x14DA,
+	0x14C4, 0x14B5, 0x14A7, 0x1490, 0x1489, 0x147A, 0x1464, 0x1455,
+	0x1446, 0x1437, 0x1428, 0x1419, 0x1402, 0x13F3, 0x13EB, 0x13D4,
+	0x13C5, 0x13AE, 0x139E, 0x1396, 0x1717, 0x1556, 0x1548, 0x1532,
+	0x1524, 0x151D, 0x1507, 0x14F9, 0x14EB, 0x14E3, 0x14CD, 0x14BF,
+	0x14A9, 0x149A, 0x1493, 0x147D, 0x146E, 0x145F, 0x1450, 0x1441,
+	0x1432, 0x141C, 0x140D, 0x1405, 0x13EE, 0x13DF, 0x13D0, 0x13B9,
+	0x13B1, 0x1177, 0x115D, 0x114B, 0x1131, 0x111F, 0x110D, 0x10F2,
+	0x10E9, 0x10CD, 0x10BB, 0x10A9, 0x108D, 0x107B, 0x105E, 0x104C,
+	0x1042, 0x1495, 0x1486, 0x1478, 0x1468, 0x145A, 0x144B, 0x1435,
+	0x142D, 0x141E, 0x1408, 0x13F9, 0x13EA, 0x11B2, 0x1198, 0x1186,
+	0x116C, 0x158F, 0x1582, 0x156D, 0x155F, 0x1557, 0x1542, 0x1534,
+	0x1526, 0x151F, 0x1509, 0x14FB, 0x14ED, 0x14DE, 0x14D0, 0x14C2,
+	0x14AC, 0x14A4, 0x1496, 0x1480, 0x1471, 0x146A, 0x1454, 0x1445,
+	0x1436, 0x11FB, 0x11E1, 0x11D1, 0x11C8, 0x11AE, 0x119D, 0x118C,
+	0x1172, 0x1161, 0x1158, 0x113D, 0x112C, 0x111A, 0x10FF, 0x10EE,
+	0x10DB, 0x10C9, 0x10B7, 0x109C, 0x108A, 0x0D69, 0x0D46, 0x0D3A,
+	0x0D16, 0x14C2, 0x14B3, 0x14A5, 0x1496, 0x125A, 0x124A, 0x1239,
+	0x1220, 0x1210, 0x1207, 0x11EE, 0x11DD, 0x11CD, 0x11B3, 0x11AA,
+	0x15E0, 0x15D2, 0x15C4, 0x15B7, 0x15A9, 0x15A2, 0x158D, 0x1580,
+	0x1572, 0x1564, 0x1556, 0x1548, 0x1541, 0x152C, 0x151E, 0x1516,
+	0x1501, 0x12CE, 0x12BE, 0x12A6, 0x1296, 0x128E, 0x1275, 0x1265,
+	0x1255, 0x123C, 0x1234, 0x1223, 0x120A, 0x11FA, 0x11E9, 0x11D8,
+	0x11C7, 0x11B7, 0x119D, 0x118C, 0x1183, 0x1169, 0x1158, 0x1147,
+	0x112D, 0x111B, 0x1112, 0x10F8, 0x10E6, 0x0DC7, 0x0DA5, 0x0D8F,
+	0x0D6C, 0x1316, 0x12FE, 0x12EF, 0x12DF, 0x12C7, 0x12BF, 0x12AF,
+	0x1297, 0x1287, 0x127F, 0x126F, 0x1257, 0x1246, 0x1236, 0x1680,
+	0x1679, 0x1666, 0x1659, 0x1652, 0x142E, 0x141F, 0x1410, 0x1401,
+	0x13F3, 0x13E4, 0x13D4, 0x13C6, 0x13B7, 0x13A8, 0x1398, 0x1389,
+	0x137A, 0x1363, 0x135B, 0x134C, 0x133D, 0x132D, 0x131D, 0x130E,
+	0x12F7, 0x12EF, 0x12DF, 0x12CF, 0x12B7, 0x12AF, 0x12A0, 0x1287,
+	0x1278, 0x1268, 0x125F, 0x1247, 0x1237, 0x1227, 0x1216, 0x1205,
+	0x11F5, 0x11DC, 0x11D3, 0x11C3, 0x11AA, 0x1199, 0x1188, 0x117F,
+	0x0E52, 0x13E1, 0x13CB, 0x13C3, 0x13B4, 0x139E, 0x138F, 0x1387,
+	0x1378, 0x1361, 0x1359, 0x134A, 0x133B, 0x1324, 0x156D, 0x1558,
+	0x1551, 0x1544, 0x1536, 0x1528, 0x151A, 0x150C, 0x1505, 0x14F0,
+	0x14E2, 0x14DB, 0x14CD, 0x14B7, 0x14B0, 0x14A2, 0x1494, 0x1485,
+	0x11F5, 0x11EC, 0x0EC0, 0x0EAB, 0x0E97, 0x0E78, 0x0E63, 0x0E59,
+	0x0E39, 0x0E24, 0x0E0F, 0x0DEE, 0x0DD9, 0x0DC3, 0x0DA2, 0x0D97,
+	0x0D81, 0x0D5F, 0x0D48, 0x0D26, 0x0D0F, 0x0CF8, 0x1338, 0x1329,
+	0x1321, 0x1311, 0x12FA, 0x12F2, 0x12E3, 0x12D3, 0x12BC, 0x152F,
+	0x1521, 0x150C, 0x1505, 0x14F7, 0x14F0, 0x14DB, 0x14CD, 0x14C6,
+	0x14B8, 0x14A3, 0x149C, 0x148D, 0x147F, 0x1471, 0x1462, 0x145B,
+	0x144D, 0x1437, 0x1430, 0x1421, 0x1413, 0x1404, 0x13F5, 0x13E7,
+	0x13DF, 0x13C9, 0x13BA, 0x13B3, 0x13A4, 0x138E, 0x1386, 0x1377,
+	0x1368, 0x1360, 0x134A, 0x133B, 0x1333, 0x1029, 0x100E, 0x1004,
+	0x0FF2, 0x0FE0, 0x0FC4, 0x0FB1, 0x0FA7, 0x0F8B, 0x0F78, 0x0F65,
+	0x0F52, 0x0F3E, 0x0F2B, 0x0F17, 0x0EFA, 0x0EE6, 0x0EDC, 0x0EC8,
+	0x0EAA, 0x0E96, 0x0E82, 0x0E63, 0x0E58, 0x0E44, 0x0E24, 0x0E0F,
+	0x0DFA, 0x0DDA, 0x0DC5, 0x0DBA, 0x0DA4, 0x0D83, 0x0D6D, 0x0D4C,
+	0x0D36, 0x0691, 0x065D, 0x10C0, 0x10AE, 0x10A5, 0x108B, 0x1079,
+	0x1067, 0x1055, 0x1043, 0x134A, 0x133B, 0x132C, 0x1324, 0x1315,
+	0x12FE, 0x12F6, 0x12E7, 0x12D8, 0x12D0, 0x12B8, 0x12A9, 0x12A1,
+	0x1291, 0x127A, 0x1272, 0x1262, 0x1252, 0x1242, 0x1232, 0x1222,
+	0x121A, 0x1202, 0x11F2, 0x11EA, 0x11D9, 0x11C9, 0x11B8, 0x11A8,
+	0x1198, 0x118F, 0x1176, 0x1166, 0x1155, 0x114D, 0x1133, 0x1122,
+	0x111A, 0x1109, 0x10EF, 0x10DE, 0x10D5, 0x10C4, 0x10AA, 0x10A1,
+	0x1090, 0x107E, 0x1063, 0x105A, 0x1049, 0x1037, 0x1025, 0x1013,
+	0x1001, 0x0FEF, 0x0FE5, 0x0FCA, 0x0FB7, 0x0FA5, 0x0F9B, 0x0F7F,
+	0x0F6C, 0x0F5A, 0x0F47, 0x0F33, 0x0F20, 0x0F0D, 0x0EFA, 0x0EE6,
+	0x0ED2, 0x0EBF, 0x0EAB, 0x0E8D, 0x0E83, 0x0E6F, 0x0E50, 0x0E3C,
+	0x0E27, 0x11E9, 0x11E1, 0x11D1, 0x11C1, 0x11B0, 0x11A0, 0x1190,
+	0x14AB, 0x149D, 0x148F, 0x1488, 0x147A, 0x1472, 0x145D, 0x1456,
+	0x1448, 0x1441, 0x1433, 0x1424, 0x1416, 0x140E, 0x1400, 0x13F9,
+	0x13E3, 0x13DC, 0x13CD, 0x13C6, 0x13B8, 0x13A9, 0x139A, 0x1393,
+	0x1384, 0x137C, 0x1366, 0x135F, 0x1350, 0x1341, 0x133A, 0x1323,
+	0x131B, 0x130C, 0x1305, 0x12F6, 0x12EE, 0x12D7, 0x12CF, 0x12C0,
+	0x12B1, 0x12A9, 0x1292, 0x128A, 0x127B, 0x1273, 0x1263, 0x124C,
+	0x1244, 0x1234, 0x122C, 0x121C, 0x120C, 0x11FC, 0x11ED, 0x11E4,
+	0x05E0, 0x11C4, 0x11B4, 0x11A4, 0x119C, 0x14F1, 0x14EA, 0x14DC,
+	0x14D5, 0x14C7, 0x14B9, 0x14B2, 0x14A4, 0x149D, 0x1490, 0x1481,
+	0x1474, 0x146C, 0x1465, 0x1457, 0x1450, 0x143B, 0x1434, 0x1426,
+	0x141E, 0x1417, 0x1409, 0x13FA, 0x13EC, 0x13E5, 0x13D7, 0x13CF,
+	0x13C8, 0x13B2, 0x13AB, 0x139C, 0x1395, 0x1387, 0x1378, 0x1369,
+	0x1361, 0x135A, 0x134B, 0x1344, 0x132D, 0x1326, 0x1317, 0x130F,
+	0x1301, 0x12F9, 0x12E2, 0x12DB, 0x12CC, 0x12C4, 0x12B5, 0x12AD,
+	0x1296, 0x128E, 0x127F, 0x1277, 0x1268, 0x1258, 0x1249, 0x1241,
+	0x1231, 0x1229, 0x121A, 0x0D4C, 0x0D36, 0x0D2B, 0x0D0A, 0x0CF4,
+	0x0CDE, 0x0CD3, 0x0CB1, 0x0C9B, 0x0C84, 0x0C6D, 0x0C61, 0x0C3E,
+	0x0C27, 0x0C0F, 0x0C03, 0x0BDF, 0x0BC6, 0x0BAE, 0x0B95, 0x0B70,
+	0x0B63, 0x0B4A, 0x0B30, 0x0B16, 0x0AEF, 0x0AD4, 0x0AC7, 0x0AAC,
+	0x0A83, 0x0A67, 0x0A4C, 0x0A21, 0x0A04, 0x09F6, 0x09D8, 0x09AC,
+	0x098D, 0x096F, 0x0950, 0x0920, 0x0900, 0x08E0, 0x08CF, 0x089C,
+	0x087A, 0x0857, 0x0822, 0x07FD, 0x07D8, 0x079F, 0x0777, 0x074F,
+	0x0711, 0x06E6, 0x06A3, 0x0675, 0x065D, 0x0614, 0x05E1, 0x0590,
+	0x0558, 0x0E55, 0x0E41, 0x0E2D, 0x131F, 0x1318, 0x1301, 0x12FA,
+	0x12F2, 0x12E3, 0x12DC, 0x12D4, 0x12BD, 0x12B6, 0x12A7, 0x129F,
+	0x1297, 0x1288, 0x1280, 0x1271, 0x1262, 0x125A, 0x1252, 0x1243,
+	0x123B, 0x1233, 0x121C, 0x1214, 0x1204, 0x11FC, 0x11F4, 0x11E5,
+	0x11DD, 0x11CD, 0x11BD, 0x11B5, 0x11A5, 0x119D, 0x1195, 0x117D,
+	0x1174, 0x1164, 0x115C, 0x1154, 0x1144, 0x113B, 0x1123, 0x111B,
+	0x1112, 0x1102, 0x10F9, 0x10E9, 0x10E0, 0x10CF, 0x10BF, 0x10B6,
+	0x10A6, 0x109D, 0x108C, 0x1084, 0x1072, 0x1061, 0x1058, 0x1047,
+	0x103F, 0x102E, 0x1025, 0x100B, 0x1002, 0x0FF9, 0x0FE7, 0x0FDE,
+	0x0FCD, 0x0FC4, 0x0FA9, 0x0FA0, 0x0F8E, 0x0F85, 0x0F73, 0x0F6A,
+	0x0F58, 0x0F45, 0x0F33, 0x0F29, 0x0F17, 0x0F0D, 0x0EFB, 0x0EF1,
+	0x0ED5, 0x0ECC, 0x0EB9, 0x0EAF, 0x0E9C, 0x0E92, 0x0E7F, 0x0E6C,
+	0x0E58, 0x0E4F, 0x0E3B, 0x0E31, 0x0E1D, 0x0E13, 0x0DF5, 0x0DEB,
+	0x0DD7, 0x0DC3, 0x0DB9, 0x0DA5, 0x0D9A, 0x0D7B, 0x0D71, 0x0D5C,
+	0x0D47, 0x0D3D, 0x0D28, 0x0D1D, 0x0CFD, 0x0CF2, 0x0CDC, 0x0CC7,
+	0x0CBB, 0x0CA6, 0x0C84, 0x0C79, 0x0C63, 0x0C57, 0x0C41, 0x0C2A,
+	0x133B, 0x132C, 0x1325, 0x131D, 0x1316, 0x130F, 0x1307, 0x1300,
+	0x12F8, 0x12F1, 0x12E2, 0x12DA, 0x12D2, 0x12CB, 0x12C3, 0x12BC,
+	0x12B4, 0x12AC, 0x129D, 0x1296, 0x128E, 0x1286, 0x127F, 0x1277,
+	0x126F, 0x1268, 0x1260, 0x1250, 0x1249, 0x1241, 0x1239, 0x1231,
+	0x1229, 0x1222, 0x121A, 0x1212, 0x120A, 0x11FA, 0x11F3, 0x11EB,
+	0x11E3, 0x11DB, 0x11D3, 0x11CB, 0x11C3, 0x11BB, 0x11AB, 0x11A3,
+	0x119B, 0x1193, 0x118B, 0x1183, 0x117B, 0x1173, 0x116B, 0x115A,
+	0x1152, 0x114A, 0x1142, 0x113A, 0x1131, 0x1129, 0x1121, 0x1119,
+	0x1111, 0x1100, 0x10F8, 0x10EF, 0x10E7, 0x10DF, 0x10D6, 0x10CE,
+	0x10C6, 0x10BD, 0x10B5, 0x10A4, 0x109B, 0x1093, 0x108B, 0x1082,
+	0x1079, 0x1071, 0x1068, 0x1060, 0x1057, 0x1046, 0x103D, 0x1035,
+	0x102C, 0x1023, 0x101B, 0x1012, 0x1009, 0x1001, 0x0FF8, 0x0FEF,
+	0x0FDD, 0x0FD5, 0x0FCC, 0x0FC3, 0x0FBA, 0x0FB1, 0x0FA8, 0x0F9F,
+	0x0F96, 0x0F8D, 0x0F7B, 0x0F72, 0x0F69, 0x0F60, 0x0F57, 0x0F4E,
+	0x0F45, 0x0F3C, 0x0F32, 0x0F29, 0x0F20, 0x0F0D, 0x0F04, 0x0EFB,
+	0x0EF2, 0x0EE8, 0x0EDF, 0x0ED6, 0x0ECC, 0x0EC3, 0x0EB9, 0x0EB0,
+	0x0E9D, 0x0E93, 0x0E8A, 0x0E80, 0x0E77, 0x0E6D, 0x0E63, 0x0E5A,
+	0x0E50, 0x0E46, 0x0E3D, 0x0E33, 0x0E1F, 0x0E15, 0x0E0C, 0x0E02,
+	0x0DF8, 0x0DEE, 0x0DE4, 0x0DDA, 0x0DD0, 0x0DC6, 0x0DBC, 0x0DB2,
+	0x0D9D, 0x0D93, 0x0D89, 0x0D7F, 0x0D75, 0x0D6A, 0x0D60, 0x0D56,
+	0x0D4B, 0x0D41, 0x0D36, 0x0D2C, 0x0D21, 0x0D0C, 0x0D02, 0x0CF7,
+	0x0CED, 0x0CE2, 0x0CD7, 0x0CCC, 0x0CC2, 0x0CB7, 0x0CAC, 0x0CA1,
+	0x0C96, 0x0C8B, 0x0C75, 0x0C6A, 0x0C5F, 0x0C54, 0x0C49, 0x0C3E,
+	0x0C32, 0x0C27, 0x0C1C, 0x0C11, 0x0C05, 0x0BFA, 0x0BEE, 0x0BD7,
+	0x0BCC, 0x12A0, 0x1299, 0x1298, 0x1289, 0x1282, 0x1281, 0x1279,
+	0x1272, 0x1271, 0x126A, 0x1269, 0x1262, 0x125A, 0x125A, 0x1252,
+	0x1252, 0x1242, 0x123B, 0x123A, 0x1233, 0x1232, 0x122B, 0x1223,
+	0x1222, 0x121B, 0x121A, 0x1213, 0x120B, 0x1203, 0x11FB, 0x11FB,
+	0x11F3, 0x11EB, 0x11EB, 0x11E3, 0x11E2, 0x11DB, 0x11D3, 0x11D2,
+	0x11CB, 0x11CA, 0x11BB, 0x11BA, 0x11B2, 0x11AA, 0x11AA, 0x11A2,
+	0x11A2, 0x119A, 0x1192, 0x1191, 0x1189, 0x1189, 0x1181, 0x1179,
+	0x1171, 0x1169, 0x1168, 0x1160, 0x1160, 0x1158, 0x1158, 0x1150,
+	0x1148, 0x1147, 0x113F, 0x113F, 0x1137, 0x112E, 0x1126, 0x1126,
+	0x111E, 0x1116, 0x1115, 0x110D, 0x110D, 0x1104, 0x1104, 0x10FC,
+	0x10FB, 0x10F3, 0x10F3, 0x10E3, 0x10DA, 0x10DA, 0x10D2, 0x10D1,
+	0x10C9, 0x10C9, 0x10C0, 0x10C0, 0x10B8, 0x10B7, 0x10AF, 0x10AF,
+	0x10A6, 0x109E, 0x1095, 0x108D, 0x108D, 0x1084, 0x1084, 0x107C,
+	0x107B, 0x1073, 0x1072, 0x106A, 0x1069, 0x1061, 0x1061, 0x1058,
+	0x1058, 0x1047, 0x1047, 0x103E, 0x103E, 0x1035, 0x1035, 0x102C,
+	0x102C, 0x1023, 0x1023, 0x101A, 0x101A, 0x1011, 0x1011, 0x1008
+};
+
+// note: returns 16.16 fixed-point
+static inline u32 DIVIDE(s16 n, u16 d) {
+	if (n >= 0 && n < d * 2) {
+		u32 offset = d;
+		int shift = 0;
+		u64 reciprocal;
+		u32 r, s;
+
+		while (offset <= 0x8000) {
+			offset <<= 1;
+			shift++;
+		}
+
+		// Newton-Raphson interation - x0, x1, x2
+		// (16.16 fixed-point)
+		r = initial_guess[offset & 0x7fff] | 0x10000;
+
+		s = (u64)offset * r >> 16;
+		r = (u64)r * (0x20000 - s) >> 16;
+
+		s = (u64)offset * r >> 16;
+		r = (u64)r * (0x20000 - s) >> 16;
+
+		reciprocal = (u64)(r) << shift;
+
+		return (u32)(((reciprocal * n) + 0x8000) >> 16);
+	}
+
+	return 0xffffffff;
+}
+
diff --git a/libpcsxcore/ix86/iGte.h b/libpcsxcore/ix86/iGte.h
new file mode 100644
index 0000000..d03705e
--- /dev/null
+++ b/libpcsxcore/ix86/iGte.h
@@ -0,0 +1,79 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+#ifndef __IGTE_H__
+#define __IGTE_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "../r3000a.h"
+#include "../psxmem.h"
+
+#define CP2_FUNC(f) \
+void gte##f(); \
+static void rec##f() { \
+	iFlushRegs(); \
+	MOV32ItoM((u32)&psxRegs.code, (u32)psxRegs.code); \
+	CALLFunc ((u32)gte##f); \
+/*	branch = 2; */\
+}
+
+#define CP2_FUNCNC(f) \
+void gte##f(); \
+static void rec##f() { \
+	iFlushRegs(); \
+	CALLFunc ((u32)gte##f); \
+/*	branch = 2; */\
+}
+
+CP2_FUNC(MFC2);
+CP2_FUNC(MTC2);
+CP2_FUNC(CFC2);
+CP2_FUNC(CTC2);
+CP2_FUNC(LWC2);
+CP2_FUNC(SWC2);
+CP2_FUNCNC(RTPS);
+CP2_FUNC(OP);
+CP2_FUNCNC(NCLIP);
+CP2_FUNC(DPCS);
+CP2_FUNC(INTPL);
+CP2_FUNC(MVMVA);
+CP2_FUNCNC(NCDS);
+CP2_FUNCNC(NCDT);
+CP2_FUNCNC(CDP);
+CP2_FUNCNC(NCCS);
+CP2_FUNCNC(CC);
+CP2_FUNCNC(NCS);
+CP2_FUNCNC(NCT);
+CP2_FUNC(SQR);
+CP2_FUNC(DCPL);
+CP2_FUNCNC(DPCT);
+CP2_FUNCNC(AVSZ3);
+CP2_FUNCNC(AVSZ4);
+CP2_FUNCNC(RTPT);
+CP2_FUNC(GPF);
+CP2_FUNC(GPL);
+CP2_FUNCNC(NCCT);
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/libpcsxcore/ix86/iR3000A.c b/libpcsxcore/ix86/iR3000A.c
new file mode 100644
index 0000000..9216a22
--- /dev/null
+++ b/libpcsxcore/ix86/iR3000A.c
@@ -0,0 +1,2899 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+/*
+* i386 assembly functions for R3000A core.
+*/
+
+#include "ix86.h"
+#include <sys/mman.h>
+
+#ifndef MAP_ANONYMOUS
+#define MAP_ANONYMOUS MAP_ANON
+#endif
+
+u32 *psxRecLUT;
+
+#undef PC_REC
+#undef PC_REC8
+#undef PC_REC16
+#undef PC_REC32
+#define PC_REC(x)	(psxRecLUT[x >> 16] + (x & 0xffff))
+#define PC_REC8(x)	(*(u8 *)PC_REC(x))
+#define PC_REC16(x) (*(u16*)PC_REC(x))
+#define PC_REC32(x) (*(u32*)PC_REC(x))
+
+#define RECMEM_SIZE		(8 * 1024 * 1024)
+
+static char *recMem;	/* the recompiled blocks will be here */
+static char *recRAM;	/* and the ptr to the blocks here */
+static char *recROM;	/* and here */
+
+static u32 pc;			/* recompiler pc */
+static u32 pcold;		/* recompiler oldpc */
+static int count;		/* recompiler intruction count */
+static int branch;		/* set for branch */
+static u32 target;		/* branch target */
+static u32 resp;
+
+typedef struct {
+	int state;
+	u32 k;
+	int reg;
+} iRegisters;
+
+static iRegisters iRegs[32];
+static iRegisters iRegsS[32];
+
+#define ST_UNK    0
+#define ST_CONST  1
+#define ST_MAPPED 2
+
+#define IsConst(reg)  (iRegs[reg].state == ST_CONST)
+#define IsMapped(reg) (iRegs[reg].state == ST_MAPPED)
+
+static void (*recBSC[64])();
+static void (*recSPC[64])();
+static void (*recREG[32])();
+static void (*recCP0[32])();
+static void (*recCP2[64])();
+static void (*recCP2BSC[32])();
+
+static void MapConst(int reg, u32 _const) {
+	iRegs[reg].k = _const;
+	iRegs[reg].state = ST_CONST;
+}
+
+static void iFlushReg(int reg) {
+	if (IsConst(reg)) {
+		MOV32ItoM((u32)&psxRegs.GPR.r[reg], iRegs[reg].k);
+	}
+	iRegs[reg].state = ST_UNK;
+}
+
+static void iFlushRegs() {
+	int i;
+
+	for (i=1; i<32; i++) {
+		iFlushReg(i);
+	}
+}
+
+static void iRet() {
+	/* store cycle */
+	count = ((pc - pcold) / 4) * BIAS;
+	ADD32ItoM((u32)&psxRegs.cycle, count);
+	if (resp) ADD32ItoR(ESP, resp);
+	RET();
+}
+
+static int iLoadTest() {
+	u32 tmp;
+
+	// check for load delay
+	tmp = psxRegs.code >> 26;
+	switch (tmp) {
+		case 0x10: // COP0
+			switch (_Rs_) {
+				case 0x00: // MFC0
+				case 0x02: // CFC0
+					return 1;
+			}
+			break;
+		case 0x12: // COP2
+			switch (_Funct_) {
+				case 0x00:
+					switch (_Rs_) {
+						case 0x00: // MFC2
+						case 0x02: // CFC2
+							return 1;
+					}
+					break;
+			}
+			break;
+		case 0x32: // LWC2
+			return 1;
+		default:
+			if (tmp >= 0x20 && tmp <= 0x26) { // LB/LH/LWL/LW/LBU/LHU/LWR
+				return 1;
+			}
+			break;
+	}
+	return 0;
+}
+
+/* set a pending branch */
+static void SetBranch() {
+	branch = 1;
+	psxRegs.code = PSXMu32(pc);
+	pc += 4;
+
+	if (iLoadTest() == 1) {
+		iFlushRegs();
+		MOV32ItoM((u32)&psxRegs.code, psxRegs.code);
+		/* store cycle */
+		count = ((pc - pcold) / 4) * BIAS;
+		ADD32ItoM((u32)&psxRegs.cycle, count);
+		if (resp) ADD32ItoR(ESP, resp);
+
+		PUSH32M((u32)&target);
+		PUSH32I(_Rt_);
+		CALLFunc((u32)psxDelayTest);
+		ADD32ItoR(ESP, 2*4);
+
+		RET();
+		return;
+	}
+
+	recBSC[psxRegs.code>>26]();
+
+	iFlushRegs();
+	MOV32MtoR(EAX, (u32)&target);
+	MOV32RtoM((u32)&psxRegs.pc, EAX);
+	CALLFunc((u32)psxBranchTest);
+
+	iRet();
+}
+
+static void iJump(u32 branchPC) {
+	branch = 1;
+	psxRegs.code = PSXMu32(pc);
+	pc+=4;
+
+	if (iLoadTest() == 1) {
+		iFlushRegs();
+		MOV32ItoM((u32)&psxRegs.code, psxRegs.code);
+		/* store cycle */
+		count = ((pc - pcold) / 4) * BIAS;
+		ADD32ItoM((u32)&psxRegs.cycle, count);
+		if (resp) ADD32ItoR(ESP, resp);
+
+		PUSH32I(branchPC);
+		PUSH32I(_Rt_);
+		CALLFunc((u32)psxDelayTest);
+		ADD32ItoR(ESP, 2*4);
+
+		RET();
+		return;
+	}
+
+	recBSC[psxRegs.code>>26]();
+
+	iFlushRegs();
+	MOV32ItoM((u32)&psxRegs.pc, branchPC);
+	CALLFunc((u32)psxBranchTest);
+	/* store cycle */
+	count = ((pc - pcold) / 4) * BIAS;
+	ADD32ItoM((u32)&psxRegs.cycle, count);
+	if (resp) ADD32ItoR(ESP, resp);
+
+	// maybe just happened an interruption, check so
+	CMP32ItoM((u32)&psxRegs.pc, branchPC);
+	j8Ptr[0] = JE8(0);
+	RET();
+
+	x86SetJ8(j8Ptr[0]);
+	MOV32MtoR(EAX, PC_REC(branchPC));
+	TEST32RtoR(EAX, EAX);
+	j8Ptr[1] = JNE8(0);
+	RET();
+
+	x86SetJ8(j8Ptr[1]);
+	RET();
+	JMP32R(EAX);
+}
+
+static void iBranch(u32 branchPC, int savectx) {
+	u32 respold=0;
+
+	if (savectx) {
+		respold = resp;
+		memcpy(iRegsS, iRegs, sizeof(iRegs));
+	}
+
+	branch = 1;
+	psxRegs.code = PSXMu32(pc);
+
+	// the delay test is only made when the branch is taken
+	// savectx == 0 will mean that :)
+	if (savectx == 0 && iLoadTest() == 1) {
+		iFlushRegs();
+		MOV32ItoM((u32)&psxRegs.code, psxRegs.code);
+		/* store cycle */
+		count = (((pc+4) - pcold) / 4) * BIAS;
+		ADD32ItoM((u32)&psxRegs.cycle, count);
+		if (resp) ADD32ItoR(ESP, resp);
+
+		PUSH32I(branchPC);
+		PUSH32I(_Rt_);
+		CALLFunc((u32)psxDelayTest);
+		ADD32ItoR(ESP, 2*4);
+
+		RET();
+		return;
+	}
+
+	pc+= 4;
+	recBSC[psxRegs.code>>26]();
+
+	iFlushRegs();
+	MOV32ItoM((u32)&psxRegs.pc, branchPC);
+	CALLFunc((u32)psxBranchTest);
+	/* store cycle */
+	count = ((pc - pcold) / 4) * BIAS;
+	ADD32ItoM((u32)&psxRegs.cycle, count);
+	if (resp) ADD32ItoR(ESP, resp);
+
+	// maybe just happened an interruption, check so
+	CMP32ItoM((u32)&psxRegs.pc, branchPC);
+	j8Ptr[1] = JE8(0);
+	RET();
+
+	x86SetJ8(j8Ptr[1]);
+	MOV32MtoR(EAX, PC_REC(branchPC));
+	TEST32RtoR(EAX, EAX);
+	j8Ptr[2] = JNE8(0);
+	RET();
+
+	x86SetJ8(j8Ptr[2]);
+	JMP32R(EAX);
+
+	pc-= 4;
+	if (savectx) {
+		resp = respold;
+		memcpy(iRegs, iRegsS, sizeof(iRegs));
+	}
+}
+
+
+char *txt0 = "EAX = %x : ECX = %x : EDX = %x\n";
+char *txt1 = "EAX = %x\n";
+char *txt2 = "M32 = %x\n";
+
+void iLogX86() {
+	PUSHA32();
+
+	PUSH32R  (EDX);
+	PUSH32R  (ECX);
+	PUSH32R  (EAX);
+	PUSH32M  ((u32)&txt0);
+	CALLFunc ((u32)SysPrintf);
+	ADD32ItoR(ESP, 4*4);
+
+	POPA32();
+}
+
+void iLogEAX() {
+	PUSH32R  (EAX);
+	PUSH32M  ((u32)&txt1);
+	CALLFunc ((u32)SysPrintf);
+	ADD32ItoR(ESP, 4*2);
+}
+
+void iLogM32(u32 mem) {
+	PUSH32M  (mem);
+	PUSH32M  ((u32)&txt2);
+	CALLFunc ((u32)SysPrintf);
+	ADD32ItoR(ESP, 4*2);
+}
+
+static void iDumpRegs() {
+	int i, j;
+
+	printf("%x %x\n", psxRegs.pc, psxRegs.cycle);
+	for (i = 0; i < 4; i++) {
+		for (j = 0; j < 8; j++)
+			printf("%x ", psxRegs.GPR.r[j * i]);
+		printf("\n");
+	}
+}
+
+void iDumpBlock(char *ptr) {
+	FILE *f;
+	u32 i;
+
+	SysPrintf("dump1 %x:%x, %x\n", psxRegs.pc, pc, psxRegs.cycle);
+
+	for (i = psxRegs.pc; i < pc; i += 4)
+		SysPrintf("%s\n", disR3000AF(PSXMu32(i), i));
+
+	fflush(stdout);
+	f = fopen("dump1", "w");
+	fwrite(ptr, 1, (u32)x86Ptr - (u32)ptr, f);
+	fclose(f);
+	system("ndisasmw -u dump1");
+	fflush(stdout);
+}
+
+#define REC_FUNC(f) \
+void psx##f(); \
+static void rec##f() { \
+	iFlushRegs(); \
+	MOV32ItoM((u32)&psxRegs.code, (u32)psxRegs.code); \
+	MOV32ItoM((u32)&psxRegs.pc, (u32)pc); \
+	CALLFunc((u32)psx##f); \
+/*	branch = 2; */\
+}
+
+#define REC_SYS(f) \
+void psx##f(); \
+static void rec##f() { \
+	iFlushRegs(); \
+	MOV32ItoM((u32)&psxRegs.code, (u32)psxRegs.code); \
+	MOV32ItoM((u32)&psxRegs.pc, (u32)pc); \
+	CALLFunc((u32)psx##f); \
+	branch = 2; \
+	iRet(); \
+}
+
+#define REC_BRANCH(f) \
+void psx##f(); \
+static void rec##f() { \
+	iFlushRegs(); \
+	MOV32ItoM((u32)&psxRegs.code, (u32)psxRegs.code); \
+	MOV32ItoM((u32)&psxRegs.pc, (u32)pc); \
+	CALLFunc((u32)psx##f); \
+	branch = 2; \
+	iRet(); \
+}
+
+static void recRecompile();
+
+static int recInit() {
+	int i;
+
+	psxRecLUT = (u32 *)malloc(0x010000 * 4);
+
+	recMem = mmap(0, RECMEM_SIZE + 0x1000,
+		PROT_EXEC | PROT_WRITE | PROT_READ, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
+
+	recRAM = (char *)malloc(0x200000);
+	recROM = (char *)malloc(0x080000);
+	if (recRAM == NULL || recROM == NULL || recMem == NULL || psxRecLUT == NULL) {
+		SysMessage("Error allocating memory"); return -1;
+	}
+
+	for (i = 0; i < 0x80; i++) psxRecLUT[i + 0x0000] = (u32)&recRAM[(i & 0x1f) << 16];
+	memcpy(psxRecLUT + 0x8000, psxRecLUT, 0x80 * 4);
+	memcpy(psxRecLUT + 0xa000, psxRecLUT, 0x80 * 4);
+
+	for (i = 0; i < 0x08; i++) psxRecLUT[i + 0xbfc0] = (u32)&recROM[i << 16];
+
+	return 0;
+}
+
+static void recReset() {
+	memset(recRAM, 0, 0x200000);
+	memset(recROM, 0, 0x080000);
+
+	x86Init();
+
+	x86SetPtr(recMem);
+
+	branch = 0;
+	memset(iRegs, 0, sizeof(iRegs));
+	iRegs[0].state = ST_CONST;
+	iRegs[0].k     = 0;
+}
+
+static void recShutdown() {
+	if (recMem == NULL) return;
+	free(psxRecLUT);
+	munmap(recMem, RECMEM_SIZE + 0x1000);
+	free(recRAM);
+	free(recROM);
+	x86Shutdown();
+}
+
+static void recError() {
+	SysReset();
+	ClosePlugins();
+	SysMessage("Unrecoverable error while running recompiler\n");
+	SysRunGui();
+}
+
+__inline static void execute() {
+	void (**recFunc)() = NULL;
+	char *p;
+
+	p = (char *)PC_REC(psxRegs.pc);
+	if (p != NULL) recFunc = (void (**)()) (u32)p;
+	else { recError(); return; }
+
+	if (*recFunc == 0) {
+		recRecompile();
+	}
+	(*recFunc)();
+}
+
+static void recExecute() {
+	for (;;) execute();
+}
+
+static void recExecuteBlock() {
+	execute();
+}
+
+static void recClear(u32 Addr, u32 Size) {
+	memset((void*)PC_REC(Addr), 0, Size * 4);
+}
+
+static void recNULL() {
+//	SysMessage("recUNK: %8.8x\n", psxRegs.code);
+}
+
+/*********************************************************
+* goes to opcodes tables...                              *
+* Format:  table[something....]                          *
+*********************************************************/
+
+//REC_SYS(SPECIAL);
+static void recSPECIAL() {
+	recSPC[_Funct_]();
+}
+
+static void recREGIMM() {
+	recREG[_Rt_]();
+}
+
+static void recCOP0() {
+	recCP0[_Rs_]();
+}
+
+//REC_SYS(COP2);
+static void recCOP2() {
+	recCP2[_Funct_]();
+}
+
+static void recBASIC() {
+	recCP2BSC[_Rs_]();
+}
+
+//end of Tables opcodes...
+
+/*********************************************************
+* Arithmetic with immediate operand                      *
+* Format:  OP rt, rs, immediate                          *
+*********************************************************/
+
+/*REC_FUNC(ADDI);
+REC_FUNC(ADDIU);
+REC_FUNC(ANDI);
+REC_FUNC(ORI);
+REC_FUNC(XORI);
+REC_FUNC(SLTI);
+REC_FUNC(SLTIU);
+#if 0*/
+static void recADDIU()  {
+// Rt = Rs + Im
+	if (!_Rt_) return;
+
+//	iFlushRegs();
+
+	if (_Rs_ == _Rt_) {
+		if (IsConst(_Rt_)) {
+			iRegs[_Rt_].k+= _Imm_;
+		} else {
+			if (_Imm_ == 1) {
+				INC32M((u32)&psxRegs.GPR.r[_Rt_]);
+			} else if (_Imm_ == -1) {
+				DEC32M((u32)&psxRegs.GPR.r[_Rt_]);
+			} else if (_Imm_) {
+				ADD32ItoM((u32)&psxRegs.GPR.r[_Rt_], _Imm_);
+			}
+		}
+	} else {
+		if (IsConst(_Rs_)) {
+			MapConst(_Rt_, iRegs[_Rs_].k + _Imm_);
+		} else {
+			iRegs[_Rt_].state = ST_UNK;
+
+			MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+			if (_Imm_ == 1) { 
+				INC32R(EAX);
+			} else if (_Imm_ == -1) {
+				DEC32R(EAX);
+			} else if (_Imm_) {
+				ADD32ItoR(EAX, _Imm_);
+			}
+			MOV32RtoM((u32)&psxRegs.GPR.r[_Rt_], EAX);
+		}
+	}
+}
+
+static void recADDI()  {
+// Rt = Rs + Im
+	recADDIU();
+}
+
+static void recSLTI() {
+// Rt = Rs < Im (signed)
+	if (!_Rt_) return;
+
+//	iFlushRegs();
+
+	if (IsConst(_Rs_)) {
+		MapConst(_Rt_, (s32)iRegs[_Rs_].k < _Imm_);
+	} else {
+		iRegs[_Rt_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+	    CMP32ItoR(EAX, _Imm_);
+	    SETL8R   (EAX);
+	    AND32ItoR(EAX, 0xff);
+		MOV32RtoM((u32)&psxRegs.GPR.r[_Rt_], EAX);
+	}
+}
+
+static void recSLTIU() {
+// Rt = Rs < Im (unsigned)
+	if (!_Rt_) return;
+
+//	iFlushRegs();
+
+	if (IsConst(_Rs_)) {
+		MapConst(_Rt_, iRegs[_Rs_].k < _ImmU_);
+	} else {
+		iRegs[_Rt_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+	    CMP32ItoR(EAX, _Imm_);
+	    SETB8R   (EAX);
+	    AND32ItoR(EAX, 0xff);
+		MOV32RtoM((u32)&psxRegs.GPR.r[_Rt_], EAX);
+	}
+}
+
+static void recANDI() {
+// Rt = Rs And Im
+	if (!_Rt_) return;
+
+//	iFlushRegs();
+
+	if (_Rs_ == _Rt_) {
+		if (IsConst(_Rt_)) {
+			iRegs[_Rt_].k&= _ImmU_;
+		} else {
+			AND32ItoM((u32)&psxRegs.GPR.r[_Rt_], _ImmU_);
+		}
+	} else {
+		if (IsConst(_Rs_)) {
+			MapConst(_Rt_, iRegs[_Rs_].k & _ImmU_);
+		} else {
+			iRegs[_Rt_].state = ST_UNK;
+
+			MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+			AND32ItoR(EAX, _ImmU_);
+			MOV32RtoM((u32)&psxRegs.GPR.r[_Rt_], EAX);
+		}
+	}
+}
+
+static void recORI() {
+// Rt = Rs Or Im
+	if (!_Rt_) return;
+
+//	iFlushRegs();
+
+	if (_Rs_ == _Rt_) {
+		if (IsConst(_Rt_)) {
+			iRegs[_Rt_].k|= _ImmU_;
+		} else {
+			OR32ItoM((u32)&psxRegs.GPR.r[_Rt_], _ImmU_);
+		}
+	} else {
+		if (IsConst(_Rs_)) {
+			MapConst(_Rt_, iRegs[_Rs_].k | _ImmU_);
+		} else {
+			iRegs[_Rt_].state = ST_UNK;
+
+			MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+			if (_ImmU_) OR32ItoR (EAX, _ImmU_);
+			MOV32RtoM((u32)&psxRegs.GPR.r[_Rt_], EAX);
+		}
+	}
+}
+
+static void recXORI() {
+// Rt = Rs Xor Im
+	if (!_Rt_) return;
+
+//	iFlushRegs();
+
+	if (_Rs_ == _Rt_) {
+		if (IsConst(_Rt_)) {
+			iRegs[_Rt_].k^= _ImmU_;
+		} else {
+			XOR32ItoM((u32)&psxRegs.GPR.r[_Rt_], _ImmU_);
+		}
+	} else {
+		if (IsConst(_Rs_)) {
+			MapConst(_Rt_, iRegs[_Rs_].k ^ _ImmU_);
+		} else {
+			iRegs[_Rt_].state = ST_UNK;
+
+			MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+			XOR32ItoR(EAX, _ImmU_);
+			MOV32RtoM((u32)&psxRegs.GPR.r[_Rt_], EAX);
+		}
+	}
+}
+//#endif
+//end of * Arithmetic with immediate operand  
+
+/*********************************************************
+* Load higher 16 bits of the first word in GPR with imm  *
+* Format:  OP rt, immediate                              *
+*********************************************************/
+/*REC_FUNC(LUI);
+#if 0*/
+static void recLUI()  {
+// Rt = Imm << 16
+	if (!_Rt_) return;
+
+	MapConst(_Rt_, psxRegs.code << 16);
+}
+//#endif
+//End of Load Higher .....
+
+
+/*********************************************************
+* Register arithmetic                                    *
+* Format:  OP rd, rs, rt                                 *
+*********************************************************/
+
+/*REC_FUNC(ADD);
+REC_FUNC(ADDU);
+REC_FUNC(SUB);
+REC_FUNC(SUBU);
+REC_FUNC(AND);
+REC_FUNC(OR);
+REC_FUNC(XOR);
+REC_FUNC(NOR);
+REC_FUNC(SLT);
+REC_FUNC(SLTU);
+
+#if 0*/
+static void recADDU() {
+// Rd = Rs + Rt 
+	if (!_Rd_) return;
+
+//	iFlushRegs();
+
+	if (IsConst(_Rs_) && IsConst(_Rt_)) {
+		MapConst(_Rd_, iRegs[_Rs_].k + iRegs[_Rt_].k);
+	} else if (IsConst(_Rs_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		if (_Rt_ == _Rd_) {
+			if (iRegs[_Rs_].k == 1) {
+				INC32M((u32)&psxRegs.GPR.r[_Rd_]);
+			} else if (iRegs[_Rs_].k == -1) {
+				DEC32M((u32)&psxRegs.GPR.r[_Rd_]);
+			} else if (iRegs[_Rs_].k) {
+				ADD32ItoM((u32)&psxRegs.GPR.r[_Rd_], iRegs[_Rs_].k);
+			}
+		} else {
+			MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rt_]);
+			if (iRegs[_Rs_].k == 1) { 
+				INC32R(EAX);
+			} else if (iRegs[_Rs_].k == 0xffffffff) {
+				DEC32R(EAX);
+			} else if (iRegs[_Rs_].k) {
+				ADD32ItoR(EAX, iRegs[_Rs_].k);
+			}
+			MOV32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+		}
+	} else if (IsConst(_Rt_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		if (_Rs_ == _Rd_) {
+			if (iRegs[_Rt_].k == 1) {
+				INC32M((u32)&psxRegs.GPR.r[_Rd_]);
+			} else if (iRegs[_Rt_].k == -1) {
+				DEC32M((u32)&psxRegs.GPR.r[_Rd_]);
+			} else if (iRegs[_Rt_].k) {
+				ADD32ItoM((u32)&psxRegs.GPR.r[_Rd_], iRegs[_Rt_].k);
+			}
+		} else {
+			MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+			if (iRegs[_Rt_].k == 1) { 
+				INC32R(EAX);
+			} else if (iRegs[_Rt_].k == 0xffffffff) {
+				DEC32R(EAX);
+			} else if (iRegs[_Rt_].k) {
+				ADD32ItoR(EAX, iRegs[_Rt_].k);
+			}
+			MOV32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+		}
+	} else {
+		iRegs[_Rd_].state = ST_UNK;
+
+		if (_Rs_ == _Rd_) { // Rd+= Rt
+			MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rt_]);
+			ADD32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+		} else if (_Rt_ == _Rd_) { // Rd+= Rs
+			MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+			ADD32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+		} else { // Rd = Rs + Rt
+			MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+			ADD32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rt_]);
+			MOV32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+		}
+	}
+}
+
+static void recADD() {
+// Rd = Rs + Rt
+	recADDU();
+}
+
+static void recSUBU() {
+// Rd = Rs - Rt
+	if (!_Rd_) return;
+
+//	iFlushRegs();
+
+	if (IsConst(_Rs_) && IsConst(_Rt_)) {
+		MapConst(_Rd_, iRegs[_Rs_].k - iRegs[_Rt_].k);
+	} else if (IsConst(_Rs_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32ItoR(EAX, iRegs[_Rs_].k);
+		SUB32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rt_]);
+		MOV32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+	} else if (IsConst(_Rt_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+		SUB32ItoR(EAX, iRegs[_Rt_].k);
+		MOV32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+	} else {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+		SUB32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rt_]);
+		MOV32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+	}
+}   
+
+static void recSUB() {
+// Rd = Rs - Rt
+	recSUBU();
+}   
+
+static void recAND() {
+// Rd = Rs And Rt
+	if (!_Rd_) return;
+
+//	iFlushRegs();
+
+	if (IsConst(_Rs_) && IsConst(_Rt_)) {
+		MapConst(_Rd_, iRegs[_Rs_].k & iRegs[_Rt_].k);
+	} else if (IsConst(_Rs_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		if (_Rd_ == _Rt_) { // Rd&= Rs
+			AND32ItoM((u32)&psxRegs.GPR.r[_Rd_], iRegs[_Rs_].k);
+		} else {
+			MOV32ItoR(EAX, iRegs[_Rs_].k);
+			AND32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rt_]);
+			MOV32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+		}
+	} else if (IsConst(_Rt_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		if (_Rd_ == _Rs_) { // Rd&= kRt
+			AND32ItoM((u32)&psxRegs.GPR.r[_Rd_], iRegs[_Rt_].k);
+		} else { // Rd = Rs & kRt
+			MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+			AND32ItoR(EAX, iRegs[_Rt_].k);
+			MOV32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+		}
+	} else {
+		iRegs[_Rd_].state = ST_UNK;
+
+		if (_Rs_ == _Rd_) { // Rd&= Rt
+			MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rt_]);
+			AND32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+		} else if (_Rt_ == _Rd_) { // Rd&= Rs
+			MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+			AND32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+		} else { // Rd = Rs & Rt
+			MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+			AND32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rt_]);
+			MOV32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+		}
+	}
+}   
+
+static void recOR() {
+// Rd = Rs Or Rt
+	if (!_Rd_) return;
+
+//	iFlushRegs();
+
+	if (IsConst(_Rs_) && IsConst(_Rt_)) {
+		MapConst(_Rd_, iRegs[_Rs_].k | iRegs[_Rt_].k);
+	} else if (IsConst(_Rs_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32ItoR(EAX, iRegs[_Rs_].k);
+		OR32MtoR (EAX, (u32)&psxRegs.GPR.r[_Rt_]);
+		MOV32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+	} else if (IsConst(_Rt_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+		OR32ItoR (EAX, iRegs[_Rt_].k);
+		MOV32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+	} else {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+		OR32MtoR (EAX, (u32)&psxRegs.GPR.r[_Rt_]);
+		MOV32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+	}
+}   
+
+static void recXOR() {
+// Rd = Rs Xor Rt
+	if (!_Rd_) return;
+
+//	iFlushRegs();
+
+	if (IsConst(_Rs_) && IsConst(_Rt_)) {
+		MapConst(_Rd_, iRegs[_Rs_].k ^ iRegs[_Rt_].k);
+	} else if (IsConst(_Rs_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32ItoR(EAX, iRegs[_Rs_].k);
+		XOR32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rt_]);
+		MOV32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+	} else if (IsConst(_Rt_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+		XOR32ItoR(EAX, iRegs[_Rt_].k);
+		MOV32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+	} else {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+		XOR32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rt_]);
+		MOV32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+	}
+}
+
+static void recNOR() {
+// Rd = Rs Nor Rt
+	if (!_Rd_) return;
+
+//	iFlushRegs();
+
+	if (IsConst(_Rs_) && IsConst(_Rt_)) {
+		MapConst(_Rd_, ~(iRegs[_Rs_].k | iRegs[_Rt_].k));
+	} else if (IsConst(_Rs_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32ItoR(EAX, iRegs[_Rs_].k);
+		OR32MtoR (EAX, (u32)&psxRegs.GPR.r[_Rt_]);
+		NOT32R   (EAX);
+		MOV32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+	} else if (IsConst(_Rt_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+		OR32ItoR (EAX, iRegs[_Rt_].k);
+		NOT32R   (EAX);
+		MOV32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+	} else {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+		OR32MtoR (EAX, (u32)&psxRegs.GPR.r[_Rt_]);
+		NOT32R   (EAX);
+		MOV32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+	}
+}
+
+static void recSLT() {
+// Rd = Rs < Rt (signed)
+	if (!_Rd_) return;
+
+//	iFlushRegs();
+
+	if (IsConst(_Rs_) && IsConst(_Rt_)) {
+		MapConst(_Rd_, (s32)iRegs[_Rs_].k < (s32)iRegs[_Rt_].k);
+	} else if (IsConst(_Rs_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32ItoR(EAX, iRegs[_Rs_].k);
+		CMP32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rt_]);
+		SETL8R   (EAX);
+		AND32ItoR(EAX, 0xff);
+		MOV32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+	} else if (IsConst(_Rt_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+		CMP32ItoR(EAX, iRegs[_Rt_].k);
+		SETL8R   (EAX);
+		AND32ItoR(EAX, 0xff);
+		MOV32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+	} else {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+		CMP32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rt_]);
+		SETL8R   (EAX);
+		AND32ItoR(EAX, 0xff);
+		MOV32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+	}
+}  
+
+static void recSLTU() { 
+// Rd = Rs < Rt (unsigned)
+	if (!_Rd_) return;
+
+//	iFlushRegs();
+
+	if (IsConst(_Rs_) && IsConst(_Rt_)) {
+		MapConst(_Rd_, iRegs[_Rs_].k < iRegs[_Rt_].k);
+	} else if (IsConst(_Rs_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32ItoR(EAX, iRegs[_Rs_].k);
+	    CMP32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rt_]);
+		SBB32RtoR(EAX, EAX);
+		NEG32R   (EAX);
+		MOV32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+	} else if (IsConst(_Rt_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+		CMP32ItoR(EAX, iRegs[_Rt_].k);
+		SBB32RtoR(EAX, EAX);
+		NEG32R   (EAX);
+		MOV32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+	} else {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+	    CMP32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rt_]);
+		SBB32RtoR(EAX, EAX);
+		NEG32R   (EAX);
+		MOV32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+	}
+}
+//#endif
+//End of * Register arithmetic
+
+/*********************************************************
+* Register mult/div & Register trap logic                *
+* Format:  OP rs, rt                                     *
+*********************************************************/
+
+/*REC_FUNC(MULT);
+REC_FUNC(MULTU);
+REC_FUNC(DIV);
+REC_FUNC(DIVU);
+#if 0*/
+static void recMULT() {
+// Lo/Hi = Rs * Rt (signed)
+
+//	iFlushRegs();
+
+	if ((IsConst(_Rs_) && iRegs[_Rs_].k == 0) ||
+		(IsConst(_Rt_) && iRegs[_Rt_].k == 0)) {
+		XOR32RtoR(EAX, EAX);
+		MOV32RtoM((u32)&psxRegs.GPR.n.lo, EAX);
+		MOV32RtoM((u32)&psxRegs.GPR.n.hi, EAX);
+		return;
+	}
+
+	if (IsConst(_Rs_)) {
+		MOV32ItoR(EAX, iRegs[_Rs_].k);// printf("multrsk %x\n", iRegs[_Rs_].k);
+	} else {
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+	}
+	if (IsConst(_Rt_)) {
+		MOV32ItoR(EDX, iRegs[_Rt_].k);// printf("multrtk %x\n", iRegs[_Rt_].k);
+		IMUL32R  (EDX);
+	} else {
+		IMUL32M  ((u32)&psxRegs.GPR.r[_Rt_]);
+	}
+	MOV32RtoM((u32)&psxRegs.GPR.n.lo, EAX);
+	MOV32RtoM((u32)&psxRegs.GPR.n.hi, EDX);
+}
+
+static void recMULTU() {
+// Lo/Hi = Rs * Rt (unsigned)
+
+//	iFlushRegs();
+
+	if ((IsConst(_Rs_) && iRegs[_Rs_].k == 0) ||
+		(IsConst(_Rt_) && iRegs[_Rt_].k == 0)) {
+		XOR32RtoR(EAX, EAX);
+		MOV32RtoM((u32)&psxRegs.GPR.n.lo, EAX);
+		MOV32RtoM((u32)&psxRegs.GPR.n.hi, EAX);
+		return;
+	}
+
+	if (IsConst(_Rs_)) {
+		MOV32ItoR(EAX, iRegs[_Rs_].k);// printf("multursk %x\n", iRegs[_Rs_].k);
+	} else {
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+	}
+	if (IsConst(_Rt_)) {
+		MOV32ItoR(EDX, iRegs[_Rt_].k);// printf("multurtk %x\n", iRegs[_Rt_].k);
+		MUL32R   (EDX);
+	} else {
+		MUL32M   ((u32)&psxRegs.GPR.r[_Rt_]);
+	}
+	MOV32RtoM((u32)&psxRegs.GPR.n.lo, EAX);
+	MOV32RtoM((u32)&psxRegs.GPR.n.hi, EDX);
+}
+
+static void recDIV() {
+// Lo/Hi = Rs / Rt (signed)
+
+//	iFlushRegs();
+
+	if (IsConst(_Rt_)) {
+		if (iRegs[_Rt_].k == 0) return;
+		MOV32ItoR(ECX, iRegs[_Rt_].k);// printf("divrtk %x\n", iRegs[_Rt_].k);
+	} else {
+		MOV32MtoR(ECX, (u32)&psxRegs.GPR.r[_Rt_]);
+		CMP32ItoR(ECX, 0);
+		j8Ptr[0] = JE8(0);
+	}
+	if (IsConst(_Rs_)) {
+		MOV32ItoR(EAX, iRegs[_Rs_].k);// printf("divrsk %x\n", iRegs[_Rs_].k);
+	} else {
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+	}
+	CDQ();
+	IDIV32R  (ECX);
+	MOV32RtoM((u32)&psxRegs.GPR.n.lo, EAX);
+	MOV32RtoM((u32)&psxRegs.GPR.n.hi, EDX);
+	if (!IsConst(_Rt_)) {
+		x86SetJ8(j8Ptr[0]);
+	}
+}
+
+static void recDIVU() {
+// Lo/Hi = Rs / Rt (unsigned)
+
+//	iFlushRegs();
+
+	if (IsConst(_Rt_)) {
+		if (iRegs[_Rt_].k == 0) return;
+		MOV32ItoR(ECX, iRegs[_Rt_].k);// printf("divurtk %x\n", iRegs[_Rt_].k);
+	} else {
+		MOV32MtoR(ECX, (u32)&psxRegs.GPR.r[_Rt_]);
+		CMP32ItoR(ECX, 0);
+		j8Ptr[0] = JE8(0);
+	}
+	if (IsConst(_Rs_)) {
+		MOV32ItoR(EAX, iRegs[_Rs_].k);// printf("divursk %x\n", iRegs[_Rs_].k);
+	} else {
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+	}
+	XOR32RtoR(EDX, EDX);
+	DIV32R   (ECX);
+	MOV32RtoM((u32)&psxRegs.GPR.n.lo, EAX);
+	MOV32RtoM((u32)&psxRegs.GPR.n.hi, EDX);
+	if (!IsConst(_Rt_)) {
+		x86SetJ8(j8Ptr[0]);
+	}
+}
+//#endif
+//End of * Register mult/div & Register trap logic  
+
+/*REC_FUNC(LB);
+REC_FUNC(LBU);
+REC_FUNC(LH);
+REC_FUNC(LHU);
+REC_FUNC(LW);
+
+REC_FUNC(SB);
+REC_FUNC(SH);
+REC_FUNC(SW);*/
+
+//REC_FUNC(LWL);
+//REC_FUNC(LWR);
+//REC_FUNC(SWL);
+//REC_FUNC(SWR);
+
+/* Push OfB for Stores/Loads */
+static void iPushOfB() {
+	if (IsConst(_Rs_)) {
+		PUSH32I  (iRegs[_Rs_].k + _Imm_);
+	} else {
+		if (_Imm_) {
+			MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+			ADD32ItoR(EAX, _Imm_);
+			PUSH32R  (EAX);
+		} else {
+			PUSH32M  ((u32)&psxRegs.GPR.r[_Rs_]);
+		}
+	}
+}
+
+//#if 0
+static void recLB() {
+// Rt = mem[Rs + Im] (signed)
+
+//	iFlushRegs();
+
+	if (IsConst(_Rs_)) {
+		u32 addr = iRegs[_Rs_].k + _Imm_;
+		int t = addr >> 16;
+
+		if ((t & 0xfff0) == 0xbfc0) {
+			if (!_Rt_) return;
+			// since bios is readonly it won't change
+			MapConst(_Rt_, psxRs8(addr));
+			return;
+		}
+		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+			if (!_Rt_) return;
+			iRegs[_Rt_].state = ST_UNK;
+
+			MOVSX32M8toR(EAX, (u32)&psxM[addr & 0x1fffff]);
+			MOV32RtoM((u32)&psxRegs.GPR.r[_Rt_], EAX);
+			return;
+		}
+		if (t == 0x1f80 && addr < 0x1f801000) {
+			if (!_Rt_) return;
+			iRegs[_Rt_].state = ST_UNK;
+
+			MOVSX32M8toR(EAX, (u32)&psxH[addr & 0xfff]);
+			MOV32RtoM((u32)&psxRegs.GPR.r[_Rt_], EAX);
+			return;
+		}
+//		SysPrintf("unhandled r8 %x\n", addr);
+	}
+
+	iPushOfB();
+	CALLFunc((u32)psxMemRead8);
+	if (_Rt_) {
+		iRegs[_Rt_].state = ST_UNK;
+		MOVSX32R8toR(EAX, EAX);
+		MOV32RtoM((u32)&psxRegs.GPR.r[_Rt_], EAX);
+	}
+//	ADD32ItoR(ESP, 4);
+	resp+= 4;
+}
+
+static void recLBU() {
+// Rt = mem[Rs + Im] (unsigned)
+
+//	iFlushRegs();
+
+	if (IsConst(_Rs_)) {
+		u32 addr = iRegs[_Rs_].k + _Imm_;
+		int t = addr >> 16;
+
+		if ((t & 0xfff0) == 0xbfc0) {
+			if (!_Rt_) return;
+			// since bios is readonly it won't change
+			MapConst(_Rt_, psxRu8(addr));
+			return;
+		}
+		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+			if (!_Rt_) return;
+			iRegs[_Rt_].state = ST_UNK;
+
+			MOVZX32M8toR(EAX, (u32)&psxM[addr & 0x1fffff]);
+			MOV32RtoM((u32)&psxRegs.GPR.r[_Rt_], EAX);
+			return;
+		}
+		if (t == 0x1f80 && addr < 0x1f801000) {
+			if (!_Rt_) return;
+			iRegs[_Rt_].state = ST_UNK;
+
+			MOVZX32M8toR(EAX, (u32)&psxH[addr & 0xfff]);
+			MOV32RtoM((u32)&psxRegs.GPR.r[_Rt_], EAX);
+			return;
+		}
+//		SysPrintf("unhandled r8u %x\n", addr);
+	}
+
+	iPushOfB();
+	CALLFunc((u32)psxMemRead8);
+	if (_Rt_) {
+		iRegs[_Rt_].state = ST_UNK;
+		MOVZX32R8toR(EAX, EAX);
+		MOV32RtoM((u32)&psxRegs.GPR.r[_Rt_], EAX);
+	}
+//	ADD32ItoR(ESP, 4);
+	resp+= 4;
+}
+
+static void recLH() {
+// Rt = mem[Rs + Im] (signed)
+
+//	iFlushRegs();
+
+	if (IsConst(_Rs_)) {
+		u32 addr = iRegs[_Rs_].k + _Imm_;
+		int t = addr >> 16;
+
+		if ((t & 0xfff0) == 0xbfc0) {
+			if (!_Rt_) return;
+			// since bios is readonly it won't change
+			MapConst(_Rt_, psxRs16(addr));
+			return;
+		}
+		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+			if (!_Rt_) return;
+			iRegs[_Rt_].state = ST_UNK;
+
+			MOVSX32M16toR(EAX, (u32)&psxM[addr & 0x1fffff]);
+			MOV32RtoM((u32)&psxRegs.GPR.r[_Rt_], EAX);
+			return;
+		}
+		if (t == 0x1f80 && addr < 0x1f801000) {
+			if (!_Rt_) return;
+			iRegs[_Rt_].state = ST_UNK;
+
+			MOVSX32M16toR(EAX, (u32)&psxH[addr & 0xfff]);
+			MOV32RtoM((u32)&psxRegs.GPR.r[_Rt_], EAX);
+			return;
+		}
+//		SysPrintf("unhandled r16 %x\n", addr);
+	}
+
+	iPushOfB();
+	CALLFunc((u32)psxMemRead16);
+	if (_Rt_) {
+		iRegs[_Rt_].state = ST_UNK;
+		MOVSX32R16toR(EAX, EAX);
+		MOV32RtoM((u32)&psxRegs.GPR.r[_Rt_], EAX);
+	}
+//	ADD32ItoR(ESP, 4);
+	resp+= 4;
+}
+
+static void recLHU() {
+// Rt = mem[Rs + Im] (unsigned)
+
+//	iFlushRegs();
+
+	if (IsConst(_Rs_)) {
+		u32 addr = iRegs[_Rs_].k + _Imm_;
+		int t = addr >> 16;
+
+		if ((t & 0xfff0) == 0xbfc0) {
+			if (!_Rt_) return;
+			// since bios is readonly it won't change
+			MapConst(_Rt_, psxRu16(addr));
+			return;
+		}
+		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+			if (!_Rt_) return;
+			iRegs[_Rt_].state = ST_UNK;
+
+			MOVZX32M16toR(EAX, (u32)&psxM[addr & 0x1fffff]);
+			MOV32RtoM((u32)&psxRegs.GPR.r[_Rt_], EAX);
+			return;
+		}
+		if (t == 0x1f80 && addr < 0x1f801000) {
+			if (!_Rt_) return;
+			iRegs[_Rt_].state = ST_UNK;
+
+			MOVZX32M16toR(EAX, (u32)&psxH[addr & 0xfff]);
+			MOV32RtoM((u32)&psxRegs.GPR.r[_Rt_], EAX);
+			return;
+		}
+		if (t == 0x1f80) {
+			if (addr >= 0x1f801c00 && addr < 0x1f801e00) {
+				if (!_Rt_) return;
+				iRegs[_Rt_].state = ST_UNK;
+
+				PUSH32I  (addr);
+				CALL32M  ((u32)&SPU_readRegister);
+				MOVZX32R16toR(EAX, EAX);
+				MOV32RtoM((u32)&psxRegs.GPR.r[_Rt_], EAX);
+#ifndef __WIN32__
+				resp+= 4;
+#endif
+				return;
+			}
+			switch (addr) {
+				case 0x1f801100: case 0x1f801110: case 0x1f801120:
+					if (!_Rt_) return;
+					iRegs[_Rt_].state = ST_UNK;
+
+					PUSH32I((addr >> 4) & 0x3);
+					CALLFunc((u32)psxRcntRcount);
+					MOVZX32R16toR(EAX, EAX);
+					MOV32RtoM((u32)&psxRegs.GPR.r[_Rt_], EAX);
+					resp+= 4;
+					return;
+
+				case 0x1f801104: case 0x1f801114: case 0x1f801124:
+					if (!_Rt_) return;
+					iRegs[_Rt_].state = ST_UNK;
+
+                    PUSH32I((addr >> 4) & 0x3);
+                    CALLFunc((u32)psxRcntRmode);
+                    MOVZX32R16toR(EAX, EAX);
+					MOV32RtoM((u32)&psxRegs.GPR.r[_Rt_], EAX);
+                    resp+= 4;
+					return;
+
+				case 0x1f801108: case 0x1f801118: case 0x1f801128:
+					if (!_Rt_) return;
+					iRegs[_Rt_].state = ST_UNK;
+
+                    PUSH32I((addr >> 4) & 0x3);
+                    CALLFunc((u32)psxRcntRtarget);
+                    MOVZX32R16toR(EAX, EAX);
+					MOV32RtoM((u32)&psxRegs.GPR.r[_Rt_], EAX);
+                    resp+= 4;
+					return;
+			}
+		}
+//		SysPrintf("unhandled r16u %x\n", addr);
+	}
+
+	iPushOfB();
+	CALLFunc((u32)psxMemRead16);
+	if (_Rt_) {
+		iRegs[_Rt_].state = ST_UNK;
+		MOVZX32R16toR(EAX, EAX);
+		MOV32RtoM((u32)&psxRegs.GPR.r[_Rt_], EAX);
+	}
+//	ADD32ItoR(ESP, 4);
+	resp+= 4;
+}
+
+static void recLW() {
+// Rt = mem[Rs + Im] (unsigned)
+
+//	iFlushRegs();
+
+	if (IsConst(_Rs_)) {
+		u32 addr = iRegs[_Rs_].k + _Imm_;
+		int t = addr >> 16;
+
+		if ((t & 0xfff0) == 0xbfc0) {
+			if (!_Rt_) return;
+			// since bios is readonly it won't change
+			MapConst(_Rt_, psxRu32(addr));
+			return;
+		}
+		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+			if (!_Rt_) return;
+			iRegs[_Rt_].state = ST_UNK;
+
+			MOV32MtoR(EAX, (u32)&psxM[addr & 0x1fffff]);
+			MOV32RtoM((u32)&psxRegs.GPR.r[_Rt_], EAX);
+			return;
+		}
+		if (t == 0x1f80 && addr < 0x1f801000) {
+			if (!_Rt_) return;
+			iRegs[_Rt_].state = ST_UNK;
+
+			MOV32MtoR(EAX, (u32)&psxH[addr & 0xfff]);
+			MOV32RtoM((u32)&psxRegs.GPR.r[_Rt_], EAX);
+			return;
+		}
+		if (t == 0x1f80) {
+			switch (addr) {
+				case 0x1f801080: case 0x1f801084: case 0x1f801088: 
+				case 0x1f801090: case 0x1f801094: case 0x1f801098: 
+				case 0x1f8010a0: case 0x1f8010a4: case 0x1f8010a8: 
+				case 0x1f8010b0: case 0x1f8010b4: case 0x1f8010b8: 
+				case 0x1f8010c0: case 0x1f8010c4: case 0x1f8010c8: 
+				case 0x1f8010d0: case 0x1f8010d4: case 0x1f8010d8: 
+				case 0x1f8010e0: case 0x1f8010e4: case 0x1f8010e8: 
+				case 0x1f801070: case 0x1f801074:
+				case 0x1f8010f0: case 0x1f8010f4:
+					if (!_Rt_) return;
+					iRegs[_Rt_].state = ST_UNK;
+
+					MOV32MtoR(EAX, (u32)&psxH[addr & 0xffff]);
+					MOV32RtoM((u32)&psxRegs.GPR.r[_Rt_], EAX);
+					return;
+
+				case 0x1f801810:
+					if (!_Rt_) return;
+					iRegs[_Rt_].state = ST_UNK;
+
+					CALL32M((u32)&GPU_readData);
+					MOV32RtoM((u32)&psxRegs.GPR.r[_Rt_], EAX);
+					return;
+
+				case 0x1f801814:
+					if (!_Rt_) return;
+					iRegs[_Rt_].state = ST_UNK;
+
+					CALL32M((u32)&GPU_readStatus);
+					MOV32RtoM((u32)&psxRegs.GPR.r[_Rt_], EAX);
+					return;
+			}
+		}
+//		SysPrintf("unhandled r32 %x\n", addr);
+	}
+
+	iPushOfB();
+	CALLFunc((u32)psxMemRead32);
+	if (_Rt_) {
+		iRegs[_Rt_].state = ST_UNK;
+		MOV32RtoM((u32)&psxRegs.GPR.r[_Rt_], EAX);
+	}
+//	ADD32ItoR(ESP, 4);
+	resp+= 4;
+}
+
+extern u32 LWL_MASK[4];
+extern u32 LWL_SHIFT[4];
+
+void iLWLk(u32 shift) {
+	if (IsConst(_Rt_)) {
+		MOV32ItoR(ECX, iRegs[_Rt_].k);
+	} else {
+		MOV32MtoR(ECX, (u32)&psxRegs.GPR.r[_Rt_]);
+	}
+	AND32ItoR(ECX, LWL_MASK[shift]);
+	SHL32ItoR(EAX, LWL_SHIFT[shift]);
+	OR32RtoR (EAX, ECX);
+}
+
+void recLWL() {
+// Rt = Rt Merge mem[Rs + Im]
+
+	if (IsConst(_Rs_)) {
+		u32 addr = iRegs[_Rs_].k + _Imm_;
+		int t = addr >> 16;
+
+		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+			MOV32MtoR(EAX, (u32)&psxM[addr & 0x1ffffc]);
+			iLWLk(addr & 3);
+
+			iRegs[_Rt_].state = ST_UNK;
+			MOV32RtoM((u32)&psxRegs.GPR.r[_Rt_], EAX);
+			return;
+		}
+		if (t == 0x1f80 && addr < 0x1f801000) {
+			MOV32MtoR(EAX, (u32)&psxH[addr & 0xffc]);
+			iLWLk(addr & 3);
+
+			iRegs[_Rt_].state = ST_UNK;
+			MOV32RtoM((u32)&psxRegs.GPR.r[_Rt_], EAX);
+			return;
+		}
+	}
+
+	if (IsConst(_Rs_)) MOV32ItoR(EAX, iRegs[_Rs_].k + _Imm_);
+	else {
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+		if (_Imm_) ADD32ItoR(EAX, _Imm_);
+	}
+	PUSH32R  (EAX);
+	AND32ItoR(EAX, ~3);
+	PUSH32R  (EAX);
+	CALLFunc((u32)psxMemRead32);
+
+	if (_Rt_) {
+		ADD32ItoR(ESP, 4);
+		POP32R   (EDX);
+		AND32ItoR(EDX, 0x3); // shift = addr & 3;
+
+		MOV32ItoR(ECX, (u32)LWL_SHIFT);
+		MOV32RmStoR(ECX, ECX, EDX, 2);
+		SHL32CLtoR(EAX); // mem(EAX) << LWL_SHIFT[shift]
+
+		MOV32ItoR(ECX, (u32)LWL_MASK);
+		MOV32RmStoR(ECX, ECX, EDX, 2);
+		if (IsConst(_Rt_)) {
+			MOV32ItoR(EDX, iRegs[_Rt_].k);
+		} else {
+			MOV32MtoR(EDX, (u32)&psxRegs.GPR.r[_Rt_]);
+		}
+		AND32RtoR(EDX, ECX); // _rRt_ & LWL_MASK[shift]
+
+		OR32RtoR(EAX, EDX);
+
+		iRegs[_Rt_].state = ST_UNK;
+		MOV32RtoM((u32)&psxRegs.GPR.r[_Rt_], EAX);
+	} else {
+//		ADD32ItoR(ESP, 8);
+		resp+= 8;
+	}
+}
+
+static void recLWBlock(int count) {
+	u32 *code = (u32 *)PSXM(pc);
+	int i, respsave;
+// Rt = mem[Rs + Im] (unsigned)
+
+//	iFlushRegs();
+
+	if (IsConst(_Rs_)) {
+		u32 addr = iRegs[_Rs_].k + _Imm_;
+		int t = addr >> 16;
+
+		if ((t & 0xfff0) == 0xbfc0) {
+			// since bios is readonly it won't change
+			for (i = 0; i < count; i++, code++, addr += 4) {
+				if (_fRt_(*code)) {
+					MapConst(_fRt_(*code), psxRu32(addr));
+				}
+			}
+			return;
+		}
+		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+			for (i = 0; i < count; i++, code++, addr += 4) {
+				if (!_fRt_(*code))
+					return;
+				iRegs[_fRt_(*code)].state = ST_UNK;
+
+				MOV32MtoR(EAX, (u32)&psxM[addr & 0x1fffff]);
+				MOV32RtoM((u32)&psxRegs.GPR.r[_fRt_(*code)], EAX);
+			}
+			return;
+		}
+		if (t == 0x1f80 && addr < 0x1f801000) {
+			for (i = 0; i < count; i++, code++, addr += 4) {
+				if (!_fRt_(*code))
+					return;
+				iRegs[_fRt_(*code)].state = ST_UNK;
+
+				MOV32MtoR(EAX, (u32)&psxH[addr & 0xfff]);
+				MOV32RtoM((u32)&psxRegs.GPR.r[_fRt_(*code)], EAX);
+			}
+			return;
+		}
+	}
+
+	SysPrintf("recLWBlock %d: %d\n", count, IsConst(_Rs_));
+	iPushOfB();
+	CALLFunc((u32)psxMemPointer);
+//	ADD32ItoR(ESP, 4);
+	resp += 4;
+
+	respsave = resp; resp = 0;
+	TEST32RtoR(EAX, EAX);
+	j32Ptr[4] = JZ32(0);
+	XOR32RtoR(ECX, ECX);
+	for (i = 0; i < count; i++, code++) {
+		if (_fRt_(*code)) {
+			iRegs[_fRt_(*code)].state = ST_UNK;
+
+			MOV32RmStoR(EDX, EAX, ECX, 2);
+			MOV32RtoM((u32)&psxRegs.GPR.r[_fRt_(*code)], EDX);
+		}
+		if (i != (count - 1))
+			INC32R(ECX);
+	}
+	j32Ptr[5] = JMP32(0);
+	x86SetJ32(j32Ptr[4]);
+	for (i = 0, code = (u32 *)PSXM(pc); i < count; i++, code++) {
+		psxRegs.code = *code;
+		recLW();
+	}
+	ADD32ItoR(ESP, resp);
+	x86SetJ32(j32Ptr[5]);
+	resp = respsave;
+}
+
+extern u32 LWR_MASK[4];
+extern u32 LWR_SHIFT[4];
+
+void iLWRk(u32 shift) {
+	if (IsConst(_Rt_)) {
+		MOV32ItoR(ECX, iRegs[_Rt_].k);
+	} else {
+		MOV32MtoR(ECX, (u32)&psxRegs.GPR.r[_Rt_]);
+	}
+	AND32ItoR(ECX, LWR_MASK[shift]);
+	SHR32ItoR(EAX, LWR_SHIFT[shift]);
+	OR32RtoR(EAX, ECX);
+}
+
+void recLWR() {
+// Rt = Rt Merge mem[Rs + Im]
+
+	if (IsConst(_Rs_)) {
+		u32 addr = iRegs[_Rs_].k + _Imm_;
+		int t = addr >> 16;
+
+		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+			MOV32MtoR(EAX, (u32)&psxM[addr & 0x1ffffc]);
+			iLWRk(addr & 3);
+
+			iRegs[_Rt_].state = ST_UNK;
+			MOV32RtoM((u32)&psxRegs.GPR.r[_Rt_], EAX);
+			return;
+		}
+		if (t == 0x1f80 && addr < 0x1f801000) {
+			MOV32MtoR(EAX, (u32)&psxH[addr & 0xffc]);
+			iLWRk(addr & 3);
+
+			iRegs[_Rt_].state = ST_UNK;
+			MOV32RtoM((u32)&psxRegs.GPR.r[_Rt_], EAX);
+			return;
+		}
+	}
+
+	if (IsConst(_Rs_))
+		MOV32ItoR(EAX, iRegs[_Rs_].k + _Imm_);
+	else {
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+		if (_Imm_) ADD32ItoR(EAX, _Imm_);
+	}
+	PUSH32R  (EAX);
+	AND32ItoR(EAX, ~3);
+	PUSH32R  (EAX);
+	CALLFunc((u32)psxMemRead32);
+
+	if (_Rt_) {
+		ADD32ItoR(ESP, 4);
+		POP32R   (EDX);
+		AND32ItoR(EDX, 0x3); // shift = addr & 3;
+
+		MOV32ItoR(ECX, (u32)LWR_SHIFT);
+		MOV32RmStoR(ECX, ECX, EDX, 2);
+		SHR32CLtoR(EAX); // mem(EAX) >> LWR_SHIFT[shift]
+
+		MOV32ItoR(ECX, (u32)LWR_MASK);
+		MOV32RmStoR(ECX, ECX, EDX, 2);
+
+		if (IsConst(_Rt_)) {
+			MOV32ItoR(EDX, iRegs[_Rt_].k);
+		} else {
+			MOV32MtoR(EDX, (u32)&psxRegs.GPR.r[_Rt_]);
+		}
+		AND32RtoR(EDX, ECX); // _rRt_ & LWR_MASK[shift]
+
+		OR32RtoR(EAX, EDX);
+
+		iRegs[_Rt_].state = ST_UNK;
+		MOV32RtoM((u32)&psxRegs.GPR.r[_Rt_], EAX);
+	} else {
+//		ADD32ItoR(ESP, 8);
+		resp+= 8;
+	}
+}
+
+static void recSB() {
+// mem[Rs + Im] = Rt
+
+//	iFlushRegs();
+
+	if (IsConst(_Rs_)) {
+		u32 addr = iRegs[_Rs_].k + _Imm_;
+		int t = addr >> 16;
+
+		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+			if (IsConst(_Rt_)) {
+				MOV8ItoM((u32)&psxM[addr & 0x1fffff], (u8)iRegs[_Rt_].k);
+			} else {
+				MOV8MtoR(EAX, (u32)&psxRegs.GPR.r[_Rt_]);
+				MOV8RtoM((u32)&psxM[addr & 0x1fffff], EAX);
+			}
+			return;
+		}
+		if (t == 0x1f80 && addr < 0x1f801000) {
+			if (IsConst(_Rt_)) {
+				MOV8ItoM((u32)&psxH[addr & 0xfff], (u8)iRegs[_Rt_].k);
+			} else {
+				MOV8MtoR(EAX, (u32)&psxRegs.GPR.r[_Rt_]);
+				MOV8RtoM((u32)&psxH[addr & 0xfff], EAX);
+			}
+			return;
+		}
+//		SysPrintf("unhandled w8 %x\n", addr);
+	}
+
+	if (IsConst(_Rt_)) {
+		PUSH32I  (iRegs[_Rt_].k);
+	} else {
+		PUSH32M  ((u32)&psxRegs.GPR.r[_Rt_]);
+	}
+	iPushOfB();
+	CALLFunc((u32)psxMemWrite8);
+//	ADD32ItoR(ESP, 8);
+	resp+= 8;
+}
+
+static void recSH() {
+// mem[Rs + Im] = Rt
+
+//	iFlushRegs();
+
+	if (IsConst(_Rs_)) {
+		u32 addr = iRegs[_Rs_].k + _Imm_;
+		int t = addr >> 16;
+
+		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+			if (IsConst(_Rt_)) {
+				MOV16ItoM((u32)&psxM[addr & 0x1fffff], (u16)iRegs[_Rt_].k);
+			} else {
+				MOV16MtoR(EAX, (u32)&psxRegs.GPR.r[_Rt_]);
+				MOV16RtoM((u32)&psxM[addr & 0x1fffff], EAX);
+			}
+			return;
+		}
+		if (t == 0x1f80 && addr < 0x1f801000) {
+			if (IsConst(_Rt_)) {
+				MOV16ItoM((u32)&psxH[addr & 0xfff], (u16)iRegs[_Rt_].k);
+			} else {
+				MOV16MtoR(EAX, (u32)&psxRegs.GPR.r[_Rt_]);
+				MOV16RtoM((u32)&psxH[addr & 0xfff], EAX);
+			}
+			return;
+		}
+		if (t == 0x1f80) {
+			if (addr >= 0x1f801c00 && addr < 0x1f801e00) {
+				if (IsConst(_Rt_)) {
+					PUSH32I(iRegs[_Rt_].k);
+				} else {
+					PUSH32M((u32)&psxRegs.GPR.r[_Rt_]);
+				}
+				PUSH32I  (addr);
+				CALL32M  ((u32)&SPU_writeRegister);
+#ifndef __WIN32__
+				resp+= 8;
+#endif
+				return;
+			}
+		}
+//		SysPrintf("unhandled w16 %x\n", addr);
+	}
+
+	if (IsConst(_Rt_)) {
+		PUSH32I  (iRegs[_Rt_].k);
+	} else {
+		PUSH32M  ((u32)&psxRegs.GPR.r[_Rt_]);
+	}
+	iPushOfB();
+	CALLFunc((u32)psxMemWrite16);
+//	ADD32ItoR(ESP, 8);
+	resp+= 8;
+}
+
+static void recSW() {
+// mem[Rs + Im] = Rt
+
+//	iFlushRegs();
+
+	if (IsConst(_Rs_)) {
+		u32 addr = iRegs[_Rs_].k + _Imm_;
+		int t = addr >> 16;
+
+		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+			if (IsConst(_Rt_)) {
+				MOV32ItoM((u32)&psxM[addr & 0x1fffff], iRegs[_Rt_].k);
+			} else {
+				MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rt_]);
+				MOV32RtoM((u32)&psxM[addr & 0x1fffff], EAX);
+			}
+			return;
+		}
+		if (t == 0x1f80 && addr < 0x1f801000) {
+			if (IsConst(_Rt_)) {
+				MOV32ItoM((u32)&psxH[addr & 0xfff], iRegs[_Rt_].k);
+			} else {
+				MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rt_]);
+				MOV32RtoM((u32)&psxH[addr & 0xfff], EAX);
+			}
+			return;
+		}
+		if (t == 0x1f80) {
+			switch (addr) {
+				case 0x1f801080: case 0x1f801084: 
+				case 0x1f801090: case 0x1f801094: 
+				case 0x1f8010a0: case 0x1f8010a4: 
+				case 0x1f8010b0: case 0x1f8010b4: 
+				case 0x1f8010c0: case 0x1f8010c4: 
+				case 0x1f8010d0: case 0x1f8010d4: 
+				case 0x1f8010e0: case 0x1f8010e4: 
+				case 0x1f801074:
+				case 0x1f8010f0:
+					if (IsConst(_Rt_)) {
+						MOV32ItoM((u32)&psxH[addr & 0xffff], iRegs[_Rt_].k);
+					} else {
+						MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rt_]);
+						MOV32RtoM((u32)&psxH[addr & 0xffff], EAX);
+					}
+					return;
+
+				case 0x1f801810:
+					if (IsConst(_Rt_)) {
+						PUSH32I(iRegs[_Rt_].k);
+					} else {
+						PUSH32M((u32)&psxRegs.GPR.r[_Rt_]);
+					}
+					CALL32M((u32)&GPU_writeData);
+#ifndef __WIN32__
+					resp+= 4;
+#endif
+					return;
+
+				case 0x1f801814:
+					if (IsConst(_Rt_)) {
+						PUSH32I(iRegs[_Rt_].k);
+					} else {
+						PUSH32M((u32)&psxRegs.GPR.r[_Rt_]);
+					}
+					CALL32M((u32)&GPU_writeStatus);
+#ifndef __WIN32__
+					resp+= 4;
+#endif
+			}
+		}
+//		SysPrintf("unhandled w32 %x\n", addr);
+	}
+
+	if (IsConst(_Rt_)) {
+		PUSH32I  (iRegs[_Rt_].k);
+	} else {
+		PUSH32M  ((u32)&psxRegs.GPR.r[_Rt_]);
+	}
+	iPushOfB();
+	CALLFunc((u32)psxMemWrite32);
+//	ADD32ItoR(ESP, 8);
+	resp+= 8;
+}
+//#endif
+
+static void recSWBlock(int count) {
+	u32 *code;
+	int i, respsave;
+// mem[Rs + Im] = Rt
+
+//	iFlushRegs();
+
+	if (IsConst(_Rs_)) {
+		u32 addr = iRegs[_Rs_].k + _Imm_;
+		int t = addr >> 16;
+		code = (u32 *)PSXM(pc);
+
+		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+			for (i = 0; i < count; i++, code++, addr += 4) {
+				if (IsConst(_fRt_(*code))) {
+					MOV32ItoM((u32)&psxM[addr & 0x1fffff], iRegs[_fRt_(*code)].k);
+				} else {
+					MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_fRt_(*code)]);
+					MOV32RtoM((u32)&psxM[addr & 0x1fffff], EAX);
+				}
+			}
+			return;
+		}
+		if (t == 0x1f80 && addr < 0x1f801000) {
+			for (i = 0; i < count; i++, code++, addr += 4) {
+				if (!_fRt_(*code))
+					return;
+				iRegs[_fRt_(*code)].state = ST_UNK;
+
+				MOV32MtoR(EAX, (u32)&psxH[addr & 0xfff]);
+				MOV32RtoM((u32)&psxRegs.GPR.r[_fRt_(*code)], EAX);
+			}
+			return;
+		}
+	}
+
+	SysPrintf("recSWBlock %d: %d\n", count, IsConst(_Rs_));
+	iPushOfB();
+	CALLFunc((u32)psxMemPointer);
+//	ADD32ItoR(ESP, 4);
+	resp += 4;
+
+	respsave = resp;
+	resp = 0;
+	TEST32RtoR(EAX, EAX);
+	j32Ptr[4] = JZ32(0);
+	XOR32RtoR(ECX, ECX);
+	for (i = 0, code = (u32 *)PSXM(pc); i < count; i++, code++) {
+		if (IsConst(_fRt_(*code))) {
+			MOV32ItoR(EDX, iRegs[_fRt_(*code)].k);
+		} else {
+			MOV32MtoR(EDX, (u32)&psxRegs.GPR.r[_fRt_(*code)]);
+		}
+		MOV32RtoRmS(EAX, ECX, 2, EDX);
+		if (i != (count - 1))
+			INC32R(ECX);
+	}
+	j32Ptr[5] = JMP32(0);
+	x86SetJ32(j32Ptr[4]);
+	for (i = 0, code = (u32 *)PSXM(pc); i < count; i++, code++) {
+		psxRegs.code = *code;
+		recSW();
+	}
+	ADD32ItoR(ESP, resp);
+	x86SetJ32(j32Ptr[5]);
+	resp = respsave;
+}
+
+extern u32 SWL_MASK[4];
+extern u32 SWL_SHIFT[4];
+
+void iSWLk(u32 shift) {
+	if (IsConst(_Rt_)) {
+		MOV32ItoR(ECX, iRegs[_Rt_].k);
+	} else {
+		MOV32MtoR(ECX, (u32)&psxRegs.GPR.r[_Rt_]);
+	}
+	SHR32ItoR(ECX, SWL_SHIFT[shift]);
+	AND32ItoR(EAX, SWL_MASK[shift]);
+	OR32RtoR (EAX, ECX);
+}
+
+void recSWL() {
+// mem[Rs + Im] = Rt Merge mem[Rs + Im]
+
+	if (IsConst(_Rs_)) {
+		u32 addr = iRegs[_Rs_].k + _Imm_;
+		int t = addr >> 16;
+
+		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+			MOV32MtoR(EAX, (u32)&psxM[addr & 0x1ffffc]);
+			iSWLk(addr & 3);
+			MOV32RtoM((u32)&psxM[addr & 0x1ffffc], EAX);
+			return;
+		}
+		if (t == 0x1f80 && addr < 0x1f801000) {
+			MOV32MtoR(EAX, (u32)&psxH[addr & 0xffc]);
+			iSWLk(addr & 3);
+			MOV32RtoM((u32)&psxH[addr & 0xffc], EAX);
+			return;
+		}
+	}
+
+	if (IsConst(_Rs_)) {
+		MOV32ItoR(EAX, iRegs[_Rs_].k + _Imm_);
+	} else {
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+		if (_Imm_) ADD32ItoR(EAX, _Imm_);
+	}
+	PUSH32R  (EAX);
+	AND32ItoR(EAX, ~3);
+	PUSH32R  (EAX);
+
+	CALLFunc((u32)psxMemRead32);
+
+	ADD32ItoR(ESP, 4);
+	POP32R   (EDX);
+	AND32ItoR(EDX, 0x3); // shift = addr & 3;
+
+	MOV32ItoR(ECX, (u32)SWL_MASK);
+	MOV32RmStoR(ECX, ECX, EDX, 2);
+	AND32RtoR(EAX, ECX); // mem & SWL_MASK[shift]
+
+	MOV32ItoR(ECX, (u32)SWL_SHIFT);
+	MOV32RmStoR(ECX, ECX, EDX, 2);
+	if (IsConst(_Rt_)) {
+		MOV32ItoR(EDX, iRegs[_Rt_].k);
+	} else {
+		MOV32MtoR(EDX, (u32)&psxRegs.GPR.r[_Rt_]);
+	}
+	SHR32CLtoR(EDX); // _rRt_ >> SWL_SHIFT[shift]
+
+	OR32RtoR (EAX, EDX);
+	PUSH32R  (EAX);
+
+	if (IsConst(_Rs_)) MOV32ItoR(EAX, iRegs[_Rs_].k + _Imm_);
+	else {
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+		if (_Imm_) ADD32ItoR(EAX, _Imm_);
+	}
+	AND32ItoR(EAX, ~3);
+	PUSH32R  (EAX);
+
+	CALLFunc((u32)psxMemWrite32);
+//	ADD32ItoR(ESP, 8);
+	resp+= 8;
+}
+
+extern u32 SWR_MASK[4];
+extern u32 SWR_SHIFT[4];
+
+void iSWRk(u32 shift) {
+	if (IsConst(_Rt_)) {
+		MOV32ItoR(ECX, iRegs[_Rt_].k);
+	} else {
+		MOV32MtoR(ECX, (u32)&psxRegs.GPR.r[_Rt_]);
+	}
+	SHL32ItoR(ECX, SWR_SHIFT[shift]);
+	AND32ItoR(EAX, SWR_MASK[shift]);
+	OR32RtoR (EAX, ECX);
+}
+
+void recSWR() {
+// mem[Rs + Im] = Rt Merge mem[Rs + Im]
+
+	if (IsConst(_Rs_)) {
+		u32 addr = iRegs[_Rs_].k + _Imm_;
+		int t = addr >> 16;
+
+		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+			MOV32MtoR(EAX, (u32)&psxM[addr & 0x1ffffc]);
+			iSWRk(addr & 3);
+			MOV32RtoM((u32)&psxM[addr & 0x1ffffc], EAX);
+			return;
+		}
+		if (t == 0x1f80 && addr < 0x1f801000) {
+			MOV32MtoR(EAX, (u32)&psxH[addr & 0xffc]);
+			iSWRk(addr & 3);
+			MOV32RtoM((u32)&psxH[addr & 0xffc], EAX);
+			return;
+		}
+	}
+
+	if (IsConst(_Rs_)) {
+		MOV32ItoR(EAX, iRegs[_Rs_].k + _Imm_);
+	} else {
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+		if (_Imm_) ADD32ItoR(EAX, _Imm_);
+	}
+	PUSH32R  (EAX);
+	AND32ItoR(EAX, ~3);
+	PUSH32R  (EAX);
+
+	CALLFunc((u32)psxMemRead32);
+
+	ADD32ItoR(ESP, 4);
+	POP32R   (EDX);
+	AND32ItoR(EDX, 0x3); // shift = addr & 3;
+
+	MOV32ItoR(ECX, (u32)SWR_MASK);
+	MOV32RmStoR(ECX, ECX, EDX, 2);
+	AND32RtoR(EAX, ECX); // mem & SWR_MASK[shift]
+
+	MOV32ItoR(ECX, (u32)SWR_SHIFT);
+	MOV32RmStoR(ECX, ECX, EDX, 2);
+	if (IsConst(_Rt_)) {
+		MOV32ItoR(EDX, iRegs[_Rt_].k);
+	} else {
+		MOV32MtoR(EDX, (u32)&psxRegs.GPR.r[_Rt_]);
+	}
+	SHL32CLtoR(EDX); // _rRt_ << SWR_SHIFT[shift]
+
+	OR32RtoR (EAX, EDX);
+	PUSH32R  (EAX);
+
+	if (IsConst(_Rs_)) MOV32ItoR(EAX, iRegs[_Rs_].k + _Imm_);
+	else {
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+		if (_Imm_) ADD32ItoR(EAX, _Imm_);
+	}
+	AND32ItoR(EAX, ~3);
+	PUSH32R  (EAX);
+
+	CALLFunc((u32)psxMemWrite32);
+//	ADD32ItoR(ESP, 8);
+	resp += 8;
+}
+
+/*REC_FUNC(SLL);
+REC_FUNC(SRL);
+REC_FUNC(SRA);
+#if 0*/
+static void recSLL() {
+// Rd = Rt << Sa
+	if (!_Rd_)
+		return;
+
+//	iFlushRegs();
+
+	if (IsConst(_Rt_)) {
+		MapConst(_Rd_, iRegs[_Rt_].k << _Sa_);
+	} else {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rt_]);
+		if (_Sa_) SHL32ItoR(EAX, _Sa_);
+		MOV32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+	}
+}
+
+static void recSRL() {
+// Rd = Rt >> Sa
+	if (!_Rd_)
+		return;
+
+//	iFlushRegs();
+
+	if (IsConst(_Rt_)) {
+		MapConst(_Rd_, iRegs[_Rt_].k >> _Sa_);
+	} else {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rt_]);
+		if (_Sa_) SHR32ItoR(EAX, _Sa_);
+		MOV32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+	}
+}
+
+static void recSRA() {
+// Rd = Rt >> Sa
+	if (!_Rd_)
+		return;
+
+//	iFlushRegs();
+
+	if (IsConst(_Rt_)) {
+		MapConst(_Rd_, (s32)iRegs[_Rt_].k >> _Sa_);
+	} else {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rt_]);
+		if (_Sa_) SAR32ItoR(EAX, _Sa_);
+		MOV32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+	}
+}
+//#endif
+
+/*REC_FUNC(SLLV);
+REC_FUNC(SRLV);
+REC_FUNC(SRAV);
+#if 0*/
+static void recSLLV() {
+// Rd = Rt << Rs
+	if (!_Rd_)
+		return;
+
+//	iFlushRegs();
+
+	if (IsConst(_Rt_) && IsConst(_Rs_)) {
+		MapConst(_Rd_, iRegs[_Rt_].k << iRegs[_Rs_].k);
+	} else if (IsConst(_Rs_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rt_]);
+		MOV32ItoR(ECX, iRegs[_Rs_].k);
+		SHL32CLtoR(EAX);
+		MOV32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+	} else if (IsConst(_Rt_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32ItoR(EAX, iRegs[_Rt_].k);
+		MOV32MtoR(ECX, (u32)&psxRegs.GPR.r[_Rs_]);
+		SHL32CLtoR(EAX);
+		MOV32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+	} else {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rt_]);
+		MOV32MtoR(ECX, (u32)&psxRegs.GPR.r[_Rs_]);
+		SHL32CLtoR(EAX);
+		MOV32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+	}
+}
+
+static void recSRLV() {
+// Rd = Rt >> Rs
+	if (!_Rd_) return;
+
+//	iFlushRegs();
+
+	if (IsConst(_Rt_) && IsConst(_Rs_)) {
+		MapConst(_Rd_, iRegs[_Rt_].k >> iRegs[_Rs_].k);
+	} else if (IsConst(_Rs_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rt_]);
+		MOV32ItoR(ECX, iRegs[_Rs_].k);
+		SHR32CLtoR(EAX);
+		MOV32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+	} else if (IsConst(_Rt_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32ItoR(EAX, iRegs[_Rt_].k);
+		MOV32MtoR(ECX, (u32)&psxRegs.GPR.r[_Rs_]);
+		SHR32CLtoR(EAX);
+		MOV32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+	} else {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rt_]);
+		MOV32MtoR(ECX, (u32)&psxRegs.GPR.r[_Rs_]);
+		SHR32CLtoR(EAX);
+		MOV32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+	}
+}
+
+static void recSRAV() {
+// Rd = Rt >> Rs
+	if (!_Rd_)
+		return;
+
+//	iFlushRegs();
+
+	if (IsConst(_Rt_) && IsConst(_Rs_)) {
+		MapConst(_Rd_, (s32)iRegs[_Rt_].k >> iRegs[_Rs_].k);
+	} else if (IsConst(_Rs_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rt_]);
+		MOV32ItoR(ECX, iRegs[_Rs_].k);
+		SAR32CLtoR(EAX);
+		MOV32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+	} else if (IsConst(_Rt_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32ItoR(EAX, iRegs[_Rt_].k);
+		MOV32MtoR(ECX, (u32)&psxRegs.GPR.r[_Rs_]);
+		SAR32CLtoR(EAX);
+		MOV32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+	} else {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rt_]);
+		MOV32MtoR(ECX, (u32)&psxRegs.GPR.r[_Rs_]);
+		SAR32CLtoR(EAX);
+		MOV32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+	}
+}
+//#endif
+
+/*REC_SYS(SYSCALL);
+REC_SYS(BREAK);
+
+#if 0*/
+int dump;
+static void recSYSCALL() {
+//	dump = 1;
+	iFlushRegs();
+
+	MOV32ItoR(EAX, pc - 4);
+	MOV32RtoM((u32)&psxRegs.pc, EAX);
+	PUSH32I  (branch == 1 ? 1 : 0);
+	PUSH32I  (0x20);
+	CALLFunc ((u32)psxException);
+	ADD32ItoR(ESP, 8);
+
+	branch = 2;
+	iRet();
+}
+
+static void recBREAK() {
+}
+//#endif
+
+/*REC_FUNC(MFHI);
+REC_FUNC(MTHI);
+REC_FUNC(MFLO);
+REC_FUNC(MTLO);
+#if 0*/
+static void recMFHI() {
+// Rd = Hi
+	if (!_Rd_)
+		return;
+
+	iRegs[_Rd_].state = ST_UNK;
+	MOV32MtoR(EAX, (u32)&psxRegs.GPR.n.hi);
+	MOV32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+}
+
+static void recMTHI() {
+// Hi = Rs
+
+	if (IsConst(_Rs_)) {
+		MOV32ItoM((u32)&psxRegs.GPR.n.hi, iRegs[_Rs_].k);
+	} else {
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+		MOV32RtoM((u32)&psxRegs.GPR.n.hi, EAX);
+	}
+}
+
+static void recMFLO() {
+// Rd = Lo
+	if (!_Rd_)
+		return;
+
+	iRegs[_Rd_].state = ST_UNK;
+	MOV32MtoR(EAX, (u32)&psxRegs.GPR.n.lo);
+	MOV32RtoM((u32)&psxRegs.GPR.r[_Rd_], EAX);
+}
+
+static void recMTLO() {
+// Lo = Rs
+
+	if (IsConst(_Rs_)) {
+		MOV32ItoM((u32)&psxRegs.GPR.n.lo, iRegs[_Rs_].k);
+	} else {
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+		MOV32RtoM((u32)&psxRegs.GPR.n.lo, EAX);
+	}
+}
+//#endif
+
+/*REC_BRANCH(J);
+REC_BRANCH(JR);
+REC_BRANCH(JAL);
+REC_BRANCH(JALR);
+REC_BRANCH(BLTZ);
+REC_BRANCH(BGTZ);
+REC_BRANCH(BLTZAL);
+REC_BRANCH(BGEZAL);
+REC_BRANCH(BNE);
+REC_BRANCH(BEQ);
+REC_BRANCH(BLEZ);
+REC_BRANCH(BGEZ);*/
+
+//#if 0
+static void recBLTZ() {
+// Branch if Rs < 0
+	u32 bpc = _Imm_ * 4 + pc;
+
+//	iFlushRegs();
+
+	if (bpc == pc+4 && psxTestLoadDelay(_Rs_, PSXMu32(bpc)) == 0) {
+		return;
+	}
+
+	if (IsConst(_Rs_)) {
+		if ((s32)iRegs[_Rs_].k < 0) {
+			iJump(bpc);
+			return;
+		} else {
+			iJump(pc + 4);
+			return;
+		}
+	}
+
+	CMP32ItoM((u32)&psxRegs.GPR.r[_Rs_], 0);
+	j32Ptr[4] = JL32(0);
+
+	iBranch(pc+4, 1);
+
+	x86SetJ32(j32Ptr[4]);
+
+	iBranch(bpc, 0);
+	pc += 4;
+}
+
+static void recBGTZ() {
+// Branch if Rs > 0
+	u32 bpc = _Imm_ * 4 + pc;
+
+//	iFlushRegs();
+	if (bpc == pc + 4 && psxTestLoadDelay(_Rs_, PSXMu32(bpc)) == 0) {
+		return;
+	}
+
+	if (IsConst(_Rs_)) {
+		if ((s32)iRegs[_Rs_].k > 0) {
+			iJump(bpc);
+			return;
+		} else {
+			iJump(pc + 4);
+			return;
+		}
+	}
+
+	CMP32ItoM((u32)&psxRegs.GPR.r[_Rs_], 0);
+	j32Ptr[4] = JG32(0);
+
+	iBranch(pc + 4, 1);
+
+	x86SetJ32(j32Ptr[4]);
+
+	iBranch(bpc, 0);
+	pc+=4;
+}
+
+static void recBLTZAL() {
+// Branch if Rs < 0
+	u32 bpc = _Imm_ * 4 + pc;
+
+//	iFlushRegs();
+	if (bpc == pc + 4 && psxTestLoadDelay(_Rs_, PSXMu32(bpc)) == 0) {
+		return;
+	}
+
+	if (IsConst(_Rs_)) {
+		if ((s32)iRegs[_Rs_].k < 0) {
+			MOV32ItoM((u32)&psxRegs.GPR.r[31], pc + 4);
+			iJump(bpc); return;
+		} else {
+			iJump(pc + 4); return;
+		}
+	}
+
+	CMP32ItoM((u32)&psxRegs.GPR.r[_Rs_], 0);
+	j32Ptr[4] = JL32(0);
+
+	iBranch(pc + 4, 1);
+
+	x86SetJ32(j32Ptr[4]);
+
+	MOV32ItoM((u32)&psxRegs.GPR.r[31], pc + 4);
+	iBranch(bpc, 0);
+	pc += 4;
+}
+
+static void recBGEZAL() {
+// Branch if Rs >= 0
+	u32 bpc = _Imm_ * 4 + pc;
+
+//	iFlushRegs();
+	if (bpc == pc + 4 && psxTestLoadDelay(_Rs_, PSXMu32(bpc)) == 0) {
+		return;
+	}
+
+	if (IsConst(_Rs_)) {
+		if ((s32)iRegs[_Rs_].k >= 0) {
+			MOV32ItoM((u32)&psxRegs.GPR.r[31], pc + 4);
+			iJump(bpc); return;
+		} else {
+			iJump(pc+4); return;
+		}
+	}
+
+	CMP32ItoM((u32)&psxRegs.GPR.r[_Rs_], 0);
+	j32Ptr[4] = JGE32(0);
+
+	iBranch(pc+4, 1);
+
+	x86SetJ32(j32Ptr[4]);
+
+	MOV32ItoM((u32)&psxRegs.GPR.r[31], pc + 4);
+	iBranch(bpc, 0);
+	pc+=4;
+}
+
+static void recJ() {
+// j target
+
+	iJump(_Target_ * 4 + (pc & 0xf0000000));
+}
+
+static void recJAL() {
+// jal target
+
+	MapConst(31, pc + 4);
+
+	iJump(_Target_ * 4 + (pc & 0xf0000000));
+}
+
+static void recJR() {
+// jr Rs
+
+	if (IsConst(_Rs_)) {
+		MOV32ItoM((u32)&target, iRegs[_Rs_].k);
+	} else {
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+		MOV32RtoM((u32)&target, EAX);
+	}
+
+	SetBranch();
+}
+
+static void recJALR() {
+// jalr Rs
+
+	if (IsConst(_Rs_)) {
+		MOV32ItoM((u32)&target, iRegs[_Rs_].k);
+	} else {
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+		MOV32RtoM((u32)&target, EAX);
+	}
+
+	if (_Rd_) {
+		MapConst(_Rd_, pc + 4);
+	}
+	
+	SetBranch();
+}
+
+static void recBEQ() {
+// Branch if Rs == Rt
+	u32 bpc = _Imm_ * 4 + pc;
+
+//	iFlushRegs();
+	if (bpc == pc + 4 && psxTestLoadDelay(_Rs_, PSXMu32(bpc)) == 0) {
+		return;
+	}
+
+	if (_Rs_ == _Rt_) {
+		iJump(bpc);
+	} else {
+		if (IsConst(_Rs_) && IsConst(_Rt_)) {
+			if (iRegs[_Rs_].k == iRegs[_Rt_].k) {
+				iJump(bpc);
+				return;
+			} else {
+				iJump(pc + 4);
+				return;
+			}
+		} else if (IsConst(_Rs_)) {
+			CMP32ItoM((u32)&psxRegs.GPR.r[_Rt_], iRegs[_Rs_].k);
+		} else if (IsConst(_Rt_)) {
+			CMP32ItoM((u32)&psxRegs.GPR.r[_Rs_], iRegs[_Rt_].k);
+		} else {
+			MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+			CMP32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rt_]);
+		}
+
+		j32Ptr[4] = JE32(0);
+
+		iBranch(pc + 4, 1);
+
+		x86SetJ32(j32Ptr[4]);
+
+		iBranch(bpc, 0);
+		pc += 4;
+	}
+}
+
+static void recBNE() {
+// Branch if Rs != Rt
+	u32 bpc = _Imm_ * 4 + pc;
+
+//	iFlushRegs();
+	if (bpc == pc + 4 && psxTestLoadDelay(_Rs_, PSXMu32(bpc)) == 0) {
+		return;
+	}
+
+	if (IsConst(_Rs_) && IsConst(_Rt_)) {
+		if (iRegs[_Rs_].k != iRegs[_Rt_].k) {
+			iJump(bpc);
+			return;
+		} else {
+			iJump(pc + 4);
+			return;
+		}
+	} else if (IsConst(_Rs_)) {
+		CMP32ItoM((u32)&psxRegs.GPR.r[_Rt_], iRegs[_Rs_].k);
+	} else if (IsConst(_Rt_)) {
+		CMP32ItoM((u32)&psxRegs.GPR.r[_Rs_], iRegs[_Rt_].k);
+	} else {
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+		CMP32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rt_]);
+	}
+	j32Ptr[4] = JNE32(0);
+
+	iBranch(pc + 4, 1);
+
+	x86SetJ32(j32Ptr[4]);
+
+	iBranch(bpc, 0);
+	pc += 4;
+}
+
+static void recBLEZ() {
+// Branch if Rs <= 0
+	u32 bpc = _Imm_ * 4 + pc;
+
+//	iFlushRegs();
+	if (bpc == pc + 4 && psxTestLoadDelay(_Rs_, PSXMu32(bpc)) == 0) {
+		return;
+	}
+
+	if (IsConst(_Rs_)) {
+		if ((s32)iRegs[_Rs_].k <= 0) {
+			iJump(bpc);
+			return;
+		} else {
+			iJump(pc + 4);
+			return;
+		}
+	}
+
+	CMP32ItoM((u32)&psxRegs.GPR.r[_Rs_], 0);
+	j32Ptr[4] = JLE32(0);
+
+	iBranch(pc + 4, 1);
+
+	x86SetJ32(j32Ptr[4]);
+
+	iBranch(bpc, 0);
+	pc += 4;
+}
+
+static void recBGEZ() {
+// Branch if Rs >= 0
+	u32 bpc = _Imm_ * 4 + pc;
+
+//	iFlushRegs();
+	if (bpc == pc + 4 && psxTestLoadDelay(_Rs_, PSXMu32(bpc)) == 0) {
+		return;
+	}
+
+	if (IsConst(_Rs_)) {
+		if ((s32)iRegs[_Rs_].k >= 0) {
+			iJump(bpc);
+			return;
+		} else {
+			iJump(pc + 4);
+			return;
+		}
+	}
+
+	CMP32ItoM((u32)&psxRegs.GPR.r[_Rs_], 0);
+	j32Ptr[4] = JGE32(0);
+
+	iBranch(pc + 4, 1);
+
+	x86SetJ32(j32Ptr[4]);
+
+	iBranch(bpc, 0);
+	pc += 4;
+}
+//#endif
+
+/*REC_FUNC(MFC0);
+REC_SYS(MTC0);
+REC_FUNC(CFC0);
+REC_SYS(CTC0);
+REC_FUNC(RFE);
+#if 0*/
+static void recMFC0() {
+// Rt = Cop0->Rd
+	if (!_Rt_) return;
+
+	iRegs[_Rt_].state = ST_UNK;
+	MOV32MtoR(EAX, (u32)&psxRegs.CP0.r[_Rd_]);
+	MOV32RtoM((u32)&psxRegs.GPR.r[_Rt_], EAX);
+}
+
+static void recCFC0() {
+// Rt = Cop0->Rd
+
+	recMFC0();
+}
+
+void psxMTC0();
+static void recMTC0() {
+// Cop0->Rd = Rt
+
+	if (IsConst(_Rt_)) {
+		switch (_Rd_) {
+			case 12:
+				MOV32ItoM((u32)&psxRegs.CP0.r[_Rd_], iRegs[_Rt_].k);
+				break;
+			case 13:
+				MOV32ItoM((u32)&psxRegs.CP0.r[_Rd_], iRegs[_Rt_].k & ~(0xfc00));
+				break;
+			default:
+				MOV32ItoM((u32)&psxRegs.CP0.r[_Rd_], iRegs[_Rt_].k);
+				break;
+		}
+	} else {
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rt_]);
+		switch (_Rd_) {
+			case 13:
+				AND32ItoR(EAX, ~(0xfc00));
+				break;
+		}
+		MOV32RtoM((u32)&psxRegs.CP0.r[_Rd_], EAX);
+	}
+
+	if (_Rd_ == 12 || _Rd_ == 13) {
+		iFlushRegs();
+		MOV32ItoM((u32)&psxRegs.pc, (u32)pc);
+		CALLFunc((u32)psxTestSWInts);
+		if (branch == 0) {
+			branch = 2;
+			iRet();
+		}
+	}
+}
+
+static void recCTC0() {
+// Cop0->Rd = Rt
+
+	recMTC0();
+}
+
+static void recRFE() {
+	MOV32MtoR(EAX, (u32)&psxRegs.CP0.n.Status);
+	MOV32RtoR(ECX, EAX);
+	AND32ItoR(EAX, 0xfffffff0);
+	AND32ItoR(ECX, 0x3c);
+	SHR32ItoR(ECX, 2);
+	OR32RtoR (EAX, ECX);
+	MOV32RtoM((u32)&psxRegs.CP0.n.Status, EAX);
+
+	iFlushRegs();
+	MOV32ItoM((u32)&psxRegs.pc, (u32)pc);
+	CALLFunc((u32)psxTestSWInts);
+	if (branch == 0) {
+		branch = 2;
+		iRet();
+	}
+}
+//#endif
+
+#include "iGte.h"
+
+//
+
+static void recHLE() {
+	iFlushRegs();
+
+	MOV32ItoR(EAX, (u32)psxHLEt[psxRegs.code & 0xffff]);
+	CALL32R(EAX);
+	branch = 2;
+	iRet();
+}
+
+//
+
+static void (*recBSC[64])() = {
+	recSPECIAL, recREGIMM, recJ   , recJAL  , recBEQ , recBNE , recBLEZ, recBGTZ,
+	recADDI   , recADDIU , recSLTI, recSLTIU, recANDI, recORI , recXORI, recLUI ,
+	recCOP0   , recNULL  , recCOP2, recNULL , recNULL, recNULL, recNULL, recNULL,
+	recNULL   , recNULL  , recNULL, recNULL , recNULL, recNULL, recNULL, recNULL,
+	recLB     , recLH    , recLWL , recLW   , recLBU , recLHU , recLWR , recNULL,
+	recSB     , recSH    , recSWL , recSW   , recNULL, recNULL, recSWR , recNULL,
+	recNULL   , recNULL  , recLWC2, recNULL , recNULL, recNULL, recNULL, recNULL,
+	recNULL   , recNULL  , recSWC2, recHLE  , recNULL, recNULL, recNULL, recNULL
+};
+
+static void (*recSPC[64])() = {
+	recSLL , recNULL, recSRL , recSRA , recSLLV   , recNULL , recSRLV, recSRAV,
+	recJR  , recJALR, recNULL, recNULL, recSYSCALL, recBREAK, recNULL, recNULL,
+	recMFHI, recMTHI, recMFLO, recMTLO, recNULL   , recNULL , recNULL, recNULL,
+	recMULT, recMULTU, recDIV, recDIVU, recNULL   , recNULL , recNULL, recNULL,
+	recADD , recADDU, recSUB , recSUBU, recAND    , recOR   , recXOR , recNOR ,
+	recNULL, recNULL, recSLT , recSLTU, recNULL   , recNULL , recNULL, recNULL,
+	recNULL, recNULL, recNULL, recNULL, recNULL   , recNULL , recNULL, recNULL,
+	recNULL, recNULL, recNULL, recNULL, recNULL   , recNULL , recNULL, recNULL
+};
+
+static void (*recREG[32])() = {
+	recBLTZ  , recBGEZ  , recNULL, recNULL, recNULL, recNULL, recNULL, recNULL,
+	recNULL  , recNULL  , recNULL, recNULL, recNULL, recNULL, recNULL, recNULL,
+	recBLTZAL, recBGEZAL, recNULL, recNULL, recNULL, recNULL, recNULL, recNULL,
+	recNULL  , recNULL  , recNULL, recNULL, recNULL, recNULL, recNULL, recNULL
+};
+
+static void (*recCP0[32])() = {
+	recMFC0, recNULL, recCFC0, recNULL, recMTC0, recNULL, recCTC0, recNULL,
+	recNULL, recNULL, recNULL, recNULL, recNULL, recNULL, recNULL, recNULL,
+	recRFE , recNULL, recNULL, recNULL, recNULL, recNULL, recNULL, recNULL,
+	recNULL, recNULL, recNULL, recNULL, recNULL, recNULL, recNULL, recNULL
+};
+
+static void (*recCP2[64])() = {
+	recBASIC, recRTPS , recNULL , recNULL, recNULL, recNULL , recNCLIP, recNULL, // 00
+	recNULL , recNULL , recNULL , recNULL, recOP  , recNULL , recNULL , recNULL, // 08
+	recDPCS , recINTPL, recMVMVA, recNCDS, recCDP , recNULL , recNCDT , recNULL, // 10
+	recNULL , recNULL , recNULL , recNCCS, recCC  , recNULL , recNCS  , recNULL, // 18
+	recNCT  , recNULL , recNULL , recNULL, recNULL, recNULL , recNULL , recNULL, // 20
+	recSQR  , recDCPL , recDPCT , recNULL, recNULL, recAVSZ3, recAVSZ4, recNULL, // 28 
+	recRTPT , recNULL , recNULL , recNULL, recNULL, recNULL , recNULL , recNULL, // 30
+	recNULL , recNULL , recNULL , recNULL, recNULL, recGPF  , recGPL  , recNCCT  // 38
+};
+
+static void (*recCP2BSC[32])() = {
+	recMFC2, recNULL, recCFC2, recNULL, recMTC2, recNULL, recCTC2, recNULL,
+	recNULL, recNULL, recNULL, recNULL, recNULL, recNULL, recNULL, recNULL,
+	recNULL, recNULL, recNULL, recNULL, recNULL, recNULL, recNULL, recNULL,
+	recNULL, recNULL, recNULL, recNULL, recNULL, recNULL, recNULL, recNULL
+};
+
+static void recRecompile() {
+	char *p;
+	char *ptr;
+
+	dump = 0;
+	resp = 0;
+
+	/* if x86Ptr reached the mem limit reset whole mem */
+	if (((u32)x86Ptr - (u32)recMem) >= (RECMEM_SIZE - 0x10000))
+		recReset();
+
+	x86Align(32);
+	ptr = x86Ptr;
+
+	PC_REC32(psxRegs.pc) = (u32)x86Ptr;
+	pc = psxRegs.pc;
+	pcold = pc;
+
+	for (count = 0; count < 500;) {
+		p = (char *)PSXM(pc);
+		if (p == NULL) recError();
+		psxRegs.code = *(u32 *)p;
+/*
+		if ((psxRegs.code >> 26) == 0x23) { // LW
+			int i;
+			u32 code;
+
+			for (i=1;; i++) {
+				p = (char *)PSXM(pc+i*4);
+				if (p == NULL) recError();
+				code = *(u32 *)p;
+
+				if ((code >> 26) != 0x23 ||
+					_fRs_(code)  != _Rs_ ||
+					_fImm_(code) != (_Imm_+i*4))
+					break;
+			}
+			if (i > 1) {
+				recLWBlock(i);
+				pc = pc + i*4; continue;
+			}
+		}
+
+		if ((psxRegs.code >> 26) == 0x2b) { // SW
+			int i;
+			u32 code;
+
+			for (i=1;; i++) {
+				p = (char *)PSXM(pc+i*4);
+				if (p == NULL) recError();
+				code = *(u32 *)p;
+
+				if ((code >> 26) != 0x2b ||
+					_fRs_(code)  != _Rs_ ||
+					_fImm_(code) != (_Imm_+i*4))
+					break;
+			}
+			if (i > 1) {
+				recSWBlock(i);
+				pc = pc + i*4; continue;
+			}
+		}*/
+
+		pc += 4;
+		count++;
+		recBSC[psxRegs.code >> 26]();
+
+		if (branch) {
+			branch = 0;
+			if (dump) iDumpBlock(ptr);
+			return;
+		}
+	}
+
+	iFlushRegs();
+
+	MOV32ItoM((u32)&psxRegs.pc, pc);
+
+	iRet();
+}
+
+R3000Acpu psxRec = {
+	recInit,
+	recReset,
+	recExecute,
+	recExecuteBlock,
+	recClear,
+	recShutdown
+};
diff --git a/libpcsxcore/ix86/ix86.c b/libpcsxcore/ix86/ix86.c
new file mode 100644
index 0000000..d701e89
--- /dev/null
+++ b/libpcsxcore/ix86/ix86.c
@@ -0,0 +1,1723 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+/*
+ * ix86 core v0.5.1
+ *  Authors: linuzappz <linuzappz@pcsx.net>
+ *           alexey silinov
+ */
+
+#include "ix86.h"
+
+s8  *x86Ptr;
+u8  *j8Ptr[32];
+u32 *j32Ptr[32];
+
+void x86Init() {
+}
+
+void x86SetPtr(char *ptr) {
+	x86Ptr = ptr;
+}
+
+void x86Shutdown() {
+}
+
+void x86SetJ8(u8 *j8) {
+	u32 jump = (x86Ptr - (s8*)j8) - 1;
+
+	if (jump > 0x7f) printf("j8 greater than 0x7f!!\n");
+	*j8 = (u8)jump;
+}
+
+void x86SetJ32(u32 *j32) {
+	*j32 = (x86Ptr - (s8*)j32) - 4;
+}
+
+void x86Align(int bytes) {
+	// fordward align
+	x86Ptr = (s8*)(((u32)x86Ptr + bytes) & ~(bytes - 1));
+}
+
+#define SIB 4
+#define DISP32 5
+
+/* macros helpers */
+
+#define ModRM(mod, rm, reg) \
+	write8((mod << 6) | (rm << 3) | (reg));
+
+#define SibSB(ss, rm, index) \
+	write8((ss << 6) | (rm << 3) | (index));
+
+#define SET8R(cc, to) { \
+	write8(0x0F); write8(cc); \
+	write8((0xC0) | (to)); }
+
+#define J8Rel(cc, to) { \
+	write8(cc); write8(to); return x86Ptr - 1; }
+
+#define J32Rel(cc, to) { \
+	write8(0x0F); write8(cc); write32(to); return (u32*)(x86Ptr - 4); }
+
+#define CMOV32RtoR(cc, to, from) { \
+	write8(0x0F); write8(cc); \
+	ModRM(3, to, from); }
+
+#define CMOV32MtoR(cc, to, from) { \
+	write8(0x0F); write8(cc); \
+	ModRM(0, to, DISP32); \
+	write32(from); }
+
+/********************/
+/* IX86 intructions */
+/********************/
+
+// mov instructions
+
+/* mov r32 to r32 */
+void MOV32RtoR(int to, int from) {
+	write8(0x89);
+	ModRM(3, from, to);
+}
+
+/* mov r32 to m32 */
+void MOV32RtoM(u32 to, int from) {
+	write8(0x89);
+	ModRM(0, from, DISP32);
+	write32(to);
+}
+
+/* mov m32 to r32 */
+void MOV32MtoR(int to, u32 from) {
+	write8(0x8B);
+	ModRM(0, to, DISP32);
+	write32(from); 
+}
+
+/* mov [r32] to r32 */
+void MOV32RmtoR(int to, int from) {
+	write8(0x8B);
+	ModRM(0, to, from);
+}
+
+/* mov [r32][r32*scale] to r32 */
+void MOV32RmStoR(int to, int from, int from2, int scale) {
+	write8(0x8B);
+	ModRM(0, to, 0x4);
+	SibSB(scale, from2, from);
+}
+
+/* mov r32 to [r32] */
+void MOV32RtoRm(int to, int from) {
+	write8(0x89);
+	ModRM(0, from, to);
+}
+
+/* mov r32 to [r32][r32*scale] */
+void MOV32RtoRmS(int to, int to2, int scale, int from) {
+	write8(0x89);
+	ModRM(0, from, 0x4);
+	SibSB(scale, to2, to);
+}
+
+/* mov imm32 to r32 */
+void MOV32ItoR(int to, u32 from) {
+	write8(0xB8 | to); 
+	write32(from);
+}
+
+/* mov imm32 to m32 */
+void MOV32ItoM(u32 to, u32 from) {
+	write8(0xC7);
+	ModRM(0, 0, DISP32);
+	write32(to);
+	write32(from); 
+}
+
+/* mov r16 to m16 */
+void MOV16RtoM(u32 to, int from) {
+	write8(0x66);
+	write8(0x89);
+	ModRM(0, from, DISP32);
+	write32(to);
+}
+
+/* mov m16 to r16 */
+void MOV16MtoR(int to, u32 from) {
+	write8(0x66);
+	write8(0x8B);
+	ModRM(0, to, DISP32);
+	write32(from); 
+}
+
+/* mov imm16 to m16 */
+void MOV16ItoM(u32 to, u16 from) {
+	write8(0x66);
+	write8(0xC7);
+	ModRM(0, 0, DISP32);
+	write32(to);
+	write16(from); 
+}
+
+/* mov r8 to m8 */
+void MOV8RtoM(u32 to, int from) {
+	write8(0x88);
+	ModRM(0, from, DISP32);
+	write32(to);
+}
+
+/* mov m8 to r8 */
+void MOV8MtoR(int to, u32 from) {
+	write8(0x8A);
+	ModRM(0, to, DISP32);
+	write32(from); 
+}
+
+/* mov imm8 to m8 */
+void MOV8ItoM(u32 to, u8 from) {
+	write8(0xC6);
+	ModRM(0, 0, DISP32);
+	write32(to);
+	write8(from); 
+}
+
+/* movsx r8 to r32 */
+void MOVSX32R8toR(int to, int from) {
+	write16(0xBE0F); 
+	ModRM(3, to, from); 
+}
+
+/* movsx m8 to r32 */
+void MOVSX32M8toR(int to, u32 from) {
+	write16(0xBE0F); 
+	ModRM(0, to, DISP32);
+	write32(from);
+}
+
+/* movsx r16 to r32 */
+void MOVSX32R16toR(int to, int from) {
+	write16(0xBF0F); 
+	ModRM(3, to, from); 
+}
+
+/* movsx m16 to r32 */
+void MOVSX32M16toR(int to, u32 from) {
+	write16(0xBF0F); 
+	ModRM(0, to, DISP32);
+	write32(from);
+}
+
+/* movzx r8 to r32 */
+void MOVZX32R8toR(int to, int from) {
+	write16(0xB60F); 
+	ModRM(3, to, from); 
+}
+
+/* movzx m8 to r32 */
+void MOVZX32M8toR(int to, u32 from) {
+	write16(0xB60F); 
+	ModRM(0, to, DISP32);
+	write32(from);
+}
+
+/* movzx r16 to r32 */
+void MOVZX32R16toR(int to, int from) {
+	write16(0xB70F); 
+	ModRM(3, to, from); 
+}
+
+/* movzx m16 to r32 */
+void MOVZX32M16toR(int to, u32 from) {
+	write16(0xB70F); 
+	ModRM(0, to, DISP32);
+	write32(from);
+}
+
+/* cmovne r32 to r32 */
+void CMOVNE32RtoR(int to, int from) {
+	CMOV32RtoR(0x45, to, from);
+}
+
+/* cmovne m32 to r32*/
+void CMOVNE32MtoR(int to, u32 from) {
+	CMOV32MtoR(0x45, to, from);
+}
+
+/* cmove r32 to r32*/
+void CMOVE32RtoR(int to, int from) {
+	CMOV32RtoR(0x44, to, from);
+}
+
+/* cmove m32 to r32*/
+void CMOVE32MtoR(int to, u32 from) {
+	CMOV32MtoR(0x44, to, from);
+}
+
+/* cmovg r32 to r32*/
+void CMOVG32RtoR(int to, int from) {
+	CMOV32RtoR(0x4F, to, from);
+}
+
+/* cmovg m32 to r32*/
+void CMOVG32MtoR(int to, u32 from) {
+	CMOV32MtoR(0x4F, to, from);
+}
+
+/* cmovge r32 to r32*/
+void CMOVGE32RtoR(int to, int from) {
+	CMOV32RtoR(0x4D, to, from);
+}
+
+/* cmovge m32 to r32*/
+void CMOVGE32MtoR(int to, u32 from) {
+	CMOV32MtoR(0x4D, to, from);
+}
+
+/* cmovl r32 to r32*/
+void CMOVL32RtoR(int to, int from) {
+	CMOV32RtoR(0x4C, to, from);
+}
+
+/* cmovl m32 to r32*/
+void CMOVL32MtoR(int to, u32 from) {
+	CMOV32MtoR(0x4C, to, from);
+}
+
+/* cmovle r32 to r32*/
+void CMOVLE32RtoR(int to, int from) {
+	CMOV32RtoR(0x4E, to, from);
+}
+
+/* cmovle m32 to r32*/
+void CMOVLE32MtoR(int to, u32 from) {
+	CMOV32MtoR(0x4E, to, from);
+}
+
+// arithmic instructions
+
+/* add imm32 to r32 */
+void ADD32ItoR(int to, u32 from) {
+	if (to == EAX) {
+		write8(0x05); 
+	} else {
+		write8(0x81); 
+		ModRM(3, 0, to);
+	}
+	write32(from);
+}
+
+/* add imm32 to m32 */
+void ADD32ItoM(u32 to, u32 from) {
+	write8(0x81); 
+	ModRM(0, 0, DISP32);
+	write32(to);
+	write32(from);
+}
+
+/* add r32 to r32 */
+void ADD32RtoR(int to, int from) {
+	write8(0x01); 
+	ModRM(3, from, to);
+}
+
+/* add r32 to m32 */
+void ADD32RtoM(u32 to, int from) {
+	write8(0x01); 
+	ModRM(0, from, DISP32);
+	write32(to);
+}
+
+/* add m32 to r32 */
+void ADD32MtoR(int to, u32 from) {
+	write8(0x03); 
+	ModRM(0, to, DISP32);
+	write32(from);
+}
+
+/* adc imm32 to r32 */
+void ADC32ItoR(int to, u32 from) {
+	if (to == EAX) {
+		write8(0x15);
+	} else {
+		write8(0x81);
+		ModRM(3, 2, to);
+	}
+	write32(from); 
+}
+
+/* adc r32 to r32 */
+void ADC32RtoR(int to, int from) {
+	write8(0x11); 
+	ModRM(3, from, to);
+}
+
+/* adc m32 to r32 */
+void ADC32MtoR(int to, u32 from) {
+	write8(0x13); 
+	ModRM(0, to, DISP32);
+	write32(from); 
+}
+
+/* inc r32 */
+void INC32R(int to) {
+	write8(0x40 + to);
+}
+
+/* inc m32 */
+void INC32M(u32 to) {
+	write8(0xFF);
+	ModRM(0, 0, DISP32);
+	write32(to);
+}
+
+/* sub imm32 to r32 */
+void SUB32ItoR(int to, u32 from) {
+	if (to == EAX) {
+		write8(0x2D); 
+	} else {
+		write8(0x81); 
+		ModRM(3, 5, to);
+	}
+	write32(from); 
+}
+
+/* sub r32 to r32 */
+void SUB32RtoR(int to, int from) {
+	write8(0x29); 
+	ModRM(3, from, to);
+}
+
+/* sub m32 to r32 */
+void SUB32MtoR(int to, u32 from) {
+	write8(0x2B); 
+	ModRM(0, to, DISP32);
+	write32(from); 
+}
+
+/* sbb imm32 to r32 */
+void SBB32ItoR(int to, u32 from) {
+	if (to == EAX) {
+		write8(0x1D);
+	} else {
+		write8(0x81);
+		ModRM(3, 3, to);
+	}
+	write32(from); 
+}
+
+/* sbb r32 to r32 */
+void SBB32RtoR(int to, int from) {
+	write8(0x19); 
+	ModRM(3, from, to);
+}
+
+/* sbb m32 to r32 */
+void SBB32MtoR(int to, u32 from) {
+	write8(0x1B); 
+	ModRM(0, to, DISP32);
+	write32(from); 
+}
+
+/* dec r32 */
+void DEC32R(int to) {
+	write8(0x48 + to);
+}
+
+/* dec m32 */
+void DEC32M(u32 to) {
+	write8(0xFF);
+	ModRM(0, 1, DISP32);
+	write32(to);
+}
+
+/* mul eax by r32 to edx:eax */
+void MUL32R(int from) {
+	write8(0xF7); 
+	ModRM(3, 4, from);
+}
+
+/* imul eax by r32 to edx:eax */
+void IMUL32R(int from) {
+	write8(0xF7); 
+	ModRM(3, 5, from);
+}
+
+/* mul eax by m32 to edx:eax */
+void MUL32M(u32 from) {
+	write8(0xF7); 
+	ModRM(0, 4, DISP32);
+	write32(from); 
+}
+
+/* imul eax by m32 to edx:eax */
+void IMUL32M(u32 from) {
+	write8(0xF7); 
+	ModRM(0, 5, DISP32);
+	write32(from); 
+}
+
+/* imul r32 by r32 to r32 */
+void IMUL32RtoR(int to, int from) {
+	write16(0xAF0F); 
+	ModRM(3, to, from);
+}
+
+/* div eax by r32 to edx:eax */
+void DIV32R(int from) {
+	write8(0xF7); 
+	ModRM(3, 6, from);
+}
+
+/* idiv eax by r32 to edx:eax */
+void IDIV32R(int from) {
+	write8(0xF7); 
+	ModRM(3, 7, from);
+}
+
+/* div eax by m32 to edx:eax */
+void DIV32M(u32 from) {
+	write8(0xF7); 
+	ModRM(0, 6, DISP32);
+	write32(from); 
+}
+
+/* idiv eax by m32 to edx:eax */
+void IDIV32M(u32 from) {
+	write8(0xF7); 
+	ModRM(0, 7, DISP32);
+	write32(from); 
+}
+
+// shifting instructions
+
+void RCR32ItoR(int to,int from)
+{
+	if (from==1)
+	{
+		write8(0xd1);
+		write8(0xd8 | to);
+	}
+	else
+	{
+		write8(0xc1);
+		write8(0xd8 | to);
+		write8(from);
+	}
+}
+
+/* shl imm8 to r32 */
+void SHL32ItoR(int to, u8 from) {
+	if (from==1)
+	{
+		write8(0xd1);
+		write8(0xe0 | to);
+		return;
+	}
+	write8(0xC1); 
+	ModRM(3, 4, to);
+	write8(from); 
+}
+
+/* shl cl to r32 */
+void SHL32CLtoR(int to) {
+	write8(0xD3); 
+	ModRM(3, 4, to);
+}
+
+/* shr imm8 to r32 */
+void SHR32ItoR(int to, u8 from) {
+	if (from==1)
+	{
+		write8(0xd1);
+		write8(0xe8 | to);
+		return;
+	}
+	write8(0xC1); 
+	ModRM(3, 5, to);
+	write8(from); 
+}
+
+/* shr cl to r32 */
+void SHR32CLtoR(int to) {
+	write8(0xD3); 
+	ModRM(3, 5, to);
+}
+
+/* sar imm8 to r32 */
+void SAR32ItoR(int to, u8 from) {
+	write8(0xC1); 
+	ModRM(3, 7, to);
+	write8(from); 
+}
+
+/* sar cl to r32 */
+void SAR32CLtoR(int to) {
+	write8(0xD3); 
+	ModRM(3, 7, to);
+}
+
+
+// logical instructions
+
+/* or imm32 to r32 */
+void OR32ItoR(int to, u32 from) {
+	if (to == EAX) {
+		write8(0x0D); 
+	} else {
+		write8(0x81); 
+		ModRM(3, 1, to);
+	}
+	write32(from); 
+}
+
+/* or imm32 to m32 */
+void OR32ItoM(u32 to, u32 from) {
+	write8(0x81); 
+	ModRM(0, 1, DISP32);
+	write32(to);
+	write32(from); 
+}
+
+/* or r32 to r32 */
+void OR32RtoR(int to, int from) {
+	write8(0x09); 
+	ModRM(3, from, to);
+}
+
+/* or r32 to m32 */
+void OR32RtoM(u32 to, int from) {
+	write8(0x09); 
+	ModRM(0, from, DISP32);
+	write32(to);
+}
+
+/* or m32 to r32 */
+void OR32MtoR(int to, u32 from) {
+	write8(0x0B); 
+	ModRM(0, to, DISP32);
+	write32(from); 
+}
+
+/* xor imm32 to r32 */
+void XOR32ItoR(int to, u32 from) {
+	if (to == EAX) {
+		write8(0x35); 
+	} else {
+		write8(0x81); 
+		ModRM(3, 6, to);
+	}
+	write32(from); 
+}
+
+/* xor imm32 to m32 */
+void XOR32ItoM(u32 to, u32 from) {
+	write8(0x81); 
+	ModRM(0, 6, DISP32);
+	write32(to); 
+	write32(from); 
+}
+
+/* xor r32 to r32 */
+void XOR32RtoR(int to, int from) {
+	write8(0x31); 
+	ModRM(3, from, to);
+}
+
+/* xor r32 to m32 */
+void XOR32RtoM(u32 to, int from) {
+	write8(0x31); 
+	ModRM(0, from, DISP32);
+	write32(to);
+}
+
+/* xor m32 to r32 */
+void XOR32MtoR(int to, u32 from) {
+	write8(0x33); 
+	ModRM(0, to, DISP32);
+	write32(from); 
+}
+
+/* and imm32 to r32 */
+void AND32ItoR(int to, u32 from) {
+	if (to == EAX) {
+		write8(0x25); 
+	} else {
+		write8(0x81); 
+		ModRM(3, 0x4, to);
+	}
+	write32(from); 
+}
+
+/* and imm32 to m32 */
+void AND32ItoM(u32 to, u32 from) {
+	write8(0x81); 
+	ModRM(0, 0x4, DISP32);
+	write32(to);
+	write32(from); 
+}
+
+/* and r32 to r32 */
+void AND32RtoR(int to, int from) {
+	write8(0x21); 
+	ModRM(3, from, to);
+}
+
+/* and r32 to m32 */
+void AND32RtoM(u32 to, int from) {
+	write8(0x21); 
+	ModRM(0, from, DISP32);
+	write32(to); 
+}
+
+/* and m32 to r32 */
+void AND32MtoR(int to, u32 from) {
+	write8(0x23); 
+	ModRM(0, to, DISP32);
+	write32(from); 
+}
+
+/* not r32 */
+void NOT32R(int from) {
+	write8(0xF7); 
+	ModRM(3, 2, from);
+}
+
+/* neg r32 */
+void NEG32R(int from) {
+	write8(0xF7); 
+	ModRM(3, 3, from);
+}
+
+// jump instructions
+
+/* jmp rel8 */
+u8*  JMP8(u8 to) {
+	write8(0xEB); 
+	write8(to);
+	return x86Ptr - 1;
+}
+
+/* jmp rel32 */
+u32* JMP32(u32 to) {
+	write8(0xE9); 
+	write32(to); 
+	return (u32*)(x86Ptr - 4);
+}
+
+/* jmp r32 */
+void JMP32R(int to) {
+	write8(0xFF); 
+	ModRM(3, 4, to);
+}
+
+/* je rel8 */
+u8*  JE8(u8 to) {
+	J8Rel(0x74, to);
+}
+
+/* jz rel8 */
+u8*  JZ8(u8 to) {
+	J8Rel(0x74, to); 
+}
+
+/* jg rel8 */
+u8*  JG8(u8 to) { 
+	J8Rel(0x7F, to);
+}
+
+/* jge rel8 */
+u8*  JGE8(u8 to) { 
+	J8Rel(0x7D, to); 
+}
+
+/* jl rel8 */
+u8*  JL8(u8 to) { 
+	J8Rel(0x7C, to); 
+}
+
+/* jle rel8 */
+u8*  JLE8(u8 to) { 
+	J8Rel(0x7E, to); 
+}
+
+/* jne rel8 */
+u8*  JNE8(u8 to) { 
+	J8Rel(0x75, to); 
+}
+
+/* jnz rel8 */
+u8*  JNZ8(u8 to) { 
+	J8Rel(0x75, to); 
+}
+
+/* jng rel8 */
+u8*  JNG8(u8 to) { 
+	J8Rel(0x7E, to); 
+}
+
+/* jnge rel8 */
+u8*  JNGE8(u8 to) { 
+	J8Rel(0x7C, to); 
+}
+
+/* jnl rel8 */
+u8*  JNL8(u8 to) { 
+	J8Rel(0x7D, to); 
+}
+
+/* jnle rel8 */
+u8*  JNLE8(u8 to) { 
+	J8Rel(0x7F, to); 
+}
+
+/* jo rel8 */
+u8*  JO8(u8 to) { 
+	J8Rel(0x70, to); 
+}
+
+/* jno rel8 */
+u8*  JNO8(u8 to) { 
+	J8Rel(0x71, to); 
+}
+
+/* je rel32 */
+u32* JE32(u32 to) {
+	J32Rel(0x84, to);
+}
+
+/* jz rel32 */
+u32* JZ32(u32 to) {
+	J32Rel(0x84, to); 
+}
+
+/* jg rel32 */
+u32* JG32(u32 to) { 
+	J32Rel(0x8F, to);
+}
+
+/* jge rel32 */
+u32* JGE32(u32 to) { 
+	J32Rel(0x8D, to); 
+}
+
+/* jl rel32 */
+u32* JL32(u32 to) { 
+	J32Rel(0x8C, to); 
+}
+
+/* jle rel32 */
+u32* JLE32(u32 to) { 
+	J32Rel(0x8E, to); 
+}
+
+/* jne rel32 */
+u32* JNE32(u32 to) { 
+	J32Rel(0x85, to); 
+}
+
+/* jnz rel32 */
+u32* JNZ32(u32 to) { 
+	J32Rel(0x85, to); 
+}
+
+/* jng rel32 */
+u32* JNG32(u32 to) { 
+	J32Rel(0x8E, to); 
+}
+
+/* jnge rel32 */
+u32* JNGE32(u32 to) { 
+	J32Rel(0x8C, to); 
+}
+
+/* jnl rel32 */
+u32* JNL32(u32 to) { 
+	J32Rel(0x8D, to); 
+}
+
+/* jnle rel32 */
+u32*  JNLE32(u32 to) { 
+	J32Rel(0x8F, to); 
+}
+
+/* jo rel32 */
+u32*  JO32(u32 to) { 
+	J32Rel(0x80, to); 
+}
+
+/* jno rel32 */
+u32*  JNO32(u32 to) { 
+	J32Rel(0x81, to); 
+}
+
+/* call func */
+void CALLFunc(u32 func) {
+	CALL32(func - ((u32)x86Ptr + 5));
+}
+
+/* call rel32 */
+void CALL32(u32 to) {
+	write8(0xE8); 
+	write32(to); 
+}
+
+/* call r32 */
+void CALL32R(int to) {
+	write8(0xFF);
+	ModRM(3, 2, to);
+}
+
+/* call m32 */
+void CALL32M(u32 to) {
+	write8(0xFF);
+	ModRM(0, 2, DISP32);
+	write32(to);
+}
+
+// misc instructions
+
+/* cmp imm32 to r32 */
+void CMP32ItoR(int to, u32 from) {
+	if (to == EAX) {
+		write8(0x3D);
+	} else {
+		write8(0x81);
+		ModRM(3, 7, to);
+	}
+	write32(from); 
+}
+
+/* cmp imm32 to m32 */
+void CMP32ItoM(u32 to, u32 from) {
+	write8(0x81); 
+	ModRM(0, 7, DISP32);
+	write32(to); 
+	write32(from); 
+}
+
+/* cmp r32 to r32 */
+void CMP32RtoR(int to, int from) {
+	write8(0x39);
+	ModRM(3, from, to);
+}
+
+/* cmp m32 to r32 */
+void CMP32MtoR(int to, u32 from) {
+	write8(0x3B);
+	ModRM(0, to, DISP32);
+	write32(from); 
+}
+
+/* test imm32 to r32 */
+void TEST32ItoR(int to, u32 from) {
+	if (to == EAX) {
+		write8(0xA9);
+	} else {
+		write8(0xF7);
+		ModRM(3, 0, to);
+	}
+	write32(from); 
+}
+
+/* test r32 to r32 */
+void TEST32RtoR(int to, int from) {
+	write8(0x85);
+	ModRM(3, from, to);
+}
+
+void BT32ItoR(int to,int from)
+{
+	write16(0xba0f);
+	write8(0xe0 | to);
+	write8(from);
+}
+
+/* sets r8 */
+void SETS8R(int to) { 
+        SET8R(0x98, to); 
+}
+/* setl r8 */
+void SETL8R(int to) { 
+	SET8R(0x9C, to); 
+}
+
+/* setb r8 */
+void SETB8R(int to) { 
+	SET8R(0x92, to); 
+}
+
+/* setnz r8 */
+void SETNZ8R(int to) { 
+	SET8R(0x95,to); 
+}
+
+/* cbw */
+void CBW() {
+	write16(0x9866); 
+}
+
+/* cwd */
+void CWD() {
+	write8(0x98);
+}
+
+/* cdq */
+void CDQ() {
+	write8(0x99); 
+}
+
+/* push r32 */
+void PUSH32R(int from) {
+	write8(0x50 | from); 
+}
+
+/* push m32 */
+void PUSH32M(u32 from) {
+	write8(0xFF);
+	ModRM(0, 6, DISP32);
+	write32(from); 
+}
+
+/* push imm32 */
+void PUSH32I(u32 from) {
+	write8(0x68); write32(from); 
+}
+
+/* pop r32 */
+void POP32R(int from) {
+	write8(0x58 | from); 
+}
+
+/* pushad */
+void PUSHA32() {
+	write8(0x60); 
+}
+
+/* popad */
+void POPA32() {
+	write8(0x61); 
+}
+
+/* ret */
+void RET() {
+	write8(0xC3); 
+}
+
+/********************/
+/* FPU instructions */
+/********************/
+
+//Added:basara 14.01.2003
+/* compare m32 to fpu reg stack */
+void FCOMP32(u32 from) {
+	write8(0xD8);
+	ModRM(0, 0x3, DISP32);
+	write32(from); 
+}
+
+void FNSTSWtoAX() {
+	write16(0xE0DF);
+}
+
+/* fild m32 to fpu reg stack */
+void FILD32(u32 from) {
+	write8(0xDB);
+	ModRM(0, 0x0, DISP32);
+	write32(from); 
+}
+
+/* fistp m32 from fpu reg stack */
+void FISTP32(u32 from) {
+	write8(0xDB);
+	ModRM(0, 0x3, DISP32);
+	write32(from); 
+}
+
+/* fld m32 to fpu reg stack */
+void FLD32(u32 from) {
+	write8(0xD9);
+	ModRM(0, 0x0, DISP32);
+	write32(from); 
+}
+
+/* fstp m32 from fpu reg stack */
+void FSTP32(u32 to) {
+	write8(0xD9);
+	ModRM(0, 0x3, DISP32);
+	write32(to); 
+}
+
+//
+
+/* fldcw fpu control word from m16 */
+void FLDCW(u32 from) {
+	write8(0xD9);
+	ModRM(0, 0x5, DISP32);
+	write32(from); 
+}
+
+/* fnstcw fpu control word to m16 */
+void FNSTCW(u32 to) {
+	write8(0xD9);
+	ModRM(0, 0x7, DISP32);
+	write32(to); 
+}
+
+//
+
+/* fadd m32 to fpu reg stack */
+void FADD32(u32 from) {
+	write8(0xD8);
+	ModRM(0, 0x0, DISP32);
+	write32(from); 
+}
+
+/* fsub m32 to fpu reg stack */
+void FSUB32(u32 from) {
+	write8(0xD8);
+	ModRM(0, 0x4, DISP32);
+	write32(from); 
+}
+
+/* fmul m32 to fpu reg stack */
+void FMUL32(u32 from) {
+	write8(0xD8);
+	ModRM(0, 0x1, DISP32);
+	write32(from); 
+}
+
+/* fdiv m32 to fpu reg stack */
+void FDIV32(u32 from) {
+	write8(0xD8);
+	ModRM(0, 0x6, DISP32);
+	write32(from); 
+}
+
+/* fabs fpu reg stack */
+void FABS() {
+	write16(0xE1D9);
+}
+
+/* fsqrt fpu reg stack */
+void FSQRT() {
+	write16(0xFAD9);
+}
+
+/* fchs fpu reg stack */
+void FCHS() {
+	write16(0xE0D9);
+}
+
+/********************/
+/* MMX instructions */
+/********************/
+
+// r64 = mm
+
+/* movq m64 to r64 */
+void MOVQMtoR(int to, u32 from) {
+	write16(0x6F0F);
+	ModRM(0, to, DISP32);
+	write32(from); 
+}
+
+/* movq r64 to m64 */
+void MOVQRtoM(u32 to, int from) {
+	write16(0x7F0F);
+	ModRM(0, from, DISP32);
+	write32(to); 
+}
+
+/* pand r64 to r64 */
+void PANDRtoR(int to, int from) {
+	write16(0xDB0F);
+	ModRM(3, to, from); 
+}
+
+/* pand r64 to r64 */
+void PANDNRtoR(int to, int from) {
+	write16(0xDF0F);
+	ModRM(3, to, from); 
+}
+
+/* por r64 to r64 */
+void PORRtoR(int to, int from) {
+	write16(0xEB0F);
+	ModRM(3, to, from); 
+}
+
+/* pxor r64 to r64 */
+void PXORRtoR(int to, int from) {
+	write16(0xEF0F);
+	ModRM(3, to, from); 
+}
+
+/* psllq r64 to r64 */
+void PSLLQRtoR(int to, int from) {
+	write16(0xF30F);
+	ModRM(3, to, from); 
+}
+
+/* psllq m64 to r64 */
+void PSLLQMtoR(int to, u32 from) {
+	write16(0xF30F); 
+	ModRM(0, to, DISP32); 
+	write32(from);
+}
+
+/* psllq imm8 to r64 */
+void PSLLQItoR(int to, u8 from) {
+	write16(0x730F); 
+	ModRM(3, 6, to); 
+	write8(from); 
+}
+
+/* psrlq r64 to r64 */
+void PSRLQRtoR(int to, int from) {
+	write16(0xD30F); 
+	ModRM(3, to, from); 
+}
+
+/* psrlq m64 to r64 */
+void PSRLQMtoR(int to, u32 from) {
+	write16(0xD30F); 
+	ModRM(0, to, DISP32); 
+	write32(from); 
+}
+
+/* psrlq imm8 to r64 */
+void PSRLQItoR(int to, u8 from) {
+	write16(0x730F);
+	ModRM(3, 2, to); 
+	write8(from); 
+}
+
+/* paddusb r64 to r64 */
+void PADDUSBRtoR(int to, int from) {
+	write16(0xDC0F); 
+	ModRM(3, to, from); 
+}
+
+/* paddusb m64 to r64 */
+void PADDUSBMtoR(int to, u32 from) {
+	write16(0xDC0F); 
+	ModRM(0, to, DISP32); 
+	write32(from); 
+}
+
+/* paddusw r64 to r64 */
+void PADDUSWRtoR(int to, int from) {
+	write16(0xDD0F); 
+	ModRM(3, to, from); 
+}
+
+/* paddusw m64 to r64 */
+void PADDUSWMtoR(int to, u32 from) {
+	write16(0xDD0F); 
+	ModRM(0, to, DISP32); 
+	write32(from); 
+}
+
+/* paddb r64 to r64 */
+void PADDBRtoR(int to, int from) {
+	write16(0xFC0F); 
+	ModRM(3, to, from); 
+}
+
+/* paddb m64 to r64 */
+void PADDBMtoR(int to, u32 from) {
+	write16(0xFC0F); 
+	ModRM(0, to, DISP32); 
+	write32(from); 
+}
+
+/* paddw r64 to r64 */
+void PADDWRtoR(int to, int from) {
+	write16(0xFD0F); 
+	ModRM(3, to, from); 
+}
+
+/* paddw m64 to r64 */
+void PADDWMtoR(int to, u32 from) {
+	write16(0xFD0F); 
+	ModRM(0, to, DISP32); 
+	write32(from); 
+}
+
+/* paddd r64 to r64 */
+void PADDDRtoR(int to, int from) {
+	write16(0xFE0F); 
+	ModRM(3, to, from); 
+}
+
+/* paddd m64 to r64 */
+void PADDDMtoR(int to, u32 from) {
+	write16(0xFE0F); 
+	ModRM(0, to, DISP32); 
+	write32(from); 
+}
+
+/* emms */
+void EMMS() {
+	//use femms if we have 3dnow
+	write16(0x0e0f);
+	return;
+}
+
+/* femms */
+void FEMMS() {
+	write16(0x770F);
+	return;
+}
+
+//Basara:changed
+void PADDSBRtoR(int to, int from) {
+	write16(0xEC0F); 
+	ModRM(3, to, from); 
+}
+
+void PADDSWRtoR(int to, int from) {
+	write16(0xED0F);
+	ModRM(3, to, from); 
+}
+
+void PADDSDRtoR(int to, int from) {
+	write16(0xEE0F); 
+	ModRM(3, to, from); 
+}
+
+void PSUBSBRtoR(int to, int from) {
+	write16(0xE80F); 
+	ModRM(3, to, from); 
+}
+
+void PSUBSWRtoR(int to, int from) {
+	write16(0xE90F);
+	ModRM(3, to, from); 
+}
+
+void PSUBSDRtoR(int to, int from) {
+	write16(0xEA0F); 
+	ModRM(3, to, from); 
+}
+
+void PSUBBRtoR(int to, int from) {
+	write16(0xF80F); 
+	ModRM(3, to, from); 
+}
+
+void PSUBWRtoR(int to, int from) {
+	write16(0xF90F); 
+	ModRM(3, to, from); 
+}
+
+void PSUBDRtoR(int to, int from) {
+	write16(0xFA0F); 
+	ModRM(3, to, from); 
+}
+
+//changed:basara
+//P.s.It's sux.Don't use it offten.
+void MOVQ64ItoR(int reg,u64 i)
+{
+	MOVQMtoR(reg,(u32)(x86Ptr)+2+7);
+	JMP8(8);
+	write64(i);
+}
+
+void PSUBUSBRtoR(int to, int from) {
+	write16(0xD80F); 
+	ModRM(3, to, from); 
+}
+
+void PSUBUSWRtoR(int to, int from) {
+	write16(0xD90F); 
+	ModRM(3, to, from); 
+}
+
+void PMAXSWRtoR(int to,int from)
+{
+	write16(0xEE0F); 
+	ModRM(3, to, from); 
+}
+
+void PMINSWRtoR(int to,int from)
+{
+	write16(0xEA0F); 
+	ModRM(3, to, from); 
+}
+
+void PCMPEQBRtoR(int to,int from)
+{
+	write16(0x740F); 
+	ModRM(3, to, from); 
+}
+
+void PCMPEQWRtoR(int to,int from)
+{
+	write16(0x750F); 
+	ModRM(3, to, from); 
+}
+
+void PCMPEQDRtoR(int to,int from)
+{
+	write16(0x760F); 
+	ModRM(3, to, from); 
+}
+
+void PCMPGTBRtoR(int to,int from)
+{
+	write16(0x640F); 
+	ModRM(3, to, from); 
+}
+
+void PCMPGTWRtoR(int to,int from)
+{
+	write16(0x650F); 
+	ModRM(3, to, from); 
+}
+
+void PCMPGTDRtoR(int to,int from)
+{
+	write16(0x660F); 
+	ModRM(3, to, from); 
+}
+
+//Basara:Added 10.01.2003
+void PSRLWItoR(int to,int from)
+{
+	write16(0x710f);
+	ModRM(2, 2 , to); 
+	write8(from);
+}
+void PSRLDItoR(int to,int from)
+{
+	write16(0x720f);
+	ModRM(2, 2 , to); 
+	write8(from);
+}
+
+void PSLLWItoR(int to,int from)
+{
+	write16(0x710f);
+	ModRM(3, 6 , to); 
+	write8(from);
+}
+
+void PSLLDItoR(int to,int from)
+{
+	write16(0x720f);
+	ModRM(3, 6 , to); 
+	write8(from);
+}
+
+void PSRAWItoR(int to,int from)
+{
+	write16(0x710f);
+	ModRM(3, 4 , to); 
+	write8(from);
+}
+
+void PSRADItoR(int to,int from)
+{
+	write16(0x720f);
+	ModRM(3, 4 , to); 
+	write8(from);
+}
+
+/* por m64 to r64 */
+void PORMtoR(int to, u32 from) {
+	write16(0xEB0F);
+	ModRM(0, to, DISP32); 
+	write32(from);
+}
+
+/* pxor m64 to r64 */
+void PXORMtoR(int to, u32 from) {
+	write16(0xEF0F);
+	ModRM(0, to, DISP32); 
+	write32(from);
+}
+
+/* pand m64 to r64 */
+void PANDMtoR(int to, u32 from) {
+	write16(0xDB0F);
+	ModRM(0, to, DISP32); 
+	write32(from);
+}
+
+/* pandn m64 to r64 */
+void PANDNMtoR(int to, u32 from) {
+	write16(0xDF0F);
+	ModRM(0, to, DISP32); 
+	write32(from);
+}
+
+/* movd m32 to r64 */
+void MOVDMtoR(int to, u32 from) {
+	write16(0x6E0F);
+	ModRM(0, to, DISP32);
+	write32(from); 
+}
+
+/* movq r64 to m32 */
+void MOVDRtoM(u32 to, int from) {
+	write16(0x7E0F);
+	ModRM(0, from, DISP32);
+	write32(to); 
+}
+
+/* movd r32 to r64 */
+void MOVD32RtoR(int to, int from) {
+	write16(0x6E0F);
+	ModRM(3, to,from);
+}
+
+/* movq r64 to r32 */
+void MOVD64RtoR(int to, int from) {
+	write16(0x7E0F);
+	ModRM(3, from,to);
+}
+
+void MOVQRtoR(int to, int from) {
+	write16(0x6F0F);
+	ModRM(3, to,from);
+}
+
+void PUNPCKHDQRtoR(int to, int from) {
+	write16(0x6A0F);
+	ModRM(3, to,from);
+}
+
+void PUNPCKLDQRtoR(int to, int from) {
+	write16(0x620F);
+	ModRM(3, to,from);
+}
+
+//////////////////////////////////////////////////////////////////////////
+//	SSE	intructions 
+//////////////////////////////////////////////////////////////////////////
+
+void MOVAPSMtoR(int to, int from) {
+	write16(0x280f);
+	ModRM(0, to, DISP32);
+	write32(from);
+}
+
+void MOVAPSRtoM(int to, int from) {
+	write16(0x2b0f);
+	ModRM(0, from, DISP32);
+	write32(to);
+}
+
+void MOVAPSRtoR(int to, int from) {
+	write16(0x290f);
+	ModRM(3, to,from);
+}
+
+void ORPSMtoR(int to, int from) {
+	write16(0x560f);
+	ModRM(0, to, DISP32);
+	write32(from);
+}
+
+void ORPSRtoR(int to, int from) {
+	write16(0x560f);
+	ModRM(3, to,from);
+}
+
+void XORPSMtoR(int to, int from) {
+	write16(0x570f);
+	ModRM(0, to, DISP32);
+	write32(from);
+}
+
+void XORPSRtoR(int to, int from) {
+	write16(0x570f);
+	ModRM(3, to,from);
+}
+
+void ANDPSMtoR(int to, int from) {
+	write16(0x540f);
+	ModRM(0, to, DISP32);
+	write32(from);
+}
+
+void ANDPSRtoR(int to, int from) {
+	write16(0x540f);
+	ModRM(3, to,from);
+}
+
+/*
+	3DNOW intructions 
+*/
+
+void PFCMPEQMtoR(int to, int from) {
+	write16(0x0f0f);
+	ModRM(0, to, DISP32); 
+	write32(from); 
+	write8(0xb0);
+}
+
+void PFCMPGTMtoR(int to, int from) {
+	write16(0x0f0f);
+	ModRM(0, to, DISP32); 
+	write32(from); 
+	write8(0xa0);
+}
+
+void PFCMPGEMtoR(int to, int from) {
+	write16(0x0f0f);
+	ModRM(0, to, DISP32); 
+	write32(from); 
+	write8(0x90);
+}
+
+void PFADDMtoR(int to, int from) {
+	write16(0x0f0f);
+	ModRM(0, to, DISP32); 
+	write32(from); 
+	write8(0x9e);
+}
+
+void PFADDRtoR(int to, int from) {
+	write16(0x0f0f);
+	ModRM(3, to, from);
+	write8(0x9e);
+}
+
+void PFSUBMtoR(int to, int from) {
+	write16(0x0f0f);
+	ModRM(0, to, DISP32); 
+	write32(from); 
+	write8(0x9a);
+}
+
+void PFSUBRtoR(int to, int from) {
+	write16(0x0f0f);
+	ModRM(3, to, from); 
+	write8(0x9a);
+}
+
+void PFMULMtoR(int to, int from) {
+	write16(0x0f0f);
+	ModRM(0, to, DISP32); 
+	write32(from); 
+	write8(0xb4);
+}
+
+void PFMULRtoR(int to, int from) {
+	write16(0x0f0f);
+	ModRM(3, to,from); 
+	write8(0xb4);
+}
+
+void PFRCPMtoR(int to, int from) {
+	write16(0x0f0f);
+	ModRM(0, to, DISP32); 
+	write32(from); 
+	write8(0x96);
+}
+
+void PFRCPRtoR(int to, int from) {
+	write16(0x0f0f);
+	ModRM(3, to,from); 
+	write8(0x96);
+}
+
+void PFRCPIT1RtoR(int to, int from) {
+	write16(0x0f0f);
+	ModRM(3, to,from); 
+	write8(0xa6);
+}
+
+void PFRCPIT2RtoR(int to, int from) {
+	write16(0x0f0f);
+	ModRM(3, to,from); 
+	write8(0xb6);
+}
+
+void PFRSQRTRtoR(int to, int from) {
+	write16(0x0f0f);
+	ModRM(3, to,from); 
+	write8(0x97);
+}
+
+void PFRSQIT1RtoR(int to, int from) {
+	write16(0x0f0f);
+	ModRM(3, to,from); 
+	write8(0xa7);
+}
+
+void PF2IDMtoR(int to, int from) {
+	write16(0x0f0f);
+	ModRM(0, to, DISP32); 
+	write32(from); 
+	write8(0x1d);
+}
+
+void PF2IDRtoR(int to, int from) {
+	write16(0x0f0f);
+	ModRM(3, to, from); 
+	write8(0x1d);
+}
+
+void PI2FDMtoR(int to, int from) {
+	write16(0x0f0f);
+	ModRM(0, to, DISP32); 
+	write32(from); 
+	write8(0x0d);
+}
+
+void PI2FDRtoR(int to, int from) {
+	write16(0x0f0f);
+	ModRM(3, to, from); 
+	write8(0x0d);
+}
+
+/*
+	3DNOW Extension intructions 
+*/
+
+void PFMAXMtoR(int to, int from) {
+	write16(0x0f0f);
+	ModRM(0, to, DISP32); 
+	write32(from); 
+	write8(0xa4);
+}
+
+void PFMAXRtoR(int to, int from) {
+	write16(0x0f0f);
+	ModRM(3, to, from); 
+	write8(0xa4);
+}
+
+void PFMINMtoR(int to, int from) {
+	write16(0x0f0f);
+	ModRM(0, to, DISP32); 
+	write32(from); 
+	write8(0x94);
+}
+
+void PFMINRtoR(int to, int from) {
+	write16(0x0f0f);
+	ModRM(3, to, from);
+	write8(0x94);
+}
diff --git a/libpcsxcore/ix86/ix86.h b/libpcsxcore/ix86/ix86.h
new file mode 100644
index 0000000..2b60dff
--- /dev/null
+++ b/libpcsxcore/ix86/ix86.h
@@ -0,0 +1,673 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+/*
+ * ix86 definitions v0.5.1
+ *  Authors: linuzappz <linuzappz@pcsx.net>
+ *           alexey silinov
+ */
+
+#ifndef __IX86_H__
+#define __IX86_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// include basic types
+#include "../psxcommon.h"
+#include "../r3000a.h"
+#include "../psxhle.h"
+
+// x86Flags defines
+#define X86FLAG_FPU			0x00000001
+#define X86FLAG_VME			0x00000002
+#define X86FLAG_DEBUGEXT	0x00000004
+#define X86FLAG_4MPAGE		0x00000008
+#define X86FLAG_TSC			0x00000010
+#define X86FLAG_MSR			0x00000020
+#define X86FLAG_PAE			0x00000040
+#define X86FLAG_MCHKXCP		0x00000080
+#define X86FLAG_CMPXCHG8B	0x00000100
+#define X86FLAG_APIC		0x00000200
+#define X86FLAG_SYSENTER	0x00000800
+#define X86FLAG_MTRR		0x00001000
+#define X86FLAG_GPE			0x00002000
+#define X86FLAG_MCHKARCH	0x00004000
+#define X86FLAG_CMOV		0x00008000
+#define X86FLAG_PAT			0x00010000
+#define X86FLAG_PSE36		0x00020000
+#define X86FLAG_PN			0x00040000
+#define X86FLAG_MMX			0x00800000
+#define X86FLAG_FXSAVE		0x01000000
+#define X86FLAG_SSE			0x02000000
+
+// x86EFlags defines
+
+#define X86EFLAG_MMXEXT		0x00400000
+#define X86EFLAG_3DNOWEXT	0x40000000
+#define X86EFLAG_3DNOW		0x80000000
+
+/* general defines */
+#define write8(val)  *(u8 *)x86Ptr = val; x86Ptr++;
+#define write16(val) *(u16*)x86Ptr = val; x86Ptr+=2;
+#define write32(val) *(u32*)x86Ptr = val; x86Ptr+=4;
+#define write64(val) *(u64*)x86Ptr = val; x86Ptr+=8;
+
+#define EAX 0
+#define EBX 3
+#define ECX 1
+#define EDX 2
+#define ESI 6
+#define EDI 7
+#define EBP 5
+#define ESP 4
+
+#define MM0 0
+#define MM1 1
+#define MM2 2
+#define MM3 3
+#define MM4 4
+#define MM5 5
+#define MM6 6
+#define MM7 7
+
+#define XMM0 0
+#define XMM1 1
+#define XMM2 2
+#define XMM3 3
+#define XMM4 4
+#define XMM5 5
+#define XMM6 6
+#define XMM7 7
+
+extern s8  *x86Ptr;
+extern u8  *j8Ptr[32];
+extern u32 *j32Ptr[32];
+
+void x86Init();
+void x86SetPtr(char *ptr);
+void x86Shutdown();
+
+void x86SetJ8(u8 *j8);
+void x86SetJ32(u32 *j32);
+void x86Align(int bytes);
+
+
+/********************/
+/* IX86 intructions */
+/********************/
+
+/*
+ * scale values:
+ *  0 - *1
+ *  1 - *2
+ *  2 - *4
+ *  3 - *8
+ */
+
+////////////////////////////////////
+// mov instructions                /
+////////////////////////////////////
+
+/* mov r32 to r32 */
+void MOV32RtoR(int to, int from);
+/* mov r32 to m32 */
+void MOV32RtoM(u32 to, int from);
+/* mov m32 to r32 */
+void MOV32MtoR(int to, u32 from);
+/* mov [r32] to r32 */
+void MOV32RmtoR(int to, int from);
+/* mov [r32][r32*scale] to r32 */
+void MOV32RmStoR(int to, int from, int from2, int scale);
+/* mov r32 to [r32] */
+void MOV32RtoRm(int to, int from);
+/* mov r32 to [r32][r32*scale] */
+void MOV32RtoRmS(int to, int to2, int scale, int from);
+/* mov imm32 to r32 */
+void MOV32ItoR(int to, u32 from);
+/* mov imm32 to m32 */
+void MOV32ItoM(u32 to, u32 from);
+
+/* mov r16 to m16 */
+void MOV16RtoM(u32 to, int from);
+/* mov m16 to r16 */
+void MOV16MtoR(int to, u32 from);
+/* mov imm16 to m16 */
+void MOV16ItoM(u32 to, u16 from);
+
+/* mov r8 to m8 */
+void MOV8RtoM(u32 to, int from);
+/* mov m8 to r8 */
+void MOV8MtoR(int to, u32 from);
+/* mov imm8 to m8 */
+void MOV8ItoM(u32 to, u8 from);
+
+/* movsx r8 to r32 */
+void MOVSX32R8toR(int to, int from);
+/* movsx m8 to r32 */
+void MOVSX32M8toR(int to, u32 from);
+/* movsx r16 to r32 */
+void MOVSX32R16toR(int to, int from);
+/* movsx m16 to r32 */
+void MOVSX32M16toR(int to, u32 from);
+
+/* movzx r8 to r32 */
+void MOVZX32R8toR(int to, int from);
+/* movzx m8 to r32 */
+void MOVZX32M8toR(int to, u32 from);
+/* movzx r16 to r32 */
+void MOVZX32R16toR(int to, int from);
+/* movzx m16 to r32 */
+void MOVZX32M16toR(int to, u32 from);
+
+/* cmovne r32 to r32 */
+void CMOVNE32RtoR(int to, int from);
+/* cmovne m32 to r32*/
+void CMOVNE32MtoR(int to, u32 from);
+/* cmove r32 to r32*/
+void CMOVE32RtoR(int to, int from);
+/* cmove m32 to r32*/
+void CMOVE32MtoR(int to, u32 from);
+/* cmovg r32 to r32*/
+void CMOVG32RtoR(int to, int from);
+/* cmovg m32 to r32*/
+void CMOVG32MtoR(int to, u32 from);
+/* cmovge r32 to r32*/
+void CMOVGE32RtoR(int to, int from);
+/* cmovge m32 to r32*/
+void CMOVGE32MtoR(int to, u32 from);
+/* cmovl r32 to r32*/
+void CMOVL32RtoR(int to, int from);
+/* cmovl m32 to r32*/
+void CMOVL32MtoR(int to, u32 from);
+/* cmovle r32 to r32*/
+void CMOVLE32RtoR(int to, int from);
+/* cmovle m32 to r32*/
+void CMOVLE32MtoR(int to, u32 from);
+
+////////////////////////////////////
+// arithmetic instructions         /
+////////////////////////////////////
+
+/* add imm32 to r32 */
+void ADD32ItoR(int to, u32 from);
+/* add imm32 to m32 */
+void ADD32ItoM(u32 to, u32 from);
+/* add r32 to r32 */
+void ADD32RtoR(int to, int from);
+/* add r32 to m32 */
+void ADD32RtoM(u32 to, int from);
+/* add m32 to r32 */
+void ADD32MtoR(int to, u32 from);
+
+/* adc imm32 to r32 */
+void ADC32ItoR(int to, u32 from);
+/* adc r32 to r32 */
+void ADC32RtoR(int to, int from);
+/* adc m32 to r32 */
+void ADC32MtoR(int to, u32 from);
+
+/* inc r32 */
+void INC32R(int to);
+/* inc m32 */
+void INC32M(u32 to);
+
+/* sub imm32 to r32 */
+void SUB32ItoR(int to, u32 from);
+/* sub r32 to r32 */
+void SUB32RtoR(int to, int from);
+/* sub m32 to r32 */
+void SUB32MtoR(int to, u32 from);
+
+/* sbb imm32 to r32 */
+void SBB32ItoR(int to, u32 from);
+/* sbb r32 to r32 */
+void SBB32RtoR(int to, int from);
+/* sbb m32 to r32 */
+void SBB32MtoR(int to, u32 from);
+
+/* dec r32 */
+void DEC32R(int to);
+/* dec m32 */
+void DEC32M(u32 to);
+
+/* mul eax by r32 to edx:eax */
+void MUL32R(int from);
+/* mul eax by m32 to edx:eax */
+void MUL32M(u32 from);
+
+/* imul eax by r32 to edx:eax */
+void IMUL32R(int from);
+/* imul eax by m32 to edx:eax */
+void IMUL32M(u32 from);
+/* imul r32 by r32 to r32 */
+void IMUL32RtoR(int to, int from);
+
+/* div eax by r32 to edx:eax */
+void DIV32R(int from);
+/* div eax by m32 to edx:eax */
+void DIV32M(u32 from);
+
+/* idiv eax by r32 to edx:eax */
+void IDIV32R(int from);
+/* idiv eax by m32 to edx:eax */
+void IDIV32M(u32 from);
+
+////////////////////////////////////
+// shifting instructions           /
+////////////////////////////////////
+
+/* shl imm8 to r32 */
+void SHL32ItoR(int to, u8 from);
+/* shl cl to r32 */
+void SHL32CLtoR(int to);
+
+/* shr imm8 to r32 */
+void SHR32ItoR(int to, u8 from);
+/* shr cl to r32 */
+void SHR32CLtoR(int to);
+
+/* sar imm8 to r32 */
+void SAR32ItoR(int to, u8 from);
+/* sar cl to r32 */
+void SAR32CLtoR(int to);
+
+/* sal imm8 to r32 */
+#define SAL32ItoR SHL32ItoR
+/* sal cl to r32 */
+#define SAL32CLtoR SHL32CLtoR
+
+// logical instructions
+
+/* or imm32 to r32 */
+void OR32ItoR(int to, u32 from);
+/* or imm32 to m32 */
+void OR32ItoM(u32 to, u32 from);
+/* or r32 to r32 */
+void OR32RtoR(int to, int from);
+/* or r32 to m32 */
+void OR32RtoM(u32 to, int from);
+/* or m32 to r32 */
+void OR32MtoR(int to, u32 from);
+
+/* xor imm32 to r32 */
+void XOR32ItoR(int to, u32 from);
+/* xor imm32 to m32 */
+void XOR32ItoM(u32 to, u32 from);
+/* xor r32 to r32 */
+void XOR32RtoR(int to, int from);
+/* xor r32 to m32 */
+void XOR32RtoM(u32 to, int from);
+/* xor m32 to r32 */
+void XOR32MtoR(int to, u32 from);
+
+/* and imm32 to r32 */
+void AND32ItoR(int to, u32 from);
+/* and imm32 to m32 */
+void AND32ItoM(u32 to, u32 from);
+/* and r32 to r32 */
+void AND32RtoR(int to, int from);
+/* and r32 to m32 */
+void AND32RtoM(u32 to, int from);
+/* and m32 to r32 */
+void AND32MtoR(int to, u32 from);
+
+/* not r32 */
+void NOT32R(int from);
+/* neg r32 */
+void NEG32R(int from);
+
+////////////////////////////////////
+// jump instructions               /
+////////////////////////////////////
+
+/* jmp rel8 */
+u8*  JMP8(u8 to);
+
+/* jmp rel32 */
+u32* JMP32(u32 to);
+/* jmp r32 */
+void JMP32R(int to);
+
+/* je rel8 */
+u8*  JE8(u8 to);
+/* jz rel8 */
+u8*  JZ8(u8 to);
+/* jg rel8 */
+u8*  JG8(u8 to);
+/* jge rel8 */
+u8*  JGE8(u8 to);
+/* jl rel8 */
+u8*  JL8(u8 to);
+/* jle rel8 */
+u8*  JLE8(u8 to);
+/* jne rel8 */
+u8*  JNE8(u8 to);
+/* jnz rel8 */
+u8*  JNZ8(u8 to);
+/* jng rel8 */
+u8*  JNG8(u8 to);
+/* jnge rel8 */
+u8*  JNGE8(u8 to);
+/* jnl rel8 */
+u8*  JNL8(u8 to);
+/* jnle rel8 */
+u8*  JNLE8(u8 to);
+/* jo rel8 */
+u8*  JO8(u8 to);
+/* jno rel8 */
+u8*  JNO8(u8 to);
+
+/* je rel32 */
+u32* JE32(u32 to);
+/* jz rel32 */
+u32* JZ32(u32 to);
+/* jg rel32 */
+u32* JG32(u32 to);
+/* jge rel32 */
+u32* JGE32(u32 to);
+/* jl rel32 */
+u32* JL32(u32 to);
+/* jle rel32 */
+u32* JLE32(u32 to);
+/* jne rel32 */
+u32* JNE32(u32 to);
+/* jnz rel32 */
+u32* JNZ32(u32 to);
+/* jng rel32 */
+u32* JNG32(u32 to);
+/* jnge rel32 */
+u32* JNGE32(u32 to);
+/* jnl rel32 */
+u32* JNL32(u32 to);
+/* jnle rel32 */
+u32* JNLE32(u32 to);
+/* jo rel32 */
+u32* JO32(u32 to);
+/* jno rel32 */
+u32* JNO32(u32 to);
+
+/* call func */
+void CALLFunc(u32 func); // based on CALL32
+/* call rel32 */
+void CALL32(u32 to);
+/* call r32 */
+void CALL32R(int to);
+/* call m32 */
+void CALL32M(u32 to);
+
+////////////////////////////////////
+// misc instructions               /
+////////////////////////////////////
+
+/* cmp imm32 to r32 */
+void CMP32ItoR(int to, u32 from);
+/* cmp imm32 to m32 */
+void CMP32ItoM(u32 to, u32 from);
+/* cmp r32 to r32 */
+void CMP32RtoR(int to, int from);
+/* cmp m32 to r32 */
+void CMP32MtoR(int to, u32 from);
+
+/* test imm32 to r32 */
+void TEST32ItoR(int to, u32 from);
+/* test r32 to r32 */
+void TEST32RtoR(int to, int from);
+/* sets r8 */
+void SETS8R(int to);
+/* setl r8 */
+void SETL8R(int to);
+/* setb r8 */
+void SETB8R(int to);
+
+/* cbw */
+void CBW();
+/* cwd */
+void CWD();
+/* cdq */
+void CDQ();
+
+/* push r32 */
+void PUSH32R(int from);
+/* push m32 */
+void PUSH32M(u32 from);
+/* push imm32 */
+void PUSH32I(u32 from);
+
+/* pop r32 */
+void POP32R(int from);
+
+/* pushad */
+void PUSHA32();
+/* popad */
+void POPA32();
+
+/* ret */
+void RET();
+
+/********************/
+/* FPU instructions */
+/********************/
+
+/* fild m32 to fpu reg stack */
+void FILD32(u32 from);
+/* fistp m32 from fpu reg stack */
+void FISTP32(u32 from);
+/* fld m32 to fpu reg stack */
+void FLD32(u32 from);
+/* fstp m32 from fpu reg stack */
+void FSTP32(u32 to);
+
+/* fldcw fpu control word from m16 */
+void FLDCW(u32 from);
+/* fstcw fpu control word to m16 */
+void FNSTCW(u32 to);
+
+/* fadd m32 to fpu reg stack */
+void FADD32(u32 from);
+/* fsub m32 to fpu reg stack */
+void FSUB32(u32 from);
+/* fmul m32 to fpu reg stack */
+void FMUL32(u32 from);
+/* fdiv m32 to fpu reg stack */
+void FDIV32(u32 from);
+/* fabs fpu reg stack */
+void FABS();
+/* fsqrt fpu reg stack */
+void FSQRT();
+/* fchs fpu reg stack */
+void FCHS();
+
+/********************/
+/* MMX instructions */
+/********************/
+
+// r64 = mm
+
+/* movq m64 to r64 */
+void MOVQMtoR(int to, u32 from);
+/* movq r64 to m64 */
+void MOVQRtoM(u32 to, int from);
+
+/* pand r64 to r64 */
+void PANDRtoR(int to, int from);
+/* pand m64 to r64 */
+void PANDMtoR(int to, u32 from);
+
+/* pandn r64 to r64 */
+void PANDNRtoR(int to, int from);
+
+/* pandn r64 to r64 */
+void PANDNMtoR(int to, u32 from);
+
+/* por r64 to r64 */
+void PORRtoR(int to, int from);
+/* por m64 to r64 */
+void PORMtoR(int to, u32 from);
+
+/* pxor r64 to r64 */
+void PXORRtoR(int to, int from);
+/* pxor m64 to r64 */
+void PXORMtoR(int to, u32 from);
+
+/* psllq r64 to r64 */
+void PSLLQRtoR(int to, int from);
+/* psllq m64 to r64 */
+void PSLLQMtoR(int to, u32 from);
+/* psllq imm8 to r64 */
+void PSLLQItoR(int to, u8 from);
+
+/* psrlq r64 to r64 */
+void PSRLQRtoR(int to, int from);
+/* psrlq m64 to r64 */
+void PSRLQMtoR(int to, u32 from);
+/* psrlq imm8 to r64 */
+void PSRLQItoR(int to, u8 from);
+
+/* paddusb r64 to r64 */
+void PADDUSBRtoR(int to, int from);
+/* paddusb m64 to r64 */
+void PADDUSBMtoR(int to, u32 from);
+/* paddusw r64 to r64 */
+void PADDUSWRtoR(int to, int from);
+/* paddusw m64 to r64 */
+void PADDUSWMtoR(int to, u32 from);
+
+/* paddb r64 to r64 */
+void PADDBRtoR(int to, int from);
+/* paddb m64 to r64 */
+void PADDBMtoR(int to, u32 from);
+/* paddw r64 to r64 */
+void PADDWRtoR(int to, int from);
+/* paddw m64 to r64 */
+void PADDWMtoR(int to, u32 from);
+/* paddd r64 to r64 */
+void PADDDRtoR(int to, int from);
+/* paddd m64 to r64 */
+void PADDDMtoR(int to, u32 from);
+
+/* emms */
+void EMMS();
+void FEMMS();
+void BT32ItoR(int to,int from);
+void RCR32ItoR(int to,int from);
+
+//Basara:changed
+void PADDSBRtoR(int to, int from);
+void PADDSWRtoR(int to, int from);
+void PADDSDRtoR(int to, int from);
+void PSUBSBRtoR(int to, int from); 
+void PSUBSWRtoR(int to, int from);
+void PSUBSDRtoR(int to, int from);
+
+void PSUBBRtoR(int to, int from);
+void PSUBWRtoR(int to, int from);
+void PSUBDRtoR(int to, int from);
+
+void MOVQ64ItoR(int reg,u64 i); //Prototype.Todo add all consts to end of block.not after jr $+8
+
+void PMAXSWRtoR(int to,int from);
+void PMINSWRtoR(int to,int from);
+
+void PCMPEQBRtoR(int to,int from);
+void PCMPEQWRtoR(int to,int from);
+void PCMPEQDRtoR(int to,int from);
+
+void PCMPGTBRtoR(int to,int from);
+void PCMPGTWRtoR(int to,int from);
+void PCMPGTDRtoR(int to,int from);
+
+void PSRLWItoR(int to,int from);
+void PSRLDItoR(int to,int from);
+void PSLLWItoR(int to,int from);
+void PSLLDItoR(int to,int from);
+void PSRAWItoR(int to,int from);
+void PSRADItoR(int to,int from);
+
+//Added:basara 11.01.2003
+void FCOMP32(u32 from);
+void FNSTSWtoAX();
+void SETNZ8R(int to);
+
+//Added:basara 14.01.2003
+void PFCMPEQMtoR(int to,int from);
+void PFCMPGTMtoR(int to,int from);
+void PFCMPGEMtoR(int to,int from);
+
+void PFADDMtoR(int to,int from);
+void PFADDRtoR(int to,int from);
+
+void PFSUBMtoR(int to,int from);
+void PFSUBRtoR(int to,int from);
+
+void PFMULMtoR(int to,int from);
+void PFMULRtoR(int to,int from);
+
+void PFRCPMtoR(int to,int from);
+void PFRCPRtoR(int to,int from);
+void PFRCPIT1RtoR(int to,int from);
+void PFRCPIT2RtoR(int to,int from);
+
+void PFRSQRTRtoR(int to,int from);
+void PFRSQIT1RtoR(int to,int from);
+
+void PF2IDMtoR(int to,int from);
+void PF2IDRtoR(int to,int from);
+void PI2FDMtoR(int to,int from);
+void PI2FDRtoR(int to,int from);
+
+void PFMAXMtoR(int to,int from);
+void PFMAXRtoR(int to,int from);
+void PFMINMtoR(int to,int from);
+void PFMINRtoR(int to,int from);
+
+void MOVDMtoR(int to, u32 from);
+void MOVDRtoM(u32 to, int from);
+void MOVD32RtoR(int to, int from);
+void MOVD64RtoR(int to, int from);
+
+void MOVQRtoR(int to,int from);
+
+//if to==from MMLO=MMHI
+void PUNPCKHDQRtoR(int to,int from);
+
+//if to==from MMHI=MMLO
+void PUNPCKLDQRtoR(int to,int from);
+
+/*
+	SSE	intructions 
+*/
+void MOVAPSMtoR(int to,int from);
+void MOVAPSRtoM(int to,int from);
+void MOVAPSRtoR(int to,int from);
+
+void ORPSMtoR(int to,int from);
+void ORPSRtoR(int to,int from);
+
+void XORPSMtoR(int to,int from);
+void XORPSRtoR(int to,int from);
+
+void ANDPSMtoR(int to,int from);
+void ANDPSRtoR(int to,int from);
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/libpcsxcore/ix86_64/README b/libpcsxcore/ix86_64/README
new file mode 100644
index 0000000..af24e37
--- /dev/null
+++ b/libpcsxcore/ix86_64/README
@@ -0,0 +1,2 @@
+This is the AMD64 dynamic recompiler.
+Made from opcodes from PCSX2 0.9.3 and the x86 recompiler modified to fit.  ie. currently no AMD64/SSE specific code advantages.
diff --git a/libpcsxcore/ix86_64/iGte.h b/libpcsxcore/ix86_64/iGte.h
new file mode 100644
index 0000000..bcb2f4b
--- /dev/null
+++ b/libpcsxcore/ix86_64/iGte.h
@@ -0,0 +1,79 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+#ifndef __IGTE_H__
+#define __IGTE_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "../r3000a.h"
+#include "../psxmem.h"
+
+#define CP2_FUNC(f) \
+void gte##f(); \
+static void rec##f() { \
+	iFlushRegs(); \
+	MOV32ItoM((uptr)&psxRegs.code, (u32)psxRegs.code); \
+	CALLFunc((uptr)gte##f); \
+/*	branch = 2; */\
+}
+
+#define CP2_FUNCNC(f) \
+void gte##f(); \
+static void rec##f() { \
+	iFlushRegs(); \
+	CALLFunc((uptr)gte##f); \
+/*	branch = 2; */\
+}
+
+CP2_FUNC(MFC2);
+CP2_FUNC(MTC2);
+CP2_FUNC(CFC2);
+CP2_FUNC(CTC2);
+CP2_FUNC(LWC2);
+CP2_FUNC(SWC2);
+CP2_FUNCNC(RTPS);
+CP2_FUNC(OP);
+CP2_FUNCNC(NCLIP);
+CP2_FUNC(DPCS);
+CP2_FUNC(INTPL);
+CP2_FUNC(MVMVA);
+CP2_FUNCNC(NCDS);
+CP2_FUNCNC(NCDT);
+CP2_FUNCNC(CDP);
+CP2_FUNCNC(NCCS);
+CP2_FUNCNC(CC);
+CP2_FUNCNC(NCS);
+CP2_FUNCNC(NCT);
+CP2_FUNC(SQR);
+CP2_FUNC(DCPL);
+CP2_FUNCNC(DPCT);
+CP2_FUNCNC(AVSZ3);
+CP2_FUNCNC(AVSZ4);
+CP2_FUNCNC(RTPT);
+CP2_FUNC(GPF);
+CP2_FUNC(GPL);
+CP2_FUNCNC(NCCT);
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/libpcsxcore/ix86_64/iR3000A-64.c b/libpcsxcore/ix86_64/iR3000A-64.c
new file mode 100644
index 0000000..4ca3e99
--- /dev/null
+++ b/libpcsxcore/ix86_64/iR3000A-64.c
@@ -0,0 +1,2963 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+/*
+* i386 assembly functions for R3000A core.
+*/
+
+#include "ix86-64.h"
+#include "../r3000a.h"
+#include "../psxhle.h"
+
+#include <sys/mman.h>
+
+#ifndef MAP_ANONYMOUS
+#define MAP_ANONYMOUS MAP_ANON
+#endif
+
+uptr* psxRecLUT;
+
+#define PTRMULT (sizeof(uptr) / sizeof(u32))
+
+#undef PC_REC
+#undef PC_REC8
+#undef PC_REC16
+#undef PC_REC32
+#define PC_REC(x)	(psxRecLUT[(x) >> 16] + PTRMULT * ((x) & 0xffff))
+#define PC_RECP(x) (*(uptr *)PC_REC(x))
+
+#define RECMEM_SIZE		(PTRMULT * 8 * 1024 * 1024)
+
+static char *recMem;	/* the recompiled blocks will be here */
+static char *recRAM;	/* and the ptr to the blocks here */
+static char *recROM;	/* and here */
+
+static u32 pc;			/* recompiler pc */
+static u32 pcold;		/* recompiler oldpc */
+static int count;		/* recompiler intruction count */
+static int branch;		/* set for branch */
+static u32 target;		/* branch target */
+static u32 resp;
+
+typedef struct {
+	int state;
+	u32 k;
+	int reg;
+} iRegisters;
+
+static iRegisters iRegs[32];
+static iRegisters iRegsS[32];
+
+#define ST_UNK    0
+#define ST_CONST  1
+#define ST_MAPPED 2
+
+#define IsConst(reg)  (iRegs[reg].state == ST_CONST)
+#define IsMapped(reg) (iRegs[reg].state == ST_MAPPED)
+
+static void (*recBSC[64])();
+static void (*recSPC[64])();
+static void (*recREG[32])();
+static void (*recCP0[32])();
+static void (*recCP2[64])();
+static void (*recCP2BSC[32])();
+
+#define STACKSIZE		0x18
+static void StackRes()
+{
+#ifdef __x86_64__
+	ADD64ItoR(RSP, STACKSIZE);
+#else
+	if (resp) ADD32ItoR(ESP, resp);
+#endif
+}
+
+static void MapConst(int reg, u32 _const) {
+	iRegs[reg].k = _const;
+	iRegs[reg].state = ST_CONST;
+}
+
+static void iFlushReg(int reg) {
+	if (IsConst(reg)) {
+		MOV32ItoM((uptr)&psxRegs.GPR.r[reg], iRegs[reg].k);
+	}
+	iRegs[reg].state = ST_UNK;
+}
+
+static void iFlushRegs() {
+	int i;
+
+	for (i=1; i<32; i++) {
+		iFlushReg(i);
+	}
+}
+
+static void iRet() {
+	/* store cycle */
+	count = ((pc - pcold) / 4) * BIAS;
+	ADD32ItoM((uptr)&psxRegs.cycle, count);
+	StackRes();
+	RET();
+}
+
+static int iLoadTest() {
+	u32 tmp;
+
+	// check for load delay
+	tmp = psxRegs.code >> 26;
+	switch (tmp) {
+		case 0x10: // COP0
+			switch (_Rs_) {
+				case 0x00: // MFC0
+				case 0x02: // CFC0
+					return 1;
+			}
+			break;
+		case 0x12: // COP2
+			switch (_Funct_) {
+				case 0x00:
+					switch (_Rs_) {
+						case 0x00: // MFC2
+						case 0x02: // CFC2
+							return 1;
+					}
+					break;
+			}
+			break;
+		case 0x32: // LWC2
+			return 1;
+		default:
+			if (tmp >= 0x20 && tmp <= 0x26) { // LB/LH/LWL/LW/LBU/LHU/LWR
+				return 1;
+			}
+			break;
+	}
+	return 0;
+}
+
+/* set a pending branch */
+static void SetBranch() {
+	branch = 1;
+	psxRegs.code = PSXMu32(pc);
+	pc+=4;
+
+	if (iLoadTest() == 1) {
+		iFlushRegs();
+		MOV32ItoM((uptr)&psxRegs.code, psxRegs.code);
+		/* store cycle */
+		count = ((pc - pcold) / 4) * BIAS;
+		ADD32ItoM((uptr)&psxRegs.cycle, count);
+
+		//PUSH64M((uptr)&target);
+		MOV32MtoR(X86ARG2, (uptr)&target);
+		//PUSHI(_Rt_);
+		MOV64ItoR(X86ARG1, _Rt_);
+		CALLFunc((uptr)psxDelayTest);
+		StackRes();
+		RET();
+		return;
+	}
+
+	recBSC[psxRegs.code>>26]();
+
+	iFlushRegs();
+	MOV32MtoR(EAX, (uptr)&target);
+	MOV32RtoM((uptr)&psxRegs.pc, EAX);
+	CALLFunc((uptr)psxBranchTest);
+
+	iRet();
+}
+
+static void iJump(u32 branchPC) {
+	branch = 1;
+	psxRegs.code = PSXMu32(pc);
+	pc+=4;
+
+	if (iLoadTest() == 1) {
+		iFlushRegs();
+		MOV32ItoM((uptr)&psxRegs.code, psxRegs.code);
+		/* store cycle */
+		count = ((pc - pcold) / 4) * BIAS;
+		ADD32ItoM((uptr)&psxRegs.cycle, count);
+
+		//PUSHI(branchPC);
+		MOV64ItoR(X86ARG2, branchPC);
+		//PUSHI(_Rt_);
+		MOV64ItoR(X86ARG1, _Rt_);
+		CALLFunc((uptr)psxDelayTest);
+		//ADD32ItoR(ESP, 2*8);
+		StackRes();
+		RET();
+		return;
+	}
+
+	recBSC[psxRegs.code>>26]();
+
+	iFlushRegs();
+	MOV32ItoM((uptr)&psxRegs.pc, branchPC);
+	CALLFunc((uptr)psxBranchTest);
+	/* store cycle */
+	count = ((pc - pcold) / 4) * BIAS;
+	ADD32ItoM((uptr)&psxRegs.cycle, count);
+	StackRes();
+
+		RET();
+	//* XXX?
+	// maybe just happened an interruption, check so
+	CMP32ItoM((uptr)&psxRegs.pc, branchPC);
+	j8Ptr[0] = JE8(0);
+
+	RET();
+
+	x86SetJ8(j8Ptr[0]);
+	MOV64MtoR(RAX, PC_REC(branchPC));
+	TEST64RtoR(RAX,RAX);
+	j8Ptr[1] = JNE8(0);
+
+	RET();
+
+	x86SetJ8(j8Ptr[1]);
+
+	RET();
+	//JMP32R(EAX);
+	JMPR(EAX);
+	//*/
+}
+
+static void iBranch(u32 branchPC, int savectx) {
+	u32 respold=0;
+
+	if (savectx) {
+		respold = resp;
+		memcpy(iRegsS, iRegs, sizeof(iRegs));
+	}
+
+	branch = 1;
+	psxRegs.code = PSXMu32(pc);
+
+	// the delay test is only made when the branch is taken
+	// savectx == 0 will mean that :)
+	if (savectx == 0 && iLoadTest() == 1) {
+		iFlushRegs();
+		MOV32ItoM((uptr)&psxRegs.code, psxRegs.code);
+		/* store cycle */
+		count = (((pc+4) - pcold) / 4) * BIAS;
+		ADD32ItoM((uptr)&psxRegs.cycle, count);
+		//if (resp) ADD32ItoR(ESP, resp);
+
+		//PUSHI(branchPC);
+		MOV64ItoR(X86ARG2, branchPC);
+		//PUSHI(_Rt_);
+		MOV64ItoR(X86ARG1,_Rt_);
+		CALLFunc((uptr)psxDelayTest);
+		StackRes();
+		RET();
+		return;
+	}
+
+	pc+= 4;
+	recBSC[psxRegs.code>>26]();
+
+	iFlushRegs();
+	MOV32ItoM((uptr)&psxRegs.pc, branchPC);
+	CALLFunc((uptr)psxBranchTest);
+	/* store cycle */
+	count = ((pc - pcold) / 4) * BIAS;
+	ADD32ItoM((uptr)&psxRegs.cycle, count);
+	
+	StackRes();
+
+	// maybe just happened an interruption, check so
+	CMP32ItoM((uptr)&psxRegs.pc, branchPC);
+	j8Ptr[1] = JE8(0);
+
+	RET();
+
+	x86SetJ8(j8Ptr[1]);
+	MOV64MtoR(RAX, PC_REC(branchPC));
+	TEST64RtoR(RAX, RAX);
+	j8Ptr[2] = JNE8(0);
+
+	RET();
+
+	x86SetJ8(j8Ptr[2]);
+	//JMP32R(EAX);
+	JMPR(EAX);
+
+	pc-= 4;
+	if (savectx) {
+		resp = respold;
+		memcpy(iRegs, iRegsS, sizeof(iRegs));
+	}
+}
+
+
+char *txt0 = "EAX = %x : ECX = %x : EDX = %x\n";
+char *txt1 = "EAX = %x\n";
+char *txt2 = "M32 = %x\n";
+
+/*
+void iLogX86() {
+	PUSHA32();
+
+	PUSH32R  (EDX);
+	PUSH32R  (ECX);
+	PUSH32R  (EAX);
+	PUSH32M  ((uptr)&txt0);
+	CALLFunc((uptr)SysPrintf);
+	ADD32ItoR(ESP, 4*4);
+
+	POPA32();
+}
+*/
+
+void iLogEAX() {
+	PUSH64R  (EAX);
+	PUSH64M  ((uptr)&txt1);
+	CALLFunc((uptr)SysPrintf);
+	ADD32ItoR(ESP, 8*2);
+}
+
+void iLogM32(u32 mem) {
+	PUSH64M  (mem);
+	PUSH64M  ((uptr)&txt2);
+	CALLFunc((uptr)SysPrintf);
+	ADD32ItoR(ESP, 8*2);
+}
+
+static void iDumpRegs() {
+	int i, j;
+
+	printf("%x %x\n", psxRegs.pc, psxRegs.cycle);
+	for (i = 0; i < 4; i++) {
+		for (j = 0; j < 8; j++)
+			printf("%x ", psxRegs.GPR.r[j*i]);
+		printf("\n");
+	}
+}
+
+void iDumpBlock(char *ptr) {
+	FILE *f;
+	u32 i;
+
+	SysPrintf("dump1 %x:%x, %x\n", psxRegs.pc, pc, psxRegs.cycle);
+
+	for (i = psxRegs.pc; i < pc; i+=4)
+		SysPrintf("%s\n", disR3000AF(PSXMu32(i), i));
+
+	fflush(stdout);
+	f = fopen("dump1", "w");
+	fwrite(ptr, 1, (uptr)x86Ptr - (uptr)ptr, f);
+	fclose(f);
+	//system("ndisasm -b64 dump1");
+	fflush(stdout);
+}
+
+#define REC_FUNC(f) \
+void psx##f(); \
+static void rec##f() { \
+	iFlushRegs(); \
+	MOV32ItoM((uptr)&psxRegs.code, (u32)psxRegs.code); \
+	MOV32ItoM((uptr)&psxRegs.pc, (u32)pc); \
+	CALLFunc((uptr)psx##f); \
+/*	branch = 2; */\
+}
+
+#define REC_SYS(f) \
+void psx##f(); \
+static void rec##f() { \
+	iFlushRegs(); \
+	MOV32ItoM((uptr)&psxRegs.code, (u32)psxRegs.code); \
+	MOV32ItoM((uptr)&psxRegs.pc, (u32)pc); \
+	CALLFunc((uptr)psx##f); \
+	branch = 2; \
+	iRet(); \
+}
+
+#define REC_BRANCH(f) \
+void psx##f(); \
+static void rec##f() { \
+	iFlushRegs(); \
+	MOV32ItoM((uptr)&psxRegs.code, (u32)psxRegs.code); \
+	MOV32ItoM((uptr)&psxRegs.pc, (u32)pc); \
+	CALLFunc((uptr)psx##f); \
+	branch = 2; \
+	iRet(); \
+}
+
+static void recRecompile();
+
+static int recInit() {
+	int i;
+
+	psxRecLUT = (uptr*) malloc(0x010000 * sizeof(uptr));
+
+	recMem = mmap(0,
+		RECMEM_SIZE + PTRMULT*0x1000,
+		PROT_EXEC | PROT_WRITE | PROT_READ, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
+
+	recRAM = mmap(0,
+		0x280000*PTRMULT,
+		PROT_WRITE | PROT_READ, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
+	recROM = &recRAM[0x200000*PTRMULT];
+
+	if (recRAM == NULL || recROM == NULL || recMem == NULL || psxRecLUT == NULL) {
+		SysMessage("Error allocating memory"); return -1;
+	}
+	memset(recMem, 0, RECMEM_SIZE);
+	memset(recRAM, 0, 0x200000 * PTRMULT);
+	memset(recROM, 0, 0x080000 * PTRMULT);
+
+	for (i=0; i<0x80; i++) psxRecLUT[i + 0x0000] = (uptr)&recRAM[PTRMULT*((i & 0x1f) << 16)];
+	memcpy(psxRecLUT + 0x8000, psxRecLUT, 0x80 * sizeof(uptr));
+	memcpy(psxRecLUT + 0xa000, psxRecLUT, 0x80 * sizeof(uptr));
+
+	for (i=0; i<0x08; i++) psxRecLUT[i + 0xbfc0] = (uptr)&recROM[PTRMULT*(i << 16)];
+
+	return 0;
+}
+
+static void recReset() {
+	memset(recRAM, 0, 0x200000 * PTRMULT);
+	memset(recROM, 0, 0x080000 * PTRMULT);
+
+	//x86Init();
+	cpudetectInit();
+	x86SetPtr(recMem);
+
+	branch = 0;
+	memset(iRegs, 0, sizeof(iRegs));
+	iRegs[0].state = ST_CONST;
+	iRegs[0].k     = 0;
+}
+
+static void recShutdown() {
+	if (recMem == NULL) return;
+	free(psxRecLUT);
+	munmap(recMem, RECMEM_SIZE + PTRMULT*0x1000);
+	munmap(recRAM, 0x280000*PTRMULT);
+	x86Shutdown();
+}
+
+static void recError() {
+	SysReset();
+	ClosePlugins();
+	SysMessage("Unrecoverable error while running recompiler\n");
+	SysRunGui();
+}
+
+/*__inline*/ static void execute() {
+	void (*recFunc)();
+	uptr *p;
+
+	p = (uptr *)PC_REC(psxRegs.pc);
+	// if (!p) { recError(); return; }
+
+	if (*p == 0) {
+		recRecompile();
+	}
+
+	if (*p < (uptr)recMem || *p >= (uptr)recMem + RECMEM_SIZE)
+	{
+		recError();
+		return;
+	}
+	recFunc = (void (*)())*p;
+	(*recFunc)();
+}
+
+static void recExecute() {
+	for (;;) execute();
+}
+
+static void recExecuteBlock() {
+	execute();
+}
+
+static void recClear(u32 Addr, u32 Size) {
+	memset((void*)PC_REC(Addr), 0, Size * sizeof(uptr));
+}
+
+static void recNULL() {
+//	SysMessage("recUNK: %8.8x\n", psxRegs.code);
+}
+
+/*********************************************************
+* goes to opcodes tables...                              *
+* Format:  table[something....]                          *
+*********************************************************/
+
+//REC_SYS(SPECIAL);
+#if 1
+static void recSPECIAL() {
+	recSPC[_Funct_]();
+}
+#endif
+
+static void recREGIMM() {
+	recREG[_Rt_]();
+}
+
+static void recCOP0() {
+	recCP0[_Rs_]();
+}
+
+//REC_SYS(COP2);
+#if 1
+static void recCOP2() {
+	recCP2[_Funct_]();
+}
+#endif
+
+static void recBASIC() {
+	recCP2BSC[_Rs_]();
+}
+
+//end of Tables opcodes...
+
+/*********************************************************
+* Arithmetic with immediate operand                      *
+* Format:  OP rt, rs, immediate                          *
+*********************************************************/
+
+#if 0
+REC_FUNC(ADDI);
+REC_FUNC(ADDIU);
+REC_FUNC(ANDI);
+REC_FUNC(ORI);
+REC_FUNC(XORI);
+REC_FUNC(SLTI);
+REC_FUNC(SLTIU);
+#endif
+
+#if 1
+static void recADDIU()  {
+// Rt = Rs + Im
+	if (!_Rt_) return;
+
+//	iFlushRegs();
+
+	if (_Rs_ == _Rt_) {
+		if (IsConst(_Rt_)) {
+			iRegs[_Rt_].k+= _Imm_;
+		} else {
+			if (_Imm_ == 1) {
+				INC32M((uptr)&psxRegs.GPR.r[_Rt_]);
+			} else if (_Imm_ == -1) {
+				DEC32M((uptr)&psxRegs.GPR.r[_Rt_]);
+			} else if (_Imm_) {
+				ADD32ItoM((uptr)&psxRegs.GPR.r[_Rt_], _Imm_);
+			}
+		}
+	} else {
+		if (IsConst(_Rs_)) {
+			MapConst(_Rt_, iRegs[_Rs_].k + _Imm_);
+		} else {
+			iRegs[_Rt_].state = ST_UNK;
+
+			MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]);
+			if (_Imm_ == 1) { 
+				INC32R(EAX);
+			} else if (_Imm_ == -1) {
+				DEC32R(EAX);
+			} else if (_Imm_) {
+				ADD32ItoR(EAX, _Imm_);
+			}
+			MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX);
+		}
+	}
+}
+
+static void recADDI()  {
+// Rt = Rs + Im
+	recADDIU();
+}
+
+static void recSLTI() {
+// Rt = Rs < Im (signed)
+	if (!_Rt_) return;
+
+//	iFlushRegs();
+
+	if (IsConst(_Rs_)) {
+		MapConst(_Rt_, (s32)iRegs[_Rs_].k < _Imm_);
+	} else {
+		iRegs[_Rt_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]);
+	    CMP32ItoR(EAX, _Imm_);
+	    SETL8R   (EAX);
+	    AND32ItoR(EAX, 0xff);
+		MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX);
+	}
+}
+
+static void recSLTIU() {
+// Rt = Rs < Im (unsigned)
+	if (!_Rt_) return;
+
+//	iFlushRegs();
+
+	if (IsConst(_Rs_)) {
+		MapConst(_Rt_, iRegs[_Rs_].k < _ImmU_);
+	} else {
+		iRegs[_Rt_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]);
+	    CMP32ItoR(EAX, _Imm_);
+	    SETB8R   (EAX);
+	    AND32ItoR(EAX, 0xff);
+		MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX);
+	}
+}
+
+static void recANDI() {
+// Rt = Rs And Im
+	if (!_Rt_) return;
+
+//	iFlushRegs();
+
+	if (_Rs_ == _Rt_) {
+		if (IsConst(_Rt_)) {
+			iRegs[_Rt_].k&= _ImmU_;
+		} else {
+			AND32ItoM((uptr)&psxRegs.GPR.r[_Rt_], _ImmU_);
+		}
+	} else {
+		if (IsConst(_Rs_)) {
+			MapConst(_Rt_, iRegs[_Rs_].k & _ImmU_);
+		} else {
+			iRegs[_Rt_].state = ST_UNK;
+
+			MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]);
+			AND32ItoR(EAX, _ImmU_);
+			MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX);
+		}
+	}
+}
+
+static void recORI() {
+// Rt = Rs Or Im
+	if (!_Rt_) return;
+
+//	iFlushRegs();
+
+	if (_Rs_ == _Rt_) {
+		if (IsConst(_Rt_)) {
+			iRegs[_Rt_].k|= _ImmU_;
+		} else {
+			OR32ItoM((uptr)&psxRegs.GPR.r[_Rt_], _ImmU_);
+		}
+	} else {
+		if (IsConst(_Rs_)) {
+			MapConst(_Rt_, iRegs[_Rs_].k | _ImmU_);
+		} else {
+			iRegs[_Rt_].state = ST_UNK;
+
+			MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]);
+			if (_ImmU_) OR32ItoR (EAX, _ImmU_);
+			MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX);
+		}
+	}
+}
+
+static void recXORI() {
+// Rt = Rs Xor Im
+	if (!_Rt_) return;
+
+//	iFlushRegs();
+
+	if (_Rs_ == _Rt_) {
+		if (IsConst(_Rt_)) {
+			iRegs[_Rt_].k^= _ImmU_;
+		} else {
+			XOR32ItoM((uptr)&psxRegs.GPR.r[_Rt_], _ImmU_);
+		}
+	} else {
+		if (IsConst(_Rs_)) {
+			MapConst(_Rt_, iRegs[_Rs_].k ^ _ImmU_);
+		} else {
+			iRegs[_Rt_].state = ST_UNK;
+
+			MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]);
+			XOR32ItoR(EAX, _ImmU_);
+			MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX);
+		}
+	}
+}
+#endif
+//end of * Arithmetic with immediate operand  
+
+/*********************************************************
+* Load higher 16 bits of the first word in GPR with imm  *
+* Format:  OP rt, immediate                              *
+*********************************************************/
+//REC_FUNC(LUI);
+#if 1
+static void recLUI()  {
+// Rt = Imm << 16
+	if (!_Rt_) return;
+
+	MapConst(_Rt_, psxRegs.code << 16);
+}
+#endif
+//End of Load Higher .....
+
+
+/*********************************************************
+* Register arithmetic                                    *
+* Format:  OP rd, rs, rt                                 *
+*********************************************************/
+
+
+#if 0
+REC_FUNC(ADD);
+REC_FUNC(ADDU);
+REC_FUNC(SUB);
+REC_FUNC(SUBU);
+REC_FUNC(AND);
+REC_FUNC(OR);
+REC_FUNC(XOR);
+REC_FUNC(NOR);
+REC_FUNC(SLT);
+REC_FUNC(SLTU);
+#endif
+
+#if 1
+static void recADDU() {
+// Rd = Rs + Rt 
+	if (!_Rd_) return;
+
+//	iFlushRegs();
+
+	if (IsConst(_Rs_) && IsConst(_Rt_)) {
+		MapConst(_Rd_, iRegs[_Rs_].k + iRegs[_Rt_].k);
+	} else if (IsConst(_Rs_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		if (_Rt_ == _Rd_) {
+			if (iRegs[_Rs_].k == 1) {
+				INC32M((uptr)&psxRegs.GPR.r[_Rd_]);
+			} else if (iRegs[_Rs_].k == -1) {
+				DEC32M((uptr)&psxRegs.GPR.r[_Rd_]);
+			} else if (iRegs[_Rs_].k) {
+				ADD32ItoM((uptr)&psxRegs.GPR.r[_Rd_], iRegs[_Rs_].k);
+			}
+		} else {
+			MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]);
+			if (iRegs[_Rs_].k == 1) { 
+				INC32R(EAX);
+			} else if (iRegs[_Rs_].k == 0xffffffff) {
+				DEC32R(EAX);
+			} else if (iRegs[_Rs_].k) {
+				ADD32ItoR(EAX, iRegs[_Rs_].k);
+			}
+			MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+		}
+	} else if (IsConst(_Rt_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		if (_Rs_ == _Rd_) {
+			if (iRegs[_Rt_].k == 1) {
+				INC32M((uptr)&psxRegs.GPR.r[_Rd_]);
+			} else if (iRegs[_Rt_].k == -1) {
+				DEC32M((uptr)&psxRegs.GPR.r[_Rd_]);
+			} else if (iRegs[_Rt_].k) {
+				ADD32ItoM((uptr)&psxRegs.GPR.r[_Rd_], iRegs[_Rt_].k);
+			}
+		} else {
+			MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]);
+			if (iRegs[_Rt_].k == 1) { 
+				INC32R(EAX);
+			} else if (iRegs[_Rt_].k == 0xffffffff) {
+				DEC32R(EAX);
+			} else if (iRegs[_Rt_].k) {
+				ADD32ItoR(EAX, iRegs[_Rt_].k);
+			}
+			MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+		}
+	} else {
+		iRegs[_Rd_].state = ST_UNK;
+
+		if (_Rs_ == _Rd_) { // Rd+= Rt
+			MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]);
+			ADD32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+		} else if (_Rt_ == _Rd_) { // Rd+= Rs
+			MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]);
+			ADD32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+		} else { // Rd = Rs + Rt
+			MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]);
+			ADD32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]);
+			MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+		}
+	}
+}
+
+static void recADD() {
+// Rd = Rs + Rt
+	recADDU();
+}
+
+static void recSUBU() {
+// Rd = Rs - Rt
+	if (!_Rd_) return;
+
+//	iFlushRegs();
+
+	if (IsConst(_Rs_) && IsConst(_Rt_)) {
+		MapConst(_Rd_, iRegs[_Rs_].k - iRegs[_Rt_].k);
+	} else if (IsConst(_Rs_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32ItoR(EAX, iRegs[_Rs_].k);
+		SUB32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]);
+		MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+	} else if (IsConst(_Rt_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]);
+		SUB32ItoR(EAX, iRegs[_Rt_].k);
+		MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+	} else {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]);
+		SUB32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]);
+		MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+	}
+}   
+
+static void recSUB() {
+// Rd = Rs - Rt
+	recSUBU();
+}   
+
+static void recAND() {
+// Rd = Rs And Rt
+	if (!_Rd_) return;
+
+//	iFlushRegs();
+
+	if (IsConst(_Rs_) && IsConst(_Rt_)) {
+		MapConst(_Rd_, iRegs[_Rs_].k & iRegs[_Rt_].k);
+	} else if (IsConst(_Rs_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		if (_Rd_ == _Rt_) { // Rd&= Rs
+			AND32ItoM((uptr)&psxRegs.GPR.r[_Rd_], iRegs[_Rs_].k);
+		} else {
+			MOV32ItoR(EAX, iRegs[_Rs_].k);
+			AND32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]);
+			MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+		}
+	} else if (IsConst(_Rt_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		if (_Rd_ == _Rs_) { // Rd&= kRt
+			AND32ItoM((uptr)&psxRegs.GPR.r[_Rd_], iRegs[_Rt_].k);
+		} else { // Rd = Rs & kRt
+			MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]);
+			AND32ItoR(EAX, iRegs[_Rt_].k);
+			MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+		}
+	} else {
+		iRegs[_Rd_].state = ST_UNK;
+
+		if (_Rs_ == _Rd_) { // Rd&= Rt
+			MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]);
+			AND32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+		} else if (_Rt_ == _Rd_) { // Rd&= Rs
+			MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]);
+			AND32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+		} else { // Rd = Rs & Rt
+			MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]);
+			AND32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]);
+			MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+		}
+	}
+}   
+
+static void recOR() {
+// Rd = Rs Or Rt
+	if (!_Rd_) return;
+
+//	iFlushRegs();
+
+	if (IsConst(_Rs_) && IsConst(_Rt_)) {
+		MapConst(_Rd_, iRegs[_Rs_].k | iRegs[_Rt_].k);
+	} else if (IsConst(_Rs_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32ItoR(EAX, iRegs[_Rs_].k);
+		OR32MtoR (EAX, (uptr)&psxRegs.GPR.r[_Rt_]);
+		MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+	} else if (IsConst(_Rt_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]);
+		OR32ItoR (EAX, iRegs[_Rt_].k);
+		MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+	} else {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]);
+		OR32MtoR (EAX, (uptr)&psxRegs.GPR.r[_Rt_]);
+		MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+	}
+}   
+
+static void recXOR() {
+// Rd = Rs Xor Rt
+	if (!_Rd_) return;
+
+//	iFlushRegs();
+
+	if (IsConst(_Rs_) && IsConst(_Rt_)) {
+		MapConst(_Rd_, iRegs[_Rs_].k ^ iRegs[_Rt_].k);
+	} else if (IsConst(_Rs_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32ItoR(EAX, iRegs[_Rs_].k);
+		XOR32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]);
+		MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+	} else if (IsConst(_Rt_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]);
+		XOR32ItoR(EAX, iRegs[_Rt_].k);
+		MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+	} else {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]);
+		XOR32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]);
+		MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+	}
+}
+
+static void recNOR() {
+// Rd = Rs Nor Rt
+	if (!_Rd_) return;
+
+//	iFlushRegs();
+
+	if (IsConst(_Rs_) && IsConst(_Rt_)) {
+		MapConst(_Rd_, ~(iRegs[_Rs_].k | iRegs[_Rt_].k));
+	} else if (IsConst(_Rs_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32ItoR(EAX, iRegs[_Rs_].k);
+		OR32MtoR (EAX, (uptr)&psxRegs.GPR.r[_Rt_]);
+		NOT32R   (EAX);
+		MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+	} else if (IsConst(_Rt_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]);
+		OR32ItoR (EAX, iRegs[_Rt_].k);
+		NOT32R   (EAX);
+		MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+	} else {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]);
+		OR32MtoR (EAX, (uptr)&psxRegs.GPR.r[_Rt_]);
+		NOT32R   (EAX);
+		MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+	}
+}
+
+static void recSLT() {
+// Rd = Rs < Rt (signed)
+	if (!_Rd_) return;
+
+//	iFlushRegs();
+
+	if (IsConst(_Rs_) && IsConst(_Rt_)) {
+		MapConst(_Rd_, (s32)iRegs[_Rs_].k < (s32)iRegs[_Rt_].k);
+	} else if (IsConst(_Rs_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32ItoR(EAX, iRegs[_Rs_].k);
+		CMP32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]);
+		SETL8R   (EAX);
+		AND32ItoR(EAX, 0xff);
+		MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+	} else if (IsConst(_Rt_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]);
+		CMP32ItoR(EAX, iRegs[_Rt_].k);
+		SETL8R   (EAX);
+		AND32ItoR(EAX, 0xff);
+		MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+	} else {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]);
+		CMP32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]);
+		SETL8R   (EAX);
+		AND32ItoR(EAX, 0xff);
+		MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+	}
+}  
+
+static void recSLTU() { 
+// Rd = Rs < Rt (unsigned)
+	if (!_Rd_) return;
+
+//	iFlushRegs();
+
+	if (IsConst(_Rs_) && IsConst(_Rt_)) {
+		MapConst(_Rd_, iRegs[_Rs_].k < iRegs[_Rt_].k);
+	} else if (IsConst(_Rs_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32ItoR(EAX, iRegs[_Rs_].k);
+	    CMP32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]);
+		SBB32RtoR(EAX, EAX);
+		NEG32R   (EAX);
+		MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+	} else if (IsConst(_Rt_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]);
+		CMP32ItoR(EAX, iRegs[_Rt_].k);
+		SBB32RtoR(EAX, EAX);
+		NEG32R   (EAX);
+		MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+	} else {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]);
+	    CMP32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]);
+		SBB32RtoR(EAX, EAX);
+		NEG32R   (EAX);
+		MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+	}
+}
+#endif
+//End of * Register arithmetic
+
+/*********************************************************
+* Register mult/div & Register trap logic                *
+* Format:  OP rs, rt                                     *
+*********************************************************/
+
+#if 0
+REC_FUNC(MULT);
+REC_FUNC(MULTU);
+REC_FUNC(DIV);
+REC_FUNC(DIVU);
+#endif
+
+#if 1
+static void recMULT() {
+// Lo/Hi = Rs * Rt (signed)
+
+//	iFlushRegs();
+
+	if ((IsConst(_Rs_) && iRegs[_Rs_].k == 0) ||
+		(IsConst(_Rt_) && iRegs[_Rt_].k == 0)) {
+		XOR32RtoR(EAX, EAX);
+		MOV32RtoM((uptr)&psxRegs.GPR.n.lo, EAX);
+		MOV32RtoM((uptr)&psxRegs.GPR.n.hi, EAX);
+		return;
+	}
+
+	if (IsConst(_Rs_)) {
+		MOV32ItoR(EAX, iRegs[_Rs_].k);// printf("multrsk %x\n", iRegs[_Rs_].k);
+	} else {
+		MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]);
+	}
+	if (IsConst(_Rt_)) {
+		MOV32ItoR(EDX, iRegs[_Rt_].k);// printf("multrtk %x\n", iRegs[_Rt_].k);
+		IMUL32R  (EDX);
+	} else {
+		IMUL32M  ((uptr)&psxRegs.GPR.r[_Rt_]);
+	}
+	MOV32RtoM((uptr)&psxRegs.GPR.n.lo, EAX);
+	MOV32RtoM((uptr)&psxRegs.GPR.n.hi, EDX);
+}
+
+static void recMULTU() {
+// Lo/Hi = Rs * Rt (unsigned)
+
+//	iFlushRegs();
+
+	if ((IsConst(_Rs_) && iRegs[_Rs_].k == 0) ||
+		(IsConst(_Rt_) && iRegs[_Rt_].k == 0)) {
+		XOR32RtoR(EAX, EAX);
+		MOV32RtoM((uptr)&psxRegs.GPR.n.lo, EAX);
+		MOV32RtoM((uptr)&psxRegs.GPR.n.hi, EAX);
+		return;
+	}
+
+	if (IsConst(_Rs_)) {
+		MOV32ItoR(EAX, iRegs[_Rs_].k);// printf("multursk %x\n", iRegs[_Rs_].k);
+	} else {
+		MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]);
+	}
+	if (IsConst(_Rt_)) {
+		MOV32ItoR(EDX, iRegs[_Rt_].k);// printf("multurtk %x\n", iRegs[_Rt_].k);
+		MUL32R   (EDX);
+	} else {
+		MUL32M   ((uptr)&psxRegs.GPR.r[_Rt_]);
+	}
+	MOV32RtoM((uptr)&psxRegs.GPR.n.lo, EAX);
+	MOV32RtoM((uptr)&psxRegs.GPR.n.hi, EDX);
+}
+
+static void recDIV() {
+// Lo/Hi = Rs / Rt (signed)
+
+//	iFlushRegs();
+
+	if (IsConst(_Rt_)) {
+		if (iRegs[_Rt_].k == 0) return;
+		MOV32ItoR(ECX, iRegs[_Rt_].k);// printf("divrtk %x\n", iRegs[_Rt_].k);
+	} else {
+		MOV32MtoR(ECX, (uptr)&psxRegs.GPR.r[_Rt_]);
+		CMP32ItoR(ECX, 0);
+		j8Ptr[0] = JE8(0);
+	}
+	if (IsConst(_Rs_)) {
+		MOV32ItoR(EAX, iRegs[_Rs_].k);// printf("divrsk %x\n", iRegs[_Rs_].k);
+	} else {
+		MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]);
+	}
+	CDQ();
+	IDIV32R  (ECX);
+	MOV32RtoM((uptr)&psxRegs.GPR.n.lo, EAX);
+	MOV32RtoM((uptr)&psxRegs.GPR.n.hi, EDX);
+	if (!IsConst(_Rt_)) {
+		x86SetJ8(j8Ptr[0]);
+	}
+}
+
+static void recDIVU() {
+// Lo/Hi = Rs / Rt (unsigned)
+
+//	iFlushRegs();
+
+	if (IsConst(_Rt_)) {
+		if (iRegs[_Rt_].k == 0) return;
+		MOV32ItoR(ECX, iRegs[_Rt_].k);// printf("divurtk %x\n", iRegs[_Rt_].k);
+	} else {
+		MOV32MtoR(ECX, (uptr)&psxRegs.GPR.r[_Rt_]);
+		CMP32ItoR(ECX, 0);
+		j8Ptr[0] = JE8(0);
+	}
+	if (IsConst(_Rs_)) {
+		MOV32ItoR(EAX, iRegs[_Rs_].k);// printf("divursk %x\n", iRegs[_Rs_].k);
+	} else {
+		MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]);
+	}
+	XOR32RtoR(EDX, EDX);
+	DIV32R   (ECX);
+	MOV32RtoM((uptr)&psxRegs.GPR.n.lo, EAX);
+	MOV32RtoM((uptr)&psxRegs.GPR.n.hi, EDX);
+	if (!IsConst(_Rt_)) {
+		x86SetJ8(j8Ptr[0]);
+	}
+}
+#endif
+//End of * Register mult/div & Register trap logic  
+
+#if 0
+REC_FUNC(LB);
+REC_FUNC(LBU);
+REC_FUNC(LH);
+REC_FUNC(LHU);
+REC_FUNC(LW);
+
+REC_FUNC(SB);
+REC_FUNC(SH);
+REC_FUNC(SW);
+
+REC_FUNC(LWL);
+REC_FUNC(LWR);
+REC_FUNC(SWL);
+REC_FUNC(SWR);
+#endif
+
+
+static void SetArg_OfB(x86IntRegType arg) {
+	if (IsConst(_Rs_))
+#ifdef __x86_64__
+		MOV64ItoR(arg, iRegs[_Rs_].k + _Imm_);
+#else
+		PUSH32I  (iRegs[_Rs_].k + _Imm_);
+#endif
+	else {
+#ifdef __x86_64__
+		MOV32MtoR(arg, (uptr)&psxRegs.GPR.r[_Rs_]);
+		if (_Imm_)
+			ADD32ItoR(arg, _Imm_);
+#else
+		if (_Imm_) {
+			MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+			ADD32ItoR(EAX, _Imm_);
+			PUSH32R  (EAX);
+		} else {
+			PUSH32M  ((u32)&psxRegs.GPR.r[_Rs_]);
+		}
+#endif
+	}
+#ifndef __x86_64__
+	resp += 4;
+#endif
+}
+
+#if 1
+static void recLB() {
+// Rt = mem[Rs + Im] (signed)
+
+//	iFlushRegs();
+
+	if (IsConst(_Rs_)) {
+		u32 addr = iRegs[_Rs_].k + _Imm_;
+		int t = addr >> 16;
+
+		if ((t & 0xfff0)  == 0xbfc0) {
+			if (!_Rt_) return;
+			// since bios is readonly it won't change
+			MapConst(_Rt_, psxRs8(addr));
+			return;
+		}
+		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+			if (!_Rt_) return;
+			iRegs[_Rt_].state = ST_UNK;
+
+			MOVSX32M8toR(EAX, (uptr)&psxM[addr & 0x1fffff]);
+			MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX);
+			return;
+		}
+		if (t == 0x1f80 && addr < 0x1f801000) {
+			if (!_Rt_) return;
+			iRegs[_Rt_].state = ST_UNK;
+
+			MOVSX32M8toR(EAX, (uptr)&psxH[addr & 0xfff]);
+			MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX);
+			return;
+		}
+//		SysPrintf("unhandled r8 %x\n", addr);
+	}
+
+	SetArg_OfB(X86ARG1);
+	CALLFunc((uptr)psxMemRead8);
+	if (_Rt_) {
+		iRegs[_Rt_].state = ST_UNK;
+		MOVSX32R8toR(EAX, EAX);
+		MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX);
+	}
+//	ADD32ItoR(ESP, 4);
+}
+
+static void recLBU() {
+// Rt = mem[Rs + Im] (unsigned)
+
+//	iFlushRegs();
+
+	if (IsConst(_Rs_)) {
+		u32 addr = iRegs[_Rs_].k + _Imm_;
+		int t = addr >> 16;
+
+		if ((t & 0xfff0)  == 0xbfc0) {
+			if (!_Rt_) return;
+			// since bios is readonly it won't change
+			MapConst(_Rt_, psxRu8(addr));
+			return;
+		}
+		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+			if (!_Rt_) return;
+			iRegs[_Rt_].state = ST_UNK;
+
+			MOVZX32M8toR(EAX, (uptr)&psxM[addr & 0x1fffff]);
+			MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX);
+			return;
+		}
+		if (t == 0x1f80 && addr < 0x1f801000) {
+			if (!_Rt_) return;
+			iRegs[_Rt_].state = ST_UNK;
+
+			MOVZX32M8toR(EAX, (uptr)&psxH[addr & 0xfff]);
+			MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX);
+			return;
+		}
+//		SysPrintf("unhandled r8u %x\n", addr);
+	}
+
+	SetArg_OfB(X86ARG1);
+	CALLFunc((uptr)psxMemRead8);
+	if (_Rt_) {
+		iRegs[_Rt_].state = ST_UNK;
+		MOVZX32R8toR(EAX, EAX);
+		MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX);
+	}
+//	ADD32ItoR(ESP, 4);
+}
+
+static void recLH() {
+// Rt = mem[Rs + Im] (signed)
+
+//	iFlushRegs();
+
+	if (IsConst(_Rs_)) {
+		u32 addr = iRegs[_Rs_].k + _Imm_;
+		int t = addr >> 16;
+
+		if ((t & 0xfff0)  == 0xbfc0) {
+			if (!_Rt_) return;
+			// since bios is readonly it won't change
+			MapConst(_Rt_, psxRs16(addr));
+			return;
+		}
+		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+			if (!_Rt_) return;
+			iRegs[_Rt_].state = ST_UNK;
+
+			MOVSX32M16toR(EAX, (uptr)&psxM[addr & 0x1fffff]);
+			MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX);
+			return;
+		}
+		if (t == 0x1f80 && addr < 0x1f801000) {
+			if (!_Rt_) return;
+			iRegs[_Rt_].state = ST_UNK;
+
+			MOVSX32M16toR(EAX, (uptr)&psxH[addr & 0xfff]);
+			MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX);
+			return;
+		}
+//		SysPrintf("unhandled r16 %x\n", addr);
+	}
+
+	SetArg_OfB(X86ARG1);
+	CALLFunc((uptr)psxMemRead16);
+	if (_Rt_) {
+		iRegs[_Rt_].state = ST_UNK;
+		MOVSX32R16toR(EAX, EAX);
+		MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX);
+	}
+//	ADD32ItoR(ESP, 4);
+}
+
+static void recLHU() {
+// Rt = mem[Rs + Im] (unsigned)
+
+//	iFlushRegs();
+
+	if (IsConst(_Rs_)) {
+		u32 addr = iRegs[_Rs_].k + _Imm_;
+		int t = addr >> 16;
+
+		if ((t & 0xfff0) == 0xbfc0) {
+			if (!_Rt_) return;
+			// since bios is readonly it won't change
+			MapConst(_Rt_, psxRu16(addr));
+			return;
+		}
+		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+			if (!_Rt_) return;
+			iRegs[_Rt_].state = ST_UNK;
+
+			MOVZX32M16toR(EAX, (uptr)&psxM[addr & 0x1fffff]);
+			MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX);
+			return;
+		}
+		if (t == 0x1f80 && addr < 0x1f801000) {
+			if (!_Rt_) return;
+			iRegs[_Rt_].state = ST_UNK;
+
+			MOVZX32M16toR(EAX, (uptr)&psxH[addr & 0xfff]);
+			MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX);
+			return;
+		}
+		if (t == 0x1f80) {
+			if (addr >= 0x1f801c00 && addr < 0x1f801e00) {
+				if (!_Rt_) return;
+				iRegs[_Rt_].state = ST_UNK;
+
+				//PUSHI  (addr);
+				MOV64ItoR(X86ARG1, addr);
+				//CALLFunc  ((uptr)SPU_readRegister);
+				MOV64ItoR(RAX, (uptr)SPU_readRegister);
+				CALL64R(RAX);
+				MOVZX32R16toR(EAX, EAX);
+				MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX);
+#ifndef __WIN32__
+				resp+= 4;
+#endif
+				return;
+			}
+			switch (addr) {
+				case 0x1f801100: case 0x1f801110: case 0x1f801120:
+					if (!_Rt_) return;
+					iRegs[_Rt_].state = ST_UNK;
+
+					//PUSHI((addr >> 4) & 0x3);
+					MOV64ItoR(X86ARG1, (addr >> 4) & 0x3);
+					CALLFunc((uptr)psxRcntRcount);
+					MOVZX32R16toR(EAX, EAX);
+					MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX);
+					resp+= 4;
+					return;
+
+				case 0x1f801104: case 0x1f801114: case 0x1f801124:
+					if (!_Rt_) return;
+					iRegs[_Rt_].state = ST_UNK;
+
+					MOV64ItoR(X86ARG1, (addr >> 4) & 0x3);
+                    CALLFunc((uptr)psxRcntRmode);
+                    MOVZX32R16toR(EAX, EAX);
+					MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX);
+                    resp+= 4;
+					return;
+
+				case 0x1f801108: case 0x1f801118: case 0x1f801128:
+					if (!_Rt_) return;
+					iRegs[_Rt_].state = ST_UNK;
+
+					MOV64ItoR(X86ARG1, (addr >> 4) & 0x3);
+                    CALLFunc((uptr)psxRcntRtarget);
+                    MOVZX32R16toR(EAX, EAX);
+					MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX);
+                    resp+= 4;
+					return;
+			}
+		}
+//		SysPrintf("unhandled r16u %x\n", addr);
+	}
+
+	SetArg_OfB(X86ARG1);
+	CALLFunc((uptr)psxMemRead16);
+	if (_Rt_) {
+		iRegs[_Rt_].state = ST_UNK;
+		MOVZX32R16toR(EAX, EAX);
+		MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX);
+	}
+//	ADD32ItoR(ESP, 4);
+}
+
+static void recLW() {
+// Rt = mem[Rs + Im] (unsigned)
+
+//	iFlushRegs();
+
+	if (IsConst(_Rs_)) {
+		u32 addr = iRegs[_Rs_].k + _Imm_;
+		int t = addr >> 16;
+
+		if ((t & 0xfff0) == 0xbfc0) {
+			if (!_Rt_) return;
+			// since bios is readonly it won't change
+			MapConst(_Rt_, psxRu32(addr));
+			return;
+		}
+		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+			if (!_Rt_) return;
+			iRegs[_Rt_].state = ST_UNK;
+
+			MOV32MtoR(EAX, (uptr)&psxM[addr & 0x1fffff]);
+			MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX);
+			return;
+		}
+		if (t == 0x1f80 && addr < 0x1f801000) {
+			if (!_Rt_) return;
+			iRegs[_Rt_].state = ST_UNK;
+
+			MOV32MtoR(EAX, (uptr)&psxH[addr & 0xfff]);
+			MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX);
+			return;
+		}
+		if (t == 0x1f80) {
+			switch (addr) {
+				case 0x1f801080: case 0x1f801084: case 0x1f801088: 
+				case 0x1f801090: case 0x1f801094: case 0x1f801098: 
+				case 0x1f8010a0: case 0x1f8010a4: case 0x1f8010a8: 
+				case 0x1f8010b0: case 0x1f8010b4: case 0x1f8010b8: 
+				case 0x1f8010c0: case 0x1f8010c4: case 0x1f8010c8: 
+				case 0x1f8010d0: case 0x1f8010d4: case 0x1f8010d8: 
+				case 0x1f8010e0: case 0x1f8010e4: case 0x1f8010e8: 
+				case 0x1f801070: case 0x1f801074:
+				case 0x1f8010f0: case 0x1f8010f4:
+					if (!_Rt_) return;
+					iRegs[_Rt_].state = ST_UNK;
+
+					MOV32MtoR(EAX, (uptr)&psxH[addr & 0xffff]);
+					MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX);
+					return;
+
+				case 0x1f801810:
+					if (!_Rt_) return;
+					iRegs[_Rt_].state = ST_UNK;
+
+					CALLFunc((uptr)GPU_readData);
+					MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX);
+					return;
+
+				case 0x1f801814:
+					if (!_Rt_) return;
+					iRegs[_Rt_].state = ST_UNK;
+
+					CALLFunc((uptr)GPU_readStatus);
+					MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX);
+					return;
+			}
+		}
+//		SysPrintf("unhandled r32 %x\n", addr);
+	}
+
+	SetArg_OfB(X86ARG1);
+	CALLFunc((uptr)psxMemRead32);
+	if (_Rt_) {
+		iRegs[_Rt_].state = ST_UNK;
+		MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX);
+	}
+//	ADD32ItoR(ESP, 4);
+}
+
+extern u32 LWL_MASK[4];
+extern u32 LWL_SHIFT[4];
+
+void iLWLk(u32 shift) {
+	if (IsConst(_Rt_)) {
+		MOV32ItoR(ECX, iRegs[_Rt_].k);
+	} else {
+		MOV32MtoR(ECX, (uptr)&psxRegs.GPR.r[_Rt_]);
+	}
+	AND32ItoR(ECX, LWL_MASK[shift]);
+	SHL32ItoR(EAX, LWL_SHIFT[shift]);
+	OR32RtoR (EAX, ECX);
+}
+
+void recLWL() {
+// Rt = Rt Merge mem[Rs + Im]
+
+	if (IsConst(_Rs_)) {
+		u32 addr = iRegs[_Rs_].k + _Imm_;
+		int t = addr >> 16;
+
+		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+			MOV32MtoR(EAX, (uptr)&psxM[addr & 0x1ffffc]);
+			iLWLk(addr & 3);
+
+			iRegs[_Rt_].state = ST_UNK;
+			MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX);
+			return;
+		}
+		if (t == 0x1f80 && addr < 0x1f801000) {
+			MOV32MtoR(EAX, (uptr)&psxH[addr & 0xffc]);
+			iLWLk(addr & 3);
+
+			iRegs[_Rt_].state = ST_UNK;
+			MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX);
+			return;
+		}
+	}
+
+	if (IsConst(_Rs_)) MOV32ItoR(EAX, iRegs[_Rs_].k + _Imm_);
+	else {
+		MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]);
+		if (_Imm_) ADD32ItoR(EAX, _Imm_);
+	}
+	//PUSH64R  (EAX);
+	AND32ItoR(EAX, ~3);
+	//PUSH64R  (EAX);
+	MOV32RtoR(X86ARG1, EAX);
+	CALLFunc((uptr)psxMemRead32);
+
+	if (_Rt_) {
+		//ADD32ItoR(ESP, 4);
+		//POP64R   (EDX);
+		if (IsConst(_Rs_)) MOV32ItoR(EDX, iRegs[_Rs_].k + _Imm_);
+		else {
+			MOV32MtoR(EDX, (uptr)&psxRegs.GPR.r[_Rs_]);
+			if (_Imm_) ADD32ItoR(EDX, _Imm_);
+		}
+
+		AND32ItoR(EDX, 0x3); // shift = addr & 3;
+
+		MOV64ItoR(ECX, (uptr)LWL_SHIFT);
+		MOV32RmStoR(ECX, ECX, EDX, 2);
+		SHL32CLtoR(EAX); // mem(EAX) << LWL_SHIFT[shift]
+
+		MOV64ItoR(ECX, (uptr)LWL_MASK);
+		MOV32RmStoR(ECX, ECX, EDX, 2);
+		if (IsConst(_Rt_)) {
+			MOV32ItoR(EDX, iRegs[_Rt_].k);
+		} else {
+			MOV32MtoR(EDX, (uptr)&psxRegs.GPR.r[_Rt_]);
+		}
+		AND32RtoR(EDX, ECX); // _rRt_ & LWL_MASK[shift]
+
+		OR32RtoR(EAX, EDX);
+
+		iRegs[_Rt_].state = ST_UNK;
+		MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX);
+	//} else {
+		//ADD64ItoR(RSP, 8);
+		//resp+= 8;
+	}
+}
+
+/*
+static void recLWBlock(int count) {
+	u32 *code = PSXM(pc);
+	int i, respsave;
+// Rt = mem[Rs + Im] (unsigned)
+
+//	iFlushRegs();
+
+	if (IsConst(_Rs_)) {
+		u32 addr = iRegs[_Rs_].k + _Imm_;
+		int t = addr >> 16;
+
+		if ((t & 0xfff0) == 0xbfc0) {
+			// since bios is readonly it won't change
+			for (i=0; i<count; i++, code++, addr+=4) {
+				if (_fRt_(*code)) {
+					MapConst(_fRt_(*code), psxRu32(addr));
+				}
+			}
+			return;
+		}
+		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+			for (i=0; i<count; i++, code++, addr+=4) {
+				if (!_fRt_(*code)) return;
+				iRegs[_fRt_(*code)].state = ST_UNK;
+
+				MOV32MtoR(EAX, (uptr)&psxM[addr & 0x1fffff]);
+				MOV32RtoM((uptr)&psxRegs.GPR.r[_fRt_(*code)], EAX);
+			}
+			return;
+		}
+		if (t == 0x1f80 && addr < 0x1f801000) {
+			for (i=0; i<count; i++, code++, addr+=4) {
+				if (!_fRt_(*code)) return;
+				iRegs[_fRt_(*code)].state = ST_UNK;
+
+				MOV32MtoR(EAX, (uptr)&psxH[addr & 0xfff]);
+				MOV32RtoM((uptr)&psxRegs.GPR.r[_fRt_(*code)], EAX);
+			}
+			return;
+		}
+	}
+
+	SysPrintf("recLWBlock %d: %d\n", count, IsConst(_Rs_));
+	SetArg_OfB(X86ARG1);
+	CALLFunc((uptr)psxMemPointer);
+//	ADD32ItoR(ESP, 4);
+
+	respsave = resp; resp = 0;
+	TEST64RtoR(RAX,RAX);
+	j32Ptr[4] = JZ32(0);
+	XOR32RtoR(ECX, ECX);
+	for (i=0; i<count; i++, code++) {
+		if (_fRt_(*code)) {
+			iRegs[_fRt_(*code)].state = ST_UNK;
+			
+			MOV64RmStoR(EDX, EAX, ECX, 2);
+			MOV32RtoM((uptr)&psxRegs.GPR.r[_fRt_(*code)], EDX);
+		}
+		if (i != (count-1)) INC32R(ECX);
+	}
+	j32Ptr[5] = JMP32(0);
+	x86SetJ32(j32Ptr[4]);
+	for (i=0, code = PSXM(pc); i<count; i++, code++) {
+		psxRegs.code = *code;
+		recLW();
+	}
+#ifndef __x86_64__
+	ADD32ItoR(ESP, resp);
+#endif
+	x86SetJ32(j32Ptr[5]);
+	resp = respsave;
+}
+*/
+
+extern u32 LWR_MASK[4];
+extern u32 LWR_SHIFT[4];
+
+void iLWRk(u32 shift) {
+	if (IsConst(_Rt_)) {
+		MOV32ItoR(ECX, iRegs[_Rt_].k);
+	} else {
+		MOV32MtoR(ECX, (uptr)&psxRegs.GPR.r[_Rt_]);
+	}
+	AND32ItoR(ECX, LWR_MASK[shift]);
+	SHR32ItoR(EAX, LWR_SHIFT[shift]);
+	OR32RtoR (EAX, ECX);
+}
+
+void recLWR() {
+// Rt = Rt Merge mem[Rs + Im]
+
+	if (IsConst(_Rs_)) {
+		u32 addr = iRegs[_Rs_].k + _Imm_;
+		int t = addr >> 16;
+
+		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+			MOV32MtoR(EAX, (uptr)&psxM[addr & 0x1ffffc]);
+			iLWRk(addr & 3);
+
+			iRegs[_Rt_].state = ST_UNK;
+			MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX);
+			return;
+		}
+		if (t == 0x1f80 && addr < 0x1f801000) {
+			MOV32MtoR(EAX, (uptr)&psxH[addr & 0xffc]);
+			iLWRk(addr & 3);
+
+			iRegs[_Rt_].state = ST_UNK;
+			MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX);
+			return;
+		}
+	}
+
+	if (IsConst(_Rs_)) MOV32ItoR(EAX, iRegs[_Rs_].k + _Imm_);
+	else {
+		MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]);
+		if (_Imm_) ADD32ItoR(EAX, _Imm_);
+	}
+	PUSHR(EAX);
+	AND32ItoR(EAX, ~3);
+	MOV32RtoR(X86ARG1, EAX);
+	CALLFunc((uptr)psxMemRead32);
+
+	POPR   (EDX);
+	if (_Rt_) {
+		AND32ItoR(EDX, 0x3); // shift = addr & 3;
+
+		MOV64ItoR(ECX, (uptr)LWR_SHIFT);
+		MOV32RmStoR(ECX, ECX, EDX, 2);
+		SHR32CLtoR(EAX); // mem(EAX) >> LWR_SHIFT[shift]
+
+		MOV64ItoR(ECX, (uptr)LWR_MASK);
+		MOV32RmStoR(ECX, ECX, EDX, 2);
+
+		if (IsConst(_Rt_)) {
+			MOV32ItoR(EDX, iRegs[_Rt_].k);
+		} else {
+			MOV32MtoR(EDX, (uptr)&psxRegs.GPR.r[_Rt_]);
+		}
+		AND32RtoR(EDX, ECX); // _rRt_ & LWR_MASK[shift]
+
+		OR32RtoR(EAX, EDX);
+
+		iRegs[_Rt_].state = ST_UNK;
+		MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX);
+	//} else {
+		//resp+= 8;
+	}
+}
+
+static void recSB() {
+// mem[Rs + Im] = Rt
+
+//	iFlushRegs();
+
+	if (IsConst(_Rs_)) {
+		u32 addr = iRegs[_Rs_].k + _Imm_;
+		int t = addr >> 16;
+
+		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+			if (IsConst(_Rt_)) {
+				MOV8ItoM((uptr)&psxM[addr & 0x1fffff], (u8)iRegs[_Rt_].k);
+			} else {
+				MOV8MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]);
+				MOV8RtoM((uptr)&psxM[addr & 0x1fffff], EAX);
+			}
+			return;
+		}
+		if (t == 0x1f80 && addr < 0x1f801000) {
+			if (IsConst(_Rt_)) {
+				MOV8ItoM((uptr)&psxH[addr & 0xfff], (u8)iRegs[_Rt_].k);
+			} else {
+				MOV8MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]);
+				MOV8RtoM((uptr)&psxH[addr & 0xfff], EAX);
+			}
+			return;
+		}
+//		SysPrintf("unhandled w8 %x\n", addr);
+	}
+
+	if (IsConst(_Rt_)) {
+		MOV64ItoR(X86ARG2, iRegs[_Rt_].k);
+	} else {
+		MOV32MtoR(X86ARG2, (uptr)&psxRegs.GPR.r[_Rt_]);
+	}
+	SetArg_OfB(X86ARG1);
+	CALLFunc((uptr)psxMemWrite8);
+//	ADD32ItoR(ESP, 8);
+}
+
+static void recSH() {
+// mem[Rs + Im] = Rt
+
+//	iFlushRegs();
+
+	if (IsConst(_Rs_)) {
+		u32 addr = iRegs[_Rs_].k + _Imm_;
+		int t = addr >> 16;
+
+		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+			if (IsConst(_Rt_)) {
+				MOV16ItoM((uptr)&psxM[addr & 0x1fffff], (u16)iRegs[_Rt_].k);
+			} else {
+				MOV16MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]);
+				MOV16RtoM((uptr)&psxM[addr & 0x1fffff], EAX);
+			}
+			return;
+		}
+		if (t == 0x1f80 && addr < 0x1f801000) {
+			if (IsConst(_Rt_)) {
+				MOV16ItoM((uptr)&psxH[addr & 0xfff], (u16)iRegs[_Rt_].k);
+			} else {
+				MOV16MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]);
+				MOV16RtoM((uptr)&psxH[addr & 0xfff], EAX);
+			}
+			return;
+		}
+		if (t == 0x1f80) {
+			if (addr >= 0x1f801c00 && addr < 0x1f801e00) {
+				if (IsConst(_Rt_)) {
+					MOV64ItoR(X86ARG2, iRegs[_Rt_].k);
+				} else {
+					MOV32MtoR(X86ARG2, (uptr)&psxRegs.GPR.r[_Rt_]);
+				}
+				MOV64ItoR(X86ARG1, addr);
+				CALLFunc  ((uptr)SPU_writeRegister);
+#ifndef __WIN32__
+				//resp+= 8;
+#endif
+				return;
+			}
+		}
+//		SysPrintf("unhandled w16 %x\n", addr);
+	}
+
+	if (IsConst(_Rt_)) {
+		MOV64ItoR(X86ARG2, iRegs[_Rt_].k);
+	} else {
+		MOV32MtoR(X86ARG2, (uptr)&psxRegs.GPR.r[_Rt_]);
+	}
+	SetArg_OfB(X86ARG1);
+	CALLFunc((uptr)psxMemWrite16);
+//	ADD32ItoR(ESP, 8);
+}
+
+static void recSW() {
+// mem[Rs + Im] = Rt
+
+//	iFlushRegs();
+
+	if (IsConst(_Rs_)) {
+		u32 addr = iRegs[_Rs_].k + _Imm_;
+		int t = addr >> 16;
+
+		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+			if (IsConst(_Rt_)) {
+				MOV32ItoM((uptr)&psxM[addr & 0x1fffff], iRegs[_Rt_].k);
+			} else {
+				MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]);
+				MOV32RtoM((uptr)&psxM[addr & 0x1fffff], EAX);
+			}
+			return;
+		}
+		if (t == 0x1f80 && addr < 0x1f801000) {
+			if (IsConst(_Rt_)) {
+				MOV32ItoM((uptr)&psxH[addr & 0xfff], iRegs[_Rt_].k);
+			} else {
+				MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]);
+				MOV32RtoM((uptr)&psxH[addr & 0xfff], EAX);
+			}
+			return;
+		}
+		if (t == 0x1f80) {
+			switch (addr) {
+				case 0x1f801080: case 0x1f801084: 
+				case 0x1f801090: case 0x1f801094: 
+				case 0x1f8010a0: case 0x1f8010a4: 
+				case 0x1f8010b0: case 0x1f8010b4: 
+				case 0x1f8010c0: case 0x1f8010c4: 
+				case 0x1f8010d0: case 0x1f8010d4: 
+				case 0x1f8010e0: case 0x1f8010e4: 
+				case 0x1f801074:
+				case 0x1f8010f0:
+					if (IsConst(_Rt_)) {
+						MOV32ItoM((uptr)&psxH[addr & 0xffff], iRegs[_Rt_].k);
+					} else {
+						MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]);
+						MOV32RtoM((uptr)&psxH[addr & 0xffff], EAX);
+					}
+					return;
+
+				case 0x1f801810:
+					if (IsConst(_Rt_)) {
+						MOV64ItoR(X86ARG1, iRegs[_Rt_].k);
+					} else {
+						MOV32MtoR(X86ARG1, (uptr)&psxRegs.GPR.r[_Rt_]);
+					}
+					CALLFunc((uptr)GPU_writeData);
+#ifndef __WIN32__
+					//resp+= 4;
+#endif
+					return;
+
+				case 0x1f801814:
+					if (IsConst(_Rt_)) {
+						MOV64ItoR(X86ARG1, iRegs[_Rt_].k);
+					} else {
+						MOV32MtoR(X86ARG1, (uptr)&psxRegs.GPR.r[_Rt_]);
+					}
+					CALLFunc((uptr)GPU_writeStatus);
+#ifndef __WIN32__
+					//resp+= 4;
+#endif
+			}
+		}
+//		SysPrintf("unhandled w32 %x\n", addr);
+	}
+
+	if (IsConst(_Rt_)) {
+		MOV64ItoR(X86ARG2, iRegs[_Rt_].k);
+	} else {
+		MOV32MtoR(X86ARG2, (uptr)&psxRegs.GPR.r[_Rt_]);
+	}
+	SetArg_OfB(X86ARG1);
+	CALLFunc((uptr)psxMemWrite32);
+//	ADD32ItoR(ESP, 8);
+	//resp+= 8;
+}
+
+/*
+static void recSWBlock(int count) {
+	u32 *code;
+	int i, respsave;
+// mem[Rs + Im] = Rt
+
+//	iFlushRegs();
+
+	if (IsConst(_Rs_)) {
+		u32 addr = iRegs[_Rs_].k + _Imm_;
+		int t = addr >> 16;
+		code = PSXM(pc);
+
+		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+			for (i=0; i<count; i++, code++, addr+=4) {
+				if (IsConst(_fRt_(*code))) {
+					MOV32ItoM((uptr)&psxM[addr & 0x1fffff], iRegs[_fRt_(*code)].k);
+				} else {
+					MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_fRt_(*code)]);
+					MOV32RtoM((uptr)&psxM[addr & 0x1fffff], EAX);
+				}
+			}
+			return;
+		}
+		if (t == 0x1f80 && addr < 0x1f801000) {
+			for (i=0; i<count; i++, code++, addr+=4) {
+				if (!_fRt_(*code)) return;
+				iRegs[_fRt_(*code)].state = ST_UNK;
+
+				MOV32MtoR(EAX, (uptr)&psxH[addr & 0xfff]);
+				MOV32RtoM((uptr)&psxRegs.GPR.r[_fRt_(*code)], EAX);
+			}
+			return;
+		}
+	}
+
+	SysPrintf("recSWBlock %d: %d\n", count, IsConst(_Rs_));
+	SetArg_OfB(X86ARG1);
+	CALLFunc((uptr)psxMemPointer);
+//	ADD32ItoR(ESP, 4);
+	//resp+= 4;
+
+	respsave = resp; resp = 0;
+	TEST64RtoR(RAX,RAX);
+	j32Ptr[4] = JZ32(0);
+	XOR32RtoR(ECX, ECX);
+	for (i=0, code = PSXM(pc); i<count; i++, code++) {
+		if (IsConst(_fRt_(*code))) {
+			MOV32ItoR(EDX, iRegs[_fRt_(*code)].k);
+		} else {
+			MOV32MtoR(EDX, (uptr)&psxRegs.GPR.r[_fRt_(*code)]);
+		}
+		MOV32RtoRmS(EAX, ECX, 2, EDX);
+		if (i != (count-1)) INC32R(ECX);
+	}
+	j32Ptr[5] = JMP32(0);
+	x86SetJ32(j32Ptr[4]);
+	for (i=0, code = PSXM(pc); i<count; i++, code++) {
+		psxRegs.code = *code;
+		recSW();
+	}
+	//ADD32ItoR(ESP, resp);
+	x86SetJ32(j32Ptr[5]);
+	resp = respsave;
+}
+*/
+
+extern u32 SWL_MASK[4];
+extern u32 SWL_SHIFT[4];
+
+void iSWLk(u32 shift) {
+	if (IsConst(_Rt_)) {
+		MOV32ItoR(ECX, iRegs[_Rt_].k);
+	} else {
+		MOV32MtoR(ECX, (uptr)&psxRegs.GPR.r[_Rt_]);
+	}
+	SHR32ItoR(ECX, SWL_SHIFT[shift]);
+	AND32ItoR(EAX, SWL_MASK[shift]);
+	OR32RtoR (EAX, ECX);
+}
+
+void recSWL() {
+// mem[Rs + Im] = Rt Merge mem[Rs + Im]
+
+	if (IsConst(_Rs_)) {
+		u32 addr = iRegs[_Rs_].k + _Imm_;
+		int t = addr >> 16;
+
+		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+			MOV32MtoR(EAX, (uptr)&psxM[addr & 0x1ffffc]);
+			iSWLk(addr & 3);
+			MOV32RtoM((uptr)&psxM[addr & 0x1ffffc], EAX);
+			return;
+		}
+		if (t == 0x1f80 && addr < 0x1f801000) {
+			MOV32MtoR(EAX, (uptr)&psxH[addr & 0xffc]);
+			iSWLk(addr & 3);
+			MOV32RtoM((uptr)&psxH[addr & 0xffc], EAX);
+			return;
+		}
+	}
+
+	if (IsConst(_Rs_)) MOV32ItoR(EAX, iRegs[_Rs_].k + _Imm_);
+	else {
+		MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]);
+		if (_Imm_) ADD32ItoR(EAX, _Imm_);
+	}
+	PUSHR  (EAX);
+	AND32ItoR(EAX, ~3);
+	MOV32RtoR(X86ARG1, EAX);
+
+	CALLFunc((uptr)psxMemRead32);
+
+	POPR   (EDX);
+	AND32ItoR(EDX, 0x3); // shift = addr & 3;
+
+	MOV64ItoR(ECX, (uptr)SWL_MASK);
+	MOV32RmStoR(ECX, ECX, EDX, 2);
+	AND32RtoR(EAX, ECX); // mem & SWL_MASK[shift]
+
+	MOV64ItoR(ECX, (uptr)SWL_SHIFT);
+	MOV32RmStoR(ECX, ECX, EDX, 2);
+	if (IsConst(_Rt_)) {
+		MOV32ItoR(EDX, iRegs[_Rt_].k);
+	} else {
+		MOV32MtoR(EDX, (uptr)&psxRegs.GPR.r[_Rt_]);
+	}
+	SHR32CLtoR(EDX); // _rRt_ >> SWL_SHIFT[shift]
+
+	OR32RtoR (EAX, EDX);
+	MOV32RtoR(X86ARG2, EAX);
+
+	if (IsConst(_Rs_)) MOV32ItoR(EAX, iRegs[_Rs_].k + _Imm_);
+	else {
+		MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]);
+		if (_Imm_) ADD32ItoR(EAX, _Imm_);
+	}
+	AND32ItoR(EAX, ~3);
+	MOV32RtoR(X86ARG1, EAX);
+
+	CALLFunc((uptr)psxMemWrite32);
+//	ADD32ItoR(ESP, 8);
+	//resp+= 8;
+}
+
+extern u32 SWR_MASK[4];
+extern u32 SWR_SHIFT[4];
+
+void iSWRk(u32 shift) {
+	if (IsConst(_Rt_)) {
+		MOV32ItoR(ECX, iRegs[_Rt_].k);
+	} else {
+		MOV32MtoR(ECX, (uptr)&psxRegs.GPR.r[_Rt_]);
+	}
+	SHL32ItoR(ECX, SWR_SHIFT[shift]);
+	AND32ItoR(EAX, SWR_MASK[shift]);
+	OR32RtoR (EAX, ECX);
+}
+
+void recSWR() {
+// mem[Rs + Im] = Rt Merge mem[Rs + Im]
+
+	if (IsConst(_Rs_)) {
+		u32 addr = iRegs[_Rs_].k + _Imm_;
+		int t = addr >> 16;
+
+		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+			MOV32MtoR(EAX, (uptr)&psxM[addr & 0x1ffffc]);
+			iSWRk(addr & 3);
+			MOV32RtoM((uptr)&psxM[addr & 0x1ffffc], EAX);
+			return;
+		}
+		if (t == 0x1f80 && addr < 0x1f801000) {
+			MOV32MtoR(EAX, (uptr)&psxH[addr & 0xffc]);
+			iSWRk(addr & 3);
+			MOV32RtoM((uptr)&psxH[addr & 0xffc], EAX);
+			return;
+		}
+	}
+
+	if (IsConst(_Rs_)) MOV32ItoR(EAX, iRegs[_Rs_].k + _Imm_);
+	else {
+		MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]);
+		if (_Imm_) ADD32ItoR(EAX, _Imm_);
+	}
+	PUSHR  (EAX);
+	
+	AND32ItoR(EAX, ~3);
+	MOV32RtoR(X86ARG1, EAX);
+
+	CALLFunc((uptr)psxMemRead32);
+
+	POPR   (EDX);
+	AND32ItoR(EDX, 0x3); // shift = addr & 3;
+
+	MOV64ItoR(ECX, (uptr)SWR_MASK);
+	MOV32RmStoR(ECX, ECX, EDX, 2);
+	AND32RtoR(EAX, ECX); // mem & SWR_MASK[shift]
+
+	MOV64ItoR(ECX, (uptr)SWR_SHIFT);
+	MOV32RmStoR(ECX, ECX, EDX, 2);
+	if (IsConst(_Rt_)) {
+		MOV32ItoR(EDX, iRegs[_Rt_].k);
+	} else {
+		MOV32MtoR(EDX, (uptr)&psxRegs.GPR.r[_Rt_]);
+	}
+	SHL32CLtoR(EDX); // _rRt_ << SWR_SHIFT[shift]
+
+	OR32RtoR (EAX, EDX);
+	MOV32RtoR(X86ARG2, EAX);
+
+	if (IsConst(_Rs_)) MOV32ItoR(EAX, iRegs[_Rs_].k + _Imm_);
+	else {
+		MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]);
+		if (_Imm_) ADD32ItoR(EAX, _Imm_);
+	}
+	AND32ItoR(EAX, ~3);
+	MOV32RtoR(X86ARG1, EAX);
+	CALLFunc((uptr)psxMemWrite32);
+//	ADD32ItoR(ESP, 8);
+	//resp+= 8;
+}
+
+#endif
+
+#if 0
+REC_FUNC(SLL);
+REC_FUNC(SRL);
+REC_FUNC(SRA);
+#endif
+#if 1
+static void recSLL() {
+// Rd = Rt << Sa
+	if (!_Rd_) return;
+
+//	iFlushRegs();
+
+	if (IsConst(_Rt_)) {
+		MapConst(_Rd_, iRegs[_Rt_].k << _Sa_);
+	} else {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]);
+		if (_Sa_) SHL32ItoR(EAX, _Sa_);
+		MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+	}
+}
+
+static void recSRL() {
+// Rd = Rt >> Sa
+	if (!_Rd_) return;
+
+//	iFlushRegs();
+
+	if (IsConst(_Rt_)) {
+		MapConst(_Rd_, iRegs[_Rt_].k >> _Sa_);
+	} else {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]);
+		if (_Sa_) SHR32ItoR(EAX, _Sa_);
+		MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+	}
+}
+
+static void recSRA() {
+// Rd = Rt >> Sa
+	if (!_Rd_) return;
+
+//	iFlushRegs();
+
+	if (IsConst(_Rt_)) {
+		MapConst(_Rd_, (s32)iRegs[_Rt_].k >> _Sa_);
+	} else {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]);
+		if (_Sa_) SAR32ItoR(EAX, _Sa_);
+		MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+	}
+}
+#endif
+
+#if 0
+REC_FUNC(SLLV);
+REC_FUNC(SRLV);
+REC_FUNC(SRAV);
+#endif
+
+#if 1
+static void recSLLV() {
+// Rd = Rt << Rs
+	if (!_Rd_) return;
+
+//	iFlushRegs();
+
+	if (IsConst(_Rt_) && IsConst(_Rs_)) {
+		MapConst(_Rd_, iRegs[_Rt_].k << iRegs[_Rs_].k);
+	} else if (IsConst(_Rs_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]);
+		MOV32ItoR(ECX, iRegs[_Rs_].k);
+		SHL32CLtoR(EAX);
+		MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+	} else if (IsConst(_Rt_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32ItoR(EAX, iRegs[_Rt_].k);
+		MOV32MtoR(ECX, (uptr)&psxRegs.GPR.r[_Rs_]);
+		SHL32CLtoR(EAX);
+		MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+	} else {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]);
+		MOV32MtoR(ECX, (uptr)&psxRegs.GPR.r[_Rs_]);
+		SHL32CLtoR(EAX);
+		MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+	}
+}
+
+static void recSRLV() {
+// Rd = Rt >> Rs
+	if (!_Rd_) return;
+
+//	iFlushRegs();
+
+	if (IsConst(_Rt_) && IsConst(_Rs_)) {
+		MapConst(_Rd_, iRegs[_Rt_].k >> iRegs[_Rs_].k);
+	} else if (IsConst(_Rs_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]);
+		MOV32ItoR(ECX, iRegs[_Rs_].k);
+		SHR32CLtoR(EAX);
+		MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+	} else if (IsConst(_Rt_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32ItoR(EAX, iRegs[_Rt_].k);
+		MOV32MtoR(ECX, (uptr)&psxRegs.GPR.r[_Rs_]);
+		SHR32CLtoR(EAX);
+		MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+	} else {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]);
+		MOV32MtoR(ECX, (uptr)&psxRegs.GPR.r[_Rs_]);
+		SHR32CLtoR(EAX);
+		MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+	}
+}
+
+static void recSRAV() {
+// Rd = Rt >> Rs
+	if (!_Rd_) return;
+
+//	iFlushRegs();
+
+	if (IsConst(_Rt_) && IsConst(_Rs_)) {
+		MapConst(_Rd_, (s32)iRegs[_Rt_].k >> iRegs[_Rs_].k);
+	} else if (IsConst(_Rs_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]);
+		MOV32ItoR(ECX, iRegs[_Rs_].k);
+		SAR32CLtoR(EAX);
+		MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+	} else if (IsConst(_Rt_)) {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32ItoR(EAX, iRegs[_Rt_].k);
+		MOV32MtoR(ECX, (uptr)&psxRegs.GPR.r[_Rs_]);
+		SAR32CLtoR(EAX);
+		MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+	} else {
+		iRegs[_Rd_].state = ST_UNK;
+
+		MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]);
+		MOV32MtoR(ECX, (uptr)&psxRegs.GPR.r[_Rs_]);
+		SAR32CLtoR(EAX);
+		MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+	}
+}
+#endif
+
+#if 0
+REC_SYS(SYSCALL);
+REC_SYS(BREAK);
+#endif
+
+int dump = 0;
+
+#if 1
+static void recSYSCALL() {
+//	dump=1;
+	iFlushRegs();
+
+	MOV32ItoR(EAX, pc - 4);
+	MOV32RtoM((uptr)&psxRegs.pc, EAX);
+	MOV64ItoR(X86ARG2, branch == 1 ? 1 : 0);
+	MOV64ItoR(X86ARG1, 0x20);
+	CALLFunc((uptr)psxException);
+	//ADD32ItoR(ESP, 8);
+
+	branch = 2;
+	iRet();
+}
+
+static void recBREAK() {
+}
+#endif
+
+#if 0
+REC_FUNC(MFHI);
+REC_FUNC(MTHI);
+REC_FUNC(MFLO);
+REC_FUNC(MTLO);
+#endif
+#if 1
+static void recMFHI() {
+// Rd = Hi
+	if (!_Rd_) return;
+
+	iRegs[_Rd_].state = ST_UNK;
+	MOV32MtoR(EAX, (uptr)&psxRegs.GPR.n.hi);
+	MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+}
+
+static void recMTHI() {
+// Hi = Rs
+
+	if (IsConst(_Rs_)) {
+		MOV32ItoM((uptr)&psxRegs.GPR.n.hi, iRegs[_Rs_].k);
+	} else {
+		MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]);
+		MOV32RtoM((uptr)&psxRegs.GPR.n.hi, EAX);
+	}
+}
+
+static void recMFLO() {
+// Rd = Lo
+	if (!_Rd_) return;
+
+	iRegs[_Rd_].state = ST_UNK;
+	MOV32MtoR(EAX, (uptr)&psxRegs.GPR.n.lo);
+	MOV32RtoM((uptr)&psxRegs.GPR.r[_Rd_], EAX);
+}
+
+static void recMTLO() {
+// Lo = Rs
+
+	if (IsConst(_Rs_)) {
+		MOV32ItoM((uptr)&psxRegs.GPR.n.lo, iRegs[_Rs_].k);
+	} else {
+		MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]);
+		MOV32RtoM((uptr)&psxRegs.GPR.n.lo, EAX);
+	}
+}
+#endif
+
+#if 0
+REC_BRANCH(J);
+REC_BRANCH(JR);
+REC_BRANCH(JAL);
+REC_BRANCH(JALR);
+REC_BRANCH(BLTZ);
+REC_BRANCH(BGTZ);
+REC_BRANCH(BLTZAL);
+REC_BRANCH(BGEZAL);
+REC_BRANCH(BNE);
+REC_BRANCH(BEQ);
+REC_BRANCH(BLEZ);
+REC_BRANCH(BGEZ);
+#endif
+#if 1
+static void recBLTZ() {
+// Branch if Rs < 0
+	u32 bpc = _Imm_ * 4 + pc;
+
+//	iFlushRegs();
+
+	if (bpc == pc+4 && psxTestLoadDelay(_Rs_, PSXMu32(bpc)) == 0) {
+		return;
+	}
+
+	if (IsConst(_Rs_)) {
+		if ((s32)iRegs[_Rs_].k < 0) {
+			iJump(bpc); return;
+		} else {
+			iJump(pc+4); return;
+		}
+	}
+
+	CMP32ItoM((uptr)&psxRegs.GPR.r[_Rs_], 0);
+	j32Ptr[4] = JL32(0);
+
+	iBranch(pc+4, 1);
+
+	x86SetJ32(j32Ptr[4]);
+
+	iBranch(bpc, 0);
+	pc+=4;
+}
+
+static void recBGTZ() {
+// Branch if Rs > 0
+	u32 bpc = _Imm_ * 4 + pc;
+
+//	iFlushRegs();
+	if (bpc == pc+4 && psxTestLoadDelay(_Rs_, PSXMu32(bpc)) == 0) {
+		return;
+	}
+
+	if (IsConst(_Rs_)) {
+		if ((s32)iRegs[_Rs_].k > 0) {
+			iJump(bpc); return;
+		} else {
+			iJump(pc+4); return;
+		}
+	}
+
+	CMP32ItoM((uptr)&psxRegs.GPR.r[_Rs_], 0);
+	j32Ptr[4] = JG32(0);
+
+	iBranch(pc+4, 1);
+
+	x86SetJ32(j32Ptr[4]);
+
+	iBranch(bpc, 0);
+	pc+=4;
+}
+
+static void recBLTZAL() {
+// Branch if Rs < 0
+	u32 bpc = _Imm_ * 4 + pc;
+
+//	iFlushRegs();
+	if (bpc == pc+4 && psxTestLoadDelay(_Rs_, PSXMu32(bpc)) == 0) {
+		return;
+	}
+
+	if (IsConst(_Rs_)) {
+		if ((s32)iRegs[_Rs_].k < 0) {
+			MOV32ItoM((uptr)&psxRegs.GPR.r[31], pc + 4);
+			iJump(bpc); return;
+		} else {
+			iJump(pc+4); return;
+		}
+	}
+
+	CMP32ItoM((uptr)&psxRegs.GPR.r[_Rs_], 0);
+	j32Ptr[4] = JL32(0);
+
+	iBranch(pc+4, 1);
+
+	x86SetJ32(j32Ptr[4]);
+
+	MOV32ItoM((uptr)&psxRegs.GPR.r[31], pc + 4);
+	iBranch(bpc, 0);
+	pc+=4;
+}
+
+static void recBGEZAL() {
+// Branch if Rs >= 0
+	u32 bpc = _Imm_ * 4 + pc;
+
+//	iFlushRegs();
+	if (bpc == pc+4 && psxTestLoadDelay(_Rs_, PSXMu32(bpc)) == 0) {
+		return;
+	}
+
+	if (IsConst(_Rs_)) {
+		if ((s32)iRegs[_Rs_].k >= 0) {
+			MOV32ItoM((uptr)&psxRegs.GPR.r[31], pc + 4);
+			iJump(bpc); return;
+		} else {
+			iJump(pc+4); return;
+		}
+	}
+
+	CMP32ItoM((uptr)&psxRegs.GPR.r[_Rs_], 0);
+	j32Ptr[4] = JGE32(0);
+
+	iBranch(pc+4, 1);
+
+	x86SetJ32(j32Ptr[4]);
+
+	MOV32ItoM((uptr)&psxRegs.GPR.r[31], pc + 4);
+	iBranch(bpc, 0);
+	pc+=4;
+}
+
+static void recJ() {
+// j target
+
+	iJump(_Target_ * 4 + (pc & 0xf0000000));
+}
+
+static void recJAL() {
+// jal target
+
+	MapConst(31, pc + 4);
+
+	iJump(_Target_ * 4 + (pc & 0xf0000000));
+}
+
+static void recJR() {
+// jr Rs
+
+	if (IsConst(_Rs_)) {
+		MOV32ItoM((uptr)&target, iRegs[_Rs_].k);
+	} else {
+		MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]);
+		MOV32RtoM((uptr)&target, EAX);
+	}
+
+	SetBranch();
+}
+
+static void recJALR() {
+// jalr Rs
+
+	if (IsConst(_Rs_)) {
+		MOV32ItoM((uptr)&target, iRegs[_Rs_].k);
+	} else {
+		MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]);
+		MOV32RtoM((uptr)&target, EAX);
+	}
+
+	if (_Rd_) {
+		MapConst(_Rd_, pc + 4);
+	}
+	
+	SetBranch();
+}
+
+static void recBEQ() {
+// Branch if Rs == Rt
+	u32 bpc = _Imm_ * 4 + pc;
+
+//	iFlushRegs();
+	if (bpc == pc+4 && psxTestLoadDelay(_Rs_, PSXMu32(bpc)) == 0) {
+		return;
+	}
+
+	if (_Rs_ == _Rt_) {
+		iJump(bpc);
+	} else {
+		if (IsConst(_Rs_) && IsConst(_Rt_)) {
+			if (iRegs[_Rs_].k == iRegs[_Rt_].k) {
+				iJump(bpc); return;
+			} else {
+				iJump(pc+4); return;
+			}
+		} else if (IsConst(_Rs_)) {
+			CMP32ItoM((uptr)&psxRegs.GPR.r[_Rt_], iRegs[_Rs_].k);
+		} else if (IsConst(_Rt_)) {
+			CMP32ItoM((uptr)&psxRegs.GPR.r[_Rs_], iRegs[_Rt_].k);
+		} else {
+			MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]);
+			CMP32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]);
+		}
+
+		j32Ptr[4] = JE32(0);
+
+		iBranch(pc+4, 1);
+
+		x86SetJ32(j32Ptr[4]);
+
+		iBranch(bpc, 0);
+		pc+=4;
+	}
+}
+
+static void recBNE() {
+// Branch if Rs != Rt
+	u32 bpc = _Imm_ * 4 + pc;
+
+//	iFlushRegs();
+	if (bpc == pc+4 && psxTestLoadDelay(_Rs_, PSXMu32(bpc)) == 0) {
+		return;
+	}
+
+	if (IsConst(_Rs_) && IsConst(_Rt_)) {
+		if (iRegs[_Rs_].k != iRegs[_Rt_].k) {
+			iJump(bpc); return;
+		} else {
+			iJump(pc+4); return;
+		}
+	} else if (IsConst(_Rs_)) {
+		CMP32ItoM((uptr)&psxRegs.GPR.r[_Rt_], iRegs[_Rs_].k);
+	} else if (IsConst(_Rt_)) {
+		CMP32ItoM((uptr)&psxRegs.GPR.r[_Rs_], iRegs[_Rt_].k);
+	} else {
+		MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rs_]);
+		CMP32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]);
+	}
+	j32Ptr[4] = JNE32(0);
+
+	iBranch(pc+4, 1);
+
+	x86SetJ32(j32Ptr[4]);
+
+	iBranch(bpc, 0);
+	pc+=4;
+}
+
+static void recBLEZ() {
+// Branch if Rs <= 0
+	u32 bpc = _Imm_ * 4 + pc;
+
+//	iFlushRegs();
+	if (bpc == pc+4 && psxTestLoadDelay(_Rs_, PSXMu32(bpc)) == 0) {
+		return;
+	}
+
+	if (IsConst(_Rs_)) {
+		if ((s32)iRegs[_Rs_].k <= 0) {
+			iJump(bpc); return;
+		} else {
+			iJump(pc+4); return;
+		}
+	}
+
+	CMP32ItoM((uptr)&psxRegs.GPR.r[_Rs_], 0);
+	j32Ptr[4] = JLE32(0);
+
+	iBranch(pc+4, 1);
+
+	x86SetJ32(j32Ptr[4]);
+
+	iBranch(bpc, 0);
+	pc+=4;
+}
+
+static void recBGEZ() {
+// Branch if Rs >= 0
+	u32 bpc = _Imm_ * 4 + pc;
+
+//	iFlushRegs();
+	if (bpc == pc+4 && psxTestLoadDelay(_Rs_, PSXMu32(bpc)) == 0) {
+		return;
+	}
+
+	if (IsConst(_Rs_)) {
+		if ((s32)iRegs[_Rs_].k >= 0) {
+			iJump(bpc); return;
+		} else {
+			iJump(pc+4); return;
+		}
+	}
+
+	CMP32ItoM((uptr)&psxRegs.GPR.r[_Rs_], 0);
+	j32Ptr[4] = JGE32(0);
+
+	iBranch(pc+4, 1);
+
+	x86SetJ32(j32Ptr[4]);
+
+	iBranch(bpc, 0);
+	pc+=4;
+}
+#endif
+
+#if 0
+REC_FUNC(MFC0);
+REC_SYS(MTC0);
+REC_FUNC(CFC0);
+REC_SYS(CTC0);
+REC_FUNC(RFE);
+#endif
+//REC_SYS(MTC0);
+#if 1
+static void recMFC0() {
+// Rt = Cop0->Rd
+	if (!_Rt_) return;
+
+	iRegs[_Rt_].state = ST_UNK;
+	MOV32MtoR(EAX, (uptr)&psxRegs.CP0.r[_Rd_]);
+	MOV32RtoM((uptr)&psxRegs.GPR.r[_Rt_], EAX);
+}
+
+static void recCFC0() {
+// Rt = Cop0->Rd
+
+	recMFC0();
+}
+
+//*
+void psxMTC0();
+static void recMTC0() {
+// Cop0->Rd = Rt
+
+	if (IsConst(_Rt_)) {
+		switch (_Rd_) {
+			case 12:
+				MOV32ItoM((uptr)&psxRegs.CP0.r[_Rd_], iRegs[_Rt_].k);
+				break;
+			case 13:
+				MOV32ItoM((uptr)&psxRegs.CP0.r[_Rd_], iRegs[_Rt_].k & ~(0xfc00));
+				break;
+			default:
+				MOV32ItoM((uptr)&psxRegs.CP0.r[_Rd_], iRegs[_Rt_].k);
+				break;
+		}
+	} else {
+		MOV32MtoR(EAX, (uptr)&psxRegs.GPR.r[_Rt_]);
+		switch (_Rd_) {
+			case 13:
+				AND32ItoR(EAX, ~(0xfc00));
+				break;
+		}
+		MOV32RtoM((uptr)&psxRegs.CP0.r[_Rd_], EAX);
+	}
+
+	if (_Rd_ == 12 || _Rd_ == 13) {
+		iFlushRegs();
+		MOV32ItoM((uptr)&psxRegs.pc, (u32)pc);
+		CALLFunc((uptr)psxTestSWInts);
+		if (branch == 0) {
+			branch = 2;
+			iRet();
+		}
+	}
+}//*/
+
+static void recCTC0() {
+// Cop0->Rd = Rt
+
+	recMTC0();
+}
+
+static void recRFE() {
+	MOV32MtoR(EAX, (uptr)&psxRegs.CP0.n.Status);
+	MOV32RtoR(ECX, EAX);
+	AND32ItoR(EAX, 0xfffffff0);
+	AND32ItoR(ECX, 0x3c);
+	SHR32ItoR(ECX, 2);
+	OR32RtoR (EAX, ECX);
+	MOV32RtoM((uptr)&psxRegs.CP0.n.Status, EAX);
+
+	iFlushRegs();
+	MOV32ItoM((uptr)&psxRegs.pc, (u32)pc);
+	CALLFunc((uptr)psxTestSWInts);
+	if (branch == 0) {
+		branch = 2;
+		iRet();
+	}
+}
+#endif
+
+#include "iGte.h"
+
+//
+
+static void recHLE() {
+	iFlushRegs();
+
+	CALLFunc((uptr)psxHLEt[psxRegs.code & 0xffff]);
+	branch = 2;
+	iRet();
+}
+
+//
+
+static void (*recBSC[64])() = {
+	recSPECIAL, recREGIMM, recJ   , recJAL  , recBEQ , recBNE , recBLEZ, recBGTZ,
+	recADDI   , recADDIU , recSLTI, recSLTIU, recANDI, recORI , recXORI, recLUI ,
+	recCOP0   , recNULL  , recCOP2, recNULL , recNULL, recNULL, recNULL, recNULL,
+	recNULL   , recNULL  , recNULL, recNULL , recNULL, recNULL, recNULL, recNULL,
+	recLB     , recLH    , recLWL , recLW   , recLBU , recLHU , recLWR , recNULL,
+	recSB     , recSH    , recSWL , recSW   , recNULL, recNULL, recSWR , recNULL,
+	recNULL   , recNULL  , recLWC2, recNULL , recNULL, recNULL, recNULL, recNULL,
+	recNULL   , recNULL  , recSWC2, recHLE  , recNULL, recNULL, recNULL, recNULL
+};
+
+static void (*recSPC[64])() = {
+	recSLL , recNULL, recSRL , recSRA , recSLLV   , recNULL , recSRLV, recSRAV,
+	recJR  , recJALR, recNULL, recNULL, recSYSCALL, recBREAK, recNULL, recNULL,
+	recMFHI, recMTHI, recMFLO, recMTLO, recNULL   , recNULL , recNULL, recNULL,
+	recMULT, recMULTU, recDIV, recDIVU, recNULL   , recNULL , recNULL, recNULL,
+	recADD , recADDU, recSUB , recSUBU, recAND    , recOR   , recXOR , recNOR ,
+	recNULL, recNULL, recSLT , recSLTU, recNULL   , recNULL , recNULL, recNULL,
+	recNULL, recNULL, recNULL, recNULL, recNULL   , recNULL , recNULL, recNULL,
+	recNULL, recNULL, recNULL, recNULL, recNULL   , recNULL , recNULL, recNULL
+};
+
+static void (*recREG[32])() = {
+	recBLTZ  , recBGEZ  , recNULL, recNULL, recNULL, recNULL, recNULL, recNULL,
+	recNULL  , recNULL  , recNULL, recNULL, recNULL, recNULL, recNULL, recNULL,
+	recBLTZAL, recBGEZAL, recNULL, recNULL, recNULL, recNULL, recNULL, recNULL,
+	recNULL  , recNULL  , recNULL, recNULL, recNULL, recNULL, recNULL, recNULL
+};
+
+static void (*recCP0[32])() = {
+	recMFC0, recNULL, recCFC0, recNULL, recMTC0, recNULL, recCTC0, recNULL,
+	recNULL, recNULL, recNULL, recNULL, recNULL, recNULL, recNULL, recNULL,
+	recRFE , recNULL, recNULL, recNULL, recNULL, recNULL, recNULL, recNULL,
+	recNULL, recNULL, recNULL, recNULL, recNULL, recNULL, recNULL, recNULL
+};
+
+static void (*recCP2[64])() = {
+	recBASIC, recRTPS , recNULL , recNULL, recNULL, recNULL , recNCLIP, recNULL, // 00
+	recNULL , recNULL , recNULL , recNULL, recOP  , recNULL , recNULL , recNULL, // 08
+	recDPCS , recINTPL, recMVMVA, recNCDS, recCDP , recNULL , recNCDT , recNULL, // 10
+	recNULL , recNULL , recNULL , recNCCS, recCC  , recNULL , recNCS  , recNULL, // 18
+	recNCT  , recNULL , recNULL , recNULL, recNULL, recNULL , recNULL , recNULL, // 20
+	recSQR  , recDCPL , recDPCT , recNULL, recNULL, recAVSZ3, recAVSZ4, recNULL, // 28 
+	recRTPT , recNULL , recNULL , recNULL, recNULL, recNULL , recNULL , recNULL, // 30
+	recNULL , recNULL , recNULL , recNULL, recNULL, recGPF  , recGPL  , recNCCT  // 38
+};
+
+static void (*recCP2BSC[32])() = {
+	recMFC2, recNULL, recCFC2, recNULL, recMTC2, recNULL, recCTC2, recNULL,
+	recNULL, recNULL, recNULL, recNULL, recNULL, recNULL, recNULL, recNULL,
+	recNULL, recNULL, recNULL, recNULL, recNULL, recNULL, recNULL, recNULL,
+	recNULL, recNULL, recNULL, recNULL, recNULL, recNULL, recNULL, recNULL
+};
+
+
+static void recRecompile() {
+	char *p;
+	char *ptr;
+
+	dump = 0;
+	resp = 0;
+
+	/* if x86Ptr reached the mem limit reset whole mem */
+	if (((uptr)x86Ptr - (uptr)recMem) >= (RECMEM_SIZE - PTRMULT*0x10000))
+		recReset();
+
+	x86Align(32);
+	ptr = x86Ptr;
+
+	PC_RECP(psxRegs.pc) = x86Ptr;
+	pc = psxRegs.pc;
+	pcold = pc;
+
+	//Make some stack space for function arguments spill (x86-64 calling conventions)
+	// 0x38 = 7 args, should be plenty...
+	SUB64ItoR(RSP, STACKSIZE);
+
+	for (count=0; count<500;) {
+		p = (char *)PSXM(pc);
+		if (p == NULL) recError();
+		psxRegs.code = *(u32 *)p;
+/*
+		if ((psxRegs.code >> 26) == 0x23) { // LW
+			int i;
+			u32 code;
+
+			for (i=1;; i++) {
+				p = (char *)PSXM(pc+i*4);
+				if (p == NULL) recError();
+				code = *(u32 *)p;
+
+				if ((code >> 26) != 0x23 ||
+					_fRs_(code)  != _Rs_ ||
+					_fImm_(code) != (_Imm_+i*4))
+					break;
+			}
+			if (i > 1) {
+				recLWBlock(i);
+				pc = pc + i*4; continue;
+			}
+		}
+
+		if ((psxRegs.code >> 26) == 0x2b) { // SW
+			int i;
+			u32 code;
+
+			for (i=1;; i++) {
+				p = (char *)PSXM(pc+i*4);
+				if (p == NULL) recError();
+				code = *(u32 *)p;
+
+				if ((code >> 26) != 0x2b ||
+					_fRs_(code)  != _Rs_ ||
+					_fImm_(code) != (_Imm_+i*4))
+					break;
+			}
+			if (i > 1) {
+				recSWBlock(i);
+				pc = pc + i*4; continue;
+			}
+		}*/
+
+		pc+=4; count++;
+		recBSC[psxRegs.code>>26]();
+
+		if (branch) {
+			branch = 0;
+			if (dump) iDumpBlock(ptr);
+			return;
+		}
+	}
+
+	iFlushRegs();
+
+	MOV32ItoM((uptr)&psxRegs.pc, pc);
+	iRet();
+}
+
+
+R3000Acpu psxRec = {
+	recInit,
+	recReset,
+	recExecute,
+	recExecuteBlock,
+	recClear,
+	recShutdown
+};
diff --git a/libpcsxcore/ix86_64/ix86-64.c b/libpcsxcore/ix86_64/ix86-64.c
new file mode 100644
index 0000000..0582f35
--- /dev/null
+++ b/libpcsxcore/ix86_64/ix86-64.c
@@ -0,0 +1,3139 @@
+/*
+ * ix86 core v0.6.2
+ *  Authors: linuzappz <linuzappz@pcsx.net>
+ *           alexey silinov
+ *           goldfinger
+ *			 zerofrog(@gmail.com)
+ */
+
+// stop compiling if NORECBUILD build (only for Visual Studio)
+#if !(defined(_MSC_VER) && defined(PCSX2_NORECBUILD))
+
+#include <stdio.h>
+#include <string.h>
+#include <assert.h>
+#include "ix86-64.h"
+
+#ifdef __x86_64__
+
+#ifdef _MSC_VER
+// visual studio calling convention
+x86IntRegType g_x86savedregs[] = { RBX, RBP, RSI, RDI, R12, R13, R14, R15 };
+x86IntRegType g_x86tempregs[] = { R8, R9, R10, R11, RDX, RCX };
+
+// arranged in savedreg -> tempreg order
+x86IntRegType g_x86allregs[14] = { RBX, RBP, RSI, RDI, R12, R13, R14, R15, R8, R9, R10, R11, RDX, RCX };
+
+#else
+// standard calling convention
+
+// registers saved by called functions (no need to flush them across calls)
+x86IntRegType g_x86savedregs[] = { RBX, RBP, R12, R13, R14, R15 };
+// temp registers that need to be saved across calls
+x86IntRegType g_x86tempregs[] = { RCX, RDX, R8, R9, R10, R11, RSI, RDI };
+
+// arranged in savedreg -> tempreg order
+x86IntRegType g_x86allregs[14] = { RBX, RBP, R12, R13, R14, R15, RCX, RDX, R8, R9, R10, R11, RSI, RDI };
+
+#endif
+
+x86IntRegType g_x868bitregs[11] = { RBX, R12, R13, R14, R15, RCX, RDX, R8, R9, R10, R11 };
+x86IntRegType g_x86non8bitregs[3] = { RBP, RSI, RDI };
+
+#endif // __x86_64__
+
+s8  *x86Ptr;
+u8  *j8Ptr[32];
+u32 *j32Ptr[32];
+
+void WriteRmOffset(x86IntRegType to, int offset)
+{
+	if( (to&7) == ESP ) {
+		if( offset == 0 ) {
+			ModRM( 0, 0, 4 );
+			ModRM( 0, ESP, 4 );
+		}
+		else if( offset < 128 && offset >= -128 ) {
+			ModRM( 1, 0, 4 );
+			ModRM( 0, ESP, 4 );
+			write8(offset);
+		}
+		else {
+			ModRM( 2, 0, 4 );
+			ModRM( 0, ESP, 4 );
+			write32(offset);
+		}
+	}
+	else {
+		if( offset == 0 ) {
+			ModRM( 0, 0, to );
+		}
+		else if( offset < 128 && offset >= -128 ) {
+			ModRM( 1, 0, to );
+			write8(offset);
+		}
+		else {
+			ModRM( 2, 0, to );
+			write32(offset);
+		}
+	}
+}
+
+void WriteRmOffsetFrom(x86IntRegType to, x86IntRegType from, int offset)
+{
+    if ((from&7) == ESP) {
+		if( offset == 0 ) {
+			ModRM( 0, to, 0x4 );
+			SibSB( 0, 0x4, 0x4 );
+		}
+		else if( offset < 128 && offset >= -128 ) {
+			ModRM( 1, to, 0x4 );
+			SibSB( 0, 0x4, 0x4 );
+			write8(offset);
+		}
+		else {
+			ModRM( 2, to, 0x4 );
+			SibSB( 0, 0x4, 0x4 );
+            write32(offset);
+		}
+	}
+	else {
+		if( offset == 0 ) {
+			ModRM( 0, to, from );
+		}
+		else if( offset < 128 && offset >= -128 ) {
+			ModRM( 1, to, from );
+			write8(offset);
+		}
+		else {
+			ModRM( 2, to, from );
+			write32(offset);
+		}
+	}
+}
+
+// This function is just for rec debugging purposes
+void CheckX86Ptr( void )
+{
+}
+
+void writeVAROP(unsigned opl, u64 op)
+{
+	while (opl--)
+	{
+		write8(op & 0xFF);
+		op >>= 8;
+	}
+}
+
+#define writeVARROP(REX, opl, op) ({ \
+		if (opl > 1 && ((op & 0xFF) == 0x66 || (op & 0xFF) == 0xF3 || (op & 0xFF) == 0xF2)) { \
+			write8(op & 0xFF); \
+			opl --; \
+			op >>= 8; \
+		} \
+		REX; \
+		writeVAROP(opl, op); \
+	})
+
+void MEMADDR_OP(bool w, unsigned opl, u64 op, bool isreg, int reg, uptr p, sptr off)
+{
+#ifdef __x86_64__
+	sptr pr = MEMADDR_(p, 5 + opl + (w || reg >= 8) + off);
+	if (SPTR32(pr))
+	{
+		writeVARROP(RexR(w, reg), opl, op);
+		ModRM(0, reg, DISP32);
+		write32(pr);
+	}
+	else if (UPTR32(p))
+	{
+		writeVARROP(RexR(w, reg), opl, op);
+		ModRM(0, reg, SIB);
+		SibSB(0, SIB, DISP32);
+		write32(p);
+	}
+	else
+	{
+		assert(!isreg || reg != X86_TEMP);
+		MOV64ItoR(X86_TEMP, p);
+		writeVARROP(RexRB(w, reg, X86_TEMP), opl, op);
+		ModRM(0, reg, X86_TEMP);
+	}
+#else
+	writeVARROP(RexR(w, reg), opl, op);
+	ModRM(0, reg, DISP32);
+	write32(p);
+#endif
+}
+
+void SET8R( int cc, int to )
+{
+    RexB(0, to);
+	write8( 0x0F );
+    write8( cc );
+	write8( 0xC0 | ( to ) );
+}
+
+u8* J8Rel( int cc, int to )
+{
+	write8( cc );
+    write8( to );
+    return x86Ptr - 1;
+}
+
+u16* J16Rel( int cc, u32 to )
+{
+	write16( 0x0F66 );
+	write8( cc );
+	write16( to );
+	return (u16*)( x86Ptr - 2 );
+}
+
+u32* J32Rel( int cc, u32 to )
+{
+	write8( 0x0F );
+   write8( cc );
+   write32( to );
+   return (u32*)( x86Ptr - 4 );
+}
+
+void CMOV32RtoR( int cc, int to, int from )
+{
+    RexRB(0,to, from);
+	write8( 0x0F );
+    write8( cc );
+	ModRM( 3, to, from );
+}
+
+void CMOV32MtoR( int cc, x86IntRegType to, uptr from )
+{
+	MEMADDR_OP(0, VAROP2(0x0F, cc), true, to, from, 0);
+}
+
+////////////////////////////////////////////////////
+void x86SetPtr( char* ptr ) 
+{
+	x86Ptr = ptr;
+}
+
+////////////////////////////////////////////////////
+void x86Shutdown( void )
+{
+}
+
+////////////////////////////////////////////////////
+void x86SetJ8( u8* j8 )
+{
+	u32 jump = ( x86Ptr - (s8*)j8 ) - 1;
+
+	if ( jump > 0x7f ) {
+		assert(0);
+		SysPrintf( "j8 greater than 0x7f!!\n" );
+	}
+	*j8 = (u8)jump;
+}
+
+void x86SetJ8A( u8* j8 )
+{
+	u32 jump = ( x86Ptr - (s8*)j8 ) - 1;
+
+	if ( jump > 0x7f ) {
+		assert(0);
+		SysPrintf( "j8 greater than 0x7f!!\n" );
+	}
+
+	if( ((uptr)x86Ptr&0xf) > 4 ) {
+
+		uptr newjump = jump + 16-((uptr)x86Ptr&0xf);
+
+		if( newjump <= 0x7f ) {
+			jump = newjump;
+			while((uptr)x86Ptr&0xf) *x86Ptr++ = 0x90;
+		}
+	}
+	*j8 = (u8)jump;
+}
+
+void x86SetJ16( u16 *j16 )
+{
+	// doesn't work
+	u32 jump = ( x86Ptr - (s8*)j16 ) - 2;
+
+	if ( jump > 0x7fff ) {
+		assert(0);
+		SysPrintf( "j16 greater than 0x7fff!!\n" );
+	}
+	*j16 = (u16)jump;
+}
+
+void x86SetJ16A( u16 *j16 )
+{
+	if( ((uptr)x86Ptr&0xf) > 4 ) {
+		while((uptr)x86Ptr&0xf) *x86Ptr++ = 0x90;
+	}
+	x86SetJ16(j16);
+}
+
+////////////////////////////////////////////////////
+void x86SetJ32( u32* j32 ) 
+{
+	*j32 = ( x86Ptr - (s8*)j32 ) - 4;
+}
+
+void x86SetJ32A( u32* j32 )
+{
+	while((uptr)x86Ptr&0xf) *x86Ptr++ = 0x90;
+	x86SetJ32(j32);
+}
+
+////////////////////////////////////////////////////
+void x86Align( int bytes ) 
+{
+	// fordward align
+	x86Ptr = (s8*)( ( (uptr)x86Ptr + bytes - 1) & ~( bytes - 1 ) );
+}
+
+/********************/
+/* IX86 intructions */
+/********************/
+
+void STC( void )
+{
+   write8( 0xF9 );
+}
+
+void CLC( void )
+{
+   write8( 0xF8 );
+}
+
+////////////////////////////////////
+// mov instructions                /
+////////////////////////////////////
+
+/* mov r64 to r64 */
+void MOV64RtoR( x86IntRegType to, x86IntRegType from ) 
+{
+	RexRB(1, from, to);
+	write8( 0x89 );
+	ModRM( 3, from, to );
+}
+
+/* mov r64 to m64 */
+void MOV64RtoM( uptr to, x86IntRegType from ) 
+{
+	if (from == RAX)
+	{
+		RexR(1, 0);
+		write8(0xA3);
+		write64(to);
+	}
+	else
+	{
+		MEMADDR_OP(1, VAROP1(0x89), true, from, to, 0);
+	}
+}
+
+/* mov m64 to r64 */
+void MOV64MtoR( x86IntRegType to, uptr from ) 
+{
+	if (to == RAX)
+	{
+		RexR(1, 0);
+		write8(0xA1);
+		write64(from);
+	}
+	else
+	{
+		MEMADDR_OP(1, VAROP1(0x8B), true, to, from, 0);
+	}
+}
+
+/* mov imm32 to m64 */
+void MOV64I32toM(uptr to, u32 from ) 
+{
+	MEMADDR_OP(1, VAROP1(0xC7), false, 0, to, 4);
+	write32(from);
+}
+
+// mov imm64 to r64
+void MOV64ItoR( x86IntRegType to, u64 from)
+{
+	RexB(1, to);
+	write8( 0xB8 | (to & 0x7) ); 
+	write64( from );
+}
+
+/* mov imm32 to r64 */
+void MOV64I32toR( x86IntRegType to, s32 from ) 
+{
+	RexB(1, to);
+	write8( 0xC7 ); 
+	ModRM( 0, 0, to );
+	write32( from );
+}
+
+// mov imm64 to [r64+off]
+void MOV64ItoRmOffset( x86IntRegType to, u32 from, int offset)
+{
+    RexB(1,to);
+	write8( 0xC7 );
+    WriteRmOffset(to, offset);
+	write32(from);
+}
+
+// mov [r64+offset] to r64
+void MOV64RmOffsettoR( x86IntRegType to, x86IntRegType from, int offset )
+{
+    RexRB(1, to, from);
+	write8( 0x8B );
+    WriteRmOffsetFrom(to, from, offset);
+}
+
+/* mov [r64][r64*scale] to r64 */
+void MOV64RmStoR( x86IntRegType to, x86IntRegType from, x86IntRegType from2, int scale) {
+	RexRXB(1, to, from2, from);
+	write8( 0x8B );
+	ModRM( 0, to, 0x4 );
+	SibSB(scale, from2, from );
+}
+
+/* mov r64 to [r64+offset] */
+void MOV64RtoRmOffset( x86IntRegType to, x86IntRegType from, int offset )
+{
+    RexRB(1,from,to);
+	write8( 0x89 );
+    WriteRmOffsetFrom(from, to, offset);
+}
+
+/* mov r64 to [r64][r64*scale] */
+void MOV64RtoRmS( x86IntRegType to, x86IntRegType from, x86IntRegType from2, int scale) {
+	RexRXB(1, to, from2, from);
+	write8( 0x89 );
+	ModRM( 0, to, 0x4 );
+	SibSB(scale, from2, from );
+}
+
+
+/* mov r32 to r32 */
+void MOV32RtoR( x86IntRegType to, x86IntRegType from ) 
+{
+    RexRB(0, from, to);
+	write8( 0x89 );
+	ModRM( 3, from, to );
+}
+
+/* mov r32 to m32 */
+void MOV32RtoM( uptr to, x86IntRegType from ) 
+{
+	if (from == EAX)
+	{
+		write8(0xA3);
+		write64(to);
+	}
+	else
+	{
+		MEMADDR_OP(0, VAROP1(0x89), true, from, to, 0);
+	}
+}
+
+/* mov m32 to r32 */
+void MOV32MtoR( x86IntRegType to, uptr from ) 
+{
+	if (to == RAX)
+	{
+		write8(0xA1);
+		write64(from);
+	}
+	else
+	{
+		MEMADDR_OP(0, VAROP1(0x8B), true, to, from, 0);
+	}
+}
+
+/* mov [r32] to r32 */
+void MOV32RmtoR( x86IntRegType to, x86IntRegType from ) {
+    RexRB(0, to, from);
+    write8(0x8B);
+    WriteRmOffsetFrom(to, from, 0);
+}
+
+void MOV32RmtoROffset( x86IntRegType to, x86IntRegType from, int offset ) {
+	RexRB(0, to, from);
+	write8( 0x8B );
+    WriteRmOffsetFrom(to, from, offset);
+}
+
+/* mov [r32+r32*scale] to r32 */
+void MOV32RmStoR( x86IntRegType to, x86IntRegType from, x86IntRegType from2, int scale) {
+    RexRXB(0,to,from2,from);
+	write8( 0x8B );
+	ModRM( 0, to, 0x4 );
+	SibSB(scale, from2, from );
+}
+
+// mov r32 to [r32<<scale+from2]
+void MOV32RmSOffsettoR( x86IntRegType to, x86IntRegType from1, int from2, int scale )
+{
+    RexRXB(0,to,from1,0);
+	write8( 0x8B );
+	ModRM( 0, to, 0x4 );
+	ModRM( scale, from1, 5);
+	write32(from2);
+}
+
+/* mov r32 to [r32] */
+void MOV32RtoRm( x86IntRegType to, x86IntRegType from ) {
+    RexRB(0, from, to);
+	if ((to&7) == ESP) {
+		write8( 0x89 );
+		ModRM( 0, from, 0x4 );
+		SibSB( 0, 0x4, 0x4 );
+	} else {
+		write8( 0x89 );
+		ModRM( 0, from, to );
+	}
+}
+
+/* mov r32 to [r32][r32*scale] */
+void MOV32RtoRmS( x86IntRegType to, x86IntRegType from, x86IntRegType from2, int scale) {
+    RexRXB(0, to, from2, from);
+	write8( 0x89 );
+	ModRM( 0, to, 0x4 );
+	SibSB(scale, from2, from );
+}
+
+/* mov imm32 to r32 */
+void MOV32ItoR( x86IntRegType to, u32 from ) 
+{
+    RexB(0, to);
+	write8( 0xB8 | (to & 0x7) ); 
+	write32( from );
+}
+
+/* mov imm32 to m32 */
+void MOV32ItoM(uptr to, u32 from ) 
+{
+	MEMADDR_OP(0, VAROP1(0xC7), false, 0, to, 4);
+	write32(from);
+}
+
+// mov imm32 to [r32+off]
+void MOV32ItoRmOffset( x86IntRegType to, u32 from, int offset)
+{
+    RexB(0,to);
+	write8( 0xC7 );
+    WriteRmOffset(to, offset);
+	write32(from);
+}
+
+// mov r32 to [r32+off]
+void MOV32RtoRmOffset( x86IntRegType to, x86IntRegType from, int offset)
+{
+    RexRB(0,from,to);
+	write8( 0x89 );
+    WriteRmOffsetFrom(from, to, offset);
+}
+
+/* mov r16 to m16 */
+void MOV16RtoM(uptr to, x86IntRegType from ) 
+{
+	if (from == EAX)
+	{
+		write8(0x66);
+		write8(0xA3);
+		write64(to);
+	}
+	else
+	{
+		MEMADDR_OP(0, VAROP2(0x66, 0x89), true, from, to, 0);
+	}
+}
+
+/* mov m16 to r16 */
+void MOV16MtoR( x86IntRegType to, uptr from ) 
+{
+	if (to == EAX)
+	{
+		write8(0x66);
+		write8(0xA1);
+		write64(from);
+	}
+	else
+	{
+		MEMADDR_OP(0, VAROP2(0x66, 0x8B), true, to, from, 0);
+	}
+}
+
+void MOV16RmtoR( x86IntRegType to, x86IntRegType from) 
+{
+	write8( 0x66 );
+    RexRB(0,to,from);
+	write8( 0x8B );
+    WriteRmOffsetFrom(to, from, 0);
+}
+
+void MOV16RmtoROffset( x86IntRegType to, x86IntRegType from, int offset )
+{
+	write8( 0x66 );
+    RexRB(0,to,from);
+	write8( 0x8B );
+    WriteRmOffsetFrom(to, from, offset);
+}
+
+void MOV16RmSOffsettoR( x86IntRegType to, x86IntRegType from1, u32 from2, int scale )
+{
+    write8(0x66);
+    RexRXB(0,to,from1,0);
+	write8( 0x8B );
+	ModRM( 0, to, 0x4 );
+	ModRM( scale, from1, 5);
+	write32(from2);
+}
+
+void MOV16RtoRm(x86IntRegType to, x86IntRegType from)
+{
+	write8( 0x66 );
+    RexRB(0,from,to);
+	write8( 0x89 );
+	ModRM( 0, from, to );
+}
+
+/* mov imm16 to m16 */
+void MOV16ItoM( uptr to, u16 from ) 
+{
+	MEMADDR_OP(0, VAROP2(0x66, 0xC7), false, 0, to, 2);
+	write16( from ); 
+}
+
+/* mov r16 to [r32][r32*scale] */
+void MOV16RtoRmS( x86IntRegType to, x86IntRegType from, x86IntRegType from2, int scale) {
+	write8( 0x66 );
+    RexRXB(0,to,from2,from);
+	write8( 0x89 );
+	ModRM( 0, to, 0x4 );
+	SibSB(scale, from2, from );
+}
+
+void MOV16ItoR( x86IntRegType to, u16 from )
+{
+    RexB(0, to);
+	write16( 0xB866 | ((to & 0x7)<<8) ); 
+	write16( from );
+}
+
+// mov imm16 to [r16+off]
+void MOV16ItoRmOffset( x86IntRegType to, u16 from, u32 offset)
+{
+	write8(0x66);
+    RexB(0,to);
+	write8( 0xC7 );
+    WriteRmOffset(to, offset);
+	write16(from);
+}
+
+// mov r16 to [r16+off]
+void MOV16RtoRmOffset( x86IntRegType to, x86IntRegType from, int offset)
+{
+	write8(0x66);
+    RexRB(0,from,to);
+	write8( 0x89 );
+    WriteRmOffsetFrom(from, to, offset);
+}
+
+/* mov r8 to m8 */
+void MOV8RtoM( uptr to, x86IntRegType from ) 
+{
+	if (from == EAX)
+	{
+		write8(0xA2);
+		write64(to);
+	}
+	else
+	{
+		MEMADDR_OP(0, VAROP1(0x88), true, from, to, 0);
+	}
+}
+
+/* mov m8 to r8 */
+void MOV8MtoR( x86IntRegType to, uptr from ) 
+{
+	if (to == EAX)
+	{
+		write8(0xA0);
+		write64(from);
+	}
+	else
+	{
+		MEMADDR_OP(0, VAROP1(0x8A), true, to, from, 0);
+	}
+}
+
+/* mov [r32] to r8 */
+void MOV8RmtoR(x86IntRegType to, x86IntRegType from)
+{
+    RexRB(0,to,from);
+	write8( 0x8A );
+    WriteRmOffsetFrom(to, from, 0);
+}
+
+void MOV8RmtoROffset(x86IntRegType to, x86IntRegType from, int offset)
+{
+    RexRB(0,to,from);
+	write8( 0x8A );
+    WriteRmOffsetFrom(to, from, offset);
+}
+
+void MOV8RtoRm(x86IntRegType to, x86IntRegType from)
+{
+    RexRB(0,from,to);
+	write8( 0x88 );
+    WriteRmOffsetFrom(from, to, 0);
+}
+
+/* mov imm8 to m8 */
+void MOV8ItoM( uptr to, u8 from ) 
+{
+	MEMADDR_OP(0, VAROP1(0xC6), false, 0, to, 1);
+	write8( from ); 
+}
+
+// mov imm8 to r8
+void MOV8ItoR( x86IntRegType to, u8 from )
+{
+    RexB(0, to);
+	write8( 0xB0 | (to & 0x7) ); 
+	write8( from );
+}
+
+// mov imm8 to [r8+off]
+void MOV8ItoRmOffset( x86IntRegType to, u8 from, int offset)
+{
+	assert( to != ESP );
+    RexB(0,to);
+	write8( 0xC6 );
+    WriteRmOffset(to,offset);
+	write8(from);
+}
+
+// mov r8 to [r8+off]
+void MOV8RtoRmOffset( x86IntRegType to, x86IntRegType from, int offset)
+{
+	assert( to != ESP );
+    RexRB(0,from,to);
+	write8( 0x88 );
+    WriteRmOffsetFrom(from,to,offset);
+}
+
+/* movsx r8 to r32 */
+void MOVSX32R8toR( x86IntRegType to, x86IntRegType from ) 
+{
+    RexRB(0,to,from);
+	write16( 0xBE0F ); 
+	ModRM( 3, to, from ); 
+}
+
+void MOVSX32Rm8toR( x86IntRegType to, x86IntRegType from )
+{
+    RexRB(0,to,from);
+	write16( 0xBE0F ); 
+	ModRM( 0, to, from ); 
+}
+
+void MOVSX32Rm8toROffset( x86IntRegType to, x86IntRegType from, int offset )
+{
+    RexRB(0,to,from);
+	write16( 0xBE0F ); 
+    WriteRmOffsetFrom(to,from,offset);
+}
+
+/* movsx m8 to r32 */
+void MOVSX32M8toR( x86IntRegType to, uptr from ) 
+{
+	MEMADDR_OP(0, VAROP2(0x0F, 0xBE), true, to, from, 0);
+}
+
+/* movsx r16 to r32 */
+void MOVSX32R16toR( x86IntRegType to, x86IntRegType from ) 
+{
+    RexRB(0,to,from);
+	write16( 0xBF0F ); 
+	ModRM( 3, to, from ); 
+}
+
+void MOVSX32Rm16toR( x86IntRegType to, x86IntRegType from )
+{
+    RexRB(0,to,from);
+	write16( 0xBF0F ); 
+	ModRM( 0, to, from ); 
+}
+
+void MOVSX32Rm16toROffset( x86IntRegType to, x86IntRegType from, int offset )
+{
+    RexRB(0,to,from);
+	write16( 0xBF0F );
+    WriteRmOffsetFrom(to,from,offset);
+}
+
+/* movsx m16 to r32 */
+void MOVSX32M16toR( x86IntRegType to, uptr from ) 
+{
+	MEMADDR_OP(0, VAROP2(0x0F, 0xBF), true, to, from, 0);
+}
+
+/* movzx r8 to r32 */
+void MOVZX32R8toR( x86IntRegType to, x86IntRegType from ) 
+{
+    RexRB(0,to,from);
+	write16( 0xB60F ); 
+	ModRM( 3, to, from ); 
+}
+
+void MOVZX32Rm8toR( x86IntRegType to, x86IntRegType from )
+{
+    RexRB(0,to,from);
+	write16( 0xB60F ); 
+	ModRM( 0, to, from );
+}
+
+void MOVZX32Rm8toROffset( x86IntRegType to, x86IntRegType from, int offset )
+{
+    RexRB(0,to,from);
+	write16( 0xB60F );
+    WriteRmOffsetFrom(to,from,offset);
+}
+
+/* movzx m8 to r32 */
+void MOVZX32M8toR( x86IntRegType to, uptr from ) 
+{
+	MEMADDR_OP(0, VAROP2(0x0F, 0xB6), true, to, from, 0);
+}
+
+/* movzx r16 to r32 */
+void MOVZX32R16toR( x86IntRegType to, x86IntRegType from ) 
+{
+    RexRB(0,to,from);
+	write16( 0xB70F ); 
+	ModRM( 3, to, from ); 
+}
+
+void MOVZX32Rm16toR( x86IntRegType to, x86IntRegType from )
+{
+    RexRB(0,to,from);
+	write16( 0xB70F ); 
+	ModRM( 0, to, from ); 
+}
+
+void MOVZX32Rm16toROffset( x86IntRegType to, x86IntRegType from, int offset )
+{
+    RexRB(0,to,from);
+	write16( 0xB70F );
+    WriteRmOffsetFrom(to,from,offset);
+}
+
+/* movzx m16 to r32 */
+void MOVZX32M16toR( x86IntRegType to, uptr from ) 
+{
+	MEMADDR_OP(0, VAROP2(0x0F, 0xB7), true, to, from, 0);
+}
+
+#ifdef __x86_64__
+
+/* movzx r8 to r64 */
+void MOVZX64R8toR( x86IntRegType to, x86IntRegType from ) 
+{
+    RexRB(1,to,from);
+	write16( 0xB60F ); 
+	ModRM( 3, to, from ); 
+}
+
+void MOVZX64Rm8toR( x86IntRegType to, x86IntRegType from )
+{
+    RexRB(1,to,from);
+	write16( 0xB60F ); 
+	ModRM( 0, to, from );
+}
+
+void MOVZX64Rm8toROffset( x86IntRegType to, x86IntRegType from, int offset )
+{
+    RexRB(1,to,from);
+	write16( 0xB60F );
+    WriteRmOffsetFrom(to,from,offset);
+}
+
+/* movzx m8 to r64 */
+void MOVZX64M8toR( x86IntRegType to, uptr from ) 
+{
+	MEMADDR_OP(1, VAROP2(0x0F, 0xB6), true, to, from, 0);
+}
+
+/* movzx r16 to r64 */
+void MOVZX64R16toR( x86IntRegType to, x86IntRegType from ) 
+{
+    RexRB(1,to,from);
+	write16( 0xB70F ); 
+	ModRM( 3, to, from ); 
+}
+
+void MOVZX64Rm16toR( x86IntRegType to, x86IntRegType from )
+{
+    RexRB(1,to,from);
+	write16( 0xB70F ); 
+	ModRM( 0, to, from ); 
+}
+
+void MOVZX64Rm16toROffset( x86IntRegType to, x86IntRegType from, int offset )
+{
+    RexRB(1,to,from);
+	write16( 0xB70F );
+    WriteRmOffsetFrom(to,from,offset);
+}
+
+/* movzx m16 to r64 */
+void MOVZX64M16toR( x86IntRegType to, uptr from ) 
+{
+	MEMADDR_OP(1, VAROP2(0x0F, 0xB7), true, to, from, 0);
+}
+#endif
+
+/* cmovbe r32 to r32 */
+void CMOVBE32RtoR( x86IntRegType to, x86IntRegType from )
+{
+	CMOV32RtoR( 0x46, to, from );
+}
+
+/* cmovbe m32 to r32*/
+void CMOVBE32MtoR( x86IntRegType to, uptr from )
+{
+	CMOV32MtoR( 0x46, to, from );
+}
+
+/* cmovb r32 to r32 */
+void CMOVB32RtoR( x86IntRegType to, x86IntRegType from )
+{
+	CMOV32RtoR( 0x42, to, from );
+}
+
+/* cmovb m32 to r32*/
+void CMOVB32MtoR( x86IntRegType to, uptr from )
+{
+	CMOV32MtoR( 0x42, to, from );
+}
+
+/* cmovae r32 to r32 */
+void CMOVAE32RtoR( x86IntRegType to, x86IntRegType from )
+{
+	CMOV32RtoR( 0x43, to, from );
+}
+
+/* cmovae m32 to r32*/
+void CMOVAE32MtoR( x86IntRegType to, uptr from )
+{
+	CMOV32MtoR( 0x43, to, from );
+}
+
+/* cmova r32 to r32 */
+void CMOVA32RtoR( x86IntRegType to, x86IntRegType from )
+{
+	CMOV32RtoR( 0x47, to, from );
+}
+
+/* cmova m32 to r32*/
+void CMOVA32MtoR( x86IntRegType to, uptr from )
+{
+	CMOV32MtoR( 0x47, to, from );
+}
+
+/* cmovo r32 to r32 */
+void CMOVO32RtoR( x86IntRegType to, x86IntRegType from )
+{
+	CMOV32RtoR( 0x40, to, from );
+}
+
+/* cmovo m32 to r32 */
+void CMOVO32MtoR( x86IntRegType to, uptr from )
+{
+	CMOV32MtoR( 0x40, to, from );
+}
+
+/* cmovp r32 to r32 */
+void CMOVP32RtoR( x86IntRegType to, x86IntRegType from )
+{
+	CMOV32RtoR( 0x4A, to, from );
+}
+
+/* cmovp m32 to r32 */
+void CMOVP32MtoR( x86IntRegType to, uptr from )
+{
+	CMOV32MtoR( 0x4A, to, from );
+}
+
+/* cmovs r32 to r32 */
+void CMOVS32RtoR( x86IntRegType to, x86IntRegType from )
+{
+	CMOV32RtoR( 0x48, to, from );
+}
+
+/* cmovs m32 to r32 */
+void CMOVS32MtoR( x86IntRegType to, uptr from )
+{
+	CMOV32MtoR( 0x48, to, from );
+}
+
+/* cmovno r32 to r32 */
+void CMOVNO32RtoR( x86IntRegType to, x86IntRegType from )
+{
+	CMOV32RtoR( 0x41, to, from );
+}
+
+/* cmovno m32 to r32 */
+void CMOVNO32MtoR( x86IntRegType to, uptr from )
+{
+	CMOV32MtoR( 0x41, to, from );
+}
+
+/* cmovnp r32 to r32 */
+void CMOVNP32RtoR( x86IntRegType to, x86IntRegType from )
+{
+	CMOV32RtoR( 0x4B, to, from );
+}
+
+/* cmovnp m32 to r32 */
+void CMOVNP32MtoR( x86IntRegType to, uptr from )
+{
+	CMOV32MtoR( 0x4B, to, from );
+}
+
+/* cmovns r32 to r32 */
+void CMOVNS32RtoR( x86IntRegType to, x86IntRegType from )
+{
+	CMOV32RtoR( 0x49, to, from );
+}
+
+/* cmovns m32 to r32 */
+void CMOVNS32MtoR( x86IntRegType to, uptr from )
+{
+	CMOV32MtoR( 0x49, to, from );
+}
+
+/* cmovne r32 to r32 */
+void CMOVNE32RtoR( x86IntRegType to, x86IntRegType from )
+{
+	CMOV32RtoR( 0x45, to, from );
+}
+
+/* cmovne m32 to r32*/
+void CMOVNE32MtoR( x86IntRegType to, uptr from ) 
+{
+	CMOV32MtoR( 0x45, to, from );
+}
+
+/* cmove r32 to r32*/
+void CMOVE32RtoR( x86IntRegType to, x86IntRegType from ) 
+{
+	CMOV32RtoR( 0x44, to, from );
+}
+
+/* cmove m32 to r32*/
+void CMOVE32MtoR( x86IntRegType to, uptr from ) 
+{
+	CMOV32MtoR( 0x44, to, from );
+}
+
+/* cmovg r32 to r32*/
+void CMOVG32RtoR( x86IntRegType to, x86IntRegType from ) 
+{
+	CMOV32RtoR( 0x4F, to, from );
+}
+
+/* cmovg m32 to r32*/
+void CMOVG32MtoR( x86IntRegType to, uptr from ) 
+{
+	CMOV32MtoR( 0x4F, to, from );
+}
+
+/* cmovge r32 to r32*/
+void CMOVGE32RtoR( x86IntRegType to, x86IntRegType from ) 
+{
+	CMOV32RtoR( 0x4D, to, from );
+}
+
+/* cmovge m32 to r32*/
+void CMOVGE32MtoR( x86IntRegType to, uptr from ) 
+{
+	CMOV32MtoR( 0x4D, to, from );
+}
+
+/* cmovl r32 to r32*/
+void CMOVL32RtoR( x86IntRegType to, x86IntRegType from ) 
+{
+	CMOV32RtoR( 0x4C, to, from );
+}
+
+/* cmovl m32 to r32*/
+void CMOVL32MtoR( x86IntRegType to, uptr from ) 
+{
+	CMOV32MtoR( 0x4C, to, from );
+}
+
+/* cmovle r32 to r32*/
+void CMOVLE32RtoR( x86IntRegType to, x86IntRegType from ) 
+{
+	CMOV32RtoR( 0x4E, to, from );
+}
+
+/* cmovle m32 to r32*/
+void CMOVLE32MtoR( x86IntRegType to, uptr from ) 
+{
+	CMOV32MtoR( 0x4E, to, from );
+}
+
+////////////////////////////////////
+// arithmetic instructions         /
+////////////////////////////////////
+
+/* add imm32 to r64 */
+void ADD64ItoR( x86IntRegType to, u32 from ) 
+{
+	RexB(1, to);
+	if (from <= 0x7f)
+	{
+		write8(0x83);
+		ModRM( 3, 0, to );
+		write8(from);
+	}
+	else
+	{
+		if (to == RAX) {
+			write8( 0x05 ); 
+		} else  {
+			write8( 0x81 ); 
+			ModRM( 3, 0, to );
+		}
+		write32( from );
+	}
+}
+
+/* add m64 to r64 */
+void ADD64MtoR( x86IntRegType to, uptr from ) 
+{
+	MEMADDR_OP(1, VAROP1(0x03), true, to, from, 0);
+}
+
+/* add r64 to r64 */
+void ADD64RtoR( x86IntRegType to, x86IntRegType from ) 
+{
+	RexRB(1, from, to);
+	write8( 0x01 ); 
+	ModRM( 3, from, to );
+}
+
+/* add imm32 to r32 */
+void ADD32ItoR( x86IntRegType to, u32 from ) 
+{
+    RexB(0, to);
+	if ( to == EAX) {
+        write8( 0x05 ); 
+    }
+    else {
+		write8( 0x81 ); 
+		ModRM( 3, 0, to );
+	}
+	write32( from );
+}
+
+/* add imm32 to m32 */
+void ADD32ItoM( uptr to, u32 from ) 
+{
+	MEMADDR_OP(0, VAROP1(0x81), false, 0, to, 4);
+	write32(from);
+}
+
+// add imm32 to [r32+off]
+void ADD32ItoRmOffset( x86IntRegType to, u32 from, int offset)
+{
+    RexB(0,to);
+    write8( 0x81 );
+    WriteRmOffset(to,offset);
+	write32(from);
+}
+
+/* add r32 to r32 */
+void ADD32RtoR( x86IntRegType to, x86IntRegType from ) 
+{
+    RexRB(0, from, to);
+	write8( 0x01 ); 
+	ModRM( 3, from, to );
+}
+
+/* add r32 to m32 */
+void ADD32RtoM(uptr to, x86IntRegType from ) 
+{
+	MEMADDR_OP(0, VAROP1(0x01), true, from, to, 0);
+}
+
+/* add m32 to r32 */
+void ADD32MtoR( x86IntRegType to, uptr from ) 
+{
+	MEMADDR_OP(0, VAROP1(0x03), true, to, from, 0);
+}
+
+// add r16 to r16 
+void ADD16RtoR( x86IntRegType to , x86IntRegType from )
+{
+    write8(0x66);
+    RexRB(0,to,from);
+	write8( 0x03 ); 
+	ModRM( 3, to, from );
+}
+
+/* add imm16 to r16 */
+void ADD16ItoR( x86IntRegType to, u16 from ) 
+{
+	write8( 0x66 );
+    RexB(0,to);
+	if ( to == EAX) 
+   {
+		write8( 0x05 ); 
+	}
+   else 
+   {
+		write8( 0x81 ); 
+		ModRM( 3, 0, to );
+	}
+	write16( from );
+}
+
+/* add imm16 to m16 */
+void ADD16ItoM( uptr to, u16 from ) 
+{
+	MEMADDR_OP(0, VAROP2(0x66, 0x81), false, 0, to, 2);
+	write16( from );
+}
+
+/* add r16 to m16 */
+void ADD16RtoM(uptr to, x86IntRegType from ) 
+{
+	MEMADDR_OP(0, VAROP2(0x66, 0x01), true, from, to, 0);
+}
+
+/* add m16 to r16 */
+void ADD16MtoR( x86IntRegType to, uptr from ) 
+{
+	MEMADDR_OP(0, VAROP2(0x66, 0x03), true, to, from, 0);
+}
+
+// add m8 to r8
+void ADD8MtoR( x86IntRegType to, uptr from )
+{
+	MEMADDR_OP(0, VAROP1(0x02), true, to, from, 0);
+}
+
+/* adc imm32 to r32 */
+void ADC32ItoR( x86IntRegType to, u32 from ) 
+{
+    RexB(0,to);
+	if ( to == EAX ) {
+        write8( 0x15 );
+	}
+    else {
+        write8( 0x81 );
+        ModRM( 3, 2, to );
+    }
+	write32( from ); 
+}
+
+/* adc imm32 to m32 */
+void ADC32ItoM( uptr to, u32 from ) 
+{
+	MEMADDR_OP(0, VAROP1(0x81), false, 2, to, 4);
+	write32(from);
+}
+
+/* adc r32 to r32 */
+void ADC32RtoR( x86IntRegType to, x86IntRegType from ) 
+{
+    RexRB(0,from,to);
+	write8( 0x11 ); 
+	ModRM( 3, from, to );
+}
+
+/* adc m32 to r32 */
+void ADC32MtoR( x86IntRegType to, uptr from ) 
+{
+	MEMADDR_OP(0, VAROP1(0x13), true, to, from, 0);
+}
+
+// adc r32 to m32 
+void ADC32RtoM( uptr to, x86IntRegType from )
+{
+	MEMADDR_OP(0, VAROP1(0x11), true, from, to, 0);
+}
+
+
+#ifdef __x86_64__
+void INC32R( x86IntRegType to ) 
+{
+	write8( 0xFF );
+	ModRM(3,0,to);	
+}
+#else
+/* inc r32 */
+void INC32R( x86IntRegType to ) 
+{
+    X86_64ASSERT();
+	write8( 0x40 + to );
+}
+#endif
+/* inc m32 */
+void INC32M( uptr to ) 
+{
+	MEMADDR_OP(0, VAROP1(0xFF), false, 0, to, 0);
+}
+
+/* inc r16 */
+void INC16R( x86IntRegType to ) 
+{
+    X86_64ASSERT();
+	write8( 0x66 );
+	write8( 0x40 + to );
+}
+
+/* inc m16 */
+void INC16M( uptr to ) 
+{
+	MEMADDR_OP(0, VAROP2(0x66, 0xFF), false, 0, to, 0);
+}
+
+
+/* sub imm32 to r64 */
+void SUB64ItoR( x86IntRegType to, u32 from ) 
+{
+	RexB(1, to);
+	if (from <= 0x7f)
+	{
+		write8(0x83);
+		ModRM( 3, 5, to );
+		write8(from);
+	}
+	else
+	{
+		if ( to == RAX ) {
+			write8( 0x2D ); 
+		} 
+		else {
+			write8( 0x81 ); 
+			ModRM( 3, 5, to );
+		}
+		write32( from ); 
+	}
+}
+
+/* sub r64 to r64 */
+void SUB64RtoR( x86IntRegType to, x86IntRegType from ) 
+{
+	RexRB(1, from, to);
+	write8( 0x29 ); 
+	ModRM( 3, from, to );
+}
+
+/* sub m64 to r64 */
+void SUB64MtoR( x86IntRegType to, uptr from ) 
+{
+	MEMADDR_OP(1, VAROP1(0x2B), true, to, from, 0);
+}
+
+/* sub imm32 to r32 */
+void SUB32ItoR( x86IntRegType to, u32 from ) 
+{
+    RexB(0,to);
+	if ( to == EAX ) {
+		write8( 0x2D ); 
+	}
+    else {
+		write8( 0x81 ); 
+		ModRM( 3, 5, to );
+	}
+	write32( from ); 
+}
+
+/* sub imm32 to m32 */
+void SUB32ItoM( uptr to, u32 from ) 
+{
+	MEMADDR_OP(0, VAROP1(0x81), false, 5, to, 4);
+	write32(from);
+}
+
+/* sub r32 to r32 */
+void SUB32RtoR( x86IntRegType to, x86IntRegType from ) 
+{
+    RexRB(0, from, to);
+	write8( 0x29 ); 
+	ModRM( 3, from, to );
+}
+
+/* sub m32 to r32 */
+void SUB32MtoR( x86IntRegType to, uptr from ) 
+{
+	MEMADDR_OP(0, VAROP1(0x2B), true, to, from, 0);
+}
+
+// sub r32 to m32 
+void SUB32RtoM( uptr to, x86IntRegType from )
+{
+	MEMADDR_OP(0, VAROP1(0x29), true, from, to, 0);
+}
+
+// sub r16 to r16 
+void SUB16RtoR( x86IntRegType to, u16 from )
+{
+    write8(0x66);
+    RexRB(0,to,from);
+	write8( 0x2b ); 
+	ModRM( 3, to, from );
+}
+
+/* sub imm16 to r16 */
+void SUB16ItoR( x86IntRegType to, u16 from ) {
+	write8( 0x66 );
+    RexB(0,to);
+	if ( to == EAX ) {
+		write8( 0x2D ); 
+	} else {
+		write8( 0x81 ); 
+		ModRM( 3, 5, to );
+	}
+	write16( from ); 
+}
+
+/* sub imm16 to m16 */
+void SUB16ItoM( uptr to, u16 from ) {
+	MEMADDR_OP(0, VAROP2(0x66, 0x81), false, 5, to, 2);
+	write16( from );
+}
+
+/* sub m16 to r16 */
+void SUB16MtoR( x86IntRegType to, uptr from ) {
+	MEMADDR_OP(0, VAROP2(0x66, 0x2B), true, to, from, 0);
+}
+
+/* sbb r64 to r64 */
+void SBB64RtoR( x86IntRegType to, x86IntRegType from ) {
+	RexRB(1, from,to);
+	write8( 0x19 ); 
+	ModRM( 3, from, to );
+}
+
+/* sbb imm32 to r32 */
+void SBB32ItoR( x86IntRegType to, u32 from ) {
+    RexB(0,to);
+	if ( to == EAX ) {
+		write8( 0x1D );
+	} else {
+		write8( 0x81 );
+		ModRM( 3, 3, to );
+	}
+	write32( from ); 
+}
+
+/* sbb imm32 to m32 */
+void SBB32ItoM( uptr to, u32 from ) {
+	MEMADDR_OP(0, VAROP1(0x81), false, 3, to, 4);
+	write32( from );
+}
+
+/* sbb r32 to r32 */
+void SBB32RtoR( x86IntRegType to, x86IntRegType from ) 
+{
+    RexRB(0,from,to);
+	write8( 0x19 ); 
+	ModRM( 3, from, to );
+}
+
+/* sbb m32 to r32 */
+void SBB32MtoR( x86IntRegType to, uptr from ) 
+{
+	MEMADDR_OP(0, VAROP1(0x1B), true, to, from, 0);
+}
+
+/* sbb r32 to m32 */
+void SBB32RtoM( uptr to, x86IntRegType from ) 
+{
+	MEMADDR_OP(0, VAROP1(0x19), true, from, to, 0);
+}
+
+#ifdef __x86_64__
+void DEC32R( x86IntRegType to ) 
+{
+	write8( 0xFF );
+	ModRM(3,1,to);	
+}
+#else
+/* dec r32 */
+void DEC32R( x86IntRegType to ) 
+{
+    X86_64ASSERT();
+	write8( 0x48 + to );
+}
+#endif
+
+/* dec m32 */
+void DEC32M( uptr to ) 
+{
+	MEMADDR_OP(0, VAROP1(0xFF), false, 1, to, 0);
+}
+
+/* dec r16 */
+void DEC16R( x86IntRegType to ) 
+{
+    X86_64ASSERT();
+	write8( 0x66 );
+	write8( 0x48 + to );
+}
+
+/* dec m16 */
+void DEC16M( uptr to ) 
+{
+	MEMADDR_OP(0, VAROP2(0x66, 0xFF), false, 1, to, 0);
+}
+
+/* mul eax by r32 to edx:eax */
+void MUL32R( x86IntRegType from ) 
+{
+    RexB(0,from);
+	write8( 0xF7 ); 
+	ModRM( 3, 4, from );
+}
+
+/* imul eax by r32 to edx:eax */
+void IMUL32R( x86IntRegType from ) 
+{
+    RexB(0,from);
+	write8( 0xF7 ); 
+	ModRM( 3, 5, from );
+}
+
+/* mul eax by m32 to edx:eax */
+void MUL32M( uptr from ) 
+{
+	MEMADDR_OP(0, VAROP1(0xF7), false, 4, from, 0);
+}
+
+/* imul eax by m32 to edx:eax */
+void IMUL32M( uptr from ) 
+{
+	MEMADDR_OP(0, VAROP1(0xF7), false, 5, from, 0);
+}
+
+/* imul r32 by r32 to r32 */
+void IMUL32RtoR( x86IntRegType to, x86IntRegType from ) 
+{
+    RexRB(0,to,from);
+	write16( 0xAF0F ); 
+	ModRM( 3, to, from );
+}
+
+/* div eax by r32 to edx:eax */
+void DIV32R( x86IntRegType from ) 
+{
+    RexB(0,from);
+	write8( 0xF7 ); 
+	ModRM( 3, 6, from );
+}
+
+/* idiv eax by r32 to edx:eax */
+void IDIV32R( x86IntRegType from ) 
+{
+    RexB(0,from);
+	write8( 0xF7 ); 
+	ModRM( 3, 7, from );
+}
+
+/* div eax by m32 to edx:eax */
+void DIV32M( uptr from ) 
+{
+	MEMADDR_OP(0, VAROP1(0xF7), false, 6, from, 0);
+}
+
+/* idiv eax by m32 to edx:eax */
+void IDIV32M( uptr from ) 
+{
+	MEMADDR_OP(0, VAROP1(0xF7), false, 7, from, 0);
+}
+
+////////////////////////////////////
+// shifting instructions           /
+////////////////////////////////////
+
+/* shl imm8 to r64 */
+void SHL64ItoR( x86IntRegType to, u8 from ) 
+{
+    RexB(1, to);
+	if ( from == 1 )
+	{
+		write8( 0xD1 );
+		ModRM( 3, 4, to );
+		return;
+	}
+	write8( 0xC1 ); 
+	ModRM( 3, 4, to );
+	write8( from ); 
+}
+
+/* shl cl to r64 */
+void SHL64CLtoR( x86IntRegType to ) 
+{
+	RexB(1, to);
+	write8( 0xD3 ); 
+	ModRM( 3, 4, to );
+}
+
+/* shr imm8 to r64 */
+void SHR64ItoR( x86IntRegType to, u8 from ) 
+{
+    RexB(1,to);
+	if ( from == 1 ) {
+		write8( 0xD1 );
+		ModRM( 3, 5, to );
+		return;
+	}
+    write8( 0xC1 ); 
+    ModRM( 3, 5, to );
+    write8( from ); 
+}
+
+/* shr cl to r64 */
+void SHR64CLtoR( x86IntRegType to ) 
+{
+	RexB(1, to);
+	write8( 0xD3 ); 
+	ModRM( 3, 5, to );
+}
+
+/* shl imm8 to r32 */
+void SHL32ItoR( x86IntRegType to, u8 from ) 
+{
+    RexB(0, to);
+	if ( from == 1 )
+	{
+		write8( 0xD1 );
+		write8( 0xE0 | (to & 0x7) );
+		return;
+	}
+	write8( 0xC1 ); 
+	ModRM( 3, 4, to );
+	write8( from ); 
+}
+
+/* shl imm8 to m32 */
+void SHL32ItoM( uptr to, u8 from ) 
+{
+   if ( from == 1 )
+   {
+	   MEMADDR_OP(0, VAROP1(0xD1), false, 4, to, 0);
+   }
+   else
+   {
+	   MEMADDR_OP(0, VAROP1(0xC1), false, 4, to, 1);
+      write8( from ); 
+   }
+}
+
+/* shl cl to r32 */
+void SHL32CLtoR( x86IntRegType to ) 
+{
+    RexB(0,to);
+	write8( 0xD3 ); 
+	ModRM( 3, 4, to );
+}
+
+// shl imm8 to r16
+void SHL16ItoR( x86IntRegType to, u8 from )
+{
+    write8(0x66);
+    RexB(0,to);
+	if ( from == 1 )
+	{
+		write8( 0xD1 );
+		write8( 0xE0 | (to & 0x7) );
+		return;
+	}
+	write8( 0xC1 ); 
+	ModRM( 3, 4, to );
+	write8( from ); 
+}
+
+// shl imm8 to r8
+void SHL8ItoR( x86IntRegType to, u8 from )
+{
+    RexB(0,to);
+	if ( from == 1 )
+	{
+		write8( 0xD0 );
+		write8( 0xE0 | (to & 0x7) );
+		return;
+	}
+	write8( 0xC0 ); 
+	ModRM( 3, 4, to );
+	write8( from ); 
+}
+
+/* shr imm8 to r32 */
+void SHR32ItoR( x86IntRegType to, u8 from ) {
+    RexB(0,to);
+	if ( from == 1 )
+	{
+		write8( 0xD1 );
+		write8( 0xE8 | (to & 0x7) );
+	}
+   else
+   {
+	   write8( 0xC1 ); 
+	   ModRM( 3, 5, to );
+	   write8( from ); 
+   }
+}
+
+/* shr imm8 to m32 */
+void SHR32ItoM( uptr to, u8 from ) 
+{
+   if ( from == 1 )
+   {
+	   MEMADDR_OP(0, VAROP1(0xD1), false, 5, to, 0);
+   }
+   else
+   {
+	   MEMADDR_OP(0, VAROP1(0xC1), false, 5, to, 1);
+      write8( from ); 
+   }
+}
+
+/* shr cl to r32 */
+void SHR32CLtoR( x86IntRegType to ) 
+{
+    RexB(0,to);
+	write8( 0xD3 ); 
+	ModRM( 3, 5, to );
+}
+
+// shr imm8 to r8
+void SHR8ItoR( x86IntRegType to, u8 from )
+{
+    RexB(0,to);
+	if ( from == 1 )
+	{
+		write8( 0xD0 );
+		write8( 0xE8 | (to & 0x7) );
+	}
+	else
+	{
+		write8( 0xC0 ); 
+		ModRM( 3, 5, to );
+		write8( from ); 
+	}
+}
+
+/* sar imm8 to r64 */
+void SAR64ItoR( x86IntRegType to, u8 from ) 
+{
+    RexB(1,to);
+	if ( from == 1 )
+	{
+		write8( 0xD1 );
+		ModRM( 3, 7, to );
+		return;
+	}
+    write8( 0xC1 ); 
+    ModRM( 3, 7, to );
+    write8( from ); 
+}
+
+/* sar cl to r64 */
+void SAR64CLtoR( x86IntRegType to ) 
+{
+	RexB(1, to);
+	write8( 0xD3 ); 
+	ModRM( 3, 7, to );
+}
+
+/* sar imm8 to r32 */
+void SAR32ItoR( x86IntRegType to, u8 from ) 
+{
+    RexB(0,to);
+	if ( from == 1 )
+	{
+		write8( 0xD1 );
+		ModRM( 3, 7, to );
+		return;
+	}
+	write8( 0xC1 ); 
+	ModRM( 3, 7, to );
+	write8( from ); 
+}
+
+/* sar imm8 to m32 */
+void SAR32ItoM( uptr to, u8 from )
+{
+	if (from == 1)
+	{
+		MEMADDR_OP(0, VAROP1(0xD1), false, 7, to, 0);
+	}
+	else
+	{
+		MEMADDR_OP(0, VAROP1(0xC1), false, 7, to, 1);
+		write8( from );
+	}
+}
+
+/* sar cl to r32 */
+void SAR32CLtoR( x86IntRegType to ) 
+{
+    RexB(0,to);
+	write8( 0xD3 ); 
+	ModRM( 3, 7, to );
+}
+
+// sar imm8 to r16
+void SAR16ItoR( x86IntRegType to, u8 from )
+{
+	write8(0x66);
+    RexB(0,to);
+	if ( from == 1 )
+	{
+		write8( 0xD1 );
+		ModRM( 3, 7, to );
+		return;
+	}
+	write8( 0xC1 ); 
+	ModRM( 3, 7, to );
+	write8( from ); 
+}
+
+void ROR32ItoR( x86IntRegType to,u8 from )
+{
+    RexB(0,to);
+	if ( from == 1 ) {
+		write8( 0xd1 );
+		write8( 0xc8 | to );
+	} 
+	else 
+	{
+		write8( 0xc1 );
+		write8( 0xc8 | to );
+		write8( from );
+	}
+}
+
+void RCR32ItoR( x86IntRegType to, u8 from ) 
+{
+    RexB(0,to);
+	if ( from == 1 ) {
+		write8( 0xd1 );
+		write8( 0xd8 | to );
+	} 
+   else 
+   {
+		write8( 0xc1 );
+		write8( 0xd8 | to );
+		write8( from );
+	}
+}
+
+// shld imm8 to r32
+void SHLD32ItoR( x86IntRegType to, x86IntRegType from, u8 shift )
+{
+    RexRB(0,from,to);
+	write8( 0x0F );
+	write8( 0xA4 );
+	ModRM( 3, from, to );
+	write8( shift );
+}
+
+// shrd imm8 to r32
+void SHRD32ItoR( x86IntRegType to, x86IntRegType from, u8 shift )
+{
+    RexRB(0,from,to);
+	write8( 0x0F );
+	write8( 0xAC );
+	ModRM( 3, from, to );
+	write8( shift );
+}
+
+////////////////////////////////////
+// logical instructions            /
+////////////////////////////////////
+
+/* or imm32 to r32 */
+void OR64ItoR( x86IntRegType to, u32 from ) 
+{
+	RexB(1, to);
+	if ( to == EAX ) {
+		write8( 0x0D ); 
+	} else {
+		write8( 0x81 ); 
+		ModRM( 3, 1, to );
+	}
+	write32( from ); 
+}
+
+/* or m64 to r64 */
+void OR64MtoR( x86IntRegType to, uptr from ) 
+{
+	MEMADDR_OP(1, VAROP1(0x0B), true, to, from, 0);
+}
+
+/* or r64 to r64 */
+void OR64RtoR( x86IntRegType to, x86IntRegType from ) 
+{
+	RexRB(1, from, to);
+	write8( 0x09 ); 
+	ModRM( 3, from, to );
+}
+
+// or r32 to m64
+void OR64RtoM(uptr to, x86IntRegType from ) 
+{
+	MEMADDR_OP(1, VAROP1(0x09), true, from, to, 0);
+}
+
+/* or imm32 to r32 */
+void OR32ItoR( x86IntRegType to, u32 from ) 
+{
+    RexB(0,to);
+	if ( to == EAX ) {
+		write8( 0x0D ); 
+	}
+	else {
+		write8( 0x81 ); 
+		ModRM( 3, 1, to );
+	}
+	write32( from ); 
+}
+
+/* or imm32 to m32 */
+void OR32ItoM(uptr to, u32 from ) 
+{
+	MEMADDR_OP(0, VAROP1(0x81), false, 1, to, 4);
+	write32(from);
+}
+
+/* or r32 to r32 */
+void OR32RtoR( x86IntRegType to, x86IntRegType from ) 
+{
+    RexRB(0,from,to);
+	write8( 0x09 ); 
+	ModRM( 3, from, to );
+}
+
+/* or r32 to m32 */
+void OR32RtoM(uptr to, x86IntRegType from ) 
+{
+	MEMADDR_OP(0, VAROP1(0x09), true, from, to, 0);
+}
+
+/* or m32 to r32 */
+void OR32MtoR( x86IntRegType to, uptr from ) 
+{
+	MEMADDR_OP(0, VAROP1(0x0B), true, to, from, 0);
+}
+
+// or r16 to r16
+void OR16RtoR( x86IntRegType to, x86IntRegType from )
+{
+    write8(0x66);
+    RexRB(0,from,to);
+	write8( 0x09 ); 
+	ModRM( 3, from, to );
+}
+
+// or imm16 to r16
+void OR16ItoR( x86IntRegType to, u16 from )
+{
+    write8(0x66);
+    RexB(0,to);
+	if ( to == EAX ) {
+		write8( 0x0D ); 
+	}
+	else {
+		write8( 0x81 ); 
+		ModRM( 3, 1, to );
+	}
+	write16( from ); 
+}
+
+// or imm16 to m316
+void OR16ItoM( uptr to, u16 from )
+{
+	MEMADDR_OP(0, VAROP2(0x66, 0x81), false, 1, to, 2);
+	write16( from ); 
+}
+
+/* or m16 to r16 */
+void OR16MtoR( x86IntRegType to, uptr from ) 
+{
+	MEMADDR_OP(0, VAROP2(0x66, 0x0B), true, to, from, 0);
+}
+
+// or r16 to m16 
+void OR16RtoM( uptr to, x86IntRegType from )
+{
+	MEMADDR_OP(0, VAROP2(0x66, 0x09), true, from, to, 0);
+}
+
+// or r8 to r8
+void OR8RtoR( x86IntRegType to, x86IntRegType from )
+{
+    RexRB(0,from,to);
+	write8( 0x08 ); 
+	ModRM( 3, from, to );
+}
+
+// or r8 to m8
+void OR8RtoM( uptr to, x86IntRegType from )
+{
+	MEMADDR_OP(0, VAROP1(0x08), true, from, to, 0);
+}
+
+// or imm8 to m8
+void OR8ItoM( uptr to, u8 from )
+{
+	MEMADDR_OP(0, VAROP1(0x80), false, 1, to, 1);
+	write8( from ); 
+}
+
+// or m8 to r8
+void OR8MtoR( x86IntRegType to, uptr from )
+{
+	MEMADDR_OP(0, VAROP1(0x0A), true, to, from, 0);
+}
+
+/* xor imm32 to r64 */
+void XOR64ItoR( x86IntRegType to, u32 from ) 
+{
+    RexB(1,to);
+	if ( to == EAX ) {
+		write8( 0x35 ); 
+	} else {
+		write8( 0x81 ); 
+		ModRM( 3, 6, to );
+	}
+	write32( from ); 
+}
+
+/* xor r64 to r64 */
+void XOR64RtoR( x86IntRegType to, x86IntRegType from ) 
+{
+	RexRB(1, from, to);
+	write8( 0x31 ); 
+	ModRM( 3, from, to );
+}
+
+/* xor m64 to r64 */
+void XOR64MtoR( x86IntRegType to, uptr from ) 
+{
+	MEMADDR_OP(1, VAROP1(0x33), true, to, from, 0);
+}
+
+/* xor r64 to m64 */
+void XOR64RtoM( uptr to, x86IntRegType from ) 
+{
+	MEMADDR_OP(1, VAROP1(0x31), true, from, to, 0);
+}
+
+/* xor imm32 to r32 */
+void XOR32ItoR( x86IntRegType to, u32 from ) 
+{
+    RexB(0,to);
+	if ( to == EAX ) {
+		write8( 0x35 ); 
+	}
+	else  {
+		write8( 0x81 ); 
+		ModRM( 3, 6, to );
+	}
+	write32( from ); 
+}
+
+/* xor imm32 to m32 */
+void XOR32ItoM( uptr to, u32 from ) 
+{
+	MEMADDR_OP(0, VAROP1(0x81), false, 6, to, 4);
+	write32( from ); 
+}
+
+/* xor r32 to r32 */
+void XOR32RtoR( x86IntRegType to, x86IntRegType from ) 
+{
+    RexRB(0,from,to);
+	write8( 0x31 ); 
+	ModRM( 3, from, to );
+}
+
+/* xor r16 to r16 */
+void XOR16RtoR( x86IntRegType to, x86IntRegType from ) 
+{
+	write8( 0x66 );
+    RexRB(0,from,to);
+	write8( 0x31 ); 
+	ModRM( 3, from, to );
+}
+
+/* xor r32 to m32 */
+void XOR32RtoM( uptr to, x86IntRegType from ) 
+{
+	MEMADDR_OP(0, VAROP1(0x31), true, from, to, 0);
+}
+
+/* xor m32 to r32 */
+void XOR32MtoR( x86IntRegType to, uptr from ) 
+{
+	MEMADDR_OP(0, VAROP1(0x33), true, to, from, 0);
+}
+
+// xor imm16 to r16
+void XOR16ItoR( x86IntRegType to, u16 from )
+{
+    write8(0x66);
+    RexB(0,to);
+	if ( to == EAX ) {
+		write8( 0x35 ); 
+	}
+	else  {
+		write8( 0x81 ); 
+		ModRM( 3, 6, to );
+	}
+	write16( from ); 
+}
+
+// xor r16 to m16
+void XOR16RtoM( uptr to, x86IntRegType from )
+{
+	MEMADDR_OP(0, VAROP2(0x66, 0x31), true, from, to, 0);
+}
+
+/* and imm32 to r64 */
+void AND64I32toR( x86IntRegType to, u32 from ) 
+{
+	RexB(1, to);
+	if ( to == EAX ) {
+		write8( 0x25 ); 
+	} else {
+		write8( 0x81 ); 
+		ModRM( 3, 0x4, to );
+	}
+	write32( from ); 
+}
+
+/* and m64 to r64 */
+void AND64MtoR( x86IntRegType to, uptr from ) 
+{
+	MEMADDR_OP(1, VAROP1(0x23), true, to, from, 0);
+}
+
+/* and r64 to m64 */
+void AND64RtoM( uptr to, x86IntRegType from ) 
+{
+	MEMADDR_OP(1, VAROP1(0x21), true, from, to, 0);
+}
+
+/* and r64 to r64 */
+void AND64RtoR( x86IntRegType to, x86IntRegType from ) 
+{
+	RexRB(1, from, to);
+	write8( 0x21 ); 
+	ModRM( 3, from, to );
+}
+
+/* and imm32 to m64 */
+void AND64I32toM( uptr to, u32 from ) 
+{
+	MEMADDR_OP(1, VAROP1(0x81), false, 4, to, 4);
+	write32( from ); 
+}
+
+/* and imm32 to r32 */
+void AND32ItoR( x86IntRegType to, u32 from ) 
+{
+    RexB(0,to);
+	if ( to == EAX ) {
+		write8( 0x25 ); 
+	} else {
+		write8( 0x81 ); 
+		ModRM( 3, 0x4, to );
+	}
+	write32( from ); 
+}
+
+/* and sign ext imm8 to r32 */
+void AND32I8toR( x86IntRegType to, u8 from ) 
+{
+	RexB(0,to);
+	write8( 0x83 ); 
+	ModRM( 3, 0x4, to );
+	write8( from ); 
+}
+
+/* and imm32 to m32 */
+void AND32ItoM( uptr to, u32 from ) 
+{
+	MEMADDR_OP(0, VAROP1(0x81), false, 4, to, 4);
+	write32(from);
+}
+
+/* and sign ext imm8 to m32 */
+void AND32I8toM( uptr to, u8 from ) 
+{
+	MEMADDR_OP(0, VAROP1(0x83), false, 4, to, 1);
+	write8( from ); 
+}
+
+/* and r32 to r32 */
+void AND32RtoR( x86IntRegType to, x86IntRegType from ) 
+{
+    RexRB(0,from,to);
+	write8( 0x21 ); 
+	ModRM( 3, from, to );
+}
+
+/* and r32 to m32 */
+void AND32RtoM( uptr to, x86IntRegType from ) 
+{
+	MEMADDR_OP(0, VAROP1(0x21), true, from, to, 0);
+}
+
+/* and m32 to r32 */
+void AND32MtoR( x86IntRegType to, uptr from ) 
+{
+	MEMADDR_OP(0, VAROP1(0x23), true, to, from, 0);
+}
+
+// and r16 to r16
+void AND16RtoR( x86IntRegType to, x86IntRegType from )
+{
+    write8(0x66);
+    RexRB(0,to,from);
+	write8( 0x23 ); 
+	ModRM( 3, to, from );
+}
+
+/* and imm16 to r16 */
+void AND16ItoR( x86IntRegType to, u16 from ) 
+{
+    write8(0x66);
+    RexB(0,to);
+	if ( to == EAX ) {
+		write8( 0x25 ); 
+	} else {
+		write8( 0x81 ); 
+		ModRM( 3, 0x4, to );
+	}
+	write16( from ); 
+}
+
+/* and imm16 to m16 */
+void AND16ItoM( uptr to, u16 from ) 
+{
+	MEMADDR_OP(0, VAROP2(0x66, 0x81), false, 4, to, 2);
+	write16( from ); 
+}
+
+/* and r16 to m16 */
+void AND16RtoM( uptr to, x86IntRegType from ) 
+{
+	MEMADDR_OP(0, VAROP2(0x66, 0x21), true, from, to, 0);
+}
+
+/* and m16 to r16 */
+void AND16MtoR( x86IntRegType to, uptr from ) 
+{
+	MEMADDR_OP(0, VAROP2(0x66, 0x23), true, to, from, 0);
+}
+
+/* and imm8 to r8 */
+void AND8ItoR( x86IntRegType to, u8 from ) 
+{
+	RexB(0,to);
+	if ( to == EAX ) {
+		write8( 0x24 ); 
+	} else {
+		write8( 0x80 ); 
+		ModRM( 3, 0x4, to );
+	}
+	write8( from ); 
+}
+
+/* and imm8 to m8 */
+void AND8ItoM( uptr to, u8 from ) 
+{
+	MEMADDR_OP(0, VAROP1(0x80), false, 4, to, 1);
+	write8( from ); 
+}
+
+// and r8 to r8
+void AND8RtoR( x86IntRegType to, x86IntRegType from )
+{
+    RexRB(0,to,from);
+	write8( 0x22 ); 
+	ModRM( 3, to, from );
+}
+
+/* and r8 to m8 */
+void AND8RtoM( uptr to, x86IntRegType from ) 
+{
+	MEMADDR_OP(0, VAROP1(0x20), true, from, to, 0);
+}
+
+/* and m8 to r8 */
+void AND8MtoR( x86IntRegType to, uptr from ) 
+{
+	MEMADDR_OP(0, VAROP1(0x22), true, to, from, 0);
+}
+
+/* not r64 */
+void NOT64R( x86IntRegType from ) 
+{
+	RexB(1, from);
+	write8( 0xF7 ); 
+	ModRM( 3, 2, from );
+}
+
+/* not r32 */
+void NOT32R( x86IntRegType from ) 
+{
+    RexB(0,from);
+	write8( 0xF7 ); 
+	ModRM( 3, 2, from );
+}
+
+// not m32 
+void NOT32M( uptr from )
+{
+	MEMADDR_OP(0, VAROP1(0xF7), false, 2, from, 0);
+}
+
+/* neg r64 */
+void NEG64R( x86IntRegType from ) 
+{
+	RexB(1, from);
+	write8( 0xF7 ); 
+	ModRM( 3, 3, from );
+}
+
+/* neg r32 */
+void NEG32R( x86IntRegType from ) 
+{
+    RexB(0,from);
+	write8( 0xF7 ); 
+	ModRM( 3, 3, from );
+}
+
+void NEG32M( uptr from )
+{
+	MEMADDR_OP(0, VAROP1(0xF7), false, 3, from, 0);
+}
+
+/* neg r16 */
+void NEG16R( x86IntRegType from ) 
+{
+	write8( 0x66 ); 
+    RexB(0,from);
+	write8( 0xF7 ); 
+	ModRM( 3, 3, from );
+}
+
+////////////////////////////////////
+// jump instructions               /
+////////////////////////////////////
+
+u8* JMP( uptr to ) {
+	uptr jump = ( x86Ptr - (s8*)to ) - 1;
+
+	if ( jump > 0x7f ) {
+        assert( to <= 0xffffffff );
+      return (u8*)JMP32( to );
+	} else {
+      return (u8*)JMP8( to );
+	}
+}
+
+/* jmp rel8 */
+u8* JMP8( u8 to ) 
+{
+	write8( 0xEB ); 
+	write8( to );
+	return x86Ptr - 1;
+}
+
+/* jmp rel32 */
+u32* JMP32( uptr to ) 
+{
+    assert(SPTR32((sptr)to));
+	write8( 0xE9 ); 
+	write32( (sptr)to ); 
+	return (u32*)(x86Ptr - 4 );
+}
+
+/* jmp r32/r64 */
+void JMPR( x86IntRegType to ) 
+{
+    RexB(0, to);
+	write8( 0xFF ); 
+	ModRM( 3, 4, to );
+}
+
+// jmp m32 
+void JMP32M( uptr to )
+{
+	/* FIXME */
+	MEMADDR_OP(0, VAROP1(0xFF), false, 4, to, 0);
+}
+
+/* jp rel8 */
+u8* JP8( u8 to ) {
+	return J8Rel( 0x7A, to );
+}
+
+/* jnp rel8 */
+u8* JNP8( u8 to ) {
+	return J8Rel( 0x7B, to );
+}
+
+/* je rel8 */
+u8* JE8( u8 to ) {
+	return J8Rel( 0x74, to );
+}
+
+/* jz rel8 */
+u8* JZ8( u8 to ) 
+{
+	return J8Rel( 0x74, to ); 
+}
+
+/* js rel8 */
+u8* JS8( u8 to ) 
+{ 
+	return J8Rel( 0x78, to );
+}
+
+/* jns rel8 */
+u8* JNS8( u8 to ) 
+{ 
+	return J8Rel( 0x79, to );
+}
+
+/* jg rel8 */
+u8* JG8( u8 to ) 
+{ 
+	return J8Rel( 0x7F, to );
+}
+
+/* jge rel8 */
+u8* JGE8( u8 to ) 
+{ 
+	return J8Rel( 0x7D, to ); 
+}
+
+/* jl rel8 */
+u8* JL8( u8 to ) 
+{ 
+	return J8Rel( 0x7C, to ); 
+}
+
+/* ja rel8 */
+u8* JA8( u8 to ) 
+{ 
+	return J8Rel( 0x77, to ); 
+}
+
+u8* JAE8( u8 to ) 
+{ 
+	return J8Rel( 0x73, to ); 
+}
+
+/* jb rel8 */
+u8* JB8( u8 to ) 
+{ 
+	return J8Rel( 0x72, to ); 
+}
+
+/* jbe rel8 */
+u8* JBE8( u8 to ) 
+{ 
+	return J8Rel( 0x76, to ); 
+}
+
+/* jle rel8 */
+u8* JLE8( u8 to ) 
+{ 
+	return J8Rel( 0x7E, to ); 
+}
+
+/* jne rel8 */
+u8* JNE8( u8 to ) 
+{ 
+	return J8Rel( 0x75, to ); 
+}
+
+/* jnz rel8 */
+u8* JNZ8( u8 to ) 
+{ 
+	return J8Rel( 0x75, to ); 
+}
+
+/* jng rel8 */
+u8* JNG8( u8 to ) 
+{ 
+	return J8Rel( 0x7E, to ); 
+}
+
+/* jnge rel8 */
+u8* JNGE8( u8 to ) 
+{ 
+	return J8Rel( 0x7C, to ); 
+}
+
+/* jnl rel8 */
+u8* JNL8( u8 to ) 
+{ 
+	return J8Rel( 0x7D, to ); 
+}
+
+/* jnle rel8 */
+u8* JNLE8( u8 to ) 
+{ 
+	return J8Rel( 0x7F, to ); 
+}
+
+/* jo rel8 */
+u8* JO8( u8 to ) 
+{ 
+	return J8Rel( 0x70, to ); 
+}
+
+/* jno rel8 */
+u8* JNO8( u8 to ) 
+{ 
+	return J8Rel( 0x71, to ); 
+}
+
+// jb rel8 
+u16* JB16( u16 to )
+{
+	return J16Rel( 0x82, to );
+}
+
+// jb rel32 
+u32* JB32( u32 to )
+{
+	return J32Rel( 0x82, to );
+}
+
+/* je rel32 */
+u32* JE32( u32 to ) 
+{
+	return J32Rel( 0x84, to );
+}
+
+/* jz rel32 */
+u32* JZ32( u32 to ) 
+{
+	return J32Rel( 0x84, to ); 
+}
+
+/* jg rel32 */
+u32* JG32( u32 to ) 
+{ 
+	return J32Rel( 0x8F, to );
+}
+
+/* jge rel32 */
+u32* JGE32( u32 to ) 
+{ 
+	return J32Rel( 0x8D, to ); 
+}
+
+/* jl rel32 */
+u32* JL32( u32 to ) 
+{ 
+	return J32Rel( 0x8C, to ); 
+}
+
+/* jle rel32 */
+u32* JLE32( u32 to ) 
+{ 
+	return J32Rel( 0x8E, to ); 
+}
+
+/* jae rel32 */
+u32* JAE32( u32 to ) 
+{ 
+	return J32Rel( 0x83, to ); 
+}
+
+/* jne rel32 */
+u32* JNE32( u32 to ) 
+{ 
+	return J32Rel( 0x85, to ); 
+}
+
+/* jnz rel32 */
+u32* JNZ32( u32 to ) 
+{ 
+	return J32Rel( 0x85, to ); 
+}
+
+/* jng rel32 */
+u32* JNG32( u32 to ) 
+{ 
+	return J32Rel( 0x8E, to ); 
+}
+
+/* jnge rel32 */
+u32* JNGE32( u32 to ) 
+{ 
+	return J32Rel( 0x8C, to ); 
+}
+
+/* jnl rel32 */
+u32* JNL32( u32 to ) 
+{ 
+	return J32Rel( 0x8D, to ); 
+}
+
+/* jnle rel32 */
+u32* JNLE32( u32 to ) 
+{ 
+	return J32Rel( 0x8F, to ); 
+}
+
+/* jo rel32 */
+u32* JO32( u32 to ) 
+{ 
+	return J32Rel( 0x80, to ); 
+}
+
+/* jno rel32 */
+u32* JNO32( u32 to ) 
+{ 
+	return J32Rel( 0x81, to ); 
+}
+
+// js rel32
+u32*  JS32( u32 to )
+{
+	return J32Rel( 0x88, to );
+}
+
+
+/* call func */
+void CALLFunc( uptr func ) 
+{
+    sptr p = MEMADDR_(func, 5);
+    if (SPTR32(p))
+    {
+	    CALL32(p);
+    }
+    else
+    {
+	    MOV64ItoR(X86_TEMP, func);
+	    CALL64R(X86_TEMP);
+    }
+}
+
+/* call rel32 */
+void CALL32( s32 to )
+{
+	write8( 0xE8 ); 
+	write32( to ); 
+}
+
+/* call r32 */
+void CALL32R( x86IntRegType to ) 
+{
+	RexB(0, to);
+	write8( 0xFF );
+	ModRM( 3, 2, to );
+}
+
+/* call r64 */
+void CALL64R( x86IntRegType to ) 
+{
+	RexB(0, to);
+	write8( 0xFF );
+	ModRM( 3, 2, to );
+}
+
+////////////////////////////////////
+// misc instructions               /
+////////////////////////////////////
+
+/* cmp imm32 to r64 */
+void CMP64I32toR( x86IntRegType to, u32 from ) 
+{
+	RexB(1, to);
+	if ( to == EAX ) {
+		write8( 0x3D );
+	} 
+    else {
+		write8( 0x81 );
+		ModRM( 3, 7, to );
+	}
+	write32( from ); 
+}
+
+/* cmp m64 to r64 */
+void CMP64MtoR( x86IntRegType to, uptr from ) 
+{
+	MEMADDR_OP(1, VAROP1(0x3B), true, 2, from, 0);
+}
+
+// cmp r64 to r64 
+void CMP64RtoR( x86IntRegType to, x86IntRegType from )
+{
+    RexRB(1,from,to);
+	write8( 0x39 );
+	ModRM( 3, from, to );
+}
+
+/* cmp imm32 to r32 */
+void CMP32ItoR( x86IntRegType to, u32 from ) 
+{
+    RexB(0,to);
+	if ( to == EAX ) {
+		write8( 0x3D );
+	} 
+    else {
+        write8( 0x81 );
+		ModRM( 3, 7, to );
+	}
+	write32( from ); 
+}
+
+/* cmp imm32 to m32 */
+void CMP32ItoM( uptr to, u32 from ) 
+{
+	MEMADDR_OP(0, VAROP1(0x81), false, 7, to, 4);
+	write32(from);
+}
+
+/* cmp r32 to r32 */
+void CMP32RtoR( x86IntRegType to, x86IntRegType from ) 
+{
+    RexRB(0,from,to);
+	write8( 0x39 );
+	ModRM( 3, from, to );
+}
+
+/* cmp m32 to r32 */
+void CMP32MtoR( x86IntRegType to, uptr from ) 
+{
+	MEMADDR_OP(0, VAROP1(0x3B), true, to, from, 0);
+}
+
+// cmp imm8 to [r32]
+void CMP32I8toRm( x86IntRegType to, u8 from)
+{
+    RexB(0,to);
+	write8( 0x83 );
+	ModRM( 0, 7, to );
+	write8(from);
+}
+
+// cmp imm32 to [r32+off]
+void CMP32I8toRmOffset8( x86IntRegType to, u8 from, u8 off)
+{
+    RexB(0,to);
+	write8( 0x83 );
+	ModRM( 1, 7, to );
+	write8(off);
+	write8(from);
+}
+
+// cmp imm8 to [r32]
+void CMP32I8toM( uptr to, u8 from)
+{
+	MEMADDR_OP(0, VAROP1(0x83), false, 7, to, 1);
+	write8( from ); 
+}
+
+/* cmp imm16 to r16 */
+void CMP16ItoR( x86IntRegType to, u16 from ) 
+{
+	write8( 0x66 ); 
+    RexB(0,to);
+	if ( to == EAX )
+	{
+		write8( 0x3D );
+	} 
+	else 
+	{
+		write8( 0x81 );
+		ModRM( 3, 7, to );
+	}
+	write16( from ); 
+}
+
+/* cmp imm16 to m16 */
+void CMP16ItoM( uptr to, u16 from ) 
+{
+	MEMADDR_OP(0, VAROP2(0x66, 0x81), false, 7, to, 2);
+	write16( from ); 
+}
+
+/* cmp r16 to r16 */
+void CMP16RtoR( x86IntRegType to, x86IntRegType from ) 
+{
+	write8( 0x66 ); 
+    RexRB(0,from,to);
+	write8( 0x39 );
+	ModRM( 3, from, to );
+}
+
+/* cmp m16 to r16 */
+void CMP16MtoR( x86IntRegType to, uptr from ) 
+{
+	MEMADDR_OP(0, VAROP2(0x66, 0x3B), true, to, from, 0);
+}
+
+// cmp imm8 to r8
+void CMP8ItoR( x86IntRegType to, u8 from )
+{
+    RexB(0,to);
+	if ( to == EAX )
+	{
+		write8( 0x3C );
+	} 
+	else 
+	{
+		write8( 0x80 );
+		ModRM( 3, 7, to );
+	}
+	write8( from ); 
+}
+
+// cmp m8 to r8
+void CMP8MtoR( x86IntRegType to, uptr from )
+{
+	MEMADDR_OP(0, VAROP1(0x3A), true, to, from, 0);
+}
+
+/* test r64 to r64 */
+void TEST64RtoR( x86IntRegType to, x86IntRegType from ) 
+{
+	RexRB(1, from, to);
+	write8( 0x85 ); 
+	ModRM( 3, from, to );
+}
+
+/* test imm32 to r32 */
+void TEST32ItoR( x86IntRegType to, u32 from ) 
+{
+    RexB(0,to);
+	if ( to == EAX )
+	{
+		write8( 0xA9 );
+	} 
+	else 
+	{
+		write8( 0xF7 );
+		ModRM( 3, 0, to );
+	}
+	write32( from ); 
+}
+
+void TEST32ItoM( uptr to, u32 from )
+{
+	MEMADDR_OP(0, VAROP1(0xF7), false, 0, to, 4);
+	write32( from );
+}
+
+/* test r32 to r32 */
+void TEST32RtoR( x86IntRegType to, x86IntRegType from ) 
+{
+    RexRB(0,from,to);
+	write8( 0x85 );
+	ModRM( 3, from, to );
+}
+
+// test imm32 to [r32]
+void TEST32ItoRm( x86IntRegType to, u32 from )
+{
+    RexB(0,to);
+	write8( 0xF7 );
+	ModRM( 0, 0, to );
+	write32(from);
+}
+
+// test imm16 to r16
+void TEST16ItoR( x86IntRegType to, u16 from )
+{
+    write8(0x66);
+    RexB(0,to);
+	if ( to == EAX )
+	{
+		write8( 0xA9 );
+	} 
+	else 
+	{
+		write8( 0xF7 );
+		ModRM( 3, 0, to );
+	}
+	write16( from ); 
+}
+
+// test r16 to r16
+void TEST16RtoR( x86IntRegType to, x86IntRegType from )
+{
+    write8(0x66);
+    RexRB(0,from,to);
+	write16( 0x85 );
+	ModRM( 3, from, to );
+}
+
+// test imm8 to r8
+void TEST8ItoR( x86IntRegType to, u8 from )
+{
+    RexB(0,to);
+	if ( to == EAX )
+	{
+		write8( 0xA8 );
+	} 
+	else 
+	{
+		write8( 0xF6 );
+		ModRM( 3, 0, to );
+	}
+	write8( from ); 
+}
+
+// test imm8 to r8
+void TEST8ItoM( uptr to, u8 from )
+{
+	MEMADDR_OP(0, VAROP1(0xF6), false, 0, to, 1);
+	write8( from );
+}
+
+/* sets r8 */
+void SETS8R( x86IntRegType to ) 
+{ 
+   SET8R( 0x98, to ); 
+}
+
+/* setl r8 */
+void SETL8R( x86IntRegType to ) 
+{ 
+	SET8R( 0x9C, to ); 
+}
+
+// setge r8 
+void SETGE8R( x86IntRegType to ) { SET8R(0x9d, to); }
+// setg r8 
+void SETG8R( x86IntRegType to ) { SET8R(0x9f, to); }
+// seta r8 
+void SETA8R( x86IntRegType to ) { SET8R(0x97, to); }
+// setae r8 
+void SETAE8R( x86IntRegType to ) { SET8R(0x99, to); }
+/* setb r8 */
+void SETB8R( x86IntRegType to ) { SET8R( 0x92, to ); }
+/* setb r8 */
+void SETNZ8R( x86IntRegType to )  { SET8R( 0x95, to ); }
+// setz r8 
+void SETZ8R( x86IntRegType to ) { SET8R(0x94, to); }
+// sete r8 
+void SETE8R( x86IntRegType to ) { SET8R(0x94, to); }
+
+/* push imm32 */
+void PUSH32I( u32 from ) 
+{
+    //X86_64ASSERT();  //becomes sign extended in x86_64
+	write8( 0x68 ); 
+   write32( from ); 
+}
+
+#ifdef __x86_64__
+
+/* push r64 */
+void PUSH64R( x86IntRegType from ) 
+{
+    RexB(0,from);
+	//write8( 0x51 | from ); 
+	write8( 0x50 | from );
+}
+
+/* push m64 */
+void PUSH64M( uptr from ) 
+{
+	MEMADDR_OP(0, VAROP1(0xFF), false, 6, from, 0);
+}
+
+/* pop r64 */
+void POP64R( x86IntRegType from )  {
+    RexB(0,from);
+	//write8( 0x59 | from ); 
+	write8( 0x58 | from );
+}
+
+void PUSHR(x86IntRegType from) { PUSH64R(from); }
+void POPR(x86IntRegType from) { POP64R(from); }
+
+#else
+
+/* push r32 */
+void PUSH32R( x86IntRegType from )  { write8( 0x50 | from ); }
+
+/* push m32 */
+void PUSH32M( uptr from ) 
+{
+	MEMADDR_OP(0, VAROP1(0xFF), false, 6, from, 0);
+}
+
+/* pop r32 */
+void POP32R( x86IntRegType from ) { write8( 0x58 | from ); }
+
+/* pushad */
+void PUSHA32( void ) { write8( 0x60 ); }
+
+/* popad */
+void POPA32( void ) { write8( 0x61 ); }
+
+void PUSHR(x86IntRegType from) { PUSH32R(from); }
+void POPR(x86IntRegType from) { POP32R(from); }
+
+#endif
+
+
+/* pushfd */
+void PUSHFD( void ) { write8( 0x9C ); }
+/* popfd */
+void POPFD( void ) { write8( 0x9D ); }
+
+void RET( void ) { write8( 0xC3 ); }
+void RET2( void ) { write16( 0xc3f3 ); }
+
+void CBW( void ) { write16( 0x9866 );  }
+void CWD( void )  { write8( 0x98 ); }
+void CDQ( void ) { write8( 0x99 ); }
+void CWDE() { write8(0x98); }
+
+#ifdef __x86_64__
+void CDQE( void ) { RexR(1,0); write8( 0x98 ); }
+#endif
+
+void LAHF() { write8(0x9f); }
+void SAHF() { write8(0x9e); }
+
+void BT32ItoR( x86IntRegType to, x86IntRegType from ) 
+{
+	write16( 0xBA0F );
+	write8( 0xE0 | to );
+	write8( from );
+}
+
+void BSRRtoR(x86IntRegType to, x86IntRegType from)
+{
+	write16( 0xBD0F );
+	ModRM( 3, from, to );
+}
+
+void BSWAP32R( x86IntRegType to ) 
+{
+	write8( 0x0F );
+	write8( 0xC8 + to );
+}
+
+// to = from + offset
+void LEA16RtoR(x86IntRegType to, x86IntRegType from, u16 offset)
+{
+	write8(0x66);
+	LEA32RtoR(to, from, offset);
+}
+
+void LEA32RtoR(x86IntRegType to, x86IntRegType from, u32 offset)
+{
+    RexRB(0,to,from);
+	write8(0x8d);
+
+	if( (from&7) == ESP ) {
+		if( offset == 0 ) {
+			ModRM(1, to, from);
+			write8(0x24);
+		}
+		else if( offset < 128 ) {
+			ModRM(1, to, from);
+			write8(0x24);
+			write8(offset);
+		}
+		else {
+			ModRM(2, to, from);
+			write8(0x24);
+			write32(offset);
+		}
+	}
+	else {
+		if( offset == 0 && from != EBP && from!=ESP ) {
+			ModRM(0, to, from);
+		}
+		else if( offset < 128 ) {
+			ModRM(1, to, from);
+			write8(offset);
+		}
+		else {
+			ModRM(2, to, from);
+			write32(offset);
+		}
+	}
+}
+
+// to = from0 + from1
+void LEA16RRtoR(x86IntRegType to, x86IntRegType from0, x86IntRegType from1)
+{
+	write8(0x66);
+	LEA32RRtoR(to, from0, from1);
+}
+
+void LEA32RRtoR(x86IntRegType to, x86IntRegType from0, x86IntRegType from1)
+{
+    RexRXB(0, to, from0, from1);
+	write8(0x8d);
+
+    if( (from1&7) == EBP ) {
+		ModRM(1, to, 4);
+		ModRM(0, from0, from1);
+		write8(0);
+	}
+	else {
+		ModRM(0, to, 4);
+		ModRM(0, from0, from1);
+	}
+}
+
+// to = from << scale (max is 3)
+void LEA16RStoR(x86IntRegType to, x86IntRegType from, u32 scale)
+{
+	write8(0x66);
+	LEA32RStoR(to, from, scale);
+}
+
+void LEA32RStoR(x86IntRegType to, x86IntRegType from, u32 scale)
+{
+	if( to == from ) {
+		SHL32ItoR(to, scale);
+		return;
+	}
+
+	if( from != ESP ) {
+        RexRXB(0,to,from,0);
+		write8(0x8d);
+		ModRM(0, to, 4);
+		ModRM(scale, from, 5);
+		write32(0);
+	}
+	else {
+        assert( to != ESP );
+		MOV32RtoR(to, from);
+		LEA32RStoR(to, to, scale);
+	}
+}
+
+#endif
diff --git a/libpcsxcore/ix86_64/ix86-64.h b/libpcsxcore/ix86_64/ix86-64.h
new file mode 100644
index 0000000..009fa5a
--- /dev/null
+++ b/libpcsxcore/ix86_64/ix86-64.h
@@ -0,0 +1,1776 @@
+/*
+ * ix86 definitions v0.6.2
+ *  Authors: linuzappz <linuzappz@pcsx.net>
+ *           alexey silinov
+ *           goldfinger
+ *           shadow < shadow@pcsx2.net >
+ */
+
+#ifndef __IX86_H__
+#define __IX86_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "../psxcommon.h"       // Basic types header
+#include <assert.h>
+#include <stdbool.h>
+
+#if defined(__MINGW32__)
+#define PCSX2_ALIGNED16(x) __declspec(align(16)) x
+#else
+#define PCSX2_ALIGNED16(x) x __attribute((aligned(16)))
+#endif
+
+
+#ifdef __x86_64__
+#define XMMREGS 16
+#define X86REGS 16
+#else
+#define XMMREGS 8
+#define X86REGS 8
+#endif
+
+#define MMXREGS 8
+
+#define SIB 4
+#define DISP32 5
+
+// general types
+typedef int x86IntRegType;
+#define EAX 0
+#define EBX 3
+#define ECX 1
+#define EDX 2
+#define ESI 6
+#define EDI 7
+#define EBP 5
+#define ESP 4
+
+#ifdef __x86_64__
+#define RAX 0
+#define RBX 3
+#define RCX 1
+#define RDX 2
+#define RSI 6
+#define RDI 7
+#define RBP 5
+#define RSP 4
+#define R8  8 
+#define R9  9 
+#define R10 10
+#define R11 11
+#define R12 12
+#define R13 13
+#define R14 14
+#define R15 15
+
+#define X86_TEMP RAX // don't allocate anything
+
+#ifdef _MSC_VER
+extern x86IntRegType g_x86savedregs[8];
+extern x86IntRegType g_x86tempregs[6];
+#else
+extern x86IntRegType g_x86savedregs[6];
+extern x86IntRegType g_x86tempregs[8];
+#endif
+
+extern x86IntRegType g_x86allregs[14]; // all registers that can be used by the recs
+extern x86IntRegType g_x868bitregs[11];
+extern x86IntRegType g_x86non8bitregs[3];
+
+#ifdef _MSC_VER
+#define X86ARG1 RCX
+#define X86ARG2 RDX
+#define X86ARG3 R8
+#define X86ARG4 R9
+#else
+#define X86ARG1 RDI
+#define X86ARG2 RSI
+#define X86ARG3 RDX
+#define X86ARG4 RCX
+#endif
+
+#else
+
+#define X86ARG1 EAX
+#define X86ARG2 ECX
+#define X86ARG3 EDX
+#define X86ARG4 EBX
+
+#endif // __x86_64__
+
+#define MM0 0
+#define MM1 1
+#define MM2 2
+#define MM3 3
+#define MM4 4
+#define MM5 5
+#define MM6 6
+#define MM7 7
+
+typedef int x86MMXRegType;
+
+#define XMM0 0 
+#define XMM1 1 
+#define XMM2 2 
+#define XMM3 3 
+#define XMM4 4 
+#define XMM5 5 
+#define XMM6 6 
+#define XMM7 7 
+#define XMM8 8 
+#define XMM9 9 
+#define XMM10 10 
+#define XMM11 11 
+#define XMM12 12 
+#define XMM13 13 
+#define XMM14 14 
+#define XMM15 15
+
+typedef int x86SSERegType;
+
+typedef enum
+{
+	XMMT_INT = 0, // integer (sse2 only)
+	XMMT_FPS = 1, // floating point
+	//XMMT_FPD = 3, // double
+} XMMSSEType;
+
+extern XMMSSEType g_xmmtypes[XMMREGS];
+
+void cpudetectInit( void );//this is all that needs to be called and will fill up the below structs
+
+//cpu capabilities structure
+typedef struct {
+   u32 hasFloatingPointUnit;
+   u32 hasVirtual8086ModeEnhancements;
+   u32 hasDebuggingExtensions;
+   u32 hasPageSizeExtensions;
+   u32 hasTimeStampCounter;
+   u32 hasModelSpecificRegisters;
+   u32 hasPhysicalAddressExtension;
+   u32 hasCOMPXCHG8BInstruction;
+   u32 hasAdvancedProgrammableInterruptController;
+   u32 hasSEPFastSystemCall;
+   u32 hasMemoryTypeRangeRegisters;
+   u32 hasPTEGlobalFlag;
+   u32 hasMachineCheckArchitecture;
+   u32 hasConditionalMoveAndCompareInstructions;
+   u32 hasFGPageAttributeTable;
+   u32 has36bitPageSizeExtension;
+   u32 hasProcessorSerialNumber;
+   u32 hasCFLUSHInstruction;
+   u32 hasDebugStore;
+   u32 hasACPIThermalMonitorAndClockControl;
+   u32 hasMultimediaExtensions;
+   u32 hasFastStreamingSIMDExtensionsSaveRestore;
+   u32 hasStreamingSIMDExtensions;
+   u32 hasStreamingSIMD2Extensions;
+   u32 hasSelfSnoop;
+   u32 hasHyperThreading;
+   u32 hasThermalMonitor;
+   u32 hasIntel64BitArchitecture;
+   u32 hasStreamingSIMD3Extensions;
+   //that is only for AMDs
+   u32 hasMultimediaExtensionsExt;
+   u32 hasAMD64BitArchitecture;
+   u32 has3DNOWInstructionExtensionsExt;
+   u32 has3DNOWInstructionExtensions;
+} CAPABILITIES;
+
+extern CAPABILITIES cpucaps;
+
+typedef struct {
+   
+   u32 x86Family;	   // Processor Family
+   u32 x86Model;	   // Processor Model
+   u32 x86PType;	   // Processor Type
+   u32 x86StepID;	   // Stepping ID
+   u32 x86Flags;	   // Feature Flags
+   u32 x86EFlags;	   // Extended Feature Flags
+   //all the above returns hex values
+   s8  x86ID[16];	   // Vendor ID  //the vendor creator (in %s)
+   s8  x86Type[20];   //cpu type in char format //the cpu type (in %s)
+   s8  x86Fam[50];    // family in char format //the original cpu name string (in %s)
+   u32 cpuspeed;      // speed of cpu //this will give cpu speed (in %d)
+} CPUINFO;
+
+extern CPUINFO cpuinfo;
+
+extern s8  *x86Ptr;
+extern u8  *j8Ptr[32];
+extern u32 *j32Ptr[32];
+
+
+#ifdef __x86_64__
+#define X86_64ASSERT() assert(0)
+#define MEMADDR_(addr, oplen)	(sptr)((uptr)(addr) - ((uptr)x86Ptr + ((u64)(oplen))))
+#define	SPTR32(addr)		((addr) < 0x80000000L && (addr) >= -0x80000000L)
+#define	UPTR32(addr)		((addr) < 0x100000000L)
+#define MEMADDR(addr, oplen)	({ sptr _a = MEMADDR_(addr, oplen); assert(SPTR32(_a)); _a; })
+#else
+#define X86_64ASSERT()
+#define SPTR32(a) 1
+#define UPTR32(a) 1
+#define MEMADDR(addr, oplen)	(addr)
+#endif
+
+#ifdef __x86_64__
+#define Rex( w, r, x, b ) write8( 0x40 | ((w) << 3) | ((r) << 2) | ((x) << 1) | (b) )
+#else
+#define Rex(w,r,x,b) assert(0)
+#endif
+#define RexRXB(w, reg, index, base) if(w || (reg) >= 8 || (index) >= 8 || (base) >= 8 ) \
+        Rex(w, (reg)>=8, (index)>=8, (base)>=8)
+#define RexR(w, reg) RexRXB(w, reg, 0, 0)
+#define RexB(w, base) RexRXB(w, 0, 0, base)
+#define RexRB(w, reg, base) RexRXB(w, reg, 0, base)
+
+void x86SetPtr( char *ptr );
+void x86Shutdown( void );
+
+void x86SetJ8( u8 *j8 );
+void x86SetJ8A( u8 *j8 );
+void x86SetJ16( u16 *j16 );
+void x86SetJ16A( u16 *j16 );
+void x86SetJ32( u32 *j32 );
+void x86SetJ32A( u32 *j32 );
+
+void x86Align( int bytes );
+u64 GetCPUTick( void );
+
+// General Helper functions
+#define ModRM(mod, rm, reg) write8( ( mod << 6 ) | ( (rm & 7) << 3 ) | ( reg & 7 ) )
+#define SibSB(ss, rm, index) write8( ( ss << 6 ) | ( rm << 3 ) | ( index ) )
+void SET8R( int cc, int to );
+u8* J8Rel( int cc, int to );
+u32* J32Rel( int cc, u32 to );
+void CMOV32RtoR( int cc, int to, int from );
+void CMOV32MtoR( int cc, int to, uptr from );
+
+void MEMADDR_OP(bool w, unsigned opl, u64 op, bool isreg, int reg, uptr p, sptr off);
+
+#define VAROP1(op) 1, op
+#define VAROP2(op1, op2) 2, (op1) | ((op2) << 8)
+
+//******************
+// IX86 intructions 
+//******************
+
+//
+// * scale values:
+// *  0 - *1
+// *  1 - *2
+// *  2 - *4
+// *  3 - *8
+// 
+
+void STC( void );
+void CLC( void );
+
+////////////////////////////////////
+// mov instructions               //
+////////////////////////////////////
+
+// mov r64 to r64 
+void MOV64RtoR( x86IntRegType to, x86IntRegType from );
+// mov r64 to m64 
+void MOV64RtoM( uptr to, x86IntRegType from );
+// mov m64 to r64 
+void MOV64MtoR( x86IntRegType to, uptr from );
+// mov sign ext imm32 to m64 
+void MOV64I32toM( uptr to, u32 from );
+// mov sign ext imm32 to r64
+void MOV64I32toR( x86IntRegType to, s32 from);
+// mov imm64 to r64
+void MOV64ItoR( x86IntRegType to, u64 from);
+// mov imm64 to [r64+off]
+void MOV64ItoRmOffset( x86IntRegType to, u32 from, int offset);
+// mov [r64+offset] to r64
+void MOV64RmOffsettoR( x86IntRegType to, x86IntRegType from, int offset );
+// mov [r64][r64*scale] to r64
+void MOV64RmStoR( x86IntRegType to, x86IntRegType from, x86IntRegType from2, int scale);
+// mov r64 to [r64+offset]
+void MOV64RtoRmOffset( x86IntRegType to, x86IntRegType from, int offset );
+// mov r64 to [r64][r64*scale]
+void MOV64RtoRmS( x86IntRegType to, x86IntRegType from, x86IntRegType from2, int scale);
+
+// mov r32 to r32 
+void MOV32RtoR( x86IntRegType to, x86IntRegType from );
+// mov r32 to m32 
+void MOV32RtoM( uptr to, x86IntRegType from );
+// mov m32 to r32 
+void MOV32MtoR( x86IntRegType to, uptr from );
+// mov [r32] to r32 
+void MOV32RmtoR( x86IntRegType to, x86IntRegType from );
+void MOV32RmtoROffset( x86IntRegType to, x86IntRegType from, int offset );
+// mov [r32][r32<<scale] to r32 
+void MOV32RmStoR( x86IntRegType to, x86IntRegType from, x86IntRegType from2, int scale );
+// mov [imm32(from2) + r32(from1)<<scale] to r32 
+void MOV32RmSOffsettoR( x86IntRegType to, x86IntRegType from1, int from2, int scale );
+// mov r32 to [r32] 
+void MOV32RtoRm( x86IntRegType to, x86IntRegType from );
+// mov r32 to [r32][r32*scale]
+void MOV32RtoRmS( x86IntRegType to, x86IntRegType from, x86IntRegType from2, int scale );
+// mov imm32 to r32 
+void MOV32ItoR( x86IntRegType to, u32 from );
+// mov imm32 to m32 
+void MOV32ItoM( uptr to, u32 from );
+// mov imm32 to [r32+off]
+void MOV32ItoRmOffset( x86IntRegType to, u32 from, int offset);
+// mov r32 to [r32+off]
+void MOV32RtoRmOffset( x86IntRegType to, x86IntRegType from, int offset);
+
+// mov r16 to m16 
+void MOV16RtoM( uptr to, x86IntRegType from );
+// mov m16 to r16 
+void MOV16MtoR( x86IntRegType to, uptr from );
+// mov [r32] to r16
+void MOV16RmtoR( x86IntRegType to, x86IntRegType from ) ;
+void MOV16RmtoROffset( x86IntRegType to, x86IntRegType from, int offset );
+// mov [imm32(from2) + r32(from1)<<scale] to r16 
+void MOV16RmSOffsettoR( x86IntRegType to, x86IntRegType from1, u32 from2, int scale );
+// mov r16 to [r32]
+void MOV16RtoRm(x86IntRegType to, x86IntRegType from);
+// mov imm16 to m16 
+void MOV16ItoM( uptr to, u16 from );
+/* mov r16 to [r32][r32*scale] */
+void MOV16RtoRmS( x86IntRegType to, x86IntRegType from, x86IntRegType from2, int scale);
+// mov imm16 to r16
+void MOV16ItoR( x86IntRegType to, u16 from );
+// mov imm16 to [r16+off]
+void MOV16ItoRmOffset( x86IntRegType to, u16 from, u32 offset);
+// mov r16 to [r16+off]
+void MOV16RtoRmOffset( x86IntRegType to, x86IntRegType from, int offset);
+
+// mov r8 to m8 
+void MOV8RtoM( uptr to, x86IntRegType from );
+// mov m8 to r8 
+void MOV8MtoR( x86IntRegType to, uptr from );
+// mov [r32] to r8
+void MOV8RmtoR(x86IntRegType to, x86IntRegType from);
+void MOV8RmtoROffset(x86IntRegType to, x86IntRegType from, int offset);
+// mov r8 to [r32]
+void MOV8RtoRm(x86IntRegType to, x86IntRegType from);
+// mov imm8 to m8 
+void MOV8ItoM( uptr to, u8 from );
+// mov imm8 to r8
+void MOV8ItoR( x86IntRegType to, u8 from );
+// mov imm8 to [r8+off]
+void MOV8ItoRmOffset( x86IntRegType to, u8 from, int offset);
+// mov r8 to [r8+off]
+void MOV8RtoRmOffset( x86IntRegType to, x86IntRegType from, int offset);
+
+// movsx r8 to r32 
+void MOVSX32R8toR( x86IntRegType to, x86IntRegType from );
+void MOVSX32Rm8toR( x86IntRegType to, x86IntRegType from );
+void MOVSX32Rm8toROffset( x86IntRegType to, x86IntRegType from, int offset );
+// movsx m8 to r32 
+void MOVSX32M8toR( x86IntRegType to, uptr from );
+// movsx r16 to r32 
+void MOVSX32R16toR( x86IntRegType to, x86IntRegType from );
+void MOVSX32Rm16toR( x86IntRegType to, x86IntRegType from );
+void MOVSX32Rm16toROffset( x86IntRegType to, x86IntRegType from, int offset );
+// movsx m16 to r32 
+void MOVSX32M16toR( x86IntRegType to, uptr from );
+
+// movzx r8 to r32 
+void MOVZX32R8toR( x86IntRegType to, x86IntRegType from );
+void MOVZX32Rm8toR( x86IntRegType to, x86IntRegType from );
+void MOVZX32Rm8toROffset( x86IntRegType to, x86IntRegType from, int offset );
+// movzx m8 to r32 
+void MOVZX32M8toR( x86IntRegType to, uptr from );
+// movzx r16 to r32 
+void MOVZX32R16toR( x86IntRegType to, x86IntRegType from );
+void MOVZX32Rm16toR( x86IntRegType to, x86IntRegType from );
+void MOVZX32Rm16toROffset( x86IntRegType to, x86IntRegType from, int offset );
+// movzx m16 to r32 
+void MOVZX32M16toR( x86IntRegType to, uptr from );
+
+#ifdef __x86_64__
+void MOVZX64R8toR( x86IntRegType to, x86IntRegType from );
+void MOVZX64Rm8toR( x86IntRegType to, x86IntRegType from );
+void MOVZX64Rm8toROffset( x86IntRegType to, x86IntRegType from, int offset );
+// movzx m8 to r64
+void MOVZX64M8toR( x86IntRegType to, uptr from );
+// movzx r16 to r64 
+void MOVZX64R16toR( x86IntRegType to, x86IntRegType from );
+void MOVZX64Rm16toR( x86IntRegType to, x86IntRegType from );
+void MOVZX64Rm16toROffset( x86IntRegType to, x86IntRegType from, int offset );
+// movzx m16 to r64
+void MOVZX64M16toR( x86IntRegType to, uptr from );
+#endif
+
+// cmovbe r32 to r32 
+void CMOVBE32RtoR( x86IntRegType to, x86IntRegType from );
+// cmovbe m32 to r32
+void CMOVBE32MtoR( x86IntRegType to, uptr from );
+// cmovb r32 to r32 
+void CMOVB32RtoR( x86IntRegType to, x86IntRegType from );
+// cmovb m32 to r32
+void CMOVB32MtoR( x86IntRegType to, uptr from );
+// cmovae r32 to r32 
+void CMOVAE32RtoR( x86IntRegType to, x86IntRegType from );
+// cmovae m32 to r32
+void CMOVAE32MtoR( x86IntRegType to, uptr from );
+// cmova r32 to r32 
+void CMOVA32RtoR( x86IntRegType to, x86IntRegType from );
+// cmova m32 to r32
+void CMOVA32MtoR( x86IntRegType to, uptr from );
+
+// cmovo r32 to r32 
+void CMOVO32RtoR( x86IntRegType to, x86IntRegType from );
+// cmovo m32 to r32
+void CMOVO32MtoR( x86IntRegType to, uptr from );
+// cmovp r32 to r32 
+void CMOVP32RtoR( x86IntRegType to, x86IntRegType from );
+// cmovp m32 to r32
+void CMOVP32MtoR( x86IntRegType to, uptr from );
+// cmovs r32 to r32 
+void CMOVS32RtoR( x86IntRegType to, x86IntRegType from );
+// cmovs m32 to r32
+void CMOVS32MtoR( x86IntRegType to, uptr from );
+// cmovno r32 to r32 
+void CMOVNO32RtoR( x86IntRegType to, x86IntRegType from );
+// cmovno m32 to r32
+void CMOVNO32MtoR( x86IntRegType to, uptr from );
+// cmovnp r32 to r32 
+void CMOVNP32RtoR( x86IntRegType to, x86IntRegType from );
+// cmovnp m32 to r32
+void CMOVNP32MtoR( x86IntRegType to, uptr from );
+// cmovns r32 to r32 
+void CMOVNS32RtoR( x86IntRegType to, x86IntRegType from );
+// cmovns m32 to r32
+void CMOVNS32MtoR( x86IntRegType to, uptr from );
+
+// cmovne r32 to r32 
+void CMOVNE32RtoR( x86IntRegType to, x86IntRegType from );
+// cmovne m32 to r32
+void CMOVNE32MtoR( x86IntRegType to, uptr from );
+// cmove r32 to r32
+void CMOVE32RtoR( x86IntRegType to, x86IntRegType from );
+// cmove m32 to r32
+void CMOVE32MtoR( x86IntRegType to, uptr from );
+// cmovg r32 to r32
+void CMOVG32RtoR( x86IntRegType to, x86IntRegType from );
+// cmovg m32 to r32
+void CMOVG32MtoR( x86IntRegType to, uptr from );
+// cmovge r32 to r32
+void CMOVGE32RtoR( x86IntRegType to, x86IntRegType from );
+// cmovge m32 to r32
+void CMOVGE32MtoR( x86IntRegType to, uptr from );
+// cmovl r32 to r32
+void CMOVL32RtoR( x86IntRegType to, x86IntRegType from );
+// cmovl m32 to r32
+void CMOVL32MtoR( x86IntRegType to, uptr from );
+// cmovle r32 to r32
+void CMOVLE32RtoR( x86IntRegType to, x86IntRegType from );
+// cmovle m32 to r32
+void CMOVLE32MtoR( x86IntRegType to, uptr from );
+
+////////////////////////////////////
+// arithmetic instructions        //
+////////////////////////////////////
+
+// add imm32 to r64 
+void ADD64ItoR( x86IntRegType to, u32 from );
+// add m64 to r64 
+void ADD64MtoR( x86IntRegType to, uptr from );
+
+// add imm32 to r32 
+void ADD32ItoR( x86IntRegType to, u32 from );
+// add imm32 to m32 
+void ADD32ItoM( uptr to, u32 from );
+// add imm32 to [r32+off]
+void ADD32ItoRmOffset( x86IntRegType to, u32 from, int offset);
+// add r32 to r32 
+void ADD32RtoR( x86IntRegType to, x86IntRegType from );
+// add r32 to m32 
+void ADD32RtoM( uptr to, x86IntRegType from );
+// add m32 to r32 
+void ADD32MtoR( x86IntRegType to, uptr from );
+
+// add r16 to r16 
+void ADD16RtoR( x86IntRegType to , x86IntRegType from );
+// add imm16 to r16 
+void ADD16ItoR( x86IntRegType to, u16 from );
+// add imm16 to m16 
+void ADD16ItoM( uptr to, u16 from );
+// add r16 to m16 
+void ADD16RtoM( uptr to, x86IntRegType from );
+// add m16 to r16 
+void ADD16MtoR( x86IntRegType to, uptr from );
+
+// add m8 to r8
+void ADD8MtoR( x86IntRegType to, uptr from );
+
+// adc imm32 to r32 
+void ADC32ItoR( x86IntRegType to, u32 from );
+// adc imm32 to m32 
+void ADC32ItoM( uptr to, u32 from );
+// adc r32 to r32 
+void ADC32RtoR( x86IntRegType to, x86IntRegType from );
+// adc m32 to r32 
+void ADC32MtoR( x86IntRegType to, uptr from );
+// adc r32 to m32 
+void ADC32RtoM( uptr to, x86IntRegType from );
+
+// inc r32 
+void INC32R( x86IntRegType to );
+// inc m32 
+void INC32M( uptr to );
+// inc r16 
+void INC16R( x86IntRegType to );
+// inc m16 
+void INC16M( uptr to );
+
+// sub m64 to r64 
+void SUB64MtoR( x86IntRegType to, uptr from );
+void SUB64ItoR( x86IntRegType to, u32 from );
+
+// sub imm32 to r32 
+void SUB32ItoR( x86IntRegType to, u32 from );
+// sub imm32 to m32
+void SUB32ItoM( uptr to, u32 from ) ;
+// sub r32 to r32 
+void SUB32RtoR( x86IntRegType to, x86IntRegType from );
+// sub m32 to r32 
+void SUB32MtoR( x86IntRegType to, uptr from ) ;
+// sub r32 to m32 
+void SUB32RtoM( uptr to, x86IntRegType from );
+// sub r16 to r16 
+void SUB16RtoR( x86IntRegType to, u16 from );
+// sub imm16 to r16 
+void SUB16ItoR( x86IntRegType to, u16 from );
+// sub imm16 to m16
+void SUB16ItoM( uptr to, u16 from ) ;
+// sub m16 to r16 
+void SUB16MtoR( x86IntRegType to, uptr from );
+
+// sbb r64 to r64 
+void SBB64RtoR( x86IntRegType to, x86IntRegType from );
+
+// sbb imm32 to r32 
+void SBB32ItoR( x86IntRegType to, u32 from );
+// sbb imm32 to m32 
+void SBB32ItoM( uptr to, u32 from );
+// sbb r32 to r32 
+void SBB32RtoR( x86IntRegType to, x86IntRegType from );
+// sbb m32 to r32 
+void SBB32MtoR( x86IntRegType to, uptr from );
+// sbb r32 to m32 
+void SBB32RtoM( uptr to, x86IntRegType from );
+
+// dec r32 
+void DEC32R( x86IntRegType to );
+// dec m32 
+void DEC32M( uptr to );
+// dec r16 
+void DEC16R( x86IntRegType to );
+// dec m16 
+void DEC16M( uptr to );
+
+// mul eax by r32 to edx:eax 
+void MUL32R( x86IntRegType from );
+// mul eax by m32 to edx:eax 
+void MUL32M( uptr from );
+
+// imul eax by r32 to edx:eax 
+void IMUL32R( x86IntRegType from );
+// imul eax by m32 to edx:eax 
+void IMUL32M( uptr from );
+// imul r32 by r32 to r32 
+void IMUL32RtoR( x86IntRegType to, x86IntRegType from );
+
+// div eax by r32 to edx:eax 
+void DIV32R( x86IntRegType from );
+// div eax by m32 to edx:eax 
+void DIV32M( uptr from );
+
+// idiv eax by r32 to edx:eax 
+void IDIV32R( x86IntRegType from );
+// idiv eax by m32 to edx:eax 
+void IDIV32M( uptr from );
+
+////////////////////////////////////
+// shifting instructions          //
+////////////////////////////////////
+
+// shl imm8 to r64 
+void SHL64ItoR( x86IntRegType to, u8 from );
+// shl cl to r64
+void SHL64CLtoR( x86IntRegType to );
+// shr imm8 to r64 
+void SHR64ItoR( x86IntRegType to, u8 from );
+// shr cl to r64
+void SHR64CLtoR( x86IntRegType to );
+// sar imm8 to r64 
+void SAR64ItoR( x86IntRegType to, u8 from );
+// sar cl to r64
+void SAR64CLtoR( x86IntRegType to );
+
+// shl imm8 to r32 
+void SHL32ItoR( x86IntRegType to, u8 from );
+/* shl imm8 to m32 */
+void SHL32ItoM( uptr to, u8 from );
+// shl cl to r32 
+void SHL32CLtoR( x86IntRegType to );
+
+// shl imm8 to r16
+void SHL16ItoR( x86IntRegType to, u8 from );
+// shl imm8 to r8
+void SHL8ItoR( x86IntRegType to, u8 from );
+
+// shr imm8 to r32 
+void SHR32ItoR( x86IntRegType to, u8 from );
+/* shr imm8 to m32 */
+void SHR32ItoM( uptr to, u8 from );
+// shr cl to r32 
+void SHR32CLtoR( x86IntRegType to );
+
+// shr imm8 to r8
+void SHR8ItoR( x86IntRegType to, u8 from );
+
+// sar imm8 to r32 
+void SAR32ItoR( x86IntRegType to, u8 from );
+// sar imm8 to m32 
+void SAR32ItoM( uptr to, u8 from );
+// sar cl to r32 
+void SAR32CLtoR( x86IntRegType to );
+
+// sar imm8 to r16
+void SAR16ItoR( x86IntRegType to, u8 from );
+
+// ror imm8 to r32 (rotate right)
+void ROR32ItoR( x86IntRegType to,u8 from );
+
+void RCR32ItoR( x86IntRegType to,u8 from );
+// shld imm8 to r32
+void SHLD32ItoR( x86IntRegType to, x86IntRegType from, u8 shift );
+// shrd imm8 to r32
+void SHRD32ItoR( x86IntRegType to, x86IntRegType from, u8 shift );
+
+// sal imm8 to r32 
+#define SAL32ItoR SHL32ItoR
+// sal cl to r32 
+#define SAL32CLtoR SHL32CLtoR
+
+// logical instructions
+
+// or imm32 to r64 
+void OR64ItoR( x86IntRegType to, u32 from );
+// or m64 to r64 
+void OR64MtoR( x86IntRegType to, uptr from );
+// or r64 to r64
+void OR64RtoR( x86IntRegType to, x86IntRegType from );
+// or r32 to m64
+void OR64RtoM( uptr to, x86IntRegType from );
+
+// or imm32 to r32 
+void OR32ItoR( x86IntRegType to, u32 from );
+// or imm32 to m32 
+void OR32ItoM( uptr to, u32 from );
+// or r32 to r32 
+void OR32RtoR( x86IntRegType to, x86IntRegType from );
+// or r32 to m32 
+void OR32RtoM( uptr to, x86IntRegType from );
+// or m32 to r32 
+void OR32MtoR( x86IntRegType to, uptr from );
+// or r16 to r16
+void OR16RtoR( x86IntRegType to, x86IntRegType from );
+// or imm16 to r16
+void OR16ItoR( x86IntRegType to, u16 from );
+// or imm16 to m16
+void OR16ItoM( uptr to, u16 from );
+// or m16 to r16 
+void OR16MtoR( x86IntRegType to, uptr from );
+// or r16 to m16 
+void OR16RtoM( uptr to, x86IntRegType from );
+
+// or r8 to r8
+void OR8RtoR( x86IntRegType to, x86IntRegType from );
+// or r8 to m8
+void OR8RtoM( uptr to, x86IntRegType from );
+// or imm8 to m8
+void OR8ItoM( uptr to, u8 from );
+// or m8 to r8
+void OR8MtoR( x86IntRegType to, uptr from );
+
+// xor imm32 to r64 
+void XOR64ItoR( x86IntRegType to, u32 from );
+// xor r64 to r64 
+void XOR64RtoR( x86IntRegType to, x86IntRegType from );
+// xor m64 to r64
+void XOR64MtoR( x86IntRegType to, uptr from );
+// xor r64 to r64
+void XOR64RtoR( x86IntRegType to, x86IntRegType from );
+// xor r64 to m64
+void XOR64RtoM( uptr to, x86IntRegType from );
+// xor imm32 to r32 
+void XOR32ItoR( x86IntRegType to, u32 from );
+// xor imm32 to m32 
+void XOR32ItoM( uptr to, u32 from );
+// xor r32 to r32 
+void XOR32RtoR( x86IntRegType to, x86IntRegType from );
+// xor r16 to r16 
+void XOR16RtoR( x86IntRegType to, x86IntRegType from );
+// xor r32 to m32 
+void XOR32RtoM( uptr to, x86IntRegType from );
+// xor m32 to r32 
+void XOR32MtoR( x86IntRegType to, uptr from );
+// xor r16 to m16
+void XOR16RtoM( uptr to, x86IntRegType from );
+// xor imm16 to r16
+void XOR16ItoR( x86IntRegType to, u16 from );
+
+// and imm32 to r64 
+void AND64I32toR( x86IntRegType to, u32 from );
+// and m64 to r64
+void AND64MtoR( x86IntRegType to, uptr from );
+// and r64 to m64
+void AND64RtoM( uptr to, x86IntRegType from );
+// and r64 to r64
+void AND64RtoR( x86IntRegType to, x86IntRegType from );
+// and imm32 to m64
+void AND64I32toM( uptr to, u32 from );
+
+// and imm32 to r32 
+void AND32ItoR( x86IntRegType to, u32 from );
+// and sign ext imm8 to r32 
+void AND32I8toR( x86IntRegType to, u8 from );
+// and imm32 to m32 
+void AND32ItoM( uptr to, u32 from );
+// and sign ext imm8 to m32 
+void AND32I8toM( uptr to, u8 from );
+// and r32 to r32 
+void AND32RtoR( x86IntRegType to, x86IntRegType from );
+// and r32 to m32 
+void AND32RtoM( uptr to, x86IntRegType from );
+// and m32 to r32 
+void AND32MtoR( x86IntRegType to, uptr from );
+// and r16 to r16
+void AND16RtoR( x86IntRegType to, x86IntRegType from );
+// and imm16 to r16 
+void AND16ItoR( x86IntRegType to, u16 from );
+// and imm16 to m16
+void AND16ItoM( uptr to, u16 from );
+// and r16 to m16
+void AND16RtoM( uptr to, x86IntRegType from );
+// and m16 to r16 
+void AND16MtoR( x86IntRegType to, uptr from );
+// and imm8 to r8 
+void AND8ItoR( x86IntRegType to, u8 from );
+// and imm8 to m32
+void AND8ItoM( uptr to, u8 from );
+// and r8 to m8
+void AND8RtoM( uptr to, x86IntRegType from );
+// and m8 to r8 
+void AND8MtoR( x86IntRegType to, uptr from );
+// and r8 to r8
+void AND8RtoR( x86IntRegType to, x86IntRegType from );
+
+// not r64 
+void NOT64R( x86IntRegType from );
+// not r32 
+void NOT32R( x86IntRegType from );
+// not m32 
+void NOT32M( uptr from );
+// neg r64 
+void NEG64R( x86IntRegType from );
+// neg r32 
+void NEG32R( x86IntRegType from );
+// neg m32 
+void NEG32M( uptr from );
+// neg r16 
+void NEG16R( x86IntRegType from );
+
+////////////////////////////////////
+// jump instructions              //
+////////////////////////////////////
+
+// jmp rel8 
+u8*  JMP8( u8 to );
+
+// jmp rel32 
+u32* JMP32( uptr to );
+// jmp r32 (r64 if __x86_64__)
+void JMPR( x86IntRegType to );
+// jmp m32 
+void JMP32M( uptr to );
+
+// jp rel8 
+u8*  JP8( u8 to );
+// jnp rel8 
+u8*  JNP8( u8 to );
+// je rel8 
+u8*  JE8( u8 to );
+// jz rel8 
+u8*  JZ8( u8 to );
+// jg rel8 
+u8*  JG8( u8 to );
+// jge rel8 
+u8*  JGE8( u8 to );
+// js rel8 
+u8*  JS8( u8 to );
+// jns rel8 
+u8*  JNS8( u8 to );
+// jl rel8 
+u8*  JL8( u8 to );
+// ja rel8 
+u8*  JA8( u8 to );
+// jae rel8 
+u8*  JAE8( u8 to );
+// jb rel8 
+u8*  JB8( u8 to );
+// jbe rel8 
+u8*  JBE8( u8 to );
+// jle rel8 
+u8*  JLE8( u8 to );
+// jne rel8 
+u8*  JNE8( u8 to );
+// jnz rel8 
+u8*  JNZ8( u8 to );
+// jng rel8 
+u8*  JNG8( u8 to );
+// jnge rel8 
+u8*  JNGE8( u8 to );
+// jnl rel8 
+u8*  JNL8( u8 to );
+// jnle rel8 
+u8*  JNLE8( u8 to );
+// jo rel8 
+u8*  JO8( u8 to );
+// jno rel8 
+u8*  JNO8( u8 to );
+
+// jb rel8 
+u16*  JB16( u16 to );
+
+// jb rel32 
+u32* JB32( u32 to );
+// je rel32 
+u32* JE32( u32 to );
+// jz rel32 
+u32* JZ32( u32 to );
+// jg rel32 
+u32* JG32( u32 to );
+// jge rel32 
+u32* JGE32( u32 to );
+// jl rel32 
+u32* JL32( u32 to );
+// jle rel32 
+u32* JLE32( u32 to );
+// jae rel32 
+u32* JAE32( u32 to );
+// jne rel32 
+u32* JNE32( u32 to );
+// jnz rel32 
+u32* JNZ32( u32 to );
+// jng rel32 
+u32* JNG32( u32 to );
+// jnge rel32 
+u32* JNGE32( u32 to );
+// jnl rel32 
+u32* JNL32( u32 to );
+// jnle rel32 
+u32* JNLE32( u32 to );
+// jo rel32 
+u32* JO32( u32 to );
+// jno rel32 
+u32* JNO32( u32 to );
+// js rel32
+u32*  JS32( u32 to );
+
+// call func 
+void CALLFunc( uptr func);
+// call rel32 
+void CALL32( s32 to );
+// call r32 
+void CALL32R( x86IntRegType to );
+// call m32 
+void CALL64R( x86IntRegType to );
+
+
+////////////////////////////////////
+// misc instructions              //
+////////////////////////////////////
+
+// cmp imm32 to r64 
+void CMP64I32toR( x86IntRegType to, u32 from );
+// cmp m64 to r64 
+void CMP64MtoR( x86IntRegType to, uptr from );
+// cmp r64 to r64 
+void CMP64RtoR( x86IntRegType to, x86IntRegType from );
+
+// cmp imm32 to r32 
+void CMP32ItoR( x86IntRegType to, u32 from );
+// cmp imm32 to m32 
+void CMP32ItoM( uptr to, u32 from );
+// cmp r32 to r32 
+void CMP32RtoR( x86IntRegType to, x86IntRegType from );
+// cmp m32 to r32 
+void CMP32MtoR( x86IntRegType to, uptr from );
+// cmp imm32 to [r32]
+void CMP32I8toRm( x86IntRegType to, u8 from);
+// cmp imm32 to [r32+off]
+void CMP32I8toRmOffset8( x86IntRegType to, u8 from, u8 off);
+// cmp imm8 to [r32]
+void CMP32I8toM( uptr to, u8 from);
+
+// cmp imm16 to r16 
+void CMP16ItoR( x86IntRegType to, u16 from );
+// cmp imm16 to m16 
+void CMP16ItoM( uptr to, u16 from );
+// cmp r16 to r16 
+void CMP16RtoR( x86IntRegType to, x86IntRegType from );
+// cmp m16 to r16 
+void CMP16MtoR( x86IntRegType to, uptr from );
+
+// cmp imm8 to r8
+void CMP8ItoR( x86IntRegType to, u8 from );
+// cmp m8 to r8
+void CMP8MtoR( x86IntRegType to, uptr from );
+
+// test r64 to r64
+void TEST64RtoR( x86IntRegType to, x86IntRegType from );
+// test imm32 to r32 
+void TEST32ItoR( x86IntRegType to, u32 from );
+// test imm32 to m32 
+void TEST32ItoM( uptr to, u32 from );
+// test r32 to r32 
+void TEST32RtoR( x86IntRegType to, x86IntRegType from );
+// test imm32 to [r32]
+void TEST32ItoRm( x86IntRegType to, u32 from );
+// test imm16 to r16
+void TEST16ItoR( x86IntRegType to, u16 from );
+// test r16 to r16
+void TEST16RtoR( x86IntRegType to, x86IntRegType from );
+// test imm8 to r8
+void TEST8ItoR( x86IntRegType to, u8 from );
+// test imm8 to r8
+void TEST8ItoM( uptr to, u8 from );
+
+// sets r8 
+void SETS8R( x86IntRegType to );
+// setl r8 
+void SETL8R( x86IntRegType to );
+// setge r8 
+void SETGE8R( x86IntRegType to );
+// setge r8 
+void SETG8R( x86IntRegType to );
+// seta r8 
+void SETA8R( x86IntRegType to );
+// setae r8 
+void SETAE8R( x86IntRegType to );
+// setb r8 
+void SETB8R( x86IntRegType to );
+// setnz r8 
+void SETNZ8R( x86IntRegType to );
+// setz r8 
+void SETZ8R( x86IntRegType to );
+// sete r8 
+void SETE8R( x86IntRegType to );
+
+// push imm32
+void PUSH32I( u32 from );
+
+#ifdef __x86_64__
+void PUSHI( u32 from );
+// push r64
+void PUSH64R( x86IntRegType from );
+// push m64 
+void PUSH64M( uptr from );
+// pop r32 
+void POP64R( x86IntRegType from );
+#else
+// push r32 
+void PUSH32R( x86IntRegType from );
+// push m32 
+void PUSH32M( u32 from );
+// push imm32 
+void PUSH32I( u32 from );
+// pop r32 
+void POP32R( x86IntRegType from );
+// pushad 
+void PUSHA32( void );
+// popad 
+void POPA32( void );
+#endif
+
+void PUSHR(x86IntRegType from);
+void POPR(x86IntRegType from);
+
+// pushfd 
+void PUSHFD( void );
+// popfd 
+void POPFD( void );
+// ret 
+void RET( void );
+// ret (2-byte code used for misprediction)
+void RET2( void );
+
+void CBW();
+void CWDE();
+// cwd 
+void CWD( void );
+// cdq 
+void CDQ( void );
+// cdqe
+void CDQE( void );
+
+void LAHF();
+void SAHF();
+
+void BT32ItoR( x86IntRegType to, x86IntRegType from );
+void BSRRtoR(x86IntRegType to, x86IntRegType from);
+void BSWAP32R( x86IntRegType to );
+
+// to = from + offset
+void LEA16RtoR(x86IntRegType to, x86IntRegType from, u16 offset);
+void LEA32RtoR(x86IntRegType to, x86IntRegType from, u32 offset);
+
+// to = from0 + from1
+void LEA16RRtoR(x86IntRegType to, x86IntRegType from0, x86IntRegType from1);
+void LEA32RRtoR(x86IntRegType to, x86IntRegType from0, x86IntRegType from1);
+
+// to = from << scale (max is 3)
+void LEA16RStoR(x86IntRegType to, x86IntRegType from, u32 scale);
+void LEA32RStoR(x86IntRegType to, x86IntRegType from, u32 scale);
+
+//******************
+// FPU instructions 
+//******************
+
+// fild m32 to fpu reg stack 
+void FILD32( uptr from );
+// fistp m32 from fpu reg stack 
+void FISTP32( uptr from );
+// fld m32 to fpu reg stack 
+void FLD32( uptr from );
+// fld st(i)
+void FLD(int st);
+// fld1 (push +1.0f on the stack)
+void FLD1();
+// fld1 (push log_2 e on the stack)
+void FLDL2E();
+// fst m32 from fpu reg stack 
+void FST32( uptr to );
+// fstp m32 from fpu reg stack 
+void FSTP32( uptr to );
+// fstp st(i)
+void FSTP(int st);
+
+// fldcw fpu control word from m16 
+void FLDCW( uptr from );
+// fstcw fpu control word to m16 
+void FNSTCW( uptr to );
+void FXAM();
+void FDECSTP();
+// frndint
+void FRNDINT();
+void FXCH(int st);
+void F2XM1();
+void FSCALE();
+
+// fadd ST(src) to fpu reg stack ST(0) 
+void FADD32Rto0( x86IntRegType src );
+// fadd ST(0) to fpu reg stack ST(src) 
+void FADD320toR( x86IntRegType src );
+// fsub ST(src) to fpu reg stack ST(0) 
+void FSUB32Rto0( x86IntRegType src );
+// fsub ST(0) to fpu reg stack ST(src) 
+void FSUB320toR( x86IntRegType src );
+// fsubp -> subtract ST(0) from ST(1), store in ST(1) and POP stack 
+void FSUBP( void );
+// fmul ST(src) to fpu reg stack ST(0) 
+void FMUL32Rto0( x86IntRegType src );
+// fmul ST(0) to fpu reg stack ST(src) 
+void FMUL320toR( x86IntRegType src );
+// fdiv ST(src) to fpu reg stack ST(0) 
+void FDIV32Rto0( x86IntRegType src );
+// fdiv ST(0) to fpu reg stack ST(src) 
+void FDIV320toR( x86IntRegType src );
+// fdiv ST(0) to fpu reg stack ST(src), pop stack, store in ST(src)
+void FDIV320toRP( x86IntRegType src );
+
+// fadd m32 to fpu reg stack 
+void FADD32( uptr from );
+// fsub m32 to fpu reg stack 
+void FSUB32( uptr from );
+// fmul m32 to fpu reg stack 
+void FMUL32( uptr from );
+// fdiv m32 to fpu reg stack 
+void FDIV32( uptr from );
+// fcomi st, st( i) 
+void FCOMI( x86IntRegType src );
+// fcomip st, st( i) 
+void FCOMIP( x86IntRegType src );
+// fucomi st, st( i) 
+void FUCOMI( x86IntRegType src );
+// fucomip st, st( i) 
+void FUCOMIP( x86IntRegType src );
+// fcom m32 to fpu reg stack 
+void FCOM32( uptr from );
+// fabs fpu reg stack 
+void FABS( void );
+// fsqrt fpu reg stack 
+void FSQRT( void );
+// ftan fpu reg stack 
+void FPATAN( void );
+// fsin fpu reg stack 
+void FSIN( void );
+// fchs fpu reg stack 
+void FCHS( void );
+
+// fcmovb fpu reg to fpu reg stack 
+void FCMOVB32( x86IntRegType from );
+// fcmove fpu reg to fpu reg stack 
+void FCMOVE32( x86IntRegType from );
+// fcmovbe fpu reg to fpu reg stack 
+void FCMOVBE32( x86IntRegType from );
+// fcmovu fpu reg to fpu reg stack 
+void FCMOVU32( x86IntRegType from );
+// fcmovnb fpu reg to fpu reg stack 
+void FCMOVNB32( x86IntRegType from );
+// fcmovne fpu reg to fpu reg stack 
+void FCMOVNE32( x86IntRegType from );
+// fcmovnbe fpu reg to fpu reg stack 
+void FCMOVNBE32( x86IntRegType from );
+// fcmovnu fpu reg to fpu reg stack 
+void FCMOVNU32( x86IntRegType from );
+void FCOMP32( uptr from );
+void FNSTSWtoAX( void );
+
+// probably a little extreme here, but x86-64 should NOT use MMX
+#ifdef __x86_64__
+
+#define MMXONLY(code)
+
+#else
+
+#define MMXONLY(code) code
+
+//******************
+// MMX instructions 
+//******************
+
+// r64 = mm
+
+// movq m64 to r64 
+void MOVQMtoR( x86MMXRegType to, uptr from );
+// movq r64 to m64 
+void MOVQRtoM( uptr to, x86MMXRegType from );
+
+// pand r64 to r64 
+void PANDRtoR( x86MMXRegType to, x86MMXRegType from );
+void PANDNRtoR( x86MMXRegType to, x86MMXRegType from );
+// pand m64 to r64 ;
+void PANDMtoR( x86MMXRegType to, uptr from );
+// pandn r64 to r64 
+void PANDNRtoR( x86MMXRegType to, x86MMXRegType from );
+// pandn r64 to r64 
+void PANDNMtoR( x86MMXRegType to, uptr from );
+// por r64 to r64 
+void PORRtoR( x86MMXRegType to, x86MMXRegType from );
+// por m64 to r64 
+void PORMtoR( x86MMXRegType to, uptr from );
+// pxor r64 to r64 
+void PXORRtoR( x86MMXRegType to, x86MMXRegType from );
+// pxor m64 to r64 
+void PXORMtoR( x86MMXRegType to, uptr from );
+
+// psllq r64 to r64 
+void PSLLQRtoR( x86MMXRegType to, x86MMXRegType from );
+// psllq m64 to r64 
+void PSLLQMtoR( x86MMXRegType to, uptr from );
+// psllq imm8 to r64 
+void PSLLQItoR( x86MMXRegType to, u8 from );
+// psrlq r64 to r64 
+void PSRLQRtoR( x86MMXRegType to, x86MMXRegType from );
+// psrlq m64 to r64 
+void PSRLQMtoR( x86MMXRegType to, uptr from );
+// psrlq imm8 to r64 
+void PSRLQItoR( x86MMXRegType to, u8 from );
+
+// paddusb r64 to r64 
+void PADDUSBRtoR( x86MMXRegType to, x86MMXRegType from );
+// paddusb m64 to r64 
+void PADDUSBMtoR( x86MMXRegType to, uptr from );
+// paddusw r64 to r64 
+void PADDUSWRtoR( x86MMXRegType to, x86MMXRegType from );
+// paddusw m64 to r64 
+void PADDUSWMtoR( x86MMXRegType to, uptr from );
+
+// paddb r64 to r64 
+void PADDBRtoR( x86MMXRegType to, x86MMXRegType from );
+// paddb m64 to r64 
+void PADDBMtoR( x86MMXRegType to, uptr from );
+// paddw r64 to r64 
+void PADDWRtoR( x86MMXRegType to, x86MMXRegType from );
+// paddw m64 to r64 
+void PADDWMtoR( x86MMXRegType to, uptr from );
+// paddd r64 to r64 
+void PADDDRtoR( x86MMXRegType to, x86MMXRegType from );
+// paddd m64 to r64 
+void PADDDMtoR( x86MMXRegType to, uptr from );
+void PADDSBRtoR( x86MMXRegType to, x86MMXRegType from );
+void PADDSWRtoR( x86MMXRegType to, x86MMXRegType from );
+
+// paddq m64 to r64 (sse2 only?)
+void PADDQMtoR( x86MMXRegType to, uptr from );
+// paddq r64 to r64 (sse2 only?)
+void PADDQRtoR( x86MMXRegType to, x86MMXRegType from );
+
+void PSUBSBRtoR( x86MMXRegType to, x86MMXRegType from ); 
+void PSUBSWRtoR( x86MMXRegType to, x86MMXRegType from );
+
+void PSUBBRtoR( x86MMXRegType to, x86MMXRegType from );
+void PSUBWRtoR( x86MMXRegType to, x86MMXRegType from );
+void PSUBDRtoR( x86MMXRegType to, x86MMXRegType from );
+void PSUBDMtoR( x86MMXRegType to, uptr from );
+
+// psubq m64 to r64 (sse2 only?)
+void PSUBQMtoR( x86MMXRegType to, uptr from );
+// psubq r64 to r64 (sse2 only?)
+void PSUBQRtoR( x86MMXRegType to, x86MMXRegType from );
+
+// pmuludq m64 to r64 (sse2 only?)
+void PMULUDQMtoR( x86MMXRegType to, uptr from );
+// pmuludq r64 to r64 (sse2 only?)
+void PMULUDQRtoR( x86MMXRegType to, x86MMXRegType from );
+
+void PCMPEQBRtoR( x86MMXRegType to, x86MMXRegType from );
+void PCMPEQWRtoR( x86MMXRegType to, x86MMXRegType from );
+void PCMPEQDRtoR( x86MMXRegType to, x86MMXRegType from );
+void PCMPEQDMtoR( x86MMXRegType to, uptr from );
+void PCMPGTBRtoR( x86MMXRegType to, x86MMXRegType from );
+void PCMPGTWRtoR( x86MMXRegType to, x86MMXRegType from );
+void PCMPGTDRtoR( x86MMXRegType to, x86MMXRegType from );
+void PCMPGTDMtoR( x86MMXRegType to, uptr from );
+void PSRLWItoR( x86MMXRegType to, u8 from );
+void PSRLDItoR( x86MMXRegType to, u8 from );
+void PSRLDRtoR( x86MMXRegType to, x86MMXRegType from );
+void PSLLWItoR( x86MMXRegType to, u8 from );
+void PSLLDItoR( x86MMXRegType to, u8 from );
+void PSLLDRtoR( x86MMXRegType to, x86MMXRegType from );
+void PSRAWItoR( x86MMXRegType to, u8 from );
+void PSRADItoR( x86MMXRegType to, u8 from );
+void PSRADRtoR( x86MMXRegType to, x86MMXRegType from );
+void PUNPCKLDQRtoR( x86MMXRegType to, x86MMXRegType from );
+void PUNPCKLDQMtoR( x86MMXRegType to, uptr from );
+void PUNPCKHDQRtoR( x86MMXRegType to, x86MMXRegType from );
+void PUNPCKHDQMtoR( x86MMXRegType to, uptr from );
+void MOVQ64ItoR( x86MMXRegType reg, u64 i ); //Prototype.Todo add all consts to end of block.not after jr $+8
+void MOVQRtoR( x86MMXRegType to, x86MMXRegType from );
+void MOVQRmtoROffset( x86MMXRegType to, x86IntRegType from, u32 offset );
+void MOVQRtoRmOffset( x86IntRegType  to, x86MMXRegType from, u32 offset );
+void MOVDMtoMMX( x86MMXRegType to, uptr from );
+void MOVDMMXtoM( uptr to, x86MMXRegType from );
+void MOVD32RtoMMX( x86MMXRegType to, x86IntRegType from );
+void MOVD32RmtoMMX( x86MMXRegType to, x86IntRegType from );
+void MOVD32RmOffsettoMMX( x86MMXRegType to, x86IntRegType from, u32 offset );
+void MOVD32MMXtoR( x86IntRegType to, x86MMXRegType from );
+void MOVD32MMXtoRm( x86IntRegType to, x86MMXRegType from );
+void MOVD32MMXtoRmOffset( x86IntRegType to, x86MMXRegType from, u32 offset );
+void PINSRWRtoMMX( x86MMXRegType to, x86SSERegType from, u8 imm8 );
+void PSHUFWRtoR(x86MMXRegType to, x86MMXRegType from, u8 imm8);
+void PSHUFWMtoR(x86MMXRegType to, uptr from, u8 imm8);
+void MASKMOVQRtoR(x86MMXRegType to, x86MMXRegType from);
+
+// emms 
+void EMMS( void );
+
+//**********************************************************************************/
+//PACKSSWB,PACKSSDW: Pack Saturate Signed Word 64bits
+//**********************************************************************************
+void PACKSSWBMMXtoMMX(x86MMXRegType to, x86MMXRegType from);
+void PACKSSDWMMXtoMMX(x86MMXRegType to, x86MMXRegType from);
+
+void PMOVMSKBMMXtoR(x86IntRegType to, x86MMXRegType from);
+
+void SSE2_MOVDQ2Q_XMM_to_MM( x86MMXRegType to, x86SSERegType from);
+void SSE2_MOVQ2DQ_MM_to_XMM( x86SSERegType to, x86MMXRegType from);
+
+#endif // !__x86_64__
+
+//*********************
+// SSE   instructions *
+//*********************
+void SSE_MOVAPS_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE_MOVAPS_XMM_to_M128( uptr to, x86SSERegType from );
+void SSE_MOVAPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+
+void SSE_MOVUPS_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE_MOVUPS_XMM_to_M128( uptr to, x86SSERegType from );
+
+void SSE_MOVSS_M32_to_XMM( x86SSERegType to, uptr from );
+void SSE_MOVSS_XMM_to_M32( u32 to, x86SSERegType from );
+void SSE_MOVSS_XMM_to_Rm( x86IntRegType to, x86SSERegType from );
+void SSE_MOVSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE_MOVSS_RmOffset_to_XMM( x86SSERegType to, x86IntRegType from, int offset );
+void SSE_MOVSS_XMM_to_RmOffset( x86IntRegType to, x86SSERegType from, int offset );
+
+void SSE2_MOVSD_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+
+void SSE2_MOVQ_M64_to_XMM( x86SSERegType to, uptr from );
+void SSE2_MOVQ_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE2_MOVQ_XMM_to_M64( u32 to, x86SSERegType from );
+
+void SSE_MASKMOVDQU_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+
+void SSE_MOVLPS_M64_to_XMM( x86SSERegType to, uptr from );
+void SSE_MOVLPS_XMM_to_M64( u32 to, x86SSERegType from );
+void SSE_MOVLPS_RmOffset_to_XMM( x86SSERegType to, x86IntRegType from, int offset );
+void SSE_MOVLPS_XMM_to_RmOffset( x86IntRegType to, x86SSERegType from, int offset );
+
+void SSE_MOVHPS_M64_to_XMM( x86SSERegType to, uptr from );
+void SSE_MOVHPS_XMM_to_M64( u32 to, x86SSERegType from );       
+void SSE_MOVHPS_RmOffset_to_XMM( x86SSERegType to, x86IntRegType from, int offset );
+void SSE_MOVHPS_XMM_to_RmOffset( x86IntRegType to, x86SSERegType from, int offset );
+
+void SSE_MOVLHPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE_MOVHLPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE_MOVLPSRmtoR( x86SSERegType to, x86IntRegType from );
+void SSE_MOVLPSRmtoROffset( x86SSERegType to, x86IntRegType from, int offset );
+void SSE_MOVLPSRtoRm( x86SSERegType to, x86IntRegType from );
+void SSE_MOVLPSRtoRmOffset( x86SSERegType to, x86IntRegType from, int offset );
+
+void SSE_MOVAPSRmStoR( x86SSERegType to, x86IntRegType from, x86IntRegType from2, int scale );
+void SSE_MOVAPSRtoRmS( x86SSERegType to, x86IntRegType from, x86IntRegType from2, int scale );
+void SSE_MOVAPSRtoRmOffset( x86IntRegType to, x86SSERegType from, int offset );
+void SSE_MOVAPSRmtoROffset( x86SSERegType to, x86IntRegType from, int offset );
+void SSE_MOVUPSRmStoR( x86SSERegType to, x86IntRegType from, x86IntRegType from2, int scale );
+void SSE_MOVUPSRtoRmS( x86SSERegType to, x86IntRegType from, x86IntRegType from2, int scale );
+void SSE_MOVUPSRtoRm( x86IntRegType to, x86IntRegType from );
+void SSE_MOVUPSRmtoR( x86IntRegType to, x86IntRegType from );
+
+void SSE_MOVUPSRmtoROffset( x86SSERegType to, x86IntRegType from, int offset );
+void SSE_MOVUPSRtoRmOffset( x86SSERegType to, x86IntRegType from, int offset );
+
+void SSE2_MOVDQARtoRmOffset( x86IntRegType to, x86SSERegType from, int offset );
+void SSE2_MOVDQARmtoROffset( x86SSERegType to, x86IntRegType from, int offset );
+
+void SSE_RCPPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE_RCPPS_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE_RCPSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE_RCPSS_M32_to_XMM( x86SSERegType to, uptr from );
+
+void SSE_ORPS_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE_ORPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE_XORPS_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE_XORPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE_ANDPS_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE_ANDPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE_ANDNPS_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE_ANDNPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE_ADDPS_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE_ADDPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE_ADDSS_M32_to_XMM( x86SSERegType to, uptr from );
+void SSE_ADDSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE_SUBPS_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE_SUBPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE_SUBSS_M32_to_XMM( x86SSERegType to, uptr from );
+void SSE_SUBSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE_MULPS_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE_MULPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE_MULSS_M32_to_XMM( x86SSERegType to, uptr from );
+void SSE_MULSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE_CMPEQSS_M32_to_XMM( x86SSERegType to, uptr from );
+void SSE_CMPEQSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE_CMPLTSS_M32_to_XMM( x86SSERegType to, uptr from );
+void SSE_CMPLTSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE_CMPLESS_M32_to_XMM( x86SSERegType to, uptr from );
+void SSE_CMPLESS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE_CMPUNORDSS_M32_to_XMM( x86SSERegType to, uptr from );
+void SSE_CMPUNORDSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE_CMPNESS_M32_to_XMM( x86SSERegType to, uptr from );
+void SSE_CMPNESS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE_CMPNLTSS_M32_to_XMM( x86SSERegType to, uptr from );
+void SSE_CMPNLTSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE_CMPNLESS_M32_to_XMM( x86SSERegType to, uptr from );
+void SSE_CMPNLESS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE_CMPORDSS_M32_to_XMM( x86SSERegType to, uptr from );
+void SSE_CMPORDSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+
+void SSE_UCOMISS_M32_to_XMM( x86SSERegType to, uptr from );
+void SSE_UCOMISS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+
+#ifndef __x86_64__
+void SSE_PMAXSW_MM_to_MM( x86MMXRegType to, x86MMXRegType from );
+void SSE_PMINSW_MM_to_MM( x86MMXRegType to, x86MMXRegType from );
+void SSE_CVTPI2PS_MM_to_XMM( x86SSERegType to, x86MMXRegType from );
+void SSE_CVTPS2PI_M64_to_MM( x86MMXRegType to, uptr from );
+void SSE_CVTPS2PI_XMM_to_MM( x86MMXRegType to, x86SSERegType from );
+#endif
+void SSE_CVTPI2PS_M64_to_XMM( x86SSERegType to, uptr from );
+void SSE_CVTTSS2SI_M32_to_R32(x86IntRegType to, uptr from);
+void SSE_CVTTSS2SI_XMM_to_R32(x86IntRegType to, x86SSERegType from);
+void SSE_CVTSI2SS_M32_to_XMM(x86SSERegType to, uptr from);
+void SSE_CVTSI2SS_R_to_XMM(x86SSERegType to, x86IntRegType from);
+
+void SSE2_CVTDQ2PS_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE2_CVTDQ2PS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE2_CVTPS2DQ_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE2_CVTPS2DQ_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE2_CVTTPS2DQ_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+
+void SSE_MAXPS_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE_MAXPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE_MAXSS_M32_to_XMM( x86SSERegType to, uptr from );
+void SSE_MAXSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE_MINPS_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE_MINPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE_MINSS_M32_to_XMM( x86SSERegType to, uptr from );
+void SSE_MINSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE_RSQRTPS_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE_RSQRTPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE_RSQRTSS_M32_to_XMM( x86SSERegType to, uptr from );
+void SSE_RSQRTSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE_SQRTPS_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE_SQRTPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE_SQRTSS_M32_to_XMM( x86SSERegType to, uptr from );
+void SSE_SQRTSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE_UNPCKLPS_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE_UNPCKLPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE_UNPCKHPS_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE_UNPCKHPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE_SHUFPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from, u8 imm8 );
+void SSE_SHUFPS_M128_to_XMM( x86SSERegType to, uptr from, u8 imm8 );
+void SSE_SHUFPS_RmOffset_to_XMM( x86SSERegType to, x86IntRegType from, int offset, u8 imm8 );
+void SSE_CMPEQPS_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE_CMPEQPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE_CMPLTPS_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE_CMPLTPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE_CMPLEPS_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE_CMPLEPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE_CMPUNORDPS_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE_CMPUNORDPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE_CMPNEPS_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE_CMPNEPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE_CMPNLTPS_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE_CMPNLTPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE_CMPNLEPS_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE_CMPNLEPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE_CMPORDPS_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE_CMPORDPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE_DIVPS_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE_DIVPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE_DIVSS_M32_to_XMM( x86SSERegType to, uptr from );
+void SSE_DIVSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+// VectorPath
+void SSE2_PSHUFD_XMM_to_XMM( x86SSERegType to, x86SSERegType from, u8 imm8 );
+void SSE2_PSHUFD_M128_to_XMM( x86SSERegType to, uptr from, u8 imm8 );
+
+void SSE2_PSHUFLW_XMM_to_XMM( x86SSERegType to, x86SSERegType from, u8 imm8 );
+void SSE2_PSHUFLW_M128_to_XMM( x86SSERegType to, uptr from, u8 imm8 );
+void SSE2_PSHUFHW_XMM_to_XMM( x86SSERegType to, x86SSERegType from, u8 imm8 );
+void SSE2_PSHUFHW_M128_to_XMM( x86SSERegType to, uptr from, u8 imm8 );
+
+void SSE_STMXCSR( uptr from );
+void SSE_LDMXCSR( uptr from );
+
+
+//*********************
+//  SSE 2 Instructions*
+//*********************
+void SSE2_MOVDQA_M128_to_XMM(x86SSERegType to, uptr from); 
+void SSE2_MOVDQA_XMM_to_M128( uptr to, x86SSERegType from); 
+void SSE2_MOVDQA_XMM_to_XMM( x86SSERegType to, x86SSERegType from); 
+
+void SSE2_MOVDQU_M128_to_XMM(x86SSERegType to, uptr from); 
+void SSE2_MOVDQU_XMM_to_M128( uptr to, x86SSERegType from); 
+void SSE2_MOVDQU_XMM_to_XMM( x86SSERegType to, x86SSERegType from); 
+
+void SSE2_PSRLW_XMM_to_XMM(x86SSERegType to, x86SSERegType from);
+void SSE2_PSRLW_M128_to_XMM(x86SSERegType to, uptr from);
+void SSE2_PSRLW_I8_to_XMM(x86SSERegType to, u8 imm8);
+void SSE2_PSRLD_XMM_to_XMM(x86SSERegType to, x86SSERegType from);
+void SSE2_PSRLD_M128_to_XMM(x86SSERegType to, uptr from);
+void SSE2_PSRLD_I8_to_XMM(x86SSERegType to, u8 imm8);
+void SSE2_PSRLQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from);
+void SSE2_PSRLQ_M128_to_XMM(x86SSERegType to, uptr from);
+void SSE2_PSRLQ_I8_to_XMM(x86SSERegType to, u8 imm8);
+void SSE2_PSRLDQ_I8_to_XMM(x86SSERegType to, u8 imm8);
+void SSE2_PSRAW_XMM_to_XMM(x86SSERegType to, x86SSERegType from);
+void SSE2_PSRAW_M128_to_XMM(x86SSERegType to, uptr from);
+void SSE2_PSRAW_I8_to_XMM(x86SSERegType to, u8 imm8);
+void SSE2_PSRAD_XMM_to_XMM(x86SSERegType to, x86SSERegType from);
+void SSE2_PSRAD_M128_to_XMM(x86SSERegType to, uptr from);
+void SSE2_PSRAD_I8_to_XMM(x86SSERegType to, u8 imm8);
+void SSE2_PSLLW_XMM_to_XMM(x86SSERegType to, x86SSERegType from);
+void SSE2_PSLLW_M128_to_XMM(x86SSERegType to, uptr from);
+void SSE2_PSLLW_I8_to_XMM(x86SSERegType to, u8 imm8);
+void SSE2_PSLLD_XMM_to_XMM(x86SSERegType to, x86SSERegType from);
+void SSE2_PSLLD_M128_to_XMM(x86SSERegType to, uptr from);
+void SSE2_PSLLD_I8_to_XMM(x86SSERegType to, u8 imm8);
+void SSE2_PSLLQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from);
+void SSE2_PSLLQ_M128_to_XMM(x86SSERegType to, uptr from);
+void SSE2_PSLLQ_I8_to_XMM(x86SSERegType to, u8 imm8);
+void SSE2_PSLLDQ_I8_to_XMM(x86SSERegType to, u8 imm8);
+void SSE2_PMAXSW_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE2_PMAXSW_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE2_PMAXUB_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE2_PMAXUB_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE2_PMINSW_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE2_PMINSW_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE2_PMINUB_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE2_PMINUB_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE2_PADDSB_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE2_PADDSB_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE2_PADDSW_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE2_PADDSW_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE2_PSUBSB_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE2_PSUBSB_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE2_PSUBSW_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE2_PSUBSW_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE2_PSUBUSB_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE2_PSUBUSB_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE2_PSUBUSW_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE2_PSUBUSW_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE2_PAND_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE2_PAND_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE2_PANDN_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE2_PANDN_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE2_PXOR_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE2_PXOR_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE2_PADDW_XMM_to_XMM(x86SSERegType to, x86SSERegType from );
+void SSE2_PADDW_M128_to_XMM(x86SSERegType to, uptr from );
+void SSE2_PADDUSB_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE2_PADDUSB_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE2_PADDUSW_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE2_PADDUSW_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE2_PADDB_XMM_to_XMM(x86SSERegType to, x86SSERegType from );
+void SSE2_PADDB_M128_to_XMM(x86SSERegType to, uptr from );
+void SSE2_PADDD_XMM_to_XMM(x86SSERegType to, x86SSERegType from );
+void SSE2_PADDD_M128_to_XMM(x86SSERegType to, uptr from );
+void SSE2_PADDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from );
+void SSE2_PADDQ_M128_to_XMM(x86SSERegType to, uptr from );
+
+//**********************************************************************************/
+//PACKSSWB,PACKSSDW: Pack Saturate Signed Word
+//**********************************************************************************
+void SSE2_PACKSSWB_XMM_to_XMM(x86SSERegType to, x86SSERegType from);
+void SSE2_PACKSSWB_M128_to_XMM(x86SSERegType to, uptr from);
+void SSE2_PACKSSDW_XMM_to_XMM(x86SSERegType to, x86SSERegType from);
+void SSE2_PACKSSDW_M128_to_XMM(x86SSERegType to, uptr from);
+
+void SSE2_PACKUSWB_XMM_to_XMM(x86SSERegType to, x86SSERegType from);
+void SSE2_PACKUSWB_M128_to_XMM(x86SSERegType to, uptr from);
+
+//**********************************************************************************/
+//PUNPCKHWD: Unpack 16bit high
+//**********************************************************************************
+void SSE2_PUNPCKLBW_XMM_to_XMM(x86SSERegType to, x86SSERegType from);
+void SSE2_PUNPCKLBW_M128_to_XMM(x86SSERegType to, uptr from);
+void SSE2_PUNPCKHBW_XMM_to_XMM(x86SSERegType to, x86SSERegType from);
+void SSE2_PUNPCKHBW_M128_to_XMM(x86SSERegType to, uptr from);
+
+void SSE2_PUNPCKLWD_XMM_to_XMM(x86SSERegType to, x86SSERegType from);
+void SSE2_PUNPCKLWD_M128_to_XMM(x86SSERegType to, uptr from);
+void SSE2_PUNPCKHWD_XMM_to_XMM(x86SSERegType to, x86SSERegType from);
+void SSE2_PUNPCKHWD_M128_to_XMM(x86SSERegType to, uptr from);
+
+void SSE2_PUNPCKLDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from);
+void SSE2_PUNPCKLDQ_M128_to_XMM(x86SSERegType to, uptr from);
+void SSE2_PUNPCKHDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from);
+void SSE2_PUNPCKHDQ_M128_to_XMM(x86SSERegType to, uptr from);
+
+void SSE2_PUNPCKLQDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from);
+void SSE2_PUNPCKLQDQ_M128_to_XMM(x86SSERegType to, uptr from);
+
+void SSE2_PUNPCKHQDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from);
+void SSE2_PUNPCKHQDQ_M128_to_XMM(x86SSERegType to, uptr from);
+
+// mult by half words
+void SSE2_PMULLW_XMM_to_XMM(x86SSERegType to, x86SSERegType from);
+void SSE2_PMULLW_M128_to_XMM(x86SSERegType to, uptr from);
+void SSE2_PMULHW_XMM_to_XMM(x86SSERegType to, x86SSERegType from);
+void SSE2_PMULHW_M128_to_XMM(x86SSERegType to, uptr from);
+
+void SSE2_PMULUDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from);
+void SSE2_PMULUDQ_M128_to_XMM(x86SSERegType to, uptr from);
+
+
+//**********************************************************************************/
+//PMOVMSKB: Create 16bit mask from signs of 8bit integers
+//**********************************************************************************
+void SSE2_PMOVMSKB_XMM_to_R32(x86IntRegType to, x86SSERegType from);
+
+void SSE_MOVMSKPS_XMM_to_R32(x86IntRegType to, x86SSERegType from);
+void SSE2_MOVMSKPD_XMM_to_R32(x86IntRegType to, x86SSERegType from);
+
+//**********************************************************************************/
+//PEXTRW,PINSRW: Packed Extract/Insert Word                                        *
+//**********************************************************************************
+void SSE_PEXTRW_XMM_to_R32(x86IntRegType to, x86SSERegType from, u8 imm8 );
+void SSE_PINSRW_R32_to_XMM(x86SSERegType from, x86IntRegType to, u8 imm8 );
+
+
+//**********************************************************************************/
+//PSUBx: Subtract Packed Integers                                                  *
+//**********************************************************************************
+void SSE2_PSUBB_XMM_to_XMM(x86SSERegType to, x86SSERegType from );
+void SSE2_PSUBB_M128_to_XMM(x86SSERegType to, uptr from );
+void SSE2_PSUBW_XMM_to_XMM(x86SSERegType to, x86SSERegType from );
+void SSE2_PSUBW_M128_to_XMM(x86SSERegType to, uptr from );
+void SSE2_PSUBD_XMM_to_XMM(x86SSERegType to, x86SSERegType from );
+void SSE2_PSUBD_M128_to_XMM(x86SSERegType to, uptr from );
+void SSE2_PSUBQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from );
+void SSE2_PSUBQ_M128_to_XMM(x86SSERegType to, uptr from );
+///////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//PCMPxx: Compare Packed Integers                                                  *
+//**********************************************************************************
+void SSE2_PCMPGTB_XMM_to_XMM(x86SSERegType to, x86SSERegType from );
+void SSE2_PCMPGTB_M128_to_XMM(x86SSERegType to, uptr from );
+void SSE2_PCMPGTW_XMM_to_XMM(x86SSERegType to, x86SSERegType from );
+void SSE2_PCMPGTW_M128_to_XMM(x86SSERegType to, uptr from );
+void SSE2_PCMPGTD_XMM_to_XMM(x86SSERegType to, x86SSERegType from );
+void SSE2_PCMPGTD_M128_to_XMM(x86SSERegType to, uptr from );
+void SSE2_PCMPEQB_XMM_to_XMM(x86SSERegType to, x86SSERegType from );
+void SSE2_PCMPEQB_M128_to_XMM(x86SSERegType to, uptr from );
+void SSE2_PCMPEQW_XMM_to_XMM(x86SSERegType to, x86SSERegType from );
+void SSE2_PCMPEQW_M128_to_XMM(x86SSERegType to, uptr from );
+void SSE2_PCMPEQD_XMM_to_XMM(x86SSERegType to, x86SSERegType from );
+void SSE2_PCMPEQD_M128_to_XMM(x86SSERegType to, uptr from );
+//**********************************************************************************/
+//MOVD: Move Dword(32bit) to /from XMM reg                                         *
+//**********************************************************************************
+void SSE2_MOVD_M32_to_XMM( x86SSERegType to, uptr from );
+void SSE2_MOVD_R_to_XMM( x86SSERegType to, x86IntRegType from );
+void SSE2_MOVD_Rm_to_XMM( x86SSERegType to, x86IntRegType from );
+void SSE2_MOVD_RmOffset_to_XMM( x86SSERegType to, x86IntRegType from, int offset );
+void SSE2_MOVD_XMM_to_M32( u32 to, x86SSERegType from );
+void SSE2_MOVD_XMM_to_R( x86IntRegType to, x86SSERegType from );
+void SSE2_MOVD_XMM_to_Rm( x86IntRegType to, x86SSERegType from );
+void SSE2_MOVD_XMM_to_RmOffset( x86IntRegType to, x86SSERegType from, int offset );
+
+#ifdef __x86_64__
+void SSE2_MOVQ_XMM_to_R( x86IntRegType to, x86SSERegType from );
+void SSE2_MOVQ_R_to_XMM( x86SSERegType to, x86IntRegType from );
+#endif
+
+//**********************************************************************************/
+//POR : SSE Bitwise OR                                                             *
+//**********************************************************************************
+void SSE2_POR_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE2_POR_M128_to_XMM( x86SSERegType to, uptr from );
+
+void SSE3_HADDPS_XMM_to_XMM(x86SSERegType to, x86SSERegType from);
+void SSE3_HADDPS_M128_to_XMM(x86SSERegType to, uptr from);
+
+void SSE3_MOVSLDUP_XMM_to_XMM(x86SSERegType to, x86SSERegType from);
+void SSE3_MOVSLDUP_M128_to_XMM(x86SSERegType to, uptr from);
+void SSE3_MOVSHDUP_XMM_to_XMM(x86SSERegType to, x86SSERegType from);
+void SSE3_MOVSHDUP_M128_to_XMM(x86SSERegType to, uptr from);
+//*********************
+// SSE-X - uses both SSE,SSE2 code and tries to keep consistensies between the data
+// Uses g_xmmtypes to infer the correct type.
+//*********************
+void SSEX_MOVDQA_M128_to_XMM( x86SSERegType to, uptr from );
+void SSEX_MOVDQA_XMM_to_M128( uptr to, x86SSERegType from );
+void SSEX_MOVDQA_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+
+void SSEX_MOVDQARmtoROffset( x86SSERegType to, x86IntRegType from, int offset );
+void SSEX_MOVDQARtoRmOffset( x86IntRegType to, x86SSERegType from, int offset );
+
+void SSEX_MOVDQU_M128_to_XMM( x86SSERegType to, uptr from );
+void SSEX_MOVDQU_XMM_to_M128( uptr to, x86SSERegType from );
+void SSEX_MOVDQU_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+
+void SSEX_MOVD_M32_to_XMM( x86SSERegType to, uptr from );
+void SSEX_MOVD_XMM_to_M32( u32 to, x86SSERegType from );
+void SSEX_MOVD_XMM_to_Rm( x86IntRegType to, x86SSERegType from );
+void SSEX_MOVD_RmOffset_to_XMM( x86SSERegType to, x86IntRegType from, int offset );
+void SSEX_MOVD_XMM_to_RmOffset( x86IntRegType to, x86SSERegType from, int offset );
+
+void SSEX_POR_M128_to_XMM( x86SSERegType to, uptr from );
+void SSEX_POR_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSEX_PXOR_M128_to_XMM( x86SSERegType to, uptr from );
+void SSEX_PXOR_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSEX_PAND_M128_to_XMM( x86SSERegType to, uptr from );
+void SSEX_PAND_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSEX_PANDN_M128_to_XMM( x86SSERegType to, uptr from );
+void SSEX_PANDN_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+
+void SSEX_PUNPCKLDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from);
+void SSEX_PUNPCKLDQ_M128_to_XMM(x86SSERegType to, uptr from);
+void SSEX_PUNPCKHDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from);
+void SSEX_PUNPCKHDQ_M128_to_XMM(x86SSERegType to, uptr from);
+
+void SSEX_MOVHLPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+
+//*********************
+// 3DNOW instructions * 
+//*********************
+void FEMMS( void );
+void PFCMPEQMtoR( x86IntRegType to, uptr from );
+void PFCMPGTMtoR( x86IntRegType to, uptr from );
+void PFCMPGEMtoR( x86IntRegType to, uptr from );
+void PFADDMtoR( x86IntRegType to, uptr from );
+void PFADDRtoR( x86IntRegType to, x86IntRegType from );
+void PFSUBMtoR( x86IntRegType to, uptr from );
+void PFSUBRtoR( x86IntRegType to, x86IntRegType from );
+void PFMULMtoR( x86IntRegType to, uptr from );
+void PFMULRtoR( x86IntRegType to, x86IntRegType from );
+void PFRCPMtoR( x86IntRegType to, uptr from );
+void PFRCPRtoR( x86IntRegType to, x86IntRegType from );
+void PFRCPIT1RtoR( x86IntRegType to, x86IntRegType from );
+void PFRCPIT2RtoR( x86IntRegType to, x86IntRegType from );
+void PFRSQRTRtoR( x86IntRegType to, x86IntRegType from );
+void PFRSQIT1RtoR( x86IntRegType to, x86IntRegType from );
+void PF2IDMtoR( x86IntRegType to, uptr from );
+void PF2IDRtoR( x86IntRegType to, x86IntRegType from );
+void PI2FDMtoR( x86IntRegType to, uptr from );
+void PI2FDRtoR( x86IntRegType to, x86IntRegType from );
+void PFMAXMtoR( x86IntRegType to, uptr from );
+void PFMAXRtoR( x86IntRegType to, x86IntRegType from );
+void PFMINMtoR( x86IntRegType to, uptr from );
+void PFMINRtoR( x86IntRegType to, x86IntRegType from );
+
+void SSE2EMU_MOVSD_XMM_to_XMM( x86SSERegType to, x86SSERegType from);
+void SSE2EMU_MOVQ_M64_to_XMM( x86SSERegType to, uptr from);
+void SSE2EMU_MOVQ_XMM_to_XMM( x86SSERegType to, x86SSERegType from);
+void SSE2EMU_MOVD_RmOffset_to_XMM( x86SSERegType to, x86IntRegType from, int offset );
+void SSE2EMU_MOVD_XMM_to_RmOffset(x86IntRegType to, x86SSERegType from, int offset );
+
+#ifndef __x86_64__
+void SSE2EMU_MOVDQ2Q_XMM_to_MM( x86MMXRegType to, x86SSERegType from);
+void SSE2EMU_MOVQ2DQ_MM_to_XMM( x86SSERegType to, x86MMXRegType from);
+#endif
+
+/* SSE2 emulated functions for SSE CPU's by kekko*/
+
+void SSE2EMU_PSHUFD_XMM_to_XMM( x86SSERegType to, x86SSERegType from, u8 imm8 );
+void SSE2EMU_MOVD_XMM_to_R( x86IntRegType to, x86SSERegType from );
+void SSE2EMU_CVTPS2DQ_XMM_to_XMM( x86SSERegType to, x86SSERegType from );
+void SSE2EMU_CVTDQ2PS_M128_to_XMM( x86SSERegType to, uptr from );
+void SSE2EMU_MOVD_XMM_to_M32( uptr to, x86SSERegType from );
+void SSE2EMU_MOVD_R_to_XMM( x86SSERegType to, x86IntRegType from );
+
+////////////////////////////////////////////////////
+#ifdef _DEBUG
+#define WRITECHECK() CheckX86Ptr()
+#else
+#define WRITECHECK()
+#endif
+
+#define writeVAL(val) ({ \
+		WRITECHECK(); \
+		*(typeof(val)*)x86Ptr = (val); \
+		x86Ptr += sizeof(val); \
+		(void)0; \
+	})
+
+#define write8(val )  writeVAL((u8)(val))
+#define write16(val ) writeVAL((u16)(val))
+#define write32( val ) writeVAL((u32)(val))
+#define write64( val ) writeVAL((u64)(val))
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // __IX86_H__
diff --git a/libpcsxcore/ix86_64/ix86_3dnow.c b/libpcsxcore/ix86_64/ix86_3dnow.c
new file mode 100644
index 0000000..8fd4233
--- /dev/null
+++ b/libpcsxcore/ix86_64/ix86_3dnow.c
@@ -0,0 +1,178 @@
+// stop compiling if NORECBUILD build (only for Visual Studio)
+#if !(defined(_MSC_VER) && defined(PCSX2_NORECBUILD))
+
+#include "ix86-64.h"
+
+/**********************/
+/* 3DNOW instructions */
+/**********************/
+
+/* femms */
+void FEMMS( void ) 
+{
+	write16( 0x0E0F );
+}
+
+void PFCMPEQMtoR( x86IntRegType to, uptr from )
+{
+	MEMADDR_OP(0, VAROP2(0x0F, 0x0F), true, to, from, 1);
+	write8( 0xB0 );
+}
+
+void PFCMPGTMtoR( x86IntRegType to, uptr from )
+{
+	MEMADDR_OP(0, VAROP2(0x0F, 0x0F), true, to, from, 1);
+	write8( 0xA0 );
+}
+
+void PFCMPGEMtoR( x86IntRegType to, uptr from )
+{
+	MEMADDR_OP(0, VAROP2(0x0F, 0x0F), true, to, from, 1);
+	write8( 0x90 );
+}
+
+void PFADDMtoR( x86IntRegType to, uptr from )
+{
+	MEMADDR_OP(0, VAROP2(0x0F, 0x0F), true, to, from, 1);
+	write8( 0x9E );
+}
+
+void PFADDRtoR( x86IntRegType to, x86IntRegType from )
+{
+	RexRB(0, to, from);
+	write16( 0x0F0F );
+	ModRM( 3, to, from );
+	write8( 0x9E );
+}
+
+void PFSUBMtoR( x86IntRegType to, uptr from )
+{
+	MEMADDR_OP(0, VAROP2(0x0F, 0x0F), true, to, from, 1);
+	write8( 0x9A );
+}
+
+void PFSUBRtoR( x86IntRegType to, x86IntRegType from )
+{
+	RexRB(0, to, from);
+	write16( 0x0F0F );
+	ModRM( 3, to, from ); 
+	write8( 0x9A );
+}
+
+void PFMULMtoR( x86IntRegType to, uptr from )
+{
+	MEMADDR_OP(0, VAROP2(0x0F, 0x0F), true, to, from, 1);
+	write8( 0xB4 );
+}
+
+void PFMULRtoR( x86IntRegType to, x86IntRegType from )
+{
+	RexRB(0, to, from);
+	write16( 0x0F0F );
+	ModRM( 3, to, from ); 
+	write8( 0xB4 );
+}
+
+void PFRCPMtoR( x86IntRegType to, uptr from )
+{
+	MEMADDR_OP(0, VAROP2(0x0F, 0x0F), true, to, from, 1);
+	write8( 0x96 );
+}
+
+void PFRCPRtoR( x86IntRegType to, x86IntRegType from )
+{
+	RexRB(0, to, from);
+	write16( 0x0F0F );
+	ModRM( 3, to, from ); 
+	write8( 0x96 );
+}
+
+void PFRCPIT1RtoR( x86IntRegType to, x86IntRegType from )
+{
+	RexRB(0, to, from);
+	write16( 0x0F0F );
+	ModRM( 3, to, from ); 
+	write8( 0xA6 );
+}
+
+void PFRCPIT2RtoR( x86IntRegType to, x86IntRegType from )
+{
+	RexRB(0, to, from);
+	write16( 0x0F0F );
+	ModRM( 3, to, from ); 
+	write8( 0xB6 );
+}
+
+void PFRSQRTRtoR( x86IntRegType to, x86IntRegType from )
+{
+	RexRB(0, to, from);
+	write16( 0x0F0F );
+	ModRM( 3, to, from ); 
+	write8( 0x97 );
+}
+
+void PFRSQIT1RtoR( x86IntRegType to, x86IntRegType from )
+{
+	RexRB(0, to, from);
+	write16( 0x0F0F );
+	ModRM( 3, to, from ); 
+	write8( 0xA7 );
+}
+
+void PF2IDMtoR( x86IntRegType to, uptr from )
+{
+	MEMADDR_OP(0, VAROP2(0x0F, 0x0F), true, to, from, 1);
+	write8( 0x1D );
+}
+
+void PF2IDRtoR( x86IntRegType to, x86IntRegType from )
+{
+	RexRB(0, to, from);
+	write16( 0x0F0F );
+	ModRM( 3, to, from ); 
+	write8( 0x1D );
+}
+
+void PI2FDMtoR( x86IntRegType to, uptr from )
+{
+	MEMADDR_OP(0, VAROP2(0x0F, 0x0F), true, to, from, 1);
+	write8( 0x0D );
+}
+
+void PI2FDRtoR( x86IntRegType to, x86IntRegType from )
+{
+	RexRB(0, to, from);
+	write16( 0x0F0F );
+	ModRM( 3, to, from ); 
+	write8( 0x0D );
+}
+
+void PFMAXMtoR( x86IntRegType to, uptr from )
+{
+	MEMADDR_OP(0, VAROP2(0x0F, 0x0F), true, to, from, 1);
+	write8( 0xA4 );
+}
+
+void PFMAXRtoR( x86IntRegType to, x86IntRegType from )
+{
+	RexRB(0, to, from);
+	write16( 0x0F0F );
+	ModRM( 3, to, from ); 
+	write8( 0xA4 );
+}
+
+void PFMINMtoR( x86IntRegType to, uptr from )
+{
+	MEMADDR_OP(0, VAROP2(0x0F, 0x0F), true, to, from, 1);
+	write8( 0x94 );
+}
+
+void PFMINRtoR( x86IntRegType to, x86IntRegType from )
+{
+	RexRB(0, to, from);
+	write16( 0x0F0F );
+	ModRM( 3, to, from );
+	write8( 0x94 );
+}
+
+#endif
diff --git a/libpcsxcore/ix86_64/ix86_cpudetect.c b/libpcsxcore/ix86_64/ix86_cpudetect.c
new file mode 100644
index 0000000..3c014d8
--- /dev/null
+++ b/libpcsxcore/ix86_64/ix86_cpudetect.c
@@ -0,0 +1,487 @@
+/*  Cpudetection lib 
+ *  Copyright (C) 2002-2003  Pcsx2 Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA
+ */
+#if defined (_WIN32)
+#include <windows.h>
+#endif
+
+#include <string.h>
+#include <stdio.h>
+
+#include "ix86-64.h"
+
+#if defined (_MSC_VER) && _MSC_VER >= 1400
+
+   void __cpuid(int* CPUInfo, int InfoType);
+   unsigned __int64 __rdtsc();
+
+   #pragma intrinsic(__cpuid)
+   #pragma intrinsic(__rdtsc)
+
+#endif
+
+CAPABILITIES cpucaps;
+CPUINFO cpuinfo;
+
+#define cpuid(cmd,a,b,c,d) \
+  __asm__ __volatile__("cpuid" \
+		: "=a" (a), "=b" (b), "=c" (c), "=d" (d)  : "0" (cmd))
+
+static s32 iCpuId( u32 cmd, u32 *regs ) 
+{
+   int flag=1;
+
+#if defined (_MSC_VER) && _MSC_VER >= 1400
+
+   __cpuid( regs, cmd );
+
+   return 0;
+
+#elif defined (_MSC_VER) 
+
+#ifdef __x86_64__
+   assert(0);
+#else // __x86_64__
+   __asm 
+   {
+      push ebx;
+      push edi;
+
+      pushfd;
+      pop eax;
+      mov edx, eax;
+      xor eax, 1 << 21;
+      push eax;
+      popfd;
+      pushfd;
+      pop eax;
+      xor eax, edx;
+      mov flag, eax;
+   }
+   if ( ! flag )
+   {
+      return -1;
+   }
+
+   __asm 
+   {
+      mov eax, cmd;
+      cpuid;
+      mov edi, [regs]
+      mov [edi], eax;
+      mov [edi+4], ebx;
+      mov [edi+8], ecx;
+      mov [edi+12], edx;
+
+      pop edi;
+      pop ebx;
+   }
+#endif // __x86_64__
+   return 0;
+
+
+#else
+
+#ifndef __x86_64__
+   // see if we can use cpuid
+   __asm__ __volatile__ (
+      "sub $0x18, %%esp\n"
+      "pushf\n"
+      "pop %%eax\n"
+      "mov %%eax, %%edx\n"
+      "xor $0x200000, %%eax\n"
+      "push %%eax\n"
+      "popf\n"
+      "pushf\n"
+      "pop %%eax\n"
+      "xor %%edx, %%eax\n"
+      "mov %%eax, %0\n"
+	  "add $0x18, %%esp\n"
+      : "=r"(flag) :
+   );
+#endif
+
+   if ( !flag )
+       return -1;
+
+   cpuid(cmd, regs[0], regs[1], regs[2], regs[3]);
+   return 0;
+#endif // _MSC_VER
+}
+
+u64 GetCPUTick( void ) 
+{
+#if defined (_MSC_VER) && _MSC_VER >= 1400
+
+   return __rdtsc();
+
+#elif defined(__MSCW32__) && !defined(__x86_64__)
+
+   __asm rdtsc;
+
+#else
+
+   u32 _a, _d;
+	__asm__ __volatile__ ("rdtsc" : "=a"(_a), "=d"(_d));
+	return (u64)_a | ((u64)_d << 32);
+
+#endif
+}
+
+#if defined __LINUX__
+
+#include <sys/time.h>
+#include <errno.h>
+//*
+unsigned long timeGetTime2()
+{
+ struct timeval tv;
+ gettimeofday(&tv, 0);                                 // well, maybe there are better ways
+ return (unsigned long)tv.tv_sec * 1000 + tv.tv_usec/1000;            // to do that, but at least it works
+}
+//*/
+#endif
+
+s64 CPUSpeedHz( unsigned int time )
+{
+   s64 timeStart, 
+            timeStop;
+   s64 startTick, 
+            endTick;
+   s64 overhead;
+
+   if( ! cpucaps.hasTimeStampCounter )
+   {
+      return 0; //check if function is supported
+   }
+
+	overhead = GetCPUTick() - GetCPUTick();
+	
+	timeStart = timeGetTime2( );
+	while( timeGetTime2( ) == timeStart ) 
+   {
+      timeStart = timeGetTime2( );
+   }
+	for(;;)
+	{
+		timeStop = timeGetTime2( );
+		if ( ( timeStop - timeStart ) > 1 )	
+		{
+			startTick = GetCPUTick( );
+			break;
+		}
+	}
+
+	timeStart = timeStop;
+	for(;;)
+	{
+		timeStop = timeGetTime2( );
+		if ( ( timeStop - timeStart ) > time )	
+		{
+			endTick = GetCPUTick( );
+			break;
+		}
+	}
+
+	return (s64)( ( endTick - startTick ) + ( overhead ) );
+}
+
+////////////////////////////////////////////////////
+void cpudetectInit( void ) 
+{
+   u32 regs[ 4 ];
+   u32 cmds;
+   u32 AMDspeed;
+   s8 AMDspeedString[10];
+   int cputype=0;            // Cpu type
+   //AMD 64 STUFF
+   u32 x86_64_8BITBRANDID;
+   u32 x86_64_12BITBRANDID; 
+   memset( cpuinfo.x86ID, 0, sizeof( cpuinfo.x86ID ) );
+   cpuinfo.x86Family = 0;
+   cpuinfo.x86Model  = 0;
+   cpuinfo.x86PType  = 0;
+   cpuinfo.x86StepID = 0;
+   cpuinfo.x86Flags  = 0;
+   cpuinfo.x86EFlags = 0;
+   
+   if ( iCpuId( 0, regs ) == -1 ) return;
+
+   cmds = regs[ 0 ];
+   ((u32*)cpuinfo.x86ID)[ 0 ] = regs[ 1 ];
+   ((u32*)cpuinfo.x86ID)[ 1 ] = regs[ 3 ];
+   ((u32*)cpuinfo.x86ID)[ 2 ] = regs[ 2 ];
+   if ( cmds >= 0x00000001 ) 
+   {
+      if ( iCpuId( 0x00000001, regs ) != -1 )
+      {
+         cpuinfo.x86StepID =  regs[ 0 ]        & 0xf;
+         cpuinfo.x86Model  = (regs[ 0 ] >>  4) & 0xf;
+         cpuinfo.x86Family = (regs[ 0 ] >>  8) & 0xf;
+         cpuinfo.x86PType  = (regs[ 0 ] >> 12) & 0x3;
+         x86_64_8BITBRANDID = regs[1] & 0xff;
+         cpuinfo.x86Flags  =  regs[ 3 ];
+      }
+   }
+   if ( iCpuId( 0x80000000, regs ) != -1 )
+   {
+      cmds = regs[ 0 ];
+      if ( cmds >= 0x80000001 ) 
+      {
+		 if ( iCpuId( 0x80000001, regs ) != -1 )
+         {
+			x86_64_12BITBRANDID = regs[1] & 0xfff;
+            cpuinfo.x86EFlags = regs[ 3 ];
+            
+         }
+      }
+   }
+   switch(cpuinfo.x86PType)
+   {
+      case 0:
+         strcpy( cpuinfo.x86Type, "Standard OEM");
+         break;
+      case 1:
+         strcpy( cpuinfo.x86Type, "Overdrive");
+         break;
+      case 2:
+         strcpy( cpuinfo.x86Type, "Dual");
+         break;
+      case 3:
+         strcpy( cpuinfo.x86Type, "Reserved");
+         break;
+      default:
+         strcpy( cpuinfo.x86Type, "Unknown");
+         break;
+   }
+   if ( cpuinfo.x86ID[ 0 ] == 'G' ){ cputype=0;}//trick lines but if you know a way better ;p
+   if ( cpuinfo.x86ID[ 0 ] == 'A' ){ cputype=1;}
+   
+   if ( cputype == 0 ) //intel cpu
+   {
+      if( ( cpuinfo.x86Family >= 7 ) && ( cpuinfo.x86Family < 15 ) )
+      {
+         strcpy( cpuinfo.x86Fam, "Intel P6 family (Not PIV and Higher then PPro" );
+      }
+      else
+      {
+         switch( cpuinfo.x86Family )
+         {     
+            // Start at 486 because if it's below 486 there is no cpuid instruction
+            case 4:
+               strcpy( cpuinfo.x86Fam, "Intel 486" );
+               break;
+            case 5:     
+               switch( cpuinfo.x86Model )
+               {
+               case 4:
+               case 8:     // 0.25 �m
+                  strcpy( cpuinfo.x86Fam, "Intel Pentium (MMX)");
+                  break;
+               default:
+                  strcpy( cpuinfo.x86Fam, "Intel Pentium" );
+               }
+               break;
+            case 6:     
+               switch( cpuinfo.x86Model )
+               {
+               case 0:     // Pentium pro (P6 A-Step)
+               case 1:     // Pentium pro
+                  strcpy( cpuinfo.x86Fam, "Intel Pentium Pro" );
+                  break;
+
+               case 2:     // 66 MHz FSB
+               case 5:     // Xeon/Celeron (0.25 �m)
+               case 6:     // Internal L2 cache
+                  strcpy( cpuinfo.x86Fam, "Intel Pentium II" );
+                  break;
+
+               case 7:     // Xeon external L2 cache
+               case 8:     // Xeon/Celeron with 256 KB on-die L2 cache
+               case 10:    // Xeon/Celeron with 1 or 2 MB on-die L2 cache
+               case 11:    // Xeon/Celeron with Tualatin core, on-die cache
+                  strcpy( cpuinfo.x86Fam, "Intel Pentium III" );
+                  break;
+			   case 15:    // Core 2 Duo Allendale/Conroe
+				  strcpy( cpuinfo.x86Fam, "Intel Core 2 Duo" );
+				  break;
+
+               default:
+                  strcpy( cpuinfo.x86Fam, "Intel Pentium Pro (Unknown)" );
+               }
+               break;
+            case 15:
+               switch( cpuinfo.x86Model )
+               {
+               case 0:     // Willamette (A-Step)
+               case 1:     // Willamette 
+                  strcpy( cpuinfo.x86Fam, "Willamette Intel Pentium IV" );
+                  break;
+               case 2:     // Northwood 
+                  strcpy( cpuinfo.x86Fam, "Northwood Intel Pentium IV" );
+                  break;
+
+               default:
+                  strcpy( cpuinfo.x86Fam, "Intel Pentium IV (Unknown)" );
+                  break;
+               }
+               break;
+            default:
+               strcpy( cpuinfo.x86Fam, "Unknown Intel CPU" );
+         }
+      }
+   }
+   else if ( cputype == 1 ) //AMD cpu
+   {
+      if( cpuinfo.x86Family >= 7 )
+      {
+		  if((x86_64_12BITBRANDID !=0) || (x86_64_8BITBRANDID !=0))
+		  {
+		    if(x86_64_8BITBRANDID == 0 )
+		    {
+               switch((x86_64_12BITBRANDID >>6)& 0x3f)
+			   {
+			    case 4:
+				 strcpy(cpuinfo.x86Fam,"AMD Athlon(tm) 64 Processor");
+                 AMDspeed = 22 + (x86_64_12BITBRANDID & 0x1f);
+				 //AMDspeedString = strtol(AMDspeed, (char**)NULL,10);
+				 sprintf(AMDspeedString," %d",AMDspeed);
+				 strcat(AMDspeedString,"00+");
+				 strcat(cpuinfo.x86Fam,AMDspeedString);
+				 break;
+			    case 12: 
+				 strcpy(cpuinfo.x86Fam,"AMD Opteron(tm) Processor");
+				 break;
+			    case 5:
+				  strcpy( cpuinfo.x86Fam, "AMD Athlon X2 Processor" );
+				  AMDspeed = 22 + (x86_64_12BITBRANDID & 0x1f);
+				 //AMDspeedString = strtol(AMDspeed, (char**)NULL,10);
+				 sprintf(AMDspeedString," %d",AMDspeed);
+				 strcat(AMDspeedString,"00+");
+				 strcat(cpuinfo.x86Fam,AMDspeedString);
+                  break;
+			   case 44:
+				   strcpy( cpuinfo.x86Fam, "AMD Opteron(tm) Dual Core Processor" );
+                  break;
+			    default:
+				   strcpy(cpuinfo.x86Fam,"Unknown AMD 64 proccesor");
+				   
+			    }
+		     }
+		     else //8bit brand id is non zero
+		     {
+                strcpy(cpuinfo.x86Fam,"Unsupported yet AMD64 cpu");
+		     }
+		  }
+		  else
+		  {		 
+			  strcpy( cpuinfo.x86Fam, "AMD K7+ Processor" );
+		  }
+      }
+      else
+      {
+         switch ( cpuinfo.x86Family )
+         {
+            case 4:
+               switch( cpuinfo.x86Model )
+               {
+               case 14: 
+               case 15:       // Write-back enhanced
+                  strcpy( cpuinfo.x86Fam, "AMD 5x86 Processor" );
+                  break;
+
+               case 3:        // DX2
+               case 7:        // Write-back enhanced DX2
+               case 8:        // DX4
+               case 9:        // Write-back enhanced DX4
+                  strcpy( cpuinfo.x86Fam, "AMD 486 Processor" );
+                  break;
+			   			   
+
+               default:
+                  strcpy( cpuinfo.x86Fam, "AMD Unknown Processor" );
+
+               }
+               break;
+
+            case 5:     
+               switch( cpuinfo.x86Model)
+               {
+               case 0:     // SSA 5 (75, 90 and 100 Mhz)
+               case 1:     // 5k86 (PR 120 and 133 MHz)
+               case 2:     // 5k86 (PR 166 MHz)
+               case 3:     // K5 5k86 (PR 200 MHz)
+                  strcpy( cpuinfo.x86Fam, "AMD K5 Processor" );
+                  break;
+
+               case 6:     
+               case 7:     // (0.25 �m)
+               case 8:     // K6-2
+               case 9:     // K6-III
+               case 14:    // K6-2+ / K6-III+
+                  strcpy( cpuinfo.x86Fam, "AMD K6 Series Processor" );
+                  break;
+
+               default:
+                  strcpy( cpuinfo.x86Fam, "AMD Unknown Processor" );
+               }
+               break;
+            case 6:     
+               strcpy( cpuinfo.x86Fam, "AMD Athlon XP Processor" );
+               break;
+            default:
+               strcpy( cpuinfo.x86Fam, "Unknown AMD CPU" ); 
+         }
+      }
+   }
+   //capabilities
+   cpucaps.hasFloatingPointUnit                         = ( cpuinfo.x86Flags >>  0 ) & 1;
+   cpucaps.hasVirtual8086ModeEnhancements               = ( cpuinfo.x86Flags >>  1 ) & 1;
+   cpucaps.hasDebuggingExtensions                       = ( cpuinfo.x86Flags >>  2 ) & 1;
+   cpucaps.hasPageSizeExtensions                        = ( cpuinfo.x86Flags >>  3 ) & 1;
+   cpucaps.hasTimeStampCounter                          = ( cpuinfo.x86Flags >>  4 ) & 1;
+   cpucaps.hasModelSpecificRegisters                    = ( cpuinfo.x86Flags >>  5 ) & 1;
+   cpucaps.hasPhysicalAddressExtension                  = ( cpuinfo.x86Flags >>  6 ) & 1;
+   cpucaps.hasMachineCheckArchitecture                  = ( cpuinfo.x86Flags >>  7 ) & 1;
+   cpucaps.hasCOMPXCHG8BInstruction                     = ( cpuinfo.x86Flags >>  8 ) & 1;
+   cpucaps.hasAdvancedProgrammableInterruptController   = ( cpuinfo.x86Flags >>  9 ) & 1;
+   cpucaps.hasSEPFastSystemCall                         = ( cpuinfo.x86Flags >> 11 ) & 1;
+   cpucaps.hasMemoryTypeRangeRegisters                  = ( cpuinfo.x86Flags >> 12 ) & 1;
+   cpucaps.hasPTEGlobalFlag                             = ( cpuinfo.x86Flags >> 13 ) & 1;
+   cpucaps.hasMachineCheckArchitecture                  = ( cpuinfo.x86Flags >> 14 ) & 1;
+   cpucaps.hasConditionalMoveAndCompareInstructions     = ( cpuinfo.x86Flags >> 15 ) & 1;
+   cpucaps.hasFGPageAttributeTable                      = ( cpuinfo.x86Flags >> 16 ) & 1;
+   cpucaps.has36bitPageSizeExtension                    = ( cpuinfo.x86Flags >> 17 ) & 1;
+   cpucaps.hasProcessorSerialNumber                     = ( cpuinfo.x86Flags >> 18 ) & 1;
+   cpucaps.hasCFLUSHInstruction                         = ( cpuinfo.x86Flags >> 19 ) & 1;
+   cpucaps.hasDebugStore                                = ( cpuinfo.x86Flags >> 21 ) & 1;
+   cpucaps.hasACPIThermalMonitorAndClockControl         = ( cpuinfo.x86Flags >> 22 ) & 1;
+   cpucaps.hasMultimediaExtensions                      = ( cpuinfo.x86Flags >> 23 ) & 1; //mmx
+   cpucaps.hasFastStreamingSIMDExtensionsSaveRestore    = ( cpuinfo.x86Flags >> 24 ) & 1;
+   cpucaps.hasStreamingSIMDExtensions                   = ( cpuinfo.x86Flags >> 25 ) & 1; //sse
+   cpucaps.hasStreamingSIMD2Extensions                  = ( cpuinfo.x86Flags >> 26 ) & 1; //sse2
+   cpucaps.hasSelfSnoop                                 = ( cpuinfo.x86Flags >> 27 ) & 1;
+   cpucaps.hasHyperThreading                            = ( cpuinfo.x86Flags >> 28 ) & 1;
+   cpucaps.hasThermalMonitor                            = ( cpuinfo.x86Flags >> 29 ) & 1;
+   cpucaps.hasIntel64BitArchitecture                    = ( cpuinfo.x86Flags >> 30 ) & 1;
+    //that is only for AMDs
+   cpucaps.hasMultimediaExtensionsExt                   = ( cpuinfo.x86EFlags >> 22 ) & 1; //mmx2
+   cpucaps.hasAMD64BitArchitecture                      = ( cpuinfo.x86EFlags >> 29 ) & 1; //64bit cpu
+   cpucaps.has3DNOWInstructionExtensionsExt             = ( cpuinfo.x86EFlags >> 30 ) & 1; //3dnow+
+   cpucaps.has3DNOWInstructionExtensions                = ( cpuinfo.x86EFlags >> 31 ) & 1; //3dnow   
+   cpuinfo.cpuspeed = (u32 )(CPUSpeedHz( 1000 ) / 1000000);
+}
diff --git a/libpcsxcore/ix86_64/ix86_fpu.c b/libpcsxcore/ix86_64/ix86_fpu.c
new file mode 100644
index 0000000..ca49eb7
--- /dev/null
+++ b/libpcsxcore/ix86_64/ix86_fpu.c
@@ -0,0 +1,248 @@
+// stop compiling if NORECBUILD build (only for Visual Studio)
+#if !(defined(_MSC_VER) && defined(PCSX2_NORECBUILD))
+
+#include <stdio.h>
+#include <string.h>
+#include "ix86-64.h"
+
+/********************/
+/* FPU instructions */
+/********************/
+
+/* fild m32 to fpu reg stack */
+void FILD32( uptr from )
+{
+	MEMADDR_OP(0, VAROP1(0xDB), false, 0, from, 0);
+}
+
+/* fistp m32 from fpu reg stack */
+void FISTP32( uptr from ) 
+{
+	MEMADDR_OP(0, VAROP1(0xDB), false, 3, from, 0);
+}
+
+/* fld m32 to fpu reg stack */
+void FLD32( uptr from )
+{
+	MEMADDR_OP(0, VAROP1(0xD9), false, 0, from, 0);
+}
+
+// fld st(i)
+void FLD(int st) { write16(0xc0d9+(st<<8)); }
+
+void FLD1() { write16(0xe8d9); }
+void FLDL2E() { write16(0xead9); }
+
+/* fst m32 from fpu reg stack */
+void FST32( uptr to ) 
+{
+	MEMADDR_OP(0, VAROP1(0xD9), false, 2, to, 0);
+}
+
+/* fstp m32 from fpu reg stack */
+void FSTP32( uptr to )
+{
+	MEMADDR_OP(0, VAROP1(0xD9), false, 3, to, 0);
+}
+
+// fstp st(i)
+void FSTP(int st) { write16(0xd8dd+(st<<8)); }
+
+/* fldcw fpu control word from m16 */
+void FLDCW( uptr from )
+{
+	MEMADDR_OP(0, VAROP1(0xD9), false, 5, from, 0);
+}
+
+/* fnstcw fpu control word to m16 */
+void FNSTCW( uptr to ) 
+{
+	MEMADDR_OP(0, VAROP1(0xD9), false, 7, to, 0);
+}
+
+void FNSTSWtoAX( void ) 
+{
+	write16( 0xE0DF );
+}
+
+void FXAM()
+{
+	write16(0xe5d9);
+}
+
+void FDECSTP() { write16(0xf6d9); }
+void FRNDINT() { write16(0xfcd9); }
+void FXCH(int st) { write16(0xc8d9+(st<<8)); }
+void F2XM1() { write16(0xf0d9); }
+void FSCALE() { write16(0xfdd9); }
+
+/* fadd ST(src) to fpu reg stack ST(0) */
+void FADD32Rto0( x86IntRegType src )
+{
+   write8( 0xD8 );
+   write8( 0xC0 + src );
+}
+
+/* fadd ST(0) to fpu reg stack ST(src) */
+void FADD320toR( x86IntRegType src )
+{
+   write8( 0xDC );
+   write8( 0xC0 + src );
+}
+
+/* fsub ST(src) to fpu reg stack ST(0) */
+void FSUB32Rto0( x86IntRegType src )
+{
+   write8( 0xD8 );
+   write8( 0xE0 + src );
+}
+
+/* fsub ST(0) to fpu reg stack ST(src) */
+void FSUB320toR( x86IntRegType src )
+{
+   write8( 0xDC );
+   write8( 0xE8 + src );
+}
+
+/* fsubp -> substract ST(0) from ST(1), store in ST(1) and POP stack */
+void FSUBP( void )
+{
+   write8( 0xDE );
+   write8( 0xE9 );
+}
+
+/* fmul ST(src) to fpu reg stack ST(0) */
+void FMUL32Rto0( x86IntRegType src )
+{
+   write8( 0xD8 );
+   write8( 0xC8 + src );
+}
+
+/* fmul ST(0) to fpu reg stack ST(src) */
+void FMUL320toR( x86IntRegType src )
+{
+   write8( 0xDC );
+   write8( 0xC8 + src );
+}
+
+/* fdiv ST(src) to fpu reg stack ST(0) */
+void FDIV32Rto0( x86IntRegType src )
+{
+   write8( 0xD8 );
+   write8( 0xF0 + src );
+}
+
+/* fdiv ST(0) to fpu reg stack ST(src) */
+void FDIV320toR( x86IntRegType src )
+{
+   write8( 0xDC );
+   write8( 0xF8 + src );
+}
+
+void FDIV320toRP( x86IntRegType src )
+{
+	write8( 0xDE );
+	write8( 0xF8 + src );
+}
+
+/* fadd m32 to fpu reg stack */
+void FADD32( uptr from ) 
+{
+	MEMADDR_OP(0, VAROP1(0xD8), false, 0, from, 0);
+}
+
+/* fsub m32 to fpu reg stack */
+void FSUB32( uptr from ) 
+{
+	MEMADDR_OP(0, VAROP1(0xD8), false, 4, from, 0);
+}
+
+/* fmul m32 to fpu reg stack */
+void FMUL32( uptr from )
+{
+	MEMADDR_OP(0, VAROP1(0xD8), false, 1, from, 0);
+}
+
+/* fdiv m32 to fpu reg stack */
+void FDIV32( uptr from ) 
+{
+	MEMADDR_OP(0, VAROP1(0xD8), false, 6, from, 0);
+}
+
+/* fabs fpu reg stack */
+void FABS( void )
+{
+	write16( 0xE1D9 );
+}
+
+/* fsqrt fpu reg stack */
+void FSQRT( void ) 
+{
+	write16( 0xFAD9 );
+}
+
+void FPATAN(void) { write16(0xf3d9); }
+void FSIN(void) { write16(0xfed9); }
+
+/* fchs fpu reg stack */
+void FCHS( void ) 
+{
+	write16( 0xE0D9 );
+}
+
+/* fcomi st, st(i) */
+void FCOMI( x86IntRegType src )
+{
+	write8( 0xDB );
+	write8( 0xF0 + src ); 
+}
+
+/* fcomip st, st(i) */
+void FCOMIP( x86IntRegType src )
+{
+	write8( 0xDF );
+	write8( 0xF0 + src ); 
+}
+
+/* fucomi st, st(i) */
+void FUCOMI( x86IntRegType src )
+{
+	write8( 0xDB );
+	write8( 0xE8 + src ); 
+}
+
+/* fucomip st, st(i) */
+void FUCOMIP( x86IntRegType src )
+{
+	write8( 0xDF );
+	write8( 0xE8 + src ); 
+}
+
+/* fcom m32 to fpu reg stack */
+void FCOM32( uptr from ) 
+{
+	MEMADDR_OP(0, VAROP1(0xD8), false, 2, from, 0);
+}
+
+/* fcomp m32 to fpu reg stack */
+void FCOMP32( uptr from )
+{
+	MEMADDR_OP(0, VAROP1(0xD8), false, 3, from, 0);
+}
+
+#define FCMOV32( low, high ) \
+   { \
+	   write8( low ); \
+	   write8( high + from );  \
+   }
+
+void FCMOVB32( x86IntRegType from )     { FCMOV32( 0xDA, 0xC0 ); }
+void FCMOVE32( x86IntRegType from )     { FCMOV32( 0xDA, 0xC8 ); }
+void FCMOVBE32( x86IntRegType from )    { FCMOV32( 0xDA, 0xD0 ); }
+void FCMOVU32( x86IntRegType from )     { FCMOV32( 0xDA, 0xD8 ); }
+void FCMOVNB32( x86IntRegType from )    { FCMOV32( 0xDB, 0xC0 ); }
+void FCMOVNE32( x86IntRegType from )    { FCMOV32( 0xDB, 0xC8 ); }
+void FCMOVNBE32( x86IntRegType from )   { FCMOV32( 0xDB, 0xD0 ); }
+void FCMOVNU32( x86IntRegType from )    { FCMOV32( 0xDB, 0xD8 ); }
+
+#endif
diff --git a/libpcsxcore/ix86_64/ix86_mmx.c b/libpcsxcore/ix86_64/ix86_mmx.c
new file mode 100644
index 0000000..eddbbfc
--- /dev/null
+++ b/libpcsxcore/ix86_64/ix86_mmx.c
@@ -0,0 +1,646 @@
+// stop compiling if NORECBUILD build (only for Visual Studio)
+#if !(defined(_MSC_VER) && defined(PCSX2_NORECBUILD))
+
+#include "ix86-64.h"
+
+#include <assert.h>
+
+/********************/
+/* MMX instructions */
+/********************/
+
+// r64 = mm
+
+/* movq m64 to r64 */
+void MOVQMtoR( x86MMXRegType to, uptr from )
+{
+	MEMADDR_OP(0, VAROP2(0x0F, 0x6F), true, to, from, 0);
+}
+
+/* movq r64 to m64 */
+void MOVQRtoM( uptr to, x86MMXRegType from ) 
+{
+	MEMADDR_OP(0, VAROP2(0x0F, 0x7F), true, from, to, 0);
+}
+
+/* pand r64 to r64 */
+void PANDRtoR( x86MMXRegType to, x86MMXRegType from ) 
+{
+	RexRB(0, to, from);
+	write16( 0xDB0F );
+	ModRM( 3, to, from ); 
+}
+
+void PANDNRtoR( x86MMXRegType to, x86MMXRegType from )
+{
+	RexRB(0, to, from);
+	write16( 0xDF0F );
+	ModRM( 3, to, from ); 
+}
+
+/* por r64 to r64 */
+void PORRtoR( x86MMXRegType to, x86MMXRegType from ) 
+{
+	RexRB(0, to, from);
+	write16( 0xEB0F );
+	ModRM( 3, to, from ); 
+}
+
+/* pxor r64 to r64 */
+void PXORRtoR( x86MMXRegType to, x86MMXRegType from ) 
+{
+	RexRB(0, to, from);
+	write16( 0xEF0F );
+	ModRM( 3, to, from ); 
+}
+
+/* psllq r64 to r64 */
+void PSLLQRtoR( x86MMXRegType to, x86MMXRegType from ) 
+{
+	RexRB(0, to, from);
+	write16( 0xF30F );
+	ModRM( 3, to, from ); 
+}
+
+/* psllq m64 to r64 */
+void PSLLQMtoR( x86MMXRegType to, uptr from ) 
+{
+	MEMADDR_OP(0, VAROP2(0x0F, 0xF3), true, to, from, 0);
+}
+
+/* psllq imm8 to r64 */
+void PSLLQItoR( x86MMXRegType to, u8 from ) 
+{
+	RexB(0, to);
+	write16( 0x730F ); 
+	ModRM( 3, 6, to); 
+	write8( from ); 
+}
+
+/* psrlq r64 to r64 */
+void PSRLQRtoR( x86MMXRegType to, x86MMXRegType from ) 
+{
+	RexRB(0, to, from);
+	write16( 0xD30F ); 
+	ModRM( 3, to, from ); 
+}
+
+/* psrlq m64 to r64 */
+void PSRLQMtoR( x86MMXRegType to, uptr from ) 
+{
+	MEMADDR_OP(0, VAROP2(0x0F, 0xD3), true, to, from, 0);
+}
+
+/* psrlq imm8 to r64 */
+void PSRLQItoR( x86MMXRegType to, u8 from ) 
+{
+	RexB(0, to);
+	write16( 0x730F );
+	ModRM( 3, 2, to); 
+	write8( from ); 
+}
+
+/* paddusb r64 to r64 */
+void PADDUSBRtoR( x86MMXRegType to, x86MMXRegType from ) 
+{
+	RexRB(0, to, from);
+	write16( 0xDC0F ); 
+	ModRM( 3, to, from ); 
+}
+
+/* paddusb m64 to r64 */
+void PADDUSBMtoR( x86MMXRegType to, uptr from ) 
+{
+	MEMADDR_OP(0, VAROP2(0x0F, 0xDC), true, to, from, 0);
+}
+
+/* paddusw r64 to r64 */
+void PADDUSWRtoR( x86MMXRegType to, x86MMXRegType from ) 
+{
+	RexRB(0, to, from);
+	write16( 0xDD0F ); 
+	ModRM( 3, to, from ); 
+}
+
+/* paddusw m64 to r64 */
+void PADDUSWMtoR( x86MMXRegType to, uptr from ) 
+{
+	MEMADDR_OP(0, VAROP2(0x0F, 0xDD), true, to, from, 0);
+}
+
+/* paddb r64 to r64 */
+void PADDBRtoR( x86MMXRegType to, x86MMXRegType from ) 
+{
+	RexRB(0, to, from);
+	write16( 0xFC0F ); 
+	ModRM( 3, to, from ); 
+}
+
+/* paddb m64 to r64 */
+void PADDBMtoR( x86MMXRegType to, uptr from ) 
+{
+	MEMADDR_OP(0, VAROP2(0x0F, 0xFC), true, to, from, 0);
+}
+
+/* paddw r64 to r64 */
+void PADDWRtoR( x86MMXRegType to, x86MMXRegType from ) 
+{
+	RexRB(0, to, from);
+	write16( 0xFD0F ); 
+	ModRM( 3, to, from ); 
+}
+
+/* paddw m64 to r64 */
+void PADDWMtoR( x86MMXRegType to, uptr from ) 
+{
+	MEMADDR_OP(0, VAROP2(0x0F, 0xFD), true, to, from, 0);
+}
+
+/* paddd r64 to r64 */
+void PADDDRtoR( x86MMXRegType to, x86MMXRegType from ) 
+{
+	RexRB(0, to, from);
+	write16( 0xFE0F ); 
+	ModRM( 3, to, from ); 
+}
+
+/* paddd m64 to r64 */
+void PADDDMtoR( x86MMXRegType to, uptr from ) 
+{
+	MEMADDR_OP(0, VAROP2(0x0F, 0xFE), true, to, from, 0);
+}
+
+/* emms */
+void EMMS( void ) 
+{
+	write16( 0x770F );
+}
+
+void PADDSBRtoR( x86MMXRegType to, x86MMXRegType from ) 
+{
+	RexRB(0, to, from);
+	write16( 0xEC0F ); 
+	ModRM( 3, to, from ); 
+}
+
+void PADDSWRtoR( x86MMXRegType to, x86MMXRegType from ) 
+{
+	RexRB(0, to, from);
+	write16( 0xED0F );
+	ModRM( 3, to, from ); 
+}
+
+// paddq m64 to r64 (sse2 only?)
+void PADDQMtoR( x86MMXRegType to, uptr from )
+{
+	MEMADDR_OP(0, VAROP2(0x0F, 0xD4), true, to, from, 0);
+}
+
+// paddq r64 to r64 (sse2 only?)
+void PADDQRtoR( x86MMXRegType to, x86MMXRegType from )
+{
+	RexRB(0, to, from);
+	write16( 0xD40F ); 
+	ModRM( 3, to, from ); 
+}
+
+void PSUBSBRtoR( x86MMXRegType to, x86MMXRegType from ) 
+{
+	RexRB(0, to, from);
+	write16( 0xE80F ); 
+	ModRM( 3, to, from ); 
+}
+
+void PSUBSWRtoR( x86MMXRegType to, x86MMXRegType from ) 
+{
+	RexRB(0, to, from);
+	write16( 0xE90F );
+	ModRM( 3, to, from ); 
+}
+
+
+void PSUBBRtoR( x86MMXRegType to, x86MMXRegType from ) 
+{
+	RexRB(0, to, from);
+	write16( 0xF80F ); 
+	ModRM( 3, to, from ); 
+}
+
+void PSUBWRtoR( x86MMXRegType to, x86MMXRegType from ) 
+{
+	RexRB(0, to, from);
+	write16( 0xF90F ); 
+	ModRM( 3, to, from ); 
+}
+
+void PSUBDRtoR( x86MMXRegType to, x86MMXRegType from ) 
+{
+	RexRB(0, to, from);
+	write16( 0xFA0F ); 
+	ModRM( 3, to, from ); 
+}
+
+void PSUBDMtoR( x86MMXRegType to, uptr from )
+{
+	MEMADDR_OP(0, VAROP2(0x0F, 0xFA), true, to, from, 0);
+}
+
+void PSUBUSBRtoR( x86MMXRegType to, x86MMXRegType from ) 
+{
+	RexRB(0, to, from);
+	write16( 0xD80F ); 
+	ModRM( 3, to, from ); 
+}
+
+void PSUBUSWRtoR( x86MMXRegType to, x86MMXRegType from ) 
+{
+	RexRB(0, to, from);
+	write16( 0xD90F ); 
+	ModRM( 3, to, from ); 
+}
+
+// psubq m64 to r64 (sse2 only?)
+void PSUBQMtoR( x86MMXRegType to, uptr from )
+{
+	MEMADDR_OP(0, VAROP2(0x0F, 0xFB), true, to, from, 0);
+}
+
+// psubq r64 to r64 (sse2 only?)
+void PSUBQRtoR( x86MMXRegType to, x86MMXRegType from )
+{
+	RexRB(0, to, from);
+	write16( 0xFB0F ); 
+	ModRM( 3, to, from ); 
+}
+
+// pmuludq m64 to r64 (sse2 only?)
+void PMULUDQMtoR( x86MMXRegType to, uptr from )
+{
+	MEMADDR_OP(0, VAROP2(0x0F, 0xF4), true, to, from, 0);
+}
+
+// pmuludq r64 to r64 (sse2 only?)
+void PMULUDQRtoR( x86MMXRegType to, x86MMXRegType from )
+{
+	RexRB(0, to, from);
+	write16( 0xF40F ); 
+	ModRM( 3, to, from ); 
+}
+
+void PCMPEQBRtoR( x86MMXRegType to, x86MMXRegType from )
+{
+	RexRB(0, to, from);
+	write16( 0x740F ); 
+	ModRM( 3, to, from ); 
+}
+
+void PCMPEQWRtoR( x86MMXRegType to, x86MMXRegType from )
+{
+	RexRB(0, to, from);
+	write16( 0x750F ); 
+	ModRM( 3, to, from ); 
+}
+
+void PCMPEQDRtoR( x86MMXRegType to, x86MMXRegType from )
+{
+	RexRB(0, to, from);
+	write16( 0x760F ); 
+	ModRM( 3, to, from ); 
+}
+
+void PCMPEQDMtoR( x86MMXRegType to, uptr from )
+{
+	MEMADDR_OP(0, VAROP2(0x0F, 0x76), true, to, from, 0);
+}
+
+void PCMPGTBRtoR( x86MMXRegType to, x86MMXRegType from )
+{
+	RexRB(0, to, from);
+	write16( 0x640F ); 
+	ModRM( 3, to, from ); 
+}
+
+void PCMPGTWRtoR( x86MMXRegType to, x86MMXRegType from )
+{
+	RexRB(0, to, from);
+	write16( 0x650F ); 
+	ModRM( 3, to, from ); 
+}
+
+void PCMPGTDRtoR( x86MMXRegType to, x86MMXRegType from )
+{
+	RexRB(0, to, from);
+	write16( 0x660F ); 
+	ModRM( 3, to, from ); 
+}
+
+void PCMPGTDMtoR( x86MMXRegType to, uptr from )
+{
+	MEMADDR_OP(0, VAROP2(0x0F, 0x66), true, to, from, 0);
+}
+
+void PSRLWItoR( x86MMXRegType to, u8 from )
+{
+	RexB(0, to);
+	write16( 0x710F );
+	ModRM( 3, 2 , to ); 
+	write8( from );
+}
+
+void PSRLDItoR( x86MMXRegType to, u8 from )
+{
+	RexB(0, to);
+	write16( 0x720F );
+	ModRM( 3, 2 , to ); 
+	write8( from );
+}
+
+void PSRLDRtoR( x86MMXRegType to, x86MMXRegType from )
+{
+	RexRB(0, to, from);
+	write16( 0xD20F );
+	ModRM( 3, to, from ); 
+}
+
+void PSLLWItoR( x86MMXRegType to, u8 from )
+{
+	RexB(0, to);
+	write16( 0x710F );
+	ModRM( 3, 6 , to ); 
+	write8( from );
+}
+
+void PSLLDItoR( x86MMXRegType to, u8 from )
+{
+	RexB(0, to);
+	write16( 0x720F );
+	ModRM( 3, 6 , to ); 
+	write8( from );
+}
+
+void PSLLDRtoR( x86MMXRegType to, x86MMXRegType from )
+{
+	RexRB(0, to, from);
+	write16( 0xF20F );
+	ModRM( 3, to, from ); 
+}
+
+void PSRAWItoR( x86MMXRegType to, u8 from )
+{
+	RexB(0, to);
+	write16( 0x710F );
+	ModRM( 3, 4 , to ); 
+	write8( from );
+}
+
+void PSRADItoR( x86MMXRegType to, u8 from )
+{
+	RexB(0, to);
+	write16( 0x720F );
+	ModRM( 3, 4 , to ); 
+	write8( from );
+}
+
+void PSRADRtoR( x86MMXRegType to, x86MMXRegType from )
+{
+	RexRB(0, to, from);
+	write16( 0xE20F );
+	ModRM( 3, to, from ); 
+}
+
+/* por m64 to r64 */
+void PORMtoR( x86MMXRegType to, uptr from ) 
+{
+	MEMADDR_OP(0, VAROP2(0x0F, 0xEB), true, to, from, 0);
+}
+
+/* pxor m64 to r64 */
+void PXORMtoR( x86MMXRegType to, uptr from ) 
+{
+	MEMADDR_OP(0, VAROP2(0x0F, 0xEF), true, to, from, 0);
+}
+
+/* pand m64 to r64 */
+void PANDMtoR( x86MMXRegType to, uptr from ) 
+{
+	MEMADDR_OP(0, VAROP2(0x0F, 0xDB), true, to, from, 0);
+}
+
+void PANDNMtoR( x86MMXRegType to, uptr from )
+{
+	MEMADDR_OP(0, VAROP2(0x0F, 0xDF), true, to, from, 0);
+}
+
+void PUNPCKHDQRtoR( x86MMXRegType to, x86MMXRegType from )
+{
+	RexRB(0, to, from);
+	write16( 0x6A0F );
+	ModRM( 3, to, from );
+}
+
+void PUNPCKHDQMtoR( x86MMXRegType to, uptr from )
+{
+	MEMADDR_OP(0, VAROP2(0x0F, 0x6A), true, to, from, 0);
+}
+
+void PUNPCKLDQRtoR( x86MMXRegType to, x86MMXRegType from )
+{
+	RexRB(0, to, from);
+	write16( 0x620F );
+	ModRM( 3, to, from );
+}
+
+void PUNPCKLDQMtoR( x86MMXRegType to, uptr from )
+{
+	MEMADDR_OP(0, VAROP2(0x0F, 0x62), true, to, from, 0);
+}
+
+void MOVQ64ItoR( x86MMXRegType reg, u64 i ) 
+{
+	RexR(0, reg);
+	write16(0x6F0F);
+	ModRM(0, reg, DISP32);
+	write32(2);
+	JMP8( 8 );
+	write64( i );
+}
+
+void MOVQRtoR( x86MMXRegType to, x86MMXRegType from )
+{
+	RexRB(0, to, from);
+	write16( 0x6F0F );
+	ModRM( 3, to, from );
+}
+
+void MOVQRmtoROffset( x86MMXRegType to, x86IntRegType from, u32 offset )
+{
+	RexRB(0, to, from);
+	write16( 0x6F0F );
+
+	if( offset < 128 ) {
+		ModRM( 1, to, from );
+		write8(offset);
+	}
+	else {
+		ModRM( 2, to, from );
+		write32(offset);
+	}
+}
+
+void MOVQRtoRmOffset( x86IntRegType to, x86MMXRegType from, u32 offset )
+{
+	RexRB(0, from, to);
+	write16( 0x7F0F );
+
+	if( offset < 128 ) {
+		ModRM( 1, from , to );
+		write8(offset);
+	}
+	else {
+		ModRM( 2, from, to );
+		write32(offset);
+	}
+}
+
+/* movd m32 to r64 */
+void MOVDMtoMMX( x86MMXRegType to, uptr from ) 
+{
+	MEMADDR_OP(0, VAROP2(0x0F, 0x6E), true, to, from, 0);
+}
+
+/* movd r64 to m32 */
+void MOVDMMXtoM( uptr to, x86MMXRegType from ) 
+{
+	MEMADDR_OP(0, VAROP2(0x0F, 0x7E), true, from, to, 0);
+}
+
+void MOVD32RtoMMX( x86MMXRegType to, x86IntRegType from )
+{
+	RexRB(0, to, from);
+	write16( 0x6E0F );
+	ModRM( 3, to, from );
+}
+
+void MOVD32RmtoMMX( x86MMXRegType to, x86IntRegType from )
+{
+	RexRB(0, to, from);
+	write16( 0x6E0F );
+	ModRM( 0, to, from );
+}
+
+void MOVD32RmOffsettoMMX( x86MMXRegType to, x86IntRegType from, u32 offset )
+{
+	RexRB(0, to, from);
+	write16( 0x6E0F );
+
+	if( offset < 128 ) {
+		ModRM( 1, to, from );
+		write8(offset);
+	}
+	else {
+		ModRM( 2, to, from );
+		write32(offset);
+	}
+}
+
+void MOVD32MMXtoR( x86IntRegType to, x86MMXRegType from )
+{
+	RexRB(0, from, to);
+	write16( 0x7E0F );
+	ModRM( 3, from, to );
+}
+
+void MOVD32MMXtoRm( x86IntRegType to, x86MMXRegType from )
+{
+	RexRB(0, from, to);
+	write16( 0x7E0F );
+	ModRM( 0, from, to );
+	if( to >= 4 ) {
+		// no idea why
+		assert( to == ESP );
+		write8(0x24);
+	}
+
+}
+
+void MOVD32MMXtoRmOffset( x86IntRegType to, x86MMXRegType from, u32 offset )
+{
+	RexRB(0, from, to);
+	write16( 0x7E0F );
+
+	if( offset < 128 ) {
+		ModRM( 1, from, to );
+		write8(offset);
+	}
+	else {
+		ModRM( 2, from, to );
+		write32(offset);
+	}
+}
+
+///* movd r32 to r64 */
+//void MOVD32MMXtoMMX( x86MMXRegType to, x86MMXRegType from ) 
+//{
+//	write16( 0x6E0F );
+//	ModRM( 3, to, from );
+//}
+//
+///* movq r64 to r32 */
+//void MOVD64MMXtoMMX( x86MMXRegType to, x86MMXRegType from ) 
+//{
+//	write16( 0x7E0F );
+//	ModRM( 3, from, to );
+//}
+
+// untested
+void PACKSSWBMMXtoMMX(x86MMXRegType to, x86MMXRegType from)
+{
+	RexRB(0, to, from);
+	write16( 0x630F );
+	ModRM( 3, to, from ); 
+}
+
+void PACKSSDWMMXtoMMX(x86MMXRegType to, x86MMXRegType from)
+{
+	RexRB(0, to, from);
+	write16( 0x6B0F );
+	ModRM( 3, to, from ); 
+}
+
+void PMOVMSKBMMXtoR(x86IntRegType to, x86MMXRegType from)
+{
+	RexRB(0, to, from);
+	write16( 0xD70F ); 
+	ModRM( 3, to, from );
+}
+
+void PINSRWRtoMMX( x86MMXRegType to, x86SSERegType from, u8 imm8 )
+{
+	RexRB(0, to, from);
+	write16( 0xc40f );
+	ModRM( 3, to, from );
+	write8( imm8 );
+}
+
+void PSHUFWRtoR(x86MMXRegType to, x86MMXRegType from, u8 imm8)
+{
+	RexRB(0, to, from);
+	write16(0x700f);
+	ModRM( 3, to, from );
+	write8(imm8);
+}
+
+void PSHUFWMtoR(x86MMXRegType to, uptr from, u8 imm8)
+{
+	MEMADDR_OP(0, VAROP2(0x0F, 0x70), true, to, from, 1 /* XXX was 0? */);
+	write8(imm8);
+}
+
+void MASKMOVQRtoR(x86MMXRegType to, x86MMXRegType from)
+{
+	RexRB(0, to, from);
+	write16(0xf70f);
+	ModRM( 3, to, from );
+}
+
+#endif
diff --git a/libpcsxcore/ix86_64/ix86_sse.c b/libpcsxcore/ix86_64/ix86_sse.c
new file mode 100644
index 0000000..cb391dc
--- /dev/null
+++ b/libpcsxcore/ix86_64/ix86_sse.c
@@ -0,0 +1,1455 @@
+// stop compiling if NORECBUILD build (only for Visual Studio)
+#if !(defined(_MSC_VER) && defined(PCSX2_NORECBUILD))
+
+#include <assert.h>
+#include "ix86-64.h"
+
+PCSX2_ALIGNED16(static unsigned int p[4]);
+PCSX2_ALIGNED16(static unsigned int p2[4]);
+PCSX2_ALIGNED16(static float f[4]);
+
+
+XMMSSEType g_xmmtypes[XMMREGS] = {0};
+
+/********************/
+/* SSE instructions */
+/********************/
+
+#define SSEMtoRv( nc, code, overb ) \
+	assert( cpucaps.hasStreamingSIMDExtensions ); \
+	assert( to < XMMREGS ) ; \
+	MEMADDR_OP(0, nc, code, true, to, from, overb)
+
+#define SSEMtoR( code, overb ) SSEMtoRv(2, code, overb)
+
+#define SSERtoMv( nc, code, overb ) \
+	assert( cpucaps.hasStreamingSIMDExtensions ); \
+	assert( from < XMMREGS) ; \
+	MEMADDR_OP(0, nc, code, true, from, to, overb)
+
+#define SSERtoM( code, overb ) SSERtoMv( 2, code, overb ) \
+
+#define SSE_SS_MtoR( code, overb ) \
+	SSEMtoRv(3, (code << 8) | 0xF3, overb)
+
+#define SSE_SS_RtoM( code, overb ) \
+	SSERtoMv(3, (code << 8) | 0xF3, overb)
+
+#define SSERtoR( code ) \
+	assert( cpucaps.hasStreamingSIMDExtensions ); \
+	assert( to < XMMREGS && from < XMMREGS) ; \
+    RexRB(0, to, from);            \
+	write16( code ); \
+	ModRM( 3, to, from );
+
+#define SSEMtoR66( code ) \
+	SSEMtoRv( 3, (code << 8) | 0x66, 0 )
+
+#define SSERtoM66( code ) \
+	SSERtoMv( 3, (code << 8) | 0x66, 0 )
+
+#define SSERtoR66( code ) \
+	write8( 0x66 ); \
+	SSERtoR( code );
+
+#define _SSERtoR66( code ) \
+	assert( cpucaps.hasStreamingSIMDExtensions ); \
+	assert( to < XMMREGS && from < XMMREGS) ; \
+	write8( 0x66 ); \
+	RexRB(0, from, to); \
+	write16( code ); \
+	ModRM( 3, from, to );
+
+#define SSE_SS_RtoR( code ) \
+	assert( cpucaps.hasStreamingSIMDExtensions ); \
+	assert( to < XMMREGS && from < XMMREGS) ; \
+	write8( 0xf3 ); \
+    RexRB(0, to, from);              \
+	write16( code ); \
+	ModRM( 3, to, from );
+
+#define CMPPSMtoR( op ) \
+   SSEMtoR( 0xc20f, 1 ); \
+   write8( op );
+
+#define CMPPSRtoR( op ) \
+   SSERtoR( 0xc20f ); \
+   write8( op );
+
+#define CMPSSMtoR( op ) \
+   SSE_SS_MtoR( 0xc20f, 1 ); \
+   write8( op );
+
+#define CMPSSRtoR( op ) \
+   SSE_SS_RtoR( 0xc20f ); \
+   write8( op );
+
+
+
+void WriteRmOffset(x86IntRegType to, int offset);
+void WriteRmOffsetFrom(x86IntRegType to, x86IntRegType from, int offset);
+
+/* movups [r32][r32*scale] to xmm1 */
+void SSE_MOVUPSRmStoR( x86SSERegType to, x86IntRegType from, x86IntRegType from2, int scale )
+{
+	assert( cpucaps.hasStreamingSIMDExtensions );
+    RexRXB(0, to, from2, from);
+	write16( 0x100f );
+	ModRM( 0, to, 0x4 );
+	SibSB( scale, from2, from );
+}
+
+/* movups xmm1 to [r32][r32*scale] */
+void SSE_MOVUPSRtoRmS( x86SSERegType to, x86IntRegType from, x86IntRegType from2, int scale )
+{
+	assert( cpucaps.hasStreamingSIMDExtensions );
+    RexRXB(1, to, from2, from);
+	write16( 0x110f );
+	ModRM( 0, to, 0x4 );
+	SibSB( scale, from2, from );
+}
+
+/* movups [r32] to r32 */
+void SSE_MOVUPSRmtoR( x86IntRegType to, x86IntRegType from ) 
+{
+	assert( cpucaps.hasStreamingSIMDExtensions );
+	RexRB(0, to, from);
+	write16( 0x100f );
+	ModRM( 0, to, from );
+}
+
+/* movups r32 to [r32] */
+void SSE_MOVUPSRtoRm( x86IntRegType to, x86IntRegType from ) 
+{
+	assert( cpucaps.hasStreamingSIMDExtensions );
+    RexRB(0, from, to);
+	write16( 0x110f );
+	ModRM( 0, from, to );
+}
+
+/* movlps [r32] to r32 */
+void SSE_MOVLPSRmtoR( x86SSERegType to, x86IntRegType from ) 
+{
+	assert( cpucaps.hasStreamingSIMDExtensions );
+	RexRB(1, to, from);
+	write16( 0x120f );
+	ModRM( 0, to, from );
+}
+
+void SSE_MOVLPSRmtoROffset( x86SSERegType to, x86IntRegType from, int offset )
+{
+	assert( cpucaps.hasStreamingSIMDExtensions );
+    RexRB(0, to, from);
+	write16( 0x120f );
+    WriteRmOffsetFrom(to, from, offset);
+}
+
+/* movaps r32 to [r32] */
+void SSE_MOVLPSRtoRm( x86IntRegType to, x86IntRegType from ) 
+{
+	assert( cpucaps.hasStreamingSIMDExtensions );
+    RexRB(0, from, to);
+	write16( 0x130f );
+	ModRM( 0, from, to );
+}
+
+void SSE_MOVLPSRtoRmOffset( x86SSERegType to, x86IntRegType from, int offset )
+{
+	assert( cpucaps.hasStreamingSIMDExtensions );
+    RexRB(0, from, to);
+	write16( 0x130f );
+    WriteRmOffsetFrom(from, to, offset);
+}
+
+/* movaps [r32][r32*scale] to xmm1 */
+void SSE_MOVAPSRmStoR( x86SSERegType to, x86IntRegType from, x86IntRegType from2, int scale )
+{
+	assert( cpucaps.hasStreamingSIMDExtensions && from != EBP );
+    RexRXB(0, to, from2, from);
+	write16( 0x280f );
+	ModRM( 0, to, 0x4 );
+	SibSB( scale, from2, from );
+}
+
+/* movaps xmm1 to [r32][r32*scale] */
+void SSE_MOVAPSRtoRmS( x86SSERegType to, x86IntRegType from, x86IntRegType from2, int scale )
+{
+	assert( cpucaps.hasStreamingSIMDExtensions && from != EBP );
+    RexRXB(0, to, from2, from);
+	write16( 0x290f );
+	ModRM( 0, to, 0x4 );
+	SibSB( scale, from2, from );
+}
+
+// movaps [r32+offset] to r32
+void SSE_MOVAPSRmtoROffset( x86SSERegType to, x86IntRegType from, int offset )
+{
+	assert( cpucaps.hasStreamingSIMDExtensions );
+	RexRB(0, to, from);
+	write16( 0x280f );
+    WriteRmOffsetFrom(to, from, offset);
+}
+
+// movaps r32 to [r32+offset]
+void SSE_MOVAPSRtoRmOffset( x86IntRegType to, x86SSERegType from, int offset ) 
+{
+	assert( cpucaps.hasStreamingSIMDExtensions );
+	RexRB(0, from, to);
+	write16( 0x290f );
+    WriteRmOffsetFrom(from, to, offset);
+}
+
+// movdqa [r32+offset] to r32
+void SSE2_MOVDQARmtoROffset( x86SSERegType to, x86IntRegType from, int offset )
+{
+	assert( cpucaps.hasStreamingSIMDExtensions );
+	write8(0x66);
+    RexRB(0, to, from);
+	write16( 0x6f0f );
+    WriteRmOffsetFrom(to, from, offset);
+}
+
+// movdqa r32 to [r32+offset]
+void SSE2_MOVDQARtoRmOffset( x86IntRegType to, x86SSERegType from, int offset ) 
+{
+	assert( cpucaps.hasStreamingSIMDExtensions );
+	write8(0x66);
+    RexRB(0, from, to);
+	write16( 0x7f0f );
+    WriteRmOffsetFrom(from, to, offset);
+}
+
+// movups [r32+offset] to r32
+void SSE_MOVUPSRmtoROffset( x86SSERegType to, x86IntRegType from, int offset )
+{
+	RexRB(0, to, from);
+	write16( 0x100f );
+    WriteRmOffsetFrom(to, from, offset);
+}
+
+// movups r32 to [r32+offset]
+void SSE_MOVUPSRtoRmOffset( x86SSERegType to, x86IntRegType from, int offset )
+{
+	assert( cpucaps.hasStreamingSIMDExtensions );
+    RexRB(0, from, to);
+	write16( 0x110f );
+    WriteRmOffsetFrom(from, to, offset);
+}
+
+//**********************************************************************************/
+//MOVAPS: Move aligned Packed Single Precision FP values                           *
+//**********************************************************************************
+void SSE_MOVAPS_M128_to_XMM( x86SSERegType to, uptr from )          { SSEMtoR( 0x280f, 0 ); }
+void SSE_MOVAPS_XMM_to_M128( uptr to, x86SSERegType from )          { SSERtoM( 0x290f, 0 ); }
+void SSE_MOVAPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )     { SSERtoR( 0x280f ); }
+
+void SSE_MOVUPS_M128_to_XMM( x86SSERegType to, uptr from )          { SSEMtoR( 0x100f, 0 ); }
+void SSE_MOVUPS_XMM_to_M128( uptr to, x86SSERegType from )          { SSERtoM( 0x110f, 0 ); }
+
+void SSE2_MOVSD_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
+{
+	if( !cpucaps.hasStreamingSIMD2Extensions ) SSE2EMU_MOVSD_XMM_to_XMM(to, from);
+	else {
+		write8(0xf2);
+		SSERtoR( 0x100f);
+	}
+}
+
+void SSE2_MOVQ_M64_to_XMM( x86SSERegType to, uptr from )
+{
+	if( !cpucaps.hasStreamingSIMD2Extensions ) SSE2EMU_MOVQ_M64_to_XMM(to, from);
+	else {
+		SSE_SS_MtoR( 0x7e0f, 0);
+	}
+}
+
+void SSE2_MOVQ_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
+{
+	if( !cpucaps.hasStreamingSIMD2Extensions ) SSE2EMU_MOVQ_XMM_to_XMM(to, from);
+	else {
+		SSE_SS_RtoR( 0x7e0f);
+	}
+}
+
+void SSE2_MOVQ_XMM_to_M64( u32 to, x86SSERegType from )
+{
+	if( !cpucaps.hasStreamingSIMD2Extensions ) SSE_MOVLPS_XMM_to_M64(to, from);
+	else {
+		SSERtoM66(0xd60f);
+	}
+}
+
+#ifndef __x86_64__
+void SSE2_MOVDQ2Q_XMM_to_MM( x86MMXRegType to, x86SSERegType from)
+{
+	if( !cpucaps.hasStreamingSIMD2Extensions ) SSE2EMU_MOVDQ2Q_XMM_to_MM(to, from);
+	else {
+		write8(0xf2);
+		SSERtoR( 0xd60f);
+	}
+}
+void SSE2_MOVQ2DQ_MM_to_XMM( x86SSERegType to, x86MMXRegType from)
+{
+	if( !cpucaps.hasStreamingSIMD2Extensions ) SSE2EMU_MOVQ2DQ_MM_to_XMM(to, from);
+	else {
+		SSE_SS_RtoR( 0xd60f);
+	}
+}
+#endif
+
+//**********************************************************************************/
+//MOVSS: Move Scalar Single-Precision FP  value                                    *
+//**********************************************************************************
+void SSE_MOVSS_M32_to_XMM( x86SSERegType to, uptr from )           { SSE_SS_MtoR( 0x100f, 0 ); }
+void SSE_MOVSS_XMM_to_M32( u32 to, x86SSERegType from )           { SSE_SS_RtoM( 0x110f, 0 ); }
+void SSE_MOVSS_XMM_to_Rm( x86IntRegType to, x86SSERegType from )
+{
+	write8(0xf3);
+    RexRB(0, from, to);
+    write16(0x110f);
+	ModRM(0, from, to);
+}
+
+void SSE_MOVSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )      { SSE_SS_RtoR( 0x100f ); }
+
+void SSE_MOVSS_RmOffset_to_XMM( x86SSERegType to, x86IntRegType from, int offset )
+{
+	write8(0xf3);
+    RexRB(0, to, from);
+    write16( 0x100f );
+    WriteRmOffsetFrom(to, from, offset);
+}
+
+void SSE_MOVSS_XMM_to_RmOffset( x86IntRegType to, x86SSERegType from, int offset )
+{
+	write8(0xf3);
+    RexRB(0, from, to);
+    write16(0x110f);
+    WriteRmOffsetFrom(from, to, offset);
+}
+
+void SSE_MASKMOVDQU_XMM_to_XMM( x86SSERegType to, x86SSERegType from )      { SSERtoR66( 0xf70f ); }
+//**********************************************************************************/
+//MOVLPS: Move low Packed Single-Precision FP                                     *
+//**********************************************************************************
+void SSE_MOVLPS_M64_to_XMM( x86SSERegType to, uptr from )          { SSEMtoR( 0x120f, 0 ); }
+void SSE_MOVLPS_XMM_to_M64( u32 to, x86SSERegType from )          { SSERtoM( 0x130f, 0 ); }
+
+void SSE_MOVLPS_RmOffset_to_XMM( x86SSERegType to, x86IntRegType from, int offset )
+{
+	assert( cpucaps.hasStreamingSIMDExtensions );
+    RexRB(0, to, from);
+	write16( 0x120f );
+    WriteRmOffsetFrom(to, from, offset);
+}
+
+void SSE_MOVLPS_XMM_to_RmOffset( x86IntRegType to, x86SSERegType from, int offset )
+{
+    RexRB(0, from, to);
+	write16(0x130f);
+    WriteRmOffsetFrom(from, to, offset);
+}
+
+/////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//MOVHPS: Move High Packed Single-Precision FP                                     *
+//**********************************************************************************
+void SSE_MOVHPS_M64_to_XMM( x86SSERegType to, uptr from )          { SSEMtoR( 0x160f, 0 ); }
+void SSE_MOVHPS_XMM_to_M64( u32 to, x86SSERegType from )          { SSERtoM( 0x170f, 0 ); }
+
+void SSE_MOVHPS_RmOffset_to_XMM( x86SSERegType to, x86IntRegType from, int offset )
+{
+	assert( cpucaps.hasStreamingSIMDExtensions );
+    RexRB(0, to, from);
+	write16( 0x160f );
+    WriteRmOffsetFrom(to, from, offset);
+}
+
+void SSE_MOVHPS_XMM_to_RmOffset( x86IntRegType to, x86SSERegType from, int offset )
+{
+	assert( cpucaps.hasStreamingSIMDExtensions );
+    RexRB(0, from, to);
+	write16(0x170f);
+    WriteRmOffsetFrom(from, to, offset);
+}
+
+/////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//MOVLHPS: Moved packed Single-Precision FP low to high                            *
+//**********************************************************************************
+void SSE_MOVLHPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )    { SSERtoR( 0x160f ); }
+
+//////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//MOVHLPS: Moved packed Single-Precision FP High to Low                            *
+//**********************************************************************************
+void SSE_MOVHLPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )    { SSERtoR( 0x120f ); }
+
+///////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//ANDPS: Logical Bit-wise  AND for Single FP                                        *
+//**********************************************************************************
+void SSE_ANDPS_M128_to_XMM( x86SSERegType to, uptr from )           { SSEMtoR( 0x540f, 0 ); }
+void SSE_ANDPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR( 0x540f ); }
+
+///////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//ANDNPS : Logical Bit-wise  AND NOT of Single-precision FP values                 *
+//**********************************************************************************
+void SSE_ANDNPS_M128_to_XMM( x86SSERegType to, uptr from )          { SSEMtoR( 0x550f, 0 ); }
+void SSE_ANDNPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSERtoR( 0x550f ); }
+
+/////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//RCPPS : Packed Single-Precision FP Reciprocal                                     *
+//**********************************************************************************
+void SSE_RCPPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR( 0x530f ); }
+void SSE_RCPPS_M128_to_XMM( x86SSERegType to, uptr from )           { SSEMtoR( 0x530f, 0 ); }
+
+void SSE_RCPSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSE_SS_RtoR(0x530f); }
+void SSE_RCPSS_M32_to_XMM( x86SSERegType to, uptr from ) { SSE_SS_MtoR(0x530f, 0); }
+
+//////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//ORPS : Bit-wise Logical OR of Single-Precision FP Data                            *
+//**********************************************************************************
+void SSE_ORPS_M128_to_XMM( x86SSERegType to, uptr from )            { SSEMtoR( 0x560f, 0 ); }
+void SSE_ORPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )  { SSERtoR( 0x560f ); }
+
+/////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//XORPS : Bitwise Logical XOR of Single-Precision FP Values                        *
+//**********************************************************************************
+void SSE_XORPS_M128_to_XMM( x86SSERegType to, uptr from )           { SSEMtoR( 0x570f, 0 ); }
+void SSE_XORPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR( 0x570f ); }
+
+///////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//ADDPS : ADD Packed Single-Precision FP Values                                    *
+//**********************************************************************************
+void SSE_ADDPS_M128_to_XMM( x86SSERegType to, uptr from )           { SSEMtoR( 0x580f, 0 ); }
+void SSE_ADDPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR( 0x580f ); }
+
+////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//ADDSS : ADD Scalar Single-Precision FP Values                                    *
+//**********************************************************************************
+void SSE_ADDSS_M32_to_XMM( x86SSERegType to, uptr from )           { SSE_SS_MtoR( 0x580f, 0 ); }
+void SSE_ADDSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSE_SS_RtoR( 0x580f ); }
+
+/////////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//SUBPS: Packed Single-Precision FP Subtract                                       *
+//**********************************************************************************
+void SSE_SUBPS_M128_to_XMM( x86SSERegType to, uptr from )           { SSEMtoR( 0x5c0f, 0 ); }
+void SSE_SUBPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR( 0x5c0f ); }
+
+///////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//SUBSS : Scalar  Single-Precision FP Subtract                                       *
+//**********************************************************************************
+void SSE_SUBSS_M32_to_XMM( x86SSERegType to, uptr from )           { SSE_SS_MtoR( 0x5c0f, 0 ); }
+void SSE_SUBSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSE_SS_RtoR( 0x5c0f ); }
+
+/////////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//MULPS : Packed Single-Precision FP Multiply                                      *
+//**********************************************************************************
+void SSE_MULPS_M128_to_XMM( x86SSERegType to, uptr from )           { SSEMtoR( 0x590f, 0 ); }
+void SSE_MULPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR( 0x590f ); }
+
+////////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//MULSS : Scalar  Single-Precision FP Multiply                                       *
+//**********************************************************************************
+void SSE_MULSS_M32_to_XMM( x86SSERegType to, uptr from )           { SSE_SS_MtoR( 0x590f, 0 ); }
+void SSE_MULSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSE_SS_RtoR( 0x590f ); }
+
+////////////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//Packed Single-Precission FP compare (CMPccPS)                                    *
+//**********************************************************************************
+//missing  SSE_CMPPS_I8_to_XMM
+//         SSE_CMPPS_M32_to_XMM
+//	       SSE_CMPPS_XMM_to_XMM
+void SSE_CMPEQPS_M128_to_XMM( x86SSERegType to, uptr from )         { CMPPSMtoR( 0 ); }
+void SSE_CMPEQPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )    { CMPPSRtoR( 0 ); }
+void SSE_CMPLTPS_M128_to_XMM( x86SSERegType to, uptr from )         { CMPPSMtoR( 1 ); }
+void SSE_CMPLTPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )    { CMPPSRtoR( 1 ); }
+void SSE_CMPLEPS_M128_to_XMM( x86SSERegType to, uptr from )         { CMPPSMtoR( 2 ); }
+void SSE_CMPLEPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )    { CMPPSRtoR( 2 ); }
+void SSE_CMPUNORDPS_M128_to_XMM( x86SSERegType to, uptr from )      { CMPPSMtoR( 3 ); }
+void SSE_CMPUNORDPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { CMPPSRtoR( 3 ); }
+void SSE_CMPNEPS_M128_to_XMM( x86SSERegType to, uptr from )         { CMPPSMtoR( 4 ); }
+void SSE_CMPNEPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )    { CMPPSRtoR( 4 ); }
+void SSE_CMPNLTPS_M128_to_XMM( x86SSERegType to, uptr from )        { CMPPSMtoR( 5 ); }
+void SSE_CMPNLTPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )   { CMPPSRtoR( 5 ); }
+void SSE_CMPNLEPS_M128_to_XMM( x86SSERegType to, uptr from )        { CMPPSMtoR( 6 ); }
+void SSE_CMPNLEPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )   { CMPPSRtoR( 6 ); }
+void SSE_CMPORDPS_M128_to_XMM( x86SSERegType to, uptr from )        { CMPPSMtoR( 7 ); }
+void SSE_CMPORDPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )   { CMPPSRtoR( 7 ); }
+
+///////////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//Scalar Single-Precission FP compare (CMPccSS)                                    *
+//**********************************************************************************
+//missing  SSE_CMPSS_I8_to_XMM
+//         SSE_CMPSS_M32_to_XMM
+//	       SSE_CMPSS_XMM_to_XMM
+void SSE_CMPEQSS_M32_to_XMM( x86SSERegType to, uptr from )         { CMPSSMtoR( 0 ); }
+void SSE_CMPEQSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )    { CMPSSRtoR( 0 ); }
+void SSE_CMPLTSS_M32_to_XMM( x86SSERegType to, uptr from )         { CMPSSMtoR( 1 ); }
+void SSE_CMPLTSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )    { CMPSSRtoR( 1 ); }
+void SSE_CMPLESS_M32_to_XMM( x86SSERegType to, uptr from )         { CMPSSMtoR( 2 ); }
+void SSE_CMPLESS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )    { CMPSSRtoR( 2 ); }
+void SSE_CMPUNORDSS_M32_to_XMM( x86SSERegType to, uptr from )      { CMPSSMtoR( 3 ); }
+void SSE_CMPUNORDSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { CMPSSRtoR( 3 ); }
+void SSE_CMPNESS_M32_to_XMM( x86SSERegType to, uptr from )         { CMPSSMtoR( 4 ); }
+void SSE_CMPNESS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )    { CMPSSRtoR( 4 ); }
+void SSE_CMPNLTSS_M32_to_XMM( x86SSERegType to, uptr from )        { CMPSSMtoR( 5 ); }
+void SSE_CMPNLTSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )   { CMPSSRtoR( 5 ); }
+void SSE_CMPNLESS_M32_to_XMM( x86SSERegType to, uptr from )        { CMPSSMtoR( 6 ); }
+void SSE_CMPNLESS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )   { CMPSSRtoR( 6 ); }
+void SSE_CMPORDSS_M32_to_XMM( x86SSERegType to, uptr from )        { CMPSSMtoR( 7 ); }
+void SSE_CMPORDSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )   { CMPSSRtoR( 7 ); }
+
+void SSE_UCOMISS_M32_to_XMM( x86SSERegType to, uptr from )
+{
+	MEMADDR_OP(0, VAROP2(0x0F, 0x2E), true, to, from, 0);
+}
+
+void SSE_UCOMISS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
+{
+    RexRB(0, to, from);
+	write16( 0x2e0f );
+	ModRM( 3, to, from );
+}
+
+//////////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//RSQRTPS : Packed Single-Precision FP Square Root Reciprocal                      *
+//**********************************************************************************
+void SSE_RSQRTPS_M128_to_XMM( x86SSERegType to, uptr from )          { SSEMtoR( 0x520f, 0 ); }
+void SSE_RSQRTPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSERtoR( 0x520f ); }
+
+/////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//RSQRTSS : Scalar Single-Precision FP Square Root Reciprocal                      *
+//**********************************************************************************
+void SSE_RSQRTSS_M32_to_XMM( x86SSERegType to, uptr from )          { SSE_SS_MtoR( 0x520f, 0 ); }
+void SSE_RSQRTSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSE_SS_RtoR( 0x520f ); }
+
+////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//SQRTPS : Packed Single-Precision FP Square Root                                  *
+//**********************************************************************************
+void SSE_SQRTPS_M128_to_XMM( x86SSERegType to, uptr from )          { SSEMtoR( 0x510f, 0 ); }
+void SSE_SQRTPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSERtoR( 0x510f ); }
+
+//////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//SQRTSS : Scalar Single-Precision FP Square Root                                  *
+//**********************************************************************************
+void SSE_SQRTSS_M32_to_XMM( x86SSERegType to, uptr from )          { SSE_SS_MtoR( 0x510f, 0 ); }
+void SSE_SQRTSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSE_SS_RtoR( 0x510f ); }
+
+////////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//MAXPS: Return Packed Single-Precision FP Maximum                                 *
+//**********************************************************************************
+void SSE_MAXPS_M128_to_XMM( x86SSERegType to, uptr from )           { SSEMtoR( 0x5f0f, 0 ); }
+void SSE_MAXPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR( 0x5f0f ); }
+
+/////////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//MAXSS: Return Scalar Single-Precision FP Maximum                                 *
+//**********************************************************************************
+void SSE_MAXSS_M32_to_XMM( x86SSERegType to, uptr from )           { SSE_SS_MtoR( 0x5f0f, 0 ); }
+void SSE_MAXSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSE_SS_RtoR( 0x5f0f ); }
+
+#ifndef __x86_64__
+/////////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//CVTPI2PS: Packed Signed INT32 to Packed Single  FP Conversion                    *
+//**********************************************************************************
+void SSE_CVTPI2PS_M64_to_XMM( x86SSERegType to, uptr from )        { SSEMtoR( 0x2a0f, 0 ); }
+void SSE_CVTPI2PS_MM_to_XMM( x86SSERegType to, x86MMXRegType from )   { SSERtoR( 0x2a0f ); }
+
+///////////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//CVTPS2PI: Packed Single FP to Packed Signed INT32 Conversion                      *
+//**********************************************************************************
+void SSE_CVTPS2PI_M64_to_MM( x86MMXRegType to, uptr from )        { SSEMtoR( 0x2d0f, 0 ); }
+void SSE_CVTPS2PI_XMM_to_MM( x86MMXRegType to, x86SSERegType from )   { SSERtoR( 0x2d0f ); }
+#endif
+
+void SSE_CVTTSS2SI_M32_to_R32(x86IntRegType to, uptr from) { SSE_SS_MtoR(0x2c0f, 0); }
+void SSE_CVTTSS2SI_XMM_to_R32(x86IntRegType to, x86SSERegType from)
+{
+	write8(0xf3);
+    RexRB(0, to, from);
+	write16(0x2c0f);
+	ModRM(3, to, from);
+}
+
+void SSE_CVTSI2SS_M32_to_XMM(x86SSERegType to, uptr from) { SSE_SS_MtoR(0x2a0f, 0); }
+void SSE_CVTSI2SS_R_to_XMM(x86SSERegType to, x86IntRegType from)
+{
+	write8(0xf3);
+    RexRB(0, to, from);
+	write16(0x2a0f);
+	ModRM(3, to, from);
+}
+
+///////////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//CVTDQ2PS: Packed Signed INT32  to Packed Single Precision FP  Conversion         *
+//**********************************************************************************
+void SSE2_CVTDQ2PS_M128_to_XMM( x86SSERegType to, uptr from )        { SSEMtoR( 0x5b0f, 0 ); }
+void SSE2_CVTDQ2PS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )   { SSERtoR( 0x5b0f ); }
+
+//**********************************************************************************/
+//CVTPS2DQ: Packed Single Precision FP to Packed Signed INT32 Conversion           *
+//**********************************************************************************
+void SSE2_CVTPS2DQ_M128_to_XMM( x86SSERegType to, uptr from )        { SSEMtoR66( 0x5b0f ); }
+void SSE2_CVTPS2DQ_XMM_to_XMM( x86SSERegType to, x86SSERegType from )   { SSERtoR66( 0x5b0f ); }
+
+void SSE2_CVTTPS2DQ_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSE_SS_RtoR(0x5b0f); }
+/////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//MINPS: Return Packed Single-Precision FP Minimum                                 *
+//**********************************************************************************
+void SSE_MINPS_M128_to_XMM( x86SSERegType to, uptr from )           { SSEMtoR( 0x5d0f, 0 ); }
+void SSE_MINPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR( 0x5d0f ); }
+
+//////////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//MINSS: Return Scalar Single-Precision FP Minimum                                 *
+//**********************************************************************************
+void SSE_MINSS_M32_to_XMM( x86SSERegType to, uptr from )           { SSE_SS_MtoR( 0x5d0f, 0 ); }
+void SSE_MINSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSE_SS_RtoR( 0x5d0f ); }
+
+#ifndef __x86_64__
+///////////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//PMAXSW: Packed Signed Integer Word Maximum                                        *
+//**********************************************************************************
+//missing
+ //     SSE_PMAXSW_M64_to_MM
+//		SSE2_PMAXSW_M128_to_XMM
+//		SSE2_PMAXSW_XMM_to_XMM
+void SSE_PMAXSW_MM_to_MM( x86MMXRegType to, x86MMXRegType from ){ SSERtoR( 0xEE0F ); }
+
+///////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//PMINSW: Packed Signed Integer Word Minimum                                        *
+//**********************************************************************************
+//missing
+ //     SSE_PMINSW_M64_to_MM
+//		SSE2_PMINSW_M128_to_XMM
+//		SSE2_PMINSW_XMM_to_XMM
+void SSE_PMINSW_MM_to_MM( x86MMXRegType to, x86MMXRegType from ){ SSERtoR( 0xEA0F ); }
+#endif
+
+//////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//SHUFPS: Shuffle Packed Single-Precision FP Values                                *
+//**********************************************************************************
+void SSE_SHUFPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from, u8 imm8 )	{ SSERtoR( 0xC60F ); write8( imm8 ); }
+void SSE_SHUFPS_M128_to_XMM( x86SSERegType to, uptr from, u8 imm8 )		{ SSEMtoR( 0xC60F, 1 ); write8( imm8 ); }
+
+void SSE_SHUFPS_RmOffset_to_XMM( x86SSERegType to, x86IntRegType from, int offset, u8 imm8 )
+{
+    RexRB(0, to, from);
+	write16(0xc60f);
+    WriteRmOffsetFrom(to, from, offset);
+	write8(imm8);
+}
+
+////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//PSHUFD: Shuffle Packed DoubleWords                                               *
+//**********************************************************************************
+void SSE2_PSHUFD_XMM_to_XMM( x86SSERegType to, x86SSERegType from, u8 imm8 )
+{
+	if( !cpucaps.hasStreamingSIMD2Extensions ) {
+		SSE2EMU_PSHUFD_XMM_to_XMM(to, from, imm8);
+	}
+	else {
+		SSERtoR66( 0x700F );
+		write8( imm8 );
+	}
+}
+void SSE2_PSHUFD_M128_to_XMM( x86SSERegType to, uptr from, u8 imm8 )	{ SSEMtoRv( 3, 0x700F66, 1 ); write8( imm8 ); }
+
+void SSE2_PSHUFLW_XMM_to_XMM( x86SSERegType to, x86SSERegType from, u8 imm8 ) { write8(0xF2); SSERtoR(0x700F); write8(imm8); }
+void SSE2_PSHUFLW_M128_to_XMM( x86SSERegType to, uptr from, u8 imm8 ) { SSEMtoRv(3, 0x700FF2, 1); write8(imm8); }
+void SSE2_PSHUFHW_XMM_to_XMM( x86SSERegType to, x86SSERegType from, u8 imm8 ) { SSE_SS_RtoR(0x700F); write8(imm8); }
+void SSE2_PSHUFHW_M128_to_XMM( x86SSERegType to, uptr from, u8 imm8 ) { SSE_SS_MtoR(0x700F, 1); write8(imm8); }
+
+///////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//UNPCKLPS: Unpack and Interleave low Packed Single-Precision FP Data              *
+//**********************************************************************************
+void SSE_UNPCKLPS_M128_to_XMM( x86SSERegType to, uptr from ) { SSEMtoR(0x140f, 0); }
+void SSE_UNPCKLPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )	{ SSERtoR( 0x140F ); }
+
+////////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//UNPCKHPS: Unpack and Interleave High Packed Single-Precision FP Data              *
+//**********************************************************************************
+void SSE_UNPCKHPS_M128_to_XMM( x86SSERegType to, uptr from ) { SSEMtoR(0x150f, 0); }
+void SSE_UNPCKHPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )	{ SSERtoR( 0x150F ); }
+
+////////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//DIVPS : Packed Single-Precision FP Divide                                       *
+//**********************************************************************************
+void SSE_DIVPS_M128_to_XMM( x86SSERegType to, uptr from )           { SSEMtoR( 0x5e0F, 0 ); }
+void SSE_DIVPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR( 0x5e0F ); }
+
+//////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//DIVSS : Scalar  Single-Precision FP Divide                                       *
+//**********************************************************************************
+void SSE_DIVSS_M32_to_XMM( x86SSERegType to, uptr from )           { SSE_SS_MtoR( 0x5e0F, 0 ); }
+void SSE_DIVSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSE_SS_RtoR( 0x5e0F ); }
+
+/////////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//STMXCSR : Store Streaming SIMD Extension Control/Status                         *
+//**********************************************************************************
+void SSE_STMXCSR( uptr from ) {
+	MEMADDR_OP(0, VAROP2(0x0F, 0xAE), false, 3, from, 0);
+}
+
+/////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//LDMXCSR : Load Streaming SIMD Extension Control/Status                         *
+//**********************************************************************************
+void SSE_LDMXCSR( uptr from ) {
+	MEMADDR_OP(0, VAROP2(0x0F, 0xAE), false, 2, from, 0);
+}
+
+/////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//PADDB,PADDW,PADDD : Add Packed Integers                                          *
+//**********************************************************************************
+void SSE2_PADDB_XMM_to_XMM(x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xFC0F ); }
+void SSE2_PADDB_M128_to_XMM(x86SSERegType to, uptr from ){ SSEMtoR66( 0xFC0F ); }
+void SSE2_PADDW_XMM_to_XMM(x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xFD0F ); }
+void SSE2_PADDW_M128_to_XMM(x86SSERegType to, uptr from ){ SSEMtoR66( 0xFD0F ); }
+void SSE2_PADDD_XMM_to_XMM(x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xFE0F ); }
+void SSE2_PADDD_M128_to_XMM(x86SSERegType to, uptr from ){ SSEMtoR66( 0xFE0F ); }
+
+void SSE2_PADDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from ) { SSERtoR66( 0xD40F ); }
+void SSE2_PADDQ_M128_to_XMM(x86SSERegType to, uptr from ) { SSEMtoR66( 0xD40F ); }
+
+///////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//PCMPxx: Compare Packed Integers                                                  *
+//**********************************************************************************
+void SSE2_PCMPGTB_XMM_to_XMM(x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0x640F ); }
+void SSE2_PCMPGTB_M128_to_XMM(x86SSERegType to, uptr from ){ SSEMtoR66( 0x640F ); }
+void SSE2_PCMPGTW_XMM_to_XMM(x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0x650F ); }
+void SSE2_PCMPGTW_M128_to_XMM(x86SSERegType to, uptr from ){ SSEMtoR66( 0x650F ); }
+void SSE2_PCMPGTD_XMM_to_XMM(x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0x660F ); }
+void SSE2_PCMPGTD_M128_to_XMM(x86SSERegType to, uptr from ){ SSEMtoR66( 0x660F ); }
+void SSE2_PCMPEQB_XMM_to_XMM(x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0x740F ); }
+void SSE2_PCMPEQB_M128_to_XMM(x86SSERegType to, uptr from ){ SSEMtoR66( 0x740F ); }
+void SSE2_PCMPEQW_XMM_to_XMM(x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0x750F ); }
+void SSE2_PCMPEQW_M128_to_XMM(x86SSERegType to, uptr from ){ SSEMtoR66( 0x750F ); }
+void SSE2_PCMPEQD_XMM_to_XMM(x86SSERegType to, x86SSERegType from )
+{
+	if( !cpucaps.hasStreamingSIMD2Extensions ) {
+		SSE_CMPEQPS_XMM_to_XMM(to, from);
+	}
+	else {
+		SSERtoR66( 0x760F );
+	}
+}
+
+void SSE2_PCMPEQD_M128_to_XMM(x86SSERegType to, uptr from )
+{
+	if( !cpucaps.hasStreamingSIMD2Extensions ) {
+		SSE_CMPEQPS_M128_to_XMM(to, from);
+	}
+	else {
+		SSEMtoR66( 0x760F );
+	}
+}
+
+////////////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//PEXTRW,PINSRW: Packed Extract/Insert Word                                        *
+//**********************************************************************************
+void SSE_PEXTRW_XMM_to_R32(x86IntRegType to, x86SSERegType from, u8 imm8 ){ SSERtoR66(0xC50F); write8( imm8 ); }
+void SSE_PINSRW_R32_to_XMM(x86SSERegType to, x86IntRegType from, u8 imm8 ){ SSERtoR66(0xC40F); write8( imm8 ); }
+
+////////////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//PSUBx: Subtract Packed Integers                                                  *
+//**********************************************************************************
+void SSE2_PSUBB_XMM_to_XMM(x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xF80F ); }
+void SSE2_PSUBB_M128_to_XMM(x86SSERegType to, uptr from ){ SSEMtoR66( 0xF80F ); }
+void SSE2_PSUBW_XMM_to_XMM(x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xF90F ); }
+void SSE2_PSUBW_M128_to_XMM(x86SSERegType to, uptr from ){ SSEMtoR66( 0xF90F ); }
+void SSE2_PSUBD_XMM_to_XMM(x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xFA0F ); }
+void SSE2_PSUBD_M128_to_XMM(x86SSERegType to, uptr from ){ SSEMtoR66( 0xFA0F ); }
+void SSE2_PSUBQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xFB0F ); }
+void SSE2_PSUBQ_M128_to_XMM(x86SSERegType to, uptr from ){ SSEMtoR66( 0xFB0F ); }
+
+///////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//MOVD: Move Dword(32bit) to /from XMM reg                                         *
+//**********************************************************************************
+void SSE2_MOVD_M32_to_XMM( x86SSERegType to, uptr from ) { SSEMtoR66(0x6E0F); }
+void SSE2_MOVD_R_to_XMM( x86SSERegType to, x86IntRegType from )
+{
+	if( !cpucaps.hasStreamingSIMD2Extensions ) {
+		SSE2EMU_MOVD_R_to_XMM(to, from);
+	}
+	else {
+		SSERtoR66(0x6E0F);
+	}
+}
+
+void SSE2_MOVD_Rm_to_XMM( x86SSERegType to, x86IntRegType from )
+{
+	write8(0x66);
+	RexRB(0, to, from);
+	write16( 0x6e0f );
+	ModRM( 0, to, from);
+}
+
+void SSE2_MOVD_RmOffset_to_XMM( x86SSERegType to, x86IntRegType from, int offset )
+{
+	write8(0x66);
+    RexRB(0, to, from);
+	write16( 0x6e0f );
+    WriteRmOffsetFrom(to, from, offset);
+}
+
+void SSE2_MOVD_XMM_to_M32( u32 to, x86SSERegType from ) { SSERtoM66(0x7E0F); }
+void SSE2_MOVD_XMM_to_R( x86IntRegType to, x86SSERegType from ) {
+	if( !cpucaps.hasStreamingSIMD2Extensions ) {
+		SSE2EMU_MOVD_XMM_to_R(to, from);
+	}
+	else {
+		_SSERtoR66(0x7E0F);
+	}
+}
+
+void SSE2_MOVD_XMM_to_Rm( x86IntRegType to, x86SSERegType from )
+{
+	write8(0x66);
+    RexRB(0, from, to);
+	write16( 0x7e0f );
+	ModRM( 0, from, to );
+}
+
+void SSE2_MOVD_XMM_to_RmOffset( x86IntRegType to, x86SSERegType from, int offset )
+{
+	if( !cpucaps.hasStreamingSIMD2Extensions ) {
+		SSE2EMU_MOVD_XMM_to_RmOffset(to, from, offset);
+	}
+	else {
+		write8(0x66);
+        RexRB(0, from, to);
+		write16( 0x7e0f );
+        WriteRmOffsetFrom(from, to, offset);
+	}
+}
+
+#ifdef __x86_64__
+void SSE2_MOVQ_XMM_to_R( x86IntRegType to, x86SSERegType from )
+{
+    assert( from < XMMREGS);
+    write8( 0x66 );
+	RexRB(1, from, to);
+	write16( 0x7e0f );
+	ModRM( 3, from, to );
+}
+
+void SSE2_MOVQ_R_to_XMM( x86SSERegType to, x86IntRegType from )
+{
+    assert( to < XMMREGS);
+    write8(0x66);
+    RexRB(1, to, from);
+	write16( 0x6e0f );
+	ModRM( 3, to, from );
+}
+
+#endif
+
+////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//POR : SSE Bitwise OR                                                             *
+//**********************************************************************************
+void SSE2_POR_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR66( 0xEB0F ); }
+void SSE2_POR_M128_to_XMM( x86SSERegType to, uptr from ) { SSEMtoR66( 0xEB0F ); }
+
+// logical and to &= from
+void SSE2_PAND_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR66( 0xDB0F ); }
+void SSE2_PAND_M128_to_XMM( x86SSERegType to, uptr from ) { SSEMtoR66( 0xDB0F ); }
+
+// to = (~to) & from
+void SSE2_PANDN_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR66( 0xDF0F ); }
+void SSE2_PANDN_M128_to_XMM( x86SSERegType to, uptr from ) { SSEMtoR66( 0xDF0F ); }
+
+/////////////////////////////////////////////////////////////////////////////////////
+//**********************************************************************************/
+//PXOR : SSE Bitwise XOR                                                             *
+//**********************************************************************************
+void SSE2_PXOR_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xEF0F ); }
+void SSE2_PXOR_M128_to_XMM( x86SSERegType to, uptr from ){ SSEMtoR66( 0xEF0F ); } 
+///////////////////////////////////////////////////////////////////////////////////////
+
+void SSE2_MOVDQA_M128_to_XMM(x86SSERegType to, uptr from) {SSEMtoR66(0x6F0F); }
+void SSE2_MOVDQA_XMM_to_M128( uptr to, x86SSERegType from ){SSERtoM66(0x7F0F);} 
+void SSE2_MOVDQA_XMM_to_XMM( x86SSERegType to, x86SSERegType from) { SSERtoR66(0x6F0F); }
+
+void SSE2_MOVDQU_M128_to_XMM(x86SSERegType to, uptr from) { SSE_SS_MtoR(0x6F0F, 0); }
+void SSE2_MOVDQU_XMM_to_M128( uptr to, x86SSERegType from) { SSE_SS_RtoM(0x7F0F, 0); }
+void SSE2_MOVDQU_XMM_to_XMM( x86SSERegType to, x86SSERegType from) { SSE_SS_RtoR(0x6F0F); }
+
+// shift right logical
+
+void SSE2_PSRLW_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66(0xD10F); }
+void SSE2_PSRLW_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66(0xD10F); }
+void SSE2_PSRLW_I8_to_XMM(x86SSERegType to, u8 imm8)
+{
+	write8( 0x66 );
+    RexB(0, to);
+	write16( 0x710F );
+	ModRM( 3, 2 , to );
+	write8( imm8 );
+}
+
+void SSE2_PSRLD_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66(0xD20F); }
+void SSE2_PSRLD_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66(0xD20F); }
+void SSE2_PSRLD_I8_to_XMM(x86SSERegType to, u8 imm8)
+{
+	write8( 0x66 );
+    RexB(0, to);
+	write16( 0x720F );
+	ModRM( 3, 2 , to ); 
+	write8( imm8 );
+}
+
+void SSE2_PSRLQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66(0xD30F); }
+void SSE2_PSRLQ_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66(0xD30F); }
+void SSE2_PSRLQ_I8_to_XMM(x86SSERegType to, u8 imm8)
+{
+	write8( 0x66 );
+    RexB(0, to);
+	write16( 0x730F );
+	ModRM( 3, 2 , to ); 
+	write8( imm8 );
+}
+
+void SSE2_PSRLDQ_I8_to_XMM(x86SSERegType to, u8 imm8)
+{
+	write8( 0x66 );
+    RexB(0, to);
+	write16( 0x730F );
+	ModRM( 3, 3 , to ); 
+	write8( imm8 );
+}
+
+// shift right arithmetic
+
+void SSE2_PSRAW_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66(0xE10F); }
+void SSE2_PSRAW_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66(0xE10F); }
+void SSE2_PSRAW_I8_to_XMM(x86SSERegType to, u8 imm8)
+{
+	write8( 0x66 );
+    RexB(0, to);
+	write16( 0x710F );
+	ModRM( 3, 4 , to );
+	write8( imm8 );
+}
+
+void SSE2_PSRAD_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66(0xE20F); }
+void SSE2_PSRAD_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66(0xE20F); }
+void SSE2_PSRAD_I8_to_XMM(x86SSERegType to, u8 imm8)
+{
+	write8( 0x66 );
+    RexB(0, to);
+	write16( 0x720F );
+	ModRM( 3, 4 , to );
+	write8( imm8 );
+}
+
+// shift left logical
+
+void SSE2_PSLLW_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66(0xF10F); }
+void SSE2_PSLLW_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66(0xF10F); }
+void SSE2_PSLLW_I8_to_XMM(x86SSERegType to, u8 imm8)
+{
+	write8( 0x66 );
+    RexB(0, to);
+	write16( 0x710F );
+	ModRM( 3, 6 , to );
+	write8( imm8 );
+}
+
+void SSE2_PSLLD_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66(0xF20F); }
+void SSE2_PSLLD_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66(0xF20F); }
+void SSE2_PSLLD_I8_to_XMM(x86SSERegType to, u8 imm8)
+{
+	write8( 0x66 );
+    RexB(0, to);
+	write16( 0x720F );
+	ModRM( 3, 6 , to );
+	write8( imm8 );
+}
+
+void SSE2_PSLLQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66(0xF30F); }
+void SSE2_PSLLQ_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66(0xF30F); }
+void SSE2_PSLLQ_I8_to_XMM(x86SSERegType to, u8 imm8)
+{
+	write8( 0x66 );
+    RexB(0, to);
+	write16( 0x730F );
+	ModRM( 3, 6 , to );
+	write8( imm8 );
+}
+
+void SSE2_PSLLDQ_I8_to_XMM(x86SSERegType to, u8 imm8)
+{
+	write8( 0x66 );
+    RexB(0, to);
+	write16( 0x730F );
+	ModRM( 3, 7 , to ); 
+	write8( imm8 );
+}
+
+
+void SSE2_PMAXSW_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xEE0F ); }
+void SSE2_PMAXSW_M128_to_XMM( x86SSERegType to, uptr from ){ SSEMtoR66( 0xEE0F ); }
+
+void SSE2_PMAXUB_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xDE0F ); }
+void SSE2_PMAXUB_M128_to_XMM( x86SSERegType to, uptr from ){ SSEMtoR66( 0xDE0F ); }
+
+void SSE2_PMINSW_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xEA0F ); }
+void SSE2_PMINSW_M128_to_XMM( x86SSERegType to, uptr from ){ SSEMtoR66( 0xEA0F ); }
+
+void SSE2_PMINUB_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xDA0F ); }
+void SSE2_PMINUB_M128_to_XMM( x86SSERegType to, uptr from ){ SSEMtoR66( 0xDA0F ); }
+
+//
+
+void SSE2_PADDSB_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xEC0F ); }
+void SSE2_PADDSB_M128_to_XMM( x86SSERegType to, uptr from ){ SSEMtoR66( 0xEC0F ); }
+
+void SSE2_PADDSW_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xED0F ); }
+void SSE2_PADDSW_M128_to_XMM( x86SSERegType to, uptr from ){ SSEMtoR66( 0xED0F ); }
+
+void SSE2_PSUBSB_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xE80F ); }
+void SSE2_PSUBSB_M128_to_XMM( x86SSERegType to, uptr from ){ SSEMtoR66( 0xE80F ); }
+
+void SSE2_PSUBSW_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xE90F ); }
+void SSE2_PSUBSW_M128_to_XMM( x86SSERegType to, uptr from ){ SSEMtoR66( 0xE90F ); }
+
+void SSE2_PSUBUSB_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR66( 0xD80F ); }
+void SSE2_PSUBUSB_M128_to_XMM( x86SSERegType to, uptr from ) { SSEMtoR66( 0xD80F ); }
+void SSE2_PSUBUSW_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR66( 0xD90F ); }
+void SSE2_PSUBUSW_M128_to_XMM( x86SSERegType to, uptr from ) { SSEMtoR66( 0xD90F ); }
+
+void SSE2_PADDUSB_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR66( 0xDC0F ); }
+void SSE2_PADDUSB_M128_to_XMM( x86SSERegType to, uptr from ) { SSEMtoR66( 0xDC0F ); }
+void SSE2_PADDUSW_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR66( 0xDD0F ); }
+void SSE2_PADDUSW_M128_to_XMM( x86SSERegType to, uptr from ) { SSEMtoR66( 0xDD0F ); }
+
+//**********************************************************************************/
+//PACKSSWB,PACKSSDW: Pack Saturate Signed Word
+//**********************************************************************************
+void SSE2_PACKSSWB_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0x630F ); }
+void SSE2_PACKSSWB_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0x630F ); }
+void SSE2_PACKSSDW_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0x6B0F ); }
+void SSE2_PACKSSDW_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0x6B0F ); }
+
+void SSE2_PACKUSWB_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0x670F ); }
+void SSE2_PACKUSWB_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0x670F ); }
+
+//**********************************************************************************/
+//PUNPCKHWD: Unpack 16bit high
+//**********************************************************************************
+void SSE2_PUNPCKLBW_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0x600F ); }
+void SSE2_PUNPCKLBW_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0x600F ); }
+
+void SSE2_PUNPCKHBW_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0x680F ); }
+void SSE2_PUNPCKHBW_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0x680F ); }
+
+void SSE2_PUNPCKLWD_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0x610F ); }
+void SSE2_PUNPCKLWD_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0x610F ); }
+void SSE2_PUNPCKHWD_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0x690F ); }
+void SSE2_PUNPCKHWD_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0x690F ); }
+
+void SSE2_PUNPCKLDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0x620F ); }
+void SSE2_PUNPCKLDQ_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0x620F ); }
+void SSE2_PUNPCKHDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0x6A0F ); }
+void SSE2_PUNPCKHDQ_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0x6A0F ); }
+
+void SSE2_PUNPCKLQDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0x6C0F ); }
+void SSE2_PUNPCKLQDQ_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0x6C0F ); }
+
+void SSE2_PUNPCKHQDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0x6D0F ); }
+void SSE2_PUNPCKHQDQ_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0x6D0F ); }
+
+void SSE2_PMULLW_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0xD50F ); }
+void SSE2_PMULLW_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0xD50F ); }
+void SSE2_PMULHW_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0xE50F ); }
+void SSE2_PMULHW_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0xE50F ); }
+
+void SSE2_PMULUDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0xF40F ); }
+void SSE2_PMULUDQ_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0xF40F ); }
+
+void SSE2_PMOVMSKB_XMM_to_R32(x86IntRegType to, x86SSERegType from) { SSERtoR66(0xD70F); }
+
+void SSE_MOVMSKPS_XMM_to_R32(x86IntRegType to, x86SSERegType from) { SSERtoR(0x500F); }
+void SSE2_MOVMSKPD_XMM_to_R32(x86IntRegType to, x86SSERegType from) { SSERtoR66(0x500F); }
+
+void SSE3_HADDPS_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { write8(0xf2); SSERtoR( 0x7c0f ); }
+void SSE3_HADDPS_M128_to_XMM(x86SSERegType to, uptr from){ SSEMtoRv( 3, 0x7c0fF2, 0 ); }
+
+void SSE3_MOVSLDUP_XMM_to_XMM(x86SSERegType to, x86SSERegType from) {
+	write8(0xf3);
+    RexRB(0, to, from);
+	write16( 0x120f);
+	ModRM( 3, to, from );
+}
+
+void SSE3_MOVSLDUP_M128_to_XMM(x86SSERegType to, uptr from) { SSE_SS_MtoR(0x120f, 0); }
+void SSE3_MOVSHDUP_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSE_SS_RtoR(0x160f); }
+void SSE3_MOVSHDUP_M128_to_XMM(x86SSERegType to, uptr from) { SSE_SS_MtoR(0x160f, 0); }
+
+// SSE-X
+void SSEX_MOVDQA_M128_to_XMM( x86SSERegType to, uptr from )
+{
+	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[to] == XMMT_INT ) SSE2_MOVDQA_M128_to_XMM(to, from);
+	else SSE_MOVAPS_M128_to_XMM(to, from);
+}
+
+void SSEX_MOVDQA_XMM_to_M128( uptr to, x86SSERegType from )
+{
+	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[from] == XMMT_INT ) SSE2_MOVDQA_XMM_to_M128(to, from);
+	else SSE_MOVAPS_XMM_to_M128(to, from);
+}
+
+void SSEX_MOVDQA_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
+{
+	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[from] == XMMT_INT ) SSE2_MOVDQA_XMM_to_XMM(to, from);
+	else SSE_MOVAPS_XMM_to_XMM(to, from);
+}
+
+void SSEX_MOVDQARmtoROffset( x86SSERegType to, x86IntRegType from, int offset )
+{
+	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[to] == XMMT_INT ) SSE2_MOVDQARmtoROffset(to, from, offset);
+	else SSE_MOVAPSRmtoROffset(to, from, offset);
+}
+
+void SSEX_MOVDQARtoRmOffset( x86IntRegType to, x86SSERegType from, int offset )
+{
+	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[from] == XMMT_INT ) SSE2_MOVDQARtoRmOffset(to, from, offset);
+	else SSE_MOVAPSRtoRmOffset(to, from, offset);
+}
+
+void SSEX_MOVDQU_M128_to_XMM( x86SSERegType to, uptr from )
+{
+	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[to] == XMMT_INT ) SSE2_MOVDQU_M128_to_XMM(to, from);
+	else SSE_MOVAPS_M128_to_XMM(to, from);
+}
+
+void SSEX_MOVDQU_XMM_to_M128( uptr to, x86SSERegType from )
+{
+	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[from] == XMMT_INT ) SSE2_MOVDQU_XMM_to_M128(to, from);
+	else SSE_MOVAPS_XMM_to_M128(to, from);
+}
+
+void SSEX_MOVDQU_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
+{
+	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[from] == XMMT_INT ) SSE2_MOVDQU_XMM_to_XMM(to, from);
+	else SSE_MOVAPS_XMM_to_XMM(to, from);
+}
+
+void SSEX_MOVD_M32_to_XMM( x86SSERegType to, uptr from )
+{
+	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[to] == XMMT_INT ) SSE2_MOVD_M32_to_XMM(to, from);
+	else SSE_MOVSS_M32_to_XMM(to, from);
+}
+
+void SSEX_MOVD_XMM_to_M32( u32 to, x86SSERegType from )
+{
+	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[from] == XMMT_INT ) SSE2_MOVD_XMM_to_M32(to, from);
+	else SSE_MOVSS_XMM_to_M32(to, from);
+}
+
+void SSEX_MOVD_XMM_to_Rm( x86IntRegType to, x86SSERegType from )
+{
+	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[from] == XMMT_INT ) SSE2_MOVD_XMM_to_Rm(to, from);
+	else SSE_MOVSS_XMM_to_Rm(to, from);
+}
+
+void SSEX_MOVD_RmOffset_to_XMM( x86SSERegType to, x86IntRegType from, int offset )
+{
+	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[to] == XMMT_INT ) SSE2_MOVD_RmOffset_to_XMM(to, from, offset);
+	else SSE_MOVSS_RmOffset_to_XMM(to, from, offset);
+}
+
+void SSEX_MOVD_XMM_to_RmOffset( x86IntRegType to, x86SSERegType from, int offset )
+{
+	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[from] == XMMT_INT ) SSE2_MOVD_XMM_to_RmOffset(to, from, offset);
+	else SSE_MOVSS_XMM_to_RmOffset(to, from, offset);
+}
+
+void SSEX_POR_M128_to_XMM( x86SSERegType to, uptr from )
+{
+	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[to] == XMMT_INT ) SSE2_POR_M128_to_XMM(to, from);
+	else SSE_ORPS_M128_to_XMM(to, from);
+}
+
+void SSEX_POR_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
+{
+	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[from] == XMMT_INT ) SSE2_POR_XMM_to_XMM(to, from);
+	else SSE_ORPS_XMM_to_XMM(to, from);
+}
+
+void SSEX_PXOR_M128_to_XMM( x86SSERegType to, uptr from )
+{
+	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[to] == XMMT_INT ) SSE2_PXOR_M128_to_XMM(to, from);
+	else SSE_XORPS_M128_to_XMM(to, from);
+}
+
+void SSEX_PXOR_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
+{
+	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[from] == XMMT_INT ) SSE2_PXOR_XMM_to_XMM(to, from);
+	else SSE_XORPS_XMM_to_XMM(to, from);
+}
+
+void SSEX_PAND_M128_to_XMM( x86SSERegType to, uptr from )
+{
+	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[to] == XMMT_INT ) SSE2_PAND_M128_to_XMM(to, from);
+	else SSE_ANDPS_M128_to_XMM(to, from);
+}
+
+void SSEX_PAND_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
+{
+	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[from] == XMMT_INT ) SSE2_PAND_XMM_to_XMM(to, from);
+	else SSE_ANDPS_XMM_to_XMM(to, from);
+}
+
+void SSEX_PANDN_M128_to_XMM( x86SSERegType to, uptr from )
+{
+	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[to] == XMMT_INT ) SSE2_PANDN_M128_to_XMM(to, from);
+	else SSE_ANDNPS_M128_to_XMM(to, from);
+}
+
+void SSEX_PANDN_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
+{
+	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[from] == XMMT_INT ) SSE2_PANDN_XMM_to_XMM(to, from);
+	else SSE_ANDNPS_XMM_to_XMM(to, from);
+}
+
+void SSEX_PUNPCKLDQ_M128_to_XMM(x86SSERegType to, uptr from)
+{
+	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[to] == XMMT_INT ) SSE2_PUNPCKLDQ_M128_to_XMM(to, from);
+	else SSE_UNPCKLPS_M128_to_XMM(to, from);
+}
+
+void SSEX_PUNPCKLDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from)
+{
+	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[from] == XMMT_INT ) SSE2_PUNPCKLDQ_XMM_to_XMM(to, from);
+	else SSE_UNPCKLPS_XMM_to_XMM(to, from);
+}
+
+void SSEX_PUNPCKHDQ_M128_to_XMM(x86SSERegType to, uptr from)
+{
+	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[to] == XMMT_INT ) SSE2_PUNPCKHDQ_M128_to_XMM(to, from);
+	else SSE_UNPCKHPS_M128_to_XMM(to, from);
+}
+
+void SSEX_PUNPCKHDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from)
+{
+	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[from] == XMMT_INT ) SSE2_PUNPCKHDQ_XMM_to_XMM(to, from);
+	else SSE_UNPCKHPS_XMM_to_XMM(to, from);
+}
+
+void SSEX_MOVHLPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
+{
+	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[from] == XMMT_INT ) {
+		SSE2_PUNPCKHQDQ_XMM_to_XMM(to, from);
+		if( to != from ) SSE2_PSHUFD_XMM_to_XMM(to, to, 0x4e);
+	}
+	else {
+		SSE_MOVHLPS_XMM_to_XMM(to, from);
+	}
+}
+
+// SSE2 emulation
+void SSE2EMU_MOVSD_XMM_to_XMM( x86SSERegType to, x86SSERegType from)
+{
+	SSE_SHUFPS_XMM_to_XMM(to, from, 0x4e);
+	SSE_SHUFPS_XMM_to_XMM(to, to, 0x4e);
+}
+
+void SSE2EMU_MOVQ_M64_to_XMM( x86SSERegType to, uptr from)
+{
+	SSE_XORPS_XMM_to_XMM(to, to);
+	SSE_MOVLPS_M64_to_XMM(to, from);
+}
+
+void SSE2EMU_MOVQ_XMM_to_XMM( x86SSERegType to, x86SSERegType from)
+{
+	SSE_XORPS_XMM_to_XMM(to, to);
+	SSE2EMU_MOVSD_XMM_to_XMM(to, from);
+}
+
+void SSE2EMU_MOVD_RmOffset_to_XMM( x86SSERegType to, x86IntRegType from, int offset )
+{
+	MOV32RmtoROffset(EAX, from, offset);
+	MOV32ItoM((uptr)p+4, 0);
+	MOV32ItoM((uptr)p+8, 0);
+	MOV32RtoM((uptr)p, EAX);
+	MOV32ItoM((uptr)p+12, 0);
+	SSE_MOVAPS_M128_to_XMM(to, (uptr)p);
+}
+
+void SSE2EMU_MOVD_XMM_to_RmOffset(x86IntRegType to, x86SSERegType from, int offset )
+{
+	SSE_MOVSS_XMM_to_M32((uptr)p, from);
+	MOV32MtoR(EAX, (uptr)p);
+	MOV32RtoRmOffset(to, EAX, offset);
+}
+
+#ifndef __x86_64__
+extern void SetMMXstate();
+
+void SSE2EMU_MOVDQ2Q_XMM_to_MM( x86MMXRegType to, x86SSERegType from)
+{
+	SSE_MOVLPS_XMM_to_M64(p, from);
+	MOVQMtoR(to, p);
+	SetMMXstate();
+}
+
+void SSE2EMU_MOVQ2DQ_MM_to_XMM( x86SSERegType to, x86MMXRegType from)
+{
+	MOVQRtoM(p, from);
+	SSE_MOVLPS_M64_to_XMM(to, p);
+	SetMMXstate();
+}
+#endif
+
+/****************************************************************************/
+/*  SSE2 Emulated functions for SSE CPU's by kekko							*/
+/****************************************************************************/
+void SSE2EMU_PSHUFD_XMM_to_XMM( x86SSERegType to, x86SSERegType from, u8 imm8 ) {
+	MOV64ItoR(EAX, (uptr)&p);
+	MOV64ItoR(EBX, (uptr)&p2);
+	SSE_MOVUPSRtoRm(EAX, from);
+
+	MOV32ItoR(ECX, (u32)imm8);
+	AND32ItoR(ECX, 3);
+	SHL32ItoR(ECX, 2);
+	ADD32RtoR(ECX, EAX);
+	MOV32RmtoR(ECX, ECX);
+	MOV32RtoRm(EBX, ECX);
+
+	ADD32ItoR(EBX, 4);
+	MOV32ItoR(ECX, (u32)imm8);
+	SHR32ItoR(ECX, 2);
+	AND32ItoR(ECX, 3);
+	SHL32ItoR(ECX, 2);
+	ADD32RtoR(ECX, EAX);
+	MOV32RmtoR(ECX, ECX);
+	MOV32RtoRm(EBX, ECX);
+
+	ADD32ItoR(EBX, 4);
+	MOV32ItoR(ECX, (u32)imm8);
+	SHR32ItoR(ECX, 4);
+	AND32ItoR(ECX, 3);
+	SHL32ItoR(ECX, 2);
+	ADD32RtoR(ECX, EAX);
+	MOV32RmtoR(ECX, ECX);
+	MOV32RtoRm(EBX, ECX);
+
+	ADD32ItoR(EBX, 4);
+	MOV32ItoR(ECX, (u32)imm8);
+	SHR32ItoR(ECX, 6);
+	AND32ItoR(ECX, 3);
+	SHL32ItoR(ECX, 2);
+	ADD32RtoR(ECX, EAX);
+	MOV32RmtoR(ECX, ECX);
+	MOV32RtoRm(EBX, ECX);
+
+	SUB32ItoR(EBX, 12);
+
+	SSE_MOVUPSRmtoR(to, EBX);
+}
+
+void SSE2EMU_MOVD_XMM_to_R( x86IntRegType to, x86SSERegType from ) {
+	/* XXX? */
+	MOV64ItoR(to, (uptr)&p);
+	SSE_MOVUPSRtoRm(to, from);
+	MOV32RmtoR(to, to);
+}
+
+#ifndef __x86_64__
+extern void SetFPUstate();
+extern void _freeMMXreg(int mmxreg);
+#endif
+
+void SSE2EMU_CVTPS2DQ_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) {
+#ifndef __x86_64__
+    SetFPUstate();
+	_freeMMXreg(7);
+#endif
+	SSE_MOVAPS_XMM_to_M128((uptr)f, from);
+	
+	FLD32((uptr)&f[0]);
+	FISTP32((uptr)&p2[0]);
+	FLD32((uptr)&f[1]);
+	FISTP32((uptr)&p2[1]);
+	FLD32((uptr)&f[2]);
+	FISTP32((uptr)&p2[2]);
+	FLD32((uptr)&f[3]);
+	FISTP32((uptr)&p2[3]);
+
+	SSE_MOVAPS_M128_to_XMM(to, (uptr)p2);
+}
+
+void SSE2EMU_CVTDQ2PS_M128_to_XMM( x86SSERegType to, uptr from ) {
+#ifndef __x86_64__
+    SetFPUstate();
+	_freeMMXreg(7);
+#endif
+	FILD32(from);
+	FSTP32((uptr)&f[0]);
+	FILD32(from+4);
+	FSTP32((uptr)&f[1]);
+	FILD32(from+8);
+	FSTP32((uptr)&f[2]);
+	FILD32(from+12);
+	FSTP32((uptr)&f[3]);
+
+	SSE_MOVAPS_M128_to_XMM(to, (uptr)f);
+}
+
+void SSE2EMU_MOVD_XMM_to_M32( uptr to, x86SSERegType from ) {
+	/* XXX? */
+	MOV64ItoR(EAX, (uptr)&p);
+	SSE_MOVUPSRtoRm(EAX, from);
+	MOV32RmtoR(EAX, EAX);
+	MOV32RtoM(to, EAX);
+}
+
+void SSE2EMU_MOVD_R_to_XMM( x86SSERegType to, x86IntRegType from ) {
+	MOV32ItoM((uptr)p+4, 0);
+	MOV32ItoM((uptr)p+8, 0);
+	MOV32RtoM((uptr)p, from);
+	MOV32ItoM((uptr)p+12, 0);
+	SSE_MOVAPS_M128_to_XMM(to, (uptr)p);
+}
+
+#endif
diff --git a/libpcsxcore/mdec.c b/libpcsxcore/mdec.c
new file mode 100644
index 0000000..5e84152
--- /dev/null
+++ b/libpcsxcore/mdec.c
@@ -0,0 +1,565 @@
+/***************************************************************************
+ *   Copyright (C) 2010 Gabriele Gorla                                     *
+ *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+#include "mdec.h"
+
+#define DSIZE			8
+#define DSIZE2			(DSIZE * DSIZE)
+
+#define SCALE(x, n)		((x) >> (n))
+#define SCALER(x, n)	(((x) + ((1 << (n)) >> 1)) >> (n))
+
+#define AAN_CONST_BITS			12
+#define AAN_PRESCALE_BITS		16
+
+#define AAN_CONST_SIZE			24
+#define AAN_CONST_SCALE			(AAN_CONST_SIZE - AAN_CONST_BITS)
+
+#define AAN_PRESCALE_SIZE		20
+#define AAN_PRESCALE_SCALE		(AAN_PRESCALE_SIZE-AAN_PRESCALE_BITS)
+#define AAN_EXTRA				12
+
+#define FIX_1_082392200		SCALER(18159528, AAN_CONST_SCALE) // B6
+#define FIX_1_414213562		SCALER(23726566, AAN_CONST_SCALE) // A4
+#define FIX_1_847759065		SCALER(31000253, AAN_CONST_SCALE) // A2
+#define FIX_2_613125930		SCALER(43840978, AAN_CONST_SCALE) // B2
+
+#define MULS(var, const)	(SCALE((var) * (const), AAN_CONST_BITS))
+
+#define	RLE_RUN(a)	((a) >> 10)
+#define	RLE_VAL(a)	(((int)(a) << (sizeof(int) * 8 - 10)) >> (sizeof(int) * 8 - 10))
+
+#if 0
+static void printmatrixu8(u8 *m) {
+	int i;
+	for(i = 0; i < DSIZE2; i++) {
+		printf("%3d ",m[i]);
+		if((i+1) % 8 == 0) printf("\n");
+	}
+}
+#endif
+
+static inline void fillcol(int *blk, int val) {
+	blk[0 * DSIZE] = blk[1 * DSIZE] = blk[2 * DSIZE] = blk[3 * DSIZE]
+		= blk[4 * DSIZE] = blk[5 * DSIZE] = blk[6 * DSIZE] = blk[7 * DSIZE] = val;
+}
+
+static inline void fillrow(int *blk, int val) {
+	blk[0] = blk[1] = blk[2] = blk[3]
+		= blk[4] = blk[5] = blk[6] = blk[7] = val;
+}
+
+void idct(int *block,int used_col) {
+	int tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7;
+	int z5, z10, z11, z12, z13;
+	int *ptr;
+	int i;
+
+	// the block has only the DC coefficient
+	if (used_col == -1) { 
+		int v = block[0];
+		for (i = 0; i < DSIZE2; i++) block[i] = v;
+		return;
+	}
+
+	// last_col keeps track of the highest column with non zero coefficients
+	ptr = block;
+	for (i = 0; i < DSIZE; i++, ptr++) {
+		if ((used_col & (1 << i)) == 0) {
+			// the column is empty or has only the DC coefficient
+			if (ptr[DSIZE * 0]) {
+				fillcol(ptr, ptr[0]);
+				used_col |= (1 << i);
+			}
+			continue;
+		}
+
+		// further optimization could be made by keeping track of 
+		// last_row in rl2blk
+		z10 = ptr[DSIZE * 0] + ptr[DSIZE * 4]; // s04
+		z11 = ptr[DSIZE * 0] - ptr[DSIZE * 4]; // d04
+		z13 = ptr[DSIZE * 2] + ptr[DSIZE * 6]; // s26
+		z12 = MULS(ptr[DSIZE * 2] - ptr[DSIZE * 6], FIX_1_414213562) - z13; 
+		//^^^^  d26=d26*2*A4-s26
+
+		tmp0 = z10 + z13; // os07 = s04 + s26
+		tmp3 = z10 - z13; // os34 = s04 - s26
+		tmp1 = z11 + z12; // os16 = d04 + d26
+		tmp2 = z11 - z12; // os25 = d04 - d26
+
+		z13 = ptr[DSIZE * 3] + ptr[DSIZE * 5]; //s53
+		z10 = ptr[DSIZE * 3] - ptr[DSIZE * 5]; //-d53 
+		z11 = ptr[DSIZE * 1] + ptr[DSIZE * 7]; //s17
+		z12 = ptr[DSIZE * 1] - ptr[DSIZE * 7]; //d17
+
+		tmp7 = z11 + z13; // od07 = s17 + s53
+
+		z5 = (z12 - z10) * (FIX_1_847759065); 
+		tmp6 = SCALE(z10*(FIX_2_613125930) + z5, AAN_CONST_BITS) - tmp7; 
+		tmp5 = MULS(z11 - z13, FIX_1_414213562) - tmp6;
+		tmp4 = SCALE(z12*(FIX_1_082392200) - z5, AAN_CONST_BITS) + tmp5; 
+
+		// path #1
+		//z5 = (z12 - z10)* FIX_1_847759065; 
+		// tmp0 = (d17 + d53) * 2*A2
+
+		//tmp6 = DESCALE(z10*FIX_2_613125930 + z5, CONST_BITS) - tmp7; 
+		// od16 = (d53*-2*B2 + tmp0) - od07
+
+		//tmp4 = DESCALE(z12*FIX_1_082392200 - z5, CONST_BITS) + tmp5; 
+		// od34 = (d17*2*B6 - tmp0) + od25
+
+		// path #2
+
+		// od34 = d17*2*(B6-A2) - d53*2*A2
+		// od16 = d53*2*(A2-B2) + d17*2*A2
+
+		// end
+
+		//    tmp5 = MULS(z11 - z13, FIX_1_414213562) - tmp6;
+		// od25 = (s17 - s53)*2*A4 - od16
+
+		ptr[DSIZE * 0] = (tmp0 + tmp7); // os07 + od07
+		ptr[DSIZE * 7] = (tmp0 - tmp7); // os07 - od07
+		ptr[DSIZE * 1] = (tmp1 + tmp6); // os16 + od16
+		ptr[DSIZE * 6] = (tmp1 - tmp6); // os16 - od16
+		ptr[DSIZE * 2] = (tmp2 + tmp5); // os25 + od25
+		ptr[DSIZE * 5] = (tmp2 - tmp5); // os25 - od25
+		ptr[DSIZE * 4] = (tmp3 + tmp4); // os34 + od34
+		ptr[DSIZE * 3] = (tmp3 - tmp4); // os34 - od34
+	}
+
+	ptr = block;
+	if (used_col == 1) {
+		for (i = 0; i < DSIZE; i++)
+			fillrow(block + DSIZE * i, block[DSIZE * i]);    
+	} else {
+		for (i = 0; i < DSIZE; i++, ptr += DSIZE) {
+			z10 = ptr[0] + ptr[4];
+			z11 = ptr[0] - ptr[4];
+			z13 = ptr[2] + ptr[6];
+			z12 = MULS(ptr[2] - ptr[6], FIX_1_414213562) - z13;
+
+			tmp0 = z10 + z13;
+			tmp3 = z10 - z13;
+			tmp1 = z11 + z12;
+			tmp2 = z11 - z12;
+			
+			z13 = ptr[3] + ptr[5];
+			z10 = ptr[3] - ptr[5];
+			z11 = ptr[1] + ptr[7];
+			z12 = ptr[1] - ptr[7];
+
+			tmp7 = z11 + z13;
+			z5 = (z12 - z10) * FIX_1_847759065; 
+			tmp6 = SCALE(z10 * FIX_2_613125930 + z5, AAN_CONST_BITS) - tmp7;
+			tmp5 = MULS(z11 - z13, FIX_1_414213562) - tmp6;
+			tmp4 = SCALE(z12 * FIX_1_082392200 - z5, AAN_CONST_BITS) + tmp5;
+
+			ptr[0] = tmp0 + tmp7;
+
+			ptr[7] = tmp0 - tmp7;
+			ptr[1] = tmp1 + tmp6;
+			ptr[6] = tmp1 - tmp6;
+			ptr[2] = tmp2 + tmp5;
+			ptr[5] = tmp2 - tmp5;
+			ptr[4] = tmp3 + tmp4;
+			ptr[3] = tmp3 - tmp4;
+		}
+	}
+}
+
+// mdec0: command register
+#define MDEC0_STP			0x02000000
+#define MDEC0_RGB24			0x08000000
+#define MDEC0_SIZE_MASK		0xFFFF
+
+// mdec1: status register
+#define MDEC1_BUSY			0x20000000
+#define MDEC1_DREQ			0x18000000
+#define MDEC1_FIFO			0xc0000000
+#define MDEC1_RGB24			0x02000000
+#define MDEC1_STP			0x00800000
+#define MDEC1_RESET			0x80000000
+
+struct {
+    u32 reg0;
+    u32 reg1;
+    unsigned short *rl;
+    int rlsize;
+} mdec;
+
+static int iq_y[DSIZE2], iq_uv[DSIZE2];
+
+static int zscan[DSIZE2] = {
+	0 , 1 , 8 , 16, 9 , 2 , 3 , 10,
+	17, 24, 32, 25, 18, 11, 4 , 5 ,
+	12, 19, 26, 33, 40, 48, 41, 34,
+	27, 20, 13, 6 , 7 , 14, 21, 28,
+	35, 42, 49, 56, 57, 50, 43, 36,
+	29, 22, 15, 23, 30, 37, 44, 51,
+	58, 59, 52, 45, 38, 31, 39, 46,
+	53, 60, 61, 54, 47, 55, 62, 63
+};
+
+static int aanscales[DSIZE2] = {
+	1048576, 1454417, 1370031, 1232995, 1048576,  823861, 567485, 289301,
+	1454417, 2017334, 1900287, 1710213, 1454417, 1142728, 787125, 401273,
+	1370031, 1900287, 1790031, 1610986, 1370031, 1076426, 741455, 377991,
+	1232995, 1710213, 1610986, 1449849, 1232995,  968758, 667292, 340183,
+	1048576, 1454417, 1370031, 1232995, 1048576,  823861, 567485, 289301,
+	823861,  1142728, 1076426, 968758,  823861,  647303, 445870, 227303,
+	567485,  787125,  741455,  667292,  567485,  445870, 307121, 156569,
+	289301,  401273,  377991,  340183,  289301,  227303, 156569,  79818
+};
+
+static void iqtab_init(int *iqtab, unsigned char *iq_y) {
+	int i;
+
+	for (i = 0; i < DSIZE2; i++) {
+		iqtab[i] = (iq_y[i] * SCALER(aanscales[zscan[i]], AAN_PRESCALE_SCALE));
+	}
+}
+
+#define	MDEC_END_OF_DATA	0xfe00
+
+unsigned short *rl2blk(int *blk, unsigned short *mdec_rl) {
+	int i, k, q_scale, rl, used_col;
+ 	int *iqtab;
+
+	memset(blk, 0, 6 * DSIZE2 * sizeof(int));
+	iqtab = iq_uv;
+	for (i = 0; i < 6; i++) {
+		// decode blocks (Cr,Cb,Y1,Y2,Y3,Y4)
+		if (i == 2) iqtab = iq_y;
+
+		rl = SWAP16(*mdec_rl); mdec_rl++;
+		q_scale = RLE_RUN(rl);
+		blk[0] = SCALER(iqtab[0] * RLE_VAL(rl), AAN_EXTRA - 3);
+		for (k = 0, used_col = 0;;) {
+			rl = SWAP16(*mdec_rl); mdec_rl++;
+			if (rl == MDEC_END_OF_DATA) break;
+			k += RLE_RUN(rl) + 1;	// skip zero-coefficients
+
+			if (k > 63) {
+				// printf("run lenght exceeded 64 enties\n");
+				break;
+			}
+
+			// zigzag transformation
+			blk[zscan[k]] = SCALER(RLE_VAL(rl) * iqtab[k] * q_scale, AAN_EXTRA);
+			// keep track of used columns to speed up the idtc
+			used_col |= (zscan[k] > 7) ? 1 << (zscan[k] & 7) : 0;
+		}
+
+		if (k == 0) used_col = -1;
+		// used_col is -1 for blocks with only the DC coefficient
+		// any other value is a bitmask of the columns that have 
+		// at least one non zero cofficient in the rows 1-7
+		// single coefficients in row 0 are treted specially 
+		// in the idtc function
+		idct(blk, used_col);
+		blk += DSIZE2;
+	}
+	return mdec_rl;
+}
+
+// full scale (JPEG)
+// Y/Cb/Cr[0...255] -> R/G/B[0...255]
+// R = 1.000 * (Y) + 1.400 * (Cr - 128)
+// G = 1.000 * (Y) - 0.343 * (Cb - 128) - 0.711 (Cr - 128)
+// B = 1.000 * (Y) + 1.765 * (Cb - 128)
+#define	MULR(a)			((1434 * (a))) 
+#define	MULB(a)			((1807 * (a))) 
+#define	MULG2(a, b)		((-351 * (a) - 728 * (b)))
+#define MULY(a)			((a) << 10)
+
+#define	MAKERGB15(r, g, b, a)	(SWAP16(a | ((b) << 10) | ((g) << 5) | (r)))
+#define	SCALE8(c)				SCALER(c, 20) 
+#define SCALE5(c)				SCALER(c, 23)
+
+#define CLAMP5(c)	( ((c) < -16) ? 0 : (((c) > (31 - 16)) ? 31 : ((c) + 16)) )
+#define CLAMP8(c)	( ((c) < -128) ? 0 : (((c) > (255 - 128)) ? 255 : ((c) + 128)) )
+
+#define CLAMP_SCALE8(a)   (CLAMP8(SCALE8(a)))
+#define CLAMP_SCALE5(a)   (CLAMP5(SCALE5(a)))
+
+static inline void putlinebw15(unsigned short *image, int *Yblk) {
+	int i;
+	int A = (mdec.reg0 & MDEC0_STP) ? 0x8000 : 0;
+
+	for (i = 0; i < 8; i++, Yblk++) {
+		int Y = *Yblk;
+		// missing rounding
+		image[i] = SWAP16((CLAMP5(Y >> 3) * 0x421) | A);
+	}
+}
+
+static void putquadrgb15(unsigned short *image, int *Yblk, int Cr, int Cb) {
+	int Y, R, G, B;
+	int A = (mdec.reg0 & MDEC0_STP) ? 0x8000 : 0;
+	R = MULR(Cr);
+	G = MULG2(Cb, Cr);
+	B = MULB(Cb);
+
+	// added transparency
+	Y = MULY(Yblk[0]);
+	image[0] = MAKERGB15(CLAMP_SCALE5(Y + R), CLAMP_SCALE5(Y + G), CLAMP_SCALE5(Y + B), A);
+	Y = MULY(Yblk[1]);
+	image[1] = MAKERGB15(CLAMP_SCALE5(Y + R), CLAMP_SCALE5(Y + G), CLAMP_SCALE5(Y + B), A);
+	Y = MULY(Yblk[8]);
+	image[16] = MAKERGB15(CLAMP_SCALE5(Y + R), CLAMP_SCALE5(Y + G), CLAMP_SCALE5(Y + B), A);
+	Y = MULY(Yblk[9]);
+	image[17] = MAKERGB15(CLAMP_SCALE5(Y + R), CLAMP_SCALE5(Y + G), CLAMP_SCALE5(Y + B), A);
+}
+
+static void yuv2rgb15(int *blk, unsigned short *image) {
+	int x, y;
+	int *Yblk = blk + DSIZE2 * 2;
+	int *Crblk = blk;
+	int *Cbblk = blk + DSIZE2;
+
+	if (!Config.Mdec) {
+		for (y = 0; y < 16; y += 2, Crblk += 4, Cbblk += 4, Yblk += 8, image += 24) {
+			if (y == 8) Yblk += DSIZE2;
+			for (x = 0; x < 4; x++, image += 2, Crblk++, Cbblk++, Yblk += 2) {
+				putquadrgb15(image, Yblk, *Crblk, *Cbblk);
+				putquadrgb15(image + 8, Yblk + DSIZE2, *(Crblk + 4), *(Cbblk + 4));
+			}
+		} 
+	} else {
+		for (y = 0; y < 16; y++, Yblk += 8, image += 16) {
+			if (y == 8) Yblk += DSIZE2;
+			putlinebw15(image, Yblk);
+			putlinebw15(image + 8, Yblk + DSIZE2);
+		}
+	}
+}
+
+static inline void putlinebw24(unsigned char *image, int *Yblk) {
+	int i;
+	unsigned char Y;
+	for (i = 0; i < 8 * 3; i += 3, Yblk++) {
+		Y = CLAMP8(*Yblk);
+		image[i + 0] = Y;
+		image[i + 1] = Y;
+		image[i + 2] = Y;
+	}
+}
+
+static void putquadrgb24(unsigned char *image, int *Yblk, int Cr, int Cb) {
+	int Y, R, G, B;
+
+	R = MULR(Cr);
+	G = MULG2(Cb,Cr);
+	B = MULB(Cb);
+
+	Y = MULY(Yblk[0]);
+	image[0 * 3 + 0] = CLAMP_SCALE8(Y + R);
+	image[0 * 3 + 1] = CLAMP_SCALE8(Y + G);
+	image[0 * 3 + 2] = CLAMP_SCALE8(Y + B);
+	Y = MULY(Yblk[1]);
+	image[1 * 3 + 0] = CLAMP_SCALE8(Y + R);
+	image[1 * 3 + 1] = CLAMP_SCALE8(Y + G);
+	image[1 * 3 + 2] = CLAMP_SCALE8(Y + B);
+	Y = MULY(Yblk[8]);
+	image[16 * 3 + 0] = CLAMP_SCALE8(Y + R);
+	image[16 * 3 + 1] = CLAMP_SCALE8(Y + G);
+	image[16 * 3 + 2] = CLAMP_SCALE8(Y + B);
+	Y = MULY(Yblk[9]);
+	image[17 * 3 + 0] = CLAMP_SCALE8(Y + R);
+	image[17 * 3 + 1] = CLAMP_SCALE8(Y + G);
+	image[17 * 3 + 2] = CLAMP_SCALE8(Y + B);
+}
+
+static void yuv2rgb24(int *blk, unsigned char *image) {
+	int x, y;
+	int *Yblk = blk + DSIZE2 * 2;
+	int *Crblk = blk;
+	int *Cbblk = blk + DSIZE2;
+
+	if (!Config.Mdec) {
+		for (y = 0; y < 16; y += 2, Crblk += 4, Cbblk += 4, Yblk += 8, image += 24 * 3) {
+			if (y == 8) Yblk += DSIZE2;
+			for (x = 0; x < 4; x++, image += 6, Crblk++, Cbblk++, Yblk += 2) {
+				putquadrgb24(image, Yblk, *Crblk, *Cbblk);
+				putquadrgb24(image + 8 * 3, Yblk + DSIZE2, *(Crblk + 4), *(Cbblk + 4));
+			}
+		}
+	} else {
+		for (y = 0; y < 16; y++, Yblk += 8, image += 16 * 3) {
+			if (y == 8) Yblk += DSIZE2;
+			putlinebw24(image, Yblk);
+			putlinebw24(image + 8 * 3, Yblk + DSIZE2);
+		}
+	}
+}
+
+void mdecInit(void) {
+	mdec.rl = (u16 *)&psxM[0x100000];
+	mdec.reg0 = 0;
+	mdec.reg1 = 0;
+}
+
+// command register
+void mdecWrite0(u32 data) {
+#ifdef CDR_LOG
+	CDR_LOG("mdec0 write %08x\n", data);
+#endif
+	mdec.reg0 = data;
+}
+
+u32 mdecRead0(void) {
+#ifdef CDR_LOG
+	CDR_LOG("mdec0 read %08x\n", mdec.reg0);
+#endif
+	// mame is returning 0
+	return mdec.reg0;
+}
+
+// status register
+void mdecWrite1(u32 data) {
+#ifdef CDR_LOG
+	CDR_LOG("mdec1 write %08x\n", data);
+#endif
+	if (data & MDEC1_RESET) { // mdec reset
+		mdec.reg0 = 0;
+		mdec.reg1 = 0;
+	}
+}
+
+u32 mdecRead1(void) {
+	u32 v = mdec.reg1;
+	v |= (mdec.reg0 & MDEC0_STP) ? MDEC1_STP : 0;
+	v |= (mdec.reg0 & MDEC0_RGB24) ? MDEC1_RGB24 : 0;
+#ifdef CDR_LOG
+	CDR_LOG("mdec1 read %08x\n", v);
+#endif
+	return v;
+}
+
+void psxDma0(u32 adr, u32 bcr, u32 chcr) {
+	int cmd = mdec.reg0;
+	int size;
+	
+#ifdef CDR_LOG
+	CDR_LOG("DMA0 %08x %08x %08x\n", adr, bcr, chcr);
+#endif
+
+	if (chcr != 0x01000201) {
+		// printf("chcr != 0x01000201\n");
+		return;
+	}
+
+	size = (bcr >> 16) * (bcr & 0xffff);
+
+	switch (cmd >> 28) {
+		case 0x3: // decode
+			mdec.rl = (u16 *)PSXM(adr);
+			mdec.rlsize = mdec.reg0 & MDEC0_SIZE_MASK;
+			break;
+
+		case 0x4: // quantization table upload
+			{
+				u8 *p = (u8 *)PSXM(adr);
+				// printf("uploading new quantization table\n");
+				// printmatrixu8(p);
+				// printmatrixu8(p + 64);
+				iqtab_init(iq_y, p);
+				iqtab_init(iq_uv, p + 64);
+			}
+			break;
+
+		case 0x6: // cosine table
+			// printf("mdec cosine table\n");
+			break;
+
+		default:
+			// printf("mdec unknown command\n");
+			break;
+	}
+
+	HW_DMA0_CHCR &= SWAP32(~0x01000000);
+	DMA_INTERRUPT(0);
+}
+
+void psxDma1(u32 adr, u32 bcr, u32 chcr) {
+	int blk[DSIZE2 * 6];
+	unsigned short *image;
+	int size;
+
+#ifdef CDR_LOG
+	CDR_LOG("DMA1 %08x %08x %08x (cmd = %08x)\n", adr, bcr, chcr, mdec.reg0);
+#endif
+
+	if (chcr != 0x01000200) return;
+
+	size = (bcr >> 16) * (bcr & 0xffff);
+
+	image = (u16 *)PSXM(adr);
+
+	if (mdec.reg0 & MDEC0_RGB24) { // 15-b decoding
+		// MDECOUTDMA_INT(((size * (1000000 / 9000)) / 4) /** 4*/);
+		MDECOUTDMA_INT(size / 4);
+		size = size / ((16 * 16) / 2);
+		for (; size > 0; size--, image += (16 * 16)) {
+			mdec.rl = rl2blk(blk, mdec.rl);
+			yuv2rgb15(blk, image);
+		}
+	} else { // 24-b decoding
+		// MDECOUTDMA_INT(((size * (1000000 / 9000)) / 4) /** 4*/);
+		MDECOUTDMA_INT(size / 4);
+		size = size / ((24 * 16) / 2);
+		for (; size > 0; size--, image += (24 * 16)) {
+			mdec.rl = rl2blk(blk, mdec.rl);
+			yuv2rgb24(blk, (u8 *)image);
+		}
+	}
+
+	mdec.reg1 |= MDEC1_BUSY;
+}
+
+void mdec1Interrupt() {
+#ifdef CDR_LOG
+	CDR_LOG("mdec1Interrupt\n");
+#endif
+	if (HW_DMA1_CHCR & SWAP32(0x01000000)) {
+		// Set a fixed value totaly arbitrarie another sound value is
+		// PSXCLK / 60 or PSXCLK / 50 since the bug happened at end of frame.
+		// PSXCLK / 1000 seems good for FF9. (for FF9 need < ~28000)
+		// CAUTION: commented interrupt-handling may lead to problems, keep an eye ;-)
+		MDECOUTDMA_INT(PSXCLK / 1000 * BIAS);
+//		psxRegs.interrupt |= 0x02000000;
+//		psxRegs.intCycle[5 + 24 + 1] *= 8;
+//		psxRegs.intCycle[5 + 24] = psxRegs.cycle;
+		HW_DMA1_CHCR &= SWAP32(~0x01000000);
+		DMA_INTERRUPT(1);
+	} else {
+		mdec.reg1 &= ~MDEC1_BUSY;
+	}
+}
+
+int mdecFreeze(gzFile f, int Mode) {
+	gzfreeze(&mdec, sizeof(mdec));
+	gzfreeze(iq_y, sizeof(iq_y));
+	gzfreeze(iq_uv, sizeof(iq_uv));
+
+	return 0;
+}
diff --git a/libpcsxcore/mdec.h b/libpcsxcore/mdec.h
new file mode 100644
index 0000000..e191b4e
--- /dev/null
+++ b/libpcsxcore/mdec.h
@@ -0,0 +1,45 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+#ifndef __MDEC_H__
+#define __MDEC_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "psxcommon.h"
+#include "r3000a.h"
+#include "psxhw.h"
+#include "psxdma.h"
+
+void mdecInit();
+void mdecWrite0(u32 data);
+void mdecWrite1(u32 data);
+u32 mdecRead0();
+u32 mdecRead1();
+void psxDma0(u32 madr, u32 bcr, u32 chcr);
+void psxDma1(u32 madr, u32 bcr, u32 chcr);
+void mdec1Interrupt();
+int mdecFreeze(gzFile f, int Mode);
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/libpcsxcore/misc.c b/libpcsxcore/misc.c
new file mode 100644
index 0000000..ef49244
--- /dev/null
+++ b/libpcsxcore/misc.c
@@ -0,0 +1,706 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+/*
+* Miscellaneous functions, including savestates and CD-ROM loading.
+*/
+
+#include "misc.h"
+#include "cdrom.h"
+#include "mdec.h"
+#include "ppf.h"
+
+char CdromId[10] = "";
+char CdromLabel[33] = "";
+
+// PSX Executable types
+#define PSX_EXE     1
+#define CPE_EXE     2
+#define COFF_EXE    3
+#define INVALID_EXE 4
+
+#define ISODCL(from, to) (to - from + 1)
+
+struct iso_directory_record {
+	char length			[ISODCL (1, 1)]; /* 711 */
+	char ext_attr_length		[ISODCL (2, 2)]; /* 711 */
+	char extent			[ISODCL (3, 10)]; /* 733 */
+	char size			[ISODCL (11, 18)]; /* 733 */
+	char date			[ISODCL (19, 25)]; /* 7 by 711 */
+	char flags			[ISODCL (26, 26)];
+	char file_unit_size		[ISODCL (27, 27)]; /* 711 */
+	char interleave			[ISODCL (28, 28)]; /* 711 */
+	char volume_sequence_number	[ISODCL (29, 32)]; /* 723 */
+	unsigned char name_len		[ISODCL (33, 33)]; /* 711 */
+	char name			[1];
+};
+
+void mmssdd( char *b, char *p )
+{
+	int m, s, d;
+#if defined(__BIGENDIAN__)
+	int block = (b[0] & 0xff) | ((b[1] & 0xff) << 8) | ((b[2] & 0xff) << 16) | (b[3] << 24);
+#else
+	int block = *((int*)b);
+#endif
+
+	block += 150;
+	m = block / 4500;			// minutes
+	block = block - m * 4500;	// minutes rest
+	s = block / 75;				// seconds
+	d = block - s * 75;			// seconds rest
+
+	m = ((m / 10) << 4) | m % 10;
+	s = ((s / 10) << 4) | s % 10;
+	d = ((d / 10) << 4) | d % 10;	
+
+	p[0] = m;
+	p[1] = s;
+	p[2] = d;
+}
+
+#define incTime() \
+	time[0] = btoi(time[0]); time[1] = btoi(time[1]); time[2] = btoi(time[2]); \
+	time[2]++; \
+	if(time[2] == 75) { \
+		time[2] = 0; \
+		time[1]++; \
+		if (time[1] == 60) { \
+			time[1] = 0; \
+			time[0]++; \
+		} \
+	} \
+	time[0] = itob(time[0]); time[1] = itob(time[1]); time[2] = itob(time[2]);
+
+#define READTRACK() \
+	if (CDR_readTrack(time) == -1) return -1; \
+	buf = CDR_getBuffer(); \
+	if (buf == NULL) return -1; else CheckPPFCache(buf, time[0], time[1], time[2]);
+
+#define READDIR(_dir) \
+	READTRACK(); \
+	memcpy(_dir, buf + 12, 2048); \
+ \
+	incTime(); \
+	READTRACK(); \
+	memcpy(_dir + 2048, buf + 12, 2048);
+
+int GetCdromFile(u8 *mdir, u8 *time, s8 *filename) {
+	struct iso_directory_record *dir;
+	char ddir[4096];
+	u8 *buf;
+	int i;
+
+	// only try to scan if a filename is given
+	if (!strlen(filename)) return -1;
+
+	i = 0;
+	while (i < 4096) {
+		dir = (struct iso_directory_record*) &mdir[i];
+		if (dir->length[0] == 0) {
+			return -1;
+		}
+		i += dir->length[0];
+
+		if (dir->flags[0] & 0x2) { // it's a dir
+			if (!strnicmp((char *)&dir->name[0], filename, dir->name_len[0])) {
+				if (filename[dir->name_len[0]] != '\\') continue;
+
+				filename += dir->name_len[0] + 1;
+
+				mmssdd(dir->extent, (char *)time);
+				READDIR(ddir);
+				i = 0;
+				mdir = ddir;
+			}
+		} else {
+			if (!strnicmp((char *)&dir->name[0], filename, strlen(filename))) {
+				mmssdd(dir->extent, (char *)time);
+				break;
+			}
+		}
+	}
+	return 0;
+}
+
+int LoadCdrom() {
+	EXE_HEADER tmpHead;
+	struct iso_directory_record *dir;
+	u8 time[4], *buf;
+	u8 mdir[4096];
+	s8 exename[256];
+
+	if (!Config.HLE) {
+		psxRegs.pc = psxRegs.GPR.n.ra;
+		return 0;
+	}
+
+	time[0] = itob(0); time[1] = itob(2); time[2] = itob(0x10);
+
+	READTRACK();
+
+	// skip head and sub, and go to the root directory record
+	dir = (struct iso_directory_record*) &buf[12+156]; 
+
+	mmssdd(dir->extent, (char*)time);
+
+	READDIR(mdir);
+
+	// Load SYSTEM.CNF and scan for the main executable
+	if (GetCdromFile(mdir, time, "SYSTEM.CNF;1") == -1) {
+		// if SYSTEM.CNF is missing, start an existing PSX.EXE
+		if (GetCdromFile(mdir, time, "PSX.EXE;1") == -1) return -1;
+
+		READTRACK();
+	}
+	else {
+		// read the SYSTEM.CNF
+		READTRACK();
+
+		sscanf((char *)buf + 12, "BOOT = cdrom:\\%256s", exename);
+		if (GetCdromFile(mdir, time, exename) == -1) {
+			sscanf((char *)buf + 12, "BOOT = cdrom:%256s", exename);
+			if (GetCdromFile(mdir, time, exename) == -1) {
+				char *ptr = strstr(buf + 12, "cdrom:");
+				if (ptr != NULL) {
+					ptr += 6;
+					while (*ptr == '\\' || *ptr == '/') ptr++;
+					strncpy(exename, ptr, 255);
+					exename[255] = '\0';
+					ptr = exename;
+					while (*ptr != '\0' && *ptr != '\r' && *ptr != '\n') ptr++;
+					*ptr = '\0';
+					if (GetCdromFile(mdir, time, exename) == -1)
+						return -1;
+				} else
+					return -1;
+			}
+		}
+
+		// Read the EXE-Header
+		READTRACK();
+	}
+
+	memcpy(&tmpHead, buf + 12, sizeof(EXE_HEADER));
+
+	psxRegs.pc = SWAP32(tmpHead.pc0);
+	psxRegs.GPR.n.gp = SWAP32(tmpHead.gp0);
+	psxRegs.GPR.n.sp = SWAP32(tmpHead.s_addr); 
+	if (psxRegs.GPR.n.sp == 0) psxRegs.GPR.n.sp = 0x801fff00;
+
+	tmpHead.t_size = SWAP32(tmpHead.t_size);
+	tmpHead.t_addr = SWAP32(tmpHead.t_addr);
+
+	// Read the rest of the main executable
+	while (tmpHead.t_size) {
+		void *ptr = (void *)PSXM(tmpHead.t_addr);
+
+		incTime();
+		READTRACK();
+
+		if (ptr != NULL) memcpy(ptr, buf+12, 2048);
+
+		tmpHead.t_size -= 2048;
+		tmpHead.t_addr += 2048;
+	}
+
+	return 0;
+}
+
+int LoadCdromFile(const char *filename, EXE_HEADER *head) {
+	struct iso_directory_record *dir;
+	u8 time[4],*buf;
+	u8 mdir[4096], exename[256];
+	u32 size, addr;
+
+	sscanf(filename, "cdrom:\\%256s", exename);
+
+	time[0] = itob(0); time[1] = itob(2); time[2] = itob(0x10);
+
+	READTRACK();
+
+	// skip head and sub, and go to the root directory record
+	dir = (struct iso_directory_record *)&buf[12 + 156]; 
+
+	mmssdd(dir->extent, (char*)time);
+
+	READDIR(mdir);
+
+	if (GetCdromFile(mdir, time, exename) == -1) return -1;
+
+	READTRACK();
+
+	memcpy(head, buf + 12, sizeof(EXE_HEADER));
+	size = head->t_size;
+	addr = head->t_addr;
+
+	while (size) {
+		incTime();
+		READTRACK();
+
+		memcpy((void *)PSXM(addr), buf + 12, 2048);
+
+		size -= 2048;
+		addr += 2048;
+	}
+
+	return 0;
+}
+
+int CheckCdrom() {
+	struct iso_directory_record *dir;
+	unsigned char time[4], *buf;
+	unsigned char mdir[4096];
+	char exename[256];
+	int i, c;
+
+	FreePPFCache();
+
+	time[0] = itob(0);
+	time[1] = itob(2);
+	time[2] = itob(0x10);
+
+	READTRACK();
+
+	CdromLabel[0] = '\0';
+	CdromId[0] = '\0';
+
+	strncpy(CdromLabel, buf + 52, 32);
+
+	// skip head and sub, and go to the root directory record
+	dir = (struct iso_directory_record *)&buf[12 + 156]; 
+
+	mmssdd(dir->extent, (char *)time);
+
+	READDIR(mdir);
+
+	if (GetCdromFile(mdir, time, "SYSTEM.CNF;1") != -1) {
+		READTRACK();
+
+		sscanf((char *)buf + 12, "BOOT = cdrom:\\%256s", exename);
+		if (GetCdromFile(mdir, time, exename) == -1) {
+			sscanf((char *)buf + 12, "BOOT = cdrom:%256s", exename);
+			if (GetCdromFile(mdir, time, exename) == -1) {
+				char *ptr = strstr(buf + 12, "cdrom:");			// possibly the executable is in some subdir
+				if (ptr != NULL) {
+					ptr += 6;
+					while (*ptr == '\\' || *ptr == '/') ptr++;
+					strncpy(exename, ptr, 255);
+					exename[255] = '\0';
+					ptr = exename;
+					while (*ptr != '\0' && *ptr != '\r' && *ptr != '\n') ptr++;
+					*ptr = '\0';
+					if (GetCdromFile(mdir, time, exename) == -1)
+					 	return -1;		// main executable not found
+				} else
+					return -1;
+			}
+		}
+	} else if (GetCdromFile(mdir, time, "PSX.EXE;1") != -1) {
+		strcpy(exename, "PSX.EXE;1");
+		strcpy(CdromId, "SLUS99999");
+	} else
+		return -1;		// SYSTEM.CNF and PSX.EXE not found
+
+	if (CdromId[0] == '\0') {
+		i = strlen(exename);
+		if (i >= 2) {
+			if (exename[i - 2] == ';') i-= 2;
+			c = 8; i--;
+			while (i >= 0 && c >= 0) {
+				if (isalnum(exename[i])) CdromId[c--] = exename[i];
+				i--;
+			}
+		}
+	}
+
+	if (Config.PsxAuto) { // autodetect system (pal or ntsc)
+		if (strstr(exename, "ES") != NULL)
+			Config.PsxType = PSX_TYPE_PAL; // pal
+		else Config.PsxType = PSX_TYPE_NTSC; // ntsc
+	}
+
+	if (CdromLabel[0] == ' ') {
+		strncpy(CdromLabel, CdromId, 9);
+	}
+	SysPrintf(_("CD-ROM Label: %.32s\n"), CdromLabel);
+	SysPrintf(_("CD-ROM ID: %.9s\n"), CdromId);
+
+	BuildPPFCache();
+
+	return 0;
+}
+
+static int PSXGetFileType(FILE *f) {
+	unsigned long current;
+	u8 mybuf[2048];
+	EXE_HEADER *exe_hdr;
+	FILHDR *coff_hdr;
+
+	current = ftell(f);
+	fseek(f, 0L, SEEK_SET);
+	fread(mybuf, 2048, 1, f);
+	fseek(f, current, SEEK_SET);
+
+	exe_hdr = (EXE_HEADER *)mybuf;
+	if (memcmp(exe_hdr->id, "PS-X EXE", 8) == 0)
+		return PSX_EXE;
+
+	if (mybuf[0] == 'C' && mybuf[1] == 'P' && mybuf[2] == 'E')
+		return CPE_EXE;
+
+	coff_hdr = (FILHDR *)mybuf;
+	if (SWAPu16(coff_hdr->f_magic) == 0x0162)
+		return COFF_EXE;
+
+	return INVALID_EXE;
+}
+
+int Load(const char *ExePath) {
+	FILE *tmpFile;
+	EXE_HEADER tmpHead;
+	int type;
+	int retval = 0;
+	u8 opcode;
+	u32 section_address, section_size;
+
+	strncpy(CdromId, "SLUS99999", 9);
+	strncpy(CdromLabel, "SLUS_999.99", 11);
+
+	tmpFile = fopen(ExePath, "rb");
+	if (tmpFile == NULL) {
+		SysPrintf(_("Error opening file: %s.\n"), ExePath);
+		retval = -1;
+	} else {
+		type = PSXGetFileType(tmpFile);
+		switch (type) {
+			case PSX_EXE:
+				fread(&tmpHead,sizeof(EXE_HEADER),1,tmpFile);
+				fseek(tmpFile, 0x800, SEEK_SET);		
+				fread((void *)PSXM(SWAP32(tmpHead.t_addr)), SWAP32(tmpHead.t_size),1,tmpFile);
+				fclose(tmpFile);
+				psxRegs.pc = SWAP32(tmpHead.pc0);
+				psxRegs.GPR.n.gp = SWAP32(tmpHead.gp0);
+				psxRegs.GPR.n.sp = SWAP32(tmpHead.s_addr); 
+				if (psxRegs.GPR.n.sp == 0)
+					psxRegs.GPR.n.sp = 0x801fff00;
+				retval = 0;
+				break;
+			case CPE_EXE:
+				fseek(tmpFile, 6, SEEK_SET); /* Something tells me we should go to 4 and read the "08 00" here... */
+				do {
+					fread(&opcode, 1, 1, tmpFile);
+					switch (opcode) {
+						case 1: /* Section loading */
+							fread(&section_address, 4, 1, tmpFile);
+							fread(&section_size, 4, 1, tmpFile);
+							section_address = SWAPu32(section_address);
+							section_size = SWAPu32(section_size);
+#ifdef EMU_LOG
+							EMU_LOG("Loading %08X bytes from %08X to %08X\n", section_size, ftell(tmpFile), section_address);
+#endif
+							fread(PSXM(section_address), section_size, 1, tmpFile);
+							break;
+						case 3: /* register loading (PC only?) */
+							fseek(tmpFile, 2, SEEK_CUR); /* unknown field */
+							fread(&psxRegs.pc, 4, 1, tmpFile);
+							psxRegs.pc = SWAPu32(psxRegs.pc);
+							break;
+						case 0: /* End of file */
+							break;
+						default:
+							SysPrintf(_("Unknown CPE opcode %02x at position %08x.\n"), opcode, ftell(tmpFile) - 1);
+							retval = -1;
+							break;
+					}
+				} while (opcode != 0 && retval == 0);
+				break;
+			case COFF_EXE:
+				SysPrintf(_("COFF files not supported.\n"));
+				retval = -1;
+				break;
+			case INVALID_EXE:
+				SysPrintf(_("This file does not appear to be a valid PSX file.\n"));
+				retval = -1;
+				break;
+		}
+	}
+
+	if (retval != 0) {
+		CdromId[0] = '\0';
+		CdromLabel[0] = '\0';
+	}
+
+	return retval;
+}
+
+// STATES
+
+static const char PcsxHeader[32] = "STv4 PCSX v" PACKAGE_VERSION;
+
+// Savestate Versioning!
+// If you make changes to the savestate version, please increment the value below.
+static const u32 SaveVersion = 0x8b410004;
+
+int SaveState(const char *file) {
+	gzFile f;
+	GPUFreeze_t *gpufP;
+	SPUFreeze_t *spufP;
+	int Size;
+	unsigned char *pMem;
+
+	f = gzopen(file, "wb");
+	if (f == NULL) return -1;
+
+	gzwrite(f, (void *)PcsxHeader, 32);
+	gzwrite(f, (void *)&SaveVersion, sizeof(u32));
+	gzwrite(f, (void *)&Config.HLE, sizeof(boolean));
+
+	pMem = (unsigned char *)malloc(128 * 96 * 3);
+	if (pMem == NULL) return -1;
+	GPU_getScreenPic(pMem);
+	gzwrite(f, pMem, 128 * 96 * 3);
+	free(pMem);
+
+	if (Config.HLE)
+		psxBiosFreeze(1);
+
+	gzwrite(f, psxM, 0x00200000);
+	gzwrite(f, psxR, 0x00080000);
+	gzwrite(f, psxH, 0x00010000);
+	gzwrite(f, (void *)&psxRegs, sizeof(psxRegs));
+
+	// gpu
+	gpufP = (GPUFreeze_t *)malloc(sizeof(GPUFreeze_t));
+	gpufP->ulFreezeVersion = 1;
+	GPU_freeze(1, gpufP);
+	gzwrite(f, gpufP, sizeof(GPUFreeze_t));
+	free(gpufP);
+
+	// spu
+	spufP = (SPUFreeze_t *) malloc(16);
+	SPU_freeze(2, spufP);
+	Size = spufP->Size; gzwrite(f, &Size, 4);
+	free(spufP);
+	spufP = (SPUFreeze_t *) malloc(Size);
+	SPU_freeze(1, spufP);
+	gzwrite(f, spufP, Size);
+	free(spufP);
+
+	sioFreeze(f, 1);
+	cdrFreeze(f, 1);
+	psxHwFreeze(f, 1);
+	psxRcntFreeze(f, 1);
+	mdecFreeze(f, 1);
+
+	gzclose(f);
+
+	return 0;
+}
+
+int LoadState(const char *file) {
+	gzFile f;
+	GPUFreeze_t *gpufP;
+	SPUFreeze_t *spufP;
+	int Size;
+	char header[32];
+	u32 version;
+	boolean hle;
+
+	f = gzopen(file, "rb");
+	if (f == NULL) return -1;
+
+	gzread(f, header, sizeof(header));
+	gzread(f, &version, sizeof(u32));
+	gzread(f, &hle, sizeof(boolean));
+
+	if (strncmp("STv4 PCSX", header, 9) != 0 || version != SaveVersion || hle != Config.HLE) {
+		gzclose(f);
+		return -1;
+	}
+
+	psxCpu->Reset();
+	gzseek(f, 128 * 96 * 3, SEEK_CUR);
+
+	gzread(f, psxM, 0x00200000);
+	gzread(f, psxR, 0x00080000);
+	gzread(f, psxH, 0x00010000);
+	gzread(f, (void *)&psxRegs, sizeof(psxRegs));
+
+	if (Config.HLE)
+		psxBiosFreeze(0);
+
+	// gpu
+	gpufP = (GPUFreeze_t *)malloc(sizeof(GPUFreeze_t));
+	gzread(f, gpufP, sizeof(GPUFreeze_t));
+	GPU_freeze(0, gpufP);
+	free(gpufP);
+
+	// spu
+	gzread(f, &Size, 4);
+	spufP = (SPUFreeze_t *)malloc(Size);
+	gzread(f, spufP, Size);
+	SPU_freeze(0, spufP);
+	free(spufP);
+
+	sioFreeze(f, 0);
+	cdrFreeze(f, 0);
+	psxHwFreeze(f, 0);
+	psxRcntFreeze(f, 0);
+	mdecFreeze(f, 0);
+
+	gzclose(f);
+
+	return 0;
+}
+
+int CheckState(const char *file) {
+	gzFile f;
+	char header[32];
+	u32 version;
+	boolean hle;
+
+	f = gzopen(file, "rb");
+	if (f == NULL) return -1;
+
+	gzread(f, header, sizeof(header));
+	gzread(f, &version, sizeof(u32));
+	gzread(f, &hle, sizeof(boolean));
+
+	gzclose(f);
+
+	if (strncmp("STv4 PCSX", header, 9) != 0 || version != SaveVersion || hle != Config.HLE)
+		return -1;
+
+	return 0;
+}
+
+// NET Function Helpers
+
+int SendPcsxInfo() {
+	if (NET_recvData == NULL || NET_sendData == NULL)
+		return 0;
+
+	NET_sendData(&Config.Xa, sizeof(Config.Xa), PSE_NET_BLOCKING);
+	NET_sendData(&Config.Sio, sizeof(Config.Sio), PSE_NET_BLOCKING);
+	NET_sendData(&Config.SpuIrq, sizeof(Config.SpuIrq), PSE_NET_BLOCKING);
+	NET_sendData(&Config.RCntFix, sizeof(Config.RCntFix), PSE_NET_BLOCKING);
+	NET_sendData(&Config.PsxType, sizeof(Config.PsxType), PSE_NET_BLOCKING);
+	NET_sendData(&Config.Cpu, sizeof(Config.Cpu), PSE_NET_BLOCKING);
+
+	return 0;
+}
+
+int RecvPcsxInfo() {
+	int tmp;
+
+	if (NET_recvData == NULL || NET_sendData == NULL)
+		return 0;
+
+	NET_recvData(&Config.Xa, sizeof(Config.Xa), PSE_NET_BLOCKING);
+	NET_recvData(&Config.Sio, sizeof(Config.Sio), PSE_NET_BLOCKING);
+	NET_recvData(&Config.SpuIrq, sizeof(Config.SpuIrq), PSE_NET_BLOCKING);
+	NET_recvData(&Config.RCntFix, sizeof(Config.RCntFix), PSE_NET_BLOCKING);
+	NET_recvData(&Config.PsxType, sizeof(Config.PsxType), PSE_NET_BLOCKING);
+
+	SysUpdate();
+
+	tmp = Config.Cpu;
+	NET_recvData(&Config.Cpu, sizeof(Config.Cpu), PSE_NET_BLOCKING);
+	if (tmp != Config.Cpu) {
+		psxCpu->Shutdown();
+#ifdef PSXREC
+		if (Config.Cpu == CPU_INTERPRETER) psxCpu = &psxInt;
+		else psxCpu = &psxRec;
+#else
+		psxCpu = &psxInt;
+#endif
+		if (psxCpu->Init() == -1) {
+			SysClose(); return -1;
+		}
+		psxCpu->Reset();
+	}
+
+	return 0;
+}
+
+// remove the leading and trailing spaces in a string
+void trim(char *str) {
+	int pos = 0;
+	char *dest = str;
+
+	// skip leading blanks
+	while (str[pos] <= ' ' && str[pos] > 0)
+		pos++;
+
+	while (str[pos]) {
+		*(dest++) = str[pos];
+		pos++;
+	}
+
+	*(dest--) = '\0'; // store the null
+
+	// remove trailing blanks
+	while (dest >= str && *dest <= ' ' && *dest > 0)
+		*(dest--) = '\0';
+}
+
+// lookup table for crc calculation
+static unsigned short crctab[256] = {
+	0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50A5, 0x60C6, 0x70E7, 0x8108,
+	0x9129, 0xA14A, 0xB16B, 0xC18C, 0xD1AD, 0xE1CE, 0xF1EF, 0x1231, 0x0210,
+	0x3273, 0x2252, 0x52B5, 0x4294, 0x72F7, 0x62D6, 0x9339, 0x8318, 0xB37B,
+	0xA35A, 0xD3BD, 0xC39C, 0xF3FF, 0xE3DE, 0x2462, 0x3443, 0x0420, 0x1401,
+	0x64E6, 0x74C7, 0x44A4, 0x5485, 0xA56A, 0xB54B, 0x8528, 0x9509, 0xE5EE,
+	0xF5CF, 0xC5AC, 0xD58D, 0x3653, 0x2672, 0x1611, 0x0630, 0x76D7, 0x66F6,
+	0x5695, 0x46B4, 0xB75B, 0xA77A, 0x9719, 0x8738, 0xF7DF, 0xE7FE, 0xD79D,
+	0xC7BC, 0x48C4, 0x58E5, 0x6886, 0x78A7, 0x0840, 0x1861, 0x2802, 0x3823,
+	0xC9CC, 0xD9ED, 0xE98E, 0xF9AF, 0x8948, 0x9969, 0xA90A, 0xB92B, 0x5AF5,
+	0x4AD4, 0x7AB7, 0x6A96, 0x1A71, 0x0A50, 0x3A33, 0x2A12, 0xDBFD, 0xCBDC,
+	0xFBBF, 0xEB9E, 0x9B79, 0x8B58, 0xBB3B, 0xAB1A, 0x6CA6, 0x7C87, 0x4CE4,
+	0x5CC5, 0x2C22, 0x3C03, 0x0C60, 0x1C41, 0xEDAE, 0xFD8F, 0xCDEC, 0xDDCD,
+	0xAD2A, 0xBD0B, 0x8D68, 0x9D49, 0x7E97, 0x6EB6, 0x5ED5, 0x4EF4, 0x3E13,
+	0x2E32, 0x1E51, 0x0E70, 0xFF9F, 0xEFBE, 0xDFDD, 0xCFFC, 0xBF1B, 0xAF3A,
+	0x9F59, 0x8F78, 0x9188, 0x81A9, 0xB1CA, 0xA1EB, 0xD10C, 0xC12D, 0xF14E,
+	0xE16F, 0x1080, 0x00A1, 0x30C2, 0x20E3, 0x5004, 0x4025, 0x7046, 0x6067,
+	0x83B9, 0x9398, 0xA3FB, 0xB3DA, 0xC33D, 0xD31C, 0xE37F, 0xF35E, 0x02B1,
+	0x1290, 0x22F3, 0x32D2, 0x4235, 0x5214, 0x6277, 0x7256, 0xB5EA, 0xA5CB,
+	0x95A8, 0x8589, 0xF56E, 0xE54F, 0xD52C, 0xC50D, 0x34E2, 0x24C3, 0x14A0,
+	0x0481, 0x7466, 0x6447, 0x5424, 0x4405, 0xA7DB, 0xB7FA, 0x8799, 0x97B8,
+	0xE75F, 0xF77E, 0xC71D, 0xD73C, 0x26D3, 0x36F2, 0x0691, 0x16B0, 0x6657,
+	0x7676, 0x4615, 0x5634, 0xD94C, 0xC96D, 0xF90E, 0xE92F, 0x99C8, 0x89E9,
+	0xB98A, 0xA9AB, 0x5844, 0x4865, 0x7806, 0x6827, 0x18C0, 0x08E1, 0x3882,
+	0x28A3, 0xCB7D, 0xDB5C, 0xEB3F, 0xFB1E, 0x8BF9, 0x9BD8, 0xABBB, 0xBB9A,
+	0x4A75, 0x5A54, 0x6A37, 0x7A16, 0x0AF1, 0x1AD0, 0x2AB3, 0x3A92, 0xFD2E,
+	0xED0F, 0xDD6C, 0xCD4D, 0xBDAA, 0xAD8B, 0x9DE8, 0x8DC9, 0x7C26, 0x6C07,
+	0x5C64, 0x4C45, 0x3CA2, 0x2C83, 0x1CE0, 0x0CC1, 0xEF1F, 0xFF3E, 0xCF5D,
+	0xDF7C, 0xAF9B, 0xBFBA, 0x8FD9, 0x9FF8, 0x6E17, 0x7E36, 0x4E55, 0x5E74,
+	0x2E93, 0x3EB2, 0x0ED1, 0x1EF0
+};
+
+u16 calcCrc(u8 *d, int len) {
+	u16 crc = 0;
+	int i;
+
+	for (i = 0; i < len; i++) {
+		crc = crctab[(crc >> 8) ^ d[i]] ^ (crc << 8);
+	}
+
+	return ~crc;
+}
diff --git a/libpcsxcore/misc.h b/libpcsxcore/misc.h
new file mode 100644
index 0000000..ae3fc81
--- /dev/null
+++ b/libpcsxcore/misc.h
@@ -0,0 +1,77 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+#ifndef __MISC_H__
+#define __MISC_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "psxcommon.h"
+#include "coff.h"
+#include "plugins.h"
+#include "r3000a.h"
+#include "psxmem.h"
+
+#undef s_addr
+
+typedef struct {
+	unsigned char id[8];
+    u32 text;                   
+    u32 data;                    
+    u32 pc0;
+    u32 gp0;                     
+    u32 t_addr;
+    u32 t_size;
+    u32 d_addr;                  
+    u32 d_size;                  
+    u32 b_addr;                  
+    u32 b_size;                  
+    u32 s_addr;
+    u32 s_size;
+    u32 SavedSP;
+    u32 SavedFP;
+    u32 SavedGP;
+    u32 SavedRA;
+    u32 SavedS0;
+} EXE_HEADER;
+
+extern char CdromId[10];
+extern char CdromLabel[33];
+
+int LoadCdrom();
+int LoadCdromFile(const char *filename, EXE_HEADER *head);
+int CheckCdrom();
+int Load(const char *ExePath);
+
+int SaveState(const char *file);
+int LoadState(const char *file);
+int CheckState(const char *file);
+
+int SendPcsxInfo();
+int RecvPcsxInfo();
+
+void trim(char *str);
+u16 calcCrc(u8 *d, int len);
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/libpcsxcore/plugins.c b/libpcsxcore/plugins.c
new file mode 100644
index 0000000..f965e0d
--- /dev/null
+++ b/libpcsxcore/plugins.c
@@ -0,0 +1,815 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+/*
+* Plugin library callback/access functions.
+*/
+
+#include "plugins.h"
+#include "cdriso.h"
+
+static char IsoFile[MAXPATHLEN] = "";
+static s64 cdOpenCaseTime = 0;
+
+GPUupdateLace         GPU_updateLace;
+GPUinit               GPU_init;
+GPUshutdown           GPU_shutdown; 
+GPUconfigure          GPU_configure;
+GPUtest               GPU_test;
+GPUabout              GPU_about;
+GPUopen               GPU_open;
+GPUclose              GPU_close;
+GPUreadStatus         GPU_readStatus;
+GPUreadData           GPU_readData;
+GPUreadDataMem        GPU_readDataMem;
+GPUwriteStatus        GPU_writeStatus; 
+GPUwriteData          GPU_writeData;
+GPUwriteDataMem       GPU_writeDataMem;
+GPUdmaChain           GPU_dmaChain;
+GPUkeypressed         GPU_keypressed;
+GPUdisplayText        GPU_displayText;
+GPUmakeSnapshot       GPU_makeSnapshot;
+GPUfreeze             GPU_freeze;
+GPUgetScreenPic       GPU_getScreenPic;
+GPUshowScreenPic      GPU_showScreenPic;
+GPUclearDynarec       GPU_clearDynarec;
+GPUvBlank             GPU_vBlank;
+
+CDRinit               CDR_init;
+CDRshutdown           CDR_shutdown;
+CDRopen               CDR_open;
+CDRclose              CDR_close; 
+CDRtest               CDR_test;
+CDRgetTN              CDR_getTN;
+CDRgetTD              CDR_getTD;
+CDRreadTrack          CDR_readTrack;
+CDRgetBuffer          CDR_getBuffer;
+CDRplay               CDR_play;
+CDRstop               CDR_stop;
+CDRgetStatus          CDR_getStatus;
+CDRgetDriveLetter     CDR_getDriveLetter;
+CDRgetBufferSub       CDR_getBufferSub;
+CDRconfigure          CDR_configure;
+CDRabout              CDR_about;
+CDRsetfilename        CDR_setfilename;
+CDRreadCDDA           CDR_readCDDA;
+CDRgetTE              CDR_getTE;
+
+SPUconfigure          SPU_configure;
+SPUabout              SPU_about;
+SPUinit               SPU_init;
+SPUshutdown           SPU_shutdown;
+SPUtest               SPU_test;
+SPUopen               SPU_open;
+SPUclose              SPU_close;
+SPUplaySample         SPU_playSample;
+SPUwriteRegister      SPU_writeRegister;
+SPUreadRegister       SPU_readRegister;
+SPUwriteDMA           SPU_writeDMA;
+SPUreadDMA            SPU_readDMA;
+SPUwriteDMAMem        SPU_writeDMAMem;
+SPUreadDMAMem         SPU_readDMAMem;
+SPUplayADPCMchannel   SPU_playADPCMchannel;
+SPUfreeze             SPU_freeze;
+SPUregisterCallback   SPU_registerCallback;
+SPUasync              SPU_async;
+SPUplayCDDAchannel    SPU_playCDDAchannel;
+
+PADconfigure          PAD1_configure;
+PADabout              PAD1_about;
+PADinit               PAD1_init;
+PADshutdown           PAD1_shutdown;
+PADtest               PAD1_test;
+PADopen               PAD1_open;
+PADclose              PAD1_close;
+PADquery              PAD1_query;
+PADreadPort1          PAD1_readPort1;
+PADkeypressed         PAD1_keypressed;
+PADstartPoll          PAD1_startPoll;
+PADpoll               PAD1_poll;
+PADsetSensitive       PAD1_setSensitive;
+
+PADconfigure          PAD2_configure;
+PADabout              PAD2_about;
+PADinit               PAD2_init;
+PADshutdown           PAD2_shutdown;
+PADtest               PAD2_test;
+PADopen               PAD2_open;
+PADclose              PAD2_close;
+PADquery              PAD2_query;
+PADreadPort2          PAD2_readPort2;
+PADkeypressed         PAD2_keypressed;
+PADstartPoll          PAD2_startPoll;
+PADpoll               PAD2_poll;
+PADsetSensitive       PAD2_setSensitive;
+
+NETinit               NET_init;
+NETshutdown           NET_shutdown;
+NETopen               NET_open;
+NETclose              NET_close; 
+NETtest               NET_test;
+NETconfigure          NET_configure;
+NETabout              NET_about;
+NETpause              NET_pause;
+NETresume             NET_resume;
+NETqueryPlayer        NET_queryPlayer;
+NETsendData           NET_sendData;
+NETrecvData           NET_recvData;
+NETsendPadData        NET_sendPadData;
+NETrecvPadData        NET_recvPadData;
+NETsetInfo            NET_setInfo;
+NETkeypressed         NET_keypressed;
+
+#ifdef ENABLE_SIO1API
+
+SIO1init              SIO1_init;
+SIO1shutdown          SIO1_shutdown;
+SIO1open              SIO1_open;
+SIO1close             SIO1_close; 
+SIO1test              SIO1_test;
+SIO1configure         SIO1_configure;
+SIO1about             SIO1_about;
+SIO1pause             SIO1_pause;
+SIO1resume            SIO1_resume;
+SIO1keypressed        SIO1_keypressed;
+SIO1writeData8        SIO1_writeData8;
+SIO1writeData16       SIO1_writeData16;
+SIO1writeData32       SIO1_writeData32;
+SIO1writeStat16       SIO1_writeStat16;
+SIO1writeStat32       SIO1_writeStat32;
+SIO1writeMode16       SIO1_writeMode16;
+SIO1writeMode32       SIO1_writeMode32;
+SIO1writeCtrl16       SIO1_writeCtrl16;
+SIO1writeCtrl32       SIO1_writeCtrl32;
+SIO1writeBaud16       SIO1_writeBaud16;
+SIO1writeBaud32       SIO1_writeBaud32;
+SIO1readData8         SIO1_readData8;
+SIO1readData16        SIO1_readData16;
+SIO1readData32        SIO1_readData32;
+SIO1readStat16        SIO1_readStat16;
+SIO1readStat32        SIO1_readStat32;
+SIO1readMode16        SIO1_readMode16;
+SIO1readMode32        SIO1_readMode32;
+SIO1readCtrl16        SIO1_readCtrl16;
+SIO1readCtrl32        SIO1_readCtrl32;
+SIO1readBaud16        SIO1_readBaud16;
+SIO1readBaud32        SIO1_readBaud32;
+SIO1registerCallback  SIO1_registerCallback;
+
+#endif
+
+static const char *err;
+
+#define CheckErr(func) { \
+	err = SysLibError(); \
+	if (err != NULL) { SysMessage(_("Error loading %s: %s"), func, err); return -1; } \
+}
+
+#define LoadSym(dest, src, name, checkerr) { \
+	dest = (src)SysLoadSym(drv, name); \
+	if (checkerr) { CheckErr(name); } else SysLibError(); \
+}
+
+void *hGPUDriver = NULL;
+
+void CALLBACK GPU__displayText(char *pText) {
+	SysPrintf("%s\n", pText);
+}
+
+long CALLBACK GPU__configure(void) { return 0; }
+long CALLBACK GPU__test(void) { return 0; }
+void CALLBACK GPU__about(void) {}
+void CALLBACK GPU__makeSnapshot(void) {}
+void CALLBACK GPU__keypressed(int key) {}
+long CALLBACK GPU__getScreenPic(unsigned char *pMem) { return -1; }
+long CALLBACK GPU__showScreenPic(unsigned char *pMem) { return -1; }
+void CALLBACK GPU__clearDynarec(void (CALLBACK *callback)(void)) {}
+void CALLBACK GPU__vBlank(int val) {}
+
+#define LoadGpuSym1(dest, name) \
+	LoadSym(GPU_##dest, GPU##dest, name, TRUE);
+
+#define LoadGpuSym0(dest, name) \
+	LoadSym(GPU_##dest, GPU##dest, name, FALSE); \
+	if (GPU_##dest == NULL) GPU_##dest = (GPU##dest) GPU__##dest;
+
+#define LoadGpuSymN(dest, name) \
+	LoadSym(GPU_##dest, GPU##dest, name, FALSE);
+
+static int LoadGPUplugin(const char *GPUdll) {
+	void *drv;
+
+	hGPUDriver = SysLoadLibrary(GPUdll);
+	if (hGPUDriver == NULL) { 
+		GPU_configure = NULL;
+		SysMessage (_("Could not load GPU plugin %s!"), GPUdll); return -1; 
+	}
+	drv = hGPUDriver;
+	LoadGpuSym1(init, "GPUinit");
+	LoadGpuSym1(shutdown, "GPUshutdown");
+	LoadGpuSym1(open, "GPUopen");
+	LoadGpuSym1(close, "GPUclose");
+	LoadGpuSym1(readData, "GPUreadData");
+	LoadGpuSym1(readDataMem, "GPUreadDataMem");
+	LoadGpuSym1(readStatus, "GPUreadStatus");
+	LoadGpuSym1(writeData, "GPUwriteData");
+	LoadGpuSym1(writeDataMem, "GPUwriteDataMem");
+	LoadGpuSym1(writeStatus, "GPUwriteStatus");
+	LoadGpuSym1(dmaChain, "GPUdmaChain");
+	LoadGpuSym1(updateLace, "GPUupdateLace");
+	LoadGpuSym0(keypressed, "GPUkeypressed");
+	LoadGpuSym0(displayText, "GPUdisplayText");
+	LoadGpuSym0(makeSnapshot, "GPUmakeSnapshot");
+	LoadGpuSym1(freeze, "GPUfreeze");
+	LoadGpuSym0(getScreenPic, "GPUgetScreenPic");
+	LoadGpuSym0(showScreenPic, "GPUshowScreenPic");
+	LoadGpuSym0(clearDynarec, "GPUclearDynarec");
+    LoadGpuSym0(vBlank, "GPUvBlank");
+	LoadGpuSym0(configure, "GPUconfigure");
+	LoadGpuSym0(test, "GPUtest");
+	LoadGpuSym0(about, "GPUabout");
+
+	return 0;
+}
+
+void *hCDRDriver = NULL;
+
+long CALLBACK CDR__play(unsigned char *sector) { return 0; }
+long CALLBACK CDR__stop(void) { return 0; }
+
+long CALLBACK CDR__getStatus(struct CdrStat *stat) {
+	if (cdOpenCaseTime < 0 || cdOpenCaseTime > (s64)time(NULL))
+		stat->Status = 0x10;
+	else
+		stat->Status = 0;
+
+	return 0;
+}
+
+char* CALLBACK CDR__getDriveLetter(void) { return NULL; }
+long CALLBACK CDR__configure(void) { return 0; }
+long CALLBACK CDR__test(void) { return 0; }
+void CALLBACK CDR__about(void) {}
+long CALLBACK CDR__setfilename(char*filename) { return 0; }
+
+#define LoadCdrSym1(dest, name) \
+	LoadSym(CDR_##dest, CDR##dest, name, TRUE);
+
+#define LoadCdrSym0(dest, name) \
+	LoadSym(CDR_##dest, CDR##dest, name, FALSE); \
+	if (CDR_##dest == NULL) CDR_##dest = (CDR##dest) CDR__##dest;
+
+#define LoadCdrSymN(dest, name) \
+	LoadSym(CDR_##dest, CDR##dest, name, FALSE);
+
+static int LoadCDRplugin(const char *CDRdll) {
+	void *drv;
+
+	if (CDRdll == NULL) {
+		cdrIsoInit();
+		return 0;
+	}
+
+	hCDRDriver = SysLoadLibrary(CDRdll);
+	if (hCDRDriver == NULL) {
+		CDR_configure = NULL;
+		SysMessage (_("Could not load CD-ROM plugin %s!"), CDRdll);  return -1;
+	}
+	drv = hCDRDriver;
+	LoadCdrSym1(init, "CDRinit");
+	LoadCdrSym1(shutdown, "CDRshutdown");
+	LoadCdrSym1(open, "CDRopen");
+	LoadCdrSym1(close, "CDRclose");
+	LoadCdrSym1(getTN, "CDRgetTN");
+	LoadCdrSym1(getTD, "CDRgetTD");
+	LoadCdrSym1(readTrack, "CDRreadTrack");
+	LoadCdrSym1(getBuffer, "CDRgetBuffer");
+	LoadCdrSym1(getBufferSub, "CDRgetBufferSub");
+	LoadCdrSym0(play, "CDRplay");
+	LoadCdrSym0(stop, "CDRstop");
+	LoadCdrSym0(getStatus, "CDRgetStatus");
+	LoadCdrSym0(getDriveLetter, "CDRgetDriveLetter");
+	LoadCdrSym0(configure, "CDRconfigure");
+	LoadCdrSym0(test, "CDRtest");
+	LoadCdrSym0(about, "CDRabout");
+	LoadCdrSym0(setfilename, "CDRsetfilename");
+	LoadCdrSymN(readCDDA, "CDRreadCDDA");
+	LoadCdrSymN(getTE, "CDRgetTE");
+
+	return 0;
+}
+
+void *hSPUDriver = NULL;
+
+long CALLBACK SPU__configure(void) { return 0; }
+void CALLBACK SPU__about(void) {}
+long CALLBACK SPU__test(void) { return 0; }
+
+#define LoadSpuSym1(dest, name) \
+	LoadSym(SPU_##dest, SPU##dest, name, TRUE);
+
+#define LoadSpuSym0(dest, name) \
+	LoadSym(SPU_##dest, SPU##dest, name, FALSE); \
+	if (SPU_##dest == NULL) SPU_##dest = (SPU##dest) SPU__##dest;
+
+#define LoadSpuSymN(dest, name) \
+	LoadSym(SPU_##dest, SPU##dest, name, FALSE);
+
+static int LoadSPUplugin(const char *SPUdll) {
+	void *drv;
+
+	hSPUDriver = SysLoadLibrary(SPUdll);
+	if (hSPUDriver == NULL) {
+		SPU_configure = NULL;
+		SysMessage (_("Could not load SPU plugin %s!"), SPUdll); return -1;
+	}
+	drv = hSPUDriver;
+	LoadSpuSym1(init, "SPUinit");
+	LoadSpuSym1(shutdown, "SPUshutdown");
+	LoadSpuSym1(open, "SPUopen");
+	LoadSpuSym1(close, "SPUclose");
+	LoadSpuSym0(configure, "SPUconfigure");
+	LoadSpuSym0(about, "SPUabout");
+	LoadSpuSym0(test, "SPUtest");
+	LoadSpuSym1(writeRegister, "SPUwriteRegister");
+	LoadSpuSym1(readRegister, "SPUreadRegister");		
+	LoadSpuSym1(writeDMA, "SPUwriteDMA");
+	LoadSpuSym1(readDMA, "SPUreadDMA");
+	LoadSpuSym1(writeDMAMem, "SPUwriteDMAMem");
+	LoadSpuSym1(readDMAMem, "SPUreadDMAMem");
+	LoadSpuSym1(playADPCMchannel, "SPUplayADPCMchannel");
+	LoadSpuSym1(freeze, "SPUfreeze");
+	LoadSpuSym1(registerCallback, "SPUregisterCallback");
+	LoadSpuSymN(async, "SPUasync");
+	LoadSpuSymN(playCDDAchannel, "SPUplayCDDAchannel");
+
+	return 0;
+}
+
+void *hPAD1Driver = NULL;
+void *hPAD2Driver = NULL;
+
+static unsigned char buf[256];
+unsigned char stdpar[10] = { 0x00, 0x41, 0x5a, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
+unsigned char mousepar[8] = { 0x00, 0x12, 0x5a, 0xff, 0xff, 0xff, 0xff };
+unsigned char analogpar[9] = { 0x00, 0xff, 0x5a, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
+
+static int bufcount, bufc;
+
+PadDataS padd1, padd2;
+
+unsigned char _PADstartPoll(PadDataS *pad) {
+    bufc = 0;
+
+    switch (pad->controllerType) {
+        case PSE_PAD_TYPE_MOUSE:
+            mousepar[3] = pad->buttonStatus & 0xff;
+            mousepar[4] = pad->buttonStatus >> 8;
+            mousepar[5] = pad->moveX;
+            mousepar[6] = pad->moveY;
+
+            memcpy(buf, mousepar, 7);
+            bufcount = 6;
+            break;
+        case PSE_PAD_TYPE_NEGCON: // npc101/npc104(slph00001/slph00069)
+            analogpar[1] = 0x23;
+            analogpar[3] = pad->buttonStatus & 0xff;
+            analogpar[4] = pad->buttonStatus >> 8;
+            analogpar[5] = pad->rightJoyX;
+            analogpar[6] = pad->rightJoyY;
+            analogpar[7] = pad->leftJoyX;
+            analogpar[8] = pad->leftJoyY;
+
+            memcpy(buf, analogpar, 9);
+            bufcount = 8;
+            break;
+        case PSE_PAD_TYPE_ANALOGPAD: // scph1150
+            analogpar[1] = 0x73;
+            analogpar[3] = pad->buttonStatus & 0xff;
+            analogpar[4] = pad->buttonStatus >> 8;
+            analogpar[5] = pad->rightJoyX;
+            analogpar[6] = pad->rightJoyY;
+            analogpar[7] = pad->leftJoyX;
+            analogpar[8] = pad->leftJoyY;
+
+            memcpy(buf, analogpar, 9);
+            bufcount = 8;
+            break;
+        case PSE_PAD_TYPE_ANALOGJOY: // scph1110
+            analogpar[1] = 0x53;
+            analogpar[3] = pad->buttonStatus & 0xff;
+            analogpar[4] = pad->buttonStatus >> 8;
+            analogpar[5] = pad->rightJoyX;
+            analogpar[6] = pad->rightJoyY;
+            analogpar[7] = pad->leftJoyX;
+            analogpar[8] = pad->leftJoyY;
+
+            memcpy(buf, analogpar, 9);
+            bufcount = 8;
+            break;
+        case PSE_PAD_TYPE_STANDARD:
+        default:
+            stdpar[3] = pad->buttonStatus & 0xff;
+            stdpar[4] = pad->buttonStatus >> 8;
+
+            memcpy(buf, stdpar, 5);
+            bufcount = 4;
+    }
+
+    return buf[bufc++];
+}
+
+unsigned char _PADpoll(unsigned char value) {
+    if (bufc > bufcount) return 0;
+    return buf[bufc++];
+}
+
+unsigned char CALLBACK PAD1__startPoll(int pad) {
+    PadDataS padd;
+
+    PAD1_readPort1(&padd);
+
+    return _PADstartPoll(&padd);
+}
+
+unsigned char CALLBACK PAD1__poll(unsigned char value) {
+    return _PADpoll(value);
+}
+
+long CALLBACK PAD1__configure(void) { return 0; }
+void CALLBACK PAD1__about(void) {}
+long CALLBACK PAD1__test(void) { return 0; }
+long CALLBACK PAD1__query(void) { return 3; }
+long CALLBACK PAD1__keypressed() { return 0; }
+
+#define LoadPad1Sym1(dest, name) \
+	LoadSym(PAD1_##dest, PAD##dest, name, TRUE);
+
+#define LoadPad1SymN(dest, name) \
+	LoadSym(PAD1_##dest, PAD##dest, name, FALSE);
+
+#define LoadPad1Sym0(dest, name) \
+	LoadSym(PAD1_##dest, PAD##dest, name, FALSE); \
+	if (PAD1_##dest == NULL) PAD1_##dest = (PAD##dest) PAD1__##dest;
+
+static int LoadPAD1plugin(const char *PAD1dll) {
+	void *drv;
+
+	hPAD1Driver = SysLoadLibrary(PAD1dll);
+	if (hPAD1Driver == NULL) {
+		PAD1_configure = NULL;
+		SysMessage (_("Could not load Controller 1 plugin %s!"), PAD1dll); return -1;
+	}
+	drv = hPAD1Driver;
+	LoadPad1Sym1(init, "PADinit");
+	LoadPad1Sym1(shutdown, "PADshutdown");
+	LoadPad1Sym1(open, "PADopen");
+	LoadPad1Sym1(close, "PADclose");
+	LoadPad1Sym0(query, "PADquery");
+	LoadPad1Sym1(readPort1, "PADreadPort1");
+	LoadPad1Sym0(configure, "PADconfigure");
+	LoadPad1Sym0(test, "PADtest");
+	LoadPad1Sym0(about, "PADabout");
+	LoadPad1Sym0(keypressed, "PADkeypressed");
+	LoadPad1Sym0(startPoll, "PADstartPoll");
+	LoadPad1Sym0(poll, "PADpoll");
+	LoadPad1SymN(setSensitive, "PADsetSensitive");
+
+	return 0;
+}
+
+unsigned char CALLBACK PAD2__startPoll(int pad) {
+	PadDataS padd;
+
+	PAD2_readPort2(&padd);
+    
+	return _PADstartPoll(&padd);
+}
+
+unsigned char CALLBACK PAD2__poll(unsigned char value) {
+	return _PADpoll(value);
+}
+
+long CALLBACK PAD2__configure(void) { return 0; }
+void CALLBACK PAD2__about(void) {}
+long CALLBACK PAD2__test(void) { return 0; }
+long CALLBACK PAD2__query(void) { return PSE_PAD_USE_PORT1 | PSE_PAD_USE_PORT2; }
+long CALLBACK PAD2__keypressed() { return 0; }
+
+#define LoadPad2Sym1(dest, name) \
+	LoadSym(PAD2_##dest, PAD##dest, name, TRUE);
+
+#define LoadPad2Sym0(dest, name) \
+	LoadSym(PAD2_##dest, PAD##dest, name, FALSE); \
+	if (PAD2_##dest == NULL) PAD2_##dest = (PAD##dest) PAD2__##dest;
+
+#define LoadPad2SymN(dest, name) \
+	LoadSym(PAD2_##dest, PAD##dest, name, FALSE);
+
+static int LoadPAD2plugin(const char *PAD2dll) {
+	void *drv;
+
+	hPAD2Driver = SysLoadLibrary(PAD2dll);
+	if (hPAD2Driver == NULL) {
+		PAD2_configure = NULL;
+		SysMessage (_("Could not load Controller 2 plugin %s!"), PAD2dll); return -1;
+	}
+	drv = hPAD2Driver;
+	LoadPad2Sym1(init, "PADinit");
+	LoadPad2Sym1(shutdown, "PADshutdown");
+	LoadPad2Sym1(open, "PADopen");
+	LoadPad2Sym1(close, "PADclose");
+	LoadPad2Sym0(query, "PADquery");
+	LoadPad2Sym1(readPort2, "PADreadPort2");
+	LoadPad2Sym0(configure, "PADconfigure");
+	LoadPad2Sym0(test, "PADtest");
+	LoadPad2Sym0(about, "PADabout");
+	LoadPad2Sym0(keypressed, "PADkeypressed");
+	LoadPad2Sym0(startPoll, "PADstartPoll");
+	LoadPad2Sym0(poll, "PADpoll");
+	LoadPad2SymN(setSensitive, "PADsetSensitive");
+
+	return 0;
+}
+
+void *hNETDriver = NULL;
+
+void CALLBACK NET__setInfo(netInfo *info) {}
+void CALLBACK NET__keypressed(int key) {}
+long CALLBACK NET__configure(void) { return 0; }
+long CALLBACK NET__test(void) { return 0; }
+void CALLBACK NET__about(void) {}
+
+#define LoadNetSym1(dest, name) \
+	LoadSym(NET_##dest, NET##dest, name, TRUE);
+
+#define LoadNetSymN(dest, name) \
+	LoadSym(NET_##dest, NET##dest, name, FALSE);
+
+#define LoadNetSym0(dest, name) \
+	LoadSym(NET_##dest, NET##dest, name, FALSE); \
+	if (NET_##dest == NULL) NET_##dest = (NET##dest) NET__##dest;
+
+static int LoadNETplugin(const char *NETdll) {
+	void *drv;
+
+	hNETDriver = SysLoadLibrary(NETdll);
+	if (hNETDriver == NULL) {
+		SysMessage (_("Could not load NetPlay plugin %s!"), NETdll); return -1;
+	}
+	drv = hNETDriver;
+	LoadNetSym1(init, "NETinit");
+	LoadNetSym1(shutdown, "NETshutdown");
+	LoadNetSym1(open, "NETopen");
+	LoadNetSym1(close, "NETclose");
+	LoadNetSymN(sendData, "NETsendData");
+	LoadNetSymN(recvData, "NETrecvData");
+	LoadNetSym1(sendPadData, "NETsendPadData");
+	LoadNetSym1(recvPadData, "NETrecvPadData");
+	LoadNetSym1(queryPlayer, "NETqueryPlayer");
+	LoadNetSym1(pause, "NETpause");
+	LoadNetSym1(resume, "NETresume");
+	LoadNetSym0(setInfo, "NETsetInfo");
+	LoadNetSym0(keypressed, "NETkeypressed");
+	LoadNetSym0(configure, "NETconfigure");
+	LoadNetSym0(test, "NETtest");
+	LoadNetSym0(about, "NETabout");
+
+	return 0;
+}
+
+#ifdef ENABLE_SIO1API
+
+void *hSIO1Driver = NULL;
+
+long CALLBACK SIO1__init(void) { return 0; }
+long CALLBACK SIO1__shutdown(void) { return 0; }
+long CALLBACK SIO1__open(void) { return 0; }
+long CALLBACK SIO1__close(void) { return 0; }
+long CALLBACK SIO1__configure(void) { return 0; }
+long CALLBACK SIO1__test(void) { return 0; }
+void CALLBACK SIO1__about(void) {}
+void CALLBACK SIO1__pause(void) {}
+void CALLBACK SIO1__resume(void) {}
+long CALLBACK SIO1__keypressed(int key) { return 0; }
+void CALLBACK SIO1__writeData8(unsigned char val) {}
+void CALLBACK SIO1__writeData16(unsigned short val) {}
+void CALLBACK SIO1__writeData32(unsigned long val) {}
+void CALLBACK SIO1__writeStat16(unsigned short val) {}
+void CALLBACK SIO1__writeStat32(unsigned long val) {}
+void CALLBACK SIO1__writeMode16(unsigned short val) {}
+void CALLBACK SIO1__writeMode32(unsigned long val) {}
+void CALLBACK SIO1__writeCtrl16(unsigned short val) {}
+void CALLBACK SIO1__writeCtrl32(unsigned long val) {}
+void CALLBACK SIO1__writeBaud16(unsigned short val) {}
+void CALLBACK SIO1__writeBaud32(unsigned long val) {}
+unsigned char CALLBACK SIO1__readData8(void) { return 0; }
+unsigned short CALLBACK SIO1__readData16(void) { return 0; }
+unsigned long CALLBACK SIO1__readData32(void) { return 0; }
+unsigned short CALLBACK SIO1__readStat16(void) { return 0; }
+unsigned long CALLBACK SIO1__readStat32(void) { return 0; }
+unsigned short CALLBACK SIO1__readMode16(void) { return 0; }
+unsigned long CALLBACK SIO1__readMode32(void) { return 0; }
+unsigned short CALLBACK SIO1__readCtrl16(void) { return 0; }
+unsigned long CALLBACK SIO1__readCtrl32(void) { return 0; }
+unsigned short CALLBACK SIO1__readBaud16(void) { return 0; }
+unsigned long CALLBACK SIO1__readBaud32(void) { return 0; }
+void CALLBACK SIO1__registerCallback(void (CALLBACK *callback)(void)) {};
+
+void CALLBACK SIO1irq(void) {
+    psxHu32ref(0x1070) |= SWAPu32(0x100);
+}
+
+#define LoadSio1Sym1(dest, name) \
+    LoadSym(SIO1_##dest, SIO1##dest, name, TRUE);
+
+#define LoadSio1SymN(dest, name) \
+    LoadSym(SIO1_##dest, SIO1##dest, name, FALSE);
+
+#define LoadSio1Sym0(dest, name) \
+    LoadSym(SIO1_##dest, SIO1##dest, name, FALSE); \
+    if (SIO1_##dest == NULL) SIO1_##dest = (SIO1##dest) SIO1__##dest;
+
+static int LoadSIO1plugin(const char *SIO1dll) {
+    void *drv;
+
+    hSIO1Driver = SysLoadLibrary(SIO1dll);
+    if (hSIO1Driver == NULL) {
+        SysMessage (_("Could not load SIO1 plugin %s!"), SIO1dll); return -1;
+    }
+    drv = hSIO1Driver;
+
+    LoadSio1Sym0(init, "SIO1init");
+    LoadSio1Sym0(shutdown, "SIO1shutdown");
+    LoadSio1Sym0(open, "SIO1open");
+    LoadSio1Sym0(close, "SIO1close");
+    LoadSio1Sym0(pause, "SIO1pause");
+    LoadSio1Sym0(resume, "SIO1resume");
+    LoadSio1Sym0(keypressed, "SIO1keypressed");
+    LoadSio1Sym0(configure, "SIO1configure");
+    LoadSio1Sym0(test, "SIO1test");
+    LoadSio1Sym0(about, "SIO1about");
+    LoadSio1Sym0(writeData8, "SIO1writeData8");
+    LoadSio1Sym0(writeData16, "SIO1writeData16");
+    LoadSio1Sym0(writeData32, "SIO1writeData32");
+    LoadSio1Sym0(writeStat16, "SIO1writeStat16");
+    LoadSio1Sym0(writeStat32, "SIO1writeStat32");
+    LoadSio1Sym0(writeMode16, "SIO1writeMode16");
+    LoadSio1Sym0(writeMode32, "SIO1writeMode32");
+    LoadSio1Sym0(writeCtrl16, "SIO1writeCtrl16");
+    LoadSio1Sym0(writeCtrl32, "SIO1writeCtrl32");
+    LoadSio1Sym0(writeBaud16, "SIO1writeBaud16");
+    LoadSio1Sym0(writeBaud32, "SIO1writeBaud32");
+    LoadSio1Sym0(readData16, "SIO1readData16");
+    LoadSio1Sym0(readData32, "SIO1readData32");
+    LoadSio1Sym0(readStat16, "SIO1readStat16");
+    LoadSio1Sym0(readStat32, "SIO1readStat32");
+    LoadSio1Sym0(readMode16, "SIO1readMode16");
+    LoadSio1Sym0(readMode32, "SIO1readMode32");
+    LoadSio1Sym0(readCtrl16, "SIO1readCtrl16");
+    LoadSio1Sym0(readCtrl32, "SIO1readCtrl32");
+    LoadSio1Sym0(readBaud16, "SIO1readBaud16");
+    LoadSio1Sym0(readBaud32, "SIO1readBaud32");
+    LoadSio1Sym0(registerCallback, "SIO1registerCallback");
+
+    return 0;
+}
+
+#endif
+
+void CALLBACK clearDynarec(void) {
+	psxCpu->Reset();
+}
+
+int LoadPlugins() {
+	int ret;
+	char Plugin[MAXPATHLEN];
+
+	ReleasePlugins();
+
+	if (UsingIso()) {
+		LoadCDRplugin(NULL);
+	} else {
+		sprintf(Plugin, "%s/%s", Config.PluginsDir, Config.Cdr);
+		if (LoadCDRplugin(Plugin) == -1) return -1;
+	}
+
+	sprintf(Plugin, "%s/%s", Config.PluginsDir, Config.Gpu);
+	if (LoadGPUplugin(Plugin) == -1) return -1;
+
+	sprintf(Plugin, "%s/%s", Config.PluginsDir, Config.Spu);
+	if (LoadSPUplugin(Plugin) == -1) return -1;
+
+	sprintf(Plugin, "%s/%s", Config.PluginsDir, Config.Pad1);
+	if (LoadPAD1plugin(Plugin) == -1) return -1;
+
+	sprintf(Plugin, "%s/%s", Config.PluginsDir, Config.Pad2);
+	if (LoadPAD2plugin(Plugin) == -1) return -1;
+
+	if (strcmp("Disabled", Config.Net) == 0 || strcmp("", Config.Net) == 0)
+		Config.UseNet = FALSE;
+	else {
+		Config.UseNet = TRUE;
+		sprintf(Plugin, "%s/%s", Config.PluginsDir, Config.Net);
+		if (LoadNETplugin(Plugin) == -1) Config.UseNet = FALSE;
+	}
+
+#ifdef ENABLE_SIO1API
+	sprintf(Plugin, "%s/%s", Config.PluginsDir, Config.Sio1);
+	if (LoadSIO1plugin(Plugin) == -1) return -1;
+#endif
+
+	ret = CDR_init();
+	if (ret < 0) { SysMessage (_("Error initializing CD-ROM plugin: %d"), ret); return -1; }
+	ret = GPU_init();
+	if (ret < 0) { SysMessage (_("Error initializing GPU plugin: %d"), ret); return -1; }
+	ret = SPU_init();
+	if (ret < 0) { SysMessage (_("Error initializing SPU plugin: %d"), ret); return -1; }
+	ret = PAD1_init(1);
+	if (ret < 0) { SysMessage (_("Error initializing Controller 1 plugin: %d"), ret); return -1; }
+	ret = PAD2_init(2);
+	if (ret < 0) { SysMessage (_("Error initializing Controller 2 plugin: %d"), ret); return -1; }
+
+	if (Config.UseNet) {
+		ret = NET_init();
+		if (ret < 0) { SysMessage (_("Error initializing NetPlay plugin: %d"), ret); return -1; }
+	}
+
+#ifdef ENABLE_SIO1API
+	ret = SIO1_init();
+	if (ret < 0) { SysMessage (_("Error initializing SIO1 plugin: %d"), ret); return -1; }
+#endif
+
+	SysPrintf(_("Plugins loaded.\n"));
+	return 0;
+}
+
+void ReleasePlugins() {
+	if (Config.UseNet) {
+		int ret = NET_close();
+		if (ret < 0) Config.UseNet = FALSE;
+	}
+	NetOpened = FALSE;
+
+	if (hCDRDriver != NULL || cdrIsoActive()) CDR_shutdown();
+	if (hGPUDriver != NULL) GPU_shutdown();
+	if (hSPUDriver != NULL) SPU_shutdown();
+	if (hPAD1Driver != NULL) PAD1_shutdown();
+	if (hPAD2Driver != NULL) PAD2_shutdown();
+
+	if (Config.UseNet && hNETDriver != NULL) NET_shutdown(); 
+
+	if (hCDRDriver != NULL) SysCloseLibrary(hCDRDriver); hCDRDriver = NULL;
+	if (hGPUDriver != NULL) SysCloseLibrary(hGPUDriver); hGPUDriver = NULL;
+	if (hSPUDriver != NULL) SysCloseLibrary(hSPUDriver); hSPUDriver = NULL;
+	if (hPAD1Driver != NULL) SysCloseLibrary(hPAD1Driver); hPAD1Driver = NULL;
+	if (hPAD2Driver != NULL) SysCloseLibrary(hPAD2Driver); hPAD2Driver = NULL;
+
+	if (Config.UseNet && hNETDriver != NULL) {
+		SysCloseLibrary(hNETDriver); hNETDriver = NULL;
+	}
+
+#ifdef ENABLE_SIO1API
+	if (hSIO1Driver != NULL) {
+		SIO1_shutdown();
+		SysCloseLibrary(hSIO1Driver);
+		hSIO1Driver = NULL;
+	}
+#endif
+}
+
+void SetIsoFile(const char *filename) {
+	if (filename == NULL) {
+		IsoFile[0] = '\0';
+		return;
+	}
+	strncpy(IsoFile, filename, MAXPATHLEN);
+}
+
+const char *GetIsoFile(void) {
+	return IsoFile;
+}
+
+boolean UsingIso(void) {
+	return (IsoFile[0] != '\0');
+}
+
+void SetCdOpenCaseTime(s64 time) {
+	cdOpenCaseTime = time;
+}
diff --git a/libpcsxcore/plugins.h b/libpcsxcore/plugins.h
new file mode 100644
index 0000000..9c24ece
--- /dev/null
+++ b/libpcsxcore/plugins.h
@@ -0,0 +1,411 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+#ifndef __PLUGINS_H__
+#define __PLUGINS_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "psxcommon.h"
+
+//#define ENABLE_SIO1API 1
+
+#ifndef _WIN32
+
+typedef void* HWND;
+#define CALLBACK
+
+typedef long (*GPUopen)(unsigned long *, char *, char *);
+typedef long (*SPUopen)(void);
+typedef long (*PADopen)(unsigned long *);
+typedef long (*NETopen)(unsigned long *);
+typedef long (*SIO1open)(unsigned long *);
+
+#else
+
+#include <windows.h>
+
+typedef long (CALLBACK* GPUopen)(HWND);
+typedef long (CALLBACK* SPUopen)(HWND);
+typedef long (CALLBACK* PADopen)(HWND);
+typedef long (CALLBACK* NETopen)(HWND);
+typedef long (CALLBACK* SIO1open)(HWND);
+
+#endif
+
+#include "spu.h"
+
+#include "psemu_plugin_defs.h"
+#include "decode_xa.h"
+
+int LoadPlugins();
+void ReleasePlugins();
+int OpenPlugins();
+void ClosePlugins();
+
+typedef unsigned long (CALLBACK* PSEgetLibType)(void);
+typedef unsigned long (CALLBACK* PSEgetLibVersion)(void);
+typedef char *(CALLBACK* PSEgetLibName)(void);
+
+// GPU Functions
+typedef long (CALLBACK* GPUinit)(void);
+typedef long (CALLBACK* GPUshutdown)(void);
+typedef long (CALLBACK* GPUclose)(void);
+typedef void (CALLBACK* GPUwriteStatus)(uint32_t);
+typedef void (CALLBACK* GPUwriteData)(uint32_t);
+typedef void (CALLBACK* GPUwriteDataMem)(uint32_t *, int);
+typedef uint32_t (CALLBACK* GPUreadStatus)(void);
+typedef uint32_t (CALLBACK* GPUreadData)(void);
+typedef void (CALLBACK* GPUreadDataMem)(uint32_t *, int);
+typedef long (CALLBACK* GPUdmaChain)(uint32_t *,uint32_t);
+typedef void (CALLBACK* GPUupdateLace)(void);
+typedef long (CALLBACK* GPUconfigure)(void);
+typedef long (CALLBACK* GPUtest)(void);
+typedef void (CALLBACK* GPUabout)(void);
+typedef void (CALLBACK* GPUmakeSnapshot)(void);
+typedef void (CALLBACK* GPUkeypressed)(int);
+typedef void (CALLBACK* GPUdisplayText)(char *);
+typedef struct {
+	uint32_t ulFreezeVersion;
+	uint32_t ulStatus;
+	uint32_t ulControl[256];
+	unsigned char psxVRam[1024*512*2];
+} GPUFreeze_t;
+typedef long (CALLBACK* GPUfreeze)(uint32_t, GPUFreeze_t *);
+typedef long (CALLBACK* GPUgetScreenPic)(unsigned char *);
+typedef long (CALLBACK* GPUshowScreenPic)(unsigned char *);
+typedef void (CALLBACK* GPUclearDynarec)(void (CALLBACK *callback)(void));
+typedef void (CALLBACK* GPUvBlank)(int);
+
+// GPU function pointers
+extern GPUupdateLace    GPU_updateLace;
+extern GPUinit          GPU_init;
+extern GPUshutdown      GPU_shutdown; 
+extern GPUconfigure     GPU_configure;
+extern GPUtest          GPU_test;
+extern GPUabout         GPU_about;
+extern GPUopen          GPU_open;
+extern GPUclose         GPU_close;
+extern GPUreadStatus    GPU_readStatus;
+extern GPUreadData      GPU_readData;
+extern GPUreadDataMem   GPU_readDataMem;
+extern GPUwriteStatus   GPU_writeStatus; 
+extern GPUwriteData     GPU_writeData;
+extern GPUwriteDataMem  GPU_writeDataMem;
+extern GPUdmaChain      GPU_dmaChain;
+extern GPUkeypressed    GPU_keypressed;
+extern GPUdisplayText   GPU_displayText;
+extern GPUmakeSnapshot  GPU_makeSnapshot;
+extern GPUfreeze        GPU_freeze;
+extern GPUgetScreenPic  GPU_getScreenPic;
+extern GPUshowScreenPic GPU_showScreenPic;
+extern GPUclearDynarec  GPU_clearDynarec;
+extern GPUvBlank        GPU_vBlank;
+
+// CD-ROM Functions
+typedef long (CALLBACK* CDRinit)(void);
+typedef long (CALLBACK* CDRshutdown)(void);
+typedef long (CALLBACK* CDRopen)(void);
+typedef long (CALLBACK* CDRclose)(void);
+typedef long (CALLBACK* CDRgetTN)(unsigned char *);
+typedef long (CALLBACK* CDRgetTD)(unsigned char, unsigned char *);
+typedef long (CALLBACK* CDRreadTrack)(unsigned char *);
+typedef unsigned char* (CALLBACK* CDRgetBuffer)(void);
+typedef unsigned char* (CALLBACK* CDRgetBufferSub)(void);
+typedef long (CALLBACK* CDRconfigure)(void);
+typedef long (CALLBACK* CDRtest)(void);
+typedef void (CALLBACK* CDRabout)(void);
+typedef long (CALLBACK* CDRplay)(unsigned char *);
+typedef long (CALLBACK* CDRstop)(void);
+typedef long (CALLBACK* CDRsetfilename)(char *);
+struct CdrStat {
+	uint32_t Type;
+	uint32_t Status;
+	unsigned char Time[3];
+};
+typedef long (CALLBACK* CDRgetStatus)(struct CdrStat *);
+typedef char* (CALLBACK* CDRgetDriveLetter)(void);
+struct SubQ {
+	char res0[12];
+	unsigned char ControlAndADR;
+	unsigned char TrackNumber;
+	unsigned char IndexNumber;
+	unsigned char TrackRelativeAddress[3];
+	unsigned char Filler;
+	unsigned char AbsoluteAddress[3];
+	unsigned char CRC[2];
+	char res1[72];
+};
+typedef long (CALLBACK* CDRreadCDDA)(unsigned char, unsigned char, unsigned char, unsigned char *);
+typedef long (CALLBACK* CDRgetTE)(unsigned char, unsigned char *, unsigned char *, unsigned char *);
+
+// CD-ROM function pointers
+extern CDRinit               CDR_init;
+extern CDRshutdown           CDR_shutdown;
+extern CDRopen               CDR_open;
+extern CDRclose              CDR_close; 
+extern CDRtest               CDR_test;
+extern CDRgetTN              CDR_getTN;
+extern CDRgetTD              CDR_getTD;
+extern CDRreadTrack          CDR_readTrack;
+extern CDRgetBuffer          CDR_getBuffer;
+extern CDRgetBufferSub       CDR_getBufferSub;
+extern CDRplay               CDR_play;
+extern CDRstop               CDR_stop;
+extern CDRgetStatus          CDR_getStatus;
+extern CDRgetDriveLetter     CDR_getDriveLetter;
+extern CDRconfigure          CDR_configure;
+extern CDRabout              CDR_about;
+extern CDRsetfilename        CDR_setfilename;
+extern CDRreadCDDA           CDR_readCDDA;
+extern CDRgetTE              CDR_getTE;
+
+// SPU Functions
+typedef long (CALLBACK* SPUinit)(void);				
+typedef long (CALLBACK* SPUshutdown)(void);	
+typedef long (CALLBACK* SPUclose)(void);			
+typedef void (CALLBACK* SPUplaySample)(unsigned char);		
+typedef void (CALLBACK* SPUwriteRegister)(unsigned long, unsigned short);
+typedef unsigned short (CALLBACK* SPUreadRegister)(unsigned long);
+typedef void (CALLBACK* SPUwriteDMA)(unsigned short);
+typedef unsigned short (CALLBACK* SPUreadDMA)(void);
+typedef void (CALLBACK* SPUwriteDMAMem)(unsigned short *, int);
+typedef void (CALLBACK* SPUreadDMAMem)(unsigned short *, int);
+typedef void (CALLBACK* SPUplayADPCMchannel)(xa_decode_t *);
+typedef void (CALLBACK* SPUregisterCallback)(void (CALLBACK *callback)(void));
+typedef long (CALLBACK* SPUconfigure)(void);
+typedef long (CALLBACK* SPUtest)(void);
+typedef void (CALLBACK* SPUabout)(void);
+typedef struct {
+	unsigned char PluginName[8];
+	uint32_t PluginVersion;
+	uint32_t Size;
+	unsigned char SPUPorts[0x200];
+	unsigned char SPURam[0x80000];
+	xa_decode_t xa;
+	unsigned char *SPUInfo;
+} SPUFreeze_t;
+typedef long (CALLBACK* SPUfreeze)(uint32_t, SPUFreeze_t *);
+typedef void (CALLBACK* SPUasync)(uint32_t);
+typedef void (CALLBACK* SPUplayCDDAchannel)(short *, int);
+
+// SPU function pointers
+extern SPUconfigure        SPU_configure;
+extern SPUabout            SPU_about;
+extern SPUinit             SPU_init;
+extern SPUshutdown         SPU_shutdown;
+extern SPUtest             SPU_test;
+extern SPUopen             SPU_open;
+extern SPUclose            SPU_close;
+extern SPUplaySample       SPU_playSample;
+extern SPUwriteRegister    SPU_writeRegister;
+extern SPUreadRegister     SPU_readRegister;
+extern SPUwriteDMA         SPU_writeDMA;
+extern SPUreadDMA          SPU_readDMA;
+extern SPUwriteDMAMem      SPU_writeDMAMem;
+extern SPUreadDMAMem       SPU_readDMAMem;
+extern SPUplayADPCMchannel SPU_playADPCMchannel;
+extern SPUfreeze           SPU_freeze;
+extern SPUregisterCallback SPU_registerCallback;
+extern SPUasync            SPU_async;
+extern SPUplayCDDAchannel  SPU_playCDDAchannel;
+
+// PAD Functions
+typedef long (CALLBACK* PADconfigure)(void);
+typedef void (CALLBACK* PADabout)(void);
+typedef long (CALLBACK* PADinit)(long);
+typedef long (CALLBACK* PADshutdown)(void);	
+typedef long (CALLBACK* PADtest)(void);		
+typedef long (CALLBACK* PADclose)(void);
+typedef long (CALLBACK* PADquery)(void);
+typedef long (CALLBACK* PADreadPort1)(PadDataS*);
+typedef long (CALLBACK* PADreadPort2)(PadDataS*);
+typedef long (CALLBACK* PADkeypressed)(void);
+typedef unsigned char (CALLBACK* PADstartPoll)(int);
+typedef unsigned char (CALLBACK* PADpoll)(unsigned char);
+typedef void (CALLBACK* PADsetSensitive)(int);
+
+// PAD function pointers
+extern PADconfigure        PAD1_configure;
+extern PADabout            PAD1_about;
+extern PADinit             PAD1_init;
+extern PADshutdown         PAD1_shutdown;
+extern PADtest             PAD1_test;
+extern PADopen             PAD1_open;
+extern PADclose            PAD1_close;
+extern PADquery            PAD1_query;
+extern PADreadPort1        PAD1_readPort1;
+extern PADkeypressed       PAD1_keypressed;
+extern PADstartPoll        PAD1_startPoll;
+extern PADpoll             PAD1_poll;
+extern PADsetSensitive     PAD1_setSensitive;
+
+extern PADconfigure        PAD2_configure;
+extern PADabout            PAD2_about;
+extern PADinit             PAD2_init;
+extern PADshutdown         PAD2_shutdown;
+extern PADtest             PAD2_test;
+extern PADopen             PAD2_open;
+extern PADclose            PAD2_close;
+extern PADquery            PAD2_query;
+extern PADreadPort2        PAD2_readPort2;
+extern PADkeypressed       PAD2_keypressed;
+extern PADstartPoll        PAD2_startPoll;
+extern PADpoll             PAD2_poll;
+extern PADsetSensitive     PAD2_setSensitive;
+
+// NET Functions
+typedef long (CALLBACK* NETinit)(void);
+typedef long (CALLBACK* NETshutdown)(void);
+typedef long (CALLBACK* NETclose)(void);
+typedef long (CALLBACK* NETconfigure)(void);
+typedef long (CALLBACK* NETtest)(void);
+typedef void (CALLBACK* NETabout)(void);
+typedef void (CALLBACK* NETpause)(void);
+typedef void (CALLBACK* NETresume)(void);
+typedef long (CALLBACK* NETqueryPlayer)(void);
+typedef long (CALLBACK* NETsendData)(void *, int, int);
+typedef long (CALLBACK* NETrecvData)(void *, int, int);
+typedef long (CALLBACK* NETsendPadData)(void *, int);
+typedef long (CALLBACK* NETrecvPadData)(void *, int);
+
+typedef struct {
+	char EmuName[32];
+	char CdromID[9];	// ie. 'SCPH12345', no \0 trailing character
+	char CdromLabel[11];
+	void *psxMem;
+	GPUshowScreenPic GPU_showScreenPic;
+	GPUdisplayText GPU_displayText;
+	PADsetSensitive PAD_setSensitive;
+	char GPUpath[256];	// paths must be absolute
+	char SPUpath[256];
+	char CDRpath[256];
+	char MCD1path[256];
+	char MCD2path[256];
+	char BIOSpath[256];	// 'HLE' for internal bios
+	char Unused[1024];
+} netInfo;
+
+typedef long (CALLBACK* NETsetInfo)(netInfo *);
+typedef long (CALLBACK* NETkeypressed)(int);
+
+// NET function pointers 
+extern NETinit               NET_init;
+extern NETshutdown           NET_shutdown;
+extern NETopen               NET_open;
+extern NETclose              NET_close; 
+extern NETtest               NET_test;
+extern NETconfigure          NET_configure;
+extern NETabout              NET_about;
+extern NETpause              NET_pause;
+extern NETresume             NET_resume;
+extern NETqueryPlayer        NET_queryPlayer;
+extern NETsendData           NET_sendData;
+extern NETrecvData           NET_recvData;
+extern NETsendPadData        NET_sendPadData;
+extern NETrecvPadData        NET_recvPadData;
+extern NETsetInfo            NET_setInfo;
+extern NETkeypressed         NET_keypressed;
+
+#ifdef ENABLE_SIO1API
+
+// SIO1 Functions (link cable)
+typedef long (CALLBACK* SIO1init)(void);
+typedef long (CALLBACK* SIO1shutdown)(void);
+typedef long (CALLBACK* SIO1close)(void);
+typedef long (CALLBACK* SIO1configure)(void);
+typedef long (CALLBACK* SIO1test)(void);
+typedef void (CALLBACK* SIO1about)(void);
+typedef void (CALLBACK* SIO1pause)(void);
+typedef void (CALLBACK* SIO1resume)(void);
+typedef long (CALLBACK* SIO1keypressed)(int);
+typedef void (CALLBACK* SIO1writeData8)(unsigned char);
+typedef void (CALLBACK* SIO1writeData16)(unsigned short);
+typedef void (CALLBACK* SIO1writeData32)(unsigned long);
+typedef void (CALLBACK* SIO1writeStat16)(unsigned short);
+typedef void (CALLBACK* SIO1writeStat32)(unsigned long);
+typedef void (CALLBACK* SIO1writeMode16)(unsigned short);
+typedef void (CALLBACK* SIO1writeMode32)(unsigned long);
+typedef void (CALLBACK* SIO1writeCtrl16)(unsigned short);
+typedef void (CALLBACK* SIO1writeCtrl32)(unsigned long);
+typedef void (CALLBACK* SIO1writeBaud16)(unsigned short);
+typedef void (CALLBACK* SIO1writeBaud32)(unsigned long);
+typedef unsigned char (CALLBACK* SIO1readData8)(void);
+typedef unsigned short (CALLBACK* SIO1readData16)(void);
+typedef unsigned long (CALLBACK* SIO1readData32)(void);
+typedef unsigned short (CALLBACK* SIO1readStat16)(void);
+typedef unsigned long (CALLBACK* SIO1readStat32)(void);
+typedef unsigned short (CALLBACK* SIO1readMode16)(void);
+typedef unsigned long (CALLBACK* SIO1readMode32)(void);
+typedef unsigned short (CALLBACK* SIO1readCtrl16)(void);
+typedef unsigned long (CALLBACK* SIO1readCtrl32)(void);
+typedef unsigned short (CALLBACK* SIO1readBaud16)(void);
+typedef unsigned long (CALLBACK* SIO1readBaud32)(void);
+typedef void (CALLBACK* SIO1registerCallback)(void (CALLBACK *callback)(void));
+
+// SIO1 function pointers 
+extern SIO1init               SIO1_init;
+extern SIO1shutdown           SIO1_shutdown;
+extern SIO1open               SIO1_open;
+extern SIO1close              SIO1_close; 
+extern SIO1test               SIO1_test;
+extern SIO1configure          SIO1_configure;
+extern SIO1about              SIO1_about;
+extern SIO1pause              SIO1_pause;
+extern SIO1resume             SIO1_resume;
+extern SIO1keypressed         SIO1_keypressed;
+extern SIO1writeData8         SIO1_writeData8;
+extern SIO1writeData16        SIO1_writeData16;
+extern SIO1writeData32        SIO1_writeData32;
+extern SIO1writeStat16        SIO1_writeStat16;
+extern SIO1writeStat32        SIO1_writeStat32;
+extern SIO1writeMode16        SIO1_writeMode16;
+extern SIO1writeMode32        SIO1_writeMode32;
+extern SIO1writeCtrl16        SIO1_writeCtrl16;
+extern SIO1writeCtrl32        SIO1_writeCtrl32;
+extern SIO1writeBaud16        SIO1_writeBaud16;
+extern SIO1writeBaud32        SIO1_writeBaud32;
+extern SIO1readData8          SIO1_readData8;
+extern SIO1readData16         SIO1_readData16;
+extern SIO1readData32         SIO1_readData32;
+extern SIO1readStat16         SIO1_readStat16;
+extern SIO1readStat32         SIO1_readStat32;
+extern SIO1readMode16         SIO1_readMode16;
+extern SIO1readMode32         SIO1_readMode32;
+extern SIO1readCtrl16         SIO1_readCtrl16;
+extern SIO1readCtrl32         SIO1_readCtrl32;
+extern SIO1readBaud16         SIO1_readBaud16;
+extern SIO1readBaud32         SIO1_readBaud32;
+extern SIO1registerCallback   SIO1_registerCallback;
+
+#endif
+
+void CALLBACK clearDynarec(void);
+
+void SetIsoFile(const char *filename);
+const char *GetIsoFile(void);
+boolean UsingIso(void);
+void SetCdOpenCaseTime(s64 time);
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/libpcsxcore/ppc/pGte.h b/libpcsxcore/ppc/pGte.h
new file mode 100644
index 0000000..a968460
--- /dev/null
+++ b/libpcsxcore/ppc/pGte.h
@@ -0,0 +1,91 @@
+/*  Pcsx - Pc Psx Emulator
+ *  Copyright (C) 1999-2003  Pcsx Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA
+ */
+
+#ifndef PGET_H
+#define PGET_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+int psxCP2time[64] = {
+        2, 16 , 1 , 1, 1, 1 , 8, 1, // 00
+        1 , 1 , 1 , 1, 6 , 1 , 1 , 1, // 08
+        8 , 8, 8, 19, 13 , 1 , 44 , 1, // 10
+        1 , 1 , 1 , 17, 11 , 1 , 14  , 1, // 18
+        30 , 1 , 1 , 1, 1, 1 , 1 , 1, // 20
+        5 , 8 , 17 , 1, 1, 5, 6, 1, // 28
+        23 , 1 , 1 , 1, 1, 1 , 1 , 1, // 30
+        1 , 1 , 1 , 1, 1, 6 , 5  , 39  // 38
+};
+
+#define CP2_FUNC(f) \
+void gte##f(); \
+static void rec##f() { \
+	if (pc < cop2readypc) idlecyclecount += (cop2readypc - pc)>>2; \
+	iFlushRegs(0); \
+	LIW(0, (u32)psxRegs.code); \
+	STW(0, OFFSET(&psxRegs, &psxRegs.code), GetHWRegSpecial(PSXREGS)); \
+	FlushAllHWReg(); \
+	CALLFunc ((u32)gte##f); \
+	cop2readypc = pc + psxCP2time[_fFunct_(psxRegs.code)]<<2; \
+}
+
+#define CP2_FUNCNC(f) \
+void gte##f(); \
+static void rec##f() { \
+	if (pc < cop2readypc) idlecyclecount += (cop2readypc - pc)>>2; \
+	iFlushRegs(0); \
+	CALLFunc ((u32)gte##f); \
+/*	branch = 2; */\
+	cop2readypc = pc + psxCP2time[_fFunct_(psxRegs.code)]; \
+}
+
+CP2_FUNC(MFC2);
+CP2_FUNC(MTC2);
+CP2_FUNC(CFC2);
+CP2_FUNC(CTC2);
+CP2_FUNC(LWC2);
+CP2_FUNC(SWC2);
+CP2_FUNCNC(RTPS);
+CP2_FUNC(OP);
+CP2_FUNCNC(NCLIP);
+CP2_FUNC(DPCS);
+CP2_FUNC(INTPL);
+CP2_FUNC(MVMVA);
+CP2_FUNCNC(NCDS);
+CP2_FUNCNC(NCDT);
+CP2_FUNCNC(CDP);
+CP2_FUNCNC(NCCS);
+CP2_FUNCNC(CC);
+CP2_FUNCNC(NCS);
+CP2_FUNCNC(NCT);
+CP2_FUNC(SQR);
+CP2_FUNC(DCPL);
+CP2_FUNCNC(DPCT);
+CP2_FUNCNC(AVSZ3);
+CP2_FUNCNC(AVSZ4);
+CP2_FUNCNC(RTPT);
+CP2_FUNC(GPF);
+CP2_FUNC(GPL);
+CP2_FUNCNC(NCCT);
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/libpcsxcore/ppc/pR3000A.c b/libpcsxcore/ppc/pR3000A.c
new file mode 100644
index 0000000..93745f8
--- /dev/null
+++ b/libpcsxcore/ppc/pR3000A.c
@@ -0,0 +1,3540 @@
+/*  Pcsx - Pc Psx Emulator
+ *  Copyright (C) 1999-2003  Pcsx Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 51 Franklin Steet, Fifth Floor, Boston, MA 02111-1307 USA
+ */
+
+#ifdef _MSC_VER_
+#pragma warning(disable:4244)
+#pragma warning(disable:4761)
+#endif
+#include <stdlib.h>
+#include <string.h>
+#include <time.h>
+#include <sys/types.h>
+#include <sys/mman.h>
+
+#ifndef MAP_ANONYMOUS
+#define MAP_ANONYMOUS MAP_ANON
+#endif
+
+#include "../psxcommon.h"
+#include "ppc.h"
+#include "reguse.h"
+#include "../r3000a.h"
+#include "../psxhle.h"
+
+//#define NO_CONSTANT
+
+u32 *psxRecLUT;
+
+#undef _Op_
+#define _Op_     _fOp_(psxRegs.code)
+#undef _Funct_
+#define _Funct_  _fFunct_(psxRegs.code)
+#undef _Rd_
+#define _Rd_     _fRd_(psxRegs.code)
+#undef _Rt_
+#define _Rt_     _fRt_(psxRegs.code)
+#undef _Rs_
+#define _Rs_     _fRs_(psxRegs.code)
+#undef _Sa_
+#define _Sa_     _fSa_(psxRegs.code)
+#undef _Im_
+#define _Im_     _fIm_(psxRegs.code)
+#undef _Target_
+#define _Target_ _fTarget_(psxRegs.code)
+
+#undef _Imm_
+#define _Imm_	 _fImm_(psxRegs.code)
+#undef _ImmU_
+#define _ImmU_	 _fImmU_(psxRegs.code)
+
+#undef PC_REC
+#undef PC_REC8
+#undef PC_REC16
+#undef PC_REC32
+#define PC_REC(x)	(psxRecLUT[x >> 16] + (x & 0xffff))
+#define PC_REC8(x)	(*(u8 *)PC_REC(x))
+#define PC_REC16(x) (*(u16*)PC_REC(x))
+#define PC_REC32(x) (*(u32*)PC_REC(x))
+
+#define OFFSET(X,Y) ((u32)(Y)-(u32)(X))
+
+#define RECMEM_SIZE		(12*1024*1024)
+
+static char *recMem;	/* the recompiled blocks will be here */
+static char *recRAM;	/* and the ptr to the blocks here */
+static char *recROM;	/* and here */
+
+static u32 pc;			/* recompiler pc */
+static u32 pcold;		/* recompiler oldpc */
+static int count;		/* recompiler intruction count */
+static int branch;		/* set for branch */
+static u32 target;		/* branch target */
+static u32 resp;
+
+u32 cop2readypc = 0;
+u32 idlecyclecount = 0;
+
+#define NUM_REGISTERS	34
+typedef struct {
+	int state;
+	u32 k;
+	int reg;
+} iRegisters;
+
+static iRegisters iRegs[34];
+
+#define ST_UNK      0x00
+#define ST_CONST    0x01
+#define ST_MAPPED   0x02
+
+#ifdef NO_CONSTANT
+#define IsConst(reg) 0
+#else
+#define IsConst(reg)  (iRegs[reg].state & ST_CONST)
+#endif
+#define IsMapped(reg) (iRegs[reg].state & ST_MAPPED)
+
+static void (*recBSC[64])();
+static void (*recSPC[64])();
+static void (*recREG[32])();
+static void (*recCP0[32])();
+static void (*recCP2[64])();
+static void (*recCP2BSC[32])();
+
+#define REG_LO			32
+#define REG_HI			33
+
+// Hardware register usage
+#define HWUSAGE_NONE     0x00
+
+#define HWUSAGE_READ     0x01
+#define HWUSAGE_WRITE    0x02
+#define HWUSAGE_CONST    0x04
+#define HWUSAGE_ARG      0x08	/* used as an argument for a function call */
+
+#define HWUSAGE_RESERVED 0x10	/* won't get flushed when flushing all regs */
+#define HWUSAGE_SPECIAL  0x20	/* special purpose register */
+#define HWUSAGE_HARDWIRED 0x40	/* specific hardware register mapping that is never disposed */
+#define HWUSAGE_INITED    0x80
+#define HWUSAGE_PSXREG    0x100
+
+// Remember to invalidate the special registers if they are modified by compiler
+enum {
+    ARG1 = 3,
+    ARG2 = 4,
+    ARG3 = 5,
+    PSXREGS,	// ptr
+	 PSXMEM,		// ptr
+    CYCLECOUNT,	// ptr
+    PSXPC,	// ptr
+    TARGETPTR,	// ptr
+    TARGET,	// ptr
+    RETVAL,
+    REG_RZERO,
+    REG_WZERO
+};
+
+typedef struct {
+    int code;
+    u32 k;
+    int usage;
+    int lastUsed;
+    
+    void (*flush)(int hwreg);
+    int private;
+} HWRegister;
+static HWRegister HWRegisters[NUM_HW_REGISTERS];
+static int HWRegUseCount;
+static int DstCPUReg;
+static int UniqueRegAlloc;
+
+static int GetFreeHWReg();
+static void InvalidateCPURegs();
+static void DisposeHWReg(int index);
+static void FlushHWReg(int index);
+static void FlushAllHWReg();
+static void MapPsxReg32(int reg);
+static void FlushPsxReg32(int hwreg);
+static int UpdateHWRegUsage(int hwreg, int usage);
+static int GetHWReg32(int reg);
+static int PutHWReg32(int reg);
+static int GetSpecialIndexFromHWRegs(int which);
+static int GetHWRegFromCPUReg(int cpureg);
+static int MapRegSpecial(int which);
+static void FlushRegSpecial(int hwreg);
+static int GetHWRegSpecial(int which);
+static int PutHWRegSpecial(int which);
+static void recRecompile();
+static void recError();
+
+#pragma mark --- Generic register mapping ---
+
+static int GetFreeHWReg()
+{
+	int i, least, index;
+	
+	if (DstCPUReg != -1) {
+		index = GetHWRegFromCPUReg(DstCPUReg);
+		DstCPUReg = -1;
+	} else {
+	    // LRU algorith with a twist ;)
+	    for (i=0; i<NUM_HW_REGISTERS; i++) {
+		    if (!(HWRegisters[i].usage & HWUSAGE_RESERVED)) {
+			    break;
+		    }
+	    }
+    
+	    least = HWRegisters[i].lastUsed; index = i;
+	    for (; i<NUM_HW_REGISTERS; i++) {
+		    if (!(HWRegisters[i].usage & HWUSAGE_RESERVED)) {
+			    if (HWRegisters[i].usage == HWUSAGE_NONE && HWRegisters[i].code >= 13) {
+				    index = i;
+				    break;
+			    }
+			    else if (HWRegisters[i].lastUsed < least) {
+				    least = HWRegisters[i].lastUsed;
+				    index = i;
+			    }
+		    }
+	    }
+		 
+		 // Cycle the registers
+		 if (HWRegisters[index].usage == HWUSAGE_NONE) {
+			for (; i<NUM_HW_REGISTERS; i++) {
+				if (!(HWRegisters[i].usage & HWUSAGE_RESERVED)) {
+					if (HWRegisters[i].usage == HWUSAGE_NONE && 
+						 HWRegisters[i].code >= 13 && 
+						 HWRegisters[i].lastUsed < least) {
+						least = HWRegisters[i].lastUsed;
+						index = i;
+						break;
+					}
+				}
+			}
+		 }
+	}
+	
+/*	if (HWRegisters[index].code < 13 && HWRegisters[index].code > 3) {
+		SysPrintf("Allocating volatile register %i\n", HWRegisters[index].code);
+	}
+	if (HWRegisters[index].usage != HWUSAGE_NONE) {
+		SysPrintf("RegUse too big. Flushing %i\n", HWRegisters[index].code);
+	}*/
+	if (HWRegisters[index].usage & (HWUSAGE_RESERVED | HWUSAGE_HARDWIRED)) {
+		if (HWRegisters[index].usage & HWUSAGE_RESERVED) {
+			SysPrintf("Error! Trying to map a new register to a reserved register (r%i)", 
+						HWRegisters[index].code);
+		}
+		if (HWRegisters[index].usage & HWUSAGE_HARDWIRED) {
+			SysPrintf("Error! Trying to map a new register to a hardwired register (r%i)", 
+						HWRegisters[index].code);
+		}
+	}
+	
+	if (HWRegisters[index].lastUsed != 0) {
+		UniqueRegAlloc = 0;
+	}
+	
+	// Make sure the register is really flushed!
+	FlushHWReg(index);
+	HWRegisters[index].usage = HWUSAGE_NONE;
+	HWRegisters[index].flush = NULL;
+	
+	return index;
+}
+
+static void FlushHWReg(int index)
+{
+	if (index < 0) return;
+	if (HWRegisters[index].usage == HWUSAGE_NONE) return;
+	
+	if (HWRegisters[index].flush) {
+		HWRegisters[index].usage |= HWUSAGE_RESERVED;
+		HWRegisters[index].flush(index);
+		HWRegisters[index].flush = NULL;
+	}
+	
+	if (HWRegisters[index].usage & HWUSAGE_HARDWIRED) {
+		HWRegisters[index].usage &= ~(HWUSAGE_READ | HWUSAGE_WRITE);
+	} else {
+		HWRegisters[index].usage = HWUSAGE_NONE;
+	}
+}
+
+// get rid of a mapped register without flushing the contents to the memory
+static void DisposeHWReg(int index)
+{
+	if (index < 0) return;
+	if (HWRegisters[index].usage == HWUSAGE_NONE) return;
+	
+	HWRegisters[index].usage &= ~(HWUSAGE_READ | HWUSAGE_WRITE);
+	if (HWRegisters[index].usage == HWUSAGE_NONE) {
+		SysPrintf("Error! not correctly disposing register (r%i)", HWRegisters[index].code);
+	}
+	
+	FlushHWReg(index);
+}
+
+// operated on cpu registers
+__inline static void FlushCPURegRange(int start, int end)
+{
+	int i;
+	
+	if (end <= 0) end = 31;
+	if (start <= 0) start = 0;
+	
+	for (i=0; i<NUM_HW_REGISTERS; i++) {
+		if (HWRegisters[i].code >= start && HWRegisters[i].code <= end)
+			if (HWRegisters[i].flush)
+				FlushHWReg(i);
+	}
+
+	for (i=0; i<NUM_HW_REGISTERS; i++) {
+		if (HWRegisters[i].code >= start && HWRegisters[i].code <= end)
+			FlushHWReg(i);
+	}
+}
+
+static void FlushAllHWReg()
+{
+	FlushCPURegRange(0,31);
+}
+
+static void InvalidateCPURegs()
+{
+	FlushCPURegRange(0,12);
+}
+
+#pragma mark --- Mapping utility functions ---
+
+static void MoveHWRegToCPUReg(int cpureg, int hwreg)
+{
+	int dstreg;
+	
+	if (HWRegisters[hwreg].code == cpureg)
+		return;
+	
+	dstreg = GetHWRegFromCPUReg(cpureg);
+	
+	HWRegisters[dstreg].usage &= ~(HWUSAGE_HARDWIRED | HWUSAGE_ARG);
+	if (HWRegisters[hwreg].usage & (HWUSAGE_READ | HWUSAGE_WRITE)) {
+		FlushHWReg(dstreg);
+		MR(HWRegisters[dstreg].code, HWRegisters[hwreg].code);
+	} else {
+		if (HWRegisters[dstreg].usage & (HWUSAGE_READ | HWUSAGE_WRITE)) {
+			MR(HWRegisters[hwreg].code, HWRegisters[dstreg].code);
+		}
+		else if (HWRegisters[dstreg].usage != HWUSAGE_NONE) {
+			FlushHWReg(dstreg);
+		}
+	}
+	
+	HWRegisters[dstreg].code = HWRegisters[hwreg].code;
+	HWRegisters[hwreg].code = cpureg;
+}
+
+static int UpdateHWRegUsage(int hwreg, int usage)
+{
+	HWRegisters[hwreg].lastUsed = ++HWRegUseCount;    
+	if (usage & HWUSAGE_WRITE) {
+		HWRegisters[hwreg].usage &= ~HWUSAGE_CONST;
+	}
+	if (!(usage & HWUSAGE_INITED)) {
+		HWRegisters[hwreg].usage &= ~HWUSAGE_INITED;
+	}
+	HWRegisters[hwreg].usage |= usage;
+	
+	return HWRegisters[hwreg].code;
+}
+
+static int GetHWRegFromCPUReg(int cpureg)
+{
+	int i;
+	for (i=0; i<NUM_HW_REGISTERS; i++) {
+		if (HWRegisters[i].code == cpureg) {
+			return i;
+		}
+	}
+	
+	SysPrintf("Error! Register location failure (r%i)", cpureg);
+	return 0;
+}
+
+// this function operates on cpu registers
+void SetDstCPUReg(int cpureg)
+{
+	DstCPUReg = cpureg;
+}
+
+static void ReserveArgs(int args)
+{
+	int index, i;
+	
+	for (i=0; i<args; i++) {
+		index = GetHWRegFromCPUReg(3+i);
+		HWRegisters[index].usage |= HWUSAGE_RESERVED | HWUSAGE_HARDWIRED | HWUSAGE_ARG;
+	}
+}
+
+static void ReleaseArgs()
+{
+	int i;
+	
+	for (i=0; i<NUM_HW_REGISTERS; i++) {
+		if (HWRegisters[i].usage & HWUSAGE_ARG) {
+			//HWRegisters[i].usage = HWUSAGE_NONE;
+			//HWRegisters[i].flush = NULL;
+			HWRegisters[i].usage &= ~(HWUSAGE_RESERVED | HWUSAGE_HARDWIRED | HWUSAGE_ARG);
+			FlushHWReg(i);
+		}
+	}
+}
+
+#pragma mark --- Psx register mapping ---
+
+static void MapPsxReg32(int reg)
+{
+    int hwreg = GetFreeHWReg();
+    HWRegisters[hwreg].flush = FlushPsxReg32;
+    HWRegisters[hwreg].private = reg;
+    
+    if (iRegs[reg].reg != -1) {
+        SysPrintf("error: double mapped psx register");
+    }
+    
+    iRegs[reg].reg = hwreg;
+    iRegs[reg].state |= ST_MAPPED;
+}
+
+static void FlushPsxReg32(int hwreg)
+{
+	int reg = HWRegisters[hwreg].private;
+	
+	if (iRegs[reg].reg == -1) {
+		SysPrintf("error: flushing unmapped psx register");
+	}
+	
+	if (HWRegisters[hwreg].usage & HWUSAGE_WRITE) {
+		if (branch) {
+			/*int reguse = nextPsxRegUse(pc-8, reg);
+			if (reguse == REGUSE_NONE || (reguse & REGUSE_READ))*/ {
+				STW(HWRegisters[hwreg].code, OFFSET(&psxRegs, &psxRegs.GPR.r[reg]), GetHWRegSpecial(PSXREGS));
+			}
+		} else {
+			int reguse = nextPsxRegUse(pc-4, reg);
+			if (reguse == REGUSE_NONE || (reguse & REGUSE_READ)) {
+				STW(HWRegisters[hwreg].code, OFFSET(&psxRegs, &psxRegs.GPR.r[reg]), GetHWRegSpecial(PSXREGS));
+			}
+		}
+	}
+	
+	iRegs[reg].reg = -1;
+	iRegs[reg].state = ST_UNK;
+}
+
+static int GetHWReg32(int reg)
+{
+	int usage = HWUSAGE_PSXREG | HWUSAGE_READ;
+	
+	if (reg == 0) {
+		return GetHWRegSpecial(REG_RZERO);
+	}
+	if (!IsMapped(reg)) {
+		usage |= HWUSAGE_INITED;
+		MapPsxReg32(reg);
+		
+		HWRegisters[iRegs[reg].reg].usage |= HWUSAGE_RESERVED;
+		if (IsConst(reg)) {
+			LIW(HWRegisters[iRegs[reg].reg].code, iRegs[reg].k);
+			usage |= HWUSAGE_WRITE | HWUSAGE_CONST;
+			//iRegs[reg].state &= ~ST_CONST;
+		}
+		else {
+			LWZ(HWRegisters[iRegs[reg].reg].code, OFFSET(&psxRegs, &psxRegs.GPR.r[reg]), GetHWRegSpecial(PSXREGS));
+		}
+		HWRegisters[iRegs[reg].reg].usage &= ~HWUSAGE_RESERVED;
+	}
+	else if (DstCPUReg != -1) {
+		int dst = DstCPUReg;
+		DstCPUReg = -1;
+		
+		if (HWRegisters[iRegs[reg].reg].code < 13) {
+			MoveHWRegToCPUReg(dst, iRegs[reg].reg);
+		} else {
+			MR(DstCPUReg, HWRegisters[iRegs[reg].reg].code);
+		}
+	}
+	
+	DstCPUReg = -1;
+	
+	return UpdateHWRegUsage(iRegs[reg].reg, usage);
+}
+
+static int PutHWReg32(int reg)
+{
+	int usage = HWUSAGE_PSXREG | HWUSAGE_WRITE;
+	if (reg == 0) {
+		return PutHWRegSpecial(REG_WZERO);
+	}
+	
+	if (DstCPUReg != -1 && IsMapped(reg)) {
+		if (HWRegisters[iRegs[reg].reg].code != DstCPUReg) {
+			int tmp = DstCPUReg;
+			DstCPUReg = -1;
+			DisposeHWReg(iRegs[reg].reg);
+			DstCPUReg = tmp;
+		}
+	}
+	if (!IsMapped(reg)) {
+		usage |= HWUSAGE_INITED;
+		MapPsxReg32(reg);
+	}
+	
+	DstCPUReg = -1;
+	iRegs[reg].state &= ~ST_CONST;
+
+	return UpdateHWRegUsage(iRegs[reg].reg, usage);
+}
+
+#pragma mark --- Special register mapping ---
+
+static int GetSpecialIndexFromHWRegs(int which)
+{
+	int i;
+	for (i=0; i<NUM_HW_REGISTERS; i++) {
+		if (HWRegisters[i].usage & HWUSAGE_SPECIAL) {
+			if (HWRegisters[i].private == which) {
+				return i;
+			}
+		}
+	}
+	return -1;
+}
+
+static int MapRegSpecial(int which)
+{
+	int hwreg = GetFreeHWReg();
+	HWRegisters[hwreg].flush = FlushRegSpecial;
+	HWRegisters[hwreg].private = which;
+	
+	return hwreg;
+}
+
+static void FlushRegSpecial(int hwreg)
+{
+	int which = HWRegisters[hwreg].private;
+	
+	if (!(HWRegisters[hwreg].usage & HWUSAGE_WRITE))
+		return;
+	
+	switch (which) {
+		case CYCLECOUNT:
+			STW(HWRegisters[hwreg].code, OFFSET(&psxRegs, &psxRegs.cycle), GetHWRegSpecial(PSXREGS));
+			break;
+		case PSXPC:
+			STW(HWRegisters[hwreg].code, OFFSET(&psxRegs, &psxRegs.pc), GetHWRegSpecial(PSXREGS));
+			break;
+		case TARGET:
+			STW(HWRegisters[hwreg].code, 0, GetHWRegSpecial(TARGETPTR));
+			break;
+	}
+}
+
+static int GetHWRegSpecial(int which)
+{
+	int index = GetSpecialIndexFromHWRegs(which);
+	int usage = HWUSAGE_READ | HWUSAGE_SPECIAL;
+	
+	if (index == -1) {
+		usage |= HWUSAGE_INITED;
+		index = MapRegSpecial(which);
+		
+		HWRegisters[index].usage |= HWUSAGE_RESERVED;
+		switch (which) {
+			case PSXREGS:
+			case PSXMEM:
+				SysPrintf("error! shouldn't be here!\n");
+				//HWRegisters[index].flush = NULL;
+				//LIW(HWRegisters[index].code, (u32)&psxRegs);
+				break;
+			case TARGETPTR:
+				HWRegisters[index].flush = NULL;
+				LIW(HWRegisters[index].code, (u32)&target);
+				break;
+			case REG_RZERO:
+				HWRegisters[index].flush = NULL;
+				LIW(HWRegisters[index].code, 0);
+				break;
+			case RETVAL:
+				MoveHWRegToCPUReg(3, index);
+				/*reg = GetHWRegFromCPUReg(3);
+				HWRegisters[reg].code = HWRegisters[index].code;
+				HWRegisters[index].code = 3;*/
+				HWRegisters[index].flush = NULL;
+				
+				usage |= HWUSAGE_RESERVED;
+				break;
+
+			case CYCLECOUNT:
+				LWZ(HWRegisters[index].code, OFFSET(&psxRegs, &psxRegs.cycle), GetHWRegSpecial(PSXREGS));
+				break;
+			case PSXPC:
+				LWZ(HWRegisters[index].code, OFFSET(&psxRegs, &psxRegs.pc), GetHWRegSpecial(PSXREGS));
+				break;
+			case TARGET:
+				LWZ(HWRegisters[index].code, 0, GetHWRegSpecial(TARGETPTR));
+				break;
+			default:
+				SysPrintf("Error: Unknown special register in GetHWRegSpecial()\n");
+				break;
+		}
+		HWRegisters[index].usage &= ~HWUSAGE_RESERVED;
+	}
+	else if (DstCPUReg != -1) {
+		int dst = DstCPUReg;
+		DstCPUReg = -1;
+		
+		MoveHWRegToCPUReg(dst, index);
+	}
+
+	return UpdateHWRegUsage(index, usage);
+}
+
+static int PutHWRegSpecial(int which)
+{
+	int index = GetSpecialIndexFromHWRegs(which);
+	int usage = HWUSAGE_WRITE | HWUSAGE_SPECIAL;
+	
+	if (DstCPUReg != -1 && index != -1) {
+		if (HWRegisters[index].code != DstCPUReg) {
+			int tmp = DstCPUReg;
+			DstCPUReg = -1;
+			DisposeHWReg(index);
+			DstCPUReg = tmp;
+		}
+	}
+	switch (which) {
+		case PSXREGS:
+		case TARGETPTR:
+			SysPrintf("Error: Read-only special register in PutHWRegSpecial()\n");
+		case REG_WZERO:
+			if (index >= 0) {
+					if (HWRegisters[index].usage & HWUSAGE_WRITE)
+						break;
+			}
+			index = MapRegSpecial(which);
+			HWRegisters[index].flush = NULL;
+			break;
+		default:
+			if (index == -1) {
+				usage |= HWUSAGE_INITED;
+				index = MapRegSpecial(which);
+				
+				HWRegisters[index].usage |= HWUSAGE_RESERVED;
+				switch (which) {
+					case ARG1:
+					case ARG2:
+					case ARG3:
+						MoveHWRegToCPUReg(3+(which-ARG1), index);
+						/*reg = GetHWRegFromCPUReg(3+(which-ARG1));
+						
+						if (HWRegisters[reg].usage != HWUSAGE_NONE) {
+							HWRegisters[reg].usage &= ~(HWUSAGE_HARDWIRED | HWUSAGE_ARG);
+							if (HWRegisters[reg].flush != NULL && HWRegisters[reg].usage & (HWUSAGE_WRITE | HWUSAGE_READ)) {
+								MR(HWRegisters[index].code, HWRegisters[reg].code);
+							} else {
+								FlushHWReg(reg);
+							}
+						}
+						HWRegisters[reg].code = HWRegisters[index].code;
+						if (!(HWRegisters[index].code >= 3 && HWRegisters[index].code <=31))
+							SysPrintf("Error! Register allocation");
+						HWRegisters[index].code = 3+(which-ARG1);*/
+						HWRegisters[index].flush = NULL;
+						
+						usage |= HWUSAGE_RESERVED | HWUSAGE_HARDWIRED | HWUSAGE_ARG;
+						break;
+				}
+			}
+			HWRegisters[index].usage &= ~HWUSAGE_RESERVED;
+			break;
+	}
+	
+	DstCPUReg = -1;
+
+	return UpdateHWRegUsage(index, usage);
+}
+
+#pragma mark --- ---
+
+static void MapConst(int reg, u32 _const) {
+	if (reg == 0)
+		return;
+	if (IsConst(reg) && iRegs[reg].k == _const)
+		return;
+	
+	DisposeHWReg(iRegs[reg].reg);
+	iRegs[reg].k = _const;
+	iRegs[reg].state = ST_CONST;
+}
+
+static void MapCopy(int dst, int src)
+{
+    // do it the lazy way for now
+    MR(PutHWReg32(dst), GetHWReg32(src));
+}
+
+static void iFlushReg(u32 nextpc, int reg) {
+	if (!IsMapped(reg) && IsConst(reg)) {
+		GetHWReg32(reg);
+	}
+	if (IsMapped(reg)) {
+		if (nextpc) {
+			int use = nextPsxRegUse(nextpc, reg);
+			if ((use & REGUSE_RW) == REGUSE_WRITE) {
+				DisposeHWReg(iRegs[reg].reg);
+			} else {
+				FlushHWReg(iRegs[reg].reg);
+			}
+		} else {
+			FlushHWReg(iRegs[reg].reg);
+		}
+	}
+}
+
+static void iFlushRegs(u32 nextpc) {
+	int i;
+
+	for (i=1; i<NUM_REGISTERS; i++) {
+		iFlushReg(nextpc, i);
+	}
+}
+
+static void Return()
+{
+	iFlushRegs(0);
+	FlushAllHWReg();
+	if (((u32)returnPC & 0x1fffffc) == (u32)returnPC) {
+		BA((u32)returnPC);
+	}
+	else {
+		LIW(0, (u32)returnPC);
+		MTLR(0);
+		BLR();
+	}
+}
+
+static void iRet() {
+    /* store cycle */
+    count = (idlecyclecount + (pc - pcold) / 4) * BIAS;
+    ADDI(PutHWRegSpecial(CYCLECOUNT), GetHWRegSpecial(CYCLECOUNT), count);
+    Return();
+}
+
+static int iLoadTest() {
+	u32 tmp;
+
+	// check for load delay
+	tmp = psxRegs.code >> 26;
+	switch (tmp) {
+		case 0x10: // COP0
+			switch (_Rs_) {
+				case 0x00: // MFC0
+				case 0x02: // CFC0
+					return 1;
+			}
+			break;
+		case 0x12: // COP2
+			switch (_Funct_) {
+				case 0x00:
+					switch (_Rs_) {
+						case 0x00: // MFC2
+						case 0x02: // CFC2
+							return 1;
+					}
+					break;
+			}
+			break;
+		case 0x32: // LWC2
+			return 1;
+		default:
+			if (tmp >= 0x20 && tmp <= 0x26) { // LB/LH/LWL/LW/LBU/LHU/LWR
+				return 1;
+			}
+			break;
+	}
+	return 0;
+}
+
+/* set a pending branch */
+static void SetBranch() {
+	int treg;
+	branch = 1;
+	psxRegs.code = PSXMu32(pc);
+	pc+=4;
+
+	if (iLoadTest() == 1) {
+		iFlushRegs(0);
+		LIW(0, psxRegs.code);
+		STW(0, OFFSET(&psxRegs, &psxRegs.code), GetHWRegSpecial(PSXREGS));
+		/* store cycle */
+		count = (idlecyclecount + (pc - pcold) / 4) * BIAS;
+		ADDI(PutHWRegSpecial(CYCLECOUNT), GetHWRegSpecial(CYCLECOUNT), count);
+		
+		treg = GetHWRegSpecial(TARGET);
+		MR(PutHWRegSpecial(ARG2), treg);
+		DisposeHWReg(GetHWRegFromCPUReg(treg));
+		LIW(PutHWRegSpecial(ARG1), _Rt_);
+                LIW(GetHWRegSpecial(PSXPC), pc);
+		FlushAllHWReg();
+		CALLFunc((u32)psxDelayTest);
+
+		Return();
+		return;
+	}
+
+	recBSC[psxRegs.code>>26]();
+
+	iFlushRegs(0);
+	treg = GetHWRegSpecial(TARGET);
+	MR(PutHWRegSpecial(PSXPC), GetHWRegSpecial(TARGET)); // FIXME: this line should not be needed
+	DisposeHWReg(GetHWRegFromCPUReg(treg));
+	FlushAllHWReg();
+
+	count = (idlecyclecount + (pc - pcold) / 4) * BIAS;
+        ADDI(PutHWRegSpecial(CYCLECOUNT), GetHWRegSpecial(CYCLECOUNT), count);
+	FlushAllHWReg();
+	CALLFunc((u32)psxBranchTest);
+	
+	// TODO: don't return if target is compiled
+	Return();
+}
+
+static void iJump(u32 branchPC) {
+	u32 *b1, *b2;
+	branch = 1;
+	psxRegs.code = PSXMu32(pc);
+	pc+=4;
+
+	if (iLoadTest() == 1) {
+		iFlushRegs(0);
+		LIW(0, psxRegs.code);
+		STW(0, OFFSET(&psxRegs, &psxRegs.code), GetHWRegSpecial(PSXREGS));
+		/* store cycle */
+		count = (idlecyclecount + (pc - pcold) / 4) * BIAS;
+		ADDI(PutHWRegSpecial(CYCLECOUNT), GetHWRegSpecial(CYCLECOUNT), count);
+
+		LIW(PutHWRegSpecial(ARG2), branchPC);
+		LIW(PutHWRegSpecial(ARG1), _Rt_);
+		LIW(GetHWRegSpecial(PSXPC), pc);
+		FlushAllHWReg();
+		CALLFunc((u32)psxDelayTest);
+                
+		Return();
+		return;
+	}
+
+	recBSC[psxRegs.code>>26]();
+
+	iFlushRegs(branchPC);
+	LIW(PutHWRegSpecial(PSXPC), branchPC);
+	FlushAllHWReg();
+
+	count = (idlecyclecount + (pc - pcold) / 4) * BIAS;
+        //if (/*psxRegs.code == 0 &&*/ count == 2 && branchPC == pcold) {
+        //    LIW(PutHWRegSpecial(CYCLECOUNT), 0);
+        //} else {
+            ADDI(PutHWRegSpecial(CYCLECOUNT), GetHWRegSpecial(CYCLECOUNT), count);
+        //}
+	FlushAllHWReg();
+	CALLFunc((u32)psxBranchTest);
+
+	if (!Config.HLE && Config.PsxOut &&
+	    ((branchPC & 0x1fffff) == 0xa0 ||
+	     (branchPC & 0x1fffff) == 0xb0 ||
+	     (branchPC & 0x1fffff) == 0xc0))
+	  CALLFunc((u32)psxJumpTest);
+
+	// always return for now...
+	//Return();
+		
+	// maybe just happened an interruption, check so
+	LIW(0, branchPC);
+	CMPLW(GetHWRegSpecial(PSXPC), 0);
+	BNE_L(b1);
+	
+	LIW(3, PC_REC(branchPC));
+	LWZ(3, 0, 3);
+	CMPLWI(3, 0);
+	BNE_L(b2);
+	
+	B_DST(b1);
+	Return();
+	
+	// next bit is already compiled - jump right to it
+	B_DST(b2);
+	MTCTR(3);
+	BCTR();
+}
+
+static void iBranch(u32 branchPC, int savectx) {
+	HWRegister HWRegistersS[NUM_HW_REGISTERS];
+	iRegisters iRegsS[NUM_REGISTERS];
+	int HWRegUseCountS = 0;
+	u32 respold=0;
+	u32 *b1, *b2;
+
+	if (savectx) {
+		respold = resp;
+		memcpy(iRegsS, iRegs, sizeof(iRegs));
+		memcpy(HWRegistersS, HWRegisters, sizeof(HWRegisters));
+		HWRegUseCountS = HWRegUseCount;
+	}
+	
+	branch = 1;
+	psxRegs.code = PSXMu32(pc);
+
+	// the delay test is only made when the branch is taken
+	// savectx == 0 will mean that :)
+	if (savectx == 0 && iLoadTest() == 1) {
+		iFlushRegs(0);
+		LIW(0, psxRegs.code);
+		STW(0, OFFSET(&psxRegs, &psxRegs.code), GetHWRegSpecial(PSXREGS));
+		/* store cycle */
+		count = (idlecyclecount + ((pc+4) - pcold) / 4) * BIAS;
+		ADDI(PutHWRegSpecial(CYCLECOUNT), GetHWRegSpecial(CYCLECOUNT), count);
+
+		LIW(PutHWRegSpecial(ARG2), branchPC);
+		LIW(PutHWRegSpecial(ARG1), _Rt_);
+                LIW(GetHWRegSpecial(PSXPC), pc);
+		FlushAllHWReg();
+		CALLFunc((u32)psxDelayTest);
+
+		Return();
+		return;
+	}
+
+	pc+= 4;
+	recBSC[psxRegs.code>>26]();
+	
+	iFlushRegs(branchPC);
+	LIW(PutHWRegSpecial(PSXPC), branchPC);
+	FlushAllHWReg();
+
+	/* store cycle */
+	count = (idlecyclecount + (pc - pcold) / 4) * BIAS;
+        //if (/*psxRegs.code == 0 &&*/ count == 2 && branchPC == pcold) {
+        //    LIW(PutHWRegSpecial(CYCLECOUNT), 0);
+        //} else {
+            ADDI(PutHWRegSpecial(CYCLECOUNT), GetHWRegSpecial(CYCLECOUNT), count);
+        //}
+	FlushAllHWReg();
+	CALLFunc((u32)psxBranchTest);
+	
+	// always return for now...
+	//Return();
+
+	LIW(0, branchPC);
+	CMPLW(GetHWRegSpecial(PSXPC), 0);
+	BNE_L(b1);
+	
+	LIW(3, PC_REC(branchPC));
+	LWZ(3, 0, 3);
+	CMPLWI(3, 0);
+	BNE_L(b2);
+	
+	B_DST(b1);
+	Return();
+	
+	B_DST(b2);
+	MTCTR(3);
+	BCTR();
+
+	// maybe just happened an interruption, check so
+/*	CMP32ItoM((u32)&psxRegs.pc, branchPC);
+	j8Ptr[1] = JE8(0);
+	RET();
+
+	x86SetJ8(j8Ptr[1]);
+	MOV32MtoR(EAX, PC_REC(branchPC));
+	TEST32RtoR(EAX, EAX);
+	j8Ptr[2] = JNE8(0);
+	RET();
+
+	x86SetJ8(j8Ptr[2]);
+	JMP32R(EAX);*/
+
+	pc-= 4;
+	if (savectx) {
+		resp = respold;
+		memcpy(iRegs, iRegsS, sizeof(iRegs));
+		memcpy(HWRegisters, HWRegistersS, sizeof(HWRegisters));
+		HWRegUseCount = HWRegUseCountS;
+	}
+}
+
+
+static void iDumpRegs() {
+	int i, j;
+
+	printf("%lx %lx\n", psxRegs.pc, psxRegs.cycle);
+	for (i=0; i<4; i++) {
+		for (j=0; j<8; j++)
+			printf("%lx ", psxRegs.GPR.r[j*i]);
+		printf("\n");
+	}
+}
+
+void iDumpBlock(char *ptr) {
+/*	FILE *f;
+	u32 i;
+
+	SysPrintf("dump1 %x:%x, %x\n", psxRegs.pc, pc, psxCurrentCycle);
+
+	for (i = psxRegs.pc; i < pc; i+=4)
+		SysPrintf("%s\n", disR3000AF(PSXMu32(i), i));
+
+	fflush(stdout);
+	f = fopen("dump1", "w");
+	fwrite(ptr, 1, (u32)x86Ptr - (u32)ptr, f);
+	fclose(f);
+	system("ndisasmw -u dump1");
+	fflush(stdout);*/
+}
+
+#define REC_FUNC(f) \
+void psx##f(); \
+static void rec##f() { \
+	iFlushRegs(0); \
+	LIW(PutHWRegSpecial(ARG1), (u32)psxRegs.code); \
+	STW(GetHWRegSpecial(ARG1), OFFSET(&psxRegs, &psxRegs.code), GetHWRegSpecial(PSXREGS)); \
+	LIW(PutHWRegSpecial(PSXPC), (u32)pc); \
+	FlushAllHWReg(); \
+	CALLFunc((u32)psx##f); \
+/*	branch = 2; */\
+}
+
+#define REC_SYS(f) \
+void psx##f(); \
+static void rec##f() { \
+	iFlushRegs(0); \
+        LIW(PutHWRegSpecial(ARG1), (u32)psxRegs.code); \
+        STW(GetHWRegSpecial(ARG1), OFFSET(&psxRegs, &psxRegs.code), GetHWRegSpecial(PSXREGS)); \
+        LIW(PutHWRegSpecial(PSXPC), (u32)pc); \
+        FlushAllHWReg(); \
+	CALLFunc((u32)psx##f); \
+	branch = 2; \
+	iRet(); \
+}
+
+#define REC_BRANCH(f) \
+void psx##f(); \
+static void rec##f() { \
+	iFlushRegs(0); \
+        LIW(PutHWRegSpecial(ARG1), (u32)psxRegs.code); \
+        STW(GetHWRegSpecial(ARG1), OFFSET(&psxRegs, &psxRegs.code), GetHWRegSpecial(PSXREGS)); \
+        LIW(PutHWRegSpecial(PSXPC), (u32)pc); \
+        FlushAllHWReg(); \
+	CALLFunc((u32)psx##f); \
+	branch = 2; \
+	iRet(); \
+}
+
+static void freeMem(int all)
+{
+    if (recMem) free(recMem);
+    if (recRAM) free(recRAM);
+    if (recROM) free(recROM);
+    recMem = recRAM = recROM = 0;
+    
+    if (all && psxRecLUT) {
+        free(psxRecLUT); psxRecLUT = NULL;
+    }
+}
+
+static int allocMem() {
+	int i;
+
+	freeMem(0);
+        
+	if (psxRecLUT==NULL)
+		psxRecLUT = (u32*) malloc(0x010000 * 4);
+
+	recMem = (char*) malloc(RECMEM_SIZE);
+        //recMem = mmap(NULL, RECMEM_SIZE, PROT_EXEC|PROT_READ|PROT_WRITE, MAP_ANON|MAP_PRIVATE, -1,  0);
+	recRAM = (char*) malloc(0x200000);
+	recROM = (char*) malloc(0x080000);
+	if (recRAM == NULL || recROM == NULL || recMem == NULL/*(void *)-1*/ || psxRecLUT == NULL) {
+                freeMem(1);
+		SysMessage("Error allocating memory"); return -1;
+	}
+
+	for (i=0; i<0x80; i++) psxRecLUT[i + 0x0000] = (u32)&recRAM[(i & 0x1f) << 16];
+	memcpy(psxRecLUT + 0x8000, psxRecLUT, 0x80 * 4);
+	memcpy(psxRecLUT + 0xa000, psxRecLUT, 0x80 * 4);
+
+	for (i=0; i<0x08; i++) psxRecLUT[i + 0xbfc0] = (u32)&recROM[i << 16];
+	
+	return 0;
+}
+
+static int recInit() {
+	return allocMem();
+}
+
+static void recReset() {
+	memset(recRAM, 0, 0x200000);
+	memset(recROM, 0, 0x080000);
+
+	ppcInit();
+	ppcSetPtr((u32 *)recMem);
+
+	branch = 0;
+	memset(iRegs, 0, sizeof(iRegs));
+	iRegs[0].state = ST_CONST;
+	iRegs[0].k     = 0;
+}
+
+static void recShutdown() {
+        freeMem(1);
+	ppcShutdown();
+}
+
+static void recError() {
+	SysReset();
+	ClosePlugins();
+	SysMessage("Unrecoverable error while running recompiler\n");
+	SysRunGui();
+}
+
+__inline static void execute() {
+	void (**recFunc)();
+	char *p;
+
+	p =	(char*)PC_REC(psxRegs.pc);
+	/*if (p != NULL)*/ recFunc = (void (**)()) (u32)p;
+	/*else { recError(); return; }*/
+
+	if (*recFunc == 0) {
+		recRecompile();
+	}
+	recRun(*recFunc, (u32)&psxRegs, (u32)&psxM);
+}
+
+static void recExecute() {
+	for (;;) execute();
+}
+
+static void recExecuteBlock() {
+	execute();
+}
+
+static void recClear(u32 Addr, u32 Size) {
+	memset((void*)PC_REC(Addr), 0, Size * 4);
+}
+
+static void recNULL() {
+//	SysMessage("recUNK: %8.8x\n", psxRegs.code);
+}
+
+/*********************************************************
+* goes to opcodes tables...                              *
+* Format:  table[something....]                          *
+*********************************************************/
+
+//REC_SYS(SPECIAL);
+static void recSPECIAL() {
+	recSPC[_Funct_]();
+}
+
+static void recREGIMM() {
+	recREG[_Rt_]();
+}
+
+static void recCOP0() {
+	recCP0[_Rs_]();
+}
+
+//REC_SYS(COP2);
+static void recCOP2() {
+	recCP2[_Funct_]();
+}
+
+static void recBASIC() {
+	recCP2BSC[_Rs_]();
+}
+
+//end of Tables opcodes...
+
+#pragma mark - Arithmetic with immediate operand -
+/*********************************************************
+* Arithmetic with immediate operand                      *
+* Format:  OP rt, rs, immediate                          *
+*********************************************************/
+
+#if 0
+/*REC_FUNC(ADDI);
+REC_FUNC(ADDIU);
+REC_FUNC(ANDI);
+REC_FUNC(ORI);
+REC_FUNC(XORI);
+REC_FUNC(SLTI);
+REC_FUNC(SLTIU);*/
+#else
+static void recADDIU()  {
+// Rt = Rs + Im
+	if (!_Rt_) return;
+
+	if (IsConst(_Rs_)) {
+		MapConst(_Rt_, iRegs[_Rs_].k + _Imm_);
+	} else {
+		if (_Imm_ == 0) {
+			MapCopy(_Rt_, _Rs_);
+		} else {
+			ADDI(PutHWReg32(_Rt_), GetHWReg32(_Rs_), _Imm_);
+		}
+	}
+}
+
+static void recADDI()  {
+// Rt = Rs + Im
+	recADDIU();
+}
+
+//REC_FUNC(SLTI);
+//REC_FUNC(SLTIU);
+//CR0:	SIGN      | POSITIVE | ZERO  | SOVERFLOW | SOVERFLOW | OVERFLOW | CARRY
+static void recSLTI() {
+// Rt = Rs < Im (signed)
+	if (!_Rt_) return;
+
+	if (IsConst(_Rs_)) {
+		MapConst(_Rt_, (s32)iRegs[_Rs_].k < _Imm_);
+	} else {
+		if (_Imm_ == 0) {
+			SRWI(PutHWReg32(_Rt_), GetHWReg32(_Rs_), 31);
+		} else {
+			int reg;
+			CMPWI(GetHWReg32(_Rs_), _Imm_);
+			reg = PutHWReg32(_Rt_);
+			LI(reg, 1);
+			BLT(1);
+			LI(reg, 0);
+		}
+	}
+}
+
+static void recSLTIU() {
+// Rt = Rs < Im (unsigned)
+	if (!_Rt_) return;
+
+	if (IsConst(_Rs_)) {
+		MapConst(_Rt_, iRegs[_Rs_].k < _ImmU_);
+	} else {
+		int reg;
+		CMPLWI(GetHWReg32(_Rs_), _Imm_);
+		reg = PutHWReg32(_Rt_);
+		LI(reg, 1);
+		BLT(1);
+		LI(reg, 0);
+	}
+}
+
+static void recANDI() {
+// Rt = Rs And Im
+    if (!_Rt_) return;
+
+    if (IsConst(_Rs_)) {
+        MapConst(_Rt_, iRegs[_Rs_].k & _ImmU_);
+    } else {
+        ANDI_(PutHWReg32(_Rt_), GetHWReg32(_Rs_), _ImmU_);
+    }
+}
+
+static void recORI() {
+// Rt = Rs Or Im
+	if (!_Rt_) return;
+
+	if (IsConst(_Rs_)) {
+		MapConst(_Rt_, iRegs[_Rs_].k | _ImmU_);
+	} else {
+		if (_Imm_ == 0) {
+			MapCopy(_Rt_, _Rs_);
+		} else {
+			ORI(PutHWReg32(_Rt_), GetHWReg32(_Rs_), _ImmU_);
+		}
+	}
+}
+
+static void recXORI() {
+// Rt = Rs Xor Im
+    if (!_Rt_) return;
+
+    if (IsConst(_Rs_)) {
+        MapConst(_Rt_, iRegs[_Rs_].k ^ _ImmU_);
+    } else {
+        XORI(PutHWReg32(_Rt_), GetHWReg32(_Rs_), _ImmU_);
+    }
+}
+#endif
+//end of * Arithmetic with immediate operand  
+
+/*********************************************************
+* Load higher 16 bits of the first word in GPR with imm  *
+* Format:  OP rt, immediate                              *
+*********************************************************/
+//REC_FUNC(LUI);
+//#if 0*/
+static void recLUI()  {
+// Rt = Imm << 16
+	if (!_Rt_) return;
+
+	MapConst(_Rt_, psxRegs.code << 16);
+}
+//#endif
+//End of Load Higher .....
+
+#pragma mark - Register arithmetic -
+/*********************************************************
+* Register arithmetic                                    *
+* Format:  OP rd, rs, rt                                 *
+*********************************************************/
+
+#if 0
+/*REC_FUNC(ADD);
+REC_FUNC(ADDU);
+REC_FUNC(SUB);
+REC_FUNC(SUBU);
+REC_FUNC(AND);
+REC_FUNC(OR);
+REC_FUNC(XOR);
+REC_FUNC(NOR);
+REC_FUNC(SLT);
+REC_FUNC(SLTU);*/
+#else
+static void recADDU() {
+// Rd = Rs + Rt 
+	if (!_Rd_) return;
+
+	if (IsConst(_Rs_) && IsConst(_Rt_)) {
+		MapConst(_Rd_, iRegs[_Rs_].k + iRegs[_Rt_].k);
+	} else if (IsConst(_Rs_) && !IsMapped(_Rs_)) {
+		if ((s32)(s16)iRegs[_Rs_].k == (s32)iRegs[_Rs_].k) {
+			ADDI(PutHWReg32(_Rd_), GetHWReg32(_Rt_), (s16)iRegs[_Rs_].k);
+		} else if ((iRegs[_Rs_].k & 0xffff) == 0) {
+			ADDIS(PutHWReg32(_Rd_), GetHWReg32(_Rt_), iRegs[_Rs_].k>>16);
+		} else {
+			ADD(PutHWReg32(_Rd_), GetHWReg32(_Rs_), GetHWReg32(_Rt_));
+		}
+	} else if (IsConst(_Rt_) && !IsMapped(_Rt_)) {
+		if ((s32)(s16)iRegs[_Rt_].k == (s32)iRegs[_Rt_].k) {
+			ADDI(PutHWReg32(_Rd_), GetHWReg32(_Rs_), (s16)iRegs[_Rt_].k);
+		} else if ((iRegs[_Rt_].k & 0xffff) == 0) {
+			ADDIS(PutHWReg32(_Rd_), GetHWReg32(_Rs_), iRegs[_Rt_].k>>16);
+		} else {
+			ADD(PutHWReg32(_Rd_), GetHWReg32(_Rs_), GetHWReg32(_Rt_));
+		}
+	} else {
+		ADD(PutHWReg32(_Rd_), GetHWReg32(_Rs_), GetHWReg32(_Rt_));
+	}
+}
+
+static void recADD() {
+// Rd = Rs + Rt
+	recADDU();
+}
+
+static void recSUBU() {
+// Rd = Rs - Rt
+    if (!_Rd_) return;
+
+    if (IsConst(_Rs_) && IsConst(_Rt_)) {
+        MapConst(_Rd_, iRegs[_Rs_].k - iRegs[_Rt_].k);
+    } else if (IsConst(_Rt_) && !IsMapped(_Rt_)) {
+        if ((s32)(s16)(-iRegs[_Rt_].k) == (s32)(-iRegs[_Rt_].k)) {
+            ADDI(PutHWReg32(_Rd_), GetHWReg32(_Rs_), -iRegs[_Rt_].k);
+        } else if (((-iRegs[_Rt_].k) & 0xffff) == 0) {
+            ADDIS(PutHWReg32(_Rd_), GetHWReg32(_Rs_), (-iRegs[_Rt_].k)>>16);
+        } else {
+            SUB(PutHWReg32(_Rd_), GetHWReg32(_Rs_), GetHWReg32(_Rt_));
+        }
+    } else {
+        SUB(PutHWReg32(_Rd_), GetHWReg32(_Rs_), GetHWReg32(_Rt_));
+    }
+}   
+
+static void recSUB() {
+// Rd = Rs - Rt
+	recSUBU();
+}
+
+static void recAND() {
+// Rd = Rs And Rt
+    if (!_Rd_) return;
+    
+    if (IsConst(_Rs_) && IsConst(_Rt_)) {
+        MapConst(_Rd_, iRegs[_Rs_].k & iRegs[_Rt_].k);
+    } else if (IsConst(_Rs_) && !IsMapped(_Rs_)) {
+        // TODO: implement shifted (ANDIS) versions of these
+        if ((iRegs[_Rs_].k & 0xffff) == iRegs[_Rs_].k) {
+            ANDI_(PutHWReg32(_Rd_), GetHWReg32(_Rt_), iRegs[_Rs_].k);
+        } else {
+            AND(PutHWReg32(_Rd_), GetHWReg32(_Rs_), GetHWReg32(_Rt_));
+        }
+    } else if (IsConst(_Rt_) && !IsMapped(_Rt_)) {
+        if ((iRegs[_Rt_].k & 0xffff) == iRegs[_Rt_].k) {
+            ANDI_(PutHWReg32(_Rd_), GetHWReg32(_Rs_), iRegs[_Rt_].k);
+        } else {
+            AND(PutHWReg32(_Rd_), GetHWReg32(_Rs_), GetHWReg32(_Rt_));
+        }
+    } else {
+        AND(PutHWReg32(_Rd_), GetHWReg32(_Rs_), GetHWReg32(_Rt_));
+    }
+}   
+
+static void recOR() {
+// Rd = Rs Or Rt
+    if (!_Rd_) return;
+    
+    if (IsConst(_Rs_) && IsConst(_Rt_)) {
+        MapConst(_Rd_, iRegs[_Rs_].k | iRegs[_Rt_].k);
+    }
+    else {
+        if (_Rs_ == _Rt_) {
+            MapCopy(_Rd_, _Rs_);
+        }
+        else if (IsConst(_Rs_) && !IsMapped(_Rs_)) {
+            if ((iRegs[_Rs_].k & 0xffff) == iRegs[_Rs_].k) {
+                ORI(PutHWReg32(_Rd_), GetHWReg32(_Rt_), iRegs[_Rs_].k);
+            } else {
+                OR(PutHWReg32(_Rd_), GetHWReg32(_Rs_), GetHWReg32(_Rt_));
+            }
+        }
+        else if (IsConst(_Rt_) && !IsMapped(_Rt_)) {
+            if ((iRegs[_Rt_].k & 0xffff) == iRegs[_Rt_].k) {
+                ORI(PutHWReg32(_Rd_), GetHWReg32(_Rs_), iRegs[_Rt_].k);
+            } else {
+                OR(PutHWReg32(_Rd_), GetHWReg32(_Rs_), GetHWReg32(_Rt_));
+            }
+        } else {
+            OR(PutHWReg32(_Rd_), GetHWReg32(_Rs_), GetHWReg32(_Rt_));
+        }
+    }
+}
+
+static void recXOR() {
+// Rd = Rs Xor Rt
+    if (!_Rd_) return;
+    
+    if (IsConst(_Rs_) && IsConst(_Rt_)) {
+        MapConst(_Rd_, iRegs[_Rs_].k ^ iRegs[_Rt_].k);
+    } else if (IsConst(_Rs_) && !IsMapped(_Rs_)) {
+        if ((iRegs[_Rs_].k & 0xffff) == iRegs[_Rs_].k) {
+            XORI(PutHWReg32(_Rd_), GetHWReg32(_Rt_), iRegs[_Rs_].k);
+        } else {
+            XOR(PutHWReg32(_Rd_), GetHWReg32(_Rs_), GetHWReg32(_Rt_));
+        }
+    } else if (IsConst(_Rt_) && !IsMapped(_Rt_)) {
+        if ((iRegs[_Rt_].k & 0xffff) == iRegs[_Rt_].k) {
+            XORI(PutHWReg32(_Rd_), GetHWReg32(_Rs_), iRegs[_Rt_].k);
+        } else {
+            XOR(PutHWReg32(_Rd_), GetHWReg32(_Rs_), GetHWReg32(_Rt_));
+        }
+    } else {
+        XOR(PutHWReg32(_Rd_), GetHWReg32(_Rs_), GetHWReg32(_Rt_));
+    }
+}
+
+static void recNOR() {
+// Rd = Rs Nor Rt
+    if (!_Rd_) return;
+    
+    if (IsConst(_Rs_) && IsConst(_Rt_)) {
+        MapConst(_Rd_, ~(iRegs[_Rs_].k | iRegs[_Rt_].k));
+    } /*else if (IsConst(_Rs_) && !IsMapped(_Rs_)) {
+        if ((iRegs[_Rs_].k & 0xffff) == iRegs[_Rs_].k) {
+            NORI(PutHWReg32(_Rd_), GetHWReg32(_Rt_), iRegs[_Rs_].k);
+        } else {
+            NOR(PutHWReg32(_Rd_), GetHWReg32(_Rs_), GetHWReg32(_Rt_));
+        }
+    } else if (IsConst(_Rt_) && !IsMapped(_Rt_)) {
+        if ((iRegs[_Rt_].k & 0xffff) == iRegs[_Rt_].k) {
+            NORI(PutHWReg32(_Rd_), GetHWReg32(_Rs_), iRegs[_Rt_].k);
+        } else {
+            NOR(PutHWReg32(_Rd_), GetHWReg32(_Rs_), GetHWReg32(_Rt_));
+        }
+    } */else {
+        NOR(PutHWReg32(_Rd_), GetHWReg32(_Rs_), GetHWReg32(_Rt_));
+    }
+}
+
+static void recSLT() {
+// Rd = Rs < Rt (signed)
+    if (!_Rd_) return;
+
+    if (IsConst(_Rs_) && IsConst(_Rt_)) {
+        MapConst(_Rd_, (s32)iRegs[_Rs_].k < (s32)iRegs[_Rt_].k);
+    } else { // TODO: add immidiate cases
+        int reg;
+        CMPW(GetHWReg32(_Rs_), GetHWReg32(_Rt_));
+        reg = PutHWReg32(_Rd_);
+        LI(reg, 1);
+        BLT(1);
+        LI(reg, 0);
+    }
+}
+
+static void recSLTU() { 
+// Rd = Rs < Rt (unsigned)
+    if (!_Rd_) return;
+
+    if (IsConst(_Rs_) && IsConst(_Rt_)) {
+        MapConst(_Rd_, iRegs[_Rs_].k < iRegs[_Rt_].k);
+    } else { // TODO: add immidiate cases
+        SUBFC(PutHWReg32(_Rd_), GetHWReg32(_Rt_), GetHWReg32(_Rs_));
+        SUBFE(PutHWReg32(_Rd_), GetHWReg32(_Rd_), GetHWReg32(_Rd_));
+        NEG(PutHWReg32(_Rd_), GetHWReg32(_Rd_));
+    }
+}
+#endif
+//End of * Register arithmetic
+
+#pragma mark - mult/div & Register trap logic -
+/*********************************************************
+* Register mult/div & Register trap logic                *
+* Format:  OP rs, rt                                     *
+*********************************************************/
+
+#if 0
+REC_FUNC(MULT);
+REC_FUNC(MULTU);
+REC_FUNC(DIV);
+REC_FUNC(DIVU);
+#else
+
+int DoShift(u32 k)
+{
+	u32 i;
+	for (i=0; i<30; i++) {
+		if (k == (1ul << i))
+			return i;
+	}
+	return -1;
+}
+
+//REC_FUNC(MULT);
+
+// FIXME: doesn't work in GT - wrong way marker
+static void recMULT() {
+// Lo/Hi = Rs * Rt (signed)
+	s32 k; int r;
+	int usehi, uselo;
+	
+	if ((IsConst(_Rs_) && iRegs[_Rs_].k == 0) ||
+		(IsConst(_Rt_) && iRegs[_Rt_].k == 0)) {
+		MapConst(REG_LO, 0);
+		MapConst(REG_HI, 0);
+		return;
+	}
+	
+	if (IsConst(_Rs_) && IsConst(_Rt_)) {
+		u64 res = (s64)((s64)(s32)iRegs[_Rs_].k * (s64)(s32)iRegs[_Rt_].k);
+		MapConst(REG_LO, (res & 0xffffffff));
+		MapConst(REG_HI, ((res >> 32) & 0xffffffff));
+		return;
+	}
+	
+	if (IsConst(_Rs_)) {
+		k = (s32)iRegs[_Rs_].k;
+		r = _Rt_;
+	} else if (IsConst(_Rt_)) {
+		k = (s32)iRegs[_Rt_].k;
+		r = _Rs_;
+	} else {
+		r = -1;
+		k = 0;
+	}
+	
+	// FIXME: this should not be needed!!!
+//	uselo = isPsxRegUsed(pc, REG_LO);
+//	usehi = isPsxRegUsed(pc, REG_HI);
+	uselo = 1; //isPsxRegUsed(pc, REG_LO);
+	usehi = 1; //isPsxRegUsed(pc, REG_HI);
+
+
+	if (r != -1) {
+		int shift = DoShift(k);
+		if (shift != -1) {
+			if (uselo) {
+				SLWI(PutHWReg32(REG_LO), GetHWReg32(r), shift)
+			}
+			if (usehi) {
+				SRAWI(PutHWReg32(REG_HI), GetHWReg32(r), 31-shift);
+			}
+		} else {
+			//if ((s32)(s16)k == k) {
+			//	MULLWI(PutHWReg32(REG_LO), GetHWReg32(r), k);
+			//	MULHWI(PutHWReg32(REG_HI), GetHWReg32(r), k);
+			//} else
+			{
+				if (uselo) {
+					MULLW(PutHWReg32(REG_LO), GetHWReg32(_Rs_), GetHWReg32(_Rt_));
+				}
+				if (usehi) {
+					MULHW(PutHWReg32(REG_HI), GetHWReg32(_Rs_), GetHWReg32(_Rt_));
+				}
+			}
+		}
+	} else {
+		if (uselo) {
+			MULLW(PutHWReg32(REG_LO), GetHWReg32(_Rs_), GetHWReg32(_Rt_));
+		}
+		if (usehi) {
+			MULHW(PutHWReg32(REG_HI), GetHWReg32(_Rs_), GetHWReg32(_Rt_));
+		}
+	}
+}
+
+static void recMULTU() {
+// Lo/Hi = Rs * Rt (unsigned)
+	u32 k; int r;
+	int usehi, uselo;
+	
+	if ((IsConst(_Rs_) && iRegs[_Rs_].k == 0) ||
+		(IsConst(_Rt_) && iRegs[_Rt_].k == 0)) {
+		MapConst(REG_LO, 0);
+		MapConst(REG_HI, 0);
+		return;
+	}
+	
+	if (IsConst(_Rs_) && IsConst(_Rt_)) {
+		u64 res = (u64)((u64)(u32)iRegs[_Rs_].k * (u64)(u32)iRegs[_Rt_].k);
+		MapConst(REG_LO, (res & 0xffffffff));
+		MapConst(REG_HI, ((res >> 32) & 0xffffffff));
+		return;
+	}
+	
+	if (IsConst(_Rs_)) {
+		k = (s32)iRegs[_Rs_].k;
+		r = _Rt_;
+	} else if (IsConst(_Rt_)) {
+		k = (s32)iRegs[_Rt_].k;
+		r = _Rs_;
+	} else {
+		r = -1;
+		k = 0;
+	}
+	
+	uselo = isPsxRegUsed(pc, REG_LO);
+	usehi = isPsxRegUsed(pc, REG_HI);
+
+	if (r != -1) {
+		int shift = DoShift(k);
+		if (shift != -1) {
+			if (uselo) {
+				SLWI(PutHWReg32(REG_LO), GetHWReg32(r), shift);
+			}
+			if (usehi) {
+				SRWI(PutHWReg32(REG_HI), GetHWReg32(r), 31-shift);
+			}
+		} else {
+			{
+				if (uselo) {
+					MULLW(PutHWReg32(REG_LO), GetHWReg32(_Rs_), GetHWReg32(_Rt_));
+				}
+				if (usehi) {
+					MULHWU(PutHWReg32(REG_HI), GetHWReg32(_Rs_), GetHWReg32(_Rt_));
+				}
+			}
+		}
+	} else {
+		if (uselo) {
+			MULLW(PutHWReg32(REG_LO), GetHWReg32(_Rs_), GetHWReg32(_Rt_));
+		}
+		if (usehi) {
+			MULHWU(PutHWReg32(REG_HI), GetHWReg32(_Rs_), GetHWReg32(_Rt_));
+		}
+	}
+}
+
+static void recDIV() {
+// Lo/Hi = Rs / Rt (signed)
+	int usehi;
+
+	if (IsConst(_Rs_) && iRegs[_Rs_].k == 0) {
+		MapConst(REG_LO, 0);
+		MapConst(REG_HI, 0);
+		return;
+	}
+	if (IsConst(_Rt_) && IsConst(_Rs_)) {
+		MapConst(REG_LO, (s32)iRegs[_Rs_].k / (s32)iRegs[_Rt_].k);
+		MapConst(REG_HI, (s32)iRegs[_Rs_].k % (s32)iRegs[_Rt_].k);
+		return;
+	}
+	
+	usehi = isPsxRegUsed(pc, REG_HI);
+	
+	if (IsConst(_Rt_)) {
+		int shift = DoShift(iRegs[_Rt_].k);
+		if (shift != -1) {
+			SRAWI(PutHWReg32(REG_LO), GetHWReg32(_Rs_), shift);
+			ADDZE(PutHWReg32(REG_LO), GetHWReg32(REG_LO));
+			if (usehi) {
+				RLWINM(PutHWReg32(REG_HI), GetHWReg32(_Rs_), 0, 31-shift, 31);
+			}
+		} else if (iRegs[_Rt_].k == 3) {
+			// http://the.wall.riscom.net/books/proc/ppc/cwg/code2.html
+			LIS(PutHWReg32(REG_HI), 0x5555);
+			ADDI(PutHWReg32(REG_HI), GetHWReg32(REG_HI), 0x5556);
+			MULHW(PutHWReg32(REG_LO), GetHWReg32(REG_HI), GetHWReg32(_Rs_));
+			SRWI(PutHWReg32(REG_HI), GetHWReg32(_Rs_), 31);
+			ADD(PutHWReg32(REG_LO), GetHWReg32(REG_LO), GetHWReg32(REG_HI));
+			if (usehi) {
+				MULLI(PutHWReg32(REG_HI), GetHWReg32(REG_LO), 3);
+				SUB(PutHWReg32(REG_HI), GetHWReg32(_Rs_), GetHWReg32(REG_HI));
+			}
+		} else {
+			DIVW(PutHWReg32(REG_LO), GetHWReg32(_Rs_), GetHWReg32(_Rt_));
+			if (usehi) {
+				if ((iRegs[_Rt_].k & 0x7fff) == iRegs[_Rt_].k) {
+					MULLI(PutHWReg32(REG_HI), GetHWReg32(REG_LO), iRegs[_Rt_].k);
+				} else {
+					MULLW(PutHWReg32(REG_HI), GetHWReg32(REG_LO), GetHWReg32(_Rt_));
+				}
+				SUB(PutHWReg32(REG_HI), GetHWReg32(_Rs_), GetHWReg32(REG_HI));
+			}
+		}
+	} else {
+		DIVW(PutHWReg32(REG_LO), GetHWReg32(_Rs_), GetHWReg32(_Rt_));
+		if (usehi) {
+			MULLW(PutHWReg32(REG_HI), GetHWReg32(REG_LO), GetHWReg32(_Rt_));
+			SUB(PutHWReg32(REG_HI), GetHWReg32(_Rs_), GetHWReg32(REG_HI));
+		}
+	}
+}
+
+static void recDIVU() {
+// Lo/Hi = Rs / Rt (unsigned)
+	int usehi;
+
+	if (IsConst(_Rs_) && iRegs[_Rs_].k == 0) {
+		MapConst(REG_LO, 0);
+		MapConst(REG_HI, 0);
+		return;
+	}
+	if (IsConst(_Rt_) && IsConst(_Rs_)) {
+		MapConst(REG_LO, (u32)iRegs[_Rs_].k / (u32)iRegs[_Rt_].k);
+		MapConst(REG_HI, (u32)iRegs[_Rs_].k % (u32)iRegs[_Rt_].k);
+		return;
+	}
+	
+	usehi = isPsxRegUsed(pc, REG_HI);
+
+	if (IsConst(_Rt_)) {
+		int shift = DoShift(iRegs[_Rt_].k);
+		if (shift != -1) {
+			SRWI(PutHWReg32(REG_LO), GetHWReg32(_Rs_), shift);
+			if (usehi) {
+				RLWINM(PutHWReg32(REG_HI), GetHWReg32(_Rs_), 0, 31-shift, 31);
+			}
+		} else {
+			DIVWU(PutHWReg32(REG_LO), GetHWReg32(_Rs_), GetHWReg32(_Rt_));
+			if (usehi) {
+				MULLW(PutHWReg32(REG_HI), GetHWReg32(_Rt_), GetHWReg32(REG_LO));
+				SUB(PutHWReg32(REG_HI), GetHWReg32(_Rs_), GetHWReg32(REG_HI));
+			}
+		}
+	} else {
+		DIVWU(PutHWReg32(REG_LO), GetHWReg32(_Rs_), GetHWReg32(_Rt_));
+		if (usehi) {
+			MULLW(PutHWReg32(REG_HI), GetHWReg32(_Rt_), GetHWReg32(REG_LO));
+			SUB(PutHWReg32(REG_HI), GetHWReg32(_Rs_), GetHWReg32(REG_HI));
+		}
+	}
+}
+#endif
+//End of * Register mult/div & Register trap logic  
+
+#pragma mark - memory access -
+
+#if 0
+REC_FUNC(LB);
+REC_FUNC(LBU);
+REC_FUNC(LH);
+REC_FUNC(LHU);
+REC_FUNC(LW);
+
+REC_FUNC(SB);
+REC_FUNC(SH);
+REC_FUNC(SW);
+
+REC_FUNC(LWL);
+REC_FUNC(LWR);
+REC_FUNC(SWL);
+REC_FUNC(SWR);
+#else
+static void preMemRead()
+{
+	int rs;
+	
+	ReserveArgs(1);
+	if (_Rs_ != _Rt_) {
+		DisposeHWReg(iRegs[_Rt_].reg);
+	}
+	rs = GetHWReg32(_Rs_);
+	if (rs != 3 || _Imm_ != 0) {
+		ADDI(PutHWRegSpecial(ARG1), rs, _Imm_);
+	}
+	if (_Rs_ == _Rt_) {
+		DisposeHWReg(iRegs[_Rt_].reg);
+	}
+	InvalidateCPURegs();
+	//FlushAllHWReg();
+}
+
+static void preMemWrite(int size)
+{
+	int rs;
+	
+	ReserveArgs(2);
+	rs = GetHWReg32(_Rs_);
+	if (rs != 3 || _Imm_ != 0) {
+		ADDI(PutHWRegSpecial(ARG1), rs, _Imm_);
+	}
+	if (size == 1) {
+		RLWINM(PutHWRegSpecial(ARG2), GetHWReg32(_Rt_), 0, 24, 31);
+		//ANDI_(PutHWRegSpecial(ARG2), GetHWReg32(_Rt_), 0xff);
+	} else if (size == 2) {
+		RLWINM(PutHWRegSpecial(ARG2), GetHWReg32(_Rt_), 0, 16, 31);
+		//ANDI_(PutHWRegSpecial(ARG2), GetHWReg32(_Rt_), 0xffff);
+	} else {
+		MR(PutHWRegSpecial(ARG2), GetHWReg32(_Rt_));
+	}
+	
+	InvalidateCPURegs();
+	//FlushAllHWReg();
+}
+
+static void recLB() {
+// Rt = mem[Rs + Im] (signed)
+	
+    /*if (IsConst(_Rs_)) {
+        u32 addr = iRegs[_Rs_].k + _Imm_;
+        int t = addr >> 16;
+    
+        if ((t & 0xfff0)  == 0xbfc0) {
+            if (!_Rt_) return;
+            // since bios is readonly it won't change
+            MapConst(_Rt_, psxRs8(addr));
+            return;
+        }
+        if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+            if (!_Rt_) return;
+                
+            addr = (u32)&psxM[addr & 0x1fffff];
+            LIW(PutHWReg32(_Rt_), ((addr>>16)<<16)+(addr&0x8000<<1)); // FIXME: is this correct?
+            LBZ(PutHWReg32(_Rt_), addr&0xffff, GetHWReg32(_Rt_));
+            EXTSB(PutHWReg32(_Rt_), GetHWReg32(_Rt_));
+            return;
+        }
+        if (t == 0x1f80 && addr < 0x1f801000) {
+            if (!_Rt_) return;
+    
+            addr = (u32)&psxH[addr & 0xfff];
+            LIW(PutHWReg32(_Rt_), ((addr>>16)<<16)+(addr&0x8000<<1)); // FIXME: is this correct?
+            LBZ(PutHWReg32(_Rt_), addr&0xffff, GetHWReg32(_Rt_));
+            EXTSB(PutHWReg32(_Rt_), GetHWReg32(_Rt_));
+            return;
+        }
+    //	SysPrintf("unhandled r8 %x\n", addr);
+    }*/
+	
+	preMemRead();
+	CALLFunc((u32)psxMemRead8);
+	if (_Rt_) {
+		EXTSB(PutHWReg32(_Rt_), GetHWRegSpecial(RETVAL));
+		DisposeHWReg(GetSpecialIndexFromHWRegs(RETVAL));
+	}
+}
+
+static void recLBU() {
+// Rt = mem[Rs + Im] (unsigned)
+
+    /*if (IsConst(_Rs_)) {
+        u32 addr = iRegs[_Rs_].k + _Imm_;
+        int t = addr >> 16;
+    
+        if ((t & 0xfff0)  == 0xbfc0) {
+            if (!_Rt_) return;
+            // since bios is readonly it won't change
+            MapConst(_Rt_, psxRu8(addr));
+            return;
+        }
+        if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+            if (!_Rt_) return;
+                
+            addr = (u32)&psxM[addr & 0x1fffff];
+            LIW(PutHWReg32(_Rt_), ((addr>>16)<<16)+(addr&0x8000<<1)); // FIXME: is this correct?
+            LBZ(PutHWReg32(_Rt_), addr&0xffff, GetHWReg32(_Rt_));
+            return;
+        }
+        if (t == 0x1f80 && addr < 0x1f801000) {
+            if (!_Rt_) return;
+    
+            addr = (u32)&psxH[addr & 0xfff];
+            LIW(PutHWReg32(_Rt_), ((addr>>16)<<16)+(addr&0x8000<<1)); // FIXME: is this correct?
+            LBZ(PutHWReg32(_Rt_), addr&0xffff, GetHWReg32(_Rt_));
+            return;
+        }
+    //	SysPrintf("unhandled r8 %x\n", addr);
+    }*/
+        
+	preMemRead();
+	CALLFunc((u32)psxMemRead8);
+	
+	if (_Rt_) {
+		SetDstCPUReg(3);
+		PutHWReg32(_Rt_);
+	}
+}
+
+static void recLH() {
+// Rt = mem[Rs + Im] (signed)
+
+	if (IsConst(_Rs_)) {
+		u32 addr = iRegs[_Rs_].k + _Imm_;
+		int t = addr >> 16;
+	
+		if ((t & 0xfff0)  == 0xbfc0) {
+			if (!_Rt_) return;
+			// since bios is readonly it won't change
+			MapConst(_Rt_, psxRs16(addr));
+			return;
+		}
+		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+			if (!_Rt_) return;
+
+			LIW(PutHWReg32(_Rt_), (u32)&psxM[addr & 0x1fffff]);
+			LHBRX(PutHWReg32(_Rt_), 0, GetHWReg32(_Rt_));
+			EXTSH(PutHWReg32(_Rt_), GetHWReg32(_Rt_));
+			return;
+		}
+		if (t == 0x1f80 && addr < 0x1f801000) {
+			if (!_Rt_) return;
+
+			LIW(PutHWReg32(_Rt_), (u32)&psxH[addr & 0xfff]);
+			LHBRX(PutHWReg32(_Rt_), 0, GetHWReg32(_Rt_));
+			EXTSH(PutHWReg32(_Rt_), GetHWReg32(_Rt_));
+			return;
+		}
+	//	SysPrintf("unhandled r16 %x\n", addr);
+	}
+    
+	preMemRead();
+	CALLFunc((u32)psxMemRead16);
+	if (_Rt_) {
+		EXTSH(PutHWReg32(_Rt_), GetHWRegSpecial(RETVAL));
+		DisposeHWReg(GetSpecialIndexFromHWRegs(RETVAL));
+	}
+}
+
+static void recLHU() {
+// Rt = mem[Rs + Im] (unsigned)
+
+	if (IsConst(_Rs_)) {
+		u32 addr = iRegs[_Rs_].k + _Imm_;
+		int t = addr >> 16;
+	
+		if ((t & 0xfff0) == 0xbfc0) {
+			if (!_Rt_) return;
+			// since bios is readonly it won't change
+			MapConst(_Rt_, psxRu16(addr));
+			return;
+		}
+		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+			if (!_Rt_) return;
+
+			LIW(PutHWReg32(_Rt_), (u32)&psxM[addr & 0x1fffff]);
+			LHBRX(PutHWReg32(_Rt_), 0, GetHWReg32(_Rt_));
+			return;
+		}
+		if (t == 0x1f80 && addr < 0x1f801000) {
+			if (!_Rt_) return;
+
+			LIW(PutHWReg32(_Rt_), (u32)&psxH[addr & 0xfff]);
+			LHBRX(PutHWReg32(_Rt_), 0, GetHWReg32(_Rt_));
+			return;
+		}
+		if (t == 0x1f80) {
+			if (addr >= 0x1f801c00 && addr < 0x1f801e00) {
+					if (!_Rt_) return;
+					
+					ReserveArgs(1);
+					LIW(PutHWRegSpecial(ARG1), addr);
+					DisposeHWReg(iRegs[_Rt_].reg);
+					InvalidateCPURegs();
+					CALLFunc((u32)SPU_readRegister);
+					
+					SetDstCPUReg(3);
+					PutHWReg32(_Rt_);
+					return;
+			}
+			switch (addr) {
+					case 0x1f801100: case 0x1f801110: case 0x1f801120:
+						if (!_Rt_) return;
+						
+						ReserveArgs(1);
+						LIW(PutHWRegSpecial(ARG1), (addr >> 4) & 0x3);
+						DisposeHWReg(iRegs[_Rt_].reg);
+						InvalidateCPURegs();
+						CALLFunc((u32)psxRcntRcount);
+						
+						SetDstCPUReg(3);
+						PutHWReg32(_Rt_);
+						return;
+
+					case 0x1f801104: case 0x1f801114: case 0x1f801124:
+						if (!_Rt_) return;
+						
+                        ReserveArgs(1);
+                        LIW(PutHWRegSpecial(ARG1), (addr >> 4) & 0x3);
+                        DisposeHWReg(iRegs[_Rt_].reg);
+                        InvalidateCPURegs();
+                        CALLFunc((u32)psxRcntRmode);
+                        
+                        SetDstCPUReg(3);
+                        PutHWReg32(_Rt_);
+						return;
+	
+					case 0x1f801108: case 0x1f801118: case 0x1f801128:
+						if (!_Rt_) return;
+
+                        ReserveArgs(1);
+                        LIW(PutHWRegSpecial(ARG1), (addr >> 4) & 0x3);
+                        DisposeHWReg(iRegs[_Rt_].reg);
+                        InvalidateCPURegs();
+                        CALLFunc((u32)psxRcntRtarget);
+                        
+                        SetDstCPUReg(3);
+                        PutHWReg32(_Rt_);
+						return;
+					}
+		}
+	//	SysPrintf("unhandled r16u %x\n", addr);
+	}
+	
+	preMemRead();
+	CALLFunc((u32)psxMemRead16);
+	if (_Rt_) {
+		SetDstCPUReg(3);
+		PutHWReg32(_Rt_);
+	}
+}
+
+static void recLW() {
+// Rt = mem[Rs + Im] (unsigned)
+
+	if (IsConst(_Rs_)) {
+		u32 addr = iRegs[_Rs_].k + _Imm_;
+		int t = addr >> 16;
+
+		if ((t & 0xfff0) == 0xbfc0) {
+			if (!_Rt_) return;
+			// since bios is readonly it won't change
+			MapConst(_Rt_, psxRu32(addr));
+			return;
+		}
+		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+			if (!_Rt_) return;
+
+			LIW(PutHWReg32(_Rt_), (u32)&psxM[addr & 0x1fffff]);
+			LWBRX(PutHWReg32(_Rt_), 0, GetHWReg32(_Rt_));
+			return;
+		}
+		if (t == 0x1f80 && addr < 0x1f801000) {
+			if (!_Rt_) return;
+
+			LIW(PutHWReg32(_Rt_), (u32)&psxH[addr & 0xfff]);
+			LWBRX(PutHWReg32(_Rt_), 0, GetHWReg32(_Rt_));
+			return;
+		}
+		if (t == 0x1f80) {
+			switch (addr) {
+				case 0x1f801080: case 0x1f801084: case 0x1f801088: 
+				case 0x1f801090: case 0x1f801094: case 0x1f801098: 
+				case 0x1f8010a0: case 0x1f8010a4: case 0x1f8010a8: 
+				case 0x1f8010b0: case 0x1f8010b4: case 0x1f8010b8: 
+				case 0x1f8010c0: case 0x1f8010c4: case 0x1f8010c8: 
+				case 0x1f8010d0: case 0x1f8010d4: case 0x1f8010d8: 
+				case 0x1f8010e0: case 0x1f8010e4: case 0x1f8010e8: 
+				case 0x1f801070: case 0x1f801074:
+				case 0x1f8010f0: case 0x1f8010f4:
+					if (!_Rt_) return;
+					
+					LIW(PutHWReg32(_Rt_), (u32)&psxH[addr & 0xffff]);
+					LWBRX(PutHWReg32(_Rt_), 0, GetHWReg32(_Rt_));
+					return;
+
+				case 0x1f801810:
+					if (!_Rt_) return;
+
+					DisposeHWReg(iRegs[_Rt_].reg);
+					InvalidateCPURegs();
+					CALLFunc((u32)GPU_readData);
+					
+					SetDstCPUReg(3);
+					PutHWReg32(_Rt_);
+					return;
+
+				case 0x1f801814:
+					if (!_Rt_) return;
+
+					DisposeHWReg(iRegs[_Rt_].reg);
+					InvalidateCPURegs();
+					CALLFunc((u32)GPU_readStatus);
+					
+					SetDstCPUReg(3);
+					PutHWReg32(_Rt_);
+					return;
+			}
+		}
+//		SysPrintf("unhandled r32 %x\n", addr);
+	}
+
+	preMemRead();
+	CALLFunc((u32)psxMemRead32);
+	if (_Rt_) {
+		SetDstCPUReg(3);
+		PutHWReg32(_Rt_);
+	}
+}
+
+REC_FUNC(LWL);
+REC_FUNC(LWR);
+REC_FUNC(SWL);
+REC_FUNC(SWR);
+/*extern u32 LWL_MASK[4];
+extern u32 LWL_SHIFT[4];
+
+void iLWLk(u32 shift) {
+	if (IsConst(_Rt_)) {
+		MOV32ItoR(ECX, iRegs[_Rt_].k);
+	} else {
+		MOV32MtoR(ECX, (u32)&psxRegs.GPR.r[_Rt_]);
+	}
+	AND32ItoR(ECX, LWL_MASK[shift]);
+	SHL32ItoR(EAX, LWL_SHIFT[shift]);
+	OR32RtoR (EAX, ECX);
+}
+
+void recLWL() {
+// Rt = Rt Merge mem[Rs + Im]
+
+	if (IsConst(_Rs_)) {
+		u32 addr = iRegs[_Rs_].k + _Imm_;
+		int t = addr >> 16;
+
+		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+			MOV32MtoR(EAX, (u32)&psxM[addr & 0x1ffffc]);
+			iLWLk(addr & 3);
+
+			iRegs[_Rt_].state = ST_UNK;
+			MOV32RtoM((u32)&psxRegs.GPR.r[_Rt_], EAX);
+			return;
+		}
+		if (t == 0x1f80 && addr < 0x1f801000) {
+			MOV32MtoR(EAX, (u32)&psxH[addr & 0xffc]);
+			iLWLk(addr & 3);
+
+			iRegs[_Rt_].state = ST_UNK;
+			MOV32RtoM((u32)&psxRegs.GPR.r[_Rt_], EAX);
+			return;
+		}
+	}
+
+	if (IsConst(_Rs_)) MOV32ItoR(EAX, iRegs[_Rs_].k + _Imm_);
+	else {
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+		if (_Imm_) ADD32ItoR(EAX, _Imm_);
+	}
+	PUSH32R  (EAX);
+	AND32ItoR(EAX, ~3);
+	PUSH32R  (EAX);
+	CALLFunc((u32)psxMemRead32);
+
+	if (_Rt_) {
+		ADD32ItoR(ESP, 4);
+		POP32R   (EDX);
+		AND32ItoR(EDX, 0x3); // shift = addr & 3;
+
+		MOV32ItoR(ECX, (u32)LWL_SHIFT);
+		MOV32RmStoR(ECX, ECX, EDX, 2);
+		SHL32CLtoR(EAX); // mem(EAX) << LWL_SHIFT[shift]
+
+		MOV32ItoR(ECX, (u32)LWL_MASK);
+		MOV32RmStoR(ECX, ECX, EDX, 2);
+		if (IsConst(_Rt_)) {
+			MOV32ItoR(EDX, iRegs[_Rt_].k);
+		} else {
+			MOV32MtoR(EDX, (u32)&psxRegs.GPR.r[_Rt_]);
+		}
+		AND32RtoR(EDX, ECX); // _rRt_ & LWL_MASK[shift]
+
+		OR32RtoR(EAX, EDX);
+
+		iRegs[_Rt_].state = ST_UNK;
+		MOV32RtoM((u32)&psxRegs.GPR.r[_Rt_], EAX);
+	} else {
+//		ADD32ItoR(ESP, 8);
+		resp+= 8;
+	}
+}
+
+static void recLWBlock(int count) {
+	u32 *code = PSXM(pc);
+	int i, respsave;
+// Rt = mem[Rs + Im] (unsigned)
+
+//	iFlushRegs(0);
+
+	if (IsConst(_Rs_)) {
+		u32 addr = iRegs[_Rs_].k + _Imm_;
+		int t = addr >> 16;
+
+		if ((t & 0xfff0) == 0xbfc0) {
+			// since bios is readonly it won't change
+			for (i=0; i<count; i++, code++, addr+=4) {
+				if (_fRt_(*code)) {
+					MapConst(_fRt_(*code), psxRu32(addr));
+				}
+			}
+			return;
+		}
+		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+			for (i=0; i<count; i++, code++, addr+=4) {
+				if (!_fRt_(*code)) return;
+				iRegs[_fRt_(*code)].state = ST_UNK;
+
+				MOV32MtoR(EAX, (u32)&psxM[addr & 0x1fffff]);
+				MOV32RtoM((u32)&psxRegs.GPR.r[_fRt_(*code)], EAX);
+			}
+			return;
+		}
+		if (t == 0x1f80 && addr < 0x1f801000) {
+			for (i=0; i<count; i++, code++, addr+=4) {
+				if (!_fRt_(*code)) return;
+				iRegs[_fRt_(*code)].state = ST_UNK;
+
+				MOV32MtoR(EAX, (u32)&psxH[addr & 0xfff]);
+				MOV32RtoM((u32)&psxRegs.GPR.r[_fRt_(*code)], EAX);
+			}
+			return;
+		}
+	}
+
+	SysPrintf("recLWBlock %d: %d\n", count, IsConst(_Rs_));
+	iPushOfB();
+	CALLFunc((u32)psxMemPointer);
+//	ADD32ItoR(ESP, 4);
+	resp+= 4;
+
+	respsave = resp; resp = 0;
+	TEST32RtoR(EAX, EAX);
+	j32Ptr[4] = JZ32(0);
+	XOR32RtoR(ECX, ECX);
+	for (i=0; i<count; i++, code++) {
+		if (_fRt_(*code)) {
+			iRegs[_fRt_(*code)].state = ST_UNK;
+			
+			MOV32RmStoR(EDX, EAX, ECX, 2);
+			MOV32RtoM((u32)&psxRegs.GPR.r[_fRt_(*code)], EDX);
+		}
+		if (i != (count-1)) INC32R(ECX);
+	}
+	j32Ptr[5] = JMP32(0);
+	x86SetJ32(j32Ptr[4]);
+	for (i=0, code = PSXM(pc); i<count; i++, code++) {
+		psxRegs.code = *code;
+		recLW();
+	}
+	ADD32ItoR(ESP, resp);
+	x86SetJ32(j32Ptr[5]);
+	resp = respsave;
+}
+
+extern u32 LWR_MASK[4];
+extern u32 LWR_SHIFT[4];
+
+void iLWRk(u32 shift) {
+	if (IsConst(_Rt_)) {
+		MOV32ItoR(ECX, iRegs[_Rt_].k);
+	} else {
+		MOV32MtoR(ECX, (u32)&psxRegs.GPR.r[_Rt_]);
+	}
+	AND32ItoR(ECX, LWR_MASK[shift]);
+	SHR32ItoR(EAX, LWR_SHIFT[shift]);
+	OR32RtoR (EAX, ECX);
+}
+
+void recLWR() {
+// Rt = Rt Merge mem[Rs + Im]
+
+	if (IsConst(_Rs_)) {
+		u32 addr = iRegs[_Rs_].k + _Imm_;
+		int t = addr >> 16;
+
+		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+			MOV32MtoR(EAX, (u32)&psxM[addr & 0x1ffffc]);
+			iLWRk(addr & 3);
+
+			iRegs[_Rt_].state = ST_UNK;
+			MOV32RtoM((u32)&psxRegs.GPR.r[_Rt_], EAX);
+			return;
+		}
+		if (t == 0x1f80 && addr < 0x1f801000) {
+			MOV32MtoR(EAX, (u32)&psxH[addr & 0xffc]);
+			iLWRk(addr & 3);
+
+			iRegs[_Rt_].state = ST_UNK;
+			MOV32RtoM((u32)&psxRegs.GPR.r[_Rt_], EAX);
+			return;
+		}
+	}
+
+	if (IsConst(_Rs_)) MOV32ItoR(EAX, iRegs[_Rs_].k + _Imm_);
+	else {
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+		if (_Imm_) ADD32ItoR(EAX, _Imm_);
+	}
+	PUSH32R  (EAX);
+	AND32ItoR(EAX, ~3);
+	PUSH32R  (EAX);
+	CALLFunc((u32)psxMemRead32);
+
+	if (_Rt_) {
+		ADD32ItoR(ESP, 4);
+		POP32R   (EDX);
+		AND32ItoR(EDX, 0x3); // shift = addr & 3;
+
+		MOV32ItoR(ECX, (u32)LWR_SHIFT);
+		MOV32RmStoR(ECX, ECX, EDX, 2);
+		SHR32CLtoR(EAX); // mem(EAX) >> LWR_SHIFT[shift]
+
+		MOV32ItoR(ECX, (u32)LWR_MASK);
+		MOV32RmStoR(ECX, ECX, EDX, 2);
+
+		if (IsConst(_Rt_)) {
+			MOV32ItoR(EDX, iRegs[_Rt_].k);
+		} else {
+			MOV32MtoR(EDX, (u32)&psxRegs.GPR.r[_Rt_]);
+		}
+		AND32RtoR(EDX, ECX); // _rRt_ & LWR_MASK[shift]
+
+		OR32RtoR(EAX, EDX);
+
+		iRegs[_Rt_].state = ST_UNK;
+		MOV32RtoM((u32)&psxRegs.GPR.r[_Rt_], EAX);
+	} else {
+//		ADD32ItoR(ESP, 8);
+		resp+= 8;
+	}
+}*/
+
+static void recSB() {
+// mem[Rs + Im] = Rt
+
+	/*if (IsConst(_Rs_)) {
+		u32 addr = iRegs[_Rs_].k + _Imm_;
+		int t = addr >> 16;
+
+		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+			if (IsConst(_Rt_)) {
+				MOV8ItoM((u32)&psxM[addr & 0x1fffff], (u8)iRegs[_Rt_].k);
+			} else {
+				MOV8MtoR(EAX, (u32)&psxRegs.GPR.r[_Rt_]);
+				MOV8RtoM((u32)&psxM[addr & 0x1fffff], EAX);
+			}
+			return;
+		}
+		if (t == 0x1f80 && addr < 0x1f801000) {
+			if (IsConst(_Rt_)) {
+				MOV8ItoM((u32)&psxH[addr & 0xfff], (u8)iRegs[_Rt_].k);
+			} else {
+				MOV8MtoR(EAX, (u32)&psxRegs.GPR.r[_Rt_]);
+				MOV8RtoM((u32)&psxH[addr & 0xfff], EAX);
+			}
+			return;
+		}
+//		SysPrintf("unhandled w8 %x\n", addr);
+	}*/
+
+	preMemWrite(1);
+	CALLFunc((u32)psxMemWrite8);
+}
+
+static void recSH() {
+// mem[Rs + Im] = Rt
+
+	/*if (IsConst(_Rs_)) {
+		u32 addr = iRegs[_Rs_].k + _Imm_;
+		int t = addr >> 16;
+
+		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+			if (IsConst(_Rt_)) {
+				MOV16ItoM((u32)&psxM[addr & 0x1fffff], (u16)iRegs[_Rt_].k);
+			} else {
+				MOV16MtoR(EAX, (u32)&psxRegs.GPR.r[_Rt_]);
+				MOV16RtoM((u32)&psxM[addr & 0x1fffff], EAX);
+			}
+			return;
+		}
+		if (t == 0x1f80 && addr < 0x1f801000) {
+			if (IsConst(_Rt_)) {
+				MOV16ItoM((u32)&psxH[addr & 0xfff], (u16)iRegs[_Rt_].k);
+			} else {
+				MOV16MtoR(EAX, (u32)&psxRegs.GPR.r[_Rt_]);
+				MOV16RtoM((u32)&psxH[addr & 0xfff], EAX);
+			}
+			return;
+		}
+		if (t == 0x1f80) {
+			if (addr >= 0x1f801c00 && addr < 0x1f801e00) {
+				if (IsConst(_Rt_)) {
+					PUSH32I(iRegs[_Rt_].k);
+				} else {
+					PUSH32M((u32)&psxRegs.GPR.r[_Rt_]);
+				}
+				PUSH32I  (addr);
+				CALL32M  ((u32)&SPU_writeRegister);
+#ifndef __WIN32__
+				resp+= 8;
+#endif
+				return;
+			}
+		}
+//		SysPrintf("unhandled w16 %x\n", addr);
+	}*/
+
+	preMemWrite(2);
+	CALLFunc((u32)psxMemWrite16);
+}
+
+static void recSW() {
+// mem[Rs + Im] = Rt
+	u32 *b1, *b2;
+#if 0
+	if (IsConst(_Rs_)) {
+		u32 addr = iRegs[_Rs_].k + _Imm_;
+		int t = addr >> 16;
+
+		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+			LIW(0, addr & 0x1fffff);
+			STWBRX(GetHWReg32(_Rt_), GetHWRegSpecial(PSXMEM), 0);
+			return;
+		}
+		if (t == 0x1f80 && addr < 0x1f801000) {
+			LIW(0, (u32)&psxH[addr & 0xfff]);
+			STWBRX(GetHWReg32(_Rt_), 0, 0);
+			return;
+		}
+		if (t == 0x1f80) {
+			switch (addr) {
+				case 0x1f801080: case 0x1f801084: 
+				case 0x1f801090: case 0x1f801094: 
+				case 0x1f8010a0: case 0x1f8010a4: 
+				case 0x1f8010b0: case 0x1f8010b4: 
+				case 0x1f8010c0: case 0x1f8010c4: 
+				case 0x1f8010d0: case 0x1f8010d4: 
+				case 0x1f8010e0: case 0x1f8010e4: 
+				case 0x1f801074:
+				case 0x1f8010f0:
+					LIW(0, (u32)&psxH[addr & 0xffff]);
+					STWBRX(GetHWReg32(_Rt_), 0, 0);
+					return;
+
+/*				case 0x1f801810:
+					if (IsConst(_Rt_)) {
+						PUSH32I(iRegs[_Rt_].k);
+					} else {
+						PUSH32M((u32)&psxRegs.GPR.r[_Rt_]);
+					}
+					CALL32M((u32)&GPU_writeData);
+#ifndef __WIN32__
+					resp+= 4;
+#endif
+					return;
+
+				case 0x1f801814:
+					if (IsConst(_Rt_)) {
+						PUSH32I(iRegs[_Rt_].k);
+					} else {
+						PUSH32M((u32)&psxRegs.GPR.r[_Rt_]);
+					}
+					CALL32M((u32)&GPU_writeStatus);
+#ifndef __WIN32__
+					resp+= 4;
+#endif*/
+			}
+		}
+//		SysPrintf("unhandled w32 %x\n", addr);
+	}
+	
+/*	LIS(0, 0x0079 + ((_Imm_ <= 0) ? 1 : 0));
+	CMPLW(GetHWReg32(_Rs_), 0);
+	BGE_L(b1);
+	
+	//SaveContext();
+	ADDI(0, GetHWReg32(_Rs_), _Imm_);
+	RLWINM(0, GetHWReg32(_Rs_), 0, 11, 31);
+	STWBRX(GetHWReg32(_Rt_), GetHWRegSpecial(PSXMEM), 0);
+	B_L(b2);
+	
+	B_DST(b1);*/
+#endif
+	preMemWrite(4);
+	CALLFunc((u32)psxMemWrite32);
+	
+	//B_DST(b2);
+}
+
+/*
+static void recSWBlock(int count) {
+	u32 *code;
+	int i, respsave;
+// mem[Rs + Im] = Rt
+
+//	iFlushRegs();
+
+	if (IsConst(_Rs_)) {
+		u32 addr = iRegs[_Rs_].k + _Imm_;
+		int t = addr >> 16;
+		code = PSXM(pc);
+
+		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+			for (i=0; i<count; i++, code++, addr+=4) {
+				if (IsConst(_fRt_(*code))) {
+					MOV32ItoM((u32)&psxM[addr & 0x1fffff], iRegs[_fRt_(*code)].k);
+				} else {
+					MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_fRt_(*code)]);
+					MOV32RtoM((u32)&psxM[addr & 0x1fffff], EAX);
+				}
+			}
+			return;
+		}
+		if (t == 0x1f80 && addr < 0x1f801000) {
+			for (i=0; i<count; i++, code++, addr+=4) {
+				if (!_fRt_(*code)) return;
+				iRegs[_fRt_(*code)].state = ST_UNK;
+
+				MOV32MtoR(EAX, (u32)&psxH[addr & 0xfff]);
+				MOV32RtoM((u32)&psxRegs.GPR.r[_fRt_(*code)], EAX);
+			}
+			return;
+		}
+	}
+
+	SysPrintf("recSWBlock %d: %d\n", count, IsConst(_Rs_));
+	iPushOfB();
+	CALLFunc((u32)psxMemPointer);
+//	ADD32ItoR(ESP, 4);
+	resp+= 4;
+
+	respsave = resp; resp = 0;
+	TEST32RtoR(EAX, EAX);
+	j32Ptr[4] = JZ32(0);
+	XOR32RtoR(ECX, ECX);
+	for (i=0, code = PSXM(pc); i<count; i++, code++) {
+		if (IsConst(_fRt_(*code))) {
+			MOV32ItoR(EDX, iRegs[_fRt_(*code)].k);
+		} else {
+			MOV32MtoR(EDX, (u32)&psxRegs.GPR.r[_fRt_(*code)]);
+		}
+		MOV32RtoRmS(EAX, ECX, 2, EDX);
+		if (i != (count-1)) INC32R(ECX);
+	}
+	j32Ptr[5] = JMP32(0);
+	x86SetJ32(j32Ptr[4]);
+	for (i=0, code = PSXM(pc); i<count; i++, code++) {
+		psxRegs.code = *code;
+		recSW();
+	}
+	ADD32ItoR(ESP, resp);
+	x86SetJ32(j32Ptr[5]);
+	resp = respsave;
+}
+
+extern u32 SWL_MASK[4];
+extern u32 SWL_SHIFT[4];
+
+void iSWLk(u32 shift) {
+	if (IsConst(_Rt_)) {
+		MOV32ItoR(ECX, iRegs[_Rt_].k);
+	} else {
+		MOV32MtoR(ECX, (u32)&psxRegs.GPR.r[_Rt_]);
+	}
+	SHR32ItoR(ECX, SWL_SHIFT[shift]);
+	AND32ItoR(EAX, SWL_MASK[shift]);
+	OR32RtoR (EAX, ECX);
+}
+
+void recSWL() {
+// mem[Rs + Im] = Rt Merge mem[Rs + Im]
+
+	if (IsConst(_Rs_)) {
+		u32 addr = iRegs[_Rs_].k + _Imm_;
+		int t = addr >> 16;
+
+		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+			MOV32MtoR(EAX, (u32)&psxM[addr & 0x1ffffc]);
+			iSWLk(addr & 3);
+			MOV32RtoM((u32)&psxM[addr & 0x1ffffc], EAX);
+			return;
+		}
+		if (t == 0x1f80 && addr < 0x1f801000) {
+			MOV32MtoR(EAX, (u32)&psxH[addr & 0xffc]);
+			iSWLk(addr & 3);
+			MOV32RtoM((u32)&psxH[addr & 0xffc], EAX);
+			return;
+		}
+	}
+
+	if (IsConst(_Rs_)) MOV32ItoR(EAX, iRegs[_Rs_].k + _Imm_);
+	else {
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+		if (_Imm_) ADD32ItoR(EAX, _Imm_);
+	}
+	PUSH32R  (EAX);
+	AND32ItoR(EAX, ~3);
+	PUSH32R  (EAX);
+
+	CALLFunc((u32)psxMemRead32);
+
+	ADD32ItoR(ESP, 4);
+	POP32R   (EDX);
+	AND32ItoR(EDX, 0x3); // shift = addr & 3;
+
+	MOV32ItoR(ECX, (u32)SWL_MASK);
+	MOV32RmStoR(ECX, ECX, EDX, 2);
+	AND32RtoR(EAX, ECX); // mem & SWL_MASK[shift]
+
+	MOV32ItoR(ECX, (u32)SWL_SHIFT);
+	MOV32RmStoR(ECX, ECX, EDX, 2);
+	if (IsConst(_Rt_)) {
+		MOV32ItoR(EDX, iRegs[_Rt_].k);
+	} else {
+		MOV32MtoR(EDX, (u32)&psxRegs.GPR.r[_Rt_]);
+	}
+	SHR32CLtoR(EDX); // _rRt_ >> SWL_SHIFT[shift]
+
+	OR32RtoR (EAX, EDX);
+	PUSH32R  (EAX);
+
+	if (IsConst(_Rs_)) MOV32ItoR(EAX, iRegs[_Rs_].k + _Imm_);
+	else {
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+		if (_Imm_) ADD32ItoR(EAX, _Imm_);
+	}
+	AND32ItoR(EAX, ~3);
+	PUSH32R  (EAX);
+
+	CALLFunc((u32)psxMemWrite32);
+//	ADD32ItoR(ESP, 8);
+	resp+= 8;
+}
+
+extern u32 SWR_MASK[4];
+extern u32 SWR_SHIFT[4];
+
+void iSWRk(u32 shift) {
+	if (IsConst(_Rt_)) {
+		MOV32ItoR(ECX, iRegs[_Rt_].k);
+	} else {
+		MOV32MtoR(ECX, (u32)&psxRegs.GPR.r[_Rt_]);
+	}
+	SHL32ItoR(ECX, SWR_SHIFT[shift]);
+	AND32ItoR(EAX, SWR_MASK[shift]);
+	OR32RtoR (EAX, ECX);
+}
+
+void recSWR() {
+// mem[Rs + Im] = Rt Merge mem[Rs + Im]
+
+	if (IsConst(_Rs_)) {
+		u32 addr = iRegs[_Rs_].k + _Imm_;
+		int t = addr >> 16;
+
+		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
+			MOV32MtoR(EAX, (u32)&psxM[addr & 0x1ffffc]);
+			iSWRk(addr & 3);
+			MOV32RtoM((u32)&psxM[addr & 0x1ffffc], EAX);
+			return;
+		}
+		if (t == 0x1f80 && addr < 0x1f801000) {
+			MOV32MtoR(EAX, (u32)&psxH[addr & 0xffc]);
+			iSWRk(addr & 3);
+			MOV32RtoM((u32)&psxH[addr & 0xffc], EAX);
+			return;
+		}
+	}
+
+	if (IsConst(_Rs_)) MOV32ItoR(EAX, iRegs[_Rs_].k + _Imm_);
+	else {
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+		if (_Imm_) ADD32ItoR(EAX, _Imm_);
+	}
+	PUSH32R  (EAX);
+	AND32ItoR(EAX, ~3);
+	PUSH32R  (EAX);
+
+	CALLFunc((u32)psxMemRead32);
+
+	ADD32ItoR(ESP, 4);
+	POP32R   (EDX);
+	AND32ItoR(EDX, 0x3); // shift = addr & 3;
+
+	MOV32ItoR(ECX, (u32)SWR_MASK);
+	MOV32RmStoR(ECX, ECX, EDX, 2);
+	AND32RtoR(EAX, ECX); // mem & SWR_MASK[shift]
+
+	MOV32ItoR(ECX, (u32)SWR_SHIFT);
+	MOV32RmStoR(ECX, ECX, EDX, 2);
+	if (IsConst(_Rt_)) {
+		MOV32ItoR(EDX, iRegs[_Rt_].k);
+	} else {
+		MOV32MtoR(EDX, (u32)&psxRegs.GPR.r[_Rt_]);
+	}
+	SHL32CLtoR(EDX); // _rRt_ << SWR_SHIFT[shift]
+
+	OR32RtoR (EAX, EDX);
+	PUSH32R  (EAX);
+
+	if (IsConst(_Rs_)) MOV32ItoR(EAX, iRegs[_Rs_].k + _Imm_);
+	else {
+		MOV32MtoR(EAX, (u32)&psxRegs.GPR.r[_Rs_]);
+		if (_Imm_) ADD32ItoR(EAX, _Imm_);
+	}
+	AND32ItoR(EAX, ~3);
+	PUSH32R  (EAX);
+
+	CALLFunc((u32)psxMemWrite32);
+//	ADD32ItoR(ESP, 8);
+	resp+= 8;
+}*/
+#endif
+
+#if 0
+/*REC_FUNC(SLL);
+REC_FUNC(SRL);
+REC_FUNC(SRA);*/
+#else
+static void recSLL() {
+// Rd = Rt << Sa
+    if (!_Rd_) return;
+
+    if (IsConst(_Rt_)) {
+        MapConst(_Rd_, iRegs[_Rt_].k << _Sa_);
+    } else {
+        SLWI(PutHWReg32(_Rd_), GetHWReg32(_Rt_), _Sa_);
+    }
+}
+
+static void recSRL() {
+// Rd = Rt >> Sa
+    if (!_Rd_) return;
+
+    if (IsConst(_Rt_)) {
+        MapConst(_Rd_, iRegs[_Rt_].k >> _Sa_);
+    } else {
+        SRWI(PutHWReg32(_Rd_), GetHWReg32(_Rt_), _Sa_);
+    }
+}
+
+static void recSRA() {
+// Rd = Rt >> Sa
+    if (!_Rd_) return;
+
+    if (IsConst(_Rt_)) {
+        MapConst(_Rd_, (s32)iRegs[_Rt_].k >> _Sa_);
+    } else {
+        SRAWI(PutHWReg32(_Rd_), GetHWReg32(_Rt_), _Sa_);
+    }
+}
+#endif
+
+#pragma mark - shift ops -
+#if 0
+/*REC_FUNC(SLLV);
+REC_FUNC(SRLV);
+REC_FUNC(SRAV);*/
+#else
+static void recSLLV() {
+// Rd = Rt << Rs
+	if (!_Rd_) return;
+
+	if (IsConst(_Rt_) && IsConst(_Rs_)) {
+		MapConst(_Rd_, iRegs[_Rt_].k << iRegs[_Rs_].k);
+	} else if (IsConst(_Rs_) && !IsMapped(_Rs_)) {
+		SLWI(PutHWReg32(_Rd_), GetHWReg32(_Rt_), iRegs[_Rs_].k);
+	} else {
+		SLW(PutHWReg32(_Rd_), GetHWReg32(_Rt_), GetHWReg32(_Rs_));
+	}
+}
+
+static void recSRLV() {
+// Rd = Rt >> Rs
+	if (!_Rd_) return;
+
+	if (IsConst(_Rt_) && IsConst(_Rs_)) {
+		MapConst(_Rd_, iRegs[_Rt_].k >> iRegs[_Rs_].k);
+	} else if (IsConst(_Rs_) && !IsMapped(_Rs_)) {
+		SRWI(PutHWReg32(_Rd_), GetHWReg32(_Rt_), iRegs[_Rs_].k);
+	} else {
+		SRW(PutHWReg32(_Rd_), GetHWReg32(_Rt_), GetHWReg32(_Rs_));
+	}
+}
+
+static void recSRAV() {
+// Rd = Rt >> Rs
+	if (!_Rd_) return;
+
+	if (IsConst(_Rt_) && IsConst(_Rs_)) {
+		MapConst(_Rd_, (s32)iRegs[_Rt_].k >> iRegs[_Rs_].k);
+	} else if (IsConst(_Rs_) && !IsMapped(_Rs_)) {
+		SRAWI(PutHWReg32(_Rd_), GetHWReg32(_Rt_), iRegs[_Rs_].k);
+	} else {
+		SRAW(PutHWReg32(_Rd_), GetHWReg32(_Rt_), GetHWReg32(_Rs_));
+	}
+}
+#endif
+
+//REC_SYS(SYSCALL);
+//REC_SYS(BREAK);
+
+//#if 0*/
+/*int dump;*/
+static void recSYSCALL() {
+//	dump=1;
+	iFlushRegs(0);
+	
+	ReserveArgs(2);
+	LIW(PutHWRegSpecial(PSXPC), pc - 4);
+	LIW(PutHWRegSpecial(ARG1), 0x20);
+	LIW(PutHWRegSpecial(ARG2), (branch == 1 ? 1 : 0));
+	FlushAllHWReg();
+	CALLFunc ((u32)psxException);
+
+	branch = 2;
+	iRet();
+}
+
+static void recBREAK() {
+}
+//#endif
+
+#if 0
+/*REC_FUNC(MFHI);
+REC_FUNC(MTHI);
+REC_FUNC(MFLO);
+REC_FUNC(MTLO);*/
+#else
+static void recMFHI() {
+// Rd = Hi
+	if (!_Rd_) return;
+	
+	if (IsConst(REG_HI)) {
+		MapConst(_Rd_, iRegs[REG_HI].k);
+	} else {
+		MapCopy(_Rd_, REG_HI);
+	}
+}
+
+static void recMTHI() {
+// Hi = Rs
+
+	if (IsConst(_Rs_)) {
+		MapConst(REG_HI, iRegs[_Rs_].k);
+	} else {
+		MapCopy(REG_HI, _Rs_);
+	}
+}
+
+static void recMFLO() {
+// Rd = Lo
+	if (!_Rd_) return;
+
+	if (IsConst(REG_LO)) {
+		MapConst(_Rd_, iRegs[REG_LO].k);
+	} else {
+		MapCopy(_Rd_, REG_LO);
+	}
+}
+
+static void recMTLO() {
+// Lo = Rs
+
+	if (IsConst(_Rs_)) {
+		MapConst(REG_LO, iRegs[_Rs_].k);
+	} else {
+		MapCopy(REG_LO, _Rs_);
+	}
+}
+#endif
+
+#pragma mark - branch ops -
+#if 0
+/*REC_BRANCH(J);
+REC_BRANCH(JR);
+REC_BRANCH(JAL);
+REC_BRANCH(JALR);
+REC_BRANCH(BLTZ);
+REC_BRANCH(BGTZ);
+REC_BRANCH(BLTZAL);
+REC_BRANCH(BGEZAL);
+REC_BRANCH(BNE);
+REC_BRANCH(BEQ);
+REC_BRANCH(BLEZ);
+REC_BRANCH(BGEZ);*/
+#else
+static void recBLTZ() {
+// Branch if Rs < 0
+	u32 bpc = _Imm_ * 4 + pc;
+	u32 *b;
+
+	if (IsConst(_Rs_)) {
+		if ((s32)iRegs[_Rs_].k < 0) {
+			iJump(bpc); return;
+		} else {
+			iJump(pc+4); return;
+		}
+	}
+
+	CMPWI(GetHWReg32(_Rs_), 0);
+	BLT_L(b);
+	
+	iBranch(pc+4, 1);
+
+	B_DST(b);
+	
+	iBranch(bpc, 0);
+	pc+=4;
+}
+
+static void recBGTZ() {
+// Branch if Rs > 0
+    u32 bpc = _Imm_ * 4 + pc;
+    u32 *b;
+
+    if (IsConst(_Rs_)) {
+        if ((s32)iRegs[_Rs_].k > 0) {
+            iJump(bpc); return;
+        } else {
+            iJump(pc+4); return;
+        }
+    }
+
+    CMPWI(GetHWReg32(_Rs_), 0);
+    BGT_L(b);
+    
+    iBranch(pc+4, 1);
+
+    B_DST(b);
+
+    iBranch(bpc, 0);
+    pc+=4;
+}
+
+static void recBLTZAL() {
+// Branch if Rs < 0
+    u32 bpc = _Imm_ * 4 + pc;
+    u32 *b;
+
+    if (IsConst(_Rs_)) {
+        if ((s32)iRegs[_Rs_].k < 0) {
+            MapConst(31, pc + 4);
+
+            iJump(bpc); return;
+        } else {
+            iJump(pc+4); return;
+        }
+    }
+
+    CMPWI(GetHWReg32(_Rs_), 0);
+    BLT_L(b);
+    
+    iBranch(pc+4, 1);
+
+    B_DST(b);
+    
+    MapConst(31, pc + 4);
+
+    iBranch(bpc, 0);
+    pc+=4;
+}
+
+static void recBGEZAL() {
+// Branch if Rs >= 0
+    u32 bpc = _Imm_ * 4 + pc;
+    u32 *b;
+
+    if (IsConst(_Rs_)) {
+        if ((s32)iRegs[_Rs_].k >= 0) {
+            MapConst(31, pc + 4);
+
+            iJump(bpc); return;
+        } else {
+            iJump(pc+4); return;
+        }
+    }
+
+    CMPWI(GetHWReg32(_Rs_), 0);
+    BGE_L(b);
+    
+    iBranch(pc+4, 1);
+
+    B_DST(b);
+    
+    MapConst(31, pc + 4);
+
+    iBranch(bpc, 0);
+    pc+=4;
+}
+
+static void recJ() {
+// j target
+
+	iJump(_Target_ * 4 + (pc & 0xf0000000));
+}
+
+static void recJAL() {
+// jal target
+	MapConst(31, pc + 4);
+
+	iJump(_Target_ * 4 + (pc & 0xf0000000));
+}
+
+static void recJR() {
+// jr Rs
+
+	if (IsConst(_Rs_)) {
+		iJump(iRegs[_Rs_].k);
+		//LIW(PutHWRegSpecial(TARGET), iRegs[_Rs_].k);
+	} else {
+		MR(PutHWRegSpecial(TARGET), GetHWReg32(_Rs_));
+		SetBranch();
+	}
+}
+
+static void recJALR() {
+// jalr Rs
+
+	if (_Rd_) {
+		MapConst(_Rd_, pc + 4);
+	}
+	
+	if (IsConst(_Rs_)) {
+		iJump(iRegs[_Rs_].k);
+		//LIW(PutHWRegSpecial(TARGET), iRegs[_Rs_].k);
+	} else {
+		MR(PutHWRegSpecial(TARGET), GetHWReg32(_Rs_));
+		SetBranch();
+	}
+}
+
+static void recBEQ() {
+// Branch if Rs == Rt
+	u32 bpc = _Imm_ * 4 + pc;
+	u32 *b;
+
+	if (_Rs_ == _Rt_) {
+		iJump(bpc);
+	}
+	else {
+		if (IsConst(_Rs_) && IsConst(_Rt_)) {
+			if (iRegs[_Rs_].k == iRegs[_Rt_].k) {
+				iJump(bpc); return;
+			} else {
+				iJump(pc+4); return;
+			}
+		}
+		else if (IsConst(_Rs_) && !IsMapped(_Rs_)) {
+			if ((iRegs[_Rs_].k & 0xffff) == iRegs[_Rs_].k) {
+				CMPLWI(GetHWReg32(_Rt_), iRegs[_Rs_].k);
+			}
+			else if ((s32)(s16)iRegs[_Rs_].k == (s32)iRegs[_Rs_].k) {
+				CMPWI(GetHWReg32(_Rt_), iRegs[_Rs_].k);
+			}
+			else {
+				CMPLW(GetHWReg32(_Rs_), GetHWReg32(_Rt_));
+			}
+		}
+		else if (IsConst(_Rt_) && !IsMapped(_Rt_)) {
+			if ((iRegs[_Rt_].k & 0xffff) == iRegs[_Rt_].k) {
+				CMPLWI(GetHWReg32(_Rs_), iRegs[_Rt_].k);
+			}
+			else if ((s32)(s16)iRegs[_Rt_].k == (s32)iRegs[_Rt_].k) {
+				CMPWI(GetHWReg32(_Rs_), iRegs[_Rt_].k);
+			}
+			else {
+				CMPLW(GetHWReg32(_Rs_), GetHWReg32(_Rt_));
+			}
+		}
+		else {
+			CMPLW(GetHWReg32(_Rs_), GetHWReg32(_Rt_));
+		}
+		
+		BEQ_L(b);
+		
+		iBranch(pc+4, 1);
+	
+		B_DST(b);
+		
+		iBranch(bpc, 0);
+		pc+=4;
+	}
+}
+
+static void recBNE() {
+// Branch if Rs != Rt
+	u32 bpc = _Imm_ * 4 + pc;
+	u32 *b;
+
+	if (_Rs_ == _Rt_) {
+		iJump(pc+4);
+	}
+	else {
+		if (IsConst(_Rs_) && IsConst(_Rt_)) {
+			if (iRegs[_Rs_].k != iRegs[_Rt_].k) {
+				iJump(bpc); return;
+			} else {
+				iJump(pc+4); return;
+			}
+		}
+		else if (IsConst(_Rs_) && !IsMapped(_Rs_)) {
+			if ((iRegs[_Rs_].k & 0xffff) == iRegs[_Rs_].k) {
+				CMPLWI(GetHWReg32(_Rt_), iRegs[_Rs_].k);
+			}
+			else if ((s32)(s16)iRegs[_Rs_].k == (s32)iRegs[_Rs_].k) {
+				CMPWI(GetHWReg32(_Rt_), iRegs[_Rs_].k);
+			}
+			else {
+				CMPLW(GetHWReg32(_Rs_), GetHWReg32(_Rt_));
+			}
+		}
+		else if (IsConst(_Rt_) && !IsMapped(_Rt_)) {
+			if ((iRegs[_Rt_].k & 0xffff) == iRegs[_Rt_].k) {
+				CMPLWI(GetHWReg32(_Rs_), iRegs[_Rt_].k);
+			}
+			else if ((s32)(s16)iRegs[_Rt_].k == (s32)iRegs[_Rt_].k) {
+				CMPWI(GetHWReg32(_Rs_), iRegs[_Rt_].k);
+			}
+			else {
+				CMPLW(GetHWReg32(_Rs_), GetHWReg32(_Rt_));
+			}
+		}
+		else {
+			CMPLW(GetHWReg32(_Rs_), GetHWReg32(_Rt_));
+		}
+		
+		BNE_L(b);
+		
+		iBranch(pc+4, 1);
+	
+		B_DST(b);
+		
+		iBranch(bpc, 0);
+		pc+=4;
+	}
+}
+
+static void recBLEZ() {
+// Branch if Rs <= 0
+	u32 bpc = _Imm_ * 4 + pc;
+	u32 *b;
+
+	if (IsConst(_Rs_)) {
+		if ((s32)iRegs[_Rs_].k <= 0) {
+			iJump(bpc); return;
+		} else {
+			iJump(pc+4); return;
+		}
+	}
+
+	CMPWI(GetHWReg32(_Rs_), 0);
+	BLE_L(b);
+	
+	iBranch(pc+4, 1);
+
+	B_DST(b);
+	
+	iBranch(bpc, 0);
+	pc+=4;
+}
+
+static void recBGEZ() {
+// Branch if Rs >= 0
+	u32 bpc = _Imm_ * 4 + pc;
+	u32 *b;
+
+	if (IsConst(_Rs_)) {
+		if ((s32)iRegs[_Rs_].k >= 0) {
+			iJump(bpc); return;
+		} else {
+			iJump(pc+4); return;
+		}
+	}
+
+	CMPWI(GetHWReg32(_Rs_), 0);
+	BGE_L(b);
+	
+	iBranch(pc+4, 1);
+
+	B_DST(b);
+	
+	iBranch(bpc, 0);
+	pc+=4;
+}
+#endif
+
+#if 1
+//REC_FUNC(MFC0);
+//REC_SYS(MTC0);
+//REC_FUNC(CFC0);
+//REC_SYS(CTC0);
+REC_FUNC(RFE);
+//#else
+static void recMFC0() {
+// Rt = Cop0->Rd
+	if (!_Rt_) return;
+	
+	LWZ(PutHWReg32(_Rt_), OFFSET(&psxRegs, &psxRegs.CP0.r[_Rd_]), GetHWRegSpecial(PSXREGS));
+}
+
+static void recCFC0() {
+// Rt = Cop0->Rd
+
+	recMFC0();
+}
+
+static void recMTC0() {
+// Cop0->Rd = Rt
+
+	/*if (IsConst(_Rt_)) {
+		switch (_Rd_) {
+			case 12:
+				MOV32ItoM((u32)&psxRegs.CP0.r[_Rd_], iRegs[_Rt_].k);
+				break;
+			case 13:
+				MOV32ItoM((u32)&psxRegs.CP0.r[_Rd_], iRegs[_Rt_].k & ~(0xfc00));
+				break;
+			default:
+				MOV32ItoM((u32)&psxRegs.CP0.r[_Rd_], iRegs[_Rt_].k);
+				break;
+		}
+	} else*/ {
+		switch (_Rd_) {
+			case 13:
+				RLWINM(0,GetHWReg32(_Rt_),0,22,15); // & ~(0xfc00)
+				STW(0, OFFSET(&psxRegs, &psxRegs.CP0.r[_Rd_]), GetHWRegSpecial(PSXREGS));
+				break;
+			default:
+				STW(GetHWReg32(_Rt_), OFFSET(&psxRegs, &psxRegs.CP0.r[_Rd_]), GetHWRegSpecial(PSXREGS));
+				break;
+		}
+	}
+
+	if (_Rd_ == 12 || _Rd_ == 13) {
+		iFlushRegs(0);
+		LIW(PutHWRegSpecial(PSXPC), (u32)pc);
+		FlushAllHWReg();
+		CALLFunc((u32)psxTestSWInts);
+		if(_Rd_ == 12) {
+		  LWZ(0, OFFSET(&psxRegs, &psxRegs.interrupt), GetHWRegSpecial(PSXREGS));
+		  ORIS(0, 0, 0x8000);
+		  STW(0, OFFSET(&psxRegs, &psxRegs.interrupt), GetHWRegSpecial(PSXREGS));
+		}
+		branch = 2;
+		iRet();
+	}
+}
+
+static void recCTC0() {
+// Cop0->Rd = Rt
+
+	recMTC0();
+}
+#else
+static void recRFE() {
+	// TODO: implement multiple temp registers or cop0 registers
+	RLWINM(t1,Status,0,0,27);
+	RLWINM(Status,Status,30,28,31);
+	OR(Status,t1,Status);
+	
+	MOV32MtoR(EAX, (u32)&psxRegs.CP0.n.Status);
+	MOV32RtoR(ECX, EAX);
+	AND32ItoR(EAX, 0xfffffff0);
+	AND32ItoR(ECX, 0x3c);
+	SHR32ItoR(ECX, 2);
+	OR32RtoR (EAX, ECX);
+	MOV32RtoM((u32)&psxRegs.CP0.n.Status, EAX);
+	CALLFunc((u32)psxExceptionTest);
+}
+#endif
+
+#if 0
+#define CP2_FUNC(f) \
+void gte##f(); \
+static void rec##f() { \
+	iFlushRegs(0); \
+	LIW(0, (u32)psxRegs.code); \
+	STW(0, OFFSET(&psxRegs, &psxRegs.code), GetHWRegSpecial(PSXREGS)); \
+	FlushAllHWReg(); \
+	CALLFunc ((u32)gte##f); \
+}
+CP2_FUNC(LWC2);
+CP2_FUNC(SWC2);
+
+#else
+#include "pGte.h"
+#endif
+//
+
+static void recHLE() {
+	iFlushRegs(0);
+	FlushAllHWReg();
+	
+	if ((psxRegs.code & 0x3ffffff) == (psxRegs.code & 0x7)) {
+		CALLFunc((u32)psxHLEt[psxRegs.code & 0x7]);
+	} else {
+		// somebody else must have written to current opcode for this to happen!!!!
+		CALLFunc((u32)psxHLEt[0]); // call dummy function
+	}
+	
+	count = (idlecyclecount + (pc - pcold) / 4 + 20) * BIAS;
+	ADDI(PutHWRegSpecial(CYCLECOUNT), GetHWRegSpecial(CYCLECOUNT), count);
+	FlushAllHWReg();
+	CALLFunc((u32)psxBranchTest);
+	Return();
+	
+	branch = 2;
+}
+
+//
+
+static void (*recBSC[64])() = {
+	recSPECIAL, recREGIMM, recJ   , recJAL  , recBEQ , recBNE , recBLEZ, recBGTZ,
+	recADDI   , recADDIU , recSLTI, recSLTIU, recANDI, recORI , recXORI, recLUI ,
+	recCOP0   , recNULL  , recCOP2, recNULL , recNULL, recNULL, recNULL, recNULL,
+	recNULL   , recNULL  , recNULL, recNULL , recNULL, recNULL, recNULL, recNULL,
+	recLB     , recLH    , recLWL , recLW   , recLBU , recLHU , recLWR , recNULL,
+	recSB     , recSH    , recSWL , recSW   , recNULL, recNULL, recSWR , recNULL,
+	recNULL   , recNULL  , recLWC2, recNULL , recNULL, recNULL, recNULL, recNULL,
+	recNULL   , recNULL  , recSWC2, recHLE  , recNULL, recNULL, recNULL, recNULL
+};
+
+static void (*recSPC[64])() = {
+	recSLL , recNULL, recSRL , recSRA , recSLLV   , recNULL , recSRLV, recSRAV,
+	recJR  , recJALR, recNULL, recNULL, recSYSCALL, recBREAK, recNULL, recNULL,
+	recMFHI, recMTHI, recMFLO, recMTLO, recNULL   , recNULL , recNULL, recNULL,
+	recMULT, recMULTU, recDIV, recDIVU, recNULL   , recNULL , recNULL, recNULL,
+	recADD , recADDU, recSUB , recSUBU, recAND    , recOR   , recXOR , recNOR ,
+	recNULL, recNULL, recSLT , recSLTU, recNULL   , recNULL , recNULL, recNULL,
+	recNULL, recNULL, recNULL, recNULL, recNULL   , recNULL , recNULL, recNULL,
+	recNULL, recNULL, recNULL, recNULL, recNULL   , recNULL , recNULL, recNULL
+};
+
+static void (*recREG[32])() = {
+	recBLTZ  , recBGEZ  , recNULL, recNULL, recNULL, recNULL, recNULL, recNULL,
+	recNULL  , recNULL  , recNULL, recNULL, recNULL, recNULL, recNULL, recNULL,
+	recBLTZAL, recBGEZAL, recNULL, recNULL, recNULL, recNULL, recNULL, recNULL,
+	recNULL  , recNULL  , recNULL, recNULL, recNULL, recNULL, recNULL, recNULL
+};
+
+static void (*recCP0[32])() = {
+	recMFC0, recNULL, recCFC0, recNULL, recMTC0, recNULL, recCTC0, recNULL,
+	recNULL, recNULL, recNULL, recNULL, recNULL, recNULL, recNULL, recNULL,
+	recRFE , recNULL, recNULL, recNULL, recNULL, recNULL, recNULL, recNULL,
+	recNULL, recNULL, recNULL, recNULL, recNULL, recNULL, recNULL, recNULL
+};
+
+static void (*recCP2[64])() = {
+	recBASIC, recRTPS , recNULL , recNULL, recNULL, recNULL , recNCLIP, recNULL, // 00
+	recNULL , recNULL , recNULL , recNULL, recOP  , recNULL , recNULL , recNULL, // 08
+	recDPCS , recINTPL, recMVMVA, recNCDS, recCDP , recNULL , recNCDT , recNULL, // 10
+	recNULL , recNULL , recNULL , recNCCS, recCC  , recNULL , recNCS  , recNULL, // 18
+	recNCT  , recNULL , recNULL , recNULL, recNULL, recNULL , recNULL , recNULL, // 20
+	recSQR  , recDCPL , recDPCT , recNULL, recNULL, recAVSZ3, recAVSZ4, recNULL, // 28 
+	recRTPT , recNULL , recNULL , recNULL, recNULL, recNULL , recNULL , recNULL, // 30
+	recNULL , recNULL , recNULL , recNULL, recNULL, recGPF  , recGPL  , recNCCT  // 38
+};
+
+static void (*recCP2BSC[32])() = {
+	recMFC2, recNULL, recCFC2, recNULL, recMTC2, recNULL, recCTC2, recNULL,
+	recNULL, recNULL, recNULL, recNULL, recNULL, recNULL, recNULL, recNULL,
+	recNULL, recNULL, recNULL, recNULL, recNULL, recNULL, recNULL, recNULL,
+	recNULL, recNULL, recNULL, recNULL, recNULL, recNULL, recNULL, recNULL
+};
+
+static void recRecompile() {
+	//static int recCount = 0;
+	char *p;
+	u32 *ptr;
+	int i;
+	
+	cop2readypc = 0;
+	idlecyclecount = 0;
+
+	// initialize state variables
+	UniqueRegAlloc = 1;
+	HWRegUseCount = 0;
+	DstCPUReg = -1;
+	memset(HWRegisters, 0, sizeof(HWRegisters));
+	for (i=0; i<NUM_HW_REGISTERS; i++)
+		HWRegisters[i].code = cpuHWRegisters[NUM_HW_REGISTERS-i-1];
+	
+	// reserve the special psxReg register
+	HWRegisters[0].usage = HWUSAGE_SPECIAL | HWUSAGE_RESERVED | HWUSAGE_HARDWIRED;
+	HWRegisters[0].private = PSXREGS;
+	HWRegisters[0].k = (u32)&psxRegs;
+
+	HWRegisters[1].usage = HWUSAGE_SPECIAL | HWUSAGE_RESERVED | HWUSAGE_HARDWIRED;
+	HWRegisters[1].private = PSXMEM;
+	HWRegisters[1].k = (u32)&psxM;
+
+	// reserve the special psxRegs.cycle register
+	//HWRegisters[1].usage = HWUSAGE_SPECIAL | HWUSAGE_RESERVED | HWUSAGE_HARDWIRED;
+	//HWRegisters[1].private = CYCLECOUNT;
+	
+	//memset(iRegs, 0, sizeof(iRegs));
+	for (i=0; i<NUM_REGISTERS; i++) {
+		iRegs[i].state = ST_UNK;
+		iRegs[i].reg = -1;
+	}
+	iRegs[0].k = 0;
+	iRegs[0].state = ST_CONST;
+	
+	/* if ppcPtr reached the mem limit reset whole mem */
+	if (((u32)ppcPtr - (u32)recMem) >= (RECMEM_SIZE - 0x10000))
+		recReset();
+
+	ppcAlign(/*32*/4);
+	ptr = ppcPtr;
+	
+	// give us write access
+	//mprotect(recMem, RECMEM_SIZE, PROT_EXEC|PROT_READ|PROT_WRITE);
+	
+	// tell the LUT where to find us
+	PC_REC32(psxRegs.pc) = (u32)ppcPtr;
+
+	pcold = pc = psxRegs.pc;
+	
+	//SysPrintf("RecCount: %i\n", recCount++);
+	
+	for (count=0; count<500;) {
+		p = (char *)PSXM(pc);
+		if (p == NULL) recError();
+		psxRegs.code = SWAP32(*(u32 *)p);
+/*
+		if ((psxRegs.code >> 26) == 0x23) { // LW
+			int i;
+			u32 code;
+
+			for (i=1;; i++) {
+				p = (char *)PSXM(pc+i*4);
+				if (p == NULL) recError();
+				code = *(u32 *)p;
+
+				if ((code >> 26) != 0x23 ||
+					_fRs_(code)  != _Rs_ ||
+					_fImm_(code) != (_Imm_+i*4))
+					break;
+			}
+			if (i > 1) {
+				recLWBlock(i);
+				pc = pc + i*4; continue;
+			}
+		}
+
+		if ((psxRegs.code >> 26) == 0x2b) { // SW
+			int i;
+			u32 code;
+
+			for (i=1;; i++) {
+				p = (char *)PSXM(pc+i*4);
+				if (p == NULL) recError();
+				code = *(u32 *)p;
+
+				if ((code >> 26) != 0x2b ||
+					_fRs_(code)  != _Rs_ ||
+					_fImm_(code) != (_Imm_+i*4))
+					break;
+			}
+			if (i > 1) {
+				recSWBlock(i);
+				pc = pc + i*4; continue;
+			}
+		}*/
+
+		pc+=4; count++;
+//		iFlushRegs(0); // test
+		recBSC[psxRegs.code>>26]();
+
+		if (branch) {
+			branch = 0;
+			//if (dump) iDumpBlock(ptr);
+			goto done;
+		}
+	}
+
+	iFlushRegs(pc);
+	
+	LIW(PutHWRegSpecial(PSXPC), pc);
+
+	iRet();
+
+done:;
+#if 0
+	MakeDataExecutable(ptr, ((u8*)ppcPtr)-((u8*)ptr));
+#else
+	u32 a = (u32)(u8*)ptr;
+	while(a < (u32)(u8*)ppcPtr) {
+	  __asm__ __volatile__("icbi 0,%0" : : "r" (a));
+	  __asm__ __volatile__("dcbst 0,%0" : : "r" (a));
+	  a += 4;
+	}
+	__asm__ __volatile__("sync");
+	__asm__ __volatile__("isync");
+#endif
+	
+#if 1
+	sprintf((char *)ppcPtr, "PC=%08x", pcold);
+	ppcPtr += strlen((char *)ppcPtr);
+#endif
+
+	//mprotect(recMem, RECMEM_SIZE, PROT_EXEC|PROT_READ/*|PROT_WRITE*/);
+}
+
+
+R3000Acpu psxRec = {
+	recInit,
+	recReset,
+	recExecute,
+	recExecuteBlock,
+	recClear,
+	recShutdown
+};
+
diff --git a/libpcsxcore/ppc/pasm.s b/libpcsxcore/ppc/pasm.s
new file mode 100644
index 0000000..96891b4
--- /dev/null
+++ b/libpcsxcore/ppc/pasm.s
@@ -0,0 +1,124 @@
+
+
+#define OLD_REGISTER_OFFSET	(19*4)
+#define SP_SIZE			(OLD_REGISTER_OFFSET+4+8)
+
+/*asm void recRun(register void (*func)(), register u32 hw1, register u32 hw2)*/
+        .text
+        .align  4
+        .globl  recRun
+recRun:
+	/* prologue code */
+	mflr	r0
+	stmw	r13, -(32-13)*4(r1)
+	stw		r0, 4(r1)
+	stwu	r1, -((32-13)*4+8)(r1)
+	
+	/* execute code */
+	mtctr	r3
+	mr	r31, r4
+	mr	r30, r5
+	bctrl
+/*
+}
+asm void returnPC()
+{*/
+        .text
+        .align  4
+        .globl  returnPC
+returnPC:
+	// end code
+	lwz		r0, (32-13)*4+8+4(r1)
+	addi	r1, r1, (32-13)*4+8
+	mtlr	r0
+	lmw		r13, -(32-13)*4(r1)
+	blr
+//}*/
+
+// Memory functions that only works with a linear memory
+
+        .text
+        .align  4
+        .globl  dynMemRead8
+dynMemRead8:
+// assumes that memory pointer is in r30
+	addis    r2,r3,-0x1f80
+	srwi.     r4,r2,16
+	bne+     .norm8
+	cmplwi   r2,0x1000
+	blt-     .norm8
+	b        psxHwRead8
+.norm8:
+	clrlwi   r5,r3,3
+	lbzx     r3,r5,r30
+	blr
+
+        .text
+        .align  4
+        .globl  dynMemRead16
+dynMemRead16:
+// assumes that memory pointer is in r30
+	addis    r2,r3,-0x1f80
+	srwi.     r4,r2,16
+	bne+     .norm16
+	cmplwi   r2,0x1000
+	blt-     .norm16
+	b        psxHwRead16
+.norm16:
+	clrlwi   r5,r3,3
+	lhbrx    r3,r5,r30
+	blr
+
+        .text
+        .align  4
+        .globl  dynMemRead32
+dynMemRead32:
+// assumes that memory pointer is in r30
+	addis    r2,r3,-0x1f80
+	srwi.     r4,r2,16
+	bne+     .norm32
+	cmplwi   r2,0x1000
+	blt-     .norm32
+	b        psxHwRead32
+.norm32:
+	clrlwi   r5,r3,3
+	lwbrx    r3,r5,r30
+	blr
+
+/*
+	N P Z
+	0 0 0 X
+-	0 0 1 X
+	1 0 0 X
+	1 0 1 X
+
+P | (!N & Z)
+P | !(N | !Z)
+*/
+
+        .text
+        .align  4
+        .globl  dynMemWrite32
+dynMemWrite32:
+// assumes that memory pointer is in r30
+	addis    r2,r3,-0x1f80
+	srwi.    r5,r2,16
+	bne+     .normw32
+	cmplwi   r2,0x1000
+	blt      .normw32
+	b        psxHwWrite32
+.normw32:
+	mtcrf    0xFF, r3
+	clrlwi   r5,r3,3
+	crandc   0, 2, 0
+	cror     2, 1, 0
+	bne+     .okw32
+	// write test
+	li			r2,0x0130
+	addis    r2,r2,0xfffe
+	cmplw    r3,r2
+	bnelr
+.okw32:
+	stwbrx   r4,r5,r30
+	blr
+
diff --git a/libpcsxcore/ppc/ppc.c b/libpcsxcore/ppc/ppc.c
new file mode 100644
index 0000000..efaf8b6
--- /dev/null
+++ b/libpcsxcore/ppc/ppc.c
@@ -0,0 +1,32 @@
+/*
+ * ix86 core v0.5.1
+ *  Authors: linuzappz <linuzappz@pcsx.net>
+ *           alexey silinov
+ */
+
+#include <stdio.h>
+#include <string.h>
+
+#include "ppc.h"
+
+// General Purpose hardware registers
+int cpuHWRegisters[NUM_HW_REGISTERS] = {
+    3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 
+    21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31
+};
+
+u32 *ppcPtr;
+
+void ppcInit() {
+}
+void ppcSetPtr(u32 *ptr) {
+	ppcPtr = ptr;
+}
+void ppcAlign(int bytes) {
+	// forward align
+	ppcPtr = (u32*)(((u32)ppcPtr + bytes) & ~(bytes - 1));
+}
+
+void ppcShutdown() {
+}
+
diff --git a/libpcsxcore/ppc/ppc.h b/libpcsxcore/ppc/ppc.h
new file mode 100644
index 0000000..a6134d4
--- /dev/null
+++ b/libpcsxcore/ppc/ppc.h
@@ -0,0 +1,60 @@
+/*
+ * ppc definitions v0.5.1
+ *  Authors: linuzappz <linuzappz@pcsx.net>
+ *           alexey silinov
+ */
+
+#ifndef __PPC_H__
+#define __PPC_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// include basic types
+#include "../psxcommon.h"
+#include "ppc_mnemonics.h"
+
+#define NUM_HW_REGISTERS 29
+
+/* general defines */
+#define write8(val)  *(u8 *)ppcPtr = val; ppcPtr++;
+#define write16(val) *(u16*)ppcPtr = val; ppcPtr+=2;
+#define write32(val) *(u32*)ppcPtr = val; ppcPtr+=4;
+#define write64(val) *(u64*)ppcPtr = val; ppcPtr+=8;
+
+#define CALLFunc(FUNC) \
+{ \
+    u32 _func = (FUNC); \
+    ReleaseArgs(); \
+    if ((_func & 0x1fffffc) == _func) { \
+        BLA(_func); \
+    } else { \
+        LIW(0, _func); \
+        MTCTR(0); \
+        BCTRL(); \
+    } \
+}
+
+extern int cpuHWRegisters[NUM_HW_REGISTERS];
+
+extern u32 *ppcPtr;
+extern u8  *j8Ptr[32];
+extern u32 *j32Ptr[32];
+
+void ppcInit();
+void ppcSetPtr(u32 *ptr);
+void ppcShutdown();
+
+void ppcAlign(int bytes);
+void returnPC();
+void recRun(void (*func)(), u32 hw1, u32 hw2);
+u8 dynMemRead8(u32 mem);
+u16 dynMemRead16(u32 mem);
+u32 dynMemRead32(u32 mem);
+void dynMemWrite32(u32 mem, u32 val);
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/libpcsxcore/ppc/ppc_mnemonics.h b/libpcsxcore/ppc/ppc_mnemonics.h
new file mode 100644
index 0000000..3cc6525
--- /dev/null
+++ b/libpcsxcore/ppc/ppc_mnemonics.h
@@ -0,0 +1,529 @@
+// ppc_mnemonics.h
+
+#define INSTR		(*(ppcPtr)++)
+
+/* Link register related */
+#define MFLR(REG) \
+	{int _reg = (REG); \
+        INSTR = (0x7C0802A6 | (_reg << 21));}
+
+#define MTLR(REG) \
+	{int _reg = (REG); \
+        INSTR = (0x7C0803A6 | (_reg << 21));}
+
+#define MTCTR(REG) \
+	{int _reg = (REG); \
+        INSTR = (0x7C0903A6 | (_reg << 21));}
+
+#define BLR() \
+	{INSTR = (0x4E800020);}
+
+#define BGTLR() \
+	{INSTR = (0x4D810020);}
+
+
+/* Load ops */
+#define LI(REG, IMM) \
+	{int _reg = (REG); \
+        INSTR = (0x38000000 | (_reg << 21) | ((IMM) & 0xffff));}
+
+#define LIS(REG_DST, IMM) \
+	{int _dst = (REG_DST); \
+        INSTR = (0x3C000000 | (_dst << 21) | ((IMM) & 0xffff));}
+
+#define LWZ(REG_DST, OFFSET, REG) \
+	{int _reg = (REG); int _dst=(REG_DST); \
+        INSTR = (0x80000000 | (_dst << 21) | (_reg << 16) | ((OFFSET) & 0xffff));}
+
+#define LWZX(REG_DST, REG, REG_OFF) \
+	{int _reg = (REG), _off = (REG_OFF); int _dst=(REG_DST); \
+        INSTR = (0x7C00002E | (_dst << 21) | (_reg << 16) | (_off << 11));}
+
+#define LWBRX(REG_DST, REG, REG_OFF) \
+	{int _reg = (REG), _off = (REG_OFF); int _dst=(REG_DST); \
+        INSTR = (0x7C00042C | (_dst << 21) | (_reg << 16) | (_off << 11));}
+
+#define LHZ(REG_DST, OFFSET, REG) \
+	{int _reg = (REG); int _dst=(REG_DST); \
+        INSTR = (0xA0000000 | (_dst << 21) | (_reg << 16) | ((OFFSET) & 0xffff));}
+
+#define LHA(REG_DST, OFFSET, REG) \
+	{int _reg = (REG); int _dst=(REG_DST); \
+        INSTR = (0xA8000000 | (_dst << 21) | (_reg << 16) | ((OFFSET) & 0xffff));}
+
+#define LHBRX(REG_DST, REG, REG_OFF) \
+	{int _reg = (REG), _off = (REG_OFF); int _dst=(REG_DST); \
+        INSTR = (0x7C00062C | (_dst << 21) | (_reg << 16) | (_off << 11));}
+
+#define LBZ(REG_DST, OFFSET, REG) \
+	{int _reg = (REG); int _dst=(REG_DST); \
+        INSTR = (0x88000000 | (_dst << 21) | (_reg << 16) | ((OFFSET) & 0xffff));}
+
+#define LMW(REG_DST, OFFSET, REG) \
+	{int _reg = (REG); int _dst=(REG_DST); \
+        INSTR = (0xB8000000 | (_dst << 21) | (_reg << 16) | ((OFFSET) & 0xffff));}
+
+
+
+/* Store ops */
+#define STMW(REG_SRC, OFFSET, REG) \
+	{int _reg = (REG), _src=(REG_SRC); \
+        INSTR = (0xBC000000 | (_src << 21) | (_reg << 16) | ((OFFSET) & 0xffff));}
+
+#define STW(REG_SRC, OFFSET, REG) \
+	{int _reg = (REG), _src=(REG_SRC); \
+        INSTR = (0x90000000 | (_src << 21) | (_reg << 16) | ((OFFSET) & 0xffff));}
+
+#define STWBRX(REG_SRC, REG, REG_OFF) \
+	{int _reg = (REG), _src=(REG_SRC), _off = (REG_OFF); \
+        INSTR = (0x7C00052C | (_src << 21) | (_reg << 16) | (_off << 11));}
+
+#define STH(REG_SRC, OFFSET, REG) \
+	{int _reg = (REG), _src=(REG_SRC); \
+        INSTR = (0xB0000000 | (_src << 21) | (_reg << 16) | ((OFFSET) & 0xffff));}
+
+#define STHBRX(REG_SRC, REG, REG_OFF) \
+	{int _reg = (REG), _src=(REG_SRC), _off = (REG_OFF); \
+        INSTR = (0x7C00072C | (_src << 21) | (_reg << 16) | (_off << 11));}
+
+#define STB(REG_SRC, OFFSET, REG) \
+	{int _reg = (REG), _src=(REG_SRC); \
+        INSTR = (0x98000000 | (_src << 21) | (_reg << 16) | ((OFFSET) & 0xffff));}
+
+#define STWU(REG_SRC, OFFSET, REG) \
+	{int _reg = (REG), _src=(REG_SRC); \
+        INSTR = (0x94000000 | (_src << 21) | (_reg << 16) | ((OFFSET) & 0xffff));}
+
+
+/* Arithmic ops */
+#define ADDI(REG_DST, REG_SRC, IMM) \
+	{int _src = (REG_SRC); int _dst=(REG_DST); \
+        INSTR = (0x38000000 | (_dst << 21) | (_src << 16) | ((IMM) & 0xffff));}
+
+#define ADDIS(REG_DST, REG_SRC, IMM) \
+	{int _src = (REG_SRC); int _dst=(REG_DST); \
+        INSTR = (0x3C000000 | (_dst << 21) | (_src << 16) | ((IMM) & 0xffff));}
+
+#define MR(REG_DST, REG_SRC) \
+	{int __src = (REG_SRC); int __dst=(REG_DST); \
+        if (__src != __dst) {ADDI(__dst, __src, 0)}}
+
+#define ADD(REG_DST, REG1, REG2) \
+	{int _reg1 = (REG1), _reg2 = (REG2); int _dst=(REG_DST); \
+        INSTR = (0x7C000214 | (_dst << 21) | (_reg1 << 16) |  (_reg2 << 11));}
+
+#define ADDO(REG_DST, REG1, REG2) \
+	{int _reg1 = (REG1), _reg2 = (REG2); int _dst=(REG_DST); \
+        INSTR = (0x7C000614 | (_dst << 21) | (_reg1 << 16) |  (_reg2 << 11));}
+
+#define ADDEO(REG_DST, REG1, REG2) \
+	{int _reg1 = (REG1), _reg2 = (REG2); int _dst=(REG_DST); \
+        INSTR = (0x7C000514 | (_dst << 21) | (_reg1 << 16) |  (_reg2 << 11));}
+
+#define ADDE(REG_DST, REG1, REG2) \
+	{int _reg1 = (REG1), _reg2 = (REG2); int _dst=(REG_DST); \
+        INSTR = (0x7C000114 | (_dst << 21) | (_reg1 << 16) |  (_reg2 << 11));}
+
+#define ADDCO(REG_DST, REG1, REG2) \
+	{int _reg1 = (REG1), _reg2 = (REG2); int _dst=(REG_DST); \
+        INSTR = (0x7C000414 | (_dst << 21) | (_reg1 << 16) |  (_reg2 << 11));}
+
+#define ADDIC(REG_DST, REG_SRC, IMM) \
+	{int _src = (REG_SRC); int _dst=(REG_DST); \
+        INSTR = (0x30000000 | (_dst << 21) | (_src << 16) | ((IMM) & 0xffff));}
+
+#define ADDIC_(REG_DST, REG_SRC, IMM) \
+	{int _src = (REG_SRC); int _dst=(REG_DST); \
+        INSTR = (0x34000000 | (_dst << 21) | (_src << 16) | ((IMM) & 0xffff));}
+
+#define ADDZE(REG_DST, REG_SRC) \
+	{int _src = (REG_SRC); int _dst=(REG_DST); \
+        INSTR = (0x7C000194 | (_dst << 21) | (_src << 16));}
+
+#define SUBF(REG_DST, REG1, REG2) \
+	{int _reg1 = (REG1), _reg2 = (REG2); int _dst=(REG_DST); \
+        INSTR = (0x7C000050 | (_dst << 21) | (_reg1 << 16) |  (_reg2 << 11));}
+
+#define SUBFO(REG_DST, REG1, REG2) \
+	{int _reg1 = (REG1), _reg2 = (REG2); int _dst=(REG_DST); \
+        INSTR = (0x7C000450 | (_dst << 21) | (_reg1 << 16) |  (_reg2 << 11));}
+
+#define SUBFC(REG_DST, REG1, REG2) \
+	{int _reg1 = (REG1), _reg2 = (REG2); int _dst=(REG_DST); \
+        INSTR = (0x7C000010 | (_dst << 21) | (_reg1 << 16) |  (_reg2 << 11));}
+
+#define SUBFE(REG_DST, REG1, REG2) \
+	{int _reg1 = (REG1), _reg2 = (REG2); int _dst=(REG_DST); \
+        INSTR = (0x7C000110 | (_dst << 21) | (_reg1 << 16) |  (_reg2 << 11));}
+
+#define SUBFCO(REG_DST, REG1, REG2) \
+	{int _reg1 = (REG1), _reg2 = (REG2); int _dst=(REG_DST); \
+        INSTR = (0x7C000410 | (_dst << 21) | (_reg1 << 16) |  (_reg2 << 11));}
+
+#define SUBFCO_(REG_DST, REG1, REG2) \
+	{int _reg1 = (REG1), _reg2 = (REG2); int _dst=(REG_DST); \
+        INSTR = (0x7C000411 | (_dst << 21) | (_reg1 << 16) |  (_reg2 << 11));}
+
+#define SUB(REG_DST, REG1, REG2) \
+	{SUBF(REG_DST, REG2, REG1)}
+
+#define SUBO(REG_DST, REG1, REG2) \
+	{SUBFO(REG_DST, REG2, REG1)}
+
+#define SUBCO(REG_DST, REG1, REG2) \
+	{SUBFCO(REG_DST, REG2, REG1)}
+
+#define SUBCO_(REG_DST, REG1, REG2) \
+	{SUBFCO_(REG_DST, REG2, REG1)}
+
+#define SRAWI(REG_DST, REG_SRC, SHIFT) \
+	{int _src = (REG_SRC); int _dst=(REG_DST); \
+        INSTR = (0x7C000670 | (_src << 21) | (_dst << 16) | (SHIFT << 11));}
+
+#define MULHW(REG_DST, REG1, REG2) \
+	{int _reg1 = (REG1), _reg2 = (REG2); int _dst=(REG_DST); \
+        INSTR = (0x7C000096 | (_dst << 21) | (_reg1 << 16) |  (_reg2 << 11));}
+
+#define MULLW(REG_DST, REG1, REG2) \
+	{int _reg1 = (REG1), _reg2 = (REG2); int _dst=(REG_DST); \
+        INSTR = (0x7C0001D6 | (_dst << 21) | (_reg1 << 16) |  (_reg2 << 11));}
+
+#define MULHWU(REG_DST, REG1, REG2) \
+	{int _reg1 = (REG1), _reg2 = (REG2); int _dst=(REG_DST); \
+        INSTR = (0x7C000016 | (_dst << 21) | (_reg1 << 16) |  (_reg2 << 11));}
+
+#define MULLI(REG_DST, REG_SRC, IMM) \
+	{int _src = (REG_SRC); int _dst=(REG_DST); \
+        INSTR = (0x1C000000 | (_dst << 21) | (_src << 16) | ((IMM) & 0xffff));}
+
+#define DIVW(REG_DST, REG1, REG2) \
+	{int _reg1 = (REG1), _reg2 = (REG2); int _dst=(REG_DST); \
+        INSTR = (0x7C0003D6 | (_dst << 21) | (_reg1 << 16) |  (_reg2 << 11));}
+
+#define DIVWU(REG_DST, REG1, REG2) \
+	{int _reg1 = (REG1), _reg2 = (REG2); int _dst=(REG_DST); \
+        INSTR = (0x7C000396 | (_dst << 21) | (_reg1 << 16) |  (_reg2 << 11));}
+
+
+/* Branch ops */
+#define B_FROM(VAR) VAR = ppcPtr
+#define B_DST(VAR) *VAR = *VAR | (((s16)((u32)ppcPtr - (u32)VAR)) & 0xfffc)
+
+#define B(DST) \
+	{INSTR = (0x48000000 | (((s32)(((DST)+1)<<2)) & 0x3fffffc));}
+
+#define B_L(VAR) \
+	{B_FROM(VAR); INSTR = (0x48000000);}
+
+#define BA(DST) \
+	{INSTR = (0x48000002 | ((s32)((DST) & 0x3fffffc)));}
+
+#define BLA(DST) \
+	{INSTR = (0x48000003 | ((s32)((DST) & 0x3fffffc)));}
+
+#define BNS(DST) \
+	{INSTR = (0x40830000 | (((s16)(((DST)+1)<<2)) & 0xfffc));}
+
+#define BNE(DST) \
+	{INSTR = (0x40820000 | (((s16)(((DST)+1)<<2)) & 0xfffc));}
+
+#define BNE_L(VAR) \
+	{B_FROM(VAR); INSTR = (0x40820000);}
+
+#define BEQ(DST) \
+	{INSTR = (0x41820000 | (((s16)(((DST)+1)<<2)) & 0xfffc));}
+
+#define BEQ_L(VAR) \
+	{B_FROM(VAR); INSTR = (0x41820000);}
+
+#define BLT(DST) \
+	{INSTR = (0x41800000 | (((s16)(((DST)+1)<<2)) & 0xfffc));}
+
+#define BLT_L(VAR) \
+	{B_FROM(VAR); INSTR = (0x41800000);}
+
+#define BGT(DST) \
+	{INSTR = (0x41810000 | (((s16)(((DST)+1)<<2)) & 0xfffc));}
+
+#define BGT_L(VAR) \
+	{B_FROM(VAR); INSTR = (0x41810000);}
+
+#define BGE(DST) \
+	{INSTR = (0x40800000 | (((s16)(((DST)+1)<<2)) & 0xfffc));}
+
+#define BGE_L(VAR) \
+	{B_FROM(VAR); INSTR = (0x40800000);}
+
+#define BLE(DST) \
+	{INSTR = (0x40810000 | (((s16)(((DST)+1)<<2)) & 0xfffc));}
+
+#define BLE_L(VAR) \
+	{B_FROM(VAR); INSTR = (0x40810000);}
+
+#define BCTRL() \
+	{INSTR = (0x4E800421);}
+
+#define BCTR() \
+	{INSTR = (0x4E800420);}
+
+
+/* compare ops */
+#define CMPLWI(REG, IMM) \
+	{int _reg = (REG); \
+        INSTR = (0x28000000 | (_reg << 16) | ((IMM) & 0xffff));}
+
+#define CMPLWI2(REG, IMM) \
+	{int _reg = (REG); \
+        INSTR = (0x29000000 | (_reg << 16) | ((IMM) & 0xffff));}
+
+#define CMPLWI7(REG, IMM) \
+	{int _reg = (REG); \
+        INSTR = (0x2B800000 | (_reg << 16) | ((IMM) & 0xffff));}
+
+#define CMPLW(REG1, REG2) \
+	{int _reg1 = (REG1), _reg2 = (REG2); \
+        INSTR = (0x7C000040 | (_reg1 << 16) | (_reg2 << 11));}
+
+#define CMPLW1(REG1, REG2) \
+	{int _reg1 = (REG1), _reg2 = (REG2); \
+        INSTR = (0x7C800040 | (_reg1 << 16) | (_reg2 << 11));}
+
+#define CMPLW2(REG1, REG2) \
+	{int _reg1 = (REG1), _reg2 = (REG2); \
+        INSTR = (0x7D000040 | (_reg1 << 16) | (_reg2 << 11));}
+
+#define CMPW(REG1, REG2) \
+	{int _reg1 = (REG1), _reg2 = (REG2); \
+        INSTR = (0x7C000000 | (_reg1 << 16) | (_reg2 << 11));}
+
+#define CMPW1(REG1, REG2) \
+	{int _reg1 = (REG1), _reg2 = (REG2); \
+        INSTR = (0x7C800000 | (_reg1 << 16) | (_reg2 << 11));}
+
+#define CMPW2(REG1, REG2) \
+	{int _reg1 = (REG1), _reg2 = (REG2); \
+        INSTR = (0x7D000000 | (_reg1 << 16) | (_reg2 << 11));}
+
+#define CMPWI(REG, IMM) \
+	{int _reg = (REG); \
+        INSTR = (0x2C000000 | (_reg << 16) | ((IMM) & 0xffff));}
+
+#define CMPWI2(REG, IMM) \
+	{int _reg = (REG); \
+        INSTR = (0x2D000000 | (_reg << 16) | ((IMM) & 0xffff));}
+
+#define MTCRF(MASK, REG) \
+	{int _reg = (REG); \
+        INSTR = (0x7C000120 | (_reg << 21) | (((MASK)&0xff)<<12));}
+
+#define MFCR(REG) \
+	{int _reg = (REG); \
+        INSTR = (0x7C000026 | (_reg << 21));}
+
+#define CROR(CR_DST, CR1, CR2) \
+	{INSTR = (0x4C000382 | ((CR_DST) << 21) | ((CR1) << 16) |  ((CR2) << 11));}
+
+#define CRXOR(CR_DST, CR1, CR2) \
+	{INSTR = (0x4C000182 | ((CR_DST) << 21) | ((CR1) << 16) |  ((CR2) << 11));}
+
+#define CRNAND(CR_DST, CR1, CR2) \
+	{INSTR = (0x4C0001C2 | ((CR_DST) << 21) | ((CR1) << 16) |  ((CR2) << 11));}
+
+#define CRANDC(CR_DST, CR1, CR2) \
+	{INSTR = (0x4C000102 | ((CR_DST) << 21) | ((CR1) << 16) |  ((CR2) << 11));}
+
+
+/* shift ops */
+#define RLWINM(REG_DST, REG_SRC, SHIFT, START, END) \
+	{int _src = (REG_SRC); int _dst = (REG_DST); \
+        INSTR = (0x54000000 | (_src << 21) | (_dst << 16) | (SHIFT << 11) | (START << 6) | (END << 1));}
+
+#define RLWINM_(REG_DST, REG_SRC, SHIFT, START, END) \
+	{int _src = (REG_SRC); int _dst = (REG_DST); \
+        INSTR = (0x54000001 | (_src << 21) | (_dst << 16) | (SHIFT << 11) | (START << 6) | (END << 1));}
+
+#define CLRRWI(REG_DST, REG_SRC, LEN) \
+	RLWINM(REG_DST, REG_SRC, 0, 0, 31-LEN)
+
+#define SLWI(REG_DST, REG_SRC, SHIFT) \
+	{int _shift = (SHIFT); \
+        if (_shift==0) {MR(REG_DST, REG_SRC)} else \
+        {RLWINM(REG_DST, REG_SRC, _shift, 0, 31-_shift)}}
+
+#define SRWI(REG_DST, REG_SRC, SHIFT) \
+	{int _shift = (SHIFT); \
+        if (_shift==0) {MR(REG_DST, REG_SRC)} else \
+        RLWINM(REG_DST, REG_SRC, 32-_shift, _shift, 31)}
+
+#define SLW(REG_DST, REG_SRC, REG_SHIFT) \
+	{int _src = (REG_SRC), _shift = (REG_SHIFT); int _dst = (REG_DST); \
+        INSTR = (0x7C000030 | (_src << 21) | (_dst << 16) | (_shift << 11));}
+
+#define SRW(REG_DST, REG_SRC, REG_SHIFT) \
+	{int _src = (REG_SRC), _shift = (REG_SHIFT); int _dst = (REG_DST); \
+        INSTR = (0x7C000430 | (_src << 21) | (_dst << 16) | (_shift << 11));}
+
+#define SRAW(REG_DST, REG_SRC, REG_SHIFT) \
+	{int _src = (REG_SRC), _shift = (REG_SHIFT); int _dst = (REG_DST); \
+        INSTR = (0x7C000630 | (_src << 21) | (_dst << 16) | (_shift << 11));}
+
+#define SRAWI(REG_DST, REG_SRC, SHIFT) \
+	{int _src = (REG_SRC); int _dst = (REG_DST); int _shift = (SHIFT); \
+        if (_shift==0) {MR(REG_DST, REG_SRC)} else \
+        INSTR = (0x7C000670 | (_src << 21) | (_dst << 16) | (_shift << 11));}
+
+#define RLWNM(REG_DST, REG_SRC, REG_SHIFT, START, END) \
+	{int _src = (REG_SRC), _shift = (REG_SHIFT); int _dst = (REG_DST); \
+        INSTR = (0x5C000000 | (_src << 21) | (_dst << 16) | (_shift << 11) | (START << 6) | (END << 1));}
+
+/* other ops */
+#define ORI(REG_DST, REG_SRC, IMM) \
+	{int _src = (REG_SRC), _imm = (IMM); int _dst = (REG_DST); \
+        if (!((_imm == 0) && ((_src^_dst) == 0))) \
+        INSTR = (0x60000000 | (_src << 21) | (_dst << 16) | (_imm & 0xffff));}
+
+#define ORIS(REG_DST, REG_SRC, IMM) \
+	{int _src = (REG_SRC), _imm = (IMM); int _dst = (REG_DST); \
+        if (!((_imm == 0) && ((_src^_dst) == 0))) \
+        INSTR = (0x64000000 | (_src << 21) | (_dst << 16) | (_imm & 0xffff));}
+
+#define OR(REG_DST, REG1, REG2) \
+	{int _reg1 = (REG1), _reg2 = (REG2); int _dst=(REG_DST); \
+        INSTR = (0x7C000378 | (_reg1 << 21) | (_dst << 16) | (_reg2 << 11));}
+
+#define OR_(REG_DST, REG1, REG2) \
+	{int _reg1 = (REG1), _reg2 = (REG2); int _dst=(REG_DST); \
+        INSTR = (0x7C000379 | (_reg1 << 21) | (_dst << 16) | (_reg2 << 11));}
+
+#define XORI(REG_DST, REG_SRC, IMM) \
+	{int _src = (REG_SRC); int _dst=(REG_DST); \
+        INSTR = (0x68000000 | (_src << 21) | (_dst << 16) | ((IMM) & 0xffff));}
+
+#define XOR(REG_DST, REG1, REG2) \
+	{int _reg1 = (REG1), _reg2 = (REG2); int _dst=(REG_DST); \
+        INSTR = (0x7C000278 | (_reg1 << 21) | (_dst << 16) | (_reg2 << 11));}
+
+#define XOR_(REG_DST, REG1, REG2) \
+	{int _reg1 = (REG1), _reg2 = (REG2); int _dst=(REG_DST); \
+        INSTR = (0x7C000279 | (_reg1 << 21) | (_dst << 16) | (_reg2 << 11));}
+
+#define ANDI_(REG_DST, REG_SRC, IMM) \
+	{int _src = (REG_SRC); int _dst=(REG_DST); \
+        INSTR = (0x70000000 | (_src << 21) | (_dst << 16) | ((IMM) & 0xffff));}
+
+#define AND(REG_DST, REG1, REG2) \
+	{int _reg1 = (REG1), _reg2 = (REG2); int _dst=(REG_DST); \
+        INSTR = (0x7C000038 | (_reg1 << 21) | (_dst << 16) | (_reg2 << 11));}
+
+#define NOR(REG_DST, REG1, REG2) \
+	{int _reg1 = (REG1), _reg2 = (REG2); int _dst=(REG_DST); \
+        INSTR = (0x7C0000f8 | (_reg1 << 21) | (_dst << 16) | (_reg2 << 11));}
+
+#define NEG(REG_DST, REG_SRC) \
+	{int _src = (REG_SRC); int _dst=(REG_DST); \
+        INSTR = (0x7C0000D0 | (_dst << 21) | (_src << 16));}
+
+#define NOP() \
+	{INSTR = 0x60000000;}
+
+#define MCRXR(CR_DST) \
+	{INSTR = (0x7C000400 | (CR_DST << 23));}
+
+#define EXTSB(REG_DST, REG_SRC) \
+	{int _src = (REG_SRC); int _dst=(REG_DST); \
+        INSTR = (0x7C000774 | (_src << 21) | (_dst << 16));}
+
+#define EXTSH(REG_DST, REG_SRC) \
+	{int _src = (REG_SRC); int _dst=(REG_DST); \
+        INSTR = (0x7C000734 | (_src << 21) | (_dst << 16));}
+
+
+/* floating point ops */
+#define FDIVS(FPR_DST, FPR1, FPR2) \
+	{INSTR = (0xEC000024 | (FPR_DST << 21) | (FPR1 << 16) | (FPR2 << 11));}
+
+#define FDIV(FPR_DST, FPR1, FPR2) \
+	{INSTR = (0xFC000024 | (FPR_DST << 21) | (FPR1 << 16) | (FPR2 << 11));}
+
+#define FMULS(FPR_DST, FPR1, FPR2) \
+	{INSTR = (0xEC000032 | (FPR_DST << 21) | (FPR1 << 16) | (FPR2 << 11));}
+
+#define FMUL(FPR_DST, FPR1, FPR2) \
+	{INSTR = (0xFC000032 | (FPR_DST << 21) | (FPR1 << 16) | (FPR2 << 11));}
+
+#define FADDS(FPR_DST, FPR1, FPR2) \
+	{INSTR = (0xEC00002A | (FPR_DST << 21) | (FPR1 << 16) | (FPR2 << 11));}
+
+#define FADD(FPR_DST, FPR1, FPR2) \
+	{INSTR = (0xFC00002A | (FPR_DST << 21) | (FPR1 << 16) | (FPR2 << 11));}
+
+#define FRSP(FPR_DST, FPR_SRC) \
+	{INSTR = (0xFC000018 | (FPR_DST << 21) | (FPR_SRC << 11));}
+
+#define FCTIW(FPR_DST, FPR_SRC) \
+	{INSTR = (0xFC00001C | (FPR_DST << 21) | (FPR_SRC << 11));}
+
+
+#define LFS(FPR_DST, OFFSET, REG) \
+	{INSTR = (0xC0000000 | (FPR_DST << 21) | (REG << 16) | ((OFFSET) & 0xffff));}
+
+#define STFS(FPR_DST, OFFSET, REG) \
+	{INSTR = (0xD0000000 | (FPR_DST << 21) | (REG << 16) | ((OFFSET) & 0xffff));}
+
+#define LFD(FPR_DST, OFFSET, REG) \
+	{INSTR = (0xC8000000 | (FPR_DST << 21) | (REG << 16) | ((OFFSET) & 0xffff));}
+
+#define STFD(FPR_DST, OFFSET, REG) \
+	{INSTR = (0xD8000000 | (FPR_DST << 21) | (REG << 16) | ((OFFSET) & 0xffff));}
+
+
+
+/* extra combined opcodes */
+#if 1
+#define LIW(REG, IMM) /* Load Immidiate Word */ \
+{ \
+	int __reg = (REG); u32 __imm = (u32)(IMM); \
+	if ((s32)__imm == (s32)((s16)__imm)) \
+	{ \
+		LI(__reg, (s32)((s16)__imm)); \
+	} else if (__reg == 0) { \
+		LIS(__reg, (((u32)__imm)>>16)); \
+		if ((((u32)__imm) & 0xffff) != 0) \
+		{ \
+			ORI(__reg, __reg, __imm); \
+		} \
+	} else { \
+		if ((((u32)__imm) & 0xffff) == 0) { \
+			LIS(__reg, (((u32)__imm)>>16)); \
+		} else { \
+			LI(__reg, __imm); \
+			if ((__imm & 0x8000) == 0) { \
+				ADDIS(__reg, __reg, ((u32)__imm)>>16); \
+			} else { \
+				ADDIS(__reg, __reg, ((((u32)__imm)>>16) & 0xffff) + 1); \
+			} \
+		} \
+		/*if ((((u32)__imm) & 0xffff) != 0) \
+		{ \
+			ORI(__reg, __reg, __imm); \
+		}*/ \
+	} \
+}
+#else
+#define LIW(REG, IMM) /* Load Immidiate Word */ \
+{ \
+        int __reg = (REG); u32 __imm = (u32)(IMM); \
+	if ((s32)__imm == (s32)((s16)__imm)) \
+	{ \
+		LI(__reg, (s32)((s16)__imm)); \
+	} \
+	else \
+	{ \
+		LIS(__reg, (((u32)__imm)>>16)); \
+		if ((((u32)__imm) & 0xffff) != 0) \
+		{ \
+			ORI(__reg, __reg, __imm); \
+		} \
+	} \
+}
+#endif
diff --git a/libpcsxcore/ppc/reguse.c b/libpcsxcore/ppc/reguse.c
new file mode 100644
index 0000000..47d70a5
--- /dev/null
+++ b/libpcsxcore/ppc/reguse.c
@@ -0,0 +1,419 @@
+
+#include "../psxcommon.h"
+#include "reguse.h"
+
+#include "../r3000a.h"
+
+//#define SAME_CYCLE_MODE
+
+static const int useBSC[64] = {
+	/*recSPECIAL*/ REGUSE_SUB | REGUSE_SPECIAL,
+        /*recREGIMM*/ REGUSE_SUB | REGUSE_REGIMM,
+        /*recJ*/     REGUSE_JUMP, 
+        /*recJAL*/   REGUSE_JUMP | REGUSE_R31_W, 
+        /*recBEQ*/   REGUSE_BRANCH | REGUSE_RS_R | REGUSE_RT_R, 
+        /*recBNE*/   REGUSE_BRANCH | REGUSE_RS_R | REGUSE_RT_R, 
+        /*recBLEZ*/  REGUSE_BRANCH | REGUSE_RS_R, 
+        /*recBGTZ*/  REGUSE_BRANCH | REGUSE_RS_R,
+	/*recADDI*/  REGUSE_ACC | REGUSE_RS_R | REGUSE_RT_W, 
+        /*recADDIU*/ REGUSE_ACC | REGUSE_RS_R | REGUSE_RT_W, 
+        /*recSLTI*/  REGUSE_ACC | REGUSE_RS_R | REGUSE_RT_W, 
+        /*recSLTIU*/ REGUSE_ACC | REGUSE_RS_R | REGUSE_RT_W, 
+        /*recANDI*/  REGUSE_LOGIC | REGUSE_RS_R | REGUSE_RT_W, 
+        /*recORI*/   REGUSE_LOGIC | REGUSE_RS_R | REGUSE_RT_W, 
+        /*recXORI*/  REGUSE_LOGIC | REGUSE_RS_R | REGUSE_RT_W, 
+        /*recLUI*/   REGUSE_ACC | REGUSE_RT_W,
+	/*recCOP0*/  REGUSE_SUB | REGUSE_COP0, 
+        REGUSE_NONE, 
+        /*recCOP2*/  REGUSE_SUB | REGUSE_COP2, 
+        REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE,
+	REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, 
+        REGUSE_NONE, REGUSE_NONE, REGUSE_NONE,
+	/*recLB*/    REGUSE_MEM_R | REGUSE_RS_R | REGUSE_RT_W, 
+        /*recLH*/    REGUSE_MEM_R | REGUSE_RS_R | REGUSE_RT_W, 
+        /*recLWL*/   REGUSE_MEM_R | REGUSE_RS_R | REGUSE_RT, 
+        /*recLW*/    REGUSE_MEM_R | REGUSE_RS_R | REGUSE_RT_W, 
+        /*recLBU*/   REGUSE_MEM_R | REGUSE_RS_R | REGUSE_RT_W, 
+        /*recLHU*/   REGUSE_MEM_R | REGUSE_RS_R | REGUSE_RT_W, 
+        /*recLWR*/   REGUSE_MEM_R | REGUSE_RS_R | REGUSE_RT, 
+        REGUSE_NONE,
+	/*recSB*/    REGUSE_MEM_W | REGUSE_RS_R | REGUSE_RT_R, 
+        /*recSH*/    REGUSE_MEM_W | REGUSE_RS_R | REGUSE_RT_R, 
+        /*recSWL*/   REGUSE_MEM | REGUSE_RS_R | REGUSE_RT_R, 
+        /*recSW*/    REGUSE_MEM_W | REGUSE_RS_R | REGUSE_RT_R, 
+        REGUSE_NONE, REGUSE_NONE, 
+        /*recSWR*/   REGUSE_MEM | REGUSE_RS_R | REGUSE_RT_R, 
+        REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, 
+        /*recLWC2*/  REGUSE_MEM_R | REGUSE_RS_R | REGUSE_COP2_RT_W, 
+        REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE,
+	REGUSE_NONE, REGUSE_NONE, 
+        /*recSWC2*/  REGUSE_MEM_W | REGUSE_RS_R | REGUSE_COP2_RT_R, 
+        /*recHLE*/   REGUSE_UNKNOWN, // TODO: can this be done in a better way
+        REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE
+};
+
+static const int useSPC[64] = {
+	/*recSLL*/   REGUSE_ACC | REGUSE_RT_R | REGUSE_RD_W, 
+        REGUSE_NONE, 
+        /*recSRL*/   REGUSE_ACC | REGUSE_RT_R | REGUSE_RD_W, 
+        /*recSRA*/   REGUSE_ACC | REGUSE_RT_R | REGUSE_RD_W, 
+        /*recSLLV*/  REGUSE_ACC | REGUSE_RS_R | REGUSE_RT_R | REGUSE_RD_W, 
+        REGUSE_NONE, 
+        /*recSRLV*/  REGUSE_ACC | REGUSE_RS_R | REGUSE_RT_R | REGUSE_RD_W, 
+        /*recSRAV*/  REGUSE_ACC | REGUSE_RS_R | REGUSE_RT_R | REGUSE_RD_W,
+	/*recJR*/    REGUSE_JUMPR | REGUSE_RS_R, 
+        /*recJALR*/  REGUSE_JUMPR | REGUSE_RS_R | REGUSE_RD_W, 
+        REGUSE_NONE, REGUSE_NONE, 
+        /*rSYSCALL*/ REGUSE_SYS | REGUSE_PC | REGUSE_COP0_STATUS | REGUSE_EXCEPTION,
+        /*recBREAK*/ REGUSE_NONE, 
+        REGUSE_NONE, REGUSE_NONE,
+	/*recMFHI*/  REGUSE_LOGIC | REGUSE_RD_W | REGUSE_HI_R, 
+        /*recMTHI*/  REGUSE_LOGIC | REGUSE_RS_R | REGUSE_HI_W, 
+        /*recMFLO*/  REGUSE_LOGIC | REGUSE_RD_W | REGUSE_LO_R, 
+        /*recMTLO*/  REGUSE_LOGIC | REGUSE_RS_R | REGUSE_LO_W, 
+        REGUSE_NONE, REGUSE_NONE , REGUSE_NONE, REGUSE_NONE,
+	/*recMULT*/  REGUSE_MULT | REGUSE_RS_R | REGUSE_RT_R | REGUSE_LO_W | REGUSE_HI_W, 
+        /*recMULTU*/ REGUSE_MULT | REGUSE_RS_R | REGUSE_RT_R | REGUSE_LO_W | REGUSE_HI_W, 
+        /*recDIV*/   REGUSE_MULT | REGUSE_RS_R | REGUSE_RT_R | REGUSE_LO_W | REGUSE_HI_W, 
+        /*recDIVU*/  REGUSE_MULT | REGUSE_RS_R | REGUSE_RT_R | REGUSE_LO_W | REGUSE_HI_W, 
+        REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE,
+	/*recADD*/   REGUSE_ACC | REGUSE_RS_R | REGUSE_RT_R | REGUSE_RD_W, 
+        /*recADDU*/  REGUSE_ACC | REGUSE_RS_R | REGUSE_RT_R | REGUSE_RD_W, 
+        /*recSUB*/   REGUSE_ACC | REGUSE_RS_R | REGUSE_RT_R | REGUSE_RD_W, 
+        /*recSUBU*/  REGUSE_ACC | REGUSE_RS_R | REGUSE_RT_R | REGUSE_RD_W, 
+        /*recAND*/   REGUSE_LOGIC | REGUSE_RS_R | REGUSE_RT_R | REGUSE_RD_W, 
+        /*recOR*/    REGUSE_LOGIC | REGUSE_RS_R | REGUSE_RT_R | REGUSE_RD_W, 
+        /*recXOR*/   REGUSE_LOGIC | REGUSE_RS_R | REGUSE_RT_R | REGUSE_RD_W, 
+        /*recNOR*/   REGUSE_LOGIC | REGUSE_RS_R | REGUSE_RT_R | REGUSE_RD_W,
+	REGUSE_NONE, REGUSE_NONE, 
+        /*recSLT*/   REGUSE_ACC | REGUSE_RS_R | REGUSE_RT_R | REGUSE_RD_W, 
+        /*recSLTU*/  REGUSE_ACC | REGUSE_RS_R | REGUSE_RT_R | REGUSE_RD_W, 
+        REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, 
+	REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE,
+	REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, 
+        REGUSE_NONE, REGUSE_NONE
+};
+
+static const int useREGIMM[32] = {
+	/*recBLTZ*/  REGUSE_BRANCH | REGUSE_RS_R, 
+        /*recBGEZ*/  REGUSE_BRANCH | REGUSE_RS_R, 
+        REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE,
+	REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, 
+        REGUSE_NONE, REGUSE_NONE,
+	/*recBLTZAL*/REGUSE_BRANCH | REGUSE_RS_R | REGUSE_R31_W, 
+        /*recBGEZAL*/REGUSE_BRANCH | REGUSE_RS_R | REGUSE_R31_W, 
+        REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE,
+	REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, 
+        REGUSE_NONE, REGUSE_NONE
+};
+
+static const int useCP0[32] = {
+	/*recMFC0*/  REGUSE_LOGIC | REGUSE_RT_W | REGUSE_COP0_RD_R, 
+        REGUSE_NONE, 
+        /*recCFC0*/  REGUSE_LOGIC | REGUSE_RT_W | REGUSE_COP0_RD_R, 
+        REGUSE_NONE, 
+        /*recMTC0*/  REGUSE_LOGIC | REGUSE_RT_R | REGUSE_COP0_RD_W, 
+        REGUSE_NONE, 
+        /*recCTC0*/  REGUSE_LOGIC | REGUSE_RT_R | REGUSE_COP0_RD_W, 
+        REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, 
+        REGUSE_NONE, REGUSE_NONE, REGUSE_NONE,
+	/*recRFE*/   REGUSE_LOGIC | REGUSE_COP0_STATUS, 
+        REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, 
+        REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, 
+        REGUSE_NONE, REGUSE_NONE, REGUSE_NONE
+};
+
+// TODO: make more explicit
+static const int useCP2[64] = {
+	/*recBASIC*/ REGUSE_SUB | REGUSE_BASIC, 
+        /*recRTPS*/  REGUSE_GTE, 
+        REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, 
+        /*recNCLIP*/ REGUSE_GTE, 
+        REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, 
+        /*recOP*/    REGUSE_GTE, 
+        REGUSE_NONE, REGUSE_NONE, REGUSE_NONE,
+	/*recDPCS*/  REGUSE_GTE, 
+        /*recINTPL*/ REGUSE_GTE, 
+        /*recMVMVA*/ REGUSE_GTE, 
+        /*recNCDS*/  REGUSE_GTE, 
+        /*recCDP*/   REGUSE_GTE, 
+        REGUSE_NONE, 
+        /*recNCDT*/  REGUSE_GTE, 
+        REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, 
+        /*recNCCS*/  REGUSE_GTE, 
+        /*recCC*/    REGUSE_GTE, 
+        REGUSE_NONE, 
+        /*recNCS*/   REGUSE_GTE, 
+        REGUSE_NONE,
+	/*recNCT*/   REGUSE_GTE, 
+        REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, 
+        REGUSE_NONE,
+	/*recSQR*/   REGUSE_GTE, 
+        /*recDCPL*/  REGUSE_GTE, 
+        /*recDPCT*/  REGUSE_GTE, 
+        REGUSE_NONE, REGUSE_NONE, 
+        /*recAVSZ3*/ REGUSE_GTE, 
+        /*recAVSZ4*/ REGUSE_GTE, 
+        REGUSE_NONE,
+	/*recRTPT*/  REGUSE_GTE, 
+        REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, 
+        REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, REGUSE_NONE, 
+        /*recGPF*/   REGUSE_GTE, 
+        /*recGPL*/   REGUSE_GTE, 
+        /*recNCCT*/  REGUSE_GTE
+};
+
+static const int useCP2BSC[32] = {
+	/*recMFC2*/  REGUSE_LOGIC | REGUSE_RT_W | REGUSE_COP2_RD_R, 
+        REGUSE_NONE, 
+        /*recCFC2*/  REGUSE_LOGIC | REGUSE_RT_W | REGUSE_COP2_RD_R, 
+        REGUSE_NONE, 
+        /*recMTC2*/  REGUSE_LOGIC | REGUSE_RT_R | REGUSE_COP2_RD_W, 
+        REGUSE_NONE, 
+        /*recCTC2*/  REGUSE_LOGIC | REGUSE_RT_R | REGUSE_COP2_RD_W, 
+        REGUSE_NONE,
+	REGUSE_NONE, 
+        REGUSE_NONE, 
+        REGUSE_NONE, 
+        REGUSE_NONE, 
+        REGUSE_NONE, 
+        REGUSE_NONE, 
+        REGUSE_NONE, 
+        REGUSE_NONE,
+	REGUSE_NONE, 
+        REGUSE_NONE, 
+        REGUSE_NONE, 
+        REGUSE_NONE, 
+        REGUSE_NONE, 
+        REGUSE_NONE, 
+        REGUSE_NONE, 
+        REGUSE_NONE,
+	REGUSE_NONE, 
+        REGUSE_NONE, 
+        REGUSE_NONE, 
+        REGUSE_NONE, 
+        REGUSE_NONE, 
+        REGUSE_NONE, 
+        REGUSE_NONE, 
+        REGUSE_NONE
+};
+
+static int getRegUse(u32 code) __attribute__ ((__pure__));
+static int getRegUse(u32 code)
+{
+    int use = useBSC[code>>26];
+    
+    switch (use & REGUSE_SUBMASK) {
+		  case REGUSE_NONE:
+				break;
+        case REGUSE_SPECIAL:
+            use = useSPC[_fFunct_(code)];
+            break;
+        case REGUSE_REGIMM:
+            use = useREGIMM[_fRt_(code)];
+            break;
+        case REGUSE_COP0:
+            use = useCP0[_fRs_(code)];
+            break;
+        case REGUSE_COP2:
+            use = useCP2[_fFunct_(code)];
+            if ((use & REGUSE_SUBMASK) == REGUSE_BASIC)
+                use = useCP2BSC[_fRs_(code)];
+            break;
+		  default:
+				use = REGUSE_UNKNOWN;
+				break;
+    }
+    
+    if ((use & REGUSE_COP0_RD_W)) {
+        if (_fRd_(code) == 12 || _fRd_(code) == 13) {
+            use = REGUSE_UNKNOWN;
+        }
+    }
+    
+    return use;
+}
+
+/* returns how psxreg is used in the code instruction */
+int useOfPsxReg(u32 code, int use, int psxreg)
+{
+    int retval = REGUSE_NONE;
+    
+	 // get use if it wasn't supplied
+    if (-1 == use) use = getRegUse(code);
+    
+	 // if we don't know what the usage is, assume it's read from
+    if (REGUSE_UNKNOWN == use) return REGUSE_READ;
+    
+    if (psxreg < 32) {
+        // check for 3 standard types
+		  if ((use & REGUSE_RT) && _fRt_(code) == (u32)psxreg) {
+            retval |= ((use & REGUSE_RT_R) ? REGUSE_READ:0) | ((use & REGUSE_RT_W) ? REGUSE_WRITE:0);
+        }
+        if ((use & REGUSE_RS) && _fRs_(code) == (u32)psxreg) {
+            retval |= ((use & REGUSE_RS_R) ? REGUSE_READ:0) | ((use & REGUSE_RS_W) ? REGUSE_WRITE:0);
+        }
+        if ((use & REGUSE_RD) && _fRd_(code) == (u32)psxreg) {
+            retval |= ((use & REGUSE_RD_R) ? REGUSE_READ:0) | ((use & REGUSE_RD_W) ? REGUSE_WRITE:0);
+        }
+		  // some instructions explicitly writes to r31
+        if ((use & REGUSE_R31_W) && 31 == psxreg) {
+            retval |= REGUSE_WRITE;
+        }
+    } else if (psxreg == 32) { // Special register LO
+        retval |= ((use & REGUSE_LO_R) ? REGUSE_READ:0) | ((use & REGUSE_LO_W) ? REGUSE_WRITE:0);
+    } else if (psxreg == 33) { // Special register HI
+        retval |= ((use & REGUSE_HI_R) ? REGUSE_READ:0) | ((use & REGUSE_HI_W) ? REGUSE_WRITE:0);
+    }
+    
+    return retval;
+}
+
+//#define NOREGUSE_FOLLOW
+
+static int _nextPsxRegUse(u32 pc, int psxreg, int numInstr) __attribute__ ((__pure__, __unused__));
+static int _nextPsxRegUse(u32 pc, int psxreg, int numInstr)
+{
+    u32 *ptr, code, bPC = 0;
+    int i, use, reguse = 0;
+
+    for (i=0; i<numInstr; ) {
+        // load current instruction
+		  ptr = PSXM(pc);
+		  if (ptr==NULL) {
+				// going nowhere... might as well assume a write, since we will hopefully never reach here
+				reguse = REGUSE_WRITE;
+				break;
+		  }
+		  code = SWAP32(*ptr);
+		  // get usage patterns for instruction
+		  use = getRegUse(code);
+		  // find the use of psxreg in the instruction
+        reguse = useOfPsxReg(code, use, psxreg);
+        
+		  // return if we have found a use
+        if (reguse != REGUSE_NONE)
+				break;
+        
+		  // goto next instruction
+        pc += 4;
+		  i++;
+		  
+		  // check for code branches/jumps
+		  if (i != numInstr) {
+			  if ((use & REGUSE_TYPEM) == REGUSE_BRANCH) {
+#ifndef NOREGUSE_FOLLOW
+					// check delay slot
+					reguse = _nextPsxRegUse(pc, psxreg, 1);
+					if (reguse != REGUSE_NONE) break;
+					
+					bPC = _fImm_(code) * 4 + pc;
+					reguse = _nextPsxRegUse(pc+4, psxreg, (numInstr-i-1)/2);
+					if (reguse != REGUSE_NONE) {
+						int reguse2 = _nextPsxRegUse(bPC, psxreg, (numInstr-i-1)/2);
+						if (reguse2 != REGUSE_NONE)
+							reguse |= reguse2;
+						else
+							reguse = REGUSE_NONE;
+					}
+#endif
+					break;
+			  } else if ((use & REGUSE_TYPEM) == REGUSE_JUMP) {
+#ifndef NOREGUSE_FOLLOW
+					// check delay slot
+					reguse = _nextPsxRegUse(pc, psxreg, 1);
+					if (reguse != REGUSE_NONE) break;
+					
+					bPC = _fTarget_(code) * 4 + (pc & 0xf0000000);
+					reguse = _nextPsxRegUse(bPC, psxreg, numInstr-i-1);
+#endif
+					break;
+			  } else if ((use & REGUSE_TYPEM) == REGUSE_JUMPR) {
+#ifndef NOREGUSE_FOLLOW
+					// jump to unknown location - bail after checking delay slot
+					reguse = _nextPsxRegUse(pc, psxreg, 1);
+#endif
+					break;
+			  } else if ((use & REGUSE_TYPEM) == REGUSE_SYS) {
+					break;
+			  }
+		  }
+    }
+    
+    return reguse;
+}
+
+
+int nextPsxRegUse(u32 pc, int psxreg)
+{
+#if 1
+	if (psxreg == 0)
+		return REGUSE_WRITE; // pretend we are writing to it to fool compiler
+
+#ifdef SAME_CYCLE_MODE
+	return REGUSE_READ;
+#else
+	return _nextPsxRegUse(pc, psxreg, 80);
+#endif
+#else
+    u32 code, bPC = 0;
+    int use, reguse = 0, reguse1 = 0, b = 0, i, index = 0;
+
+retry:
+    for (i=index; i<80; i++) {
+        code = PSXMu32(pc);
+    	use = getRegUse(code);
+        reguse = useOfPsxReg(code, use, psxreg);
+        
+        if (reguse != REGUSE_NONE) break;
+        
+        pc += 4;
+        if ((use & REGUSE_TYPEM) == REGUSE_BRANCH) {
+            if (b == 0) {
+                bPC = _fImm_(code) * 4 + pc;
+                index = i+1;
+            }
+            b += 1; // TODO: follow branches
+            continue;
+        } else if ((use & REGUSE_TYPEM) == REGUSE_JUMP) {
+            if (b == 0) {
+                bPC = _fTarget_(code) * 4 + (pc & 0xf0000000);
+            }
+            b = 2;
+            continue;       
+        } else if ((use & REGUSE_TYPEM) == REGUSE_JUMPR || 
+                   (use & REGUSE_TYPEM) == REGUSE_SYS) {
+            b = 2;
+            continue;       
+        }
+        
+        if (b == 2 && bPC && index == 0) {
+            pc = bPC; bPC = 0;
+            b = 1;
+        }
+        if (b >= 2) break; // only follow 1 branch
+    }
+    if (reguse == REGUSE_NONE) return reguse;
+    
+    if (bPC) {
+        reguse1 = reguse;
+        pc = bPC; bPC = 0;
+        b = 1;
+        goto retry;
+    }
+    
+    return reguse1 | reguse;
+#endif
+}
+
+int isPsxRegUsed(u32 pc, int psxreg)
+{
+    int use = nextPsxRegUse(pc, psxreg);
+    
+    if (use == REGUSE_NONE)
+        return 2; // unknown use - assume it is used
+    else if (use & REGUSE_READ)
+        return 1; // the next use is a read
+    else
+        return 0; // the next use is a write, i.e. current value is not important
+}
diff --git a/libpcsxcore/ppc/reguse.h b/libpcsxcore/ppc/reguse.h
new file mode 100644
index 0000000..de42dec
--- /dev/null
+++ b/libpcsxcore/ppc/reguse.h
@@ -0,0 +1,83 @@
+#ifndef __REGUSE_H__
+#define __REGUSE_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// include basic types
+#include "../psxcommon.h"
+
+#define REGUSE_NONE    0x0000
+#define REGUSE_UNKNOWN 0x0001
+
+//sub functions
+#define REGUSE_SPECIAL 0x0002
+#define REGUSE_REGIMM  0x0004
+#define REGUSE_COP0    0x0006
+#define REGUSE_COP2    0x0008
+#define REGUSE_BASIC   0x000a
+#define REGUSE_SUBMASK 0x000e /* sub function mask */
+
+#define REGUSE_ACC     0x0010 /* accumulator */
+#define REGUSE_LOGIC   0x0020 /* logic operations */
+#define REGUSE_MULT    0x0030 /* multiplier */
+#define REGUSE_JUMP    0x0040 /* jump to dest */
+#define REGUSE_JUMPR   0x0050 /* jump to reg */
+#define REGUSE_BRANCH  0x0060 /* branch */
+#define REGUSE_MEM_R   0x0070 /* read from memory */
+#define REGUSE_MEM_W   0x0080 /* write to memory */
+#define REGUSE_MEM     0x0090 /* read and write to memory */
+#define REGUSE_SYS     0x00a0 /* syscall */
+#define REGUSE_GTE     0x00b0 /* gte operation */
+#define REGUSE_SUB     0x00f0 /* sub usage */
+#define REGUSE_TYPEM   0x00f0 /* type mask */
+
+
+#define REGUSE_RS_R    0x0100
+#define REGUSE_RS_W    0x0200
+#define REGUSE_RS     (REGUSE_RS_R | REGUSE_RS_W)
+#define REGUSE_RT_R    0x0400
+#define REGUSE_RT_W    0x0800
+#define REGUSE_RT     (REGUSE_RT_R | REGUSE_RT_W)
+#define REGUSE_RD_R    0x1000
+#define REGUSE_RD_W    0x2000
+#define REGUSE_RD     (REGUSE_RD_R | REGUSE_RD_W)
+
+#define REGUSE_R31_W   0x4000 /* writes to link register (r31) */
+#define REGUSE_PC      0x8000 /* reads pc */
+
+#define REGUSE_LO_R    0x10000
+#define REGUSE_LO_W    0x20000
+#define REGUSE_LO     (REGUSE_LO_R | REGUSE_LO_W)
+#define REGUSE_HI_R    0x40000
+#define REGUSE_HI_W    0x80000
+#define REGUSE_HI     (REGUSE_HI_R | REGUSE_HI_W)
+
+#define REGUSE_COP0_RD_R    0x100000
+#define REGUSE_COP0_RD_W    0x200000
+#define REGUSE_COP0_RD     (REGUSE_COP0_RD_R | REGUSE_COP0_RD_W)
+#define REGUSE_COP0_STATUS  0x400000
+#define REGUSE_EXCEPTION    0x800000
+
+#define REGUSE_COP2_RT_R    0x1000000
+#define REGUSE_COP2_RT_W    0x2000000
+#define REGUSE_COP2_RT     (REGUSE_COP2_RT_R | REGUSE_COP2_RT_W)
+#define REGUSE_COP2_RD_R    0x4000000
+#define REGUSE_COP2_RD_W    0x8000000
+#define REGUSE_COP2_RD     (REGUSE_COP2_RD_R | REGUSE_COP2_RD_W)
+
+
+// specific register use
+#define REGUSE_READ   1
+#define REGUSE_WRITE  2
+#define REGUSE_RW     3
+
+int useOfPsxReg(u32 code, int use, int psxreg) __attribute__ ((__pure__));;
+int nextPsxRegUse(u32 pc, int psxreg) __attribute__ ((__pure__));;
+int isPsxRegUsed(u32 pc, int psxreg) __attribute__ ((__pure__));;
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/libpcsxcore/ppf.c b/libpcsxcore/ppf.c
new file mode 100644
index 0000000..45c8733
--- /dev/null
+++ b/libpcsxcore/ppf.c
@@ -0,0 +1,332 @@
+/*  PPF Patch Support for PCSX-Reloaded
+ *  Copyright (c) 2009, Wei Mingzhi <whistler_wmz@users.sf.net>.
+ *
+ *  Based on P.E.Op.S CDR Plugin by Pete Bernert.
+ *  Copyright (c) 2002, Pete Bernert.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA
+ */
+
+#include "psxcommon.h"
+#include "ppf.h"
+#include "cdrom.h"
+
+typedef struct tagPPF_DATA {
+	s32					addr;
+	s32					pos;
+	s32					anz;
+	struct tagPPF_DATA	*pNext;
+} PPF_DATA;
+
+typedef struct tagPPF_CACHE {
+	s32					addr;
+	struct tagPPF_DATA	*pNext;
+} PPF_CACHE;
+
+static PPF_CACHE		*ppfCache = NULL;
+static PPF_DATA			*ppfHead = NULL, *ppfLast = NULL;
+static int				iPPFNum = 0;
+
+// using a linked data list, and address array
+static void FillPPFCache() {
+	PPF_DATA		*p;
+	PPF_CACHE		*pc;
+	s32				lastaddr;
+
+	p = ppfHead;
+	lastaddr = -1;
+	iPPFNum = 0;
+
+	while (p != NULL) {
+		if (p->addr != lastaddr) iPPFNum++;
+		lastaddr = p->addr;
+		p = p->pNext;
+	}
+
+	if (iPPFNum <= 0) return;
+
+	pc = ppfCache = (PPF_CACHE *)malloc(iPPFNum * sizeof(PPF_CACHE));
+
+	iPPFNum--;
+	p = ppfHead;
+	lastaddr = -1;
+
+	while (p != NULL) {
+		if (p->addr != lastaddr) {
+			pc->addr = p->addr;
+			pc->pNext = p;
+			pc++;
+		}
+		lastaddr = p->addr;
+		p = p->pNext;
+	}
+}
+
+void FreePPFCache() {
+	PPF_DATA *p = ppfHead;
+	void *pn;
+
+	while (p != NULL) {
+		pn = p->pNext;
+		free(p);
+		p = (PPF_DATA *)pn;
+	}
+	ppfHead = NULL;
+	ppfLast = NULL;
+
+	if (ppfCache != NULL) free(ppfCache);
+	ppfCache = NULL;
+}
+
+void CheckPPFCache(unsigned char *pB, unsigned char m, unsigned char s, unsigned char f) {
+	PPF_CACHE *pcstart, *pcend, *pcpos;
+	int addr = MSF2SECT(btoi(m), btoi(s), btoi(f)), pos, anz, start;
+
+	if (ppfCache == NULL) return;
+
+	pcstart = ppfCache;
+	if (addr < pcstart->addr) return;
+	pcend = ppfCache + iPPFNum;
+	if (addr > pcend->addr) return;
+
+	while (1) {
+		if (addr == pcend->addr) { pcpos = pcend; break; }
+
+		pcpos = pcstart + (pcend - pcstart) / 2;
+		if (pcpos == pcstart) break;
+		if (addr < pcpos->addr) {
+			pcend = pcpos;
+			continue;
+		}
+		if (addr > pcpos->addr) {
+			pcstart = pcpos;
+			continue;
+		}
+		break;
+	}
+
+	if (addr == pcpos->addr) {
+		PPF_DATA *p = pcpos->pNext;
+		while (p != NULL && p->addr == addr) {
+			pos = p->pos - (CD_FRAMESIZE_RAW - DATA_SIZE);
+			anz = p->anz;
+			if (pos < 0) { start = -pos; pos = 0; anz -= start; }
+			else start = 0;
+			memcpy(pB + pos, (unsigned char *)(p + 1) + start, anz);
+			p = p->pNext;
+		}
+	}
+}
+
+static void AddToPPF(s32 ladr, s32 pos, s32 anz, unsigned char *ppfmem) {
+	if (ppfHead == NULL) {
+		ppfHead = (PPF_DATA *)malloc(sizeof(PPF_DATA) + anz);
+		ppfHead->addr = ladr;
+		ppfHead->pNext = NULL;
+		ppfHead->pos = pos;
+		ppfHead->anz = anz;
+		memcpy(ppfHead + 1, ppfmem, anz);
+		iPPFNum = 1;
+		ppfLast = ppfHead;
+	} else {
+		PPF_DATA *p = ppfHead;
+		PPF_DATA *plast = NULL;
+		PPF_DATA *padd;
+
+		if (ladr > ppfLast->addr || (ladr == ppfLast->addr && pos > ppfLast->pos)) {
+			p = NULL;
+			plast = ppfLast;
+		} else {
+			while (p != NULL) {
+				if (ladr < p->addr) break;
+				if (ladr == p->addr) {
+					while (p && ladr == p->addr && pos > p->pos) {
+						plast = p;
+						p = p->pNext;
+					}
+					break;
+				}
+				plast = p;
+				p = p->pNext;
+			}
+		}
+
+		padd = (PPF_DATA *)malloc(sizeof(PPF_DATA) + anz);
+		padd->addr = ladr;
+		padd->pNext = p;
+		padd->pos = pos;
+		padd->anz = anz;
+		memcpy(padd + 1, ppfmem, anz);
+		iPPFNum++;
+		if (plast == NULL) ppfHead = padd;
+		else plast->pNext = padd;
+
+		if (padd->pNext == NULL) ppfLast = padd;
+	}
+}
+
+void BuildPPFCache() {
+	FILE			*ppffile;
+	char			buffer[12];
+	char			method, undo = 0, blockcheck = 0;
+	int				dizlen, dizyn;
+	unsigned char	ppfmem[512];
+	char			szPPF[MAXPATHLEN];
+	int				count, seekpos, pos;
+	u32				anz; // use 32-bit to avoid stupid overflows
+	s32				ladr, off, anx;
+
+	FreePPFCache();
+
+	// Generate filename in the format of SLUS_123.45
+	buffer[0] = toupper(CdromId[0]);
+	buffer[1] = toupper(CdromId[1]);
+	buffer[2] = toupper(CdromId[2]);
+	buffer[3] = toupper(CdromId[3]);
+	buffer[4] = '_';
+	buffer[5] = CdromId[4];
+	buffer[6] = CdromId[5];
+	buffer[7] = CdromId[6];
+	buffer[8] = '.';
+	buffer[9] = CdromId[7];
+	buffer[10] = CdromId[8];
+	buffer[11] = '\0';
+
+	sprintf(szPPF, "%s%s", Config.PatchesDir, buffer);
+
+	ppffile = fopen(szPPF, "rb");
+	if (ppffile == NULL) return;
+
+	memset(buffer, 0, 5);
+	fread(buffer, 3, 1, ppffile);
+
+	if (strcmp(buffer, "PPF") != 0) {
+		SysPrintf(_("Invalid PPF patch: %s.\n"), szPPF);
+		fclose(ppffile);
+		return;
+	}
+
+	fseek(ppffile, 5, SEEK_SET);
+	method = fgetc(ppffile);
+
+	switch (method) {
+		case 0: // ppf1
+			fseek(ppffile, 0, SEEK_END);
+			count = ftell(ppffile);
+			count -= 56;
+			seekpos = 56;
+			break;
+
+		case 1: // ppf2
+			fseek(ppffile, -8, SEEK_END);
+
+			memset(buffer, 0, 5);
+			fread(buffer, 4, 1, ppffile);
+
+			if (strcmp(".DIZ", buffer) != 0) {
+				dizyn = 0;
+			} else {
+				fread(&dizlen, 4, 1, ppffile);
+				dizlen = SWAP32(dizlen);
+				dizyn = 1;
+			}
+
+			fseek(ppffile, 0, SEEK_END);
+			count = ftell(ppffile);
+
+			if (dizyn == 0) {
+				count -= 1084;
+				seekpos = 1084;
+			} else {
+				count -= 1084;
+				count -= 38;
+				count -= dizlen;
+				seekpos = 1084;
+			}
+			break;
+
+		case 2: // ppf3
+			fseek(ppffile, 57, SEEK_SET);
+			blockcheck = fgetc(ppffile);
+			undo = fgetc(ppffile);
+
+			fseek(ppffile, -6, SEEK_END);
+			memset(buffer, 0, 5);
+			fread(buffer, 4, 1, ppffile);
+			dizlen = 0;
+
+			if (strcmp(".DIZ", buffer) == 0) {
+				fseek(ppffile, -2, SEEK_END);
+				fread(&dizlen, 2, 1, ppffile);
+				dizlen = SWAP32(dizlen);
+				dizlen += 36;
+			}
+
+			fseek(ppffile, 0, SEEK_END);
+			count = ftell(ppffile);
+			count -= dizlen;
+
+			if (blockcheck) {
+				seekpos = 1084;
+				count -= 1084;
+			} else {
+				seekpos = 60;
+				count -= 60;
+			}
+			break;
+
+		default:
+			fclose(ppffile);
+			SysPrintf(_("Unsupported PPF version (%d).\n"), method + 1);
+			return;
+	}
+
+	// now do the data reading
+	do {                                                
+		fseek(ppffile, seekpos, SEEK_SET);
+		fread(&pos, 4, 1, ppffile);
+		pos = SWAP32(pos);
+
+		if (method == 2) fread(buffer, 4, 1, ppffile); // skip 4 bytes on ppf3 (no int64 support here)
+
+		anz = fgetc(ppffile);
+		fread(ppfmem, anz, 1, ppffile);   
+
+		ladr = pos / CD_FRAMESIZE_RAW;
+		off = pos % CD_FRAMESIZE_RAW;
+
+		if (off + anz > CD_FRAMESIZE_RAW) {
+			anx = off + anz - CD_FRAMESIZE_RAW;
+			anz -= (unsigned char)anx;
+			AddToPPF(ladr + 1, 0, anx, &ppfmem[anz]);
+		}
+
+		AddToPPF(ladr, off, anz, ppfmem); // add to link list
+
+		if (method == 2) {
+			if (undo) anz += anz;
+			anz += 4;
+		}
+
+		seekpos = seekpos + 5 + anz;
+		count = count - 5 - anz;
+	} while (count != 0); // loop til end
+
+	fclose(ppffile);
+
+	FillPPFCache(); // build address array
+
+	SysPrintf(_("Loaded PPF %d.0 patch: %s.\n"), method + 1, szPPF);
+}
diff --git a/libpcsxcore/ppf.h b/libpcsxcore/ppf.h
new file mode 100644
index 0000000..f578028
--- /dev/null
+++ b/libpcsxcore/ppf.h
@@ -0,0 +1,33 @@
+/*  PPF Patch Support for PCSX-Reloaded
+ *  Copyright (c) 2009, Wei Mingzhi <whistler_wmz@users.sf.net>.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA
+ */
+
+#ifndef __PPF_H__
+#define __PPF_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void BuildPPFCache();
+void FreePPFCache();
+void CheckPPFCache(unsigned char *pB, unsigned char m, unsigned char s, unsigned char f);
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/libpcsxcore/psemu_plugin_defs.h b/libpcsxcore/psemu_plugin_defs.h
new file mode 100644
index 0000000..d1b05ac
--- /dev/null
+++ b/libpcsxcore/psemu_plugin_defs.h
@@ -0,0 +1,285 @@
+#ifndef _PSEMU_PLUGIN_DEFS_H
+#define _PSEMU_PLUGIN_DEFS_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// header version
+#define _PPDK_HEADER_VERSION		3
+
+#define PLUGIN_VERSION				1
+
+// plugin type returned by PSEgetLibType (types can be merged if plugin is multi type!)
+#define PSE_LT_CDR					1
+#define PSE_LT_GPU					2
+#define PSE_LT_SPU					4
+#define PSE_LT_PAD					8
+#define PSE_LT_NET					16
+
+// DLL function return codes
+#define PSE_ERR_SUCCESS				0	// every function in DLL if completed sucessfully should return this value
+#define PSE_ERR_FATAL				-1	// undefined error but fatal one, that kills all functionality
+
+// XXX_Init return values
+// Those return values apply to all libraries
+// currently obsolete - preserved for compatibilty
+
+#define PSE_INIT_ERR_SUCCESS		0	// initialization went OK
+#define PSE_INIT_ERR_NOTCONFIGURED	-2	// this driver is not configured
+#define PSE_INIT_ERR_NOHARDWARE		-3	// this driver can not operate properly on this hardware or hardware is not detected
+
+/*         GPU PlugIn          */
+
+//  GPU_Test return values
+
+// sucess, everything configured, and went OK.
+#define PSE_GPU_ERR_SUCCESS			0
+
+// ERRORS
+// this error might be returned as critical error but none of below
+#define PSE_GPU_ERR					-20
+
+
+// this driver is not configured
+#define PSE_GPU_ERR_NOTCONFIGURED	PSE_GPU_ERR - 1
+// this driver failed Init
+#define PSE_GPU_ERR_INIT			PSE_GPU_ERR - 2
+
+// WARNINGS
+// this warning might be returned as undefined warning but allowing driver to continue
+#define PSE_GPU_WARN				20
+
+//  GPU_Query		- will be implemented soon
+
+typedef struct
+{
+	uint32_t	flags;
+	uint32_t	status;
+ 	void*	window;
+	unsigned char reserved[100];
+} gpuQueryS;
+
+// gpuQueryS.flags
+// if driver can operate in both modes it must support GPU_changeMode();
+#define PSE_GPU_FLAGS_FULLSCREEN		1	// this driver can operate in fullscreen mode
+#define PSE_GPU_FLAGS_WINDOWED			2	// this driver can operate in windowed mode
+
+// gpuQueryS.status
+#define PSE_GPU_STATUS_WINDOWWRONG	1	// this driver cannot operate in this windowed mode
+
+//  GPU_Query	End	- will be implemented in v2
+
+
+/*         CDR PlugIn          */
+
+//	CDR_Test return values
+
+// sucess, everything configured, and went OK.
+#define PSE_CDR_ERR_SUCCESS			0
+
+// general failure (error undefined)
+#define PSE_CDR_ERR_FAILURE			-1
+
+// ERRORS
+#define PSE_CDR_ERR -40
+// this driver is not configured
+#define PSE_CDR_ERR_NOTCONFIGURED	PSE_CDR_ERR - 0
+// if this driver is unable to read data from medium
+#define PSE_CDR_ERR_NOREAD			PSE_CDR_ERR - 1
+
+// WARNINGS
+#define PSE_CDR_WARN 40
+// if this driver emulates lame mode ie. can read only 2048 tracks and sector header is emulated
+// this might happen to CDROMS that do not support RAW mode reading - surelly it will kill many games
+#define PSE_CDR_WARN_LAMECD			PSE_CDR_WARN + 0
+
+
+
+
+/*         SPU PlugIn          */
+
+// some info retricted (now!)
+
+// sucess, everything configured, and went OK.
+#define PSE_SPU_ERR_SUCCESS 0
+
+// ERRORS
+// this error might be returned as critical error but none of below
+#define PSE_SPU_ERR					-60
+
+// this driver is not configured
+#define PSE_SPU_ERR_NOTCONFIGURED	PSE_SPU_ERR - 1
+// this driver failed Init
+#define PSE_SPU_ERR_INIT			PSE_SPU_ERR - 2
+
+
+// WARNINGS
+// this warning might be returned as undefined warning but allowing driver to continue
+#define PSE_SPU_WARN				60
+
+
+
+
+/*         PAD PlugIn          */
+
+/*
+
+  functions that must be exported from PAD Plugin
+
+  long	PADinit(long flags);	// called only once when PSEmu Starts
+  void	PADshutdown(void);		// called when PSEmu exits
+  long	PADopen(PadInitS *);	// called when PSEmu is running program
+  long	PADclose(void);
+  long	PADconfigure(void);
+  void  PADabout(void);
+  long  PADtest(void);			// called from Configure Dialog and after PADopen();
+  long	PADquery(void);
+
+  unsigned char PADstartPoll(int);
+  unsigned char PADpoll(unsigned char);
+
+*/
+
+// PADquery responses (notice - values ORed)
+// PSEmu will use them also in PADinit to tell Plugin which Ports will use
+// notice that PSEmu will call PADinit and PADopen only once when they are from
+// same plugin
+
+// might be used in port 1
+#define PSE_PAD_USE_PORT1			1
+// might be used in port 2
+#define PSE_PAD_USE_PORT2			2
+
+
+
+// MOUSE SCPH-1030
+#define PSE_PAD_TYPE_MOUSE			1
+// NEGCON - 16 button analog controller SLPH-00001
+#define PSE_PAD_TYPE_NEGCON			2
+// GUN CONTROLLER - gun controller SLPH-00014 from Konami
+#define PSE_PAD_TYPE_GUN			3
+// STANDARD PAD SCPH-1080, SCPH-1150
+#define PSE_PAD_TYPE_STANDARD		4
+// ANALOG JOYSTICK SCPH-1110
+#define PSE_PAD_TYPE_ANALOGJOY		5
+// GUNCON - gun controller SLPH-00034 from Namco
+#define PSE_PAD_TYPE_GUNCON			6
+// ANALOG CONTROLLER SCPH-1150
+#define PSE_PAD_TYPE_ANALOGPAD		7
+
+
+// sucess, everything configured, and went OK.
+#define PSE_PAD_ERR_SUCCESS			0
+// general plugin failure (undefined error)
+#define PSE_PAD_ERR_FAILURE			-1
+
+
+// ERRORS
+// this error might be returned as critical error but none of below
+#define PSE_PAD_ERR					-80
+// this driver is not configured
+#define PSE_PAD_ERR_NOTCONFIGURED	PSE_PAD_ERR - 1
+// this driver failed Init
+#define PSE_PAD_ERR_INIT			PSE_PAD_ERR - 2
+
+
+// WARNINGS
+// this warning might be returned as undefined warning but allowing driver to continue
+#define PSE_PAD_WARN				80
+
+
+typedef struct
+{
+	// controler type - fill it withe predefined values above
+	unsigned char controllerType;
+
+	// status of buttons - every controller fills this field
+	unsigned short buttonStatus;
+
+	// for analog pad fill those next 4 bytes
+	// values are analog in range 0-255 where 127 is center position
+	unsigned char rightJoyX, rightJoyY, leftJoyX, leftJoyY;
+
+	// for mouse fill those next 2 bytes
+	// values are in range -128 - 127
+	unsigned char moveX, moveY;
+
+	unsigned char reserved[91];
+
+} PadDataS;
+
+/*         NET PlugIn v2       */
+/* Added by linuzappz@pcsx.net */
+
+/* Modes bits for NETsendData/NETrecvData */
+#define PSE_NET_BLOCKING	0x00000000
+#define PSE_NET_NONBLOCKING	0x00000001
+
+/* note: unsupported fields should be zeroed.
+ 
+typedef struct {
+	char EmuName[32];
+	char CdromID[9];	// ie. 'SCPH12345', no \0 trailing character
+	char CdromLabel[11];
+	void *psxMem;
+	GPUshowScreenPic GPU_showScreenPic;
+	GPUdisplayText GPU_displayText;
+	PADsetSensitive PAD_setSensitive;
+	char GPUpath[256];
+	char SPUpath[256];
+	char CDRpath[256];
+	char MCD1path[256];
+	char MCD2path[256];
+	char BIOSpath[256];	// 'HLE' for internal bios
+	char Unused[1024];
+} netInfo;
+
+*/
+
+/*
+  basic funcs:
+
+   long NETopen(HWND hWnd)
+    opens the connection.
+    shall return 0 on success, else -1.
+    -1 is also returned if the user selects offline mode.
+
+   long NETclose()
+    closes the connection.
+    shall return 0 on success, else -1.
+
+   void NETpause()
+    this is called when the user paused the emulator.
+
+   void NETresume()
+    this is called when the user resumed the emulator.
+
+   long NETqueryPlayer()
+    returns player number
+
+   long NETsendPadData(void *pData, int Size)
+    this should be called for the first pad only on each side.
+
+   long NETrecvPadData(void *pData, int Pad)
+    call this for Pad 1/2 to get the data sent by the above func.
+
+  extended funcs:
+
+   long NETsendData(void *pData, int Size, int Mode)
+    sends Size bytes from pData to the other side.
+
+   long NETrecvData(void *pData, int Size, int Mode)
+    receives Size bytes from pData to the other side.
+
+   void NETsetInfo(netInfo *info);
+    sets the netInfo struct.
+
+   void NETkeypressed(int key) (linux only)
+    key is a XK_?? (X11) keycode.
+*/
+
+#ifdef __cplusplus
+}
+#endif
+#endif // _PSEMU_PLUGIN_DEFS_H
diff --git a/libpcsxcore/psxbios.c b/libpcsxcore/psxbios.c
new file mode 100644
index 0000000..f2751b8
--- /dev/null
+++ b/libpcsxcore/psxbios.c
@@ -0,0 +1,2810 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+/*
+ * Internal simulated HLE BIOS.
+ */
+
+// TODO: implement all system calls, count the exact CPU cycles of system calls.
+
+#include "psxbios.h"
+#include "psxhw.h"
+
+char *biosA0n[256] = {
+// 0x00
+	"open",		"lseek",	"read",		"write",
+	"close",	"ioctl",	"exit",		"sys_a0_07",
+	"getc",		"putc",		"todigit",	"atof",
+	"strtoul",	"strtol",	"abs",		"labs",
+// 0x10
+	"atoi",		"atol",		"atob",		"setjmp",
+	"longjmp",	"strcat",	"strncat",	"strcmp",
+	"strncmp",	"strcpy",	"strncpy",	"strlen",
+	"index",	"rindex",	"strchr",	"strrchr",
+// 0x20
+	"strpbrk",	"strspn",	"strcspn",	"strtok",
+	"strstr",	"toupper",	"tolower",	"bcopy",
+	"bzero",	"bcmp",		"memcpy",	"memset",
+	"memmove",	"memcmp",	"memchr",	"rand",
+// 0x30
+	"srand",	"qsort",	"strtod",	"malloc",
+	"free",		"lsearch",	"bsearch",	"calloc",
+	"realloc",	"InitHeap",	"_exit",	"getchar",
+	"putchar",	"gets",		"puts",		"printf",
+// 0x40
+	"sys_a0_40",		"LoadTest",					"Load",		"Exec",
+	"FlushCache",		"InstallInterruptHandler",	"GPU_dw",	"mem2vram",
+	"SendGPUStatus",	"GPU_cw",					"GPU_cwb",	"SendPackets",
+	"sys_a0_4c",		"GetGPUStatus",				"GPU_sync",	"sys_a0_4f",
+// 0x50
+	"sys_a0_50",		"LoadExec",				"GetSysSp",		"sys_a0_53",
+	"_96_init()",		"_bu_init()",			"_96_remove()",	"sys_a0_57",
+	"sys_a0_58",		"sys_a0_59",			"sys_a0_5a",	"dev_tty_init",
+	"dev_tty_open",		"sys_a0_5d",			"dev_tty_ioctl","dev_cd_open",
+// 0x60
+	"dev_cd_read",		"dev_cd_close",			"dev_cd_firstfile",	"dev_cd_nextfile",
+	"dev_cd_chdir",		"dev_card_open",		"dev_card_read",	"dev_card_write",
+	"dev_card_close",	"dev_card_firstfile",	"dev_card_nextfile","dev_card_erase",
+	"dev_card_undelete","dev_card_format",		"dev_card_rename",	"dev_card_6f",
+// 0x70
+	"_bu_init",			"_96_init",		"_96_remove",		"sys_a0_73",
+	"sys_a0_74",		"sys_a0_75",	"sys_a0_76",		"sys_a0_77",
+	"_96_CdSeekL",		"sys_a0_79",	"sys_a0_7a",		"sys_a0_7b",
+	"_96_CdGetStatus",	"sys_a0_7d",	"_96_CdRead",		"sys_a0_7f",
+// 0x80
+	"sys_a0_80",		"sys_a0_81",	"sys_a0_82",		"sys_a0_83",
+	"sys_a0_84",		"_96_CdStop",	"sys_a0_86",		"sys_a0_87",
+	"sys_a0_88",		"sys_a0_89",	"sys_a0_8a",		"sys_a0_8b",
+	"sys_a0_8c",		"sys_a0_8d",	"sys_a0_8e",		"sys_a0_8f",
+// 0x90
+	"sys_a0_90",		"sys_a0_91",	"sys_a0_92",		"sys_a0_93",
+	"sys_a0_94",		"sys_a0_95",	"AddCDROMDevice",	"AddMemCardDevide",
+	"DisableKernelIORedirection",		"EnableKernelIORedirection", "sys_a0_9a", "sys_a0_9b",
+	"SetConf",			"GetConf",		"sys_a0_9e",		"SetMem",
+// 0xa0
+	"_boot",			"SystemError",	"EnqueueCdIntr",	"DequeueCdIntr",
+	"sys_a0_a4",		"ReadSector",	"get_cd_status",	"bufs_cb_0",
+	"bufs_cb_1",		"bufs_cb_2",	"bufs_cb_3",		"_card_info",
+	"_card_load",		"_card_auto",	"bufs_cd_4",		"sys_a0_af",
+// 0xb0
+	"sys_a0_b0",		"sys_a0_b1",	"do_a_long_jmp",	"sys_a0_b3",
+	"?? sub_function",
+};
+
+char *biosB0n[256] = {
+// 0x00
+	"SysMalloc",		"sys_b0_01",	"sys_b0_02",	"sys_b0_03",
+	"sys_b0_04",		"sys_b0_05",	"sys_b0_06",	"DeliverEvent",
+	"OpenEvent",		"CloseEvent",	"WaitEvent",	"TestEvent",
+	"EnableEvent",		"DisableEvent",	"OpenTh",		"CloseTh",
+// 0x10
+	"ChangeTh",			"sys_b0_11",	"InitPAD",		"StartPAD",
+	"StopPAD",			"PAD_init",		"PAD_dr",		"ReturnFromExecption",
+	"ResetEntryInt",	"HookEntryInt",	"sys_b0_1a",	"sys_b0_1b",
+	"sys_b0_1c",		"sys_b0_1d",	"sys_b0_1e",	"sys_b0_1f",
+// 0x20
+	"UnDeliverEvent",	"sys_b0_21",	"sys_b0_22",	"sys_b0_23",
+	"sys_b0_24",		"sys_b0_25",	"sys_b0_26",	"sys_b0_27",
+	"sys_b0_28",		"sys_b0_29",	"sys_b0_2a",	"sys_b0_2b",
+	"sys_b0_2c",		"sys_b0_2d",	"sys_b0_2e",	"sys_b0_2f",
+// 0x30
+	"sys_b0_30",		"sys_b0_31",	"open",			"lseek",
+	"read",				"write",		"close",		"ioctl",
+	"exit",				"sys_b0_39",	"getc",			"putc",
+	"getchar",			"putchar",		"gets",			"puts",
+// 0x40
+	"cd",				"format",		"firstfile",	"nextfile",
+	"rename",			"delete",		"undelete",		"AddDevice",
+	"RemoteDevice",		"PrintInstalledDevices", "InitCARD", "StartCARD",
+	"StopCARD",			"sys_b0_4d",	"_card_write",	"_card_read",
+// 0x50
+	"_new_card",		"Krom2RawAdd",	"sys_b0_52",	"sys_b0_53",
+	"_get_errno",		"_get_error",	"GetC0Table",	"GetB0Table",
+	"_card_chan",		"sys_b0_59",	"sys_b0_5a",	"ChangeClearPAD",
+	"_card_status",		"_card_wait",
+};
+
+char *biosC0n[256] = {
+// 0x00
+	"InitRCnt",			  "InitException",		"SysEnqIntRP",		"SysDeqIntRP",
+	"get_free_EvCB_slot", "get_free_TCB_slot",	"ExceptionHandler",	"InstallExeptionHandler",
+	"SysInitMemory",	  "SysInitKMem",		"ChangeClearRCnt",	"SystemError",
+	"InitDefInt",		  "sys_c0_0d",			"sys_c0_0e",		"sys_c0_0f",
+// 0x10
+	"sys_c0_10",		  "sys_c0_11",			"InstallDevices",	"FlushStfInOutPut",
+	"sys_c0_14",		  "_cdevinput",			"_cdevscan",		"_circgetc",
+	"_circputc",		  "ioabort",			"sys_c0_1a",		"KernelRedirect",
+	"PatchAOTable",
+};
+
+//#define r0 (psxRegs.GPR.n.r0)
+#define at (psxRegs.GPR.n.at)
+#define v0 (psxRegs.GPR.n.v0)
+#define v1 (psxRegs.GPR.n.v1)
+#define a0 (psxRegs.GPR.n.a0)
+#define a1 (psxRegs.GPR.n.a1)
+#define a2 (psxRegs.GPR.n.a2)
+#define a3 (psxRegs.GPR.n.a3)
+#define t0 (psxRegs.GPR.n.t0)
+#define t1 (psxRegs.GPR.n.t1)
+#define t2 (psxRegs.GPR.n.t2)
+#define t3 (psxRegs.GPR.n.t3)
+#define t4 (psxRegs.GPR.n.t4)
+#define t5 (psxRegs.GPR.n.t5)
+#define t6 (psxRegs.GPR.n.t6)
+#define t7 (psxRegs.GPR.n.t7)
+#define t8 (psxRegs.GPR.n.t8)
+#define t9 (psxRegs.GPR.n.t9)
+#define s0 (psxRegs.GPR.n.s0)
+#define s1 (psxRegs.GPR.n.s1)
+#define s2 (psxRegs.GPR.n.s2)
+#define s3 (psxRegs.GPR.n.s3)
+#define s4 (psxRegs.GPR.n.s4)
+#define s5 (psxRegs.GPR.n.s5)
+#define s6 (psxRegs.GPR.n.s6)
+#define s7 (psxRegs.GPR.n.s7)
+#define k0 (psxRegs.GPR.n.k0)
+#define k1 (psxRegs.GPR.n.k1)
+#define gp (psxRegs.GPR.n.gp)
+#define sp (psxRegs.GPR.n.sp)
+#define fp (psxRegs.GPR.n.s8)
+#define ra (psxRegs.GPR.n.ra)
+#define pc0 (psxRegs.pc)
+
+#define Ra0 ((char *)PSXM(a0))
+#define Ra1 ((char *)PSXM(a1))
+#define Ra2 ((char *)PSXM(a2))
+#define Ra3 ((char *)PSXM(a3))
+#define Rv0 ((char *)PSXM(v0))
+#define Rsp ((char *)PSXM(sp))
+
+typedef struct {
+	u32 desc;
+	s32 status;
+	s32 mode;
+	u32 fhandler;
+} EvCB[32];
+
+#define EvStUNUSED	0x0000
+#define EvStWAIT	0x1000
+#define EvStACTIVE	0x2000
+#define EvStALREADY 0x4000
+
+#define EvMdINTR	0x1000
+#define EvMdNOINTR	0x2000
+
+/*
+typedef struct {
+	s32 next;
+	s32 func1;
+	s32 func2;
+	s32 pad;
+} SysRPst;
+*/
+
+typedef struct {
+	s32 status;
+	s32 mode;
+	u32 reg[32];
+	u32 func;
+} TCB;
+
+typedef struct {                   
+	u32 _pc0;
+	u32 gp0;
+	u32 t_addr;
+	u32 t_size;
+	u32 d_addr;
+	u32 d_size;
+	u32 b_addr;
+	u32 b_size;
+	u32 S_addr;
+	u32 s_size;
+	u32 _sp, _fp, _gp, ret, base;
+} EXEC;
+
+struct DIRENTRY {
+	char name[20];
+	s32 attr;
+	s32 size;
+	u32 next;
+	s32 head;
+	char system[4];
+};
+
+typedef struct {
+	char name[32];
+	u32  mode;
+	u32  offset;
+	u32  size;
+	u32  mcfile;
+} FileDesc;
+
+static u32 *jmp_int = NULL;
+static int *pad_buf = NULL;
+static char *pad_buf1 = NULL, *pad_buf2 = NULL;
+static int pad_buf1len, pad_buf2len;
+
+static u32 regs[35];
+static EvCB *Event;
+static EvCB *HwEV; // 0xf0
+static EvCB *EvEV; // 0xf1
+static EvCB *RcEV; // 0xf2
+static EvCB *UeEV; // 0xf3
+static EvCB *SwEV; // 0xf4
+static EvCB *ThEV; // 0xff
+static u32 *heap_addr = NULL;
+static u32 *heap_end = NULL;
+static u32 SysIntRP[8];
+static int CardState = -1;
+static TCB Thread[8];
+static int CurThread = 0;
+static FileDesc FDesc[32];
+
+boolean hleSoftCall = FALSE;
+
+static inline void softCall(u32 pc) {
+	pc0 = pc;
+	ra = 0x80001000;
+
+	hleSoftCall = TRUE;
+
+	while (pc0 != 0x80001000) psxCpu->ExecuteBlock();
+
+	hleSoftCall = FALSE;
+}
+
+static inline void softCall2(u32 pc) {
+	u32 sra = ra;
+	pc0 = pc;
+	ra = 0x80001000;
+
+	hleSoftCall = TRUE;
+
+	while (pc0 != 0x80001000) psxCpu->ExecuteBlock();
+	ra = sra;
+
+	hleSoftCall = FALSE;
+}
+
+static inline void DeliverEvent(u32 ev, u32 spec) {
+	if (Event[ev][spec].status != EvStACTIVE) return;
+
+//	Event[ev][spec].status = EvStALREADY;
+	if (Event[ev][spec].mode == EvMdINTR) {
+		softCall2(Event[ev][spec].fhandler);
+	} else Event[ev][spec].status = EvStALREADY;
+}
+
+static inline void SaveRegs() {
+	memcpy(regs, psxRegs.GPR.r, 32*4);
+	regs[32] = psxRegs.GPR.n.lo;
+	regs[33] = psxRegs.GPR.n.hi;
+	regs[34] = psxRegs.pc;
+}
+
+static inline void LoadRegs() {
+	memcpy(psxRegs.GPR.r, regs, 32*4);
+	psxRegs.GPR.n.lo = regs[32];
+	psxRegs.GPR.n.hi = regs[33];
+}
+
+/*                                           *
+//                                           *
+//                                           *
+//               System calls A0             */
+
+
+void psxBios_abs() { // 0x0e
+	if ((s32)a0 < 0) v0 = -(s32)a0;
+	else v0 = a0;
+	pc0 = ra;
+}
+
+void psxBios_labs() { // 0x0f
+	psxBios_abs();
+}
+
+void psxBios_atoi() { // 0x10
+	s32 n = 0, f = 0;
+	char *p = (char *)Ra0;
+
+	for (;;p++) {
+		switch (*p) {
+			case ' ': case '\t': continue;
+			case '-': f++;
+			case '+': p++;
+		}
+		break;
+	}
+
+	while (*p >= '0' && *p <= '9') {
+		n = n * 10 + *p++ - '0';
+	}
+
+	v0 = (f ? -n : n);
+	pc0 = ra;
+}
+
+void psxBios_atol() { // 0x11
+	psxBios_atoi();
+}
+
+void psxBios_setjmp() { // 0x13
+	u32 *jmp_buf = (u32 *)Ra0;
+	int i;
+
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s\n", biosA0n[0x13]);
+#endif
+
+	jmp_buf[0] = ra;
+	jmp_buf[1] = sp;
+	jmp_buf[2] = fp;
+	for (i = 0; i < 8; i++) // s0-s7
+		jmp_buf[3 + i] = psxRegs.GPR.r[16 + i];
+	jmp_buf[11] = gp;
+
+	v0 = 0; pc0 = ra;
+}
+
+void psxBios_longjmp() { // 0x14
+	u32 *jmp_buf = (u32 *)Ra0;
+	int i;
+
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s\n", biosA0n[0x14]);
+#endif
+
+	ra = jmp_buf[0]; /* ra */
+	sp = jmp_buf[1]; /* sp */
+	fp = jmp_buf[2]; /* fp */
+	for (i = 0; i < 8; i++) // s0-s7
+		psxRegs.GPR.r[16 + i] = jmp_buf[3 + i];
+	gp = jmp_buf[11]; /* gp */
+
+	v0 = a1; pc0 = ra;
+}
+
+void psxBios_strcat() { // 0x15
+	char *p1 = (char *)Ra0, *p2 = (char *)Ra1;
+
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s: %s, %s\n", biosA0n[0x15], Ra0, Ra1);
+#endif
+
+	while (*p1++);
+	--p1;
+	while ((*p1++ = *p2++) != '\0');
+
+	v0 = a0; pc0 = ra;
+}
+
+void psxBios_strncat() { // 0x16
+	char *p1 = (char *)Ra0, *p2 = (char *)Ra1;
+	s32 n = a2;
+
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s: %s (%x), %s (%x), %d\n", biosA0n[0x16], Ra0, a0, Ra1, a1, a2);
+#endif
+
+	while (*p1++);
+	--p1;
+	while ((*p1++ = *p2++) != '\0') {
+		if (--n < 0) {
+			*--p1 = '\0';
+			break;
+		}
+	}
+
+	v0 = a0; pc0 = ra;
+}
+
+void psxBios_strcmp() { // 0x17
+	char *p1 = (char *)Ra0, *p2 = (char *)Ra1;
+
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s: %s (%x), %s (%x)\n", biosA0n[0x17], Ra0, a0, Ra1, a1);
+#endif
+
+	while (*p1 == *p2++) {
+		if (*p1++ == '\0') {
+			v0 = 0;
+			pc0 = ra;
+			return;
+		}
+	}
+
+	v0 = (*p1 - *--p2);
+	pc0 = ra;
+}
+
+void psxBios_strncmp() { // 0x18
+	char *p1 = (char *)Ra0, *p2 = (char *)Ra1;
+	s32 n = a2;
+
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s: %s (%x), %s (%x), %d\n", biosA0n[0x18], Ra0, a0, Ra1, a1, a2);
+#endif
+
+	while (--n >= 0 && *p1 == *p2++) {
+		if (*p1++ == '\0') {
+			v0 = 0;
+			pc0 = ra;
+			return;
+		}
+	}
+
+	v0 = (n < 0 ? 0 : *p1 - *--p2);
+	pc0 = ra;
+}
+
+void psxBios_strcpy() { // 0x19
+	char *p1 = (char *)Ra0, *p2 = (char *)Ra1;
+	while ((*p1++ = *p2++) != '\0');
+
+	v0 = a0; pc0 = ra;
+}
+
+void psxBios_strncpy() { // 0x1a
+	char *p1 = (char *)Ra0, *p2 = (char *)Ra1;
+	s32 n = a2, i;
+
+	for (i = 0; i < n; i++) {
+		if ((*p1++ = *p2++) == '\0') {
+			while (++i < n) {
+				*p1++ = '\0';
+			}
+			v0 = a0; pc0 = ra;
+			return;
+		}
+	}
+
+	v0 = a0; pc0 = ra;
+}
+
+void psxBios_strlen() { // 0x1b
+	char *p = (char *)Ra0;
+	v0 = 0;
+	while (*p++) v0++;
+	pc0 = ra;
+}
+
+void psxBios_index() { // 0x1c
+	char *p = (char *)Ra0;
+
+	do {
+		if (*p == a1) {
+			v0 = a0 + (p - (char *)Ra0);
+			pc0 = ra;
+			return;
+		}
+	} while (*p++ != '\0');
+
+	v0 = 0; pc0 = ra;
+}
+
+void psxBios_rindex() { // 0x1d
+	char *p = (char *)Ra0;
+
+	v0 = 0;
+
+	do {
+		if (*p == a1)
+			v0 = a0 + (p - (char *)Ra0);
+	} while (*p++ != '\0');
+
+	pc0 = ra;
+}
+
+void psxBios_strchr() { // 0x1e
+	psxBios_index();
+}
+
+void psxBios_strrchr() { // 0x1f
+	psxBios_rindex();
+}
+
+void psxBios_strpbrk() { // 0x20
+	char *p1 = (char *)Ra0, *p2 = (char *)Ra1, *scanp, c, sc;
+
+	while ((c = *p1++) != '\0') {
+		for (scanp = p2; (sc = *scanp++) != '\0';) {
+			if (sc == c) {
+				v0 = a0 + (p1 - 1 - (char *)Ra0);
+				pc0 = ra;
+				return;
+			}
+		}
+	}
+
+	// BUG: return a0 instead of NULL if not found
+	v0 = a0; pc0 = ra;
+}
+
+void psxBios_strspn() { // 0x21
+	char *p1, *p2;
+
+	for (p1 = (char *)Ra0; *p1 != '\0'; p1++) {
+		for (p2 = (char *)Ra1; *p2 != '\0' && *p2 != *p1; p2++);
+		if (*p2 == '\0') break;
+	}
+
+	v0 = p1 - (char *)Ra0; pc0 = ra;
+}
+
+void psxBios_strcspn() { // 0x22
+	char *p1, *p2;
+
+	for (p1 = (char *)Ra0; *p1 != '\0'; p1++) {
+		for (p2 = (char *)Ra1; *p2 != '\0' && *p2 != *p1; p2++);
+		if (*p2 != '\0') break;
+	}
+
+	v0 = p1 - (char *)Ra0; pc0 = ra;
+}
+
+void psxBios_strtok() { // 0x23
+	char *pcA0 = (char *)Ra0;
+	char *pcRet = strtok(pcA0, (char *)Ra1);
+	if (pcRet)
+		v0 = a0 + pcRet - pcA0;
+	else
+		v0 = 0;
+	pc0 = ra;
+}
+
+void psxBios_strstr() { // 0x24
+	char *p = (char *)Ra0, *p1, *p2;
+
+	while (*p != '\0') {
+		p1 = p;
+		p2 = (char *)Ra1;
+
+		while (*p1 != '\0' && *p2 != '\0' && *p1 == *p2) {
+			p1++; p2++;
+		}
+
+		if (*p2 == '\0') {
+			v0 = a0 + (p - (char *)Ra0);
+			pc0 = ra;
+			return;
+		}
+
+		p++;
+	}
+
+	v0 = 0; pc0 = ra;
+}
+
+void psxBios_toupper() { // 0x25
+	v0 = (s8)(a0 & 0xff);
+	if (v0 >= 'a' && v0 <= 'z') v0 -= 'a' - 'A';
+	pc0 = ra;
+}
+
+void psxBios_tolower() { // 0x26
+	v0 = (s8)(a0 & 0xff);
+	if (v0 >= 'A' && v0 <= 'Z') v0 += 'a' - 'A';
+	pc0 = ra;
+}
+
+void psxBios_bcopy() { // 0x27
+	char *p1 = (char *)Ra1, *p2 = (char *)Ra0;
+	while (a2-- > 0) *p1++ = *p2++;
+
+	pc0 = ra;
+}
+
+void psxBios_bzero() { // 0x28
+	char *p = (char *)Ra0;
+	while (a1-- > 0) *p++ = '\0';
+
+	pc0 = ra;
+}
+
+void psxBios_bcmp() { // 0x29
+	char *p1 = (char *)Ra0, *p2 = (char *)Ra1;
+
+	if (a0 == 0 || a1 == 0) { v0 = 0; pc0 = ra; return; }
+
+	while (a2-- > 0) {
+		if (*p1++ != *p2++) {
+			v0 = *p1 - *p2; // BUG: compare the NEXT byte
+			pc0 = ra;
+			return;
+		}
+	}
+
+	v0 = 0; pc0 = ra;
+}
+
+void psxBios_memcpy() { // 0x2a
+	char *p1 = (char *)Ra0, *p2 = (char *)Ra1;
+	while (a2-- > 0) *p1++ = *p2++;
+
+	v0 = a0; pc0 = ra;
+}
+
+void psxBios_memset() { // 0x2b
+	char *p = (char *)Ra0;
+	while (a2-- > 0) *p++ = (char)a1;
+
+	v0 = a0; pc0 = ra;
+}
+
+void psxBios_memmove() { // 0x2c
+	char *p1 = (char *)Ra0, *p2 = (char *)Ra1;
+
+	if (p2 <= p1 && p2 + a2 > p1) {
+		a2++; // BUG: copy one more byte here
+		p1 += a2;
+		p2 += a2;
+		while (a2-- > 0) *--p1 = *--p2;
+	} else {
+		while (a2-- > 0) *p1++ = *p2++;
+	}
+
+	v0 = a0; pc0 = ra;
+}
+
+void psxBios_memcmp() { // 0x2d
+	psxBios_bcmp();
+}
+
+void psxBios_memchr() { // 0x2e
+	char *p = (char *)Ra0;
+
+	while (a2-- > 0) {
+		if (*p++ != (s8)a1) continue;
+		v0 = a0 + (p - (char *)Ra0 - 1);
+		pc0 = ra;
+		return;
+	}
+
+	v0 = 0; pc0 = ra;
+}
+
+void psxBios_rand() { // 0x2f
+	u32 s = psxMu32(0x9010) * 1103515245 + 12345;
+	v0 = (s >> 16) & 0x7fff;
+	psxMu32ref(0x9010) = SWAPu32(s);
+	pc0 = ra;
+}
+
+void psxBios_srand() { // 0x30
+	psxMu32ref(0x9010) = SWAPu32(a0);
+	pc0 = ra;
+}
+
+static u32 qscmpfunc, qswidth;
+
+static inline int qscmp(char *a, char *b) {
+	u32 sa0 = a0;
+
+	a0 = sa0 + (a - (char *)PSXM(sa0));
+	a1 = sa0 + (b - (char *)PSXM(sa0));
+
+	softCall2(qscmpfunc);
+
+	a0 = sa0;
+	return (s32)v0;
+}
+
+static inline void qexchange(char *i, char *j) {
+	char t;
+	int n = qswidth;
+
+	do {
+		t = *i;
+		*i++ = *j;
+		*j++ = t;
+	} while (--n);
+}
+
+static inline void q3exchange(char *i, char *j, char *k) {
+	char t;
+	int n = qswidth;
+
+	do {
+		t = *i;
+		*i++ = *k;
+		*k++ = *j;
+		*j++ = t;
+	} while (--n);
+}
+
+static void qsort_main(char *a, char *l) {
+	char *i, *j, *lp, *hp;
+	int c;
+	unsigned int n;
+
+start:
+	if ((n = l - a) <= qswidth)
+		return;
+	n = qswidth * (n / (2 * qswidth));
+	hp = lp = a + n;
+	i = a;
+	j = l - qswidth;
+	while (TRUE) {
+		if (i < lp) {
+			if ((c = qscmp(i, lp)) == 0) {
+				qexchange(i, lp -= qswidth);
+				continue;
+			}
+			if (c < 0) {
+				i += qswidth;
+				continue;
+			}
+		}
+
+loop:
+		if (j > hp) {
+			if ((c = qscmp(hp, j)) == 0) {
+				qexchange(hp += qswidth, j);
+				goto loop;
+			}
+			if (c > 0) {
+				if (i == lp) {
+					q3exchange(i, hp += qswidth, j);
+					i = lp += qswidth;
+					goto loop;
+				}
+				qexchange(i, j);
+				j -= qswidth;
+				i += qswidth;
+				continue;
+			}
+			j -= qswidth;
+			goto loop;
+		}
+
+		if (i == lp) {
+			if (lp - a >= l - hp) {
+				qsort_main(hp + qswidth, l);
+				l = lp;
+			} else {
+				qsort_main(a, lp);
+				a = hp + qswidth;
+			}
+			goto start;
+		}
+
+		q3exchange(j, lp -= qswidth, i);
+		j = hp -= qswidth;
+	}
+}
+
+void psxBios_qsort() { // 0x31
+	qswidth = a2;
+	qscmpfunc = a3;
+	qsort_main((char *)Ra0, (char *)Ra0 + a1 * a2);
+
+	pc0 = ra;
+}
+
+void psxBios_malloc() { // 0x33
+	unsigned int *chunk, *newchunk;
+	unsigned int dsize, csize, cstat;
+	int colflag;
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s\n", biosA0n[0x33]);
+#endif
+
+	// scan through heap and combine free chunks of space
+	chunk = heap_addr;
+	colflag = 0;
+	while(chunk < heap_end) {
+		// get size and status of actual chunk
+		csize = ((u32)*chunk) & 0xfffffffc;
+		cstat = ((u32)*chunk) & 1;
+
+		// it's a free chunk
+		if(cstat == 1) {
+			if(colflag == 0) {
+				newchunk = chunk;
+				dsize = csize;
+				colflag = 1;			// let's begin a new collection of free memory
+			}
+			else dsize += (csize+4);	// add the new size including header
+		}
+		// not a free chunk: did we start a collection ?
+		else {
+			if(colflag == 1) {			// collection is over
+				colflag = 0;
+				*newchunk = SWAP32(dsize | 1);
+			}
+		}
+
+		// next chunk
+		chunk = (u32*)((uptr)chunk + csize + 4);
+	}
+	// if neccessary free memory on end of heap
+	if (colflag == 1)
+		*newchunk = SWAP32(dsize | 1);
+
+	chunk = heap_addr;
+	csize = ((u32)*chunk) & 0xfffffffc;
+	cstat = ((u32)*chunk) & 1;
+	dsize = (a0 + 3) & 0xfffffffc;
+
+	// exit on uninitialized heap
+	if (chunk == NULL) {
+		SysPrintf("malloc %x,%x: Uninitialized Heap!\n", v0, a0);
+		v0 = 0;
+		pc0 = ra;
+		return;
+	}
+
+	// search an unused chunk that is big enough until the end of the heap
+	while ((dsize > csize || cstat == 0) && chunk < heap_end ) {
+		chunk = (u32*)((uptr)chunk + csize + 4);
+		csize = ((u32)*chunk) & 0xfffffffc;
+		cstat = ((u32)*chunk) & 1;
+	}
+
+	// catch out of memory
+	if(chunk >= heap_end) { SysPrintf("malloc %x,%x: Out of memory error!\n", v0, a0); v0 = 0; pc0 = ra; return; }
+	
+	// allocate memory
+	if(dsize == csize) {
+		// chunk has same size
+		*chunk &= 0xfffffffc;
+	}
+	else {
+		// split free chunk
+		*chunk = SWAP32(dsize);
+		newchunk = (u32*)((uptr)chunk + dsize + 4);
+		*newchunk = SWAP32((csize - dsize - 4) & 0xfffffffc | 1);
+	}
+
+	// return pointer to allocated memory
+	v0 = ((unsigned long)chunk - (unsigned long)psxM) + 4;
+	v0|= 0x80000000;
+	SysPrintf ("malloc %x,%x\n", v0, a0);
+	pc0 = ra;
+}
+
+void psxBios_free() { // 0x34
+
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s\n", biosA0n[0x34]);
+#endif
+
+	SysPrintf("free %x: %x bytes\n", a0, *(u32*)(Ra0-4));
+
+	*(u32*)(Ra0-4) |= 1;	// set chunk to free
+	pc0 = ra;
+}
+
+void psxBios_calloc() { // 0x37
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s\n", biosA0n[0x37]);
+#endif
+
+	a0 = a0 * a1;
+	psxBios_malloc();
+	memset(Rv0, 0, a0);
+}
+
+void psxBios_realloc() { // 0x38
+	u32 block = a0;
+	u32 size = a1;
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s\n", biosA0n[0x38]);
+#endif
+
+	a0 = block;
+	psxBios_free();
+	a0 = size;
+	psxBios_malloc();
+}
+
+
+/* InitHeap(void *block , int n) */
+void psxBios_InitHeap() { // 0x39
+	unsigned int size;
+
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s\n", biosA0n[0x39]);
+#endif
+
+	if (((a0 & 0x1fffff) + a1)>= 0x200000) size = 0x1ffffc - (a0 & 0x1fffff);
+	else size = a1;
+
+	size &= 0xfffffffc;
+
+	heap_addr = (u32 *)Ra0;
+	heap_end = (u32 *)((u8 *)heap_addr + size);
+	*heap_addr = SWAP32(size | 1);
+
+	SysPrintf("InitHeap %x,%x : %x %x\n",a0,a1, (uptr)heap_addr-(uptr)psxM, size);
+
+	pc0 = ra;
+}
+
+void psxBios_getchar() { //0x3b
+	v0 = getchar(); pc0 = ra;
+}
+
+void psxBios_printf() { // 0x3f
+	char tmp[1024];
+	char tmp2[1024];
+	u32 save[4];
+	char *ptmp = tmp;
+	int n=1, i=0, j;
+
+	memcpy(save, (char*)PSXM(sp), 4 * 4);
+	psxMu32ref(sp) = SWAP32((u32)a0);
+	psxMu32ref(sp + 4) = SWAP32((u32)a1);
+	psxMu32ref(sp + 8) = SWAP32((u32)a2);
+	psxMu32ref(sp + 12) = SWAP32((u32)a3);
+
+	while (Ra0[i]) {
+		switch (Ra0[i]) {
+			case '%':
+				j = 0;
+				tmp2[j++] = '%';
+_start:
+				switch (Ra0[++i]) {
+					case '.':
+					case 'l':
+						tmp2[j++] = Ra0[i]; goto _start;
+					default:
+						if (Ra0[i] >= '0' && Ra0[i] <= '9') {
+							tmp2[j++] = Ra0[i];
+							goto _start;
+						}
+						break;
+				}
+				tmp2[j++] = Ra0[i];
+				tmp2[j] = 0;
+
+				switch (Ra0[i]) {
+					case 'f': case 'F':
+						ptmp += sprintf(ptmp, tmp2, (float)psxMu32(sp + n * 4)); n++; break;
+					case 'a': case 'A':
+					case 'e': case 'E':
+					case 'g': case 'G':
+						ptmp += sprintf(ptmp, tmp2, (double)psxMu32(sp + n * 4)); n++; break;
+					case 'p':
+					case 'i':
+					case 'd': case 'D':
+					case 'o': case 'O':
+					case 'x': case 'X':
+						ptmp += sprintf(ptmp, tmp2, (unsigned int)psxMu32(sp + n * 4)); n++; break;
+					case 'c':
+						ptmp += sprintf(ptmp, tmp2, (unsigned char)psxMu32(sp + n * 4)); n++; break;
+					case 's':
+						ptmp += sprintf(ptmp, tmp2, (char*)PSXM(psxMu32(sp + n * 4))); n++; break;
+					case '%':
+						*ptmp++ = Ra0[i]; break;
+				}
+				i++;
+				break;
+			default:
+				*ptmp++ = Ra0[i++];
+		}
+	}
+	*ptmp = 0;
+
+	memcpy((char*)PSXM(sp), save, 4 * 4);
+
+	SysPrintf(tmp);
+
+	pc0 = ra;
+}
+
+/*
+ *	long Load(char *name, struct EXEC *header);
+ */
+
+void psxBios_Load() { // 0x42
+	EXE_HEADER eheader;
+
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s: %s, %x\n", biosA0n[0x42], Ra0, a1);
+#endif
+
+	if (LoadCdromFile(Ra0, &eheader) == 0) {
+		memcpy(Ra1, ((char*)&eheader)+16, sizeof(EXEC));
+		v0 = 1;
+	} else v0 = 0;
+
+	pc0 = ra;
+}
+
+/*
+ *	int Exec(struct EXEC *header , int argc , char **argv);
+ */
+
+void psxBios_Exec() { // 43
+	EXEC *header = (EXEC*)Ra0;
+	u32 tmp;
+
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s: %x, %x, %x\n", biosA0n[0x43], a0, a1, a2);
+#endif
+
+	header->_sp = sp;
+	header->_fp = fp;
+	header->_sp = sp;
+	header->_gp = gp;
+	header->ret = ra;
+	header->base = s0;
+
+	if (header->S_addr != 0) {
+		tmp = header->S_addr + header->s_size;
+		sp = tmp;
+		fp = sp;
+	}
+
+	gp = header->gp0;
+
+	s0 = a0;
+
+	a0 = a1;
+	a1 = a2;
+
+	ra = 0x8000;
+	pc0 = header->_pc0;
+}
+
+void psxBios_FlushCache() { // 44
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s\n", biosA0n[0x44]);
+#endif
+
+	pc0 = ra;
+}
+
+void psxBios_GPU_dw() { // 0x46
+	int size;
+	s32 *ptr;
+
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s\n", biosA0n[0x46]);
+#endif
+
+	GPU_writeData(0xa0000000);
+	GPU_writeData((a1<<16)|(a0&0xffff));
+	GPU_writeData((a3<<16)|(a2&0xffff));
+	size = (a2*a3+1)/2;
+	ptr = (s32*)PSXM(Rsp[4]);  //that is correct?
+	do {
+		GPU_writeData(SWAP32(*ptr));
+		ptr++;
+	} while(--size);
+
+	pc0 = ra;
+}  
+
+void psxBios_mem2vram() { // 0x47
+	int size;
+
+	GPU_writeData(0xa0000000);
+	GPU_writeData((a1<<16)|(a0&0xffff));
+	GPU_writeData((a3<<16)|(a2&0xffff));
+	size = (a2*a3+1)/2;
+	GPU_writeStatus(0x04000002);
+	psxHwWrite32(0x1f8010f4,0);
+	psxHwWrite32(0x1f8010f0,psxHwRead32(0x1f8010f0)|0x800);
+	psxHwWrite32(0x1f8010a0,Rsp[4]);//might have a buggy...
+	psxHwWrite32(0x1f8010a4,((size/16)<<16)|16);
+	psxHwWrite32(0x1f8010a8,0x01000201);
+
+	pc0 = ra;
+}
+
+void psxBios_SendGPU() { // 0x48
+	GPU_writeStatus(a0);
+	pc0 = ra;
+}
+
+void psxBios_GPU_cw() { // 0x49
+	GPU_writeData(a0);
+	pc0 = ra;
+}
+
+void psxBios_GPU_cwb() { // 0x4a
+	s32 *ptr = (s32*)Ra0;
+	int size = a1;
+	while(size--) {
+		GPU_writeData(SWAP32(*ptr));
+		ptr++;
+	}
+
+	pc0 = ra;
+}
+   
+void psxBios_GPU_SendPackets() { //4b:	
+	GPU_writeStatus(0x04000002);
+	psxHwWrite32(0x1f8010f4,0);
+	psxHwWrite32(0x1f8010f0,psxHwRead32(0x1f8010f0)|0x800);
+	psxHwWrite32(0x1f8010a0,a0);
+	psxHwWrite32(0x1f8010a4,0);
+	psxHwWrite32(0x1f8010a8,0x010000401);
+	pc0 = ra;
+}
+
+void psxBios_sys_a0_4c() { // 0x4c GPU relate
+	psxHwWrite32(0x1f8010a8,0x00000401);
+	GPU_writeData(0x0400000);
+	GPU_writeData(0x0200000);
+	GPU_writeData(0x0100000);
+
+	pc0 = ra;
+}
+
+void psxBios_GPU_GetGPUStatus() { // 0x4d
+	v0 = GPU_readStatus();
+	pc0 = ra;
+}
+
+#undef s_addr
+
+void psxBios_LoadExec() { // 51
+	EXEC *header = (EXEC*)PSXM(0xf000);
+	u32 s_addr, s_size;
+
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s: %s: %x,%x\n", biosA0n[0x51], Ra0, a1, a2);
+#endif
+	s_addr = a1; s_size = a2;
+
+	a1 = 0xf000;	
+	psxBios_Load();
+
+	header->S_addr = s_addr;
+	header->s_size = s_size;
+
+	a0 = 0xf000; a1 = 0; a2 = 0;
+	psxBios_Exec();
+}
+
+void psxBios__bu_init() { // 70
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s\n", biosA0n[0x70]);
+#endif
+
+	DeliverEvent(0x11, 0x2); // 0xf0000011, 0x0004
+	DeliverEvent(0x81, 0x2); // 0xf4000001, 0x0004
+
+	pc0 = ra;
+}
+
+void psxBios__96_init() { // 71
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s\n", biosA0n[0x71]);
+#endif
+
+	pc0 = ra;
+}
+
+void psxBios__96_remove() { // 72
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s\n", biosA0n[0x72]);
+#endif
+
+	pc0 = ra;
+}
+
+void psxBios_SetMem() { // 9f
+	u32 new = psxHu32(0x1060);
+
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s: %x, %x\n", biosA0n[0x9f], a0, a1);
+#endif
+
+	switch(a0) {
+		case 2:
+			psxHu32ref(0x1060) = SWAP32(new);
+			psxMu32ref(0x060) = a0;
+			SysPrintf("Change effective memory : %d MBytes\n",a0);
+			break;
+
+		case 8:
+			psxHu32ref(0x1060) = SWAP32(new | 0x300);
+			psxMu32ref(0x060) = a0;
+			SysPrintf("Change effective memory : %d MBytes\n",a0);
+	
+		default:
+			SysPrintf("Effective memory must be 2/8 MBytes\n");
+		break;
+	}
+
+	pc0 = ra;
+}
+
+void psxBios__card_info() { // ab
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s: %x\n", biosA0n[0xab], a0);
+#endif
+
+//	DeliverEvent(0x11, 0x2); // 0xf0000011, 0x0004
+	DeliverEvent(0x81, 0x2); // 0xf4000001, 0x0004
+
+	v0 = 1; pc0 = ra;
+}
+
+void psxBios__card_load() { // ac
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s: %x\n", biosA0n[0xac], a0);
+#endif
+
+//	DeliverEvent(0x11, 0x2); // 0xf0000011, 0x0004
+	DeliverEvent(0x81, 0x2); // 0xf4000001, 0x0004
+
+	v0 = 1; pc0 = ra;
+}
+
+/* System calls B0 */
+
+void psxBios_SetRCnt() { // 02
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s\n", biosB0n[0x02]);
+#endif
+
+	a0&= 0x3;
+	if (a0 != 3) {
+		u32 mode=0;
+
+		psxRcntWtarget(a0, a1);
+		if (a2&0x1000) mode|= 0x050; // Interrupt Mode
+		if (a2&0x0100) mode|= 0x008; // Count to 0xffff
+		if (a2&0x0010) mode|= 0x001; // Timer stop mode
+		if (a0 == 2) { if (a2&0x0001) mode|= 0x200; } // System Clock mode
+		else         { if (a2&0x0001) mode|= 0x100; } // System Clock mode
+
+		psxRcntWmode(a0, mode);
+	}
+	pc0 = ra;
+}
+
+void psxBios_GetRCnt() { // 03
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s\n", biosB0n[0x03]);
+#endif
+
+	a0&= 0x3;
+	if (a0 != 3) v0 = psxRcntRcount(a0);
+	else v0 = 0;
+	pc0 = ra;
+}
+
+void psxBios_StartRCnt() { // 04
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s\n", biosB0n[0x04]);
+#endif
+
+	a0&= 0x3;
+	if (a0 != 3) psxHu32ref(0x1074)|= SWAP32((u32)((1<<(a0+4))));
+	else psxHu32ref(0x1074)|= SWAPu32(0x1);
+	v0 = 1; pc0 = ra;
+}
+
+void psxBios_StopRCnt() { // 05
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s\n", biosB0n[0x05]);
+#endif
+
+	a0&= 0x3;
+	if (a0 != 3) psxHu32ref(0x1074)&= SWAP32((u32)(~(1<<(a0+4))));
+	else psxHu32ref(0x1074)&= SWAPu32(~0x1);
+	pc0 = ra;
+}
+
+void psxBios_ResetRCnt() { // 06
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s\n", biosB0n[0x06]);
+#endif
+
+	a0&= 0x3;
+	if (a0 != 3) {
+		psxRcntWmode(a0, 0);
+		psxRcntWtarget(a0, 0);
+		psxRcntWcount(a0, 0);
+	}
+	pc0 = ra;
+}
+
+
+/* gets ev for use with Event */
+#define GetEv() \
+	ev = (a0 >> 24) & 0xf; \
+	if (ev == 0xf) ev = 0x5; \
+	ev*= 32; \
+	ev+= a0&0x1f;
+
+/* gets spec for use with Event */
+#define GetSpec() \
+	spec = 0; \
+	switch (a1) { \
+		case 0x0301: spec = 16; break; \
+		case 0x0302: spec = 17; break; \
+		default: \
+			for (i=0; i<16; i++) if (a1 & (1 << i)) { spec = i; break; } \
+			break; \
+	}
+
+void psxBios_DeliverEvent() { // 07
+	int ev, spec;
+	int i;
+
+	GetEv();
+	GetSpec();
+
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s %x,%x\n", biosB0n[0x07], ev, spec);
+#endif
+
+	DeliverEvent(ev, spec);
+
+	pc0 = ra;
+}
+
+void psxBios_OpenEvent() { // 08
+	int ev, spec;
+	int i;
+
+	GetEv();
+	GetSpec();
+
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s %x,%x (class:%x, spec:%x, mode:%x, func:%x)\n", biosB0n[0x08], ev, spec, a0, a1, a2, a3);
+#endif
+
+	Event[ev][spec].status = EvStWAIT;
+	Event[ev][spec].mode = a2;
+	Event[ev][spec].fhandler = a3;
+
+	v0 = ev | (spec << 8);
+	pc0 = ra;
+}
+
+void psxBios_CloseEvent() { // 09
+	int ev, spec;
+
+	ev   = a0 & 0xff;
+	spec = (a0 >> 8) & 0xff;
+
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s %x,%x\n", biosB0n[0x09], ev, spec);
+#endif
+
+	Event[ev][spec].status = EvStUNUSED;
+
+	v0 = 1; pc0 = ra;
+}
+
+void psxBios_WaitEvent() { // 0a
+	int ev, spec;
+
+	ev   = a0 & 0xff;
+	spec = (a0 >> 8) & 0xff;
+
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s %x,%x\n", biosB0n[0x0a], ev, spec);
+#endif
+
+	Event[ev][spec].status = EvStACTIVE;
+
+	v0 = 1; pc0 = ra;
+}
+
+void psxBios_TestEvent() { // 0b
+	int ev, spec;
+
+	ev   = a0 & 0xff;
+	spec = (a0 >> 8) & 0xff;
+
+	if (Event[ev][spec].status == EvStALREADY) {
+		Event[ev][spec].status = EvStACTIVE; v0 = 1;
+	} else v0 = 0;
+
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s %x,%x: %x\n", biosB0n[0x0b], ev, spec, v0);
+#endif
+
+	pc0 = ra;
+}
+
+void psxBios_EnableEvent() { // 0c
+	int ev, spec;
+
+	ev   = a0 & 0xff;
+	spec = (a0 >> 8) & 0xff;
+
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s %x,%x\n", biosB0n[0x0c], ev, spec);
+#endif
+
+	Event[ev][spec].status = EvStACTIVE;
+
+	v0 = 1; pc0 = ra;
+}
+
+void psxBios_DisableEvent() { // 0d
+	int ev, spec;
+
+	ev   = a0 & 0xff;
+	spec = (a0 >> 8) & 0xff;
+
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s %x,%x\n", biosB0n[0x0d], ev, spec);
+#endif
+
+	Event[ev][spec].status = EvStWAIT;
+
+	v0 = 1; pc0 = ra;
+}
+
+/*
+ *	long OpenTh(long (*func)(), unsigned long sp, unsigned long gp);
+ */
+
+void psxBios_OpenTh() { // 0e
+	int th;
+
+	for (th=1; th<8; th++)
+		if (Thread[th].status == 0) break;
+
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s: %x\n", biosB0n[0x0e], th);
+#endif
+
+	Thread[th].status = 1;
+	Thread[th].func    = a0;
+	Thread[th].reg[29] = a1;
+	Thread[th].reg[28] = a2;
+
+	v0 = th; pc0 = ra;
+}
+
+/*
+ *	int CloseTh(long thread);
+ */
+
+void psxBios_CloseTh() { // 0f
+	int th = a0 & 0xff;
+
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s: %x\n", biosB0n[0x0f], th);
+#endif
+
+	if (Thread[th].status == 0) {
+		v0 = 0;
+	} else {
+		Thread[th].status = 0;
+		v0 = 1;
+	}
+
+	pc0 = ra;
+}
+
+/*
+ *	int ChangeTh(long thread);
+ */
+
+void psxBios_ChangeTh() { // 10
+	int th = a0 & 0xff;
+
+#ifdef PSXBIOS_LOG
+//	PSXBIOS_LOG("psxBios_%s: %x\n", biosB0n[0x10], th);
+#endif
+
+	if (Thread[th].status == 0 || CurThread == th) {
+		v0 = 0;
+
+		pc0 = ra;
+	} else {
+		v0 = 1;
+
+		if (Thread[CurThread].status == 2) {
+			Thread[CurThread].status = 1;
+			Thread[CurThread].func = ra;
+			memcpy(Thread[CurThread].reg, psxRegs.GPR.r, 32*4);
+		}
+
+		memcpy(psxRegs.GPR.r, Thread[th].reg, 32*4);
+		pc0 = Thread[th].func;
+		Thread[th].status = 2;
+		CurThread = th;
+	}
+}
+
+void psxBios_InitPAD() { // 0x12
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s\n", biosB0n[0x12]);
+#endif
+
+	pad_buf1 = (char*)Ra0;
+	pad_buf1len = a1;
+	pad_buf2 = (char*)Ra2;
+	pad_buf2len = a3;
+
+	v0 = 1; pc0 = ra;
+}
+
+void psxBios_StartPAD() { // 13
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s\n", biosB0n[0x13]);
+#endif
+
+	psxHwWrite16(0x1f801074, (unsigned short)(psxHwRead16(0x1f801074) | 0x1));
+	psxRegs.CP0.n.Status |= 0x401;
+	pc0 = ra;
+}
+
+void psxBios_StopPAD() { // 14
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s\n", biosB0n[0x14]);
+#endif
+
+	pad_buf1 = NULL;
+	pad_buf2 = NULL;
+	pc0 = ra;
+}
+
+void psxBios_PAD_init() { // 15
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s\n", biosB0n[0x15]);
+#endif
+	psxHwWrite16(0x1f801074, (u16)(psxHwRead16(0x1f801074) | 0x1));
+	pad_buf = (int *)Ra1;
+	*pad_buf = -1;
+	psxRegs.CP0.n.Status |= 0x401;
+	pc0 = ra;
+}
+
+void psxBios_PAD_dr() { // 16
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s\n", biosB0n[0x16]);
+#endif
+
+	v0 = -1; pc0 = ra;
+}
+
+void psxBios_ReturnFromException() { // 17
+	LoadRegs();
+
+	pc0 = psxRegs.CP0.n.EPC;
+	if (psxRegs.CP0.n.Cause & 0x80000000) pc0 += 4;
+
+	psxRegs.CP0.n.Status = (psxRegs.CP0.n.Status & 0xfffffff0) |
+						  ((psxRegs.CP0.n.Status & 0x3c) >> 2);
+}
+
+void psxBios_ResetEntryInt() { // 18
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s\n", biosB0n[0x18]);
+#endif
+
+	jmp_int = NULL;
+	pc0 = ra;
+}
+
+void psxBios_HookEntryInt() { // 19
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s\n", biosB0n[0x19]);
+#endif
+
+	jmp_int = (u32*)Ra0;
+	pc0 = ra;
+}
+
+void psxBios_UnDeliverEvent() { // 0x20
+	int ev, spec;
+	int i;
+
+	GetEv();
+	GetSpec();
+
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s %x,%x\n", biosB0n[0x20], ev, spec);
+#endif
+
+	if (Event[ev][spec].status == EvStALREADY &&
+		Event[ev][spec].mode == EvMdNOINTR)
+		Event[ev][spec].status = EvStACTIVE;
+
+	pc0 = ra;
+}
+
+#define buopen(mcd) { \
+	strcpy(FDesc[1 + mcd].name, Ra0+5); \
+	FDesc[1 + mcd].offset = 0; \
+	FDesc[1 + mcd].mode   = a1; \
+ \
+	for (i=1; i<16; i++) { \
+		ptr = Mcd##mcd##Data + 128 * i; \
+		if ((*ptr & 0xF0) != 0x50) continue; \
+		if (strcmp(FDesc[1 + mcd].name, ptr+0xa)) continue; \
+		FDesc[1 + mcd].mcfile = i; \
+		SysPrintf("open %s\n", ptr+0xa); \
+		v0 = 1 + mcd; \
+		break; \
+	} \
+	if (a1 & 0x200 && v0 == -1) { /* FCREAT */ \
+		for (i=1; i<16; i++) { \
+			int j, xor = 0; \
+ \
+			ptr = Mcd##mcd##Data + 128 * i; \
+			if ((*ptr & 0xF0) == 0x50) continue; \
+			ptr[0] = 0x50 | (u8)(a1 >> 16); \
+			ptr[4] = 0x00; \
+			ptr[5] = 0x20; \
+			ptr[6] = 0x00; \
+			ptr[7] = 0x00; \
+			ptr[8] = 'B'; \
+			ptr[9] = 'I'; \
+			strcpy(ptr+0xa, FDesc[1 + mcd].name); \
+			for (j=0; j<127; j++) xor^= ptr[j]; \
+			ptr[127] = xor; \
+			FDesc[1 + mcd].mcfile = i; \
+			SysPrintf("openC %s\n", ptr); \
+			v0 = 1 + mcd; \
+			SaveMcd(Config.Mcd##mcd, Mcd##mcd##Data, 128 * i, 128); \
+			break; \
+		} \
+	} \
+}
+
+/*
+ *	int open(char *name , int mode);
+ */
+
+void psxBios_open() { // 0x32
+	int i;
+	char *ptr;
+
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s: %s,%x\n", biosB0n[0x32], Ra0, a1);
+#endif
+
+	v0 = -1;
+
+	if (!strncmp(Ra0, "bu00", 4)) {
+		buopen(1);
+	}
+
+	if (!strncmp(Ra0, "bu10", 4)) {
+		buopen(2);
+	}
+
+	pc0 = ra;
+}
+
+/*
+ *	int lseek(int fd , int offset , int whence);
+ */
+
+void psxBios_lseek() { // 0x33
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s: %x, %x, %x\n", biosB0n[0x33], a0, a1, a2);
+#endif
+
+	switch (a2) {
+		case 0: // SEEK_SET
+			FDesc[a0].offset = a1;
+			v0 = a1;
+//			DeliverEvent(0x11, 0x2); // 0xf0000011, 0x0004
+//			DeliverEvent(0x81, 0x2); // 0xf4000001, 0x0004
+			break;
+
+		case 1: // SEEK_CUR
+			FDesc[a0].offset+= a1;
+			v0 = FDesc[a0].offset;
+			break;
+	}
+
+	pc0 = ra;
+}
+
+#define buread(mcd) { \
+	SysPrintf("read %d: %x,%x (%s)\n", FDesc[1 + mcd].mcfile, FDesc[1 + mcd].offset, a2, Mcd##mcd##Data + 128 * FDesc[1 + mcd].mcfile + 0xa); \
+	ptr = Mcd##mcd##Data + 8192 * FDesc[1 + mcd].mcfile + FDesc[1 + mcd].offset; \
+	memcpy(Ra1, ptr, a2); \
+	if (FDesc[1 + mcd].mode & 0x8000) v0 = 0; \
+	else v0 = a2; \
+	FDesc[1 + mcd].offset += v0; \
+	DeliverEvent(0x11, 0x2); /* 0xf0000011, 0x0004 */ \
+	DeliverEvent(0x81, 0x2); /* 0xf4000001, 0x0004 */ \
+}
+
+/*
+ *	int read(int fd , void *buf , int nbytes);
+ */
+
+void psxBios_read() { // 0x34
+	char *ptr;
+
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s: %x, %x, %x\n", biosB0n[0x34], a0, a1, a2);
+#endif
+
+	v0 = -1;
+
+	switch (a0) {
+		case 2: buread(1); break;
+		case 3: buread(2); break;
+	}
+  		
+	pc0 = ra;
+}
+
+#define buwrite(mcd) { \
+	u32 offset =  + 8192 * FDesc[1 + mcd].mcfile + FDesc[1 + mcd].offset; \
+	SysPrintf("write %d: %x,%x\n", FDesc[1 + mcd].mcfile, FDesc[1 + mcd].offset, a2); \
+	ptr = Mcd##mcd##Data + offset; \
+	memcpy(ptr, Ra1, a2); \
+	FDesc[1 + mcd].offset += a2; \
+	SaveMcd(Config.Mcd##mcd, Mcd##mcd##Data, offset, a2); \
+	if (FDesc[1 + mcd].mode & 0x8000) v0 = 0; \
+	else v0 = a2; \
+	DeliverEvent(0x11, 0x2); /* 0xf0000011, 0x0004 */ \
+	DeliverEvent(0x81, 0x2); /* 0xf4000001, 0x0004 */ \
+}
+
+/*
+ *	int write(int fd , void *buf , int nbytes);
+ */
+
+void psxBios_write() { // 0x35/0x03
+	char *ptr;
+
+	if (a0 == 1) { // stdout
+		char *ptr = Ra1;
+
+		while (a2 > 0) {
+			SysPrintf("%c", *ptr++); a2--;
+		}
+		pc0 = ra; return;
+	}
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s: %x,%x,%x\n", biosB0n[0x35], a0, a1, a2);
+#endif
+
+	v0 = -1;
+
+	switch (a0) {
+		case 2: buwrite(1); break;
+		case 3: buwrite(2); break;
+	}
+
+	pc0 = ra;
+}
+
+/*
+ *	int close(int fd);
+ */
+
+void psxBios_close() { // 0x36
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s: %x\n", biosB0n[0x36], a0);
+#endif
+
+	v0 = a0;
+	pc0 = ra;
+}
+
+void psxBios_putchar() { // 3d
+	SysPrintf("%c", (char)a0);
+	pc0 = ra;
+}
+
+void psxBios_puts() { // 3e/3f
+	SysPrintf(Ra0);
+	pc0 = ra;
+}
+
+char ffile[64], *pfile;
+int nfile;
+
+#define bufile(mcd) { \
+	while (nfile < 16) { \
+		int match=1; \
+ \
+		ptr = Mcd##mcd##Data + 128 * nfile; \
+		nfile++; \
+		if ((*ptr & 0xF0) != 0x50) continue; \
+		ptr+= 0xa; \
+		if (pfile[0] == 0) { \
+			strcpy(dir->name, ptr); \
+		} else for (i=0; i<20; i++) { \
+			if (pfile[i] == ptr[i]) { \
+				dir->name[i] = ptr[i]; \
+				if (ptr[i] == 0) break; else continue; } \
+			if (pfile[i] == '?') { \
+				dir->name[i] = ptr[i]; continue; } \
+			if (pfile[i] == '*') { \
+				strcpy(dir->name+i, ptr+i); break; } \
+			match = 0; break; \
+		} \
+		SysPrintf("%d : %s = %s + %s (match=%d)\n", nfile, dir->name, pfile, ptr, match); \
+		if (match == 0) continue; \
+		dir->size = 8192; \
+		v0 = _dir; \
+		break; \
+	} \
+}
+
+/*
+ *	struct DIRENTRY* firstfile(char *name,struct DIRENTRY *dir);
+ */
+ 
+void psxBios_firstfile() { // 42
+	struct DIRENTRY *dir = (struct DIRENTRY *)Ra1;
+	u32 _dir = a1;
+	char *ptr;
+	int i;
+
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s: %s\n", biosB0n[0x42], Ra0);
+#endif
+
+	v0 = 0;
+
+	strcpy(ffile, Ra0);
+	pfile = ffile+5;
+	nfile = 1;
+	if (!strncmp(Ra0, "bu00", 4)) {
+		bufile(1);
+		v0 = _dir;
+	}
+
+	if (!strncmp(Ra0, "bu10", 4)) {
+		bufile(2);
+		v0 = _dir;
+	}
+
+	pc0 = ra;
+}
+
+/*
+ *	struct DIRENTRY* nextfile(struct DIRENTRY *dir);
+ */
+
+void psxBios_nextfile() { // 43
+	struct DIRENTRY *dir = (struct DIRENTRY *)Ra0;
+	u32 _dir = a0;
+	char *ptr;
+	int i;
+
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s: %s\n", biosB0n[0x43], dir->name);
+#endif
+
+	v0 = 0;
+
+	if (!strncmp(ffile, "bu00", 4)) {
+		bufile(1);
+	}
+
+	if (!strncmp(ffile, "bu10", 4)) {
+		bufile(2);
+	}
+
+	pc0 = ra;
+}
+
+#define burename(mcd) { \
+	for (i=1; i<16; i++) { \
+		int namelen, j, xor = 0; \
+		ptr = Mcd##mcd##Data + 128 * i; \
+		if ((*ptr & 0xF0) != 0x50) continue; \
+		if (strcmp(Ra0+5, ptr+0xa)) continue; \
+		namelen = strlen(Ra1+5); \
+		memcpy(ptr+0xa, Ra1+5, namelen); \
+		memset(ptr+0xa+namelen, 0, 0x75-namelen); \
+		for (j=0; j<127; j++) xor^= ptr[j]; \
+		ptr[127] = xor; \
+		SaveMcd(Config.Mcd##mcd, Mcd##mcd##Data, 128 * i + 0xa, 0x76); \
+		v0 = 1; \
+		break; \
+	} \
+}
+
+/*
+ *	int rename(char *old, char *new);
+ */
+
+void psxBios_rename() { // 44
+	char *ptr;
+	int i;
+
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s: %s,%s\n", biosB0n[0x44], Ra0, Ra1);
+#endif
+
+	v0 = 0;
+
+	if (!strncmp(Ra0, "bu00", 4) && !strncmp(Ra1, "bu00", 4)) {
+		burename(1);
+	}
+
+	if (!strncmp(Ra0, "bu10", 4) && !strncmp(Ra1, "bu10", 4)) {
+		burename(2);
+	}
+
+	pc0 = ra;
+}
+
+
+#define budelete(mcd) { \
+	for (i=1; i<16; i++) { \
+		ptr = Mcd##mcd##Data + 128 * i; \
+		if ((*ptr & 0xF0) != 0x50) continue; \
+		if (strcmp(Ra0+5, ptr+0xa)) continue; \
+		*ptr = (*ptr & 0xf) | 0xA0; \
+		SaveMcd(Config.Mcd##mcd, Mcd##mcd##Data, 128 * i, 1); \
+		SysPrintf("delete %s\n", ptr+0xa); \
+		v0 = 1; \
+		break; \
+	} \
+}
+
+/*
+ *	int delete(char *name);
+ */
+
+void psxBios_delete() { // 45
+	char *ptr;
+	int i;
+
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s: %s\n", biosB0n[0x45], Ra0);
+#endif
+
+	v0 = 0;
+
+	if (!strncmp(Ra0, "bu00", 4)) {
+		budelete(1);
+	}
+
+	if (!strncmp(Ra0, "bu10", 4)) {
+		budelete(2);
+	}
+
+	pc0 = ra;
+}
+
+void psxBios_InitCARD() { // 4a
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s: %x\n", biosB0n[0x4a], a0);
+#endif
+
+	CardState = 0;
+
+	pc0 = ra;
+}
+
+void psxBios_StartCARD() { // 4b
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s\n", biosB0n[0x4b]);
+#endif
+
+	if (CardState == 0) CardState = 1;
+
+	pc0 = ra;
+}
+
+void psxBios_StopCARD() { // 4c
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s\n", biosB0n[0x4c]);
+#endif
+
+	if (CardState == 1) CardState = 0;
+
+	pc0 = ra;
+}
+
+void psxBios__card_write() { // 0x4e
+	int port;
+
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s: %x,%x,%x\n", biosB0n[0x4e], a0, a1, a2);
+#endif
+
+	port = a0 >> 4;
+
+	if (port == 0) {
+		memcpy(Mcd1Data + a1 * 128, Ra2, 128);
+		SaveMcd(Config.Mcd1, Mcd1Data, a1 * 128, 128);
+	} else {
+		memcpy(Mcd2Data + a1 * 128, Ra2, 128);
+		SaveMcd(Config.Mcd2, Mcd2Data, a1 * 128, 128);
+	}
+
+	DeliverEvent(0x11, 0x2); // 0xf0000011, 0x0004
+//	DeliverEvent(0x81, 0x2); // 0xf4000001, 0x0004
+
+	v0 = 1; pc0 = ra;
+}
+
+void psxBios__card_read() { // 0x4f
+	int port;
+
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s\n", biosB0n[0x4f]);
+#endif
+
+	port = a0 >> 4;
+
+	if (port == 0) {
+		memcpy(Ra2, Mcd1Data + a1 * 128, 128);
+	} else {
+		memcpy(Ra2, Mcd2Data + a1 * 128, 128);
+	}
+
+	DeliverEvent(0x11, 0x2); // 0xf0000011, 0x0004
+//	DeliverEvent(0x81, 0x2); // 0xf4000001, 0x0004
+
+	v0 = 1; pc0 = ra;
+}
+
+void psxBios__new_card() { // 0x50
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s\n", biosB0n[0x50]);
+#endif
+
+	pc0 = ra;
+}
+
+void psxBios_Krom2RawAdd() { // 0x51
+	int i = 0;
+
+	const u32 table_8140[][2] = {
+		{0x8140, 0x0000}, {0x8180, 0x0762}, {0x81ad, 0x0cc6}, {0x81b8, 0x0ca8},
+		{0x81c0, 0x0f00}, {0x81c8, 0x0d98}, {0x81cf, 0x10c2}, {0x81da, 0x0e6a},
+		{0x81e9, 0x13ce}, {0x81f0, 0x102c}, {0x81f8, 0x1590}, {0x81fc, 0x111c},
+		{0x81fd, 0x1626}, {0x824f, 0x113a}, {0x8259, 0x20ee}, {0x8260, 0x1266},
+		{0x827a, 0x24cc}, {0x8281, 0x1572}, {0x829b, 0x28aa}, {0x829f, 0x187e},
+		{0x82f2, 0x32dc}, {0x8340, 0x2238}, {0x837f, 0x4362}, {0x8380, 0x299a},
+		{0x8397, 0x4632}, {0x839f, 0x2c4c}, {0x83b7, 0x49f2}, {0x83bf, 0x2f1c},
+		{0x83d7, 0x4db2}, {0x8440, 0x31ec}, {0x8461, 0x5dde}, {0x8470, 0x35ca},
+		{0x847f, 0x6162}, {0x8480, 0x378c}, {0x8492, 0x639c}, {0x849f, 0x39a8},
+		{0xffff, 0}
+	};
+
+	const u32 table_889f[][2] = {
+		{0x889f, 0x3d68},  {0x8900, 0x40ec},  {0x897f, 0x4fb0},  {0x8a00, 0x56f4},
+		{0x8a7f, 0x65b8},  {0x8b00, 0x6cfc},  {0x8b7f, 0x7bc0},  {0x8c00, 0x8304},
+		{0x8c7f, 0x91c8},  {0x8d00, 0x990c},  {0x8d7f, 0xa7d0},  {0x8e00, 0xaf14},
+		{0x8e7f, 0xbdd8},  {0x8f00, 0xc51c},  {0x8f7f, 0xd3e0},  {0x9000, 0xdb24},
+		{0x907f, 0xe9e8},  {0x9100, 0xf12c},  {0x917f, 0xfff0},  {0x9200, 0x10734},
+		{0x927f, 0x115f8}, {0x9300, 0x11d3c}, {0x937f, 0x12c00}, {0x9400, 0x13344},
+		{0x947f, 0x14208}, {0x9500, 0x1494c}, {0x957f, 0x15810}, {0x9600, 0x15f54},
+		{0x967f, 0x16e18}, {0x9700, 0x1755c}, {0x977f, 0x18420}, {0x9800, 0x18b64},
+		{0xffff, 0}
+	};
+
+	if (a0 >= 0x8140 && a0 <= 0x84be) {
+		while (table_8140[i][0] <= a0) i++;
+		a0 -= table_8140[i - 1][0];
+		v0 = 0xbfc66000 + (a0 * 0x1e + table_8140[i - 1][1]);
+	} else if (a0 >= 0x889f && a0 <= 0x9872) {
+		while (table_889f[i][0] <= a0) i++;
+		a0 -= table_889f[i - 1][0];
+		v0 = 0xbfc66000 + (a0 * 0x1e + table_889f[i - 1][1]);
+	} else {
+		v0 = 0xffffffff;
+	}
+
+	pc0 = ra;
+}
+
+void psxBios_GetC0Table() { // 56
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s\n", biosB0n[0x56]);
+#endif
+
+	v0 = 0x674; pc0 = ra;
+}
+
+void psxBios_GetB0Table() { // 57
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s\n", biosB0n[0x57]);
+#endif
+
+	v0 = 0x874; pc0 = ra;
+}
+
+void psxBios_ChangeClearPad() { // 5b
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s: %x\n", biosB0n[0x5b], a0);
+#endif	
+
+	pc0 = ra;
+}
+
+/* System calls C0 */
+
+/*
+ * int SysEnqIntRP(int index , long *queue);
+ */
+
+void psxBios_SysEnqIntRP() { // 02
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s: %x\n", biosC0n[0x02] ,a0);
+#endif
+
+	SysIntRP[a0] = a1;
+
+	v0 = 0; pc0 = ra;
+}
+
+/*
+ * int SysDeqIntRP(int index , long *queue);
+ */
+
+void psxBios_SysDeqIntRP() { // 03
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s: %x\n", biosC0n[0x03], a0);
+#endif
+
+	SysIntRP[a0] = 0;
+
+	v0 = 0; pc0 = ra;
+}
+
+void psxBios_ChangeClearRCnt() { // 0a
+	u32 *ptr;
+
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("psxBios_%s: %x, %x\n", biosC0n[0x0a], a0, a1);
+#endif
+
+	ptr = (u32*)PSXM((a0 << 2) + 0x8600);
+	v0 = *ptr;
+	*ptr = a1;
+
+//	psxRegs.CP0.n.Status|= 0x404;
+	pc0 = ra;
+}
+
+void psxBios_dummy() { 
+#ifdef PSXBIOS_LOG
+	PSXBIOS_LOG("unk %x call: %x\n", pc0 & 0x1fffff, t1);
+#endif
+	pc0 = ra; 
+}
+
+void (*biosA0[256])();
+void (*biosB0[256])();
+void (*biosC0[256])();
+
+#include "sjisfont.h"
+
+void psxBiosInit() {
+	u32 base, size;
+	u32 *ptr; 
+	int i;
+	uLongf len;
+
+	for(i = 0; i < 256; i++) {
+		biosA0[i] = NULL;
+		biosB0[i] = NULL;
+		biosC0[i] = NULL;
+	}
+	biosA0[0x3e] = psxBios_puts;
+	biosA0[0x3f] = psxBios_printf;
+
+	biosB0[0x3d] = psxBios_putchar;
+	biosB0[0x3f] = psxBios_puts;
+
+	if (!Config.HLE) return;
+
+	for(i = 0; i < 256; i++) {
+		if (biosA0[i] == NULL) biosA0[i] = psxBios_dummy;
+		if (biosB0[i] == NULL) biosB0[i] = psxBios_dummy;
+		if (biosC0[i] == NULL) biosC0[i] = psxBios_dummy;
+	}
+
+	biosA0[0x00] = psxBios_open;
+	biosA0[0x01] = psxBios_lseek;
+	biosA0[0x02] = psxBios_read;
+	biosA0[0x03] = psxBios_write;
+	biosA0[0x04] = psxBios_close;
+	//biosA0[0x05] = psxBios_ioctl;
+	//biosA0[0x06] = psxBios_exit;
+	//biosA0[0x07] = psxBios_sys_a0_07;
+	//biosA0[0x08] = psxBios_getc;
+	//biosA0[0x09] = psxBios_putc;
+	//biosA0[0x0a] = psxBios_todigit;
+	//biosA0[0x0b] = psxBios_atof;
+	//biosA0[0x0c] = psxBios_strtoul;
+	//biosA0[0x0d] = psxBios_strtol;
+	biosA0[0x0e] = psxBios_abs;
+	biosA0[0x0f] = psxBios_labs;
+	biosA0[0x10] = psxBios_atoi;
+	biosA0[0x11] = psxBios_atol;
+	//biosA0[0x12] = psxBios_atob;
+	biosA0[0x13] = psxBios_setjmp;
+	biosA0[0x14] = psxBios_longjmp;
+	biosA0[0x15] = psxBios_strcat;
+	biosA0[0x16] = psxBios_strncat;
+	biosA0[0x17] = psxBios_strcmp;
+	biosA0[0x18] = psxBios_strncmp;
+	biosA0[0x19] = psxBios_strcpy;
+	biosA0[0x1a] = psxBios_strncpy;
+	biosA0[0x1b] = psxBios_strlen;
+	biosA0[0x1c] = psxBios_index;
+	biosA0[0x1d] = psxBios_rindex;
+	biosA0[0x1e] = psxBios_strchr;
+	biosA0[0x1f] = psxBios_strrchr;
+	biosA0[0x20] = psxBios_strpbrk;
+	biosA0[0x21] = psxBios_strspn;
+	biosA0[0x22] = psxBios_strcspn;
+	biosA0[0x23] = psxBios_strtok;
+	biosA0[0x24] = psxBios_strstr;
+	biosA0[0x25] = psxBios_toupper;
+	biosA0[0x26] = psxBios_tolower;
+	biosA0[0x27] = psxBios_bcopy;
+	biosA0[0x28] = psxBios_bzero;
+	biosA0[0x29] = psxBios_bcmp;
+	biosA0[0x2a] = psxBios_memcpy;
+	biosA0[0x2b] = psxBios_memset;
+	biosA0[0x2c] = psxBios_memmove;
+	biosA0[0x2d] = psxBios_memcmp;
+	biosA0[0x2e] = psxBios_memchr;
+	biosA0[0x2f] = psxBios_rand;
+	biosA0[0x30] = psxBios_srand;
+	biosA0[0x31] = psxBios_qsort;
+	//biosA0[0x32] = psxBios_strtod;
+	biosA0[0x33] = psxBios_malloc;
+	biosA0[0x34] = psxBios_free;
+	//biosA0[0x35] = psxBios_lsearch;
+	//biosA0[0x36] = psxBios_bsearch;
+	biosA0[0x37] = psxBios_calloc;
+	biosA0[0x38] = psxBios_realloc;
+	biosA0[0x39] = psxBios_InitHeap;
+	//biosA0[0x3a] = psxBios__exit;
+	biosA0[0x3b] = psxBios_getchar;
+	biosA0[0x3c] = psxBios_putchar;	
+	//biosA0[0x3d] = psxBios_gets;
+	//biosA0[0x40] = psxBios_sys_a0_40;
+	//biosA0[0x41] = psxBios_LoadTest;
+	biosA0[0x42] = psxBios_Load;
+	biosA0[0x43] = psxBios_Exec;
+	biosA0[0x44] = psxBios_FlushCache;
+	//biosA0[0x45] = psxBios_InstallInterruptHandler;
+	biosA0[0x46] = psxBios_GPU_dw;
+	biosA0[0x47] = psxBios_mem2vram;
+	biosA0[0x48] = psxBios_SendGPU;
+	biosA0[0x49] = psxBios_GPU_cw;
+	biosA0[0x4a] = psxBios_GPU_cwb;
+	biosA0[0x4b] = psxBios_GPU_SendPackets;
+	biosA0[0x4c] = psxBios_sys_a0_4c;
+	biosA0[0x4d] = psxBios_GPU_GetGPUStatus;
+	//biosA0[0x4e] = psxBios_GPU_sync;	
+	//biosA0[0x4f] = psxBios_sys_a0_4f;
+	//biosA0[0x50] = psxBios_sys_a0_50;
+	biosA0[0x51] = psxBios_LoadExec;
+	//biosA0[0x52] = psxBios_GetSysSp;
+	//biosA0[0x53] = psxBios_sys_a0_53;
+	//biosA0[0x54] = psxBios__96_init_a54;
+	//biosA0[0x55] = psxBios__bu_init_a55;
+	//biosA0[0x56] = psxBios__96_remove_a56;
+	//biosA0[0x57] = psxBios_sys_a0_57;
+	//biosA0[0x58] = psxBios_sys_a0_58;
+	//biosA0[0x59] = psxBios_sys_a0_59;
+	//biosA0[0x5a] = psxBios_sys_a0_5a;
+	//biosA0[0x5b] = psxBios_dev_tty_init;
+	//biosA0[0x5c] = psxBios_dev_tty_open;
+	//biosA0[0x5d] = psxBios_sys_a0_5d;
+	//biosA0[0x5e] = psxBios_dev_tty_ioctl;
+	//biosA0[0x5f] = psxBios_dev_cd_open;
+	//biosA0[0x60] = psxBios_dev_cd_read;
+	//biosA0[0x61] = psxBios_dev_cd_close;
+	//biosA0[0x62] = psxBios_dev_cd_firstfile;
+	//biosA0[0x63] = psxBios_dev_cd_nextfile;
+	//biosA0[0x64] = psxBios_dev_cd_chdir;
+	//biosA0[0x65] = psxBios_dev_card_open;
+	//biosA0[0x66] = psxBios_dev_card_read;
+	//biosA0[0x67] = psxBios_dev_card_write;
+	//biosA0[0x68] = psxBios_dev_card_close;
+	//biosA0[0x69] = psxBios_dev_card_firstfile;
+	//biosA0[0x6a] = psxBios_dev_card_nextfile;
+	//biosA0[0x6b] = psxBios_dev_card_erase;
+	//biosA0[0x6c] = psxBios_dev_card_undelete;
+	//biosA0[0x6d] = psxBios_dev_card_format;
+	//biosA0[0x6e] = psxBios_dev_card_rename;
+	//biosA0[0x6f] = psxBios_dev_card_6f;
+	biosA0[0x70] = psxBios__bu_init;
+	biosA0[0x71] = psxBios__96_init;
+	biosA0[0x72] = psxBios__96_remove;
+	//biosA0[0x73] = psxBios_sys_a0_73;
+	//biosA0[0x74] = psxBios_sys_a0_74;
+	//biosA0[0x75] = psxBios_sys_a0_75;
+	//biosA0[0x76] = psxBios_sys_a0_76;
+	//biosA0[0x77] = psxBios_sys_a0_77;
+	//biosA0[0x78] = psxBios__96_CdSeekL;
+	//biosA0[0x79] = psxBios_sys_a0_79;
+	//biosA0[0x7a] = psxBios_sys_a0_7a;
+	//biosA0[0x7b] = psxBios_sys_a0_7b;
+	//biosA0[0x7c] = psxBios__96_CdGetStatus;
+	//biosA0[0x7d] = psxBios_sys_a0_7d;
+	//biosA0[0x7e] = psxBios__96_CdRead;
+	//biosA0[0x7f] = psxBios_sys_a0_7f;
+	//biosA0[0x80] = psxBios_sys_a0_80;
+	//biosA0[0x81] = psxBios_sys_a0_81;
+	//biosA0[0x82] = psxBios_sys_a0_82;		
+	//biosA0[0x83] = psxBios_sys_a0_83;
+	//biosA0[0x84] = psxBios_sys_a0_84;
+	//biosA0[0x85] = psxBios__96_CdStop;	
+	//biosA0[0x86] = psxBios_sys_a0_86;
+	//biosA0[0x87] = psxBios_sys_a0_87;
+	//biosA0[0x88] = psxBios_sys_a0_88;
+	//biosA0[0x89] = psxBios_sys_a0_89;
+	//biosA0[0x8a] = psxBios_sys_a0_8a;
+	//biosA0[0x8b] = psxBios_sys_a0_8b;
+	//biosA0[0x8c] = psxBios_sys_a0_8c;
+	//biosA0[0x8d] = psxBios_sys_a0_8d;
+	//biosA0[0x8e] = psxBios_sys_a0_8e;
+	//biosA0[0x8f] = psxBios_sys_a0_8f;
+	//biosA0[0x90] = psxBios_sys_a0_90;
+	//biosA0[0x91] = psxBios_sys_a0_91;
+	//biosA0[0x92] = psxBios_sys_a0_92;
+	//biosA0[0x93] = psxBios_sys_a0_93;
+	//biosA0[0x94] = psxBios_sys_a0_94;
+	//biosA0[0x95] = psxBios_sys_a0_95;
+	//biosA0[0x96] = psxBios_AddCDROMDevice;
+	//biosA0[0x97] = psxBios_AddMemCardDevide;
+	//biosA0[0x98] = psxBios_DisableKernelIORedirection;
+	//biosA0[0x99] = psxBios_EnableKernelIORedirection;
+	//biosA0[0x9a] = psxBios_sys_a0_9a;
+	//biosA0[0x9b] = psxBios_sys_a0_9b;
+	//biosA0[0x9c] = psxBios_SetConf;
+	//biosA0[0x9d] = psxBios_GetConf;
+	//biosA0[0x9e] = psxBios_sys_a0_9e;
+	biosA0[0x9f] = psxBios_SetMem;
+	//biosA0[0xa0] = psxBios__boot;
+	//biosA0[0xa1] = psxBios_SystemError;
+	//biosA0[0xa2] = psxBios_EnqueueCdIntr;
+	//biosA0[0xa3] = psxBios_DequeueCdIntr;
+	//biosA0[0xa4] = psxBios_sys_a0_a4;
+	//biosA0[0xa5] = psxBios_ReadSector;
+	//biosA0[0xa6] = psxBios_get_cd_status;
+	//biosA0[0xa7] = psxBios_bufs_cb_0;
+	//biosA0[0xa8] = psxBios_bufs_cb_1;
+	//biosA0[0xa9] = psxBios_bufs_cb_2;
+	//biosA0[0xaa] = psxBios_bufs_cb_3;
+	biosA0[0xab] = psxBios__card_info;
+	biosA0[0xac] = psxBios__card_load;
+	//biosA0[0axd] = psxBios__card_auto;
+	//biosA0[0xae] = psxBios_bufs_cd_4;
+	//biosA0[0xaf] = psxBios_sys_a0_af;
+	//biosA0[0xb0] = psxBios_sys_a0_b0;
+	//biosA0[0xb1] = psxBios_sys_a0_b1;
+	//biosA0[0xb2] = psxBios_do_a_long_jmp
+	//biosA0[0xb3] = psxBios_sys_a0_b3;
+	//biosA0[0xb4] = psxBios_sub_function;
+//*******************B0 CALLS****************************
+	//biosB0[0x00] = psxBios_SysMalloc;
+	//biosB0[0x01] = psxBios_sys_b0_01;
+	biosB0[0x02] = psxBios_SetRCnt;
+	biosB0[0x03] = psxBios_GetRCnt;
+	biosB0[0x04] = psxBios_StartRCnt;
+	biosB0[0x05] = psxBios_StopRCnt;
+	biosB0[0x06] = psxBios_ResetRCnt;
+	biosB0[0x07] = psxBios_DeliverEvent;
+	biosB0[0x08] = psxBios_OpenEvent;
+	biosB0[0x09] = psxBios_CloseEvent;
+	biosB0[0x0a] = psxBios_WaitEvent;
+	biosB0[0x0b] = psxBios_TestEvent;
+	biosB0[0x0c] = psxBios_EnableEvent;
+	biosB0[0x0d] = psxBios_DisableEvent;
+	biosB0[0x0e] = psxBios_OpenTh;
+	biosB0[0x0f] = psxBios_CloseTh;
+	biosB0[0x10] = psxBios_ChangeTh;
+	//biosB0[0x11] = psxBios_psxBios_b0_11;
+	biosB0[0x12] = psxBios_InitPAD;
+	biosB0[0x13] = psxBios_StartPAD;
+	biosB0[0x14] = psxBios_StopPAD;
+	biosB0[0x15] = psxBios_PAD_init;
+	biosB0[0x16] = psxBios_PAD_dr;
+	biosB0[0x17] = psxBios_ReturnFromException;
+	biosB0[0x18] = psxBios_ResetEntryInt;
+	biosB0[0x19] = psxBios_HookEntryInt;
+	//biosB0[0x1a] = psxBios_sys_b0_1a;
+	//biosB0[0x1b] = psxBios_sys_b0_1b;
+	//biosB0[0x1c] = psxBios_sys_b0_1c;
+	//biosB0[0x1d] = psxBios_sys_b0_1d;
+	//biosB0[0x1e] = psxBios_sys_b0_1e;
+	//biosB0[0x1f] = psxBios_sys_b0_1f;
+	biosB0[0x20] = psxBios_UnDeliverEvent;
+	//biosB0[0x21] = psxBios_sys_b0_21;
+	//biosB0[0x22] = psxBios_sys_b0_22;
+	//biosB0[0x23] = psxBios_sys_b0_23;
+	//biosB0[0x24] = psxBios_sys_b0_24;
+	//biosB0[0x25] = psxBios_sys_b0_25;
+	//biosB0[0x26] = psxBios_sys_b0_26;
+	//biosB0[0x27] = psxBios_sys_b0_27;
+	//biosB0[0x28] = psxBios_sys_b0_28;
+	//biosB0[0x29] = psxBios_sys_b0_29;
+	//biosB0[0x2a] = psxBios_sys_b0_2a;
+	//biosB0[0x2b] = psxBios_sys_b0_2b;
+	//biosB0[0x2c] = psxBios_sys_b0_2c;
+	//biosB0[0x2d] = psxBios_sys_b0_2d;
+	//biosB0[0x2e] = psxBios_sys_b0_2e;
+	//biosB0[0x2f] = psxBios_sys_b0_2f;
+	//biosB0[0x30] = psxBios_sys_b0_30;
+	//biosB0[0x31] = psxBios_sys_b0_31;
+	biosB0[0x32] = psxBios_open;
+	biosB0[0x33] = psxBios_lseek;
+	biosB0[0x34] = psxBios_read;
+	biosB0[0x35] = psxBios_write;
+	biosB0[0x36] = psxBios_close;
+	//biosB0[0x37] = psxBios_ioctl;
+	//biosB0[0x38] = psxBios_exit;
+	//biosB0[0x39] = psxBios_sys_b0_39;
+	//biosB0[0x3a] = psxBios_getc;
+	//biosB0[0x3b] = psxBios_putc;
+	biosB0[0x3c] = psxBios_getchar;
+	//biosB0[0x3e] = psxBios_gets;
+	//biosB0[0x40] = psxBios_cd;
+	//biosB0[0x41] = psxBios_format;
+	biosB0[0x42] = psxBios_firstfile;
+	biosB0[0x43] = psxBios_nextfile;
+	biosB0[0x44] = psxBios_rename;
+	biosB0[0x45] = psxBios_delete;
+	//biosB0[0x46] = psxBios_undelete;
+	//biosB0[0x47] = psxBios_AddDevice;
+	//biosB0[0x48] = psxBios_RemoteDevice;
+	//biosB0[0x49] = psxBios_PrintInstalledDevices;
+	biosB0[0x4a] = psxBios_InitCARD;
+	biosB0[0x4b] = psxBios_StartCARD;
+	biosB0[0x4c] = psxBios_StopCARD;
+	//biosB0[0x4d] = psxBios_sys_b0_4d;
+	biosB0[0x4e] = psxBios__card_write;
+	biosB0[0x4f] = psxBios__card_read;
+	biosB0[0x50] = psxBios__new_card;
+	biosB0[0x51] = psxBios_Krom2RawAdd;
+	//biosB0[0x52] = psxBios_sys_b0_52;
+	//biosB0[0x53] = psxBios_sys_b0_53;
+	//biosB0[0x54] = psxBios__get_errno;
+	//biosB0[0x55] = psxBios__get_error;
+	biosB0[0x56] = psxBios_GetC0Table;
+	biosB0[0x57] = psxBios_GetB0Table;
+	//biosB0[0x58] = psxBios__card_chan;
+	//biosB0[0x59] = psxBios_sys_b0_59;
+	//biosB0[0x5a] = psxBios_sys_b0_5a;
+	biosB0[0x5b] = psxBios_ChangeClearPad;
+	//biosB0[0x5c] = psxBios__card_status;
+	//biosB0[0x5d] = psxBios__card_wait;
+//*******************C0 CALLS****************************
+	//biosC0[0x00] = psxBios_InitRCnt;
+	//biosC0[0x01] = psxBios_InitException;
+	biosC0[0x02] = psxBios_SysEnqIntRP;
+	biosC0[0x03] = psxBios_SysDeqIntRP;
+	//biosC0[0x04] = psxBios_get_free_EvCB_slot;
+	//biosC0[0x05] = psxBios_get_free_TCB_slot;
+	//biosC0[0x06] = psxBios_ExceptionHandler;
+	//biosC0[0x07] = psxBios_InstallExeptionHandler;
+	//biosC0[0x08] = psxBios_SysInitMemory;
+	//biosC0[0x09] = psxBios_SysInitKMem;
+	biosC0[0x0a] = psxBios_ChangeClearRCnt;	
+	//biosC0[0x0b] = psxBios_SystemError;
+	//biosC0[0x0c] = psxBios_InitDefInt;
+	//biosC0[0x0d] = psxBios_sys_c0_0d;
+	//biosC0[0x0e] = psxBios_sys_c0_0e;
+	//biosC0[0x0f] = psxBios_sys_c0_0f;
+	//biosC0[0x10] = psxBios_sys_c0_10;
+	//biosC0[0x11] = psxBios_sys_c0_11;
+	//biosC0[0x12] = psxBios_InstallDevices;
+	//biosC0[0x13] = psxBios_FlushStfInOutPut;
+	//biosC0[0x14] = psxBios_sys_c0_14;
+	//biosC0[0x15] = psxBios__cdevinput;
+	//biosC0[0x16] = psxBios__cdevscan;
+	//biosC0[0x17] = psxBios__circgetc;
+	//biosC0[0x18] = psxBios__circputc;
+	//biosC0[0x19] = psxBios_ioabort;
+	//biosC0[0x1a] = psxBios_sys_c0_1a
+	//biosC0[0x1b] = psxBios_KernelRedirect;
+	//biosC0[0x1c] = psxBios_PatchAOTable;
+//************** THE END ***************************************
+/**/
+	base = 0x1000;
+	size = sizeof(EvCB) * 32;
+	Event = (void *)&psxR[base]; base += size * 6;
+	memset(Event, 0, size * 6);
+	HwEV = Event;
+	EvEV = Event + 32;
+	RcEV = Event + 32 * 2;
+	UeEV = Event + 32 * 3;
+	SwEV = Event + 32 * 4;
+	ThEV = Event + 32 * 5;
+
+	ptr = (u32 *)&psxM[0x0874]; // b0 table
+	ptr[0] = SWAPu32(0x4c54 - 0x884);
+
+	ptr = (u32 *)&psxM[0x0674]; // c0 table
+	ptr[6] = SWAPu32(0xc80);
+
+	memset(SysIntRP, 0, sizeof(SysIntRP));
+	memset(Thread, 0, sizeof(Thread));
+	Thread[0].status = 2; // main thread
+
+	psxMu32ref(0x0150) = SWAPu32(0x160);
+	psxMu32ref(0x0154) = SWAPu32(0x320);
+	psxMu32ref(0x0160) = SWAPu32(0x248);
+	strcpy((char *)&psxM[0x248], "bu");
+/*	psxMu32ref(0x0ca8) = SWAPu32(0x1f410004);
+	psxMu32ref(0x0cf0) = SWAPu32(0x3c020000);
+	psxMu32ref(0x0cf4) = SWAPu32(0x2442641c);
+	psxMu32ref(0x09e0) = SWAPu32(0x43d0);
+	psxMu32ref(0x4d98) = SWAPu32(0x946f000a);
+*/
+	// opcode HLE
+	psxRu32ref(0x0000) = SWAPu32((0x3b << 26) | 4);
+	psxMu32ref(0x0000) = SWAPu32((0x3b << 26) | 0);
+	psxMu32ref(0x00a0) = SWAPu32((0x3b << 26) | 1);
+	psxMu32ref(0x00b0) = SWAPu32((0x3b << 26) | 2);
+	psxMu32ref(0x00c0) = SWAPu32((0x3b << 26) | 3);
+	psxMu32ref(0x4c54) = SWAPu32((0x3b << 26) | 0);
+	psxMu32ref(0x8000) = SWAPu32((0x3b << 26) | 5);
+	psxMu32ref(0x07a0) = SWAPu32((0x3b << 26) | 0);
+	psxMu32ref(0x0884) = SWAPu32((0x3b << 26) | 0);
+	psxMu32ref(0x0894) = SWAPu32((0x3b << 26) | 0);
+
+	// initial stack pointer for BIOS interrupt
+	psxMu32ref(0x6c80) = SWAPu32(0x000085c8);
+
+	// initial RNG seed
+	psxMu32ref(0x9010) = SWAPu32(0xac20cc00);
+
+	// fonts
+	len = 0x80000 - 0x66000;
+	uncompress((Bytef *)(psxR + 0x66000), &len, font_8140, sizeof(font_8140));
+	len = 0x80000 - 0x69d68;
+	uncompress((Bytef *)(psxR + 0x69d68), &len, font_889f, sizeof(font_889f));
+
+	// memory size 2 MB
+	psxHu32ref(0x1060) = SWAPu32(0x00000b88);
+
+	hleSoftCall = FALSE;
+}
+
+void psxBiosShutdown() {
+}
+
+#define psxBios_PADpoll(pad) { \
+	PAD##pad##_startPoll(pad); \
+	pad_buf##pad[0] = 0; \
+	pad_buf##pad[1] = PAD##pad##_poll(0x42); \
+	if (!(pad_buf##pad[1] & 0x0f)) { \
+		bufcount = 32; \
+	} else { \
+		bufcount = (pad_buf##pad[1] & 0x0f) * 2; \
+	} \
+	PAD##pad##_poll(0); \
+	i = 2; \
+	while (bufcount--) { \
+		pad_buf##pad[i++] = PAD##pad##_poll(0); \
+	} \
+}
+
+void biosInterrupt() {
+	int i, bufcount;
+
+//	if (psxHu32(0x1070) & 0x1) { // Vsync
+		if (pad_buf != NULL) {
+			u32 *buf = (u32*)pad_buf;
+
+			if (!Config.UseNet) {
+				PAD1_startPoll(1);
+				if (PAD1_poll(0x42) == 0x23) {
+					PAD1_poll(0);
+					*buf = PAD1_poll(0) << 8;
+					*buf |= PAD1_poll(0);
+					PAD1_poll(0);
+					*buf &= ~((PAD1_poll(0) > 0x20) ? 1 << 6 : 0);
+					*buf &= ~((PAD1_poll(0) > 0x20) ? 1 << 7 : 0);
+				} else {
+					PAD1_poll(0);
+					*buf = PAD1_poll(0) << 8;
+					*buf|= PAD1_poll(0);
+				}
+
+				PAD2_startPoll(2);
+				if (PAD2_poll(0x42) == 0x23) {
+					PAD2_poll(0);
+					*buf |= PAD2_poll(0) << 24;
+					*buf |= PAD2_poll(0) << 16;
+					PAD2_poll(0);
+					*buf &= ~((PAD2_poll(0) > 0x20) ? 1 << 22 : 0);
+					*buf &= ~((PAD2_poll(0) > 0x20) ? 1 << 23 : 0);
+				} else {
+					PAD2_poll(0);
+					*buf |= PAD2_poll(0) << 24;
+					*buf |= PAD2_poll(0) << 16;
+				}
+			} else {
+				u16 data;
+
+				PAD1_startPoll(1);
+				PAD1_poll(0x42);
+				PAD1_poll(0);
+				data = PAD1_poll(0) << 8;
+				data |= PAD1_poll(0);
+
+				if (NET_sendPadData(&data, 2) == -1)
+					netError();
+
+				if (NET_recvPadData(&((u16*)buf)[0], 1) == -1)
+					netError();
+				if (NET_recvPadData(&((u16*)buf)[1], 2) == -1)
+					netError();
+			}
+		}
+		if (Config.UseNet && pad_buf1 != NULL && pad_buf2 != NULL) {
+			psxBios_PADpoll(1);
+
+			if (NET_sendPadData(pad_buf1, i) == -1)
+				netError();
+
+			if (NET_recvPadData(pad_buf1, 1) == -1)
+				netError();
+			if (NET_recvPadData(pad_buf2, 2) == -1)
+				netError();
+		} else {
+			if (pad_buf1) {
+				psxBios_PADpoll(1);
+			}
+
+			if (pad_buf2) {
+				psxBios_PADpoll(2);
+			}
+		}
+
+	if (psxHu32(0x1070) & 0x1) { // Vsync
+		if (RcEV[3][1].status == EvStACTIVE) {
+			softCall(RcEV[3][1].fhandler);
+//			hwWrite32(0x1f801070, ~(1));
+		}
+	}
+
+	if (psxHu32(0x1070) & 0x70) { // Rcnt 0,1,2
+		int i;
+
+		for (i = 0; i < 3; i++) {
+			if (psxHu32(0x1070) & (1 << (i + 4))) {
+				if (RcEV[i][1].status == EvStACTIVE) {
+					softCall(RcEV[i][1].fhandler);
+				}
+				psxHwWrite32(0x1f801070, ~(1 << (i + 4)));
+			}
+		}
+	}
+}
+
+void psxBiosException() {
+	int i;
+
+	switch (psxRegs.CP0.n.Cause & 0x3c) {
+		case 0x00: // Interrupt
+#ifdef PSXCPU_LOG
+//			PSXCPU_LOG("interrupt\n");
+#endif
+			SaveRegs();
+
+			sp = psxMu32(0x6c80); // create new stack for interrupt handlers
+
+			biosInterrupt();
+
+			for (i = 0; i < 8; i++) {
+				if (SysIntRP[i]) {
+					u32 *queue = (u32 *)PSXM(SysIntRP[i]);
+
+					s0 = queue[2];
+					softCall(queue[1]);
+				}
+			}
+
+			if (jmp_int != NULL) {
+				int i;
+
+				psxHwWrite32(0x1f801070, 0xffffffff);
+
+				ra = jmp_int[0];
+				sp = jmp_int[1];
+				fp = jmp_int[2];
+				for (i = 0; i < 8; i++) // s0-s7
+					 psxRegs.GPR.r[16 + i] = jmp_int[3 + i];
+				gp = jmp_int[11];
+
+				v0 = 1;
+				pc0 = ra;
+				return;
+			}
+			psxHwWrite16(0x1f801070, 0);
+			break;
+
+		case 0x20: // Syscall
+#ifdef PSXCPU_LOG
+			PSXCPU_LOG("syscall exp %x\n", a0);
+#endif
+			switch (a0) {
+				case 1: // EnterCritical - disable irq's
+					psxRegs.CP0.n.Status &= ~0x404; 
+v0=1;	// HDHOSHY experimental patch: Spongebob, Coldblood, fearEffect, Medievil2, Martian Gothic
+					break;
+
+				case 2: // ExitCritical - enable irq's
+					psxRegs.CP0.n.Status |= 0x404; 
+					break;
+			}
+			pc0 = psxRegs.CP0.n.EPC + 4;
+
+			psxRegs.CP0.n.Status = (psxRegs.CP0.n.Status & 0xfffffff0) |
+								  ((psxRegs.CP0.n.Status & 0x3c) >> 2);
+			return;
+
+		default:
+#ifdef PSXCPU_LOG
+			PSXCPU_LOG("unknown bios exception!\n");
+#endif
+			break;
+	}
+
+	pc0 = psxRegs.CP0.n.EPC;
+	if (psxRegs.CP0.n.Cause & 0x80000000) pc0+=4;
+
+	psxRegs.CP0.n.Status = (psxRegs.CP0.n.Status & 0xfffffff0) |
+						  ((psxRegs.CP0.n.Status & 0x3c) >> 2);
+}
+
+#define bfreeze(ptr, size) { \
+	if (Mode == 1) memcpy(&psxR[base], ptr, size); \
+	if (Mode == 0) memcpy(ptr, &psxR[base], size); \
+	base += size; \
+}
+
+#define bfreezes(ptr) bfreeze(ptr, sizeof(ptr))
+#define bfreezel(ptr) bfreeze(ptr, sizeof(*ptr))
+
+#define bfreezepsxMptr(ptr, type) { \
+	if (Mode == 1) { \
+		if (ptr) psxRu32ref(base) = SWAPu32((s8 *)(ptr) - psxM); \
+		else psxRu32ref(base) = 0; \
+	} else { \
+		if (psxRu32(base) != 0) ptr = (type *)(psxM + psxRu32(base)); \
+		else (ptr) = NULL; \
+	} \
+	base += sizeof(u32); \
+}
+
+void psxBiosFreeze(int Mode) {
+	u32 base = 0x40000;
+
+	bfreezepsxMptr(jmp_int, u32);
+	bfreezepsxMptr(pad_buf, int);
+	bfreezepsxMptr(pad_buf1, char);
+	bfreezepsxMptr(pad_buf2, char);
+	bfreezepsxMptr(heap_addr, u32);
+	bfreezel(&pad_buf1len);
+	bfreezel(&pad_buf2len);
+	bfreezes(regs);
+	bfreezes(SysIntRP);
+	bfreezel(&CardState);
+	bfreezes(Thread);
+	bfreezel(&CurThread);
+	bfreezes(FDesc);
+}
diff --git a/libpcsxcore/psxbios.h b/libpcsxcore/psxbios.h
new file mode 100644
index 0000000..635b35a
--- /dev/null
+++ b/libpcsxcore/psxbios.h
@@ -0,0 +1,51 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+#ifndef __PSXBIOS_H__
+#define __PSXBIOS_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "psxcommon.h"
+#include "r3000a.h"
+#include "psxmem.h"
+#include "misc.h"
+#include "sio.h"
+
+extern char *biosA0n[256];
+extern char *biosB0n[256];
+extern char *biosC0n[256];
+
+void psxBiosInit();
+void psxBiosShutdown();
+void psxBiosException();
+void psxBiosFreeze(int Mode);
+
+extern void (*biosA0[256])();
+extern void (*biosB0[256])();
+extern void (*biosC0[256])();
+
+extern boolean hleSoftCall;
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/libpcsxcore/psxcommon.c b/libpcsxcore/psxcommon.c
new file mode 100644
index 0000000..f118c2d
--- /dev/null
+++ b/libpcsxcore/psxcommon.c
@@ -0,0 +1,76 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+#include "psxcommon.h"
+#include "r3000a.h"
+#include "psxbios.h"
+
+#include "cheat.h"
+#include "ppf.h"
+
+PcsxConfig Config;
+boolean NetOpened = FALSE;
+
+int Log = 0;
+FILE *emuLog = NULL;
+
+int EmuInit() {
+	return psxInit();
+}
+
+void EmuReset() {
+	FreeCheatSearchResults();
+	FreeCheatSearchMem();
+
+	psxReset();
+}
+
+void EmuShutdown() {
+	ClearAllCheats();
+	FreeCheatSearchResults();
+	FreeCheatSearchMem();
+
+	FreePPFCache();
+
+	psxShutdown();
+}
+
+void EmuUpdate() {
+	// Do not allow hotkeys inside a softcall from HLE BIOS
+	if (!Config.HLE || !hleSoftCall)
+		SysUpdate();
+
+	ApplyCheats();
+}
+
+void __Log(char *fmt, ...) {
+	va_list list;
+#ifdef LOG_STDOUT
+	char tmp[1024];
+#endif
+
+	va_start(list, fmt);
+#ifndef LOG_STDOUT
+	vfprintf(emuLog, fmt, list);
+#else
+	vsprintf(tmp, fmt, list);
+	SysPrintf(tmp);
+#endif
+	va_end(list);
+}
diff --git a/libpcsxcore/psxcommon.h b/libpcsxcore/psxcommon.h
new file mode 100644
index 0000000..500c44a
--- /dev/null
+++ b/libpcsxcore/psxcommon.h
@@ -0,0 +1,169 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+/* 
+* This file contains common definitions and includes for all parts of the 
+* emulator core.
+*/
+
+#ifndef __PSXCOMMON_H__
+#define __PSXCOMMON_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "config.h"
+
+// System includes
+#include <stdio.h>
+#include <string.h>
+#include <stdarg.h>
+#include <stdint.h>
+#include <stdlib.h>
+#include <math.h>
+#include <time.h>
+#include <ctype.h>
+#include <sys/types.h>
+#include <assert.h>
+#include <zlib.h>
+
+// Define types
+typedef int8_t s8;
+typedef int16_t s16;
+typedef int32_t s32;
+typedef int64_t s64;
+typedef intptr_t sptr;
+
+typedef uint8_t u8;
+typedef uint16_t u16;
+typedef uint32_t u32;
+typedef uint64_t u64;
+typedef uintptr_t uptr;
+
+typedef uint8_t boolean;
+
+#ifndef TRUE
+#define TRUE 1
+#endif
+
+#ifndef FALSE
+#define FALSE 0
+#endif
+
+// Local includes
+#include "system.h"
+#include "debug.h"
+
+#if defined (__LINUX__) || defined (__MACOSX__)
+#define strnicmp strncasecmp
+#endif
+#define __inline inline
+
+// Enables NLS/internationalization if active
+#ifdef ENABLE_NLS
+
+#include <libintl.h>
+
+#undef _
+#define _(String) gettext(String)
+#ifdef gettext_noop
+#  define N_(String) gettext_noop (String)
+#else
+#  define N_(String) (String)
+#endif
+
+#else
+
+#define _(msgid) msgid
+#define N_(msgid) msgid
+
+#endif
+
+extern FILE *emuLog;
+extern int Log;
+
+void __Log(char *fmt, ...);
+
+typedef struct {
+	char Gpu[MAXPATHLEN];
+	char Spu[MAXPATHLEN];
+	char Cdr[MAXPATHLEN];
+	char Pad1[MAXPATHLEN];
+	char Pad2[MAXPATHLEN];
+	char Net[MAXPATHLEN];
+    char Sio1[MAXPATHLEN];
+	char Mcd1[MAXPATHLEN];
+	char Mcd2[MAXPATHLEN];
+	char Bios[MAXPATHLEN];
+	char BiosDir[MAXPATHLEN];
+	char PluginsDir[MAXPATHLEN];
+	char PatchesDir[MAXPATHLEN];
+	boolean Xa;
+	boolean Sio;
+	boolean Mdec;
+	boolean PsxAuto;
+	boolean Cdda;
+	boolean HLE;
+	boolean Debug;
+	boolean PsxOut;
+	boolean SpuIrq;
+	boolean RCntFix;
+	boolean UseNet;
+	boolean VSyncWA;
+	u8 Cpu; // CPU_DYNAREC or CPU_INTERPRETER
+	u8 PsxType; // PSX_TYPE_NTSC or PSX_TYPE_PAL
+#ifdef _WIN32
+	char Lang[256];
+#endif
+} PcsxConfig;
+
+extern PcsxConfig Config;
+extern boolean NetOpened;
+
+#define gzfreeze(ptr, size) { \
+	if (Mode == 1) gzwrite(f, ptr, size); \
+	if (Mode == 0) gzread(f, ptr, size); \
+}
+
+// Make the timing events trigger faster as we are currently assuming everything
+// takes one cycle, which is not the case on real hardware.
+// FIXME: Count the proper cycle and get rid of this
+#define BIAS	2
+#define PSXCLK	33868800	/* 33.8688 MHz */
+
+enum {
+	PSX_TYPE_NTSC = 0,
+	PSX_TYPE_PAL
+}; // PSX Types
+
+enum {
+	CPU_DYNAREC = 0,
+	CPU_INTERPRETER
+}; // CPU Types
+
+int EmuInit();
+void EmuReset();
+void EmuShutdown();
+void EmuUpdate();
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/libpcsxcore/psxcounters.c b/libpcsxcore/psxcounters.c
new file mode 100644
index 0000000..ebfe629
--- /dev/null
+++ b/libpcsxcore/psxcounters.c
@@ -0,0 +1,480 @@
+/***************************************************************************
+ *   Copyright (C) 2010 by Blade_Arma                                      *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+/*
+ * Internal PSX counters.
+ */
+
+#include "psxcounters.h"
+
+/******************************************************************************/
+
+typedef struct Rcnt
+{
+    u16 mode, target;
+    u32 rate, irq, counterState, irqState;
+    u32 cycle, cycleStart;
+} Rcnt;
+
+enum
+{
+    Rc0Gate           = 0x0001, // 0    not implemented
+    Rc1Gate           = 0x0001, // 0    not implemented
+    Rc2Disable        = 0x0001, // 0    partially implemented
+    RcUnknown1        = 0x0002, // 1    ?
+    RcUnknown2        = 0x0004, // 2    ?
+    RcCountToTarget   = 0x0008, // 3
+    RcIrqOnTarget     = 0x0010, // 4
+    RcIrqOnOverflow   = 0x0020, // 5
+    RcIrqRegenerate   = 0x0040, // 6
+    RcUnknown7        = 0x0080, // 7    ?
+    Rc0PixelClock     = 0x0100, // 8    fake implementation
+    Rc1HSyncClock     = 0x0100, // 8
+    Rc2Unknown8       = 0x0100, // 8    ?
+    Rc0Unknown9       = 0x0200, // 9    ?
+    Rc1Unknown9       = 0x0200, // 9    ?
+    Rc2OneEighthClock = 0x0200, // 9
+    RcUnknown10       = 0x0400, // 10   ?
+    RcCountEqTarget   = 0x0800, // 11
+    RcOverflow        = 0x1000, // 12
+    RcUnknown13       = 0x2000, // 13   ? (always zero)
+    RcUnknown14       = 0x4000, // 14   ? (always zero)
+    RcUnknown15       = 0x8000, // 15   ? (always zero)
+};
+
+#define CounterQuantity           ( 4 )
+//static const u32 CounterQuantity  = 4;
+
+static const u32 CountToOverflow  = 0;
+static const u32 CountToTarget    = 1;
+
+static const u32 FrameRate[]      = { 60, 50 };
+static const u32 VBlankStart[]    = { 240, 256 };
+static const u32 HSyncTotal[]     = { 262, 312 };
+static const u32 SpuUpdInterval[] = { 23, 22 };
+
+static const s32 VerboseLevel     = 0;
+
+/******************************************************************************/
+
+static Rcnt rcnts[ CounterQuantity ];
+
+static u32 hSyncCount = 0;
+static u32 spuSyncCount = 0;
+
+u32 psxNextCounter = 0, psxNextsCounter = 0;
+
+/******************************************************************************/
+
+static inline
+void setIrq( u32 irq )
+{
+    psxHu32ref(0x1070) |= SWAPu32(irq);
+}
+
+static
+void verboseLog( s32 level, const char *str, ... )
+{
+    if( level <= VerboseLevel )
+    {
+        va_list va;
+        char buf[ 4096 ];
+
+        va_start( va, str );
+        vsprintf( buf, str, va );
+        va_end( va );
+
+        printf( buf );
+        fflush( stdout );
+    }
+}
+
+/******************************************************************************/
+
+static inline
+void _psxRcntWcount( u32 index, u32 value )
+{
+    if( value > 0xffff )
+    {
+        verboseLog( 1, "[RCNT %i] wcount > 0xffff: %x\n", index, value );
+        value &= 0xffff;
+    }
+
+    rcnts[index].cycleStart  = psxRegs.cycle;
+    rcnts[index].cycleStart -= value * rcnts[index].rate;
+
+    // TODO: <=.
+    if( value < rcnts[index].target )
+    {
+        rcnts[index].cycle = rcnts[index].target * rcnts[index].rate;
+        rcnts[index].counterState = CountToTarget;
+    }
+    else
+    {
+        rcnts[index].cycle = 0xffff * rcnts[index].rate;
+        rcnts[index].counterState = CountToOverflow;
+    }
+}
+
+static inline
+u32 _psxRcntRcount( u32 index )
+{
+    u32 count;
+
+    count  = psxRegs.cycle;
+    count -= rcnts[index].cycleStart;
+    count /= rcnts[index].rate;
+
+    if( count > 0xffff )
+    {
+        verboseLog( 1, "[RCNT %i] rcount > 0xffff: %x\n", index, count );
+        count &= 0xffff;
+    }
+
+    return count;
+}
+
+/******************************************************************************/
+
+static
+void psxRcntSet()
+{
+    s32 countToUpdate;
+    u32 i;
+
+    psxNextsCounter = psxRegs.cycle;
+    psxNextCounter  = 0x7fffffff;
+
+    for( i = 0; i < CounterQuantity; ++i )
+    {
+        countToUpdate = rcnts[i].cycle - (psxNextsCounter - rcnts[i].cycleStart);
+
+        if( countToUpdate < 0 )
+        {
+            psxNextCounter = 0;
+            break;
+        }
+
+        if( countToUpdate < (s32)psxNextCounter )
+        {
+            psxNextCounter = countToUpdate;
+        }
+    }
+}
+
+/******************************************************************************/
+
+static
+void psxRcntReset( u32 index )
+{
+    u32 count;
+
+    if( rcnts[index].counterState == CountToTarget )
+    {
+        if( rcnts[index].mode & RcCountToTarget )
+        {
+            count  = psxRegs.cycle;
+            count -= rcnts[index].cycleStart;
+            count /= rcnts[index].rate;
+            count -= rcnts[index].target;
+        }
+        else
+        {
+            count = _psxRcntRcount( index );
+        }
+
+        _psxRcntWcount( index, count );
+
+        if( rcnts[index].mode & RcIrqOnTarget )
+        {
+            if( (rcnts[index].mode & RcIrqRegenerate) || (!rcnts[index].irqState) )
+            {
+                verboseLog( 3, "[RCNT %i] irq: %x\n", index, count );
+                setIrq( rcnts[index].irq );
+                rcnts[index].irqState = 1;
+            }
+        }
+
+        rcnts[index].mode |= RcCountEqTarget;
+    }
+    else if( rcnts[index].counterState == CountToOverflow )
+    {
+        count  = psxRegs.cycle;
+        count -= rcnts[index].cycleStart;
+        count /= rcnts[index].rate;
+        count -= 0xffff;
+
+        _psxRcntWcount( index, count );
+
+        if( rcnts[index].mode & RcIrqOnOverflow )
+        {
+            if( (rcnts[index].mode & RcIrqRegenerate) || (!rcnts[index].irqState) )
+            {
+                verboseLog( 3, "[RCNT %i] irq: %x\n", index, count );
+                setIrq( rcnts[index].irq );
+                rcnts[index].irqState = 1;
+            }
+        }
+
+        rcnts[index].mode |= RcOverflow;
+    }
+
+    rcnts[index].mode |= RcUnknown10;
+
+    psxRcntSet();
+}
+
+void psxRcntUpdate()
+{
+    u32 cycle;
+
+    cycle = psxRegs.cycle;
+
+    // rcnt 0.
+    if( cycle - rcnts[0].cycleStart >= rcnts[0].cycle )
+    {
+        psxRcntReset( 0 );
+    }
+
+    // rcnt 1.
+    if( cycle - rcnts[1].cycleStart >= rcnts[1].cycle )
+    {
+        psxRcntReset( 1 );
+    }
+
+    // rcnt 2.
+    if( cycle - rcnts[2].cycleStart >= rcnts[2].cycle )
+    {
+        psxRcntReset( 2 );
+    }
+
+    // rcnt base.
+    if( cycle - rcnts[3].cycleStart >= rcnts[3].cycle )
+    {
+        psxRcntReset( 3 );
+
+        spuSyncCount++;
+        hSyncCount++;
+
+        // Update spu.
+        if( spuSyncCount >= SpuUpdInterval[Config.PsxType] )
+        {
+            spuSyncCount = 0;
+
+            if( SPU_async )
+            {
+                SPU_async( SpuUpdInterval[Config.PsxType] * rcnts[3].target );
+            }
+        }
+        
+        // VSync irq.
+        if( hSyncCount == VBlankStart[Config.PsxType] )
+        {
+            GPU_vBlank( 1 );
+            
+            // For the best times. :D
+            //setIrq( 0x01 );
+        }
+        
+        // Update lace. (with InuYasha fix)
+        if( hSyncCount >= (Config.VSyncWA ? HSyncTotal[Config.PsxType] / BIAS : HSyncTotal[Config.PsxType]) )
+        {
+            hSyncCount = 0;
+
+            GPU_vBlank( 0 );
+            setIrq( 0x01 );
+
+            GPU_updateLace();
+            EmuUpdate();
+        }
+    }
+
+    DebugVSync();
+}
+
+/******************************************************************************/
+
+void psxRcntWcount( u32 index, u32 value )
+{
+    verboseLog( 2, "[RCNT %i] wcount: %x\n", index, value );
+
+    psxRcntUpdate();
+
+    _psxRcntWcount( index, value );
+    psxRcntSet();
+}
+
+void psxRcntWmode( u32 index, u32 value )
+{
+    verboseLog( 1, "[RCNT %i] wmode: %x\n", index, value );
+
+    psxRcntUpdate();
+
+    rcnts[index].mode = value;
+    rcnts[index].irqState = 0;
+
+    switch( index )
+    {
+        case 0:
+            if( value & Rc0PixelClock )
+            {
+                rcnts[index].rate = 5;
+            }
+            else
+            {
+                rcnts[index].rate = 1;
+            }
+        break;
+        case 1:
+            if( value & Rc1HSyncClock )
+            {
+                rcnts[index].rate = (PSXCLK / (FrameRate[Config.PsxType] * HSyncTotal[Config.PsxType]));
+            }
+            else
+            {
+                rcnts[index].rate = 1;
+            }
+        break;
+        case 2:
+            if( value & Rc2OneEighthClock )
+            {
+                rcnts[index].rate = 8;
+            }
+            else
+            {
+                rcnts[index].rate = 1;
+            }
+
+            // TODO: wcount must work.
+            if( value & Rc2Disable )
+            {
+                rcnts[index].rate = 0xffffffff;
+            }
+        break;
+    }
+
+    _psxRcntWcount( index, 0 );
+    psxRcntSet();
+}
+
+void psxRcntWtarget( u32 index, u32 value )
+{
+    verboseLog( 1, "[RCNT %i] wtarget: %x\n", index, value );
+
+    psxRcntUpdate();
+
+    rcnts[index].target = value;
+
+    _psxRcntWcount( index, _psxRcntRcount( index ) );
+    psxRcntSet();
+}
+
+/******************************************************************************/
+
+u32 psxRcntRcount( u32 index )
+{
+    u32 count;
+
+    psxRcntUpdate();
+
+    count = _psxRcntRcount( index );
+
+    // Parasite Eve 2 fix.
+    if( Config.RCntFix )
+    {
+        if( index == 2 )
+        {
+            if( rcnts[index].counterState == CountToTarget )
+            {
+                count /= BIAS;
+            }
+        }
+    }
+
+    verboseLog( 2, "[RCNT %i] rcount: %x\n", index, count );
+
+    return count;
+}
+
+u32 psxRcntRmode( u32 index )
+{
+    u16 mode;
+
+    psxRcntUpdate();
+
+    mode = rcnts[index].mode;
+    rcnts[index].mode &= 0xe7ff;
+
+    verboseLog( 2, "[RCNT %i] rmode: %x\n", index, mode );
+
+    return mode;
+}
+
+u32 psxRcntRtarget( u32 index )
+{
+    verboseLog( 2, "[RCNT %i] rtarget: %x\n", index, rcnts[index].target );
+
+    return rcnts[index].target;
+}
+
+/******************************************************************************/
+
+void psxRcntInit()
+{
+    s32 i;
+
+    // rcnt 0.
+    rcnts[0].rate   = 1;
+    rcnts[0].irq    = 0x10;
+
+    // rcnt 1.
+    rcnts[1].rate   = 1;
+    rcnts[1].irq    = 0x20;
+
+    // rcnt 2.
+    rcnts[2].rate   = 1;
+    rcnts[2].irq    = 0x40;
+
+    // rcnt base.
+    rcnts[3].rate   = 1;
+    rcnts[3].mode   = RcCountToTarget;
+    rcnts[3].target = (PSXCLK / (FrameRate[Config.PsxType] * HSyncTotal[Config.PsxType]));
+
+    for( i = 0; i < CounterQuantity; ++i )
+    {
+        _psxRcntWcount( i, 0 );
+    }
+
+    psxRcntSet();
+}
+
+/******************************************************************************/
+
+s32 psxRcntFreeze( gzFile f, s32 Mode )
+{
+    gzfreeze( &rcnts, sizeof(rcnts) );
+    gzfreeze( &hSyncCount, sizeof(hSyncCount) );
+    gzfreeze( &spuSyncCount, sizeof(spuSyncCount) );
+    gzfreeze( &psxNextCounter, sizeof(psxNextCounter) );
+    gzfreeze( &psxNextsCounter, sizeof(psxNextsCounter) );
+
+    return 0;
+}
+
+/******************************************************************************/
diff --git a/libpcsxcore/psxcounters.h b/libpcsxcore/psxcounters.h
new file mode 100644
index 0000000..bccb2e4
--- /dev/null
+++ b/libpcsxcore/psxcounters.h
@@ -0,0 +1,50 @@
+/***************************************************************************
+ *   Copyright (C) 2010 by Blade_Arma                                      *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+#ifndef __PSXCOUNTERS_H__
+#define __PSXCOUNTERS_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "psxcommon.h"
+#include "r3000a.h"
+#include "psxmem.h"
+#include "plugins.h"
+
+extern u32 psxNextCounter, psxNextsCounter;
+
+void psxRcntInit();
+void psxRcntUpdate();
+
+void psxRcntWcount(u32 index, u32 value);
+void psxRcntWmode(u32 index, u32 value);
+void psxRcntWtarget(u32 index, u32 value);
+
+u32 psxRcntRcount(u32 index);
+u32 psxRcntRmode(u32 index);
+u32 psxRcntRtarget(u32 index);
+
+s32 psxRcntFreeze(gzFile f, s32 Mode);
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/libpcsxcore/psxdma.c b/libpcsxcore/psxdma.c
new file mode 100644
index 0000000..f59f268
--- /dev/null
+++ b/libpcsxcore/psxdma.c
@@ -0,0 +1,174 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+/*
+* Handles PSX DMA functions.
+*/
+
+#include "psxdma.h"
+
+// Dma0/1 in Mdec.c
+// Dma3   in CdRom.c
+
+void spuInterrupt() {
+	HW_DMA4_CHCR &= SWAP32(~0x01000000);
+	DMA_INTERRUPT(4);
+}
+
+void psxDma4(u32 madr, u32 bcr, u32 chcr) { // SPU
+	u16 *ptr;
+	u32 size;
+
+	switch (chcr) {
+		case 0x01000201: //cpu to spu transfer
+#ifdef PSXDMA_LOG
+			PSXDMA_LOG("*** DMA4 SPU - mem2spu *** %x addr = %x size = %x\n", chcr, madr, bcr);
+#endif
+			ptr = (u16 *)PSXM(madr);
+			if (ptr == NULL) {
+#ifdef CPU_LOG
+				CPU_LOG("*** DMA4 SPU - mem2spu *** NULL Pointer!!!\n");
+#endif
+				break;
+			}
+			SPU_writeDMAMem(ptr, (bcr >> 16) * (bcr & 0xffff) * 2);
+			SPUDMA_INT((bcr >> 16) * (bcr & 0xffff) / 2);
+			return;
+
+		case 0x01000200: //spu to cpu transfer
+#ifdef PSXDMA_LOG
+			PSXDMA_LOG("*** DMA4 SPU - spu2mem *** %x addr = %x size = %x\n", chcr, madr, bcr);
+#endif
+			ptr = (u16 *)PSXM(madr);
+			if (ptr == NULL) {
+#ifdef CPU_LOG
+				CPU_LOG("*** DMA4 SPU - spu2mem *** NULL Pointer!!!\n");
+#endif
+				break;
+			}
+			size = (bcr >> 16) * (bcr & 0xffff) * 2;
+			SPU_readDMAMem(ptr, size);
+			psxCpu->Clear(madr, size);
+			break;
+
+#ifdef PSXDMA_LOG
+		default:
+			PSXDMA_LOG("*** DMA4 SPU - unknown *** %x addr = %x size = %x\n", chcr, madr, bcr);
+			break;
+#endif
+	}
+
+	HW_DMA4_CHCR &= SWAP32(~0x01000000);
+	DMA_INTERRUPT(4);
+}
+
+void psxDma2(u32 madr, u32 bcr, u32 chcr) { // GPU
+	u32 *ptr;
+	u32 size;
+
+	switch(chcr) {
+		case 0x01000200: // vram2mem
+#ifdef PSXDMA_LOG
+			PSXDMA_LOG("*** DMA2 GPU - vram2mem *** %x addr = %x size = %x\n", chcr, madr, bcr);
+#endif
+			ptr = (u32 *)PSXM(madr);
+			if (ptr == NULL) {
+#ifdef CPU_LOG
+				CPU_LOG("*** DMA2 GPU - vram2mem *** NULL Pointer!!!\n");
+#endif
+				break;
+			}
+			size = (bcr >> 16) * (bcr & 0xffff);
+			GPU_readDataMem(ptr, size);
+			psxCpu->Clear(madr, size);
+			break;
+
+		case 0x01000201: // mem2vram
+#ifdef PSXDMA_LOG
+			PSXDMA_LOG("*** DMA 2 - GPU mem2vram *** %x addr = %x size = %x\n", chcr, madr, bcr);
+#endif
+			ptr = (u32 *)PSXM(madr);
+			if (ptr == NULL) {
+#ifdef CPU_LOG
+				CPU_LOG("*** DMA2 GPU - mem2vram *** NULL Pointer!!!\n");
+#endif
+				break;
+			}
+			size = (bcr >> 16) * (bcr & 0xffff);
+			GPU_writeDataMem(ptr, size);
+			GPUDMA_INT(size / 4);
+			return;
+
+		case 0x01000401: // dma chain
+#ifdef PSXDMA_LOG
+			PSXDMA_LOG("*** DMA 2 - GPU dma chain *** %x addr = %x size = %x\n", chcr, madr, bcr);
+#endif
+			GPU_dmaChain((u32 *)psxM, madr & 0x1fffff);
+			break;
+
+#ifdef PSXDMA_LOG
+		default:
+			PSXDMA_LOG("*** DMA 2 - GPU unknown *** %x addr = %x size = %x\n", chcr, madr, bcr);
+			break;
+#endif
+	}
+
+	HW_DMA2_CHCR &= SWAP32(~0x01000000);
+	DMA_INTERRUPT(2);
+}
+
+void gpuInterrupt() {
+	HW_DMA2_CHCR &= SWAP32(~0x01000000);
+	DMA_INTERRUPT(2);
+}
+
+void psxDma6(u32 madr, u32 bcr, u32 chcr) {
+	u32 *mem = (u32 *)PSXM(madr);
+
+#ifdef PSXDMA_LOG
+	PSXDMA_LOG("*** DMA6 OT *** %x addr = %x size = %x\n", chcr, madr, bcr);
+#endif
+
+	if (chcr == 0x11000002) {
+		if (mem == NULL) {
+#ifdef CPU_LOG
+			CPU_LOG("*** DMA6 OT *** NULL Pointer!!!\n");
+#endif
+			HW_DMA6_CHCR &= SWAP32(~0x01000000);
+			DMA_INTERRUPT(6);
+			return;
+		}
+
+		while (bcr--) {
+			*mem-- = SWAP32((madr - 4) & 0xffffff);
+			madr -= 4;
+		}
+		mem++; *mem = 0xffffff;
+	}
+#ifdef PSXDMA_LOG
+	else {
+		// Unknown option
+		PSXDMA_LOG("*** DMA6 OT - unknown *** %x addr = %x size = %x\n", chcr, madr, bcr);
+	}
+#endif
+
+	HW_DMA6_CHCR &= SWAP32(~0x01000000);
+	DMA_INTERRUPT(6);
+}
+
diff --git a/libpcsxcore/psxdma.h b/libpcsxcore/psxdma.h
new file mode 100644
index 0000000..0db6533
--- /dev/null
+++ b/libpcsxcore/psxdma.h
@@ -0,0 +1,60 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+#ifndef __PSXDMA_H__
+#define __PSXDMA_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "psxcommon.h"
+#include "r3000a.h"
+#include "psxhw.h"
+#include "psxmem.h"
+
+#define GPUDMA_INT(eCycle) { \
+	psxRegs.interrupt |= 0x01000000; \
+	psxRegs.intCycle[3 + 24 + 1] = eCycle; \
+	psxRegs.intCycle[3 + 24] = psxRegs.cycle; \
+}
+
+#define SPUDMA_INT(eCycle) { \
+    psxRegs.interrupt |= 0x04000000; \
+    psxRegs.intCycle[1 + 24 + 1] = eCycle; \
+    psxRegs.intCycle[1 + 24] = psxRegs.cycle; \
+}
+
+#define MDECOUTDMA_INT(eCycle) { \
+	psxRegs.interrupt |= 0x02000000; \
+	psxRegs.intCycle[5 + 24 + 1] = eCycle; \
+	psxRegs.intCycle[5 + 24] = psxRegs.cycle; \
+}
+
+void psxDma2(u32 madr, u32 bcr, u32 chcr);
+void psxDma3(u32 madr, u32 bcr, u32 chcr);
+void psxDma4(u32 madr, u32 bcr, u32 chcr);
+void psxDma6(u32 madr, u32 bcr, u32 chcr);
+void gpuInterrupt();
+void spuInterrupt();
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/libpcsxcore/psxhle.c b/libpcsxcore/psxhle.c
new file mode 100644
index 0000000..83362ec
--- /dev/null
+++ b/libpcsxcore/psxhle.c
@@ -0,0 +1,96 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+/*
+* Internal PSX HLE functions.
+*/
+
+#include "psxhle.h"
+
+static void hleDummy() {
+	psxRegs.pc = psxRegs.GPR.n.ra;
+
+	psxBranchTest();
+}
+
+static void hleA0() {
+	u32 call = psxRegs.GPR.n.t1 & 0xff;
+
+	if (biosA0[call]) biosA0[call]();
+
+	psxBranchTest();
+}
+
+static void hleB0() {
+	u32 call = psxRegs.GPR.n.t1 & 0xff;
+
+	if (biosB0[call]) biosB0[call]();
+
+	psxBranchTest();
+}
+
+static void hleC0() {
+	u32 call = psxRegs.GPR.n.t1 & 0xff;
+
+	if (biosC0[call]) biosC0[call]();
+
+	psxBranchTest();
+}
+
+static void hleBootstrap() { // 0xbfc00000
+	SysPrintf("hleBootstrap\n");
+	CheckCdrom();
+	LoadCdrom();
+	SysPrintf("CdromLabel: \"%s\": PC = %8.8lx (SP = %8.8lx)\n", CdromLabel, psxRegs.pc, psxRegs.GPR.n.sp);
+}
+
+typedef struct {                   
+	u32 _pc0;      
+	u32 gp0;      
+	u32 t_addr;   
+	u32 t_size;   
+	u32 d_addr;   
+	u32 d_size;   
+	u32 b_addr;   
+	u32 b_size;   
+	u32 S_addr;
+	u32 s_size;
+	u32 _sp,_fp,_gp,ret,base;
+} EXEC;
+
+static void hleExecRet() {
+	EXEC *header = (EXEC*)PSXM(psxRegs.GPR.n.s0);
+
+	SysPrintf("ExecRet %x: %x\n", psxRegs.GPR.n.s0, header->ret);
+
+	psxRegs.GPR.n.ra = header->ret;
+	psxRegs.GPR.n.sp = header->_sp;
+	psxRegs.GPR.n.s8 = header->_fp;
+	psxRegs.GPR.n.gp = header->_gp;
+	psxRegs.GPR.n.s0 = header->base;
+
+	psxRegs.GPR.n.v0 = 1;
+	psxRegs.pc = psxRegs.GPR.n.ra;
+}
+
+void (*psxHLEt[256])() = {
+	hleDummy, hleA0, hleB0, hleC0,
+	hleBootstrap, hleExecRet,
+	hleDummy, hleDummy
+};
diff --git a/libpcsxcore/psxhle.h b/libpcsxcore/psxhle.h
new file mode 100644
index 0000000..eef78e8
--- /dev/null
+++ b/libpcsxcore/psxhle.h
@@ -0,0 +1,36 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+#ifndef __PSXHLE_H__
+#define __PSXHLE_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "psxcommon.h"
+#include "r3000a.h"
+#include "plugins.h"
+
+extern void (*psxHLEt[256])();
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/libpcsxcore/psxhw.c b/libpcsxcore/psxhw.c
new file mode 100644
index 0000000..9123f76
--- /dev/null
+++ b/libpcsxcore/psxhw.c
@@ -0,0 +1,741 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+/*
+* Functions for PSX hardware control.
+*/
+
+#include "psxhw.h"
+#include "mdec.h"
+#include "cdrom.h"
+
+void psxHwReset() {
+	if (Config.Sio) psxHu32ref(0x1070) |= SWAP32(0x80);
+	if (Config.SpuIrq) psxHu32ref(0x1070) |= SWAP32(0x200);
+
+	memset(psxH, 0, 0x10000);
+
+	mdecInit(); // initialize mdec decoder
+	cdrReset();
+	psxRcntInit();
+}
+
+u8 psxHwRead8(u32 add) {
+	unsigned char hard;
+
+	switch (add) {
+		case 0x1f801040: hard = sioRead8();break; 
+#ifdef ENABLE_SIO1API
+		case 0x1f801050: hard = SIO1_readData8(); break;
+#endif
+		case 0x1f801800: hard = cdrRead0(); break;
+		case 0x1f801801: hard = cdrRead1(); break;
+		case 0x1f801802: hard = cdrRead2(); break;
+		case 0x1f801803: hard = cdrRead3(); break;
+		default:
+			hard = psxHu8(add); 
+#ifdef PSXHW_LOG
+			PSXHW_LOG("*Unkwnown 8bit read at address %x\n", add);
+#endif
+			return hard;
+	}
+
+#ifdef PSXHW_LOG
+	PSXHW_LOG("*Known 8bit read at address %x value %x\n", add, hard);
+#endif
+	return hard;
+}
+
+u16 psxHwRead16(u32 add) {
+	unsigned short hard;
+
+	switch (add) {
+#ifdef PSXHW_LOG
+		case 0x1f801070: PSXHW_LOG("IREG 16bit read %x\n", psxHu16(0x1070));
+			return psxHu16(0x1070);
+#endif
+#ifdef PSXHW_LOG
+		case 0x1f801074: PSXHW_LOG("IMASK 16bit read %x\n", psxHu16(0x1074));
+			return psxHu16(0x1074);
+#endif
+
+		case 0x1f801040:
+			hard = sioRead8();
+			hard|= sioRead8() << 8;
+#ifdef PAD_LOG
+			PAD_LOG("sio read16 %x; ret = %x\n", add&0xf, hard);
+#endif
+			return hard;
+		case 0x1f801044:
+			hard = sioReadStat16();
+#ifdef PAD_LOG
+			PAD_LOG("sio read16 %x; ret = %x\n", add&0xf, hard);
+#endif
+			return hard;
+		case 0x1f801048:
+			hard = sioReadMode16();
+#ifdef PAD_LOG
+			PAD_LOG("sio read16 %x; ret = %x\n", add&0xf, hard);
+#endif
+			return hard;
+		case 0x1f80104a:
+			hard = sioReadCtrl16();
+#ifdef PAD_LOG
+			PAD_LOG("sio read16 %x; ret = %x\n", add&0xf, hard);
+#endif
+			return hard;
+		case 0x1f80104e:
+			hard = sioReadBaud16();
+#ifdef PAD_LOG
+			PAD_LOG("sio read16 %x; ret = %x\n", add&0xf, hard);
+#endif
+			return hard;
+#ifdef ENABLE_SIO1API
+		case 0x1f801050:
+			hard = SIO1_readData16();
+			return hard;
+		case 0x1f801054:
+			hard = SIO1_readStat16();
+			return hard;
+		case 0x1f80105a:
+			hard = SIO1_readCtrl16();
+			return hard;
+		case 0x1f80105e:
+			hard = SIO1_readBaud16();
+			return hard;
+#endif
+		case 0x1f801100:
+			hard = psxRcntRcount(0);
+#ifdef PSXHW_LOG
+			PSXHW_LOG("T0 count read16: %x\n", hard);
+#endif
+			return hard;
+		case 0x1f801104:
+			hard = psxRcntRmode(0);
+#ifdef PSXHW_LOG
+			PSXHW_LOG("T0 mode read16: %x\n", hard);
+#endif
+			return hard;
+		case 0x1f801108:
+			hard = psxRcntRtarget(0);
+#ifdef PSXHW_LOG
+			PSXHW_LOG("T0 target read16: %x\n", hard);
+#endif
+			return hard;
+		case 0x1f801110:
+			hard = psxRcntRcount(1);
+#ifdef PSXHW_LOG
+			PSXHW_LOG("T1 count read16: %x\n", hard);
+#endif
+			return hard;
+		case 0x1f801114:
+			hard = psxRcntRmode(1);
+#ifdef PSXHW_LOG
+			PSXHW_LOG("T1 mode read16: %x\n", hard);
+#endif
+			return hard;
+		case 0x1f801118:
+			hard = psxRcntRtarget(1);
+#ifdef PSXHW_LOG
+			PSXHW_LOG("T1 target read16: %x\n", hard);
+#endif
+			return hard;
+		case 0x1f801120:
+			hard = psxRcntRcount(2);
+#ifdef PSXHW_LOG
+			PSXHW_LOG("T2 count read16: %x\n", hard);
+#endif
+			return hard;
+		case 0x1f801124:
+			hard = psxRcntRmode(2);
+#ifdef PSXHW_LOG
+			PSXHW_LOG("T2 mode read16: %x\n", hard);
+#endif
+			return hard;
+		case 0x1f801128:
+			hard = psxRcntRtarget(2);
+#ifdef PSXHW_LOG
+			PSXHW_LOG("T2 target read16: %x\n", hard);
+#endif
+			return hard;
+
+		//case 0x1f802030: hard =   //int_2000????
+		//case 0x1f802040: hard =//dip switches...??
+
+		default:
+			if (add >= 0x1f801c00 && add < 0x1f801e00) {
+            	hard = SPU_readRegister(add);
+			} else {
+				hard = psxHu16(add); 
+#ifdef PSXHW_LOG
+				PSXHW_LOG("*Unkwnown 16bit read at address %x\n", add);
+#endif
+			}
+            return hard;
+	}
+	
+#ifdef PSXHW_LOG
+	PSXHW_LOG("*Known 16bit read at address %x value %x\n", add, hard);
+#endif
+	return hard;
+}
+
+u32 psxHwRead32(u32 add) {
+	u32 hard;
+
+	switch (add) {
+		case 0x1f801040:
+			hard = sioRead8();
+			hard |= sioRead8() << 8;
+			hard |= sioRead8() << 16;
+			hard |= sioRead8() << 24;
+#ifdef PAD_LOG
+			PAD_LOG("sio read32 ;ret = %x\n", hard);
+#endif
+			return hard;
+#ifdef ENABLE_SIO1API
+		case 0x1f801050:
+			hard = SIO1_readData32();
+			return hard;
+#endif
+#ifdef PSXHW_LOG
+		case 0x1f801060:
+			PSXHW_LOG("RAM size read %x\n", psxHu32(0x1060));
+			return psxHu32(0x1060);
+#endif
+#ifdef PSXHW_LOG
+		case 0x1f801070: PSXHW_LOG("IREG 32bit read %x\n", psxHu32(0x1070));
+			return psxHu32(0x1070);
+#endif
+#ifdef PSXHW_LOG
+		case 0x1f801074: PSXHW_LOG("IMASK 32bit read %x\n", psxHu32(0x1074));
+			return psxHu32(0x1074);
+#endif
+
+		case 0x1f801810:
+			hard = GPU_readData();
+#ifdef PSXHW_LOG
+			PSXHW_LOG("GPU DATA 32bit read %x\n", hard);
+#endif
+			return hard;
+		case 0x1f801814:
+			hard = GPU_readStatus();
+#ifdef PSXHW_LOG
+			PSXHW_LOG("GPU STATUS 32bit read %x\n", hard);
+#endif
+			return hard;
+
+		case 0x1f801820: hard = mdecRead0(); break;
+		case 0x1f801824: hard = mdecRead1(); break;
+
+#ifdef PSXHW_LOG
+		case 0x1f8010a0:
+			PSXHW_LOG("DMA2 MADR 32bit read %x\n", psxHu32(0x10a0));
+			return SWAPu32(HW_DMA2_MADR);
+		case 0x1f8010a4:
+			PSXHW_LOG("DMA2 BCR 32bit read %x\n", psxHu32(0x10a4));
+			return SWAPu32(HW_DMA2_BCR);
+		case 0x1f8010a8:
+			PSXHW_LOG("DMA2 CHCR 32bit read %x\n", psxHu32(0x10a8));
+			return SWAPu32(HW_DMA2_CHCR);
+#endif
+
+#ifdef PSXHW_LOG
+		case 0x1f8010b0:
+			PSXHW_LOG("DMA3 MADR 32bit read %x\n", psxHu32(0x10b0));
+			return SWAPu32(HW_DMA3_MADR);
+		case 0x1f8010b4:
+			PSXHW_LOG("DMA3 BCR 32bit read %x\n", psxHu32(0x10b4));
+			return SWAPu32(HW_DMA3_BCR);
+		case 0x1f8010b8:
+			PSXHW_LOG("DMA3 CHCR 32bit read %x\n", psxHu32(0x10b8));
+			return SWAPu32(HW_DMA3_CHCR);
+#endif
+
+#ifdef PSXHW_LOG
+/*		case 0x1f8010f0:
+			PSXHW_LOG("DMA PCR 32bit read %x\n", psxHu32(0x10f0));
+			return SWAPu32(HW_DMA_PCR); // dma rest channel
+		case 0x1f8010f4:
+			PSXHW_LOG("DMA ICR 32bit read %x\n", psxHu32(0x10f4));
+			return SWAPu32(HW_DMA_ICR); // interrupt enabler?*/
+#endif
+
+		// time for rootcounters :)
+		case 0x1f801100:
+			hard = psxRcntRcount(0);
+#ifdef PSXHW_LOG
+			PSXHW_LOG("T0 count read32: %x\n", hard);
+#endif
+			return hard;
+		case 0x1f801104:
+			hard = psxRcntRmode(0);
+#ifdef PSXHW_LOG
+			PSXHW_LOG("T0 mode read32: %x\n", hard);
+#endif
+			return hard;
+		case 0x1f801108:
+			hard = psxRcntRtarget(0);
+#ifdef PSXHW_LOG
+			PSXHW_LOG("T0 target read32: %x\n", hard);
+#endif
+			return hard;
+		case 0x1f801110:
+			hard = psxRcntRcount(1);
+#ifdef PSXHW_LOG
+			PSXHW_LOG("T1 count read32: %x\n", hard);
+#endif
+			return hard;
+		case 0x1f801114:
+			hard = psxRcntRmode(1);
+#ifdef PSXHW_LOG
+			PSXHW_LOG("T1 mode read32: %x\n", hard);
+#endif
+			return hard;
+		case 0x1f801118:
+			hard = psxRcntRtarget(1);
+#ifdef PSXHW_LOG
+			PSXHW_LOG("T1 target read32: %x\n", hard);
+#endif
+			return hard;
+		case 0x1f801120:
+			hard = psxRcntRcount(2);
+#ifdef PSXHW_LOG
+			PSXHW_LOG("T2 count read32: %x\n", hard);
+#endif
+			return hard;
+		case 0x1f801124:
+			hard = psxRcntRmode(2);
+#ifdef PSXHW_LOG
+			PSXHW_LOG("T2 mode read32: %x\n", hard);
+#endif
+			return hard;
+		case 0x1f801128:
+			hard = psxRcntRtarget(2);
+#ifdef PSXHW_LOG
+			PSXHW_LOG("T2 target read32: %x\n", hard);
+#endif
+			return hard;
+
+		default:
+			hard = psxHu32(add); 
+#ifdef PSXHW_LOG
+			PSXHW_LOG("*Unkwnown 32bit read at address %x\n", add);
+#endif
+			return hard;
+	}
+#ifdef PSXHW_LOG
+	PSXHW_LOG("*Known 32bit read at address %x\n", add);
+#endif
+	return hard;
+}
+
+void psxHwWrite8(u32 add, u8 value) {
+	switch (add) {
+		case 0x1f801040: sioWrite8(value); break;
+#ifdef ENABLE_SIO1API
+		case 0x1f801050: SIO1_writeData8(value); break;
+#endif
+		case 0x1f801800: cdrWrite0(value); break;
+		case 0x1f801801: cdrWrite1(value); break;
+		case 0x1f801802: cdrWrite2(value); break;
+		case 0x1f801803: cdrWrite3(value); break;
+
+		default:
+			psxHu8(add) = value;
+#ifdef PSXHW_LOG
+			PSXHW_LOG("*Unknown 8bit write at address %x value %x\n", add, value);
+#endif
+			return;
+	}
+	psxHu8(add) = value;
+#ifdef PSXHW_LOG
+	PSXHW_LOG("*Known 8bit write at address %x value %x\n", add, value);
+#endif
+}
+
+void psxHwWrite16(u32 add, u16 value) {
+	switch (add) {
+		case 0x1f801040:
+			sioWrite8((unsigned char)value);
+			sioWrite8((unsigned char)(value>>8));
+#ifdef PAD_LOG
+			PAD_LOG ("sio write16 %x, %x\n", add&0xf, value);
+#endif
+			return;
+		case 0x1f801044:
+			sioWriteStat16(value);
+#ifdef PAD_LOG
+			PAD_LOG ("sio write16 %x, %x\n", add&0xf, value);
+#endif
+			return;
+		case 0x1f801048:
+            sioWriteMode16(value);
+#ifdef PAD_LOG
+			PAD_LOG ("sio write16 %x, %x\n", add&0xf, value);
+#endif
+			return;
+		case 0x1f80104a: // control register
+			sioWriteCtrl16(value);
+#ifdef PAD_LOG
+			PAD_LOG ("sio write16 %x, %x\n", add&0xf, value);
+#endif
+			return;
+		case 0x1f80104e: // baudrate register
+            sioWriteBaud16(value);
+#ifdef PAD_LOG
+			PAD_LOG ("sio write16 %x, %x\n", add&0xf, value);
+#endif
+			return;
+#ifdef ENABLE_SIO1API
+		case 0x1f801050:
+			SIO1_writeData16(value);
+			return;
+		case 0x1f801054:
+			SIO1_writeStat16(value);
+			return;
+		case 0x1f80105a:
+			SIO1_writeCtrl16(value);
+			return;
+		case 0x1f80105e:
+			SIO1_writeBaud16(value);
+			return;
+#endif
+		case 0x1f801070: 
+#ifdef PSXHW_LOG
+			PSXHW_LOG("IREG 16bit write %x\n", value);
+#endif
+			if (Config.Sio) psxHu16ref(0x1070) |= SWAPu16(0x80);
+			if (Config.SpuIrq) psxHu16ref(0x1070) |= SWAPu16(0x200);
+			psxHu16ref(0x1070) &= SWAPu16((psxHu16(0x1074) & value));
+			return;
+
+		case 0x1f801074:
+#ifdef PSXHW_LOG
+			PSXHW_LOG("IMASK 16bit write %x\n", value);
+#endif
+			psxHu16ref(0x1074) = SWAPu16(value);
+			return;
+
+		case 0x1f801100:
+#ifdef PSXHW_LOG
+			PSXHW_LOG("COUNTER 0 COUNT 16bit write %x\n", value);
+#endif
+			psxRcntWcount(0, value); return;
+		case 0x1f801104:
+#ifdef PSXHW_LOG
+			PSXHW_LOG("COUNTER 0 MODE 16bit write %x\n", value);
+#endif
+			psxRcntWmode(0, value); return;
+		case 0x1f801108:
+#ifdef PSXHW_LOG
+			PSXHW_LOG("COUNTER 0 TARGET 16bit write %x\n", value);
+#endif
+			psxRcntWtarget(0, value); return;
+
+		case 0x1f801110:
+#ifdef PSXHW_LOG
+			PSXHW_LOG("COUNTER 1 COUNT 16bit write %x\n", value);
+#endif
+			psxRcntWcount(1, value); return;
+		case 0x1f801114:
+#ifdef PSXHW_LOG
+			PSXHW_LOG("COUNTER 1 MODE 16bit write %x\n", value);
+#endif
+			psxRcntWmode(1, value); return;
+		case 0x1f801118:
+#ifdef PSXHW_LOG
+			PSXHW_LOG("COUNTER 1 TARGET 16bit write %x\n", value);
+#endif
+			psxRcntWtarget(1, value); return;
+
+		case 0x1f801120:
+#ifdef PSXHW_LOG
+			PSXHW_LOG("COUNTER 2 COUNT 16bit write %x\n", value);
+#endif
+			psxRcntWcount(2, value); return;
+		case 0x1f801124:
+#ifdef PSXHW_LOG
+			PSXHW_LOG("COUNTER 2 MODE 16bit write %x\n", value);
+#endif
+			psxRcntWmode(2, value); return;
+		case 0x1f801128:
+#ifdef PSXHW_LOG
+			PSXHW_LOG("COUNTER 2 TARGET 16bit write %x\n", value);
+#endif
+			psxRcntWtarget(2, value); return;
+
+		default:
+			if (add>=0x1f801c00 && add<0x1f801e00) {
+            	SPU_writeRegister(add, value);
+				return;
+			}
+
+			psxHu16ref(add) = SWAPu16(value);
+#ifdef PSXHW_LOG
+			PSXHW_LOG("*Unknown 16bit write at address %x value %x\n", add, value);
+#endif
+			return;
+	}
+	psxHu16ref(add) = SWAPu16(value);
+#ifdef PSXHW_LOG
+	PSXHW_LOG("*Known 16bit write at address %x value %x\n", add, value);
+#endif
+}
+
+#define DmaExec(n) { \
+	HW_DMA##n##_CHCR = SWAPu32(value); \
+\
+	if (SWAPu32(HW_DMA##n##_CHCR) & 0x01000000 && SWAPu32(HW_DMA_PCR) & (8 << (n * 4))) { \
+		psxDma##n(SWAPu32(HW_DMA##n##_MADR), SWAPu32(HW_DMA##n##_BCR), SWAPu32(HW_DMA##n##_CHCR)); \
+	} \
+}
+
+void psxHwWrite32(u32 add, u32 value) {
+	switch (add) {
+	    case 0x1f801040:
+			sioWrite8((unsigned char)value);
+			sioWrite8((unsigned char)((value&0xff) >>  8));
+			sioWrite8((unsigned char)((value&0xff) >> 16));
+			sioWrite8((unsigned char)((value&0xff) >> 24));
+#ifdef PAD_LOG
+			PAD_LOG("sio write32 %x\n", value);
+#endif
+			return;
+#ifdef ENABLE_SIO1API
+		case 0x1f801050:
+			SIO1_writeData32(value);
+			return;
+#endif
+#ifdef PSXHW_LOG
+		case 0x1f801060:
+			PSXHW_LOG("RAM size write %x\n", value);
+			psxHu32ref(add) = SWAPu32(value);
+			return; // Ram size
+#endif
+
+		case 0x1f801070: 
+#ifdef PSXHW_LOG
+			PSXHW_LOG("IREG 32bit write %x\n", value);
+#endif
+			if (Config.Sio) psxHu32ref(0x1070) |= SWAPu32(0x80);
+			if (Config.SpuIrq) psxHu32ref(0x1070) |= SWAPu32(0x200);
+			psxHu32ref(0x1070) &= SWAPu32((psxHu32(0x1074) & value));
+			return;
+		case 0x1f801074:
+#ifdef PSXHW_LOG
+			PSXHW_LOG("IMASK 32bit write %x\n", value);
+#endif
+			psxHu32ref(0x1074) = SWAPu32(value);
+			return;
+
+#ifdef PSXHW_LOG
+		case 0x1f801080:
+			PSXHW_LOG("DMA0 MADR 32bit write %x\n", value);
+			HW_DMA0_MADR = SWAPu32(value); return; // DMA0 madr
+		case 0x1f801084:
+			PSXHW_LOG("DMA0 BCR 32bit write %x\n", value);
+			HW_DMA0_BCR  = SWAPu32(value); return; // DMA0 bcr
+#endif
+		case 0x1f801088:
+#ifdef PSXHW_LOG
+			PSXHW_LOG("DMA0 CHCR 32bit write %x\n", value);
+#endif
+			DmaExec(0);	                 // DMA0 chcr (MDEC in DMA)
+			return;
+
+#ifdef PSXHW_LOG
+		case 0x1f801090:
+			PSXHW_LOG("DMA1 MADR 32bit write %x\n", value);
+			HW_DMA1_MADR = SWAPu32(value); return; // DMA1 madr
+		case 0x1f801094:
+			PSXHW_LOG("DMA1 BCR 32bit write %x\n", value);
+			HW_DMA1_BCR  = SWAPu32(value); return; // DMA1 bcr
+#endif
+		case 0x1f801098:
+#ifdef PSXHW_LOG
+			PSXHW_LOG("DMA1 CHCR 32bit write %x\n", value);
+#endif
+			DmaExec(1);                  // DMA1 chcr (MDEC out DMA)
+			return;
+
+#ifdef PSXHW_LOG
+		case 0x1f8010a0:
+			PSXHW_LOG("DMA2 MADR 32bit write %x\n", value);
+			HW_DMA2_MADR = SWAPu32(value); return; // DMA2 madr
+		case 0x1f8010a4:
+			PSXHW_LOG("DMA2 BCR 32bit write %x\n", value);
+			HW_DMA2_BCR  = SWAPu32(value); return; // DMA2 bcr
+#endif
+		case 0x1f8010a8:
+#ifdef PSXHW_LOG
+			PSXHW_LOG("DMA2 CHCR 32bit write %x\n", value);
+#endif
+			DmaExec(2);                  // DMA2 chcr (GPU DMA)
+			return;
+
+#ifdef PSXHW_LOG
+		case 0x1f8010b0:
+			PSXHW_LOG("DMA3 MADR 32bit write %x\n", value);
+			HW_DMA3_MADR = SWAPu32(value); return; // DMA3 madr
+		case 0x1f8010b4:
+			PSXHW_LOG("DMA3 BCR 32bit write %x\n", value);
+			HW_DMA3_BCR  = SWAPu32(value); return; // DMA3 bcr
+#endif
+		case 0x1f8010b8:
+#ifdef PSXHW_LOG
+			PSXHW_LOG("DMA3 CHCR 32bit write %x\n", value);
+#endif
+			DmaExec(3);                  // DMA3 chcr (CDROM DMA)
+			
+			return;
+
+#ifdef PSXHW_LOG
+		case 0x1f8010c0:
+			PSXHW_LOG("DMA4 MADR 32bit write %x\n", value);
+			HW_DMA4_MADR = SWAPu32(value); return; // DMA4 madr
+		case 0x1f8010c4:
+			PSXHW_LOG("DMA4 BCR 32bit write %x\n", value);
+			HW_DMA4_BCR  = SWAPu32(value); return; // DMA4 bcr
+#endif
+		case 0x1f8010c8:
+#ifdef PSXHW_LOG
+			PSXHW_LOG("DMA4 CHCR 32bit write %x\n", value);
+#endif
+			DmaExec(4);                  // DMA4 chcr (SPU DMA)
+			return;
+
+#if 0
+		case 0x1f8010d0: break; //DMA5write_madr();
+		case 0x1f8010d4: break; //DMA5write_bcr();
+		case 0x1f8010d8: break; //DMA5write_chcr(); // Not needed
+#endif
+
+#ifdef PSXHW_LOG
+		case 0x1f8010e0:
+			PSXHW_LOG("DMA6 MADR 32bit write %x\n", value);
+			HW_DMA6_MADR = SWAPu32(value); return; // DMA6 bcr
+		case 0x1f8010e4:
+			PSXHW_LOG("DMA6 BCR 32bit write %x\n", value);
+			HW_DMA6_BCR  = SWAPu32(value); return; // DMA6 bcr
+#endif
+		case 0x1f8010e8:
+#ifdef PSXHW_LOG
+			PSXHW_LOG("DMA6 CHCR 32bit write %x\n", value);
+#endif
+			DmaExec(6);                   // DMA6 chcr (OT clear)
+			return;
+
+#ifdef PSXHW_LOG
+		case 0x1f8010f0:
+			PSXHW_LOG("DMA PCR 32bit write %x\n", value);
+			HW_DMA_PCR = SWAPu32(value);
+			return;
+#endif
+
+		case 0x1f8010f4:
+#ifdef PSXHW_LOG
+			PSXHW_LOG("DMA ICR 32bit write %x\n", value);
+#endif
+		{
+			u32 tmp = (~value) & SWAPu32(HW_DMA_ICR);
+			HW_DMA_ICR = SWAPu32(((tmp ^ value) & 0xffffff) ^ tmp);
+			return;
+		}
+
+		case 0x1f801810:
+#ifdef PSXHW_LOG
+			PSXHW_LOG("GPU DATA 32bit write %x\n", value);
+#endif
+			GPU_writeData(value); return;
+		case 0x1f801814:
+#ifdef PSXHW_LOG
+			PSXHW_LOG("GPU STATUS 32bit write %x\n", value);
+#endif
+			GPU_writeStatus(value); return;
+
+		case 0x1f801820:
+			mdecWrite0(value); break;
+		case 0x1f801824:
+			mdecWrite1(value); break;
+
+		case 0x1f801100:
+#ifdef PSXHW_LOG
+			PSXHW_LOG("COUNTER 0 COUNT 32bit write %x\n", value);
+#endif
+			psxRcntWcount(0, value & 0xffff); return;
+		case 0x1f801104:
+#ifdef PSXHW_LOG
+			PSXHW_LOG("COUNTER 0 MODE 32bit write %x\n", value);
+#endif
+			psxRcntWmode(0, value); return;
+		case 0x1f801108:
+#ifdef PSXHW_LOG
+			PSXHW_LOG("COUNTER 0 TARGET 32bit write %x\n", value);
+#endif
+			psxRcntWtarget(0, value & 0xffff); return; //  HW_DMA_ICR&= SWAP32((~value)&0xff000000);
+
+		case 0x1f801110:
+#ifdef PSXHW_LOG
+			PSXHW_LOG("COUNTER 1 COUNT 32bit write %x\n", value);
+#endif
+			psxRcntWcount(1, value & 0xffff); return;
+		case 0x1f801114:
+#ifdef PSXHW_LOG
+			PSXHW_LOG("COUNTER 1 MODE 32bit write %x\n", value);
+#endif
+			psxRcntWmode(1, value); return;
+		case 0x1f801118:
+#ifdef PSXHW_LOG
+			PSXHW_LOG("COUNTER 1 TARGET 32bit write %x\n", value);
+#endif
+			psxRcntWtarget(1, value & 0xffff); return;
+
+		case 0x1f801120:
+#ifdef PSXHW_LOG
+			PSXHW_LOG("COUNTER 2 COUNT 32bit write %x\n", value);
+#endif
+			psxRcntWcount(2, value & 0xffff); return;
+		case 0x1f801124:
+#ifdef PSXHW_LOG
+			PSXHW_LOG("COUNTER 2 MODE 32bit write %x\n", value);
+#endif
+			psxRcntWmode(2, value); return;
+		case 0x1f801128:
+#ifdef PSXHW_LOG
+			PSXHW_LOG("COUNTER 2 TARGET 32bit write %x\n", value);
+#endif
+			psxRcntWtarget(2, value & 0xffff); return;
+
+		default:
+			psxHu32ref(add) = SWAPu32(value);
+#ifdef PSXHW_LOG
+			PSXHW_LOG("*Unknown 32bit write at address %x value %x\n", add, value);
+#endif
+			return;
+	}
+	psxHu32ref(add) = SWAPu32(value);
+#ifdef PSXHW_LOG
+	PSXHW_LOG("*Known 32bit write at address %x value %x\n", add, value);
+#endif
+}
+
+int psxHwFreeze(gzFile f, int Mode) {
+	return 0;
+}
diff --git a/libpcsxcore/psxhw.h b/libpcsxcore/psxhw.h
new file mode 100644
index 0000000..cd4e928
--- /dev/null
+++ b/libpcsxcore/psxhw.h
@@ -0,0 +1,78 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+#ifndef __PSXHW_H__
+#define __PSXHW_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "psxcommon.h"
+#include "r3000a.h"
+#include "psxmem.h"
+#include "sio.h"
+#include "psxcounters.h"
+
+#define HW_DMA0_MADR (psxHu32ref(0x1080)) // MDEC in DMA
+#define HW_DMA0_BCR  (psxHu32ref(0x1084))
+#define HW_DMA0_CHCR (psxHu32ref(0x1088))
+
+#define HW_DMA1_MADR (psxHu32ref(0x1090)) // MDEC out DMA
+#define HW_DMA1_BCR  (psxHu32ref(0x1094))
+#define HW_DMA1_CHCR (psxHu32ref(0x1098))
+
+#define HW_DMA2_MADR (psxHu32ref(0x10a0)) // GPU DMA
+#define HW_DMA2_BCR  (psxHu32ref(0x10a4))
+#define HW_DMA2_CHCR (psxHu32ref(0x10a8))
+
+#define HW_DMA3_MADR (psxHu32ref(0x10b0)) // CDROM DMA
+#define HW_DMA3_BCR  (psxHu32ref(0x10b4))
+#define HW_DMA3_CHCR (psxHu32ref(0x10b8))
+
+#define HW_DMA4_MADR (psxHu32ref(0x10c0)) // SPU DMA
+#define HW_DMA4_BCR  (psxHu32ref(0x10c4))
+#define HW_DMA4_CHCR (psxHu32ref(0x10c8))
+
+#define HW_DMA6_MADR (psxHu32ref(0x10e0)) // GPU DMA (OT)
+#define HW_DMA6_BCR  (psxHu32ref(0x10e4))
+#define HW_DMA6_CHCR (psxHu32ref(0x10e8))
+
+#define HW_DMA_PCR   (psxHu32ref(0x10f0))
+#define HW_DMA_ICR   (psxHu32ref(0x10f4))
+
+#define	DMA_INTERRUPT(n) \
+	if (SWAPu32(HW_DMA_ICR) & (1 << (16 + n))) {    \
+		HW_DMA_ICR |= SWAP32(1 << (24 + n));        \
+		psxHu32ref(0x1070) |= SWAP32(8);            \
+	}
+
+void psxHwReset();
+u8 psxHwRead8(u32 add);
+u16 psxHwRead16(u32 add);
+u32 psxHwRead32(u32 add);
+void psxHwWrite8(u32 add, u8  value);
+void psxHwWrite16(u32 add, u16 value);
+void psxHwWrite32(u32 add, u32 value);
+int psxHwFreeze(gzFile f, int Mode);
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/libpcsxcore/psxinterpreter.c b/libpcsxcore/psxinterpreter.c
new file mode 100644
index 0000000..1f4b46c
--- /dev/null
+++ b/libpcsxcore/psxinterpreter.c
@@ -0,0 +1,804 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+/*
+ * PSX assembly interpreter.
+ */
+
+#include "psxcommon.h"
+#include "r3000a.h"
+#include "gte.h"
+#include "psxhle.h"
+
+static int branch = 0;
+static int branch2 = 0;
+static u32 branchPC;
+
+// These macros are used to assemble the repassembler functions
+
+#ifdef PSXCPU_LOG
+#define debugI() PSXCPU_LOG("%s\n", disR3000AF(psxRegs.code, psxRegs.pc)); 
+#else
+#define debugI()
+#endif
+
+inline void execI();
+
+// Subsets
+void (*psxBSC[64])();
+void (*psxSPC[64])();
+void (*psxREG[32])();
+void (*psxCP0[32])();
+void (*psxCP2[64])();
+void (*psxCP2BSC[32])();
+
+static void delayRead(int reg, u32 bpc) {
+	u32 rold, rnew;
+
+//	SysPrintf("delayRead at %x!\n", psxRegs.pc);
+
+	rold = psxRegs.GPR.r[reg];
+	psxBSC[psxRegs.code >> 26](); // branch delay load
+	rnew = psxRegs.GPR.r[reg];
+
+	psxRegs.pc = bpc;
+
+	psxBranchTest();
+
+	psxRegs.GPR.r[reg] = rold;
+	execI(); // first branch opcode
+	psxRegs.GPR.r[reg] = rnew;
+
+	branch = 0;
+}
+
+static void delayWrite(int reg, u32 bpc) {
+
+/*	SysPrintf("delayWrite at %x!\n", psxRegs.pc);
+
+	SysPrintf("%s\n", disR3000AF(psxRegs.code, psxRegs.pc-4));
+	SysPrintf("%s\n", disR3000AF(PSXMu32(bpc), bpc));*/
+
+	// no changes from normal behavior
+
+	psxBSC[psxRegs.code >> 26]();
+
+	branch = 0;
+	psxRegs.pc = bpc;
+
+	psxBranchTest();
+}
+
+static void delayReadWrite(int reg, u32 bpc) {
+
+//	SysPrintf("delayReadWrite at %x!\n", psxRegs.pc);
+
+	// the branch delay load is skipped
+
+	branch = 0;
+	psxRegs.pc = bpc;
+
+	psxBranchTest();
+}
+
+// this defines shall be used with the tmp 
+// of the next func (instead of _Funct_...)
+#define _tFunct_  ((tmp      ) & 0x3F)  // The funct part of the instruction register 
+#define _tRd_     ((tmp >> 11) & 0x1F)  // The rd part of the instruction register 
+#define _tRt_     ((tmp >> 16) & 0x1F)  // The rt part of the instruction register 
+#define _tRs_     ((tmp >> 21) & 0x1F)  // The rs part of the instruction register 
+#define _tSa_     ((tmp >>  6) & 0x1F)  // The sa part of the instruction register
+
+int psxTestLoadDelay(int reg, u32 tmp) {
+	if (tmp == 0) return 0; // NOP
+	switch (tmp >> 26) {
+		case 0x00: // SPECIAL
+			switch (_tFunct_) {
+				case 0x00: // SLL
+				case 0x02: case 0x03: // SRL/SRA
+					if (_tRd_ == reg && _tRt_ == reg) return 1; else
+					if (_tRt_ == reg) return 2; else
+					if (_tRd_ == reg) return 3;
+					break;
+
+				case 0x08: // JR
+					if (_tRs_ == reg) return 2;
+					break;
+				case 0x09: // JALR
+					if (_tRd_ == reg && _tRs_ == reg) return 1; else
+					if (_tRs_ == reg) return 2; else
+					if (_tRd_ == reg) return 3;
+					break;
+
+				// SYSCALL/BREAK just a break;
+
+				case 0x20: case 0x21: case 0x22: case 0x23:
+				case 0x24: case 0x25: case 0x26: case 0x27: 
+				case 0x2a: case 0x2b: // ADD/ADDU...
+				case 0x04: case 0x06: case 0x07: // SLLV...
+					if (_tRd_ == reg && (_tRt_ == reg || _tRs_ == reg)) return 1; else
+					if (_tRt_ == reg || _tRs_ == reg) return 2; else
+					if (_tRd_ == reg) return 3;
+					break;
+
+				case 0x10: case 0x12: // MFHI/MFLO
+					if (_tRd_ == reg) return 3;
+					break;
+				case 0x11: case 0x13: // MTHI/MTLO
+					if (_tRs_ == reg) return 2;
+					break;
+
+				case 0x18: case 0x19:
+				case 0x1a: case 0x1b: // MULT/DIV...
+					if (_tRt_ == reg || _tRs_ == reg) return 2;
+					break;
+			}
+			break;
+
+		case 0x01: // REGIMM
+			switch (_tRt_) {
+				case 0x00: case 0x02:
+				case 0x10: case 0x12: // BLTZ/BGEZ...
+					if (_tRs_ == reg) return 2;
+					break;
+			}
+			break;
+
+		// J would be just a break;
+		case 0x03: // JAL
+			if (31 == reg) return 3;
+			break;
+
+		case 0x04: case 0x05: // BEQ/BNE
+			if (_tRs_ == reg || _tRt_ == reg) return 2;
+			break;
+
+		case 0x06: case 0x07: // BLEZ/BGTZ
+			if (_tRs_ == reg) return 2;
+			break;
+
+		case 0x08: case 0x09: case 0x0a: case 0x0b:
+		case 0x0c: case 0x0d: case 0x0e: // ADDI/ADDIU...
+			if (_tRt_ == reg && _tRs_ == reg) return 1; else
+			if (_tRs_ == reg) return 2; else
+			if (_tRt_ == reg) return 3;
+			break;
+
+		case 0x0f: // LUI
+			if (_tRt_ == reg) return 3;
+			break;
+
+		case 0x10: // COP0
+			switch (_tFunct_) {
+				case 0x00: // MFC0
+					if (_tRt_ == reg) return 3;
+					break;
+				case 0x02: // CFC0
+					if (_tRt_ == reg) return 3;
+					break;
+				case 0x04: // MTC0
+					if (_tRt_ == reg) return 2;
+					break;
+				case 0x06: // CTC0
+					if (_tRt_ == reg) return 2;
+					break;
+				// RFE just a break;
+			}
+			break;
+
+		case 0x12: // COP2
+			switch (_tFunct_) {
+				case 0x00: 
+					switch (_tRs_) {
+						case 0x00: // MFC2
+							if (_tRt_ == reg) return 3;
+							break;
+						case 0x02: // CFC2
+							if (_tRt_ == reg) return 3;
+							break;
+						case 0x04: // MTC2
+							if (_tRt_ == reg) return 2;
+							break;
+						case 0x06: // CTC2
+							if (_tRt_ == reg) return 2;
+							break;
+					}
+					break;
+				// RTPS... break;
+			}
+			break;
+
+		case 0x22: case 0x26: // LWL/LWR
+			if (_tRt_ == reg) return 3; else
+			if (_tRs_ == reg) return 2;
+			break;
+
+		case 0x20: case 0x21: case 0x23:
+		case 0x24: case 0x25: // LB/LH/LW/LBU/LHU
+			if (_tRt_ == reg && _tRs_ == reg) return 1; else
+			if (_tRs_ == reg) return 2; else
+			if (_tRt_ == reg) return 3;
+			break;
+
+		case 0x28: case 0x29: case 0x2a:
+		case 0x2b: case 0x2e: // SB/SH/SWL/SW/SWR
+			if (_tRt_ == reg || _tRs_ == reg) return 2;
+			break;
+
+		case 0x32: case 0x3a: // LWC2/SWC2
+			if (_tRs_ == reg) return 2;
+			break;
+	}
+
+	return 0;
+}
+
+void psxDelayTest(int reg, u32 bpc) {
+	u32 *code;
+	u32 tmp;
+
+	code = (u32 *)PSXM(bpc);
+	tmp = ((code == NULL) ? 0 : SWAP32(*code));
+	branch = 1;
+
+	switch (psxTestLoadDelay(reg, tmp)) {
+		case 1:
+			delayReadWrite(reg, bpc); return;
+		case 2:
+			delayRead(reg, bpc); return;
+		case 3:
+			delayWrite(reg, bpc); return;
+	}
+	psxBSC[psxRegs.code >> 26]();
+
+	branch = 0;
+	psxRegs.pc = bpc;
+
+	psxBranchTest();
+}
+
+__inline void doBranch(u32 tar) {
+	u32 *code;
+	u32 tmp;
+
+	branch2 = branch = 1;
+	branchPC = tar;
+
+	code = (u32 *)PSXM(psxRegs.pc);
+	psxRegs.code = ((code == NULL) ? 0 : SWAP32(*code));
+
+	debugI();
+
+	psxRegs.pc += 4;
+	psxRegs.cycle += BIAS;
+
+	// check for load delay
+	tmp = psxRegs.code >> 26;
+	switch (tmp) {
+		case 0x10: // COP0
+			switch (_Rs_) {
+				case 0x00: // MFC0
+				case 0x02: // CFC0
+					psxDelayTest(_Rt_, branchPC);
+					return;
+			}
+			break;
+		case 0x12: // COP2
+			switch (_Funct_) {
+				case 0x00:
+					switch (_Rs_) {
+						case 0x00: // MFC2
+						case 0x02: // CFC2
+							psxDelayTest(_Rt_, branchPC);
+							return;
+					}
+					break;
+			}
+			break;
+		case 0x32: // LWC2
+			psxDelayTest(_Rt_, branchPC);
+			return;
+		default:
+			if (tmp >= 0x20 && tmp <= 0x26) { // LB/LH/LWL/LW/LBU/LHU/LWR
+				psxDelayTest(_Rt_, branchPC);
+				return;
+			}
+			break;
+	}
+
+	psxBSC[psxRegs.code >> 26]();
+
+	branch = 0;
+	psxRegs.pc = branchPC;
+
+	psxBranchTest();
+}
+
+/*********************************************************
+* Arithmetic with immediate operand                      *
+* Format:  OP rt, rs, immediate                          *
+*********************************************************/
+void psxADDI() 	{ if (!_Rt_) return; _rRt_ = _u32(_rRs_) + _Imm_ ; }		// Rt = Rs + Im 	(Exception on Integer Overflow)
+void psxADDIU() { if (!_Rt_) return; _rRt_ = _u32(_rRs_) + _Imm_ ; }		// Rt = Rs + Im
+void psxANDI() 	{ if (!_Rt_) return; _rRt_ = _u32(_rRs_) & _ImmU_; }		// Rt = Rs And Im
+void psxORI() 	{ if (!_Rt_) return; _rRt_ = _u32(_rRs_) | _ImmU_; }		// Rt = Rs Or  Im
+void psxXORI() 	{ if (!_Rt_) return; _rRt_ = _u32(_rRs_) ^ _ImmU_; }		// Rt = Rs Xor Im
+void psxSLTI() 	{ if (!_Rt_) return; _rRt_ = _i32(_rRs_) < _Imm_ ; }		// Rt = Rs < Im		(Signed)
+void psxSLTIU() { if (!_Rt_) return; _rRt_ = _u32(_rRs_) < ((u32)_Imm_); }		// Rt = Rs < Im		(Unsigned)
+
+/*********************************************************
+* Register arithmetic                                    *
+* Format:  OP rd, rs, rt                                 *
+*********************************************************/
+void psxADD()	{ if (!_Rd_) return; _rRd_ = _u32(_rRs_) + _u32(_rRt_); }	// Rd = Rs + Rt		(Exception on Integer Overflow)
+void psxADDU() 	{ if (!_Rd_) return; _rRd_ = _u32(_rRs_) + _u32(_rRt_); }	// Rd = Rs + Rt
+void psxSUB() 	{ if (!_Rd_) return; _rRd_ = _u32(_rRs_) - _u32(_rRt_); }	// Rd = Rs - Rt		(Exception on Integer Overflow)
+void psxSUBU() 	{ if (!_Rd_) return; _rRd_ = _u32(_rRs_) - _u32(_rRt_); }	// Rd = Rs - Rt
+void psxAND() 	{ if (!_Rd_) return; _rRd_ = _u32(_rRs_) & _u32(_rRt_); }	// Rd = Rs And Rt
+void psxOR() 	{ if (!_Rd_) return; _rRd_ = _u32(_rRs_) | _u32(_rRt_); }	// Rd = Rs Or  Rt
+void psxXOR() 	{ if (!_Rd_) return; _rRd_ = _u32(_rRs_) ^ _u32(_rRt_); }	// Rd = Rs Xor Rt
+void psxNOR() 	{ if (!_Rd_) return; _rRd_ =~(_u32(_rRs_) | _u32(_rRt_)); }// Rd = Rs Nor Rt
+void psxSLT() 	{ if (!_Rd_) return; _rRd_ = _i32(_rRs_) < _i32(_rRt_); }	// Rd = Rs < Rt		(Signed)
+void psxSLTU() 	{ if (!_Rd_) return; _rRd_ = _u32(_rRs_) < _u32(_rRt_); }	// Rd = Rs < Rt		(Unsigned)
+
+/*********************************************************
+* Register mult/div & Register trap logic                *
+* Format:  OP rs, rt                                     *
+*********************************************************/
+void psxDIV() {
+	if (_i32(_rRt_) != 0) {
+		_i32(_rLo_) = _i32(_rRs_) / _i32(_rRt_);
+		_i32(_rHi_) = _i32(_rRs_) % _i32(_rRt_);
+	}
+}
+
+void psxDIVU() {
+	if (_rRt_ != 0) {
+		_rLo_ = _rRs_ / _rRt_;
+		_rHi_ = _rRs_ % _rRt_;
+	}
+}
+
+void psxMULT() {
+	u64 res = (s64)((s64)_i32(_rRs_) * (s64)_i32(_rRt_));
+
+	psxRegs.GPR.n.lo = (u32)(res & 0xffffffff);
+	psxRegs.GPR.n.hi = (u32)((res >> 32) & 0xffffffff);
+}
+
+void psxMULTU() {
+	u64 res = (u64)((u64)_u32(_rRs_) * (u64)_u32(_rRt_));
+
+	psxRegs.GPR.n.lo = (u32)(res & 0xffffffff);
+	psxRegs.GPR.n.hi = (u32)((res >> 32) & 0xffffffff);
+}
+
+/*********************************************************
+* Register branch logic                                  *
+* Format:  OP rs, offset                                 *
+*********************************************************/
+#define RepZBranchi32(op)      if(_i32(_rRs_) op 0) doBranch(_BranchTarget_);
+#define RepZBranchLinki32(op)  if(_i32(_rRs_) op 0) { _SetLink(31); doBranch(_BranchTarget_); }
+
+void psxBGEZ()   { RepZBranchi32(>=) }      // Branch if Rs >= 0
+void psxBGEZAL() { RepZBranchLinki32(>=) }  // Branch if Rs >= 0 and link
+void psxBGTZ()   { RepZBranchi32(>) }       // Branch if Rs >  0
+void psxBLEZ()   { RepZBranchi32(<=) }      // Branch if Rs <= 0
+void psxBLTZ()   { RepZBranchi32(<) }       // Branch if Rs <  0
+void psxBLTZAL() { RepZBranchLinki32(<) }   // Branch if Rs <  0 and link
+
+/*********************************************************
+* Shift arithmetic with constant shift                   *
+* Format:  OP rd, rt, sa                                 *
+*********************************************************/
+void psxSLL() { if (!_Rd_) return; _u32(_rRd_) = _u32(_rRt_) << _Sa_; } // Rd = Rt << sa
+void psxSRA() { if (!_Rd_) return; _i32(_rRd_) = _i32(_rRt_) >> _Sa_; } // Rd = Rt >> sa (arithmetic)
+void psxSRL() { if (!_Rd_) return; _u32(_rRd_) = _u32(_rRt_) >> _Sa_; } // Rd = Rt >> sa (logical)
+
+/*********************************************************
+* Shift arithmetic with variant register shift           *
+* Format:  OP rd, rt, rs                                 *
+*********************************************************/
+void psxSLLV() { if (!_Rd_) return; _u32(_rRd_) = _u32(_rRt_) << _u32(_rRs_); } // Rd = Rt << rs
+void psxSRAV() { if (!_Rd_) return; _i32(_rRd_) = _i32(_rRt_) >> _u32(_rRs_); } // Rd = Rt >> rs (arithmetic)
+void psxSRLV() { if (!_Rd_) return; _u32(_rRd_) = _u32(_rRt_) >> _u32(_rRs_); } // Rd = Rt >> rs (logical)
+
+/*********************************************************
+* Load higher 16 bits of the first word in GPR with imm  *
+* Format:  OP rt, immediate                              *
+*********************************************************/
+void psxLUI() { if (!_Rt_) return; _u32(_rRt_) = psxRegs.code << 16; } // Upper halfword of Rt = Im
+
+/*********************************************************
+* Move from HI/LO to GPR                                 *
+* Format:  OP rd                                         *
+*********************************************************/
+void psxMFHI() { if (!_Rd_) return; _rRd_ = _rHi_; } // Rd = Hi
+void psxMFLO() { if (!_Rd_) return; _rRd_ = _rLo_; } // Rd = Lo
+
+/*********************************************************
+* Move to GPR to HI/LO & Register jump                   *
+* Format:  OP rs                                         *
+*********************************************************/
+void psxMTHI() { _rHi_ = _rRs_; } // Hi = Rs
+void psxMTLO() { _rLo_ = _rRs_; } // Lo = Rs
+
+/*********************************************************
+* Special purpose instructions                           *
+* Format:  OP                                            *
+*********************************************************/
+void psxBREAK() {
+	// Break exception - psx rom doens't handles this
+}
+
+void psxSYSCALL() {
+	psxRegs.pc -= 4;
+	psxException(0x20, branch);
+}
+
+void psxRFE() {
+//	SysPrintf("psxRFE\n");
+	psxRegs.CP0.n.Status = (psxRegs.CP0.n.Status & 0xfffffff0) |
+						  ((psxRegs.CP0.n.Status & 0x3c) >> 2);
+}
+
+/*********************************************************
+* Register branch logic                                  *
+* Format:  OP rs, rt, offset                             *
+*********************************************************/
+#define RepBranchi32(op)      if(_i32(_rRs_) op _i32(_rRt_)) doBranch(_BranchTarget_);
+
+void psxBEQ() {	RepBranchi32(==) }  // Branch if Rs == Rt
+void psxBNE() {	RepBranchi32(!=) }  // Branch if Rs != Rt
+
+/*********************************************************
+* Jump to target                                         *
+* Format:  OP target                                     *
+*********************************************************/
+void psxJ()   {               doBranch(_JumpTarget_); }
+void psxJAL() {	_SetLink(31); doBranch(_JumpTarget_); }
+
+/*********************************************************
+* Register jump                                          *
+* Format:  OP rs, rd                                     *
+*********************************************************/
+void psxJR()   {
+	doBranch(_u32(_rRs_));
+	psxJumpTest();
+}
+
+void psxJALR() {
+	u32 temp = _u32(_rRs_);
+	if (_Rd_) { _SetLink(_Rd_); }
+	doBranch(temp);
+}
+
+/*********************************************************
+* Load and store for GPR                                 *
+* Format:  OP rt, offset(base)                           *
+*********************************************************/
+
+#define _oB_ (_u32(_rRs_) + _Imm_)
+
+void psxLB() {
+	if (_Rt_) {
+		_i32(_rRt_) = (signed char)psxMemRead8(_oB_); 
+	} else {
+		psxMemRead8(_oB_); 
+	}
+}
+
+void psxLBU() {
+	if (_Rt_) {
+		_u32(_rRt_) = psxMemRead8(_oB_);
+	} else {
+		psxMemRead8(_oB_); 
+	}
+}
+
+void psxLH() {
+	if (_Rt_) {
+		_i32(_rRt_) = (short)psxMemRead16(_oB_);
+	} else {
+		psxMemRead16(_oB_);
+	}
+}
+
+void psxLHU() {
+	if (_Rt_) {
+		_u32(_rRt_) = psxMemRead16(_oB_);
+	} else {
+		psxMemRead16(_oB_);
+	}
+}
+
+void psxLW() {
+	if (_Rt_) {
+		_u32(_rRt_) = psxMemRead32(_oB_);
+	} else {
+		psxMemRead32(_oB_);
+	}
+}
+
+u32 LWL_MASK[4] = { 0xffffff, 0xffff, 0xff, 0 };
+u32 LWL_SHIFT[4] = { 24, 16, 8, 0 };
+
+void psxLWL() {
+	u32 addr = _oB_;
+	u32 shift = addr & 3;
+	u32 mem = psxMemRead32(addr & ~3);
+
+	if (!_Rt_) return;
+	_u32(_rRt_) =	( _u32(_rRt_) & LWL_MASK[shift]) | 
+					( mem << LWL_SHIFT[shift]);
+
+	/*
+	Mem = 1234.  Reg = abcd
+
+	0   4bcd   (mem << 24) | (reg & 0x00ffffff)
+	1   34cd   (mem << 16) | (reg & 0x0000ffff)
+	2   234d   (mem <<  8) | (reg & 0x000000ff)
+	3   1234   (mem      ) | (reg & 0x00000000)
+	*/
+}
+
+u32 LWR_MASK[4] = { 0, 0xff000000, 0xffff0000, 0xffffff00 };
+u32 LWR_SHIFT[4] = { 0, 8, 16, 24 };
+
+void psxLWR() {
+	u32 addr = _oB_;
+	u32 shift = addr & 3;
+	u32 mem = psxMemRead32(addr & ~3);
+
+	if (!_Rt_) return;
+	_u32(_rRt_) =	( _u32(_rRt_) & LWR_MASK[shift]) | 
+					( mem >> LWR_SHIFT[shift]);
+
+	/*
+	Mem = 1234.  Reg = abcd
+
+	0   1234   (mem      ) | (reg & 0x00000000)
+	1   a123   (mem >>  8) | (reg & 0xff000000)
+	2   ab12   (mem >> 16) | (reg & 0xffff0000)
+	3   abc1   (mem >> 24) | (reg & 0xffffff00)
+	*/
+}
+
+void psxSB() { psxMemWrite8 (_oB_, _u8 (_rRt_)); }
+void psxSH() { psxMemWrite16(_oB_, _u16(_rRt_)); }
+void psxSW() { psxMemWrite32(_oB_, _u32(_rRt_)); }
+
+u32 SWL_MASK[4] = { 0xffffff00, 0xffff0000, 0xff000000, 0 };
+u32 SWL_SHIFT[4] = { 24, 16, 8, 0 };
+
+void psxSWL() {
+	u32 addr = _oB_;
+	u32 shift = addr & 3;
+	u32 mem = psxMemRead32(addr & ~3);
+
+	psxMemWrite32(addr & ~3,  (_u32(_rRt_) >> SWL_SHIFT[shift]) |
+			     (  mem & SWL_MASK[shift]) );
+	/*
+	Mem = 1234.  Reg = abcd
+
+	0   123a   (reg >> 24) | (mem & 0xffffff00)
+	1   12ab   (reg >> 16) | (mem & 0xffff0000)
+	2   1abc   (reg >>  8) | (mem & 0xff000000)
+	3   abcd   (reg      ) | (mem & 0x00000000)
+	*/
+}
+
+u32 SWR_MASK[4] = { 0, 0xff, 0xffff, 0xffffff };
+u32 SWR_SHIFT[4] = { 0, 8, 16, 24 };
+
+void psxSWR() {
+	u32 addr = _oB_;
+	u32 shift = addr & 3;
+	u32 mem = psxMemRead32(addr & ~3);
+
+	psxMemWrite32(addr & ~3,  (_u32(_rRt_) << SWR_SHIFT[shift]) |
+			     (  mem & SWR_MASK[shift]) );
+
+	/*
+	Mem = 1234.  Reg = abcd
+
+	0   abcd   (reg      ) | (mem & 0x00000000)
+	1   bcd4   (reg <<  8) | (mem & 0x000000ff)
+	2   cd34   (reg << 16) | (mem & 0x0000ffff)
+	3   d234   (reg << 24) | (mem & 0x00ffffff)
+	*/
+}
+
+/*********************************************************
+* Moves between GPR and COPx                             *
+* Format:  OP rt, fs                                     *
+*********************************************************/
+void psxMFC0() { if (!_Rt_) return; _i32(_rRt_) = (int)_rFs_; }
+void psxCFC0() { if (!_Rt_) return; _i32(_rRt_) = (int)_rFs_; }
+
+void psxTestSWInts() {
+	// the next code is untested, if u know please
+	// tell me if it works ok or not (linuzappz)
+	if (psxRegs.CP0.n.Cause & psxRegs.CP0.n.Status & 0x0300 &&
+		psxRegs.CP0.n.Status & 0x1) {
+		psxException(psxRegs.CP0.n.Cause, branch);
+	}
+}
+
+__inline void MTC0(int reg, u32 val) {
+//	SysPrintf("MTC0 %d: %x\n", reg, val);
+	switch (reg) {
+		case 12: // Status
+			psxRegs.CP0.r[12] = val;
+			psxTestSWInts();
+			break;
+
+		case 13: // Cause
+			psxRegs.CP0.n.Cause = val & ~(0xfc00);
+			psxTestSWInts();
+			break;
+
+		default:
+			psxRegs.CP0.r[reg] = val;
+			break;
+	}
+}
+
+void psxMTC0() { MTC0(_Rd_, _u32(_rRt_)); }
+void psxCTC0() { MTC0(_Rd_, _u32(_rRt_)); }
+
+/*********************************************************
+* Unknow instruction (would generate an exception)       *
+* Format:  ?                                             *
+*********************************************************/
+void psxNULL() { 
+#ifdef PSXCPU_LOG
+	PSXCPU_LOG("psx: Unimplemented op %x\n", psxRegs.code);
+#endif
+}
+
+void psxSPECIAL() {
+	psxSPC[_Funct_]();
+}
+
+void psxREGIMM() {
+	psxREG[_Rt_]();
+}
+
+void psxCOP0() {
+	psxCP0[_Rs_]();
+}
+
+void psxCOP2() {
+	psxCP2[_Funct_]();
+}
+
+void psxBASIC() {
+	psxCP2BSC[_Rs_]();
+}
+
+void psxHLE() {
+//	psxHLEt[psxRegs.code & 0xffff]();
+	psxHLEt[psxRegs.code & 0x07]();		// HDHOSHY experimental patch
+}
+
+void (*psxBSC[64])() = {
+	psxSPECIAL, psxREGIMM, psxJ   , psxJAL  , psxBEQ , psxBNE , psxBLEZ, psxBGTZ,
+	psxADDI   , psxADDIU , psxSLTI, psxSLTIU, psxANDI, psxORI , psxXORI, psxLUI ,
+	psxCOP0   , psxNULL  , psxCOP2, psxNULL , psxNULL, psxNULL, psxNULL, psxNULL,
+	psxNULL   , psxNULL  , psxNULL, psxNULL , psxNULL, psxNULL, psxNULL, psxNULL,
+	psxLB     , psxLH    , psxLWL , psxLW   , psxLBU , psxLHU , psxLWR , psxNULL,
+	psxSB     , psxSH    , psxSWL , psxSW   , psxNULL, psxNULL, psxSWR , psxNULL, 
+	psxNULL   , psxNULL  , gteLWC2, psxNULL , psxNULL, psxNULL, psxNULL, psxNULL,
+	psxNULL   , psxNULL  , gteSWC2, psxHLE  , psxNULL, psxNULL, psxNULL, psxNULL 
+};
+
+
+void (*psxSPC[64])() = {
+	psxSLL , psxNULL , psxSRL , psxSRA , psxSLLV   , psxNULL , psxSRLV, psxSRAV,
+	psxJR  , psxJALR , psxNULL, psxNULL, psxSYSCALL, psxBREAK, psxNULL, psxNULL,
+	psxMFHI, psxMTHI , psxMFLO, psxMTLO, psxNULL   , psxNULL , psxNULL, psxNULL,
+	psxMULT, psxMULTU, psxDIV , psxDIVU, psxNULL   , psxNULL , psxNULL, psxNULL,
+	psxADD , psxADDU , psxSUB , psxSUBU, psxAND    , psxOR   , psxXOR , psxNOR ,
+	psxNULL, psxNULL , psxSLT , psxSLTU, psxNULL   , psxNULL , psxNULL, psxNULL,
+	psxNULL, psxNULL , psxNULL, psxNULL, psxNULL   , psxNULL , psxNULL, psxNULL,
+	psxNULL, psxNULL , psxNULL, psxNULL, psxNULL   , psxNULL , psxNULL, psxNULL
+};
+
+void (*psxREG[32])() = {
+	psxBLTZ  , psxBGEZ  , psxNULL, psxNULL, psxNULL, psxNULL, psxNULL, psxNULL,
+	psxNULL  , psxNULL  , psxNULL, psxNULL, psxNULL, psxNULL, psxNULL, psxNULL,
+	psxBLTZAL, psxBGEZAL, psxNULL, psxNULL, psxNULL, psxNULL, psxNULL, psxNULL,
+	psxNULL  , psxNULL  , psxNULL, psxNULL, psxNULL, psxNULL, psxNULL, psxNULL
+};
+
+void (*psxCP0[32])() = {
+	psxMFC0, psxNULL, psxCFC0, psxNULL, psxMTC0, psxNULL, psxCTC0, psxNULL,
+	psxNULL, psxNULL, psxNULL, psxNULL, psxNULL, psxNULL, psxNULL, psxNULL,
+	psxRFE , psxNULL, psxNULL, psxNULL, psxNULL, psxNULL, psxNULL, psxNULL,
+	psxNULL, psxNULL, psxNULL, psxNULL, psxNULL, psxNULL, psxNULL, psxNULL
+};
+
+void (*psxCP2[64])() = {
+	psxBASIC, gteRTPS , psxNULL , psxNULL, psxNULL, psxNULL , gteNCLIP, psxNULL, // 00
+	psxNULL , psxNULL , psxNULL , psxNULL, gteOP  , psxNULL , psxNULL , psxNULL, // 08
+	gteDPCS , gteINTPL, gteMVMVA, gteNCDS, gteCDP , psxNULL , gteNCDT , psxNULL, // 10
+	psxNULL , psxNULL , psxNULL , gteNCCS, gteCC  , psxNULL , gteNCS  , psxNULL, // 18
+	gteNCT  , psxNULL , psxNULL , psxNULL, psxNULL, psxNULL , psxNULL , psxNULL, // 20
+	gteSQR  , gteDCPL , gteDPCT , psxNULL, psxNULL, gteAVSZ3, gteAVSZ4, psxNULL, // 28 
+	gteRTPT , psxNULL , psxNULL , psxNULL, psxNULL, psxNULL , psxNULL , psxNULL, // 30
+	psxNULL , psxNULL , psxNULL , psxNULL, psxNULL, gteGPF  , gteGPL  , gteNCCT  // 38
+};
+
+void (*psxCP2BSC[32])() = {
+	gteMFC2, psxNULL, gteCFC2, psxNULL, gteMTC2, psxNULL, gteCTC2, psxNULL,
+	psxNULL, psxNULL, psxNULL, psxNULL, psxNULL, psxNULL, psxNULL, psxNULL,
+	psxNULL, psxNULL, psxNULL, psxNULL, psxNULL, psxNULL, psxNULL, psxNULL,
+	psxNULL, psxNULL, psxNULL, psxNULL, psxNULL, psxNULL, psxNULL, psxNULL
+};
+
+
+///////////////////////////////////////////
+
+static int intInit() {
+	return 0;
+}
+
+static void intReset() {
+}
+
+static void intExecute() {
+	for (;;) 
+		execI();
+}
+
+static void intExecuteBlock() {
+	branch2 = 0;
+	while (!branch2) execI();
+}
+
+static void intClear(u32 Addr, u32 Size) {
+}
+
+static void intShutdown() {
+}
+
+// interpreter execution
+inline void execI() { 
+	u32 *code = (u32 *)PSXM(psxRegs.pc);
+	psxRegs.code = ((code == NULL) ? 0 : SWAP32(*code));
+
+	debugI();
+
+	if (Config.Debug) ProcessDebug();
+
+	psxRegs.pc += 4;
+	psxRegs.cycle += BIAS;
+
+	psxBSC[psxRegs.code >> 26]();
+}
+
+R3000Acpu psxInt = {
+	intInit,
+	intReset,
+	intExecute,
+	intExecuteBlock,
+	intClear,
+	intShutdown
+};
diff --git a/libpcsxcore/psxmem.c b/libpcsxcore/psxmem.c
new file mode 100644
index 0000000..fc4a90e
--- /dev/null
+++ b/libpcsxcore/psxmem.c
@@ -0,0 +1,348 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+/*
+* PSX memory functions.
+*/
+
+// TODO: Implement caches & cycle penalty.
+
+#include "psxmem.h"
+#include "r3000a.h"
+#include "psxhw.h"
+#include <sys/mman.h>
+
+#ifndef MAP_ANONYMOUS
+#define MAP_ANONYMOUS MAP_ANON
+#endif
+
+s8 *psxM = NULL; // Kernel & User Memory (2 Meg)
+s8 *psxP = NULL; // Parallel Port (64K)
+s8 *psxR = NULL; // BIOS ROM (512K)
+s8 *psxH = NULL; // Scratch Pad (1K) & Hardware Registers (8K)
+
+u8 **psxMemWLUT = NULL;
+u8 **psxMemRLUT = NULL;
+
+/*  Playstation Memory Map (from Playstation doc by Joshua Walker)
+0x0000_0000-0x0000_ffff		Kernel (64K)
+0x0001_0000-0x001f_ffff		User Memory (1.9 Meg)
+
+0x1f00_0000-0x1f00_ffff		Parallel Port (64K)
+
+0x1f80_0000-0x1f80_03ff		Scratch Pad (1024 bytes)
+
+0x1f80_1000-0x1f80_2fff		Hardware Registers (8K)
+
+0x1fc0_0000-0x1fc7_ffff		BIOS (512K)
+
+0x8000_0000-0x801f_ffff		Kernel and User Memory Mirror (2 Meg) Cached
+0x9fc0_0000-0x9fc7_ffff		BIOS Mirror (512K) Cached
+
+0xa000_0000-0xa01f_ffff		Kernel and User Memory Mirror (2 Meg) Uncached
+0xbfc0_0000-0xbfc7_ffff		BIOS Mirror (512K) Uncached
+*/
+
+int psxMemInit() {
+	int i;
+
+	psxMemRLUT = (u8 **)malloc(0x10000 * sizeof(void *));
+	psxMemWLUT = (u8 **)malloc(0x10000 * sizeof(void *));
+	memset(psxMemRLUT, 0, 0x10000 * sizeof(void *));
+	memset(psxMemWLUT, 0, 0x10000 * sizeof(void *));
+
+	psxM = mmap(0, 0x00220000,
+		PROT_WRITE | PROT_READ, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
+
+	psxP = &psxM[0x200000];
+	psxH = &psxM[0x210000];
+
+	psxR = (s8 *)malloc(0x00080000);
+
+	if (psxMemRLUT == NULL || psxMemWLUT == NULL || 
+		psxM == NULL || psxP == NULL || psxH == NULL) {
+		SysMessage(_("Error allocating memory!"));
+		return -1;
+	}
+
+// MemR
+	for (i = 0; i < 0x80; i++) psxMemRLUT[i + 0x0000] = (u8 *)&psxM[(i & 0x1f) << 16];
+
+	memcpy(psxMemRLUT + 0x8000, psxMemRLUT, 0x80 * sizeof(void *));
+	memcpy(psxMemRLUT + 0xa000, psxMemRLUT, 0x80 * sizeof(void *));
+
+	psxMemRLUT[0x1f00] = (u8 *)psxP;
+	psxMemRLUT[0x1f80] = (u8 *)psxH;
+
+	for (i = 0; i < 0x08; i++) psxMemRLUT[i + 0x1fc0] = (u8 *)&psxR[i << 16];
+
+	memcpy(psxMemRLUT + 0x9fc0, psxMemRLUT + 0x1fc0, 0x08 * sizeof(void *));
+	memcpy(psxMemRLUT + 0xbfc0, psxMemRLUT + 0x1fc0, 0x08 * sizeof(void *));
+
+// MemW
+	for (i = 0; i < 0x80; i++) psxMemWLUT[i + 0x0000] = (u8 *)&psxM[(i & 0x1f) << 16];
+
+	memcpy(psxMemWLUT + 0x8000, psxMemWLUT, 0x80 * sizeof(void *));
+	memcpy(psxMemWLUT + 0xa000, psxMemWLUT, 0x80 * sizeof(void *));
+
+	psxMemWLUT[0x1f00] = (u8 *)psxP;
+	psxMemWLUT[0x1f80] = (u8 *)psxH;
+
+	return 0;
+}
+
+void psxMemReset() {
+	FILE *f = NULL;
+	char bios[1024];
+
+	memset(psxM, 0, 0x00200000);
+	memset(psxP, 0, 0x00010000);
+
+	if (strcmp(Config.Bios, "HLE") != 0) {
+		sprintf(bios, "%s/%s", Config.BiosDir, Config.Bios);
+		f = fopen(bios, "rb");
+
+		if (f == NULL) {
+			SysMessage(_("Could not open BIOS:\"%s\". Enabling HLE Bios!\n"), bios);
+			memset(psxR, 0, 0x80000);
+			Config.HLE = TRUE;
+		} else {
+			fread(psxR, 1, 0x80000, f);
+			fclose(f);
+			Config.HLE = FALSE;
+		}
+	} else Config.HLE = TRUE;
+}
+
+void psxMemShutdown() {
+	munmap(psxM, 0x00220000);
+
+	free(psxR);
+	free(psxMemRLUT);
+	free(psxMemWLUT);
+}
+
+static int writeok = 1;
+
+u8 psxMemRead8(u32 mem) {
+	char *p;
+	u32 t;
+
+	t = mem >> 16;
+	if (t == 0x1f80) {
+		if (mem < 0x1f801000)
+			return psxHu8(mem);
+		else
+			return psxHwRead8(mem);
+	} else {
+		p = (char *)(psxMemRLUT[t]);
+		if (p != NULL) {
+			if (Config.Debug)
+				DebugCheckBP((mem & 0xffffff) | 0x80000000, R1);
+			return *(u8 *)(p + (mem & 0xffff));
+		} else {
+#ifdef PSXMEM_LOG
+			PSXMEM_LOG("err lb %8.8lx\n", mem);
+#endif
+			return 0;
+		}
+	}
+}
+
+u16 psxMemRead16(u32 mem) {
+	char *p;
+	u32 t;
+
+	t = mem >> 16;
+	if (t == 0x1f80) {
+		if (mem < 0x1f801000)
+			return psxHu16(mem);
+		else
+			return psxHwRead16(mem);
+	} else {
+		p = (char *)(psxMemRLUT[t]);
+		if (p != NULL) {
+			if (Config.Debug)
+				DebugCheckBP((mem & 0xffffff) | 0x80000000, R2);
+			return SWAPu16(*(u16 *)(p + (mem & 0xffff)));
+		} else {
+#ifdef PSXMEM_LOG
+			PSXMEM_LOG("err lh %8.8lx\n", mem);
+#endif
+			return 0;
+		}
+	}
+}
+
+u32 psxMemRead32(u32 mem) {
+	char *p;
+	u32 t;
+
+	t = mem >> 16;
+	if (t == 0x1f80) {
+		if (mem < 0x1f801000)
+			return psxHu32(mem);
+		else
+			return psxHwRead32(mem);
+	} else {
+		p = (char *)(psxMemRLUT[t]);
+		if (p != NULL) {
+			if (Config.Debug)
+				DebugCheckBP((mem & 0xffffff) | 0x80000000, R4);
+			return SWAPu32(*(u32 *)(p + (mem & 0xffff)));
+		} else {
+#ifdef PSXMEM_LOG
+			if (writeok) { PSXMEM_LOG("err lw %8.8lx\n", mem); }
+#endif
+			return 0;
+		}
+	}
+}
+
+void psxMemWrite8(u32 mem, u8 value) {
+	char *p;
+	u32 t;
+
+	t = mem >> 16;
+	if (t == 0x1f80) {
+		if (mem < 0x1f801000)
+			psxHu8(mem) = value;
+		else
+			psxHwWrite8(mem, value);
+	} else {
+		p = (char *)(psxMemWLUT[t]);
+		if (p != NULL) {
+			if (Config.Debug)
+				DebugCheckBP((mem & 0xffffff) | 0x80000000, W1);
+			*(u8 *)(p + (mem & 0xffff)) = value;
+#ifdef PSXREC
+			psxCpu->Clear((mem & (~3)), 1);
+#endif
+		} else {
+#ifdef PSXMEM_LOG
+			PSXMEM_LOG("err sb %8.8lx\n", mem);
+#endif
+		}
+	}
+}
+
+void psxMemWrite16(u32 mem, u16 value) {
+	char *p;
+	u32 t;
+
+	t = mem >> 16;
+	if (t == 0x1f80) {
+		if (mem < 0x1f801000)
+			psxHu16ref(mem) = SWAPu16(value);
+		else
+			psxHwWrite16(mem, value);
+	} else {
+		p = (char *)(psxMemWLUT[t]);
+		if (p != NULL) {
+			if (Config.Debug)
+				DebugCheckBP((mem & 0xffffff) | 0x80000000, W2);
+			*(u16 *)(p + (mem & 0xffff)) = SWAPu16(value);
+#ifdef PSXREC
+			psxCpu->Clear((mem & (~1)), 1);
+#endif
+		} else {
+#ifdef PSXMEM_LOG
+			PSXMEM_LOG("err sh %8.8lx\n", mem);
+#endif
+		}
+	}
+}
+
+void psxMemWrite32(u32 mem, u32 value) {
+	char *p;
+	u32 t;
+
+//	if ((mem&0x1fffff) == 0x71E18 || value == 0x48088800) SysPrintf("t2fix!!\n");
+	t = mem >> 16;
+	if (t == 0x1f80) {
+		if (mem < 0x1f801000)
+			psxHu32ref(mem) = SWAPu32(value);
+		else
+			psxHwWrite32(mem, value);
+	} else {
+		p = (char *)(psxMemWLUT[t]);
+		if (p != NULL) {
+			if (Config.Debug)
+				DebugCheckBP((mem & 0xffffff) | 0x80000000, W4);
+			*(u32 *)(p + (mem & 0xffff)) = SWAPu32(value);
+#ifdef PSXREC
+			psxCpu->Clear(mem, 1);
+#endif
+		} else {
+			if (mem != 0xfffe0130) {
+#ifdef PSXREC
+				if (!writeok)
+					psxCpu->Clear(mem, 1);
+#endif
+
+#ifdef PSXMEM_LOG
+				if (writeok) { PSXMEM_LOG("err sw %8.8lx\n", mem); }
+#endif
+			} else {
+				int i;
+
+				switch (value) {
+					case 0x800: case 0x804:
+						if (writeok == 0) break;
+						writeok = 0;
+						memset(psxMemWLUT + 0x0000, 0, 0x80 * sizeof(void *));
+						memset(psxMemWLUT + 0x8000, 0, 0x80 * sizeof(void *));
+						memset(psxMemWLUT + 0xa000, 0, 0x80 * sizeof(void *));
+						break;
+					case 0x00: case 0x1e988:
+						if (writeok == 1) break;
+						writeok = 1;
+						for (i = 0; i < 0x80; i++) psxMemWLUT[i + 0x0000] = (void *)&psxM[(i & 0x1f) << 16];
+						memcpy(psxMemWLUT + 0x8000, psxMemWLUT, 0x80 * sizeof(void *));
+						memcpy(psxMemWLUT + 0xa000, psxMemWLUT, 0x80 * sizeof(void *));
+						break;
+					default:
+#ifdef PSXMEM_LOG
+						PSXMEM_LOG("unk %8.8lx = %x\n", mem, value);
+#endif
+						break;
+				}
+			}
+		}
+	}
+}
+
+void *psxMemPointer(u32 mem) {
+	char *p;
+	u32 t;
+
+	t = mem >> 16;
+	if (t == 0x1f80) {
+		if (mem < 0x1f801000)
+			return (void *)&psxH[mem];
+		else
+			return NULL;
+	} else {
+		p = (char *)(psxMemWLUT[t]);
+		if (p != NULL) {
+			return (void *)(p + (mem & 0xffff));
+		}
+		return NULL;
+	}
+}
diff --git a/libpcsxcore/psxmem.h b/libpcsxcore/psxmem.h
new file mode 100644
index 0000000..d9fee00
--- /dev/null
+++ b/libpcsxcore/psxmem.h
@@ -0,0 +1,144 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+#ifndef __PSXMEMORY_H__
+#define __PSXMEMORY_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "psxcommon.h"
+
+#if defined(__BIGENDIAN__)
+
+#define _SWAP16(b) ((((unsigned char *)&(b))[0] & 0xff) | (((unsigned char *)&(b))[1] & 0xff) << 8)
+#define _SWAP32(b) ((((unsigned char *)&(b))[0] & 0xff) | ((((unsigned char *)&(b))[1] & 0xff) << 8) | ((((unsigned char *)&(b))[2] & 0xff) << 16) | (((unsigned char *)&(b))[3] << 24))
+
+#define SWAP16(v) ((((v) & 0xff00) >> 8) +(((v) & 0xff) << 8))
+#define SWAP32(v) ((((v) & 0xff000000ul) >> 24) + (((v) & 0xff0000ul) >> 8) + (((v) & 0xff00ul)<<8) +(((v) & 0xfful) << 24))
+#define SWAPu32(v) SWAP32((u32)(v))
+#define SWAPs32(v) SWAP32((s32)(v))
+
+#define SWAPu16(v) SWAP16((u16)(v))
+#define SWAPs16(v) SWAP16((s16)(v))
+
+#else
+
+#define SWAP16(b) (b)
+#define SWAP32(b) (b)
+
+#define SWAPu16(b) (b)
+#define SWAPu32(b) (b)
+
+#endif
+
+extern s8 *psxM;
+#define psxMs8(mem)		psxM[(mem) & 0x1fffff]
+#define psxMs16(mem)	(SWAP16(*(s16 *)&psxM[(mem) & 0x1fffff]))
+#define psxMs32(mem)	(SWAP32(*(s32 *)&psxM[(mem) & 0x1fffff]))
+#define psxMu8(mem)		(*(u8 *)&psxM[(mem) & 0x1fffff])
+#define psxMu16(mem)	(SWAP16(*(u16 *)&psxM[(mem) & 0x1fffff]))
+#define psxMu32(mem)	(SWAP32(*(u32 *)&psxM[(mem) & 0x1fffff]))
+
+#define psxMs8ref(mem)	psxM[(mem) & 0x1fffff]
+#define psxMs16ref(mem)	(*(s16 *)&psxM[(mem) & 0x1fffff])
+#define psxMs32ref(mem)	(*(s32 *)&psxM[(mem) & 0x1fffff])
+#define psxMu8ref(mem)	(*(u8 *)&psxM[(mem) & 0x1fffff])
+#define psxMu16ref(mem)	(*(u16 *)&psxM[(mem) & 0x1fffff])
+#define psxMu32ref(mem)	(*(u32 *)&psxM[(mem) & 0x1fffff])
+
+extern s8 *psxP;
+#define psxPs8(mem)	    psxP[(mem) & 0xffff]
+#define psxPs16(mem)	(SWAP16(*(s16 *)&psxP[(mem) & 0xffff]))
+#define psxPs32(mem)	(SWAP32(*(s32 *)&psxP[(mem) & 0xffff]))
+#define psxPu8(mem)		(*(u8 *)&psxP[(mem) & 0xffff])
+#define psxPu16(mem)	(SWAP16(*(u16 *)&psxP[(mem) & 0xffff]))
+#define psxPu32(mem)	(SWAP32(*(u32 *)&psxP[(mem) & 0xffff]))
+
+#define psxPs8ref(mem)	psxP[(mem) & 0xffff]
+#define psxPs16ref(mem)	(*(s16 *)&psxP[(mem) & 0xffff])
+#define psxPs32ref(mem)	(*(s32 *)&psxP[(mem) & 0xffff])
+#define psxPu8ref(mem)	(*(u8 *)&psxP[(mem) & 0xffff])
+#define psxPu16ref(mem)	(*(u16 *)&psxP[(mem) & 0xffff])
+#define psxPu32ref(mem)	(*(u32 *)&psxP[(mem) & 0xffff])
+
+extern s8 *psxR;
+#define psxRs8(mem)		psxR[(mem) & 0x7ffff]
+#define psxRs16(mem)	(SWAP16(*(s16 *)&psxR[(mem) & 0x7ffff]))
+#define psxRs32(mem)	(SWAP32(*(s32 *)&psxR[(mem) & 0x7ffff]))
+#define psxRu8(mem)		(*(u8* )&psxR[(mem) & 0x7ffff])
+#define psxRu16(mem)	(SWAP16(*(u16 *)&psxR[(mem) & 0x7ffff]))
+#define psxRu32(mem)	(SWAP32(*(u32 *)&psxR[(mem) & 0x7ffff]))
+
+#define psxRs8ref(mem)	psxR[(mem) & 0x7ffff]
+#define psxRs16ref(mem)	(*(s16*)&psxR[(mem) & 0x7ffff])
+#define psxRs32ref(mem)	(*(s32*)&psxR[(mem) & 0x7ffff])
+#define psxRu8ref(mem)	(*(u8 *)&psxR[(mem) & 0x7ffff])
+#define psxRu16ref(mem)	(*(u16*)&psxR[(mem) & 0x7ffff])
+#define psxRu32ref(mem)	(*(u32*)&psxR[(mem) & 0x7ffff])
+
+extern s8 *psxH;
+#define psxHs8(mem)		psxH[(mem) & 0xffff]
+#define psxHs16(mem)	(SWAP16(*(s16 *)&psxH[(mem) & 0xffff]))
+#define psxHs32(mem)	(SWAP32(*(s32 *)&psxH[(mem) & 0xffff]))
+#define psxHu8(mem)		(*(u8 *)&psxH[(mem) & 0xffff])
+#define psxHu16(mem)	(SWAP16(*(u16 *)&psxH[(mem) & 0xffff]))
+#define psxHu32(mem)	(SWAP32(*(u32 *)&psxH[(mem) & 0xffff]))
+
+#define psxHs8ref(mem)	psxH[(mem) & 0xffff]
+#define psxHs16ref(mem)	(*(s16 *)&psxH[(mem) & 0xffff])
+#define psxHs32ref(mem)	(*(s32 *)&psxH[(mem) & 0xffff])
+#define psxHu8ref(mem)	(*(u8 *)&psxH[(mem) & 0xffff])
+#define psxHu16ref(mem)	(*(u16 *)&psxH[(mem) & 0xffff])
+#define psxHu32ref(mem)	(*(u32 *)&psxH[(mem) & 0xffff])
+
+extern u8 **psxMemWLUT;
+extern u8 **psxMemRLUT;
+
+#define PSXM(mem)		(psxMemRLUT[(mem) >> 16] == 0 ? NULL : (u8*)(psxMemRLUT[(mem) >> 16] + ((mem) & 0xffff)))
+#define PSXMs8(mem)		(*(s8 *)PSXM(mem))
+#define PSXMs16(mem)	(SWAP16(*(s16 *)PSXM(mem)))
+#define PSXMs32(mem)	(SWAP32(*(s32 *)PSXM(mem)))
+#define PSXMu8(mem)		(*(u8 *)PSXM(mem))
+#define PSXMu16(mem)	(SWAP16(*(u16 *)PSXM(mem)))
+#define PSXMu32(mem)	(SWAP32(*(u32 *)PSXM(mem)))
+
+#define PSXMu32ref(mem)	(*(u32 *)PSXM(mem))
+
+#if !defined(PSXREC) && (defined(__x86_64__) || defined(__i386__) || defined(__ppc__)) && !defined(NOPSXREC)
+#define PSXREC
+#endif
+
+int psxMemInit();
+void psxMemReset();
+void psxMemShutdown();
+
+u8 psxMemRead8 (u32 mem);
+u16 psxMemRead16(u32 mem);
+u32 psxMemRead32(u32 mem);
+void psxMemWrite8 (u32 mem, u8 value);
+void psxMemWrite16(u32 mem, u16 value);
+void psxMemWrite32(u32 mem, u32 value);
+void *psxMemPointer(u32 mem);
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/libpcsxcore/r3000a.c b/libpcsxcore/r3000a.c
new file mode 100644
index 0000000..8c6289e
--- /dev/null
+++ b/libpcsxcore/r3000a.c
@@ -0,0 +1,202 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+/*
+* R3000A CPU functions.
+*/
+
+#include "r3000a.h"
+#include "cdrom.h"
+#include "mdec.h"
+#include "gte.h"
+
+R3000Acpu *psxCpu = NULL;
+psxRegisters psxRegs;
+
+int psxInit() {
+	SysPrintf(_("Running PCSX Version %s (%s).\n"), PACKAGE_VERSION, __DATE__);
+
+#ifdef PSXREC
+	if (Config.Cpu == CPU_INTERPRETER) {
+		psxCpu = &psxInt;
+	} else psxCpu = &psxRec;
+#else
+	psxCpu = &psxInt;
+#endif
+
+	Log = 0;
+
+	if (psxMemInit() == -1) return -1;
+
+	return psxCpu->Init();
+}
+
+void psxReset() {
+	psxCpu->Reset();
+
+	psxMemReset();
+
+	memset(&psxRegs, 0, sizeof(psxRegs));
+
+	psxRegs.pc = 0xbfc00000; // Start in bootstrap
+
+	psxRegs.CP0.r[12] = 0x10900000; // COP0 enabled | BEV = 1 | TS = 1
+	psxRegs.CP0.r[15] = 0x00000002; // PRevID = Revision ID, same as R3000A
+
+	psxHwReset();
+	psxBiosInit();
+
+	if (!Config.HLE)
+		psxExecuteBios();
+
+#ifdef EMU_LOG
+	EMU_LOG("*BIOS END*\n");
+#endif
+	Log = 0;
+}
+
+void psxShutdown() {
+	psxMemShutdown();
+	psxBiosShutdown();
+
+	psxCpu->Shutdown();
+}
+
+void psxException(u32 code, u32 bd) {
+	// Set the Cause
+	psxRegs.CP0.n.Cause = code;
+
+	// Set the EPC & PC
+	if (bd) {
+#ifdef PSXCPU_LOG
+		PSXCPU_LOG("bd set!!!\n");
+#endif
+		SysPrintf("bd set!!!\n");
+		psxRegs.CP0.n.Cause |= 0x80000000;
+		psxRegs.CP0.n.EPC = (psxRegs.pc - 4);
+	} else
+		psxRegs.CP0.n.EPC = (psxRegs.pc);
+
+	if (psxRegs.CP0.n.Status & 0x400000)
+		psxRegs.pc = 0xbfc00180;
+	else
+		psxRegs.pc = 0x80000080;
+
+	// Set the Status
+	psxRegs.CP0.n.Status = (psxRegs.CP0.n.Status &~0x3f) |
+						  ((psxRegs.CP0.n.Status & 0xf) << 2);
+
+	if (!Config.HLE && (((PSXMu32(psxRegs.CP0.n.EPC) >> 24) & 0xfe) == 0x4a)) {
+		// "hokuto no ken" / "Crash Bandicot 2" ... fix
+		PSXMu32ref(psxRegs.CP0.n.EPC)&= SWAPu32(~0x02000000);
+	}
+
+	if (Config.HLE) psxBiosException();
+}
+
+void psxBranchTest() {
+	if ((psxRegs.cycle - psxNextsCounter) >= psxNextCounter)
+		psxRcntUpdate();
+
+	if (psxRegs.interrupt) {
+		if ((psxRegs.interrupt & 0x80) && !Config.Sio) { // sio
+			if ((psxRegs.cycle - psxRegs.intCycle[7]) >= psxRegs.intCycle[7 + 1]) {
+				psxRegs.interrupt &= ~0x80;
+				sioInterrupt();
+			}
+		}
+		if (psxRegs.interrupt & 0x04) { // cdr
+			if ((psxRegs.cycle - psxRegs.intCycle[2]) >= psxRegs.intCycle[2 + 1]) {
+				psxRegs.interrupt &= ~0x04;
+				cdrInterrupt();
+			}
+		}
+		if (psxRegs.interrupt & 0x040000) { // cdr read
+			if ((psxRegs.cycle - psxRegs.intCycle[2 + 16]) >= psxRegs.intCycle[2 + 16 + 1]) {
+				psxRegs.interrupt &= ~0x040000;
+				cdrReadInterrupt();
+			}
+		}
+		if (psxRegs.interrupt & 0x01000000) { // gpu dma
+			if ((psxRegs.cycle - psxRegs.intCycle[3 + 24]) >= psxRegs.intCycle[3 + 24 + 1]) {
+				psxRegs.interrupt &= ~0x01000000;
+				gpuInterrupt();
+			}
+		}
+		if (psxRegs.interrupt & 0x02000000) { // mdec out dma
+			if ((psxRegs.cycle - psxRegs.intCycle[5 + 24]) >= psxRegs.intCycle[5 + 24 + 1]) {
+				psxRegs.interrupt &= ~0x02000000;
+				mdec1Interrupt();
+			}
+		}
+		if (psxRegs.interrupt & 0x04000000) { // spu dma
+			if ((psxRegs.cycle - psxRegs.intCycle[1 + 24]) >= psxRegs.intCycle[1 + 24 + 1]) {
+				psxRegs.interrupt &= ~0x04000000;
+				spuInterrupt();
+			}
+		}
+	}
+
+	if (psxHu32(0x1070) & psxHu32(0x1074)) {
+		if ((psxRegs.CP0.n.Status & 0x401) == 0x401) {
+#ifdef PSXCPU_LOG
+			PSXCPU_LOG("Interrupt: %x %x\n", psxHu32(0x1070), psxHu32(0x1074));
+#endif
+//			SysPrintf("Interrupt (%x): %x %x\n", psxRegs.cycle, psxHu32(0x1070), psxHu32(0x1074));
+			psxException(0x400, 0);
+		}
+	}
+}
+
+void psxJumpTest() {
+	if (!Config.HLE && Config.PsxOut) {
+		u32 call = psxRegs.GPR.n.t1 & 0xff;
+		switch (psxRegs.pc & 0x1fffff) {
+			case 0xa0:
+#ifdef PSXBIOS_LOG
+				if (call != 0x28 && call != 0xe) {
+					PSXBIOS_LOG("Bios call a0: %s (%x) %x,%x,%x,%x\n", biosA0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); }
+#endif
+				if (biosA0[call])
+					biosA0[call]();
+				break;
+			case 0xb0:
+#ifdef PSXBIOS_LOG
+				if (call != 0x17 && call != 0xb) {
+					PSXBIOS_LOG("Bios call b0: %s (%x) %x,%x,%x,%x\n", biosB0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); }
+#endif
+				if (biosB0[call])
+					biosB0[call]();
+				break;
+			case 0xc0:
+#ifdef PSXBIOS_LOG
+				PSXBIOS_LOG("Bios call c0: %s (%x) %x,%x,%x,%x\n", biosC0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3);
+#endif
+				if (biosC0[call])
+					biosC0[call]();
+				break;
+		}
+	}
+}
+
+void psxExecuteBios() {
+	while (psxRegs.pc != 0x80030000)
+		psxCpu->ExecuteBlock();
+}
+
diff --git a/libpcsxcore/r3000a.h b/libpcsxcore/r3000a.h
new file mode 100644
index 0000000..51cd37c
--- /dev/null
+++ b/libpcsxcore/r3000a.h
@@ -0,0 +1,246 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+#ifndef __R3000A_H__
+#define __R3000A_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "psxcommon.h"
+#include "psxmem.h"
+#include "psxcounters.h"
+#include "psxbios.h"
+
+typedef struct {
+	int  (*Init)();
+	void (*Reset)();
+	void (*Execute)();		/* executes up to a break */
+	void (*ExecuteBlock)();	/* executes up to a jump */
+	void (*Clear)(u32 Addr, u32 Size);
+	void (*Shutdown)();
+} R3000Acpu;
+
+extern R3000Acpu *psxCpu;
+extern R3000Acpu psxInt;
+#if (defined(__x86_64__) || defined(__i386__) || defined(__sh__) || defined(__ppc__)) && !defined(NOPSXREC)
+extern R3000Acpu psxRec;
+#define PSXREC
+#endif
+
+typedef union {
+#if defined(__BIGENDIAN__)
+	struct { u8 h3, h2, h, l; } b;
+	struct { s8 h3, h2, h, l; } sb;
+	struct { u16 h, l; } w;
+	struct { s16 h, l; } sw;
+#else
+	struct { u8 l, h, h2, h3; } b;
+	struct { u16 l, h; } w;
+	struct { s8 l, h, h2, h3; } sb;
+	struct { s16 l, h; } sw;
+#endif
+} PAIR;
+
+typedef union {
+	struct {
+		u32   r0, at, v0, v1, a0, a1, a2, a3,
+						t0, t1, t2, t3, t4, t5, t6, t7,
+						s0, s1, s2, s3, s4, s5, s6, s7,
+						t8, t9, k0, k1, gp, sp, s8, ra, lo, hi;
+	} n;
+	u32 r[34]; /* Lo, Hi in r[32] and r[33] */
+	PAIR p[34];
+} psxGPRRegs;
+
+typedef union {
+	struct {
+		u32	Index,     Random,    EntryLo0,  EntryLo1,
+						Context,   PageMask,  Wired,     Reserved0,
+						BadVAddr,  Count,     EntryHi,   Compare,
+						Status,    Cause,     EPC,       PRid,
+						Config,    LLAddr,    WatchLO,   WatchHI,
+						XContext,  Reserved1, Reserved2, Reserved3,
+						Reserved4, Reserved5, ECC,       CacheErr,
+						TagLo,     TagHi,     ErrorEPC,  Reserved6;
+	} n;
+	u32 r[32];
+	PAIR p[32];
+} psxCP0Regs;
+
+typedef struct {
+	short x, y;
+} SVector2D;
+
+typedef struct {
+	short z, pad;
+} SVector2Dz;
+
+typedef struct {
+	short x, y, z, pad;
+} SVector3D;
+
+typedef struct {
+	short x, y, z, pad;
+} LVector3D;
+
+typedef struct {
+	unsigned char r, g, b, c;
+} CBGR;
+
+typedef struct {
+	short m11, m12, m13, m21, m22, m23, m31, m32, m33, pad;
+} SMatrix3D;
+
+typedef union {
+	struct {
+		SVector3D     v0, v1, v2;
+		CBGR          rgb;
+		s32          otz;
+		s32          ir0, ir1, ir2, ir3;
+		SVector2D     sxy0, sxy1, sxy2, sxyp;
+		SVector2Dz    sz0, sz1, sz2, sz3;
+		CBGR          rgb0, rgb1, rgb2;
+		s32          reserved;
+		s32          mac0, mac1, mac2, mac3;
+		u32 irgb, orgb;
+		s32          lzcs, lzcr;
+	} n;
+	u32 r[32];
+	PAIR p[32];
+} psxCP2Data;
+
+typedef union {
+	struct {
+		SMatrix3D rMatrix;
+		s32      trX, trY, trZ;
+		SMatrix3D lMatrix;
+		s32      rbk, gbk, bbk;
+		SMatrix3D cMatrix;
+		s32      rfc, gfc, bfc;
+		s32      ofx, ofy;
+		s32      h;
+		s32      dqa, dqb;
+		s32      zsf3, zsf4;
+		s32      flag;
+	} n;
+	u32 r[32];
+	PAIR p[32];
+} psxCP2Ctrl;
+
+typedef struct {
+	psxGPRRegs GPR;		/* General Purpose Registers */
+	psxCP0Regs CP0;		/* Coprocessor0 Registers */
+	psxCP2Data CP2D; 	/* Cop2 data registers */
+	psxCP2Ctrl CP2C; 	/* Cop2 control registers */
+    u32 pc;				/* Program counter */
+    u32 code;			/* The instruction */
+	u32 cycle;
+	u32 interrupt;
+	u32 intCycle[32];
+} psxRegisters;
+
+extern psxRegisters psxRegs;
+
+#if defined(__BIGENDIAN__)
+
+#define _i32(x) *(s32 *)&x
+#define _u32(x) x
+
+#define _i16(x) (((short *)&x)[1])
+#define _u16(x) (((unsigned short *)&x)[1])
+
+#define _i8(x) (((char *)&x)[3])
+#define _u8(x) (((unsigned char *)&x)[3])
+
+#else
+
+#define _i32(x) *(s32 *)&x
+#define _u32(x) x
+
+#define _i16(x) *(short *)&x
+#define _u16(x) *(unsigned short *)&x
+
+#define _i8(x) *(char *)&x
+#define _u8(x) *(unsigned char *)&x
+
+#endif
+
+/**** R3000A Instruction Macros ****/
+#define _PC_       psxRegs.pc       // The next PC to be executed
+
+#define _fOp_(code)		((code >> 26)       )  // The opcode part of the instruction register 
+#define _fFunct_(code)	((code      ) & 0x3F)  // The funct part of the instruction register 
+#define _fRd_(code)		((code >> 11) & 0x1F)  // The rd part of the instruction register 
+#define _fRt_(code)		((code >> 16) & 0x1F)  // The rt part of the instruction register 
+#define _fRs_(code)		((code >> 21) & 0x1F)  // The rs part of the instruction register 
+#define _fSa_(code)		((code >>  6) & 0x1F)  // The sa part of the instruction register
+#define _fIm_(code)		((u16)code)            // The immediate part of the instruction register
+#define _fTarget_(code)	(code & 0x03ffffff)    // The target part of the instruction register
+
+#define _fImm_(code)	((s16)code)            // sign-extended immediate
+#define _fImmU_(code)	(code&0xffff)          // zero-extended immediate
+
+#define _Op_     _fOp_(psxRegs.code)
+#define _Funct_  _fFunct_(psxRegs.code)
+#define _Rd_     _fRd_(psxRegs.code)
+#define _Rt_     _fRt_(psxRegs.code)
+#define _Rs_     _fRs_(psxRegs.code)
+#define _Sa_     _fSa_(psxRegs.code)
+#define _Im_     _fIm_(psxRegs.code)
+#define _Target_ _fTarget_(psxRegs.code)
+
+#define _Imm_	 _fImm_(psxRegs.code)
+#define _ImmU_	 _fImmU_(psxRegs.code)
+
+#define _rRs_   psxRegs.GPR.r[_Rs_]   // Rs register
+#define _rRt_   psxRegs.GPR.r[_Rt_]   // Rt register
+#define _rRd_   psxRegs.GPR.r[_Rd_]   // Rd register
+#define _rSa_   psxRegs.GPR.r[_Sa_]   // Sa register
+#define _rFs_   psxRegs.CP0.r[_Rd_]   // Fs register
+
+#define _c2dRs_ psxRegs.CP2D.r[_Rs_]  // Rs cop2 data register
+#define _c2dRt_ psxRegs.CP2D.r[_Rt_]  // Rt cop2 data register
+#define _c2dRd_ psxRegs.CP2D.r[_Rd_]  // Rd cop2 data register
+#define _c2dSa_ psxRegs.CP2D.r[_Sa_]  // Sa cop2 data register
+
+#define _rHi_   psxRegs.GPR.n.hi   // The HI register
+#define _rLo_   psxRegs.GPR.n.lo   // The LO register
+
+#define _JumpTarget_    ((_Target_ * 4) + (_PC_ & 0xf0000000))   // Calculates the target during a jump instruction
+#define _BranchTarget_  ((s16)_Im_ * 4 + _PC_)                 // Calculates the target during a branch instruction
+
+#define _SetLink(x)     psxRegs.GPR.r[x] = _PC_ + 4;       // Sets the return address in the link register
+
+int  psxInit();
+void psxReset();
+void psxShutdown();
+void psxException(u32 code, u32 bd);
+void psxBranchTest();
+void psxExecuteBios();
+int  psxTestLoadDelay(int reg, u32 tmp);
+void psxDelayTest(int reg, u32 bpc);
+void psxTestSWInts();
+void psxJumpTest();
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/libpcsxcore/sio.c b/libpcsxcore/sio.c
new file mode 100644
index 0000000..977c71d
--- /dev/null
+++ b/libpcsxcore/sio.c
@@ -0,0 +1,775 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+/*
+* SIO functions.
+*/
+
+#include "sio.h"
+#include <sys/stat.h>
+
+// Status Flags
+#define TX_RDY		0x0001
+#define RX_RDY		0x0002
+#define TX_EMPTY	0x0004
+#define PARITY_ERR	0x0008
+#define RX_OVERRUN	0x0010
+#define FRAMING_ERR	0x0020
+#define SYNC_DETECT	0x0040
+#define DSR			0x0080
+#define CTS			0x0100
+#define IRQ			0x0200
+
+// Control Flags
+#define TX_PERM		0x0001
+#define DTR			0x0002
+#define RX_PERM		0x0004
+#define BREAK		0x0008
+#define RESET_ERR	0x0010
+#define RTS			0x0020
+#define SIO_RESET	0x0040
+
+// *** FOR WORKS ON PADS AND MEMORY CARDS *****
+
+static unsigned char buf[256];
+unsigned char cardh[4] = { 0x00, 0x00, 0x5a, 0x5d };
+
+// Transfer Ready and the Buffer is Empty
+// static unsigned short StatReg = 0x002b;
+static unsigned short StatReg = TX_RDY | TX_EMPTY;
+static unsigned short ModeReg;
+static unsigned short CtrlReg;
+static unsigned short BaudReg;
+
+static unsigned int bufcount;
+static unsigned int parp;
+static unsigned int mcdst, rdwr;
+static unsigned char adrH, adrL;
+static unsigned int padst;
+
+char Mcd1Data[MCD_SIZE], Mcd2Data[MCD_SIZE];
+
+// clk cycle byte
+// 4us * 8bits = (PSXCLK / 1000000) * 32; (linuzappz)
+// TODO: add SioModePrescaler and BaudReg
+static inline void SIO_INT() {
+	if (!Config.Sio) {
+		psxRegs.interrupt |= 0x80;
+		psxRegs.intCycle[7 + 1] = 400;
+		psxRegs.intCycle[7] = psxRegs.cycle;
+	}
+}
+
+void sioWrite8(unsigned char value) {
+#ifdef PAD_LOG
+	PAD_LOG("sio write8 %x\n", value);
+#endif
+	switch (padst) {
+		case 1: SIO_INT();
+			if ((value & 0x40) == 0x40) {
+				padst = 2; parp = 1;
+				if (!Config.UseNet) {
+					switch (CtrlReg & 0x2002) {
+						case 0x0002:
+							buf[parp] = PAD1_poll(value);
+							break;
+						case 0x2002:
+							buf[parp] = PAD2_poll(value);
+							break;
+					}
+				}/* else {
+//					SysPrintf("%x: %x, %x, %x, %x\n", CtrlReg&0x2002, buf[2], buf[3], buf[4], buf[5]);
+				}*/
+
+				if (!(buf[parp] & 0x0f)) {
+					bufcount = 2 + 32;
+				} else {
+					bufcount = 2 + (buf[parp] & 0x0f) * 2;
+				}
+				if (buf[parp] == 0x41) {
+					switch (value) {
+						case 0x43:
+							buf[1] = 0x43;
+							break;
+						case 0x45:
+							buf[1] = 0xf3;
+							break;
+					}
+				}
+			}
+			else padst = 0;
+			return;
+		case 2:
+			parp++;
+/*			if (buf[1] == 0x45) {
+				buf[parp] = 0;
+				SIO_INT();
+				return;
+			}*/
+			if (!Config.UseNet) {
+				switch (CtrlReg & 0x2002) {
+					case 0x0002: buf[parp] = PAD1_poll(value); break;
+					case 0x2002: buf[parp] = PAD2_poll(value); break;
+				}
+			}
+
+			if (parp == bufcount) { padst = 0; return; }
+			SIO_INT();
+			return;
+	}
+
+	switch (mcdst) {
+		case 1:
+			SIO_INT();
+			if (rdwr) { parp++; return; }
+			parp = 1;
+			switch (value) {
+				case 0x52: rdwr = 1; break;
+				case 0x57: rdwr = 2; break;
+				default: mcdst = 0;
+			}
+			return;
+		case 2: // address H
+			SIO_INT();
+			adrH = value;
+			*buf = 0;
+			parp = 0;
+			bufcount = 1;
+			mcdst = 3;
+			return;
+		case 3: // address L
+			SIO_INT();
+			adrL = value;
+			*buf = adrH;
+			parp = 0;
+			bufcount = 1;
+			mcdst = 4;
+			return;
+		case 4:
+			SIO_INT();
+			parp = 0;
+			switch (rdwr) {
+				case 1: // read
+					buf[0] = 0x5c;
+					buf[1] = 0x5d;
+					buf[2] = adrH;
+					buf[3] = adrL;
+					switch (CtrlReg & 0x2002) {
+						case 0x0002:
+							memcpy(&buf[4], Mcd1Data + (adrL | (adrH << 8)) * 128, 128);
+							break;
+						case 0x2002:
+							memcpy(&buf[4], Mcd2Data + (adrL | (adrH << 8)) * 128, 128);
+							break;
+					}
+					{
+					char xor = 0;
+					int i;
+					for (i = 2; i < 128 + 4; i++)
+						xor ^= buf[i];
+					buf[132] = xor;
+					}
+					buf[133] = 0x47;
+					bufcount = 133;
+					break;
+				case 2: // write
+					buf[0] = adrL;
+					buf[1] = value;
+					buf[129] = 0x5c;
+					buf[130] = 0x5d;
+					buf[131] = 0x47;
+					bufcount = 131;
+					break;
+			}
+			mcdst = 5;
+			return;
+		case 5:
+			parp++;
+			if (rdwr == 2) {
+				if (parp < 128) buf[parp + 1] = value;
+			}
+			SIO_INT();
+			return;
+	}
+
+	switch (value) {
+		case 0x01: // start pad
+			StatReg |= RX_RDY;		// Transfer is Ready
+
+			if (!Config.UseNet) {
+				switch (CtrlReg & 0x2002) {
+					case 0x0002: buf[0] = PAD1_startPoll(1); break;
+					case 0x2002: buf[0] = PAD2_startPoll(2); break;
+				}
+			} else {
+				if ((CtrlReg & 0x2002) == 0x0002) {
+					int i, j;
+
+					PAD1_startPoll(1);
+					buf[0] = 0;
+					buf[1] = PAD1_poll(0x42);
+					if (!(buf[1] & 0x0f)) {
+						bufcount = 32;
+					} else {
+						bufcount = (buf[1] & 0x0f) * 2;
+					}
+					buf[2] = PAD1_poll(0);
+					i = 3;
+					j = bufcount;
+					while (j--) {
+						buf[i++] = PAD1_poll(0);
+					}
+					bufcount+= 3;
+
+					if (NET_sendPadData(buf, bufcount) == -1)
+						netError();
+
+					if (NET_recvPadData(buf, 1) == -1)
+						netError();
+					if (NET_recvPadData(buf + 128, 2) == -1)
+						netError();
+				} else {
+					memcpy(buf, buf + 128, 32);
+				}
+			}
+
+			bufcount = 2;
+			parp = 0;
+			padst = 1;
+			SIO_INT();
+			return;
+		case 0x81: // start memcard
+			StatReg |= RX_RDY;
+			memcpy(buf, cardh, 4);
+			parp = 0;
+			bufcount = 3;
+			mcdst = 1;
+			rdwr = 0;
+			SIO_INT();
+			return;
+	}
+}
+
+void sioWriteStat16(unsigned short value) {
+}
+
+void sioWriteMode16(unsigned short value) {
+	ModeReg = value;
+}
+
+void sioWriteCtrl16(unsigned short value) {
+	CtrlReg = value & ~RESET_ERR;
+	if (value & RESET_ERR) StatReg &= ~IRQ;
+	if ((CtrlReg & SIO_RESET) || (!CtrlReg)) {
+		padst = 0; mcdst = 0; parp = 0;
+		StatReg = TX_RDY | TX_EMPTY;
+		psxRegs.interrupt &= ~0x80;
+	}
+}
+
+void sioWriteBaud16(unsigned short value) {
+	BaudReg = value;
+}
+
+unsigned char sioRead8() {
+	unsigned char ret = 0;
+
+	if ((StatReg & RX_RDY)/* && (CtrlReg & RX_PERM)*/) {
+//		StatReg &= ~RX_OVERRUN;
+		ret = buf[parp];
+		if (parp == bufcount) {
+			StatReg &= ~RX_RDY;		// Receive is not Ready now
+			if (mcdst == 5) {
+				mcdst = 0;
+				if (rdwr == 2) {
+					switch (CtrlReg & 0x2002) {
+						case 0x0002:
+							memcpy(Mcd1Data + (adrL | (adrH << 8)) * 128, &buf[1], 128);
+							SaveMcd(Config.Mcd1, Mcd1Data, (adrL | (adrH << 8)) * 128, 128);
+							break;
+						case 0x2002:
+							memcpy(Mcd2Data + (adrL | (adrH << 8)) * 128, &buf[1], 128);
+							SaveMcd(Config.Mcd2, Mcd2Data, (adrL | (adrH << 8)) * 128, 128);
+							break;
+					}
+				}
+			}
+			if (padst == 2) padst = 0;
+			if (mcdst == 1) {
+				mcdst = 2;
+				StatReg|= RX_RDY;
+			}
+		}
+	}
+
+#ifdef PAD_LOG
+	PAD_LOG("sio read8 ;ret = %x\n", ret);
+#endif
+	return ret;
+}
+
+unsigned short sioReadStat16() {
+	return StatReg;
+}
+
+unsigned short sioReadMode16() {
+	return ModeReg;
+}
+
+unsigned short sioReadCtrl16() {
+	return CtrlReg;
+}
+
+unsigned short sioReadBaud16() {
+	return BaudReg;
+}
+
+void netError() {
+	ClosePlugins();
+	SysMessage(_("Connection closed!\n"));
+
+	CdromId[0] = '\0';
+	CdromLabel[0] = '\0';
+
+	SysRunGui();
+}
+
+void sioInterrupt() {
+#ifdef PAD_LOG
+	PAD_LOG("Sio Interrupt (CP0.Status = %x)\n", psxRegs.CP0.n.Status);
+#endif
+//	SysPrintf("Sio Interrupt\n");
+	StatReg |= IRQ;
+	psxHu32ref(0x1070) |= SWAPu32(0x80);
+}
+
+void LoadMcd(int mcd, char *str) {
+	FILE *f;
+	char *data = NULL;
+
+	if (mcd == 1) data = Mcd1Data;
+	if (mcd == 2) data = Mcd2Data;
+
+	if (*str == 0) {
+		sprintf(str, "memcards/card%d.mcd", mcd);
+		SysPrintf(_("No memory card value was specified - creating a default card %s\n"), str);
+	}
+	f = fopen(str, "rb");
+	if (f == NULL) {
+		SysPrintf(_("The memory card %s doesn't exist - creating it\n"), str);
+		CreateMcd(str);
+		f = fopen(str, "rb");
+		if (f != NULL) {
+			struct stat buf;
+
+			if (stat(str, &buf) != -1) {
+				if (buf.st_size == MCD_SIZE + 64)
+					fseek(f, 64, SEEK_SET);
+				else if(buf.st_size == MCD_SIZE + 3904)
+					fseek(f, 3904, SEEK_SET);
+			}
+			fread(data, 1, MCD_SIZE, f);
+			fclose(f);
+		}
+		else
+			SysMessage(_("Memory card %s failed to load!\n"), str);
+	}
+	else {
+		struct stat buf;
+		SysPrintf(_("Loading memory card %s\n"), str);
+		if (stat(str, &buf) != -1) {
+			if (buf.st_size == MCD_SIZE + 64)
+				fseek(f, 64, SEEK_SET);
+			else if(buf.st_size == MCD_SIZE + 3904)
+				fseek(f, 3904, SEEK_SET);
+		}
+		fread(data, 1, MCD_SIZE, f);
+		fclose(f);
+	}
+}
+
+void LoadMcds(char *mcd1, char *mcd2) {
+	LoadMcd(1, mcd1);
+	LoadMcd(2, mcd2);
+}
+
+void SaveMcd(char *mcd, char *data, uint32_t adr, int size) {
+	FILE *f;
+
+	f = fopen(mcd, "r+b");
+	if (f != NULL) {
+		struct stat buf;
+
+		if (stat(mcd, &buf) != -1) {
+			if (buf.st_size == MCD_SIZE + 64)
+				fseek(f, adr + 64, SEEK_SET);
+			else if (buf.st_size == MCD_SIZE + 3904)
+				fseek(f, adr + 3904, SEEK_SET);
+			else
+				fseek(f, adr, SEEK_SET);
+		} else
+			fseek(f, adr, SEEK_SET);
+
+		fwrite(data + adr, 1, size, f);
+		fclose(f);
+		return;
+	}
+
+#if 0
+	// try to create it again if we can't open it
+	f = fopen(mcd, "wb");
+	if (f != NULL) {
+		fwrite(data, 1, MCD_SIZE, f);
+		fclose(f);
+	}
+#endif
+
+	ConvertMcd(mcd, data);
+}
+
+void CreateMcd(char *mcd) {
+	FILE *f;
+	struct stat buf;
+	int s = MCD_SIZE;
+	int i = 0, j;
+
+	f = fopen(mcd, "wb");
+	if (f == NULL)
+		return;
+
+	if (stat(mcd, &buf) != -1) {
+		if ((buf.st_size == MCD_SIZE + 3904) || strstr(mcd, ".gme")) {
+			s = s + 3904;
+			fputc('1', f);
+			s--;
+			fputc('2', f);
+			s--;
+			fputc('3', f);
+			s--;
+			fputc('-', f);
+			s--;
+			fputc('4', f);
+			s--;
+			fputc('5', f);
+			s--;
+			fputc('6', f);
+			s--;
+			fputc('-', f);
+			s--;
+			fputc('S', f);
+			s--;
+			fputc('T', f);
+			s--;
+			fputc('D', f);
+			s--;
+			for (i = 0; i < 7; i++) {
+				fputc(0, f);
+				s--;
+			}
+			fputc(1, f);
+			s--;
+			fputc(0, f);
+			s--;
+			fputc(1, f);
+			s--;
+			fputc('M', f);
+			s--;
+			fputc('Q', f);
+			s--;
+			for (i = 0; i < 14; i++) {
+				fputc(0xa0, f);
+				s--;
+			}
+			fputc(0, f);
+			s--;
+			fputc(0xff, f);
+			while (s-- > (MCD_SIZE + 1))
+				fputc(0, f);
+		} else if ((buf.st_size == MCD_SIZE + 64) || strstr(mcd, ".mem") || strstr(mcd, ".vgs")) {
+			s = s + 64;
+			fputc('V', f);
+			s--;
+			fputc('g', f);
+			s--;
+			fputc('s', f);
+			s--;
+			fputc('M', f);
+			s--;
+			for (i = 0; i < 3; i++) {
+				fputc(1, f);
+				s--;
+				fputc(0, f);
+				s--;
+				fputc(0, f);
+				s--;
+				fputc(0, f);
+				s--;
+			}
+			fputc(0, f);
+			s--;
+			fputc(2, f);
+			while (s-- > (MCD_SIZE + 1))
+				fputc(0, f);
+		}
+	}
+	fputc('M', f);
+	s--;
+	fputc('C', f);
+	s--;
+	while (s-- > (MCD_SIZE - 127))
+		fputc(0, f);
+	fputc(0xe, f);
+	s--;
+
+	for (i = 0; i < 15; i++) { // 15 blocks
+		fputc(0xa0, f);
+		s--;
+		fputc(0x00, f);
+		s--;
+		fputc(0x00, f);
+		s--;
+		fputc(0x00, f);
+		s--;
+		fputc(0x00, f);
+		s--;
+		fputc(0x00, f);
+		s--;
+		fputc(0x00, f);
+		s--;
+		fputc(0x00, f);
+		s--;
+		fputc(0xff, f);
+		s--;
+		fputc(0xff, f);
+		s--;
+		for (j = 0; j < 117; j++) {
+			fputc(0x00, f);
+			s--;
+		}
+		fputc(0xa0, f);
+		s--;
+	}
+
+	for (i = 0; i < 20; i++) {
+		fputc(0xff, f);
+		s--;
+		fputc(0xff, f);
+		s--;
+		fputc(0xff, f);
+		s--;
+		fputc(0xff, f);
+		s--;
+		fputc(0x00, f);
+		s--;
+		fputc(0x00, f);
+		s--;
+		fputc(0x00, f);
+		s--;
+		fputc(0x00, f);
+		s--;
+		fputc(0xff, f);
+		s--;
+		fputc(0xff, f);
+		s--;
+		for (j = 0; j < 118; j++) {
+			fputc(0x00, f);
+			s--;
+		}
+	}
+
+	while ((s--) >= 0)
+		fputc(0, f);
+
+	fclose(f);
+}
+
+void ConvertMcd(char *mcd, char *data) {
+	FILE *f;
+	int i = 0;
+	int s = MCD_SIZE;
+
+	if (strstr(mcd, ".gme")) {
+		f = fopen(mcd, "wb");
+		if (f != NULL) {
+			fwrite(data - 3904, 1, MCD_SIZE + 3904, f);
+			fclose(f);
+		}
+		f = fopen(mcd, "r+");
+		s = s + 3904;
+		fputc('1', f); s--;
+		fputc('2', f); s--;
+		fputc('3', f); s--;
+		fputc('-', f); s--;
+		fputc('4', f); s--;
+		fputc('5', f); s--;
+		fputc('6', f); s--;
+		fputc('-', f); s--;
+		fputc('S', f); s--;
+		fputc('T', f); s--;
+		fputc('D', f); s--;
+		for (i = 0; i < 7; i++) {
+			fputc(0, f); s--;
+		}
+		fputc(1, f); s--;
+		fputc(0, f); s--;
+		fputc(1, f); s--;
+		fputc('M', f); s--;
+		fputc('Q', f); s--;
+		for(i=0;i<14;i++) {
+			fputc(0xa0, f); s--;
+		}
+		fputc(0, f); s--;
+		fputc(0xff, f);
+		while (s-- > (MCD_SIZE+1)) fputc(0, f);
+		fclose(f);
+	} else if(strstr(mcd, ".mem") || strstr(mcd,".vgs")) {
+		f = fopen(mcd, "wb");
+		if (f != NULL) {
+			fwrite(data-64, 1, MCD_SIZE+64, f);
+			fclose(f);
+		}
+		f = fopen(mcd, "r+");
+		s = s + 64;
+		fputc('V', f); s--;
+		fputc('g', f); s--;
+		fputc('s', f); s--;
+		fputc('M', f); s--;
+		for(i=0;i<3;i++) {
+			fputc(1, f); s--;
+			fputc(0, f); s--;
+			fputc(0, f); s--;
+			fputc(0, f); s--;
+		}
+		fputc(0, f); s--;
+		fputc(2, f);
+		while (s-- > (MCD_SIZE+1)) fputc(0, f);
+		fclose(f);
+	} else {
+		f = fopen(mcd, "wb");
+		if (f != NULL) {
+			fwrite(data, 1, MCD_SIZE, f);
+			fclose(f);
+		}
+	}
+}
+
+void GetMcdBlockInfo(int mcd, int block, McdBlock *Info) {
+	unsigned char *data = NULL, *ptr, *str, *sstr;
+	unsigned short clut[16];
+	unsigned short c;
+	int i, x;
+
+	memset(Info, 0, sizeof(McdBlock));
+
+	if (mcd == 1) data = Mcd1Data;
+	if (mcd == 2) data = Mcd2Data;
+
+	ptr = data + block * 8192 + 2;
+
+	Info->IconCount = *ptr & 0x3;
+
+	ptr += 2;
+
+	x = 0;
+
+	str = Info->Title;
+	sstr = Info->sTitle;
+
+	for (i = 0; i < 48; i++) {
+		c = *(ptr) << 8;
+		c |= *(ptr + 1);
+		if (!c) break;
+
+		// Convert ASCII characters to half-width
+		if (c >= 0x8281 && c <= 0x829A)
+			c = (c - 0x8281) + 'a';
+		else if (c >= 0x824F && c <= 0x827A)
+			c = (c - 0x824F) + '0';
+		else if (c == 0x8140) c = ' ';
+		else if (c == 0x8143) c = ',';
+		else if (c == 0x8144) c = '.';
+		else if (c == 0x8146) c = ':';
+		else if (c == 0x8147) c = ';';
+		else if (c == 0x8148) c = '?';
+		else if (c == 0x8149) c = '!';
+		else if (c == 0x815E) c = '/';
+		else if (c == 0x8168) c = '"';
+		else if (c == 0x8169) c = '(';
+		else if (c == 0x816A) c = ')';
+		else if (c == 0x816D) c = '[';
+		else if (c == 0x816E) c = ']';
+		else if (c == 0x817C) c = '-';
+		else {
+			str[i] = ' ';
+			sstr[x++] = *ptr++; sstr[x++] = *ptr++;
+			continue;
+		}
+
+		str[i] = sstr[x++] = c;
+		ptr += 2;
+	}
+
+	trim(str);
+	trim(sstr);
+
+	ptr = data + block * 8192 + 0x60; // icon palette data
+
+	for (i = 0; i < 16; i++) {
+		clut[i] = *((unsigned short *)ptr);
+		ptr += 2;
+	}
+
+	for (i = 0; i < Info->IconCount; i++) {
+		short *icon = &Info->Icon[i * 16 * 16];
+
+		ptr = data + block * 8192 + 128 + 128 * i; // icon data
+
+		for (x = 0; x < 16 * 16; x++) {
+			icon[x++] = clut[*ptr & 0xf];
+			icon[x] = clut[*ptr >> 4];
+			ptr++;
+		}
+	}
+
+	ptr = data + block * 128;
+
+	Info->Flags = *ptr;
+
+	ptr += 0xa;
+	strncpy(Info->ID, ptr, 12);
+	ptr += 12;
+	strncpy(Info->Name, ptr, 16);
+}
+
+int sioFreeze(gzFile f, int Mode) {
+	gzfreeze(buf, sizeof(buf));
+	gzfreeze(&StatReg, sizeof(StatReg));
+	gzfreeze(&ModeReg, sizeof(ModeReg));
+	gzfreeze(&CtrlReg, sizeof(CtrlReg));
+	gzfreeze(&BaudReg, sizeof(BaudReg));
+	gzfreeze(&bufcount, sizeof(bufcount));
+	gzfreeze(&parp, sizeof(parp));
+	gzfreeze(&mcdst, sizeof(mcdst));
+	gzfreeze(&rdwr, sizeof(rdwr));
+	gzfreeze(&adrH, sizeof(adrH));
+	gzfreeze(&adrL, sizeof(adrL));
+	gzfreeze(&padst, sizeof(padst));
+
+	return 0;
+}
diff --git a/libpcsxcore/sio.h b/libpcsxcore/sio.h
new file mode 100644
index 0000000..cc8d925
--- /dev/null
+++ b/libpcsxcore/sio.h
@@ -0,0 +1,76 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+
+#ifndef _SIO_H_
+#define _SIO_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "psxcommon.h"
+#include "r3000a.h"
+#include "psxmem.h"
+#include "plugins.h"
+#include "psemu_plugin_defs.h"
+
+#define MCD_SIZE	(1024 * 8 * 16)
+
+extern char Mcd1Data[MCD_SIZE], Mcd2Data[MCD_SIZE];
+
+void sioWrite8(unsigned char value);
+void sioWriteStat16(unsigned short value);
+void sioWriteMode16(unsigned short value);
+void sioWriteCtrl16(unsigned short value);
+void sioWriteBaud16(unsigned short value);
+
+unsigned char sioRead8();
+unsigned short sioReadStat16();
+unsigned short sioReadMode16();
+unsigned short sioReadCtrl16();
+unsigned short sioReadBaud16();
+
+void netError();
+
+void sioInterrupt();
+int sioFreeze(gzFile f, int Mode);
+
+void LoadMcd(int mcd, char *str);
+void LoadMcds(char *mcd1, char *mcd2);
+void SaveMcd(char *mcd, char *data, uint32_t adr, int size);
+void CreateMcd(char *mcd);
+void ConvertMcd(char *mcd, char *data);
+
+typedef struct {
+	char Title[48 + 1]; // Title in ASCII
+	char sTitle[48 * 2 + 1]; // Title in Shift-JIS
+	char ID[12 + 1];
+	char Name[16 + 1];
+	int IconCount;
+	short Icon[16 * 16 * 3];
+	unsigned char Flags;
+} McdBlock;
+
+void GetMcdBlockInfo(int mcd, int block, McdBlock *info);
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/libpcsxcore/sjisfont.h b/libpcsxcore/sjisfont.h
new file mode 100644
index 0000000..105d624
--- /dev/null
+++ b/libpcsxcore/sjisfont.h
@@ -0,0 +1,6956 @@
+//
+// This file is adapted from:
+//
+// Shinonome 14dot font for JISX 0208, 1983/1990
+//
+// The original is k14goth by
+//   Yasuyuki Furukawa <Furukawa.Yasuyuki@fujixerox.co.jp>, 2000.
+//   (Public Domain)
+//
+// > Donated by H. Kagotani <kagotani@cs.titech.ac.jp>;
+// >   public domainfont from Japan
+// > JIS X 0208-1990 design is made by
+// >   TAKADA Toshihiro <takada@seraph.ntt.jp>.
+// > Modified for gothic like by Yasuyuki Furukawa
+//
+// Modified and Maintained by /efont/.
+//
+// (c) /efont/ -- Efont Open Laboratory 2001
+// http://openlab.ring.gr.jp/efont/
+//
+// Converted to binary format by Wei Mingzhi <whistler_wmz@users.sf.net>.
+//
+
+const unsigned char font_8140[] = {
+	0x78, 0xda, 0xad, 0x3b, 0x3b, 0x90, 0x1b, 0xc9,
+	0x75, 0x3d, 0x9f, 0x05, 0x1a, 0xcb, 0xe1, 0x4e,
+	0x03, 0x0b, 0x9f, 0x66, 0xa5, 0x3d, 0xa2, 0x77,
+	0x09, 0x89, 0xb8, 0x2b, 0x07, 0x73, 0xe2, 0x95,
+	0x0a, 0xb6, 0xb7, 0x84, 0xd1, 0x99, 0xb6, 0x97,
+	0xf6, 0x05, 0x0c, 0x18, 0x28, 0x9c, 0x40, 0xa5,
+	0x52, 0xa0, 0x2a, 0xc1, 0x55, 0x57, 0x65, 0x06,
+	0xb4, 0x31, 0xe1, 0x86, 0x08, 0x18, 0x28, 0x44,
+	0x78, 0xa1, 0x43, 0x87, 0x13, 0x6e, 0xa8, 0xe0,
+	0x02, 0x85, 0x13, 0x28, 0x50, 0xa0, 0x60, 0x02,
+	0x06, 0x08, 0x58, 0x45, 0xbf, 0xd7, 0x3d, 0x3d,
+	0xdd, 0x3d, 0x3f, 0x52, 0x3e, 0xcf, 0x2b, 0x82,
+	0x18, 0xbc, 0xe9, 0xe9, 0xd7, 0xaf, 0xdf, 0xff,
+	0xf5, 0x12, 0xf2, 0xd7, 0x5e, 0x09, 0xe1, 0x84,
+	0x01, 0x74, 0x5f, 0x31, 0xb9, 0x05, 0x88, 0x7b,
+	0xb0, 0x29, 0x00, 0x87, 0x37, 0x90, 0x01, 0x7c,
+	0xf3, 0x72, 0x88, 0x97, 0x39, 0x1d, 0xcf, 0x7a,
+	0x00, 0xcd, 0x6f, 0x7d, 0x58, 0x87, 0xb8, 0x35,
+	0x66, 0x9c, 0xd1, 0x84, 0x71, 0x04, 0x20, 0x04,
+	0xde, 0x8c, 0xa0, 0x9e, 0x87, 0xef, 0x59, 0x05,
+	0x44, 0x81, 0xa6, 0x80, 0xc1, 0xca, 0x78, 0x2f,
+	0xed, 0xc3, 0x2b, 0x77, 0x32, 0x8f, 0xf8, 0xbd,
+	0x63, 0x47, 0x38, 0x7b, 0xd6, 0x87, 0x0d, 0xd2,
+	0x20, 0xed, 0xdf, 0x0f, 0x58, 0x5b, 0xe6, 0x27,
+	0xb4, 0x87, 0xb0, 0xf7, 0xef, 0xc8, 0xff, 0xe9,
+	0x32, 0xc7, 0x05, 0x92, 0xba, 0xa4, 0x63, 0xf1,
+	0x9c, 0xec, 0x83, 0xa4, 0x17, 0xab, 0xc7, 0xe6,
+	0x1d, 0x3b, 0xa8, 0xc7, 0x76, 0x61, 0xe1, 0xf2,
+	0x13, 0x04, 0x9a, 0xd1, 0x6c, 0x6a, 0xad, 0x57,
+	0xad, 0x98, 0xb1, 0x34, 0x08, 0x0b, 0xb5, 0x4f,
+	0xbb, 0x9a, 0x62, 0x17, 0xc0, 0x2b, 0x7d, 0xee,
+	0x73, 0x9a, 0xcc, 0x60, 0x2f, 0x1b, 0xb4, 0xa1,
+	0xf0, 0xf2, 0x51, 0x32, 0xc9, 0x26, 0x64, 0x96,
+	0xcd, 0x49, 0x84, 0xb7, 0x4a, 0x36, 0xf2, 0x28,
+	0xe6, 0x14, 0x86, 0xf9, 0x0a, 0xf0, 0x2e, 0x8a,
+	0xc7, 0x79, 0x53, 0x07, 0x36, 0xe5, 0xc7, 0xf1,
+	0xae, 0x7d, 0x35, 0xdf, 0x85, 0x0b, 0x25, 0x54,
+	0x10, 0x21, 0xe4, 0xd1, 0x35, 0x6f, 0x89, 0x62,
+	0x2d, 0x83, 0xdf, 0x7c, 0xc0, 0x39, 0xf6, 0x0f,
+	0xc6, 0x75, 0x49, 0xae, 0xe9, 0x2f, 0x18, 0x29,
+	0xac, 0x17, 0x67, 0xfd, 0x40, 0x88, 0x33, 0x00,
+	0xf6, 0xf5, 0x34, 0x7e, 0x1a, 0xf7, 0xaf, 0x88,
+	0x25, 0xac, 0xa9, 0xd2, 0x72, 0x01, 0xbc, 0x5b,
+	0x1d, 0x62, 0xb9, 0x05, 0x7d, 0x76, 0xe0, 0xce,
+	0x61, 0x5e, 0x8c, 0xd0, 0x85, 0x7c, 0x4a, 0xa6,
+	0x00, 0xd7, 0xe4, 0x59, 0xf7, 0x58, 0xc5, 0x38,
+	0x64, 0x9d, 0x84, 0xa4, 0xe6, 0x56, 0xfd, 0x05,
+	0x19, 0x27, 0x81, 0xd6, 0x03, 0xac, 0xb1, 0x26,
+	0xb4, 0xc6, 0x9a, 0x50, 0x8f, 0x3d, 0xd6, 0xf3,
+	0x35, 0xe1, 0x48, 0xc8, 0xeb, 0x7a, 0xbe, 0x26,
+	0xbc, 0xc6, 0xb1, 0x91, 0x9e, 0xd5, 0xc9, 0xac,
+	0x99, 0x23, 0xb4, 0x88, 0x7a, 0xd6, 0x91, 0x35,
+	0x73, 0x6a, 0xd2, 0x2c, 0xe4, 0xa6, 0x21, 0x1d,
+	0x0d, 0xb9, 0xb1, 0x25, 0x0b, 0x2e, 0x34, 0x57,
+	0x7b, 0xb2, 0x77, 0xb8, 0xc3, 0xdd, 0xc4, 0x4d,
+	0xf0, 0x7f, 0xbc, 0x17, 0xbf, 0x8b, 0x8f, 0x25,
+	0xc0, 0x0c, 0x60, 0x02, 0x80, 0xff, 0xe3, 0xbd,
+	0x40, 0x12, 0xe7, 0x38, 0x24, 0x39, 0x6e, 0x2f,
+	0xfc, 0x17, 0x5a, 0xda, 0xa3, 0x4b, 0xdd, 0xa3,
+	0x9b, 0xb5, 0xc1, 0x03, 0x99, 0x1c, 0x93, 0x93,
+	0x0e, 0xf8, 0x4f, 0xf2, 0x0b, 0xb2, 0x93, 0x7c,
+	0x2e, 0x41, 0xc2, 0x0b, 0x92, 0x1b, 0x80, 0xf7,
+	0xa5, 0xe4, 0xf3, 0x0d, 0x68, 0xc1, 0x25, 0xd8,
+	0x1c, 0x0d, 0x78, 0x7f, 0x23, 0xf9, 0x6c, 0xd0,
+	0xb8, 0x39, 0xf6, 0xcb, 0x3a, 0x01, 0x6c, 0x97,
+	0x95, 0x6d, 0x8e, 0x34, 0x9f, 0xe3, 0x94, 0x31,
+	0xca, 0xfd, 0xc4, 0xcd, 0xb4, 0x6d, 0xe2, 0xb4,
+	0xed, 0xc1, 0xe4, 0x88, 0x2e, 0x8f, 0xa6, 0xde,
+	0xd5, 0x9a, 0x5b, 0x48, 0x91, 0x9a, 0x75, 0x73,
+	0x94, 0x7c, 0xac, 0x2d, 0x59, 0x4a, 0x84, 0x5f,
+	0x89, 0x84, 0xb0, 0xf8, 0xd2, 0xd6, 0xa6, 0xd2,
+	0x39, 0x37, 0x7e, 0x31, 0x9e, 0xac, 0x94, 0x30,
+	0xf7, 0x80, 0x3f, 0xb1, 0xb4, 0xd0, 0x39, 0x6a,
+	0x2a, 0xce, 0x2d, 0xe7, 0x37, 0x7e, 0xad, 0x9e,
+	0x32, 0xb1, 0xb5, 0xc5, 0xd9, 0xfe, 0xec, 0x8f,
+	0x8f, 0xef, 0x1e, 0xdf, 0xfd, 0xec, 0x8f, 0x97,
+	0xdb, 0x21, 0x9f, 0xcd, 0xd8, 0x7a, 0xcd, 0xea,
+	0x80, 0xc1, 0x3b, 0x02, 0x11, 0x2b, 0x10, 0xa3,
+	0xbb, 0x4f, 0x29, 0x58, 0x2c, 0x82, 0x70, 0x0d,
+	0xbb, 0x54, 0x61, 0x05, 0xf7, 0x10, 0xfc, 0xc4,
+	0x13, 0x5e, 0x78, 0x51, 0xea, 0x5d, 0x8a, 0x84,
+	0x0c, 0x46, 0x3d, 0x76, 0x28, 0xb2, 0x6c, 0x79,
+	0xf3, 0xfa, 0x11, 0x00, 0xca, 0x70, 0xaf, 0xf7,
+	0xfe, 0xf3, 0xf3, 0xe8, 0xa7, 0x54, 0xeb, 0xa6,
+	0x4b, 0x9d, 0xda, 0x9a, 0x6e, 0xb7, 0x9c, 0x33,
+	0xf0, 0x44, 0xbb, 0xf2, 0x04, 0xb8, 0xbf, 0x2b,
+	0xe5, 0x2e, 0x8c, 0xeb, 0xd5, 0x8e, 0xf3, 0x09,
+	0x9f, 0xb2, 0x29, 0x7b, 0x88, 0xeb, 0x4e, 0xf1,
+	0xdb, 0x84, 0x8f, 0x95, 0x57, 0x83, 0xfd, 0xf3,
+	0xb2, 0x93, 0x04, 0x9e, 0xe0, 0x53, 0xa0, 0xe0,
+	0x14, 0x7c, 0xcf, 0x38, 0xf3, 0x95, 0xf1, 0xce,
+	0x41, 0xfb, 0x98, 0x2b, 0x66, 0xdc, 0x14, 0x3e,
+	0xf9, 0x92, 0x7c, 0x4d, 0xff, 0x8d, 0xc5, 0xd5,
+	0xbc, 0x11, 0x5d, 0xb2, 0xaf, 0xf8, 0x57, 0xc9,
+	0x32, 0xbb, 0x20, 0x6e, 0xea, 0xef, 0x27, 0x74,
+	0x4a, 0xf9, 0x3e, 0xa9, 0xa2, 0x01, 0x97, 0x23,
+	0x2c, 0x8e, 0xca, 0x59, 0x6d, 0x4a, 0xf4, 0x95,
+	0x08, 0x88, 0x3d, 0x13, 0x96, 0x72, 0x4a, 0x4e,
+	0x89, 0xbf, 0x3e, 0x65, 0x53, 0xce, 0x73, 0x9e,
+	0x4f, 0xf9, 0x59, 0x64, 0xee, 0xd1, 0x45, 0xfc,
+	0xe9, 0xd6, 0x03, 0xea, 0x3e, 0xdd, 0x5e, 0xc4,
+	0xe6, 0x8e, 0x79, 0x59, 0x90, 0x32, 0xf6, 0xf8,
+	0x7e, 0x79, 0xff, 0xec, 0xfe, 0xf6, 0xee, 0xf9,
+	0xfe, 0x49, 0xaa, 0xbd, 0x20, 0xee, 0x90, 0x9f,
+	0x60, 0xc4, 0x02, 0xdf, 0xf2, 0x11, 0xee, 0x12,
+	0x78, 0x70, 0xfc, 0xcd, 0xcb, 0xb4, 0x7f, 0x76,
+	0xb3, 0xd7, 0xaf, 0xe3, 0x28, 0x48, 0x7d, 0x58,
+	0xf7, 0xe9, 0xe1, 0x72, 0xab, 0xf6, 0xdf, 0x11,
+	0xf3, 0x7a, 0xd9, 0xee, 0xdd, 0xe6, 0x18, 0x16,
+	0xe3, 0x3c, 0x2c, 0xce, 0x0a, 0x8d, 0x55, 0x33,
+	0xa3, 0xf6, 0x20, 0xe0, 0xb7, 0x20, 0xf5, 0x32,
+	0x8d, 0x0d, 0x8b, 0x45, 0xb9, 0x28, 0x37, 0x47,
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+	0x25, 0xe1, 0xf5, 0x7a, 0xff, 0xe1, 0x7f, 0x50,
+	0x1a, 0x6c, 0xd0, 0x31, 0x43, 0x0f, 0xb6, 0x7a,
+	0xf3, 0x02, 0xf6, 0xf6, 0x5a, 0xd4, 0xc7, 0xdc,
+	0xd8, 0xa5, 0x02, 0x8c, 0xbf, 0x02, 0x51, 0xf3,
+	0x3e, 0x92, 0xde, 0x17, 0xe0, 0x9c, 0xdf, 0x6c,
+	0x75, 0xd7, 0xaa, 0xca, 0x42, 0x85, 0x8d, 0x17,
+	0x90, 0x86, 0x59, 0x53, 0x26, 0x47, 0x74, 0xb2,
+	0x26, 0xf7, 0x2d, 0x99, 0x2c, 0x90, 0x8e, 0x19,
+	0xe4, 0xcf, 0x8f, 0x28, 0x7e, 0xe2, 0xdd, 0xba,
+	0x30, 0x4e, 0x22, 0x8a, 0x79, 0x61, 0x67, 0x0a,
+	0xa9, 0x45, 0xe6, 0xfe, 0x0e, 0x9e, 0x2b, 0x60,
+	0xa4, 0xc0, 0x73, 0x46, 0x27, 0xd9, 0x99, 0xd4,
+	0x62, 0x80, 0x51, 0xea, 0x64, 0xcd, 0xb8, 0x1c,
+	0xb5, 0x73, 0x8c, 0x9f, 0x40, 0x75, 0x58, 0x34,
+	0xb2, 0xdc, 0x5c, 0xe4, 0x92, 0x3d, 0x3d, 0xeb,
+	0x71, 0x69, 0xea, 0xf7, 0x46, 0xd4, 0xc0, 0x3f,
+	0x7c, 0xea, 0x40, 0xfe, 0x25, 0x4a, 0x1f, 0x56,
+	0xe9, 0xb8, 0x3c, 0x2b, 0x8a, 0xfa, 0x3d, 0xe1,
+	0x5a, 0xbb, 0xeb, 0x37, 0xa7, 0x0c, 0x25, 0x35,
+	0xed, 0xea, 0xd1, 0xc3, 0x4e, 0xa5, 0x5a, 0x83,
+	0x4d, 0x5e, 0x09, 0x0d, 0xef, 0xc5, 0x8a, 0x8e,
+	0x36, 0xc8, 0xd4, 0x44, 0x54, 0x3e, 0xed, 0x53,
+	0x07, 0x6a, 0xbd, 0xf2, 0xfc, 0xb5, 0xcb, 0x97,
+	0x00, 0xd1, 0xb6, 0xd9, 0x49, 0x8f, 0xe2, 0xf9,
+	0x8b, 0xf9, 0x0b, 0x3c, 0x5b, 0x32, 0x35, 0xe4,
+	0xd9, 0xec, 0xd1, 0x0b, 0x0f, 0xfc, 0x57, 0x9f,
+	0x3a, 0x90, 0x67, 0x2f, 0xfb, 0x4e, 0x2c, 0x7c,
+	0xe0, 0x4c, 0x42, 0xdf, 0xb9, 0x91, 0xaa, 0x26,
+	0x8a, 0xf6, 0xb3, 0x7d, 0x56, 0x6d, 0xb8, 0xbf,
+	0x2f, 0xcf, 0xd5, 0x3d, 0x4c, 0xcf, 0xf7, 0x52,
+	0xbf, 0xf1, 0xdc, 0xf1, 0xc3, 0xd4, 0x1e, 0xff,
+	0xe1, 0x93, 0x03, 0x1a, 0xaa, 0xbc, 0xa6, 0x89,
+	0x15, 0x67, 0xca, 0x4c, 0xed, 0xee, 0xd2, 0xe2,
+	0xc5, 0xf1, 0x03, 0x58, 0xa3, 0xfe, 0xa1, 0x74,
+	0x5c, 0x68, 0x38, 0x73, 0x5b, 0x7f, 0xe3, 0x25,
+	0xe7, 0x3d, 0xe3, 0x93, 0x03, 0x48, 0xc1, 0xe1,
+	0x51, 0x63, 0xde, 0x33, 0xad, 0xe1, 0xdc, 0xd4,
+	0x6e, 0x4b, 0x26, 0xb7, 0xfe, 0xbe, 0x53, 0x26,
+	0x73, 0x90, 0x38, 0xf6, 0x88, 0xcd, 0x00, 0xa6,
+	0x7c, 0xdd, 0x98, 0x77, 0x5c, 0xc8, 0xba, 0x26,
+	0x68, 0x21, 0x7c, 0x5e, 0x16, 0x1f, 0xf3, 0x17,
+	0x66, 0x1f, 0xff, 0x97, 0x5c, 0xf0, 0xec, 0xbb,
+	0x21, 0xec, 0x7b, 0xd2, 0x3c, 0x3f, 0x69, 0xc2,
+	0x7b, 0x32, 0x38, 0xef, 0x30, 0x55, 0xc3, 0xf3,
+	0xbe, 0x1b, 0x9e, 0x77, 0x10, 0x3b, 0x38, 0xef,
+	0xfb, 0x81, 0x79, 0xdf, 0xbf, 0x6b, 0x8e, 0xf5,
+	0x06, 0xa0, 0xf1, 0xe4, 0x3b, 0x80, 0x5e, 0xec,
+	0x7b, 0x00, 0x1b, 0x6b, 0xde, 0xbd, 0x6f, 0x71,
+	0xd2, 0x9a, 0x09, 0xde, 0x3c, 0x8c, 0x1d, 0x98,
+	0x17, 0x56, 0x34, 0x3c, 0xef, 0x00, 0x76, 0x90,
+	0x1b, 0xc3, 0x6f, 0x16, 0x74, 0x0d, 0x52, 0x65,
+	0xef, 0x82, 0xd7, 0xa0, 0xcb, 0x1e, 0x6b, 0xef,
+	0xdf, 0xd0, 0xfe, 0xb6, 0xdf, 0xdc, 0x90, 0xb9,
+	0x0f, 0x48, 0xdd, 0xc0, 0xbc, 0x2d, 0xa9, 0x6b,
+	0xd0, 0x3c, 0x28, 0x39, 0xf6, 0x9b, 0xff, 0x17,
+	0x09, 0x45, 0x3c, 0x28
+};
+
+const unsigned char font_889f[] = {
+	0x78, 0xda, 0x74, 0xbd, 0x3f, 0x78, 0xdb, 0x46,
+	0xb6, 0x36, 0x0e, 0x52, 0xb0, 0x35, 0x94, 0x68,
+	0x6b, 0x48, 0x82, 0x22, 0xf5, 0xc7, 0xe2, 0x88,
+	0x82, 0x24, 0x88, 0xb2, 0x63, 0xf8, 0xbf, 0xec,
+	0x48, 0x24, 0x6c, 0x33, 0x09, 0x64, 0x7b, 0xd7,
+	0x88, 0x23, 0x6d, 0xfc, 0xdd, 0x9b, 0xbd, 0xa1,
+	0xb3, 0xde, 0xbd, 0xbe, 0xf7, 0xd9, 0xef, 0x5b,
+	0xc5, 0xf1, 0xfd, 0x2e, 0x9d, 0xd0, 0x22, 0x0b,
+	0x15, 0x28, 0x52, 0xa0, 0x50, 0xe1, 0x62, 0x0b,
+	0x16, 0x2a, 0x50, 0xa4, 0x50, 0xb1, 0x85, 0x8b,
+	0x2d, 0x54, 0xa4, 0x60, 0x91, 0x42, 0x45, 0x8a,
+	0x14, 0x5b, 0xe8, 0xf9, 0x1e, 0x17, 0x2a, 0xb6,
+	0x60, 0xe1, 0x62, 0x0a, 0x14, 0xbf, 0x73, 0x66,
+	0x00, 0x92, 0x72, 0xee, 0xcf, 0xf3, 0x40, 0x92,
+	0x05, 0x91, 0x04, 0x66, 0xce, 0x9c, 0xf3, 0x9e,
+	0x73, 0xde, 0x73, 0xa0, 0x28, 0x4d, 0xae, 0xb6,
+	0xd4, 0x56, 0xa5, 0xab, 0x7b, 0x38, 0x2a, 0x5d,
+	0xfc, 0x9f, 0xda, 0x6a, 0x72, 0x45, 0xfc, 0x1b,
+	0x0e, 0xea, 0x6d, 0xbb, 0x7d, 0x9f, 0xdf, 0xf3,
+	0x71, 0xdc, 0xe7, 0x76, 0xbb, 0xde, 0x56, 0xda,
+	0x63, 0x01, 0x9e, 0x23, 0x4c, 0x0c, 0xbe, 0xcd,
+	0xd2, 0x2c, 0x13, 0xa4, 0xd9, 0x2a, 0xd3, 0xf9,
+	0x69, 0x36, 0xc2, 0x52, 0x01, 0x13, 0xaf, 0xad,
+	0x04, 0x3a, 0x31, 0xc8, 0xa5, 0xe3, 0x25, 0x63,
+	0x1e, 0xc7, 0xb1, 0x4e, 0x56, 0xe4, 0x4b, 0xf2,
+	0x8a, 0x12, 0x83, 0xd1, 0x84, 0x77, 0x19, 0x3b,
+	0xc2, 0x5f, 0x8c, 0x1d, 0x0f, 0x91, 0xa4, 0xf7,
+	0xa2, 0xad, 0x5a, 0xc3, 0xe6, 0x4a, 0x12, 0x5e,
+	0x6a, 0x56, 0x0e, 0xd3, 0x34, 0xc1, 0x9a, 0xc1,
+	0x47, 0x3b, 0x1b, 0x1b, 0x99, 0x4e, 0x91, 0x0c,
+	0x1f, 0xdd, 0xb2, 0x62, 0xad, 0xd3, 0x47, 0xf5,
+	0x69, 0x45, 0xa1, 0x2d, 0xda, 0xa6, 0xde, 0xcb,
+	0x95, 0x5c, 0x27, 0xa5, 0xa4, 0xf8, 0xa4, 0xf5,
+	0xc2, 0xca, 0x05, 0xd4, 0xa2, 0xed, 0x0c, 0x5d,
+	0x4d, 0xf6, 0xae, 0xca, 0xd9, 0x76, 0xd2, 0x2e,
+	0x5c, 0x95, 0x72, 0x99, 0x9f, 0x77, 0x55, 0x77,
+	0xc4, 0xa5, 0xbc, 0x86, 0x17, 0xd5, 0x9a, 0xe5,
+	0xe3, 0x1e, 0xad, 0xc5, 0xba, 0x67, 0x1f, 0x7c,
+	0xc3, 0xa9, 0x95, 0x81, 0x23, 0x17, 0xe4, 0xad,
+	0x05, 0xeb, 0x36, 0x5c, 0x8d, 0x6a, 0x35, 0x03,
+	0xb8, 0x06, 0x96, 0x32, 0x46, 0x3a, 0xaa, 0x53,
+	0xe8, 0x3e, 0x49, 0x16, 0xba, 0x31, 0x25, 0xde,
+	0x4a, 0xd6, 0xcc, 0x3c, 0x9e, 0x95, 0xe7, 0xe1,
+	0x68, 0x55, 0xb8, 0xee, 0xea, 0xae, 0x51, 0x37,
+	0xe1, 0xa3, 0x2a, 0x62, 0xae, 0x54, 0x6b, 0xa2,
+	0xfb, 0x7f, 0x59, 0xaa, 0x9b, 0x72, 0x5e, 0xc1,
+	0x31, 0xc5, 0xaf, 0xdb, 0x37, 0xf8, 0x23, 0x3b,
+	0x13, 0xd0, 0x2a, 0x5d, 0x15, 0xb3, 0xc1, 0xe3,
+	0xad, 0x42, 0x37, 0xed, 0x15, 0xba, 0xf1, 0x56,
+	0x33, 0x88, 0x29, 0x9a, 0xa7, 0xb9, 0xba, 0x5e,
+	0xd5, 0x87, 0x8e, 0xe0, 0x8e, 0x94, 0x0c, 0x4f,
+	0x93, 0x26, 0x4f, 0xe3, 0xf7, 0xda, 0xa4, 0xf7,
+	0xcd, 0xb1, 0x66, 0xe5, 0x78, 0x1e, 0xae, 0xcc,
+	0x54, 0xf0, 0xec, 0x28, 0x1f, 0x21, 0x77, 0x79,
+	0x51, 0x99, 0x0b, 0xe2, 0x4e, 0xfc, 0x75, 0xe6,
+	0x6d, 0xda, 0x9a, 0xe7, 0xba, 0xf5, 0x30, 0xb0,
+	0x70, 0x15, 0x14, 0xc2, 0x89, 0x4b, 0xdc, 0x6d,
+	0x77, 0x84, 0x8f, 0xb8, 0x62, 0xf0, 0x74, 0x2b,
+	0xad, 0x16, 0xd5, 0xe8, 0x8e, 0x4e, 0x59, 0x63,
+	0x47, 0x71, 0x98, 0x4b, 0x98, 0xe7, 0x23, 0xc5,
+	0x1a, 0xeb, 0x12, 0xf8, 0x9d, 0x62, 0xc1, 0xe8,
+	0xdd, 0x11, 0xde, 0x41, 0xa1, 0x4b, 0xe1, 0x1f,
+	0x7c, 0x85, 0xcf, 0x63, 0x8a, 0x25, 0xd7, 0xd7,
+	0x9c, 0xb1, 0xe7, 0xdf, 0x6d, 0xb3, 0xe5, 0xa0,
+	0xec, 0x94, 0x5e, 0x57, 0x9e, 0xaa, 0xf4, 0xf2,
+	0xd3, 0x12, 0x31, 0xcc, 0xdb, 0x07, 0x72, 0x9e,
+	0x13, 0xc1, 0xb6, 0x4b, 0xec, 0x69, 0x67, 0x2a,
+	0x98, 0x64, 0x06, 0x5b, 0x0a, 0x6c, 0x39, 0xf7,
+	0x62, 0xf9, 0x0b, 0x01, 0xac, 0x93, 0x18, 0x39,
+	0x2e, 0xbf, 0x33, 0x18, 0x0f, 0x7b, 0x92, 0xd3,
+	0x74, 0x88, 0x5b, 0xd9, 0x28, 0x9a, 0x65, 0xaf,
+	0xe8, 0x94, 0x1d, 0x32, 0xdd, 0xec, 0x12, 0x8a,
+	0x43, 0xcc, 0x46, 0x37, 0x45, 0x5f, 0xb1, 0x14,
+	0x4b, 0xf1, 0x94, 0x7b, 0xce, 0x7d, 0xee, 0xa4,
+	0x9d, 0x34, 0xd3, 0x9c, 0xac, 0x5b, 0x56, 0x23,
+	0xc9, 0xb1, 0x55, 0x5b, 0x3d, 0xcb, 0xd3, 0x6e,
+	0xda, 0x2d, 0xb9, 0xd5, 0x7d, 0xb5, 0x45, 0x76,
+	0xe8, 0x4e, 0xad, 0x31, 0x38, 0x1b, 0x69, 0x71,
+	0x76, 0x15, 0xd6, 0xe9, 0x34, 0xfc, 0x3f, 0x13,
+	0xd4, 0x7a, 0x12, 0x5b, 0x86, 0xfb, 0x29, 0xb5,
+	0x4a, 0xad, 0x72, 0xcb, 0x68, 0x25, 0x5b, 0x23,
+	0xad, 0xb1, 0xd6, 0xd7, 0x2d, 0xa5, 0x2e, 0xcf,
+	0x6a, 0xac, 0xe4, 0xd8, 0x76, 0xf9, 0xaf, 0x73,
+	0x6f, 0xcb, 0x4a, 0x91, 0x97, 0x5d, 0x03, 0x56,
+	0xf9, 0x16, 0xff, 0x0a, 0x5e, 0x0b, 0xb2, 0xa6,
+	0x64, 0x95, 0x3f, 0xf2, 0x49, 0x92, 0x01, 0x89,
+	0x7e, 0x75, 0x9c, 0x35, 0x26, 0x8c, 0x6b, 0xc7,
+	0x57, 0x89, 0x43, 0x28, 0x2c, 0x12, 0xc8, 0x1f,
+	0xac, 0xc9, 0x33, 0x6b, 0x2a, 0xa0, 0xed, 0x25,
+	0x7d, 0xfb, 0xaf, 0xb4, 0xfb, 0xbf, 0xbc, 0xdf,
+	0xb5, 0x37, 0xac, 0x4f, 0xf7, 0xc7, 0x43, 0x99,
+	0x9c, 0x61, 0xfa, 0xea, 0x36, 0x2b, 0xc1, 0xa7,
+	0x97, 0xe0, 0x7d, 0x55, 0xf7, 0x32, 0x5c, 0xb9,
+	0xc1, 0x71, 0x9e, 0x15, 0x4f, 0x71, 0x15, 0x17,
+	0xd6, 0xa4, 0x35, 0x03, 0x57, 0x9c, 0xb6, 0x67,
+	0x1c, 0x6a, 0x0e, 0xe9, 0xc9, 0x8d, 0xaf, 0xbf,
+	0x3f, 0xad, 0xe2, 0xe9, 0x66, 0x20, 0x25, 0x07,
+	0x65, 0x27, 0xc1, 0x4e, 0xc1, 0x8a, 0x0d, 0xb5,
+	0xce, 0xd4, 0xbe, 0x9e, 0x8e, 0x29, 0xf2, 0x73,
+	0x69, 0xbb, 0xd1, 0x4e, 0xd0, 0x51, 0x9e, 0x56,
+	0x57, 0x95, 0xcd, 0x6e, 0x86, 0xa6, 0x70, 0xc0,
+	0x3a, 0x46, 0x73, 0x75, 0x47, 0xbd, 0xa3, 0xc6,
+	0x15, 0x5c, 0x67, 0xd5, 0x1a, 0xb3, 0xc8, 0x41,
+	0x8c, 0x9d, 0xa6, 0x2b, 0x04, 0xf7, 0x82, 0xd2,
+	0x2a, 0x04, 0x29, 0x58, 0xa9, 0x74, 0x5b, 0xf3,
+	0x0a, 0x81, 0xe6, 0xe5, 0x40, 0x0b, 0x2c, 0x76,
+	0xad, 0x1d, 0xa5, 0x21, 0xdf, 0x39, 0x17, 0x34,
+	0x54, 0xad, 0x2a, 0x76, 0x88, 0xb7, 0xe5, 0xa5,
+	0xbc, 0x54, 0x8d, 0x9a, 0xb4, 0x73, 0x03, 0xaf,
+	0x0a, 0xe4, 0xe7, 0x3b, 0xbe, 0x4e, 0xed, 0xf6,
+	0xc3, 0xa0, 0xae, 0xac, 0x77, 0xd7, 0x29, 0x1e,
+	0x2f, 0x69, 0xac, 0xab, 0x0c, 0x7c, 0xee, 0x97,
+	0xef, 0xe0, 0x13, 0x5b, 0x43, 0xb5, 0x73, 0x74,
+	0xf0, 0x9a, 0x15, 0xa5, 0xcc, 0x8b, 0x6e, 0x99,
+	0x97, 0xf9, 0x2c, 0xb9, 0x78, 0x5c, 0x74, 0x61,
+	0x2f, 0xd9, 0x8b, 0x1d, 0x3c, 0x50, 0x33, 0x68,
+	0xb0, 0x06, 0xcd, 0x20, 0xab, 0x9e, 0xd3, 0x09,
+	0xab, 0x04, 0x25, 0xbb, 0x6c, 0x93, 0xee, 0xb6,
+	0x07, 0x8a, 0xa4, 0x9a, 0xd8, 0x89, 0xde, 0x79,
+	0xa8, 0x75, 0xca, 0x9a, 0x30, 0x9f, 0x24, 0x63,
+	0xa1, 0xd4, 0xa2, 0xdc, 0xe2, 0xfb, 0xe2, 0x4f,
+	0x69, 0xb8, 0x7b, 0xea, 0xc1, 0x90, 0xff, 0xcc,
+	0x71, 0x23, 0x6f, 0x3f, 0xd9, 0xc1, 0x99, 0x24,
+	0xb0, 0x8f, 0x88, 0x4d, 0x6d, 0xd8, 0x55, 0xb6,
+	0x63, 0xe3, 0xce, 0x87, 0x01, 0x72, 0x99, 0x52,
+	0xd2, 0x28, 0x1b, 0x2d, 0x1c, 0x14, 0x66, 0xc4,
+	0xa4, 0x8f, 0xe4, 0x1c, 0x82, 0x04, 0x52, 0x0b,
+	0xe4, 0x18, 0xcf, 0x5a, 0x38, 0x40, 0xcf, 0xb4,
+	0xcc, 0xce, 0xa7, 0x76, 0xc6, 0xc9, 0xa2, 0x74,
+	0xd2, 0x94, 0x93, 0x72, 0xc7, 0xf1, 0x9d, 0xad,
+	0xd1, 0x2e, 0xf1, 0xe0, 0xac, 0x72, 0xa5, 0xfb,
+	0x88, 0x66, 0xba, 0x94, 0xc1, 0x3e, 0x66, 0xf0,
+	0x4a, 0x46, 0x99, 0xdc, 0xfb, 0x8c, 0x14, 0xed,
+	0xa2, 0x0d, 0x77, 0x0b, 0x5f, 0x2b, 0xbc, 0x68,
+	0xeb, 0xb6, 0x61, 0x4b, 0xbd, 0x21, 0xef, 0x28,
+	0xa6, 0x54, 0xba, 0x31, 0x5a, 0xe9, 0xce, 0x82,
+	0xd6, 0x9c, 0x53, 0xe3, 0x3b, 0xea, 0xe3, 0xbc,
+	0x59, 0x13, 0x9a, 0xb0, 0x70, 0x20, 0xef, 0x18,
+	0x67, 0x4f, 0xae, 0xe2, 0x98, 0x45, 0x0f, 0x86,
+	0xcc, 0x55, 0x5c, 0x41, 0x47, 0xb1, 0xe1, 0x53,
+	0xac, 0x42, 0x27, 0x6d, 0x17, 0x3a, 0xda, 0xa1,
+	0xb6, 0x5f, 0x30, 0x53, 0x7a, 0xf1, 0xe7, 0xf3,
+	0xdf, 0x5b, 0xb8, 0x46, 0xa4, 0x42, 0x66, 0xe1,
+	0x60, 0x41, 0x99, 0x30, 0xbb, 0x62, 0xe8, 0xc6,
+	0x07, 0xe4, 0x02, 0xb9, 0x46, 0xaa, 0x24, 0x09,
+	0xf3, 0x8c, 0x73, 0x94, 0x62, 0x13, 0xc1, 0x0d,
+	0x76, 0x8d, 0x5d, 0xe2, 0x9f, 0xca, 0xdd, 0x86,
+	0x5f, 0x03, 0x29, 0x39, 0x15, 0x8e, 0xba, 0x41,
+	0x6a, 0x68, 0x79, 0xcc, 0x13, 0x7d, 0x47, 0xea,
+	0x2b, 0x85, 0x56, 0xe8, 0x2c, 0xad, 0x04, 0x1f,
+	0x78, 0xcc, 0xa9, 0x38, 0xbf, 0xa3, 0xf3, 0xf4,
+	0x37, 0xa6, 0xea, 0xea, 0x7b, 0xba, 0x7e, 0x17,
+	0xcf, 0x0e, 0xbc, 0x26, 0xae, 0x0c, 0xf3, 0x09,
+	0xe3, 0x2b, 0x3b, 0xe9, 0x5e, 0x22, 0xa7, 0xa9,
+	0x72, 0xd4, 0xd3, 0x1b, 0x35, 0xe2, 0x4c, 0xbb,
+	0xa0, 0x37, 0xc8, 0x12, 0xec, 0xa6, 0xf5, 0x63,
+	0x82, 0xff, 0xf2, 0xb8, 0xcb, 0x12, 0x30, 0x2a,
+	0xa0, 0xaf, 0xe2, 0xd6, 0x70, 0x57, 0xa5, 0x63,
+	0x01, 0x51, 0xb3, 0xd5, 0xcb, 0x7b, 0xf7, 0xf6,
+	0xf0, 0x2c, 0x6a, 0xa9, 0x14, 0x95, 0x07, 0xee,
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+	0x39, 0x55, 0x49, 0x3b, 0x47, 0x95, 0x9c, 0x59,
+	0x90, 0x73, 0xe6, 0xba, 0x33, 0x70, 0xf8, 0xd1,
+	0x79, 0xae, 0x96, 0xd1, 0xef, 0x0b, 0x34, 0x33,
+	0x65, 0x16, 0x2a, 0x39, 0xa7, 0x50, 0x59, 0x30,
+	0x17, 0x0e, 0x0a, 0x6a, 0xce, 0x41, 0x36, 0xf5,
+	0x5c, 0x6d, 0x49, 0xff, 0x13, 0x1a, 0xac, 0x46,
+	0x7f, 0xed, 0x28, 0x1e, 0x7d, 0x15, 0xfd, 0x77,
+	0x4c, 0xae, 0xed, 0xb0, 0xa9, 0xe2, 0x29, 0xf5,
+	0x6b, 0xb5, 0xdf, 0xd3, 0x4f, 0xf1, 0xad, 0x54,
+	0x5e, 0x08, 0xe6, 0x21, 0xda, 0x4f, 0x4e, 0xbf,
+	0xf7, 0xf1, 0x2a, 0xa4, 0x04, 0x81, 0x98, 0xc0,
+	0x59, 0xbb, 0x4f, 0x45, 0x15, 0x32, 0x59, 0x91,
+	0xcb, 0xaa, 0xf1, 0x98, 0xe2, 0xd8, 0xee, 0xe7,
+	0xa2, 0x16, 0x33, 0xea, 0x25, 0x77, 0x34, 0x8b,
+	0x05, 0x6e, 0xcb, 0x01, 0x2b, 0xaa, 0xd4, 0x7d,
+	0x4e, 0x25, 0xe4, 0x57, 0x8a, 0x6b, 0x29, 0x42,
+	0xe0, 0x04, 0x7a, 0xba, 0x40, 0xd3, 0x38, 0xf7,
+	0x8c, 0xc7, 0x59, 0x27, 0x62, 0xe4, 0x9b, 0xd8,
+	0x31, 0x98, 0xb0, 0x17, 0xf9, 0x6d, 0x5b, 0x60,
+	0x6c, 0x33, 0x15, 0x17, 0x09, 0x23, 0x5c, 0x39,
+	0x0f, 0x65, 0x90, 0xdd, 0x72, 0xd9, 0x2c, 0x99,
+	0xe3, 0x66, 0xc4, 0x44, 0x5d, 0x0f, 0xea, 0xb3,
+	0xbb, 0xc8, 0xcc, 0x19, 0x25, 0x02, 0x71, 0xf5,
+	0xc0, 0xb9, 0xc0, 0x23, 0xb6, 0x5b, 0x82, 0x43,
+	0xb1, 0x14, 0xc6, 0xa8, 0xd9, 0x9c, 0xa2, 0x36,
+	0xeb, 0xb4, 0x13, 0x97, 0xe3, 0x72, 0x42, 0x1e,
+	0xc1, 0xa3, 0x98, 0x2d, 0x66, 0x5f, 0x3e, 0x49,
+	0x7a, 0xb1, 0x59, 0x52, 0x44, 0x65, 0xf7, 0x29,
+	0xb0, 0x8f, 0x47, 0x76, 0x88, 0x65, 0xd0, 0xed,
+	0x4b, 0xde, 0x24, 0x66, 0x33, 0xd9, 0x5c, 0xa1,
+	0x8a, 0x1d, 0xec, 0x4d, 0x95, 0x8e, 0x0a, 0xf3,
+	0xbf, 0x5d, 0xca, 0x95, 0xd4, 0xf3, 0x44, 0x6c,
+	0x7c, 0x52, 0x2d, 0x57, 0x5c, 0x35, 0x19, 0x77,
+	0x96, 0x87, 0x21, 0xb5, 0x27, 0x95, 0x9c, 0xb2,
+	0x85, 0xbf, 0xf9, 0x3d, 0x82, 0x8e, 0xfa, 0x33,
+	0x72, 0x7d, 0xba, 0xdf, 0x47, 0xb9, 0xa3, 0xd1,
+	0x8c, 0xaa, 0x4c, 0xb3, 0xe2, 0x57, 0xf0, 0x89,
+	0x50, 0x21, 0x0d, 0xd1, 0x2b, 0xc9, 0xca, 0xb0,
+	0x52, 0x71, 0xbb, 0xa5, 0x47, 0xb6, 0x90, 0x29,
+	0x38, 0x5c, 0x66, 0xdd, 0x0e, 0x48, 0x47, 0xc7,
+	0xc2, 0x9b, 0x45, 0x58, 0x09, 0x5b, 0x72, 0xb2,
+	0x67, 0xc6, 0xe4, 0xf9, 0x0f, 0x57, 0x57, 0xfb,
+	0x1a, 0x57, 0xce, 0x2a, 0x93, 0xf4, 0xea, 0x5d,
+	0x13, 0x19, 0x9e, 0xe2, 0x0f, 0xab, 0xae, 0x44,
+	0x0d, 0xd6, 0xbb, 0x64, 0xd6, 0x1b, 0xe3, 0xc5,
+	0x05, 0x73, 0xda, 0x89, 0xba, 0xa8, 0xff, 0xc4,
+	0x3e, 0xc4, 0x6d, 0xc4, 0x4f, 0xc8, 0x8b, 0x71,
+	0x31, 0x61, 0xc6, 0x33, 0xf5, 0xdf, 0x64, 0x67,
+	0xa5, 0x71, 0xdd, 0x29, 0xbc, 0xba, 0xfe, 0x6a,
+	0xe5, 0xb5, 0xab, 0xf4, 0xca, 0xb8, 0xdf, 0xa5,
+	0x82, 0x33, 0x9f, 0xcf, 0x9d, 0xdf, 0x3c, 0x4e,
+	0x49, 0x4c, 0x21, 0xb4, 0xe8, 0xf2, 0x15, 0xb0,
+	0x47, 0xe9, 0x71, 0x58, 0xd1, 0x37, 0x8f, 0x25,
+	0x52, 0x73, 0x2d, 0x36, 0x9e, 0x7a, 0x3a, 0xcb,
+	0x74, 0xbf, 0x87, 0x29, 0xf3, 0xca, 0xa9, 0x9f,
+	0x50, 0xe4, 0x49, 0x96, 0x83, 0x62, 0x33, 0x17,
+	0x1f, 0x5e, 0x0c, 0xbc, 0x1c, 0x6c, 0x54, 0x91,
+	0xc5, 0x48, 0x70, 0x95, 0xdf, 0xf3, 0x4c, 0xa3,
+	0x19, 0x67, 0x1a, 0x22, 0x90, 0x43, 0x0e, 0xc2,
+	0xb3, 0xe0, 0x5f, 0x93, 0x5d, 0x3d, 0x11, 0xa1,
+	0xd0, 0xc6, 0x47, 0xc7, 0xd4, 0x39, 0xf5, 0xb2,
+	0x7a, 0x23, 0x89, 0x53, 0xdc, 0xe1, 0xe6, 0x0f,
+	0x2d, 0x4f, 0xfd, 0x99, 0x21, 0x70, 0x22, 0x4a,
+	0xc2, 0xc2, 0x49, 0x23, 0xb0, 0x03, 0xd6, 0x6c,
+	0xf9, 0x9a, 0xf6, 0xdd, 0x4e, 0x40, 0xe9, 0x9d,
+	0x50, 0x48, 0x15, 0x8b, 0xbf, 0xf5, 0x32, 0x99,
+	0x30, 0xbb, 0x31, 0x01, 0x76, 0x03, 0x6c, 0xd8,
+	0xce, 0x2e, 0xea, 0xb3, 0x98, 0x23, 0x66, 0xa4,
+	0x16, 0x15, 0x26, 0x05, 0x8c, 0xdb, 0x11, 0x37,
+	0xbf, 0x61, 0x4b, 0xa6, 0x64, 0x0f, 0x9b, 0x60,
+	0x25, 0x91, 0x9f, 0x0f, 0xec, 0xcd, 0xc3, 0xa6,
+	0xea, 0x2b, 0xa3, 0xc1, 0x69, 0xdf, 0x82, 0x7c,
+	0x78, 0x97, 0xd4, 0x64, 0xc6, 0xb4, 0x39, 0xf4,
+	0x29, 0x0a, 0x43, 0x74, 0xcb, 0xc6, 0x53, 0x86,
+	0x0d, 0x72, 0xaf, 0x6b, 0xc9, 0x9a, 0xaf, 0xfc,
+	0x89, 0xae, 0x8a, 0x3d, 0x97, 0xe9, 0x3c, 0x22,
+	0xaf, 0x1a, 0x44, 0xa3, 0x70, 0x05, 0x37, 0xd5,
+	0x12, 0xcb, 0xcb, 0xc0, 0x5a, 0x5d, 0x3f, 0xcf,
+	0x99, 0x77, 0xc4, 0x9c, 0xb9, 0xe4, 0xac, 0x1e,
+	0xa3, 0xfa, 0xc2, 0xc7, 0x6f, 0xfe, 0x62, 0x22,
+	0x07, 0xae, 0x97, 0x11, 0x90, 0x6f, 0x00, 0x6b,
+	0xf0, 0xbd, 0xca, 0x70, 0x6e, 0xbe, 0x3e, 0x3b,
+	0xd3, 0x3e, 0x53, 0x3a, 0xfa, 0xa1, 0xdd, 0x8f,
+	0x76, 0xa9, 0x5d, 0x9b, 0x82, 0x4d, 0xdc, 0xe0,
+	0x95, 0x49, 0x73, 0x4c, 0x76, 0x91, 0x7b, 0x5d,
+	0xca, 0x56, 0xbd, 0xfc, 0x01, 0xee, 0x7c, 0x68,
+	0x6b, 0x8c, 0xfa, 0x9d, 0xcc, 0x76, 0x44, 0xd5,
+	0xbf, 0xbd, 0xeb, 0x74, 0xdb, 0x3a, 0x6c, 0xf6,
+	0x13, 0xa4, 0xcb, 0x72, 0xd3, 0x7c, 0xfc, 0xde,
+	0x8b, 0x2c, 0x5c, 0x7c, 0x0e, 0x17, 0x02, 0x7b,
+	0xb2, 0x88, 0x93, 0xbf, 0x36, 0x55, 0x6f, 0xb9,
+	0x18, 0x97, 0xe2, 0x8a, 0x9c, 0xcb, 0x7b, 0x59,
+	0x85, 0x0c, 0xe7, 0x74, 0x56, 0x5b, 0x97, 0x52,
+	0xda, 0xac, 0xd3, 0xcb, 0x7c, 0xe8, 0x3d, 0x0a,
+	0xbe, 0x53, 0xbb, 0xae, 0x67, 0x1d, 0x64, 0xab,
+	0xf7, 0xe6, 0x16, 0x7b, 0xf7, 0xc2, 0x7a, 0x75,
+	0xf6, 0x74, 0xbd, 0x72, 0x05, 0xe7, 0x1a, 0xed,
+	0x8a, 0x4e, 0x15, 0x39, 0x57, 0x53, 0x02, 0xbb,
+	0x6f, 0x4c, 0xdd, 0xa8, 0x83, 0x43, 0x0e, 0xf8,
+	0x6c, 0xff, 0xf8, 0x79, 0xd9, 0xef, 0x58, 0xff,
+	0x08, 0xb4, 0xd6, 0xf3, 0x3e, 0x76, 0x8b, 0xb8,
+	0xaa, 0xe2, 0xa8, 0xd5, 0x66, 0x26, 0x8e, 0xd3,
+	0x72, 0xfa, 0xcd, 0x27, 0x4d, 0x9a, 0xb7, 0xa2,
+	0xfa, 0x04, 0xa1, 0x2e, 0x28, 0x72, 0xbc, 0x38,
+	0xf7, 0x24, 0x90, 0x36, 0xb3, 0xdb, 0xf3, 0xd6,
+	0x33, 0xb6, 0xac, 0xcf, 0x0b, 0x10, 0xd3, 0x52,
+	0xe6, 0x45, 0x9c, 0x5d, 0x1a, 0x78, 0xba, 0xb3,
+	0xcb, 0xda, 0xb8, 0x8a, 0xfc, 0x93, 0xaa, 0x11,
+	0x3c, 0x85, 0xef, 0xfd, 0xf4, 0x8a, 0x40, 0x28,
+	0xf4, 0xb5, 0xc4, 0x71, 0x8d, 0xde, 0x73, 0xcd,
+	0x2c, 0x1c, 0xdf, 0x92, 0xf7, 0xe4, 0xd2, 0xf1,
+	0x48, 0x75, 0xb4, 0x8c, 0xef, 0x8b, 0xb9, 0xf3,
+	0x25, 0x6b, 0x43, 0xc4, 0x99, 0x5f, 0x52, 0x26,
+	0xd5, 0x53, 0x6a, 0x4a, 0xdb, 0x90, 0x1e, 0x18,
+	0xc8, 0x54, 0x23, 0x51, 0xf4, 0xf9, 0xa9, 0x8d,
+	0xd3, 0xdb, 0x3c, 0xac, 0xcc, 0xc4, 0xe1, 0xe8,
+	0xdb, 0x9c, 0xba, 0x70, 0xb8, 0xfb, 0x76, 0x63,
+	0xbf, 0x83, 0xba, 0xdf, 0xe4, 0x7f, 0x0f, 0xcf,
+	0x80, 0x4a, 0x07, 0x59, 0xec, 0x0a, 0x93, 0xba,
+	0xc3, 0x98, 0x95, 0x55, 0x37, 0x33, 0xc1, 0x7c,
+	0x50, 0x0b, 0xea, 0xb7, 0x18, 0x5b, 0x54, 0x2d,
+	0xdb, 0x7c, 0x28, 0x7a, 0x33, 0x08, 0xbd, 0x2a,
+	0x63, 0xf0, 0x0a, 0x18, 0x2f, 0x4b, 0x01, 0xac,
+	0x12, 0xc0, 0x4a, 0x19, 0xcc, 0x4f, 0xb4, 0xbe,
+	0xe6, 0x30, 0x7a, 0x40, 0xb6, 0x4e, 0xe4, 0xfc,
+	0x0f, 0x59, 0x75, 0x71, 0xca, 0x8a, 0x36, 0xe0,
+	0x7c, 0x39, 0x5a, 0xc3, 0xe9, 0x08, 0xbe, 0x5a,
+	0x6f, 0x11, 0xff, 0x15, 0x31, 0x00, 0xbf, 0xb0,
+	0x88, 0x27, 0xcc, 0x7a, 0xa1, 0x7d, 0x0e, 0x51,
+	0xd4, 0x48, 0xe9, 0xea, 0xce, 0xd7, 0x3b, 0xbc,
+	0x3b, 0x4b, 0x8b, 0x8c, 0x98, 0x29, 0x6d, 0xbd,
+	0x0c, 0x27, 0xec, 0xae, 0x54, 0x71, 0xfe, 0xe0,
+	0xce, 0x7e, 0xb9, 0x6b, 0x9e, 0xdd, 0x9f, 0x17,
+	0x93, 0x30, 0x8e, 0xa4, 0x48, 0x85, 0x42, 0x7e,
+	0x1e, 0xee, 0xe7, 0x70, 0x65, 0x04, 0x22, 0xaa,
+	0xa7, 0xbf, 0x63, 0x09, 0xd9, 0xb4, 0xfb, 0x0b,
+	0x8b, 0x26, 0xe9, 0x95, 0xd1, 0x83, 0x95, 0x43,
+	0xed, 0x34, 0xc2, 0xb4, 0x84, 0x5a, 0x1e, 0x8a,
+	0x15, 0x33, 0x39, 0x42, 0xdd, 0xaa, 0x1d, 0xec,
+	0xed, 0x1f, 0xf2, 0x2e, 0x6f, 0xbc, 0x10, 0x05,
+	0x0f, 0xfb, 0x15, 0xe2, 0x55, 0x65, 0xe1, 0x0d,
+	0xec, 0xa3, 0xc3, 0xb1, 0x63, 0x57, 0x6f, 0x91,
+	0x3a, 0x35, 0xb5, 0x66, 0x40, 0xfc, 0xd8, 0xe6,
+	0xf9, 0x8f, 0xed, 0x3e, 0xec, 0xd4, 0xd8, 0x39,
+	0xf8, 0x49, 0xe8, 0x0e, 0x62, 0xe1, 0xc6, 0x19,
+	0x9e, 0x1b, 0xda, 0xae, 0x4a, 0x36, 0xc4, 0x88,
+	0x9c, 0x82, 0x77, 0x3b, 0x4d, 0x08, 0x8c, 0x0f,
+	0x6a, 0x95, 0xb4, 0xb3, 0x50, 0xd3, 0x7b, 0x52,
+	0x77, 0x39, 0x24, 0x6d, 0xec, 0xde, 0xb1, 0x8a,
+	0x5c, 0xa0, 0x85, 0x8a, 0x90, 0x05, 0x42, 0xb1,
+	0xd3, 0x04, 0xb7, 0xe0, 0x4d, 0x70, 0x7b, 0x6c,
+	0x51, 0xc4, 0x01, 0x4b, 0xfb, 0xc2, 0x9b, 0xce,
+	0xe1, 0x7c, 0x06, 0x51, 0x99, 0xf2, 0xa0, 0x35,
+	0x1d, 0xf2, 0x1f, 0x88, 0x38, 0x49, 0xa1, 0x8c,
+	0xe6, 0x43, 0x59, 0xc4, 0x48, 0x9f, 0x53, 0x4f,
+	0xe7, 0xef, 0x89, 0xf3, 0x0e, 0x69, 0x95, 0x94,
+	0xe6, 0x0e, 0x76, 0xfe, 0x45, 0xfd, 0x23, 0x1d,
+	0x5e, 0x05, 0xfb, 0x59, 0xe5, 0xa9, 0x83, 0xa1,
+	0x5f, 0x9e, 0xf3, 0x3d, 0x8a, 0x5d, 0xb0, 0xea,
+	0x83, 0xd6, 0x91, 0x26, 0x68, 0xe1, 0x57, 0x13,
+	0xa5, 0xf1, 0x9d, 0x8c, 0xb2, 0xed, 0x08, 0x1d,
+	0x04, 0x6c, 0xbe, 0x9e, 0x49, 0x3b, 0x6b, 0x65,
+	0xe1, 0xf8, 0xda, 0xe4, 0x7f, 0xb0, 0xa8, 0xd5,
+	0x66, 0x2a, 0xbe, 0x45, 0x77, 0xfe, 0x88, 0xe1,
+	0x4e, 0x06, 0x24, 0xbe, 0xc9, 0x37, 0x43, 0x12,
+	0x62, 0x37, 0x39, 0xc5, 0xf3, 0x65, 0xac, 0x83,
+	0xd1, 0x89, 0xa1, 0x3b, 0x75, 0x4b, 0xa6, 0xf0,
+	0x3b, 0x5d, 0x4a, 0xff, 0xef, 0x11, 0x97, 0xb3,
+	0x49, 0xcf, 0x4f, 0xe1, 0xab, 0x37, 0xf5, 0x9c,
+	0x90, 0x61, 0x0a, 0x38, 0x10, 0x5d, 0xf7, 0x3b,
+	0x47, 0x7c, 0x1f, 0x75, 0x30, 0xd6, 0x6a, 0xfd,
+	0x2d, 0xba, 0xa3, 0xc5, 0x35, 0xaa, 0xf6, 0x30,
+	0xcf, 0x4d, 0x7a, 0x6e, 0x2d, 0xea, 0x32, 0xb6,
+	0x67, 0x92, 0x2e, 0x6b, 0x48, 0xd8, 0x47, 0x0d,
+	0x21, 0xf3, 0x3f, 0xd8, 0xef, 0xf1, 0xff, 0x19,
+	0x7f, 0x3b, 0x6d, 0x8c, 0x9f, 0x44, 0xf3, 0xb2,
+	0x8a, 0x7a, 0x7c, 0x2e, 0x87, 0x15, 0x3f, 0xc2,
+	0x8f, 0xd9, 0x2b, 0x87, 0xb7, 0x0f, 0x6f, 0x9e,
+	0x97, 0xde, 0x68, 0xcd, 0x8e, 0x82, 0x15, 0xe9,
+	0x5a, 0x9a, 0xf2, 0x71, 0xf6, 0xa0, 0x1f, 0x56,
+	0x18, 0xec, 0x51, 0x0e, 0x31, 0x72, 0x0a, 0xe3,
+	0xd9, 0xa6, 0x1c, 0x36, 0xca, 0xa3, 0x46, 0xc2,
+	0xbd, 0xc3, 0x6f, 0x0e, 0xe7, 0xce, 0xe7, 0xde,
+	0xc8, 0xcd, 0x7b, 0xbe, 0x8a, 0x3a, 0xde, 0xa3,
+	0x39, 0x3e, 0x8d, 0x53, 0xd1, 0x87, 0xf3, 0x87,
+	0xeb, 0xe7, 0xa8, 0x89, 0x0a, 0x11, 0xbc, 0xbc,
+	0x33, 0xf9, 0xff, 0xe8, 0xc4, 0x21, 0xbf
+};
diff --git a/libpcsxcore/socket.c b/libpcsxcore/socket.c
new file mode 100644
index 0000000..2e0dc87
--- /dev/null
+++ b/libpcsxcore/socket.c
@@ -0,0 +1,254 @@
+/*  Pcsx - Pc Psx Emulator
+ *  Copyright (C) 1999-2003  Pcsx Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, see <http://www.gnu.org/licenses>.
+ */
+
+#ifdef _WIN32
+#include <winsock2.h>
+#endif
+
+#include "psxcommon.h"
+#include "socket.h"
+
+#ifndef _WIN32
+#include <sys/socket.h>
+#include <sys/ioctl.h>
+#include <arpa/inet.h>
+#include <netinet/in.h>
+#include <unistd.h>
+#include <fcntl.h>
+#endif
+
+static int server_socket = 0;
+static int client_socket = 0;
+
+static char tbuf[513];
+static int ptr = 0;
+
+#define PORT_NUMBER 12345
+
+int StartServer() {
+    struct in_addr localhostaddr;
+    struct sockaddr_in localsocketaddr;
+
+#ifdef _WIN32
+    WSADATA wsaData;
+
+    if (WSAStartup(MAKEWORD(2, 0), &wsaData) != 0)
+        return -1;
+#endif
+
+    server_socket = socket(AF_INET, SOCK_STREAM, 0);
+
+#ifdef _WIN32
+    if (server_socket == INVALID_SOCKET)
+        return -1;
+#else
+    if (server_socket == -1)
+        return -1;
+#endif
+
+    SetsNonblock();
+
+    memset((void *)&localhostaddr, 0, sizeof(localhostaddr));
+    memset(&localsocketaddr, 0, sizeof(struct sockaddr_in));
+
+#ifdef _WIN32
+    localhostaddr.S_un.S_addr = htonl(INADDR_ANY);
+#else
+    localhostaddr.s_addr = htonl(INADDR_ANY);
+#endif
+    localsocketaddr.sin_family = AF_INET;
+    localsocketaddr.sin_addr = localhostaddr;
+    localsocketaddr.sin_port = htons(PORT_NUMBER);
+
+    if (bind(server_socket, (struct sockaddr *) &localsocketaddr, sizeof(localsocketaddr)) < 0)
+        return -1;
+
+    if (listen(server_socket, 1) != 0)
+        return -1;
+
+    return 0;
+}
+
+void StopServer() {
+#ifdef _WIN32
+    shutdown(server_socket, SD_BOTH);
+    closesocket(server_socket);
+    WSACleanup();
+#else
+    shutdown(server_socket, SHUT_RDWR);
+    close(server_socket);
+#endif
+}
+
+void GetClient() {
+    int new_socket;
+    char hello[256];
+
+    new_socket = accept(server_socket, 0, 0);
+    
+#ifdef _WIN32
+    if (new_socket == INVALID_SOCKET)
+        return;
+#else
+    if (new_socket == -1)
+        return;
+#endif
+    if (client_socket)
+        CloseClient();
+    client_socket = new_socket;
+
+#ifndef _WIN32
+    {
+        int flags;
+        flags = fcntl(client_socket, F_GETFL, 0);
+        fcntl(client_socket, F_SETFL, flags | O_NONBLOCK);
+    }
+#endif
+
+    sprintf(hello, "000 PCSX Version %s - Debug console\r\n", PACKAGE_VERSION);
+    WriteSocket(hello, strlen(hello));
+    ptr = 0;
+}
+
+void CloseClient() {
+    if (client_socket) {
+#ifdef _WIN32
+        shutdown(client_socket, SD_BOTH);
+        closesocket(client_socket);
+#else
+        shutdown(client_socket, SHUT_RDWR);
+        close(client_socket);
+#endif
+        client_socket = 0;
+    }
+}
+
+int HasClient() {
+    return client_socket ? 1 : 0;
+}
+
+int ReadSocket(char * buffer, int len) {
+    int r;
+    char * endl;
+
+    if (!client_socket)
+        return -1;
+
+    r = recv(client_socket, tbuf + ptr, 512 - ptr, 0);
+
+    if (r == 0) {
+        client_socket = 0;
+        if (!ptr)
+            return 0;
+    }
+#ifdef _WIN32
+    if (r == SOCKET_ERROR)
+#else
+    if (r == -1)
+#endif
+    {
+        if (ptr == 0)
+            return -1;
+        r = 0;
+    }
+    ptr += r;
+    tbuf[ptr] = 0;
+
+    endl = strstr(tbuf, "\r\n");
+
+    if (endl) {
+        r = endl - tbuf;
+        strncpy(buffer, tbuf, r);
+
+        r += 2;
+        memmove(tbuf, tbuf + r, 512 - r);
+        ptr -= r;
+        memset(tbuf + r, 0, 512 - r);
+        r -= 2;
+
+    } else {
+        r = 0;
+    }
+
+    buffer[r] = 0;
+
+    return r;
+}
+
+int RawReadSocket(char * buffer, int len) {
+    int r;
+    int mlen = len < ptr ? len : ptr;
+
+    if (!client_socket)
+        return -1;
+
+    if (ptr) {
+        memcpy(buffer, tbuf, mlen);
+        ptr -= mlen;
+        memmove(tbuf, tbuf + mlen, 512 - mlen);
+    }
+
+    if (len - mlen)
+        r = recv(client_socket, buffer + mlen, len - mlen, 0);
+
+    if (r == 0) {
+        client_socket = 0;
+        if (!ptr)
+            return 0;
+    }
+#ifdef _WIN32
+    if (r == SOCKET_ERROR)
+#else
+    if (r == -1)
+#endif
+    {
+        if (ptr == 0)
+            return -1;
+        r = 0;
+    }
+
+    r += mlen;
+
+    return r;
+}
+
+void WriteSocket(char * buffer, int len) {
+    if (!client_socket)
+        return;
+
+    send(client_socket, buffer, len, 0);
+}
+
+void SetsBlock() {
+#ifdef _WIN32
+    u_long b = 0;
+    ioctlsocket(server_socket, FIONBIO, &b);
+#else
+    int flags = fcntl(server_socket, F_GETFL, 0);
+    fcntl(server_socket, F_SETFL, flags & ~O_NONBLOCK);
+#endif
+}
+
+void SetsNonblock() {
+#ifdef _WIN32
+    u_long b = 1;
+    ioctlsocket(server_socket, FIONBIO, &b);
+#else
+    int flags = fcntl(server_socket, F_GETFL, 0);
+    fcntl(server_socket, F_SETFL, flags | O_NONBLOCK);
+#endif
+}
diff --git a/libpcsxcore/socket.h b/libpcsxcore/socket.h
new file mode 100644
index 0000000..7ee0deb
--- /dev/null
+++ b/libpcsxcore/socket.h
@@ -0,0 +1,43 @@
+/*  Pcsx - Pc Psx Emulator
+ *  Copyright (C) 1999-2003  Pcsx Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, see <http://www.gnu.org/licenses>.
+ */
+
+#ifndef __SOCKET_H__
+#define __SOCKET_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+int StartServer();
+void StopServer();
+
+void GetClient();
+void CloseClient();
+
+int HasClient();
+
+int ReadSocket(char * buffer, int len);
+int RawReadSocket(char * buffer, int len);
+void WriteSocket(char * buffer, int len);
+
+void SetsBlock();
+void SetsNonblock();
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/libpcsxcore/spu.c b/libpcsxcore/spu.c
new file mode 100644
index 0000000..a60c047
--- /dev/null
+++ b/libpcsxcore/spu.c
@@ -0,0 +1,28 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+/*
+* Sound (SPU) functions.
+*/
+
+#include "spu.h"
+
+void CALLBACK SPUirq(void) {
+	psxHu32ref(0x1070) |= SWAPu32(0x200);
+}
diff --git a/libpcsxcore/spu.h b/libpcsxcore/spu.h
new file mode 100644
index 0000000..85010cb
--- /dev/null
+++ b/libpcsxcore/spu.h
@@ -0,0 +1,47 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+#ifndef __SPU_H__
+#define __SPU_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "psxcommon.h"
+#include "plugins.h"
+#include "r3000a.h"
+#include "psxmem.h"
+
+#define H_SPUirqAddr     0x0da4
+#define H_SPUaddr        0x0da6
+#define H_SPUdata        0x0da8
+#define H_SPUctrl        0x0daa
+#define H_SPUstat        0x0dae
+#define H_SPUon1         0x0d88
+#define H_SPUon2         0x0d8a
+#define H_SPUoff1        0x0d8c
+#define H_SPUoff2        0x0d8e
+
+void CALLBACK SPUirq(void);
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/libpcsxcore/system.h b/libpcsxcore/system.h
new file mode 100644
index 0000000..c869fdf
--- /dev/null
+++ b/libpcsxcore/system.h
@@ -0,0 +1,42 @@
+/***************************************************************************
+ *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program; if not, write to the                         *
+ *   Free Software Foundation, Inc.,                                       *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ ***************************************************************************/
+
+#ifndef __SYSTEM_H__
+#define __SYSTEM_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+int SysInit();							// Init mem and plugins
+void SysReset();						// Resets mem
+void SysPrintf(const char *fmt, ...);	// Printf used by bios syscalls
+void SysMessage(const char *fmt, ...);	// Message used to print msg to users
+void *SysLoadLibrary(const char *lib);	// Loads Library
+void *SysLoadSym(void *lib, const char *sym);	// Loads Symbol from Library
+const char *SysLibError();				// Gets previous error loading sysbols
+void SysCloseLibrary(void *lib);		// Closes Library
+void SysUpdate();						// Called on VBlank (to update i.e. pads)
+void SysRunGui();						// Returns to the Gui
+void SysClose();						// Close mem and plugins
+
+#ifdef __cplusplus
+}
+#endif
+#endif
author	PCSX* teams	2010-11-16 14:15:22 +0200
committer	Grazvydas Ignotas	2010-11-16 14:15:22 +0200
commit	ef79bbde537d6b9c745a7d86cb9df1d04c35590d (patch)
tree	ef8d2520dbb9e1e345b41b12c9959f300ca8fd10 /libpcsxcore
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