diff options
| -rw-r--r-- | libpcsxcore/new_dynarec/assem_arm.c | 5 | ||||
| -rw-r--r-- | libpcsxcore/new_dynarec/new_dynarec.c | 16 |
2 files changed, 18 insertions, 3 deletions
diff --git a/libpcsxcore/new_dynarec/assem_arm.c b/libpcsxcore/new_dynarec/assem_arm.c index 3abef7f..cd3429f 100644 --- a/libpcsxcore/new_dynarec/assem_arm.c +++ b/libpcsxcore/new_dynarec/assem_arm.c @@ -2553,6 +2553,11 @@ do_readstub(int n) rth=get_reg(i_regmap,rt1[i]|64); rt=get_reg(i_regmap,rt1[i]); } +#ifdef PCSX + if(rt<0) + // assume forced dummy read + rt=get_reg(i_regmap,-1); +#endif assert(rs>=0); assert(rt>=0); if(addr<0) addr=rt; diff --git a/libpcsxcore/new_dynarec/new_dynarec.c b/libpcsxcore/new_dynarec/new_dynarec.c index 85cfc0f..2a72711 100644 --- a/libpcsxcore/new_dynarec/new_dynarec.c +++ b/libpcsxcore/new_dynarec/new_dynarec.c @@ -2717,7 +2717,7 @@ void load_assemble(int i,struct regstat *i_regs) int s,th,tl,addr,map=-1; int offset; int jaddr=0; - int memtarget,c=0; + int memtarget=0,c=0; u_int hr,reglist=0; th=get_reg(i_regs->regmap,rt1[i]|64); tl=get_reg(i_regs->regmap,rt1[i]); @@ -2732,11 +2732,21 @@ void load_assemble(int i,struct regstat *i_regs) memtarget=((signed int)(constmap[i][s]+offset))<(signed int)0x80800000; if(using_tlb&&((signed int)(constmap[i][s]+offset))>=(signed int)0xC0000000) memtarget=1; } - if(offset||s<0||c) addr=tl; - else addr=s; //printf("load_assemble: c=%d\n",c); //if(c) printf("load_assemble: const=%x\n",(int)constmap[i][s]+offset); // FIXME: Even if the load is a NOP, we should check for pagefaults... +#ifdef PCSX + if(tl<0) { + if(!c||(((u_int)constmap[i][s]+offset)>>16)==0x1f80) { + // could be FIFO, must perform the read + assem_debug("(forced read)\n"); + tl=get_reg(i_regs->regmap,-1); + assert(tl>=0); + } + } + if(offset||s<0||c) addr=tl; + else addr=s; +#endif if(tl>=0) { //assert(tl>=0); //assert(rt1[i]); |