aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
Diffstat
-rw-r--r--libpcsxcore/gte_neon.S (renamed from libpcsxcore/gte_neon.s)15
-rw-r--r--libpcsxcore/new_dynarec/assem_arm.c2
-rw-r--r--libpcsxcore/new_dynarec/assem_arm.h2
-rw-r--r--libpcsxcore/new_dynarec/linkage_arm.S (renamed from libpcsxcore/new_dynarec/linkage_arm.s)24
-rw-r--r--plugins/dfsound/arm_utils.S (renamed from plugins/dfsound/arm_utils.s)41
5 files changed, 46 insertions, 38 deletions
diff --git a/libpcsxcore/gte_neon.s b/libpcsxcore/gte_neon.S
index 470c3e3..9fafb27 100644
--- a/libpcsxcore/gte_neon.s
+++ b/libpcsxcore/gte_neon.S
@@ -17,6 +17,15 @@ scratch:
.text
.align 2
+.macro ldr_scratch rd
+#ifndef __PIC__
+ movw \rd, #:lower16:scratch
+ movt \rd, #:upper16:scratch
+#else
+ ldr \rd, =scratch
+#endif
+.endm
+
@ XXX: gteMAC calc shouldn't be saturating, but it is here
@ approximate gteMAC|123 flags
@@ -139,8 +148,7 @@ gteRTPS_neon:
push {r4-r6,lr}
@ fmrx r4, fpscr @ vmrs? at least 40 cycle hit
- movw r1, #:lower16:scratch
- movt r1, #:upper16:scratch
+ ldr_scratch r1
mov r12, #0
vldmia r0, {d8} @ VXYZ(0)
@@ -293,8 +301,7 @@ gteRTPS_neon:
gteRTPT_neon:
push {r4-r11,lr}
- movw r1, #:lower16:scratch
- movt r1, #:upper16:scratch
+ ldr_scratch r1
mov r12, #0
rtpx_preload
diff --git a/libpcsxcore/new_dynarec/assem_arm.c b/libpcsxcore/new_dynarec/assem_arm.c
index f2c2efa..77cfafa 100644
--- a/libpcsxcore/new_dynarec/assem_arm.c
+++ b/libpcsxcore/new_dynarec/assem_arm.c
@@ -2702,7 +2702,7 @@ void literal_pool_jumpover(int n)
set_jump_target(jaddr,(int)out);
}
-emit_extjump2(int addr, int target, int linker)
+emit_extjump2(u_int addr, int target, int linker)
{
u_char *ptr=(u_char *)addr;
assert((ptr[3]&0x0e)==0xa);
diff --git a/libpcsxcore/new_dynarec/assem_arm.h b/libpcsxcore/new_dynarec/assem_arm.h
index 2d9efe1..f4e36a9 100644
--- a/libpcsxcore/new_dynarec/assem_arm.h
+++ b/libpcsxcore/new_dynarec/assem_arm.h
@@ -66,5 +66,5 @@ extern char *invc_ptr;
#define BASE_ADDR 0x1000000
#else
extern char translation_cache[1 << TARGET_SIZE_2];
-#define BASE_ADDR translation_cache
+#define BASE_ADDR (u_int)translation_cache
#endif
diff --git a/libpcsxcore/new_dynarec/linkage_arm.s b/libpcsxcore/new_dynarec/linkage_arm.S
index bd5a03d..4748078 100644
--- a/libpcsxcore/new_dynarec/linkage_arm.s
+++ b/libpcsxcore/new_dynarec/linkage_arm.S
@@ -19,8 +19,6 @@
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. *
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
-/* .equiv HAVE_ARMV7, 1 */
-
.global dynarec_local
.global reg
.global hi
@@ -165,33 +163,33 @@ FCR31 = align0
.type FCR31, %object
.size FCR31, 4
-.macro load_var_adr reg var
-.if HAVE_ARMV7
+.macro load_varadr reg var
+#if defined(__ARM_ARCH_7A__) && !defined(__PIC__)
movw \reg, #:lower16:\var
movt \reg, #:upper16:\var
-.else
+#else
ldr \reg, =\var
-.endif
+#endif
.endm
.macro mov_16 reg imm
-.if HAVE_ARMV7
+#ifdef __ARM_ARCH_7A__
movw \reg, #\imm
-.else
+#else
mov \reg, #(\imm & 0x00ff)
orr \reg, #(\imm & 0xff00)
-.endif
+#endif
.endm
.macro mov_24 reg imm
-.if HAVE_ARMV7
+#ifdef __ARM_ARCH_7A__
movw \reg, #(\imm & 0xffff)
movt \reg, #(\imm >> 16)
-.else
+#else
mov \reg, #(\imm & 0x0000ff)
orr \reg, #(\imm & 0x00ff00)
orr \reg, #(\imm & 0xff0000)
-.endif
+#endif
.endm
.macro dyna_linker_main
@@ -778,7 +776,7 @@ invalidate_addr_call:
new_dyna_start:
/* ip is stored to conform EABI alignment */
stmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, ip, lr}
- load_var_adr fp, dynarec_local
+ load_varadr fp, dynarec_local
ldr r0, [fp, #pcaddr-dynarec_local]
bl get_addr_ht
ldr r1, [fp, #next_interupt-dynarec_local]
diff --git a/plugins/dfsound/arm_utils.s b/plugins/dfsound/arm_utils.S
index 70ff24d..22e5844 100644
--- a/plugins/dfsound/arm_utils.s
+++ b/plugins/dfsound/arm_utils.S
@@ -12,18 +12,24 @@
.text
.align 2
-@ XXX: should be HAVE_NEON
-.if HAVE_ARMV7
+.macro load_varadr reg var
+#if defined(__ARM_ARCH_7A__) && !defined(__PIC__)
+ movw \reg, #:lower16:\var
+ movt \reg, #:upper16:\var
+#else
+ ldr \reg, =\var
+#endif
+.endm
+
+#ifdef __ARM_NEON__
.global mix_chan @ (int start, int count, int lv, int rv)
mix_chan:
vmov.32 d14[0], r2
vmov.32 d14[1], r3 @ multipliers
mov r12, r0
- movw r0, #:lower16:ChanBuf
- movw r2, #:lower16:SSumLR
- movt r0, #:upper16:ChanBuf
- movt r2, #:upper16:SSumLR
+ load_varadr r0, ChanBuf
+ load_varadr r2, SSumLR
add r0, r12, lsl #2
add r2, r12, lsl #3
0:
@@ -56,12 +62,9 @@ mix_chan_rvb:
vmov.32 d14[0], r2
vmov.32 d14[1], r3 @ multipliers
mov r12, r0
- movw r0, #:lower16:ChanBuf
- movw r3, #:lower16:sRVBStart
- movw r2, #:lower16:SSumLR
- movt r0, #:upper16:ChanBuf
- movt r3, #:upper16:sRVBStart
- movt r2, #:upper16:SSumLR
+ load_varadr r0, ChanBuf
+ load_varadr r3, sRVBStart
+ load_varadr r2, SSumLR
ldr r3, [r3]
add r0, r12, lsl #2
add r2, r12, lsl #3
@@ -97,7 +100,7 @@ mcr_finish:
vstmiage r3!, {d8}
bx lr
-.else
+#else
.global mix_chan @ (int start, int count, int lv, int rv)
mix_chan:
@@ -105,8 +108,8 @@ mix_chan:
orr r3, r2, r3, lsl #16
lsl r3, #1 @ packed multipliers << 1
mov r12, r0
- ldr r0, =ChanBuf
- ldr r2, =SSumLR
+ load_varadr r0, ChanBuf
+ load_varadr r2, SSumLR
add r0, r12, lsl #2
add r2, r12, lsl #3
0:
@@ -134,9 +137,9 @@ mix_chan_rvb:
stmfd sp!, {r4-r8,lr}
orr lr, r2, r3, lsl #16
lsl lr, #1
- ldr r3, =sRVBStart
- ldr r2, =SSumLR
- ldr r4, =ChanBuf
+ load_varadr r3, sRVBStart
+ load_varadr r2, SSumLR
+ load_varadr r4, ChanBuf
ldr r3, [r3]
add r2, r2, r0, lsl #3
add r3, r3, r0, lsl #3
@@ -156,6 +159,6 @@ mix_chan_rvb:
bgt 0b
ldmfd sp!, {r4-r8,pc}
-.endif
+#endif
@ vim:filetype=armasm
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-23 22:30:40 +0000