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Diffstat (limited to 'libpcsxcore/new_dynarec/new_dynarec.c')
-rw-r--r--libpcsxcore/new_dynarec/new_dynarec.c128
1 files changed, 94 insertions, 34 deletions
diff --git a/libpcsxcore/new_dynarec/new_dynarec.c b/libpcsxcore/new_dynarec/new_dynarec.c
index 74451c7..8ab3128 100644
--- a/libpcsxcore/new_dynarec/new_dynarec.c
+++ b/libpcsxcore/new_dynarec/new_dynarec.c
@@ -371,6 +371,7 @@ void *get_addr(u_int vaddr)
if(verify_dirty(head->addr)) {
//printf("restore candidate: %x (%d) d=%d\n",vaddr,page,invalid_code[vaddr>>12]);
invalid_code[vaddr>>12]=0;
+ inv_code_start=inv_code_end=~0;
memory_map[vaddr>>12]|=0x40000000;
if(vpage<2048) {
#ifndef DISABLE_TLB
@@ -463,6 +464,7 @@ void *get_addr_32(u_int vaddr,u_int flags)
if(verify_dirty(head->addr)) {
//printf("restore candidate: %x (%d) d=%d\n",vaddr,page,invalid_code[vaddr>>12]);
invalid_code[vaddr>>12]=0;
+ inv_code_start=inv_code_end=~0;
memory_map[vaddr>>12]|=0x40000000;
if(vpage<2048) {
#ifndef DISABLE_TLB
@@ -1127,39 +1129,10 @@ void invalidate_page(u_int page)
head=next;
}
}
-void invalidate_block(u_int block)
+
+static void invalidate_block_range(u_int block, u_int first, u_int last)
{
u_int page=get_page(block<<12);
- u_int vpage=get_vpage(block<<12);
- inv_debug("INVALIDATE: %x (%d)\n",block<<12,page);
- //inv_debug("invalid_code[block]=%d\n",invalid_code[block]);
- u_int first,last;
- first=last=page;
- struct ll_entry *head;
- head=jump_dirty[vpage];
- //printf("page=%d vpage=%d\n",page,vpage);
- while(head!=NULL) {
- u_int start,end;
- if(vpage>2047||(head->vaddr>>12)==block) { // Ignore vaddr hash collision
- get_bounds((int)head->addr,&start,&end);
- //printf("start: %x end: %x\n",start,end);
- if(page<2048&&start>=0x80000000&&end<0x80000000+RAM_SIZE) {
- if(((start-(u_int)rdram)>>12)<=page&&((end-1-(u_int)rdram)>>12)>=page) {
- if((((start-(u_int)rdram)>>12)&2047)<first) first=((start-(u_int)rdram)>>12)&2047;
- if((((end-1-(u_int)rdram)>>12)&2047)>last) last=((end-1-(u_int)rdram)>>12)&2047;
- }
- }
-#ifndef DISABLE_TLB
- if(page<2048&&(signed int)start>=(signed int)0xC0000000&&(signed int)end>=(signed int)0xC0000000) {
- if(((start+memory_map[start>>12]-(u_int)rdram)>>12)<=page&&((end-1+memory_map[(end-1)>>12]-(u_int)rdram)>>12)>=page) {
- if((((start+memory_map[start>>12]-(u_int)rdram)>>12)&2047)<first) first=((start+memory_map[start>>12]-(u_int)rdram)>>12)&2047;
- if((((end-1+memory_map[(end-1)>>12]-(u_int)rdram)>>12)&2047)>last) last=((end-1+memory_map[(end-1)>>12]-(u_int)rdram)>>12)&2047;
- }
- }
-#endif
- }
- head=head->next;
- }
//printf("first=%d last=%d\n",first,last);
invalidate_page(page);
assert(first+5>page); // NB: this assumes MAXBLOCK<=4096 (4 pages)
@@ -1178,9 +1151,6 @@ void invalidate_block(u_int block)
// Don't trap writes
invalid_code[block]=1;
-#ifdef PCSX
- invalid_code[((u_int)0x80000000>>12)|page]=1;
-#endif
#ifndef DISABLE_TLB
// If there is a valid TLB entry for this page, remove write protect
if(tlb_LUT_w[block]) {
@@ -1198,10 +1168,98 @@ void invalidate_block(u_int block)
memset(mini_ht,-1,sizeof(mini_ht));
#endif
}
+
+void invalidate_block(u_int block)
+{
+ u_int page=get_page(block<<12);
+ u_int vpage=get_vpage(block<<12);
+ inv_debug("INVALIDATE: %x (%d)\n",block<<12,page);
+ //inv_debug("invalid_code[block]=%d\n",invalid_code[block]);
+ u_int first,last;
+ first=last=page;
+ struct ll_entry *head;
+ head=jump_dirty[vpage];
+ //printf("page=%d vpage=%d\n",page,vpage);
+ while(head!=NULL) {
+ u_int start,end;
+ if(vpage>2047||(head->vaddr>>12)==block) { // Ignore vaddr hash collision
+ get_bounds((int)head->addr,&start,&end);
+ //printf("start: %x end: %x\n",start,end);
+ if(page<2048&&start>=0x80000000&&end<0x80000000+RAM_SIZE) {
+ if(((start-(u_int)rdram)>>12)<=page&&((end-1-(u_int)rdram)>>12)>=page) {
+ if((((start-(u_int)rdram)>>12)&2047)<first) first=((start-(u_int)rdram)>>12)&2047;
+ if((((end-1-(u_int)rdram)>>12)&2047)>last) last=((end-1-(u_int)rdram)>>12)&2047;
+ }
+ }
+#ifndef DISABLE_TLB
+ if(page<2048&&(signed int)start>=(signed int)0xC0000000&&(signed int)end>=(signed int)0xC0000000) {
+ if(((start+memory_map[start>>12]-(u_int)rdram)>>12)<=page&&((end-1+memory_map[(end-1)>>12]-(u_int)rdram)>>12)>=page) {
+ if((((start+memory_map[start>>12]-(u_int)rdram)>>12)&2047)<first) first=((start+memory_map[start>>12]-(u_int)rdram)>>12)&2047;
+ if((((end-1+memory_map[(end-1)>>12]-(u_int)rdram)>>12)&2047)>last) last=((end-1+memory_map[(end-1)>>12]-(u_int)rdram)>>12)&2047;
+ }
+ }
+#endif
+ }
+ head=head->next;
+ }
+ invalidate_block_range(block,first,last);
+}
+
void invalidate_addr(u_int addr)
{
+#ifdef PCSX
+ //static int rhits;
+ // this check is done by the caller
+ //if (inv_code_start<=addr&&addr<=inv_code_end) { rhits++; return; }
+ u_int page=get_page(addr);
+ if(page<2048) { // RAM
+ struct ll_entry *head;
+ u_int addr_min=~0, addr_max=0;
+ int mask=RAM_SIZE-1;
+ int pg1;
+ inv_code_start=addr&~0xfff;
+ inv_code_end=addr|0xfff;
+ pg1=page;
+ if (pg1>0) {
+ // must check previous page too because of spans..
+ pg1--;
+ inv_code_start-=0x1000;
+ }
+ for(;pg1<=page;pg1++) {
+ for(head=jump_dirty[pg1];head!=NULL;head=head->next) {
+ u_int start,end;
+ get_bounds((int)head->addr,&start,&end);
+ if((start&mask)<=(addr&mask)&&(addr&mask)<(end&mask)) {
+ if(start<addr_min) addr_min=start;
+ if(end>addr_max) addr_max=end;
+ }
+ else if(addr<start) {
+ if(start<inv_code_end)
+ inv_code_end=start-1;
+ }
+ else {
+ if(end>inv_code_start)
+ inv_code_start=end;
+ }
+ }
+ }
+ if (addr_min!=~0) {
+ inv_debug("INV ADDR: %08x hit %08x-%08x\n", addr, addr_min, addr_max);
+ inv_code_start=inv_code_end=~0;
+ invalidate_block_range(addr>>12,(addr_min&mask)>>12,(addr_max&mask)>>12);
+ return;
+ }
+ else {
+ inv_debug("INV ADDR: %08x miss, inv %08x-%08x, sk %d\n", addr, inv_code_start, inv_code_end, 0);//rhits);
+ }
+ //rhits=0;
+ if(page!=0) // FIXME: don't know what's up with page 0 (Klonoa)
+ return;
+ }
+#endif
invalidate_block(addr>>12);
}
+
// This is called when loading a save state.
// Anything could have changed, so invalidate everything.
void invalidate_all_pages()
@@ -7793,6 +7851,7 @@ void new_dynarec_clear_full()
pending_exception=0;
literalcount=0;
stop_after_jal=0;
+ inv_code_start=inv_code_end=~0;
// TLB
#ifndef DISABLE_TLB
using_tlb=0;
@@ -11325,6 +11384,7 @@ int new_recompile_block(int addr)
}
#endif
}
+ inv_code_start=inv_code_end=~0;
#ifdef PCSX
// PCSX maps all RAM mirror invalid_code tests to 0x80000000..0x80000000+RAM_SIZE
if(get_page(start)<(RAM_SIZE>>12))
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-03 16:15:52 +0000