diff options
Diffstat (limited to 'libpcsxcore/new_dynarec')
| -rw-r--r-- | libpcsxcore/new_dynarec/assem_arm.c | 1339 | ||||
| -rw-r--r-- | libpcsxcore/new_dynarec/assem_arm.h | 9 | ||||
| -rw-r--r-- | libpcsxcore/new_dynarec/fpu.c | 394 | ||||
| -rw-r--r-- | libpcsxcore/new_dynarec/fpu.h | 74 | ||||
| -rw-r--r-- | libpcsxcore/new_dynarec/new_dynarec.c | 1265 |
5 files changed, 16 insertions, 3065 deletions
diff --git a/libpcsxcore/new_dynarec/assem_arm.c b/libpcsxcore/new_dynarec/assem_arm.c index 708c8ae..c2f65ee 100644 --- a/libpcsxcore/new_dynarec/assem_arm.c +++ b/libpcsxcore/new_dynarec/assem_arm.c @@ -19,7 +19,6 @@ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */ -#ifdef PCSX #include "../gte.h" #define FLAGLESS #include "../gte.h" @@ -27,7 +26,6 @@ #include "../gte_arm.h" #include "../gte_neon.h" #include "pcnt.h" -#endif #include "arm_features.h" #if !BASE_ADDR_FIXED @@ -46,9 +44,6 @@ extern int pcaddr; extern int pending_exception; extern int branch_target; extern uint64_t readmem_dword; -#ifdef MUPEN64 -extern precomp_instr fake_pc; -#endif extern void *dynarec_local; extern u_int memory_map[1048576]; extern u_int mini_ht[32][2]; @@ -119,8 +114,6 @@ const u_int invalidate_addr_reg[16] = { 0, 0}; -#include "fpu.h" - unsigned int needs_clear_cache[1<<(TARGET_SIZE_2-17)]; /* Linker */ @@ -266,18 +259,6 @@ int verify_dirty(int addr) #endif if((*ptr&0xFF000000)!=0xeb000000) ptr++; assert((*ptr&0xFF000000)==0xeb000000); // bl instruction -#ifndef DISABLE_TLB - u_int verifier=(int)ptr+((signed int)(*ptr<<8)>>6)+8; // get target of bl - if(verifier==(u_int)verify_code_vm||verifier==(u_int)verify_code_ds) { - unsigned int page=source>>12; - unsigned int map_value=memory_map[page]; - if(map_value>=0x80000000) return 0; - while(page<((source+len-1)>>12)) { - if((memory_map[++page]<<2)!=(map_value<<2)) return 0; - } - source = source+(map_value<<2); - } -#endif //printf("verify_dirty: %x %x %x\n",source,copy,len); return !memcmp((void *)source,(void *)copy,len); } @@ -322,13 +303,6 @@ void get_bounds(int addr,u_int *start,u_int *end) #endif if((*ptr&0xFF000000)!=0xeb000000) ptr++; assert((*ptr&0xFF000000)==0xeb000000); // bl instruction -#ifndef DISABLE_TLB - u_int verifier=(int)ptr+((signed int)(*ptr<<8)>>6)+8; // get target of bl - if(verifier==(u_int)verify_code_vm||verifier==(u_int)verify_code_ds) { - if(memory_map[source>>12]>=0x80000000) source = 0; - else source = source+(memory_map[source>>12]<<2); - } -#endif *start=source; *end=source+len; } @@ -1037,13 +1011,11 @@ void emit_pcreladdr(u_int rt) void emit_loadreg(int r, int hr) { -#ifdef FORCE32 if(r&64) { SysPrintf("64bit load in 32bit mode!\n"); assert(0); return; } -#endif if((r&63)==0) emit_zeroreg(hr); else { @@ -1062,13 +1034,11 @@ void emit_loadreg(int r, int hr) } void emit_storereg(int r, int hr) { -#ifdef FORCE32 if(r&64) { SysPrintf("64bit store in 32bit mode!\n"); assert(0); return; } -#endif int addr=((int)reg)+((r&63)<<REG_SHIFT)+((r&64)>>4); if((r&63)==HIREG) addr=(int)&hi+((r&64)>>4); if((r&63)==LOREG) addr=(int)&lo+((r&64)>>4); @@ -2671,12 +2641,6 @@ void wb_consts(signed char i_regmap[],uint64_t i_is32,u_int i_dirty,int i) emit_movimm(value,HOST_TEMPREG); } emit_storereg(i_regmap[hr],HOST_TEMPREG); -#ifndef FORCE32 - if((i_is32>>i_regmap[hr])&1) { - if(value!=-1&&value!=0) emit_sarimm(HOST_TEMPREG,31,HOST_TEMPREG); - emit_storereg(i_regmap[hr]|64,HOST_TEMPREG); - } -#endif } } } @@ -2832,10 +2796,8 @@ static void mov_loadtype_adj(int type,int rs,int rt) } } -#ifdef PCSX #include "pcsxmem.h" #include "pcsxmem_inline.c" -#endif do_readstub(int n) { @@ -2859,7 +2821,6 @@ do_readstub(int n) rt=get_reg(i_regmap,rt1[i]); } assert(rs>=0); -#ifdef PCSX int r,temp=-1,temp2=HOST_TEMPREG,regs_saved=0,restore_jump=0; reglist|=(1<<rs); for(r=0;r<=12;r++) { @@ -2919,89 +2880,8 @@ do_readstub(int n) set_jump_target(restore_jump,(int)out); restore_regs(reglist); emit_jmp(stubs[n][2]); // return address -#else // !PCSX - if(addr<0) addr=rt; - if(addr<0&&itype[i]!=C1LS&&itype[i]!=C2LS&&itype[i]!=LOADLR) addr=get_reg(i_regmap,-1); - assert(addr>=0); - int ftable=0; - if(type==LOADB_STUB||type==LOADBU_STUB) - ftable=(int)readmemb; - if(type==LOADH_STUB||type==LOADHU_STUB) - ftable=(int)readmemh; - if(type==LOADW_STUB) - ftable=(int)readmem; -#ifndef FORCE32 - if(type==LOADD_STUB) - ftable=(int)readmemd; -#endif - assert(ftable!=0); - emit_writeword(rs,(int)&address); - //emit_pusha(); - save_regs(reglist); -#ifndef PCSX - ds=i_regs!=®s[i]; - int real_rs=(itype[i]==LOADLR)?-1:get_reg(i_regmap,rs1[i]); - u_int cmask=ds?-1:(0x100f|~i_regs->wasconst); - if(!ds) load_all_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty&~(1<<addr)&(real_rs<0?-1:~(1<<real_rs))&0x100f,i); - wb_dirtys(i_regs->regmap_entry,i_regs->was32,i_regs->wasdirty&cmask&~(1<<addr)&(real_rs<0?-1:~(1<<real_rs))); - if(!ds) wb_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty&~(1<<addr)&(real_rs<0?-1:~(1<<real_rs))&~0x100f,i); -#endif - emit_shrimm(rs,16,1); - int cc=get_reg(i_regmap,CCREG); - if(cc<0) { - emit_loadreg(CCREG,2); - } - emit_movimm(ftable,0); - emit_addimm(cc<0?2:cc,2*stubs[n][6]+2,2); -#ifndef PCSX - emit_movimm(start+stubs[n][3]*4+(((regs[i].was32>>rs1[i])&1)<<1)+ds,3); -#endif - //emit_readword((int)&last_count,temp); - //emit_add(cc,temp,cc); - //emit_writeword(cc,(int)&Count); - //emit_mov(15,14); - emit_call((int)&indirect_jump_indexed); - //emit_callreg(rs); - //emit_readword_dualindexedx4(rs,HOST_TEMPREG,15); -#ifndef PCSX - // We really shouldn't need to update the count here, - // but not doing so causes random crashes... - emit_readword((int)&Count,HOST_TEMPREG); - emit_readword((int)&next_interupt,2); - emit_addimm(HOST_TEMPREG,-2*stubs[n][6]-2,HOST_TEMPREG); - emit_writeword(2,(int)&last_count); - emit_sub(HOST_TEMPREG,2,cc<0?HOST_TEMPREG:cc); - if(cc<0) { - emit_storereg(CCREG,HOST_TEMPREG); - } -#endif - //emit_popa(); - restore_regs(reglist); - //if((cc=get_reg(regmap,CCREG))>=0) { - // emit_loadreg(CCREG,cc); - //} - if(itype[i]==C1LS||itype[i]==C2LS||(rt>=0&&rt1[i]!=0)) { - assert(rt>=0); - if(type==LOADB_STUB) - emit_movsbl((int)&readmem_dword,rt); - if(type==LOADBU_STUB) - emit_movzbl((int)&readmem_dword,rt); - if(type==LOADH_STUB) - emit_movswl((int)&readmem_dword,rt); - if(type==LOADHU_STUB) - emit_movzwl((int)&readmem_dword,rt); - if(type==LOADW_STUB) - emit_readword((int)&readmem_dword,rt); - if(type==LOADD_STUB) { - emit_readword((int)&readmem_dword,rt); - if(rth>=0) emit_readword(((int)&readmem_dword)+4,rth); - } - } - emit_jmp(stubs[n][2]); // return address -#endif // !PCSX } -#ifdef PCSX // return memhandler, or get directly accessable address and return 0 u_int get_direct_memhandler(void *table,u_int addr,int type,u_int *addr_host) { @@ -3028,7 +2908,6 @@ u_int get_direct_memhandler(void *table,u_int addr,int type,u_int *addr_host) return l2<<1; } } -#endif inline_readstub(int type, int i, u_int addr, signed char regmap[], int target, int adj, u_int reglist) { @@ -3037,7 +2916,6 @@ inline_readstub(int type, int i, u_int addr, signed char regmap[], int target, i int rt=get_reg(regmap,target); if(rs<0) rs=get_reg(regmap,-1); assert(rs>=0); -#ifdef PCSX u_int handler,host_addr=0,is_dynamic,far_call=0; int cc=get_reg(regmap,CCREG); if(pcsx_direct_read(type,addr,CLOCK_ADJUST(adj+1),cc,target?rs:-1,rt)) @@ -3111,87 +2989,6 @@ inline_readstub(int type, int i, u_int addr, signed char regmap[], int target, i } } restore_regs(reglist); -#else // if !PCSX - int ftable=0; - if(type==LOADB_STUB||type==LOADBU_STUB) - ftable=(int)readmemb; - if(type==LOADH_STUB||type==LOADHU_STUB) - ftable=(int)readmemh; - if(type==LOADW_STUB) - ftable=(int)readmem; -#ifndef FORCE32 - if(type==LOADD_STUB) - ftable=(int)readmemd; -#endif - assert(ftable!=0); - if(target==0) - emit_movimm(addr,rs); - emit_writeword(rs,(int)&address); - //emit_pusha(); - save_regs(reglist); -#ifndef PCSX - if((signed int)addr>=(signed int)0xC0000000) { - // Theoretically we can have a pagefault here, if the TLB has never - // been enabled and the address is outside the range 80000000..BFFFFFFF - // Write out the registers so the pagefault can be handled. This is - // a very rare case and likely represents a bug. - int ds=regmap!=regs[i].regmap; - if(!ds) load_all_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty,i); - if(!ds) wb_dirtys(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty); - else wb_dirtys(branch_regs[i-1].regmap_entry,branch_regs[i-1].was32,branch_regs[i-1].wasdirty); - } -#endif - //emit_shrimm(rs,16,1); - int cc=get_reg(regmap,CCREG); - if(cc<0) { - emit_loadreg(CCREG,2); - } - //emit_movimm(ftable,0); - emit_movimm(((u_int *)ftable)[addr>>16],0); - //emit_readword((int)&last_count,12); - emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj+1),2); -#ifndef PCSX - if((signed int)addr>=(signed int)0xC0000000) { - // Pagefault address - int ds=regmap!=regs[i].regmap; - emit_movimm(start+i*4+(((regs[i].was32>>rs1[i])&1)<<1)+ds,3); - } -#endif - //emit_add(12,2,2); - //emit_writeword(2,(int)&Count); - //emit_call(((u_int *)ftable)[addr>>16]); - emit_call((int)&indirect_jump); -#ifndef PCSX - // We really shouldn't need to update the count here, - // but not doing so causes random crashes... - emit_readword((int)&Count,HOST_TEMPREG); - emit_readword((int)&next_interupt,2); - emit_addimm(HOST_TEMPREG,-CLOCK_ADJUST(adj+1),HOST_TEMPREG); - emit_writeword(2,(int)&last_count); - emit_sub(HOST_TEMPREG,2,cc<0?HOST_TEMPREG:cc); - if(cc<0) { - emit_storereg(CCREG,HOST_TEMPREG); - } -#endif - //emit_popa(); - restore_regs(reglist); - if(rt>=0) { - if(type==LOADB_STUB) - emit_movsbl((int)&readmem_dword,rt); - if(type==LOADBU_STUB) - emit_movzbl((int)&readmem_dword,rt); - if(type==LOADH_STUB) - emit_movswl((int)&readmem_dword,rt); - if(type==LOADHU_STUB) - emit_movzwl((int)&readmem_dword,rt); - if(type==LOADW_STUB) - emit_readword((int)&readmem_dword,rt); - if(type==LOADD_STUB) { - emit_readword((int)&readmem_dword,rt); - if(rth>=0) emit_readword(((int)&readmem_dword)+4,rth); - } - } -#endif // !PCSX } do_writestub(int n) @@ -3217,7 +3014,6 @@ do_writestub(int n) } assert(rs>=0); assert(rt>=0); -#ifdef PCSX int rtmp,temp=-1,temp2=HOST_TEMPREG,regs_saved=0,restore_jump=0,ra; int reglist2=reglist|(1<<rs)|(1<<rt); for(rtmp=0;rtmp<=12;rtmp++) { @@ -3277,79 +3073,6 @@ do_writestub(int n) restore_regs(reglist); ra=stubs[n][2]; emit_jmp(ra); -#else // if !PCSX - if(addr<0) addr=get_reg(i_regmap,-1); - assert(addr>=0); - int ftable=0; - if(type==STOREB_STUB) - ftable=(int)writememb; - if(type==STOREH_STUB) - ftable=(int)writememh; - if(type==STOREW_STUB) - ftable=(int)writemem; -#ifndef FORCE32 - if(type==STORED_STUB) - ftable=(int)writememd; -#endif - assert(ftable!=0); - emit_writeword(rs,(int)&address); - //emit_shrimm(rs,16,rs); - //emit_movmem_indexedx4(ftable,rs,rs); - if(type==STOREB_STUB) - emit_writebyte(rt,(int)&byte); - if(type==STOREH_STUB) - emit_writehword(rt,(int)&hword); - if(type==STOREW_STUB) - emit_writeword(rt,(int)&word); - if(type==STORED_STUB) { -#ifndef FORCE32 - emit_writeword(rt,(int)&dword); - emit_writeword(r?rth:rt,(int)&dword+4); -#else - SysPrintf("STORED_STUB\n"); -#endif - } - //emit_pusha(); - save_regs(reglist); -#ifndef PCSX - ds=i_regs!=®s[i]; - int real_rs=get_reg(i_regmap,rs1[i]); - u_int cmask=ds?-1:(0x100f|~i_regs->wasconst); - if(!ds) load_all_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty&~(1<<addr)&(real_rs<0?-1:~(1<<real_rs))&0x100f,i); - wb_dirtys(i_regs->regmap_entry,i_regs->was32,i_regs->wasdirty&cmask&~(1<<addr)&(real_rs<0?-1:~(1<<real_rs))); - if(!ds) wb_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty&~(1<<addr)&(real_rs<0?-1:~(1<<real_rs))&~0x100f,i); -#endif - emit_shrimm(rs,16,1); - int cc=get_reg(i_regmap,CCREG); - if(cc<0) { - emit_loadreg(CCREG,2); - } - emit_movimm(ftable,0); - emit_addimm(cc<0?2:cc,2*stubs[n][6]+2,2); -#ifndef PCSX - emit_movimm(start+stubs[n][3]*4+(((regs[i].was32>>rs1[i])&1)<<1)+ds,3); -#endif - //emit_readword((int)&last_count,temp); - //emit_addimm(cc,2*stubs[n][5]+2,cc); - //emit_add(cc,temp,cc); - //emit_writeword(cc,(int)&Count); - emit_call((int)&indirect_jump_indexed); - //emit_callreg(rs); - emit_readword((int)&Count,HOST_TEMPREG); - emit_readword((int)&next_interupt,2); - emit_addimm(HOST_TEMPREG,-2*stubs[n][6]-2,HOST_TEMPREG); - emit_writeword(2,(int)&last_count); - emit_sub(HOST_TEMPREG,2,cc<0?HOST_TEMPREG:cc); - if(cc<0) { - emit_storereg(CCREG,HOST_TEMPREG); - } - //emit_popa(); - restore_regs(reglist); - //if((cc=get_reg(regmap,CCREG))>=0) { - // emit_loadreg(CCREG,cc); - //} - emit_jmp(stubs[n][2]); // return address -#endif // !PCSX } inline_writestub(int type, int i, u_int addr, signed char regmap[], int target, int adj, u_int reglist) @@ -3359,7 +3082,6 @@ inline_writestub(int type, int i, u_int addr, signed char regmap[], int target, int rt=get_reg(regmap,target); assert(rs>=0); assert(rt>=0); -#ifdef PCSX u_int handler,host_addr=0; handler=get_direct_memhandler(mem_wtab,addr,type,&host_addr); if (handler==0) { @@ -3388,82 +3110,6 @@ inline_writestub(int type, int i, u_int addr, signed char regmap[], int target, if(cc<0) emit_storereg(CCREG,2); restore_regs(reglist); -#else // if !pcsx - int ftable=0; - if(type==STOREB_STUB) - ftable=(int)writememb; - if(type==STOREH_STUB) - ftable=(int)writememh; - if(type==STOREW_STUB) - ftable=(int)writemem; -#ifndef FORCE32 - if(type==STORED_STUB) - ftable=(int)writememd; -#endif - assert(ftable!=0); - emit_writeword(rs,(int)&address); - //emit_shrimm(rs,16,rs); - //emit_movmem_indexedx4(ftable,rs,rs); - if(type==STOREB_STUB) - emit_writebyte(rt,(int)&byte); - if(type==STOREH_STUB) - emit_writehword(rt,(int)&hword); - if(type==STOREW_STUB) - emit_writeword(rt,(int)&word); - if(type==STORED_STUB) { -#ifndef FORCE32 - emit_writeword(rt,(int)&dword); - emit_writeword(target?rth:rt,(int)&dword+4); -#else - SysPrintf("STORED_STUB\n"); -#endif - } - //emit_pusha(); - save_regs(reglist); -#ifndef PCSX - // rearmed note: load_all_consts prevents BIOS boot, some bug? - if((signed int)addr>=(signed int)0xC0000000) { - // Theoretically we can have a pagefault here, if the TLB has never - // been enabled and the address is outside the range 80000000..BFFFFFFF - // Write out the registers so the pagefault can be handled. This is - // a very rare case and likely represents a bug. - int ds=regmap!=regs[i].regmap; - if(!ds) load_all_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty,i); - if(!ds) wb_dirtys(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty); - else wb_dirtys(branch_regs[i-1].regmap_entry,branch_regs[i-1].was32,branch_regs[i-1].wasdirty); - } -#endif - //emit_shrimm(rs,16,1); - int cc=get_reg(regmap,CCREG); - if(cc<0) { - emit_loadreg(CCREG,2); - } - //emit_movimm(ftable,0); - emit_movimm(((u_int *)ftable)[addr>>16],0); - //emit_readword((int)&last_count,12); - emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj+1),2); -#ifndef PCSX - if((signed int)addr>=(signed int)0xC0000000) { - // Pagefault address - int ds=regmap!=regs[i].regmap; - emit_movimm(start+i*4+(((regs[i].was32>>rs1[i])&1)<<1)+ds,3); - } -#endif - //emit_add(12,2,2); - //emit_writeword(2,(int)&Count); - //emit_call(((u_int *)ftable)[addr>>16]); - emit_call((int)&indirect_jump); - emit_readword((int)&Count,HOST_TEMPREG); - emit_readword((int)&next_interupt,2); - emit_addimm(HOST_TEMPREG,-CLOCK_ADJUST(adj+1),HOST_TEMPREG); - emit_writeword(2,(int)&last_count); - emit_sub(HOST_TEMPREG,2,cc<0?HOST_TEMPREG:cc); - if(cc<0) { - emit_storereg(CCREG,HOST_TEMPREG); - } - //emit_popa(); - restore_regs(reglist); -#endif } do_unalignedwritestub(int n) @@ -3506,14 +3152,6 @@ do_unalignedwritestub(int n) emit_writeword(temp2,(int)&address); save_regs(reglist); -#ifndef PCSX - ds=i_regs!=®s[i]; - real_rs=get_reg(i_regmap,rs1[i]); - u_int cmask=ds?-1:(0x100f|~i_regs->wasconst); - if(!ds) load_all_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty&~(1<<addr)&(real_rs<0?-1:~(1<<real_rs))&0x100f,i); - wb_dirtys(i_regs->regmap_entry,i_regs->was32,i_regs->wasdirty&cmask&~(1<<addr)&(real_rs<0?-1:~(1<<real_rs))); - if(!ds) wb_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty&~(1<<addr)&(real_rs<0?-1:~(1<<real_rs))&~0x100f,i); -#endif emit_shrimm(addr,16,1); int cc=get_reg(i_regmap,CCREG); if(cc<0) { @@ -3521,10 +3159,6 @@ do_unalignedwritestub(int n) } emit_movimm((u_int)readmem,0); emit_addimm(cc<0?2:cc,2*stubs[n][6]+2,2); -#ifndef PCSX - // pagefault address - emit_movimm(start+stubs[n][3]*4+(((regs[i].was32>>rs1[i])&1)<<1)+ds,3); -#endif emit_call((int)&indirect_jump_indexed); restore_regs(reglist); @@ -3587,10 +3221,7 @@ do_invstub(int n) int do_dirty_stub(int i) { assem_debug("do_dirty_stub %x\n",start+i*4); - u_int addr=(int)start<(int)0xC0000000?(u_int)source:(u_int)start; - #ifdef PCSX - addr=(u_int)source; - #endif + u_int addr=(u_int)source; // Careful about the code output here, verify_dirty needs to parse it. #ifndef HAVE_ARMV7 emit_loadlp(addr,1); @@ -3651,93 +3282,6 @@ do_cop1stub(int n) emit_jmp(ds?(int)fp_exception_ds:(int)fp_exception); } -#ifndef DISABLE_TLB - -/* TLB */ - -int do_tlb_r(int s,int ar,int map,int x,int a,int shift,int c,u_int addr) -{ - if(c) { - if((signed int)addr>=(signed int)0xC0000000) { - // address_generation already loaded the const - emit_readword_dualindexedx4(FP,map,map); - } - else - return -1; // No mapping - } - else { - assert(s!=map); - emit_movimm(((int)memory_map-(int)&dynarec_local)>>2,map); - emit_addsr12(map,s,map); - // Schedule this while we wait on the load - //if(x) emit_xorimm(s,x,ar); - if(shift>=0) emit_shlimm(s,3,shift); - if(~a) emit_andimm(s,a,ar); - emit_readword_dualindexedx4(FP,map,map); - } - return map; -} -int do_tlb_r_branch(int map, int c, u_int addr, int *jaddr) -{ - if(!c||(signed int)addr>=(signed int)0xC0000000) { - emit_test(map,map); - *jaddr=(int)out; - emit_js(0); - } - return map; -} - -int gen_tlb_addr_r(int ar, int map) { - if(map>=0) { - assem_debug("add %s,%s,%s lsl #2\n",regname[ar],regname[ar],regname[map]); - output_w32(0xe0800100|rd_rn_rm(ar,ar,map)); - } -} - -int do_tlb_w(int s,int ar,int map,int x,int c,u_int addr) -{ - if(c) { - if(addr<0x80800000||addr>=0xC0000000) { - // address_generation already loaded the const - emit_readword_dualindexedx4(FP,map,map); - } - else - return -1; // No mapping - } - else { - assert(s!=map); - emit_movimm(((int)memory_map-(int)&dynarec_local)>>2,map); - emit_addsr12(map,s,map); - // Schedule this while we wait on the load - //if(x) emit_xorimm(s,x,ar); - emit_readword_dualindexedx4(FP,map,map); - } - return map; -} -int do_tlb_w_branch(int map, int c, u_int addr, int *jaddr) -{ - if(!c||addr<0x80800000||addr>=0xC0000000) { - emit_testimm(map,0x40000000); - *jaddr=(int)out; - emit_jne(0); - } -} - -int gen_tlb_addr_w(int ar, int map) { - if(map>=0) { - assem_debug("add %s,%s,%s lsl #2\n",regname[ar],regname[ar],regname[map]); - output_w32(0xe0800100|rd_rn_rm(ar,ar,map)); - } -} - -// Generate the address of the memory_map entry, relative to dynarec_local -generate_map_const(u_int addr,int reg) { - //printf("generate_map_const(%x,%s)\n",addr,regname[reg]); - emit_movimm((addr>>12)+(((u_int)memory_map-(u_int)&dynarec_local)>>2),reg); -} - -#else - static int do_tlb_r(int a, ...) { return 0; } static int do_tlb_r_branch(int a, ...) { return 0; } static int gen_tlb_addr_r(int a, ...) { return 0; } @@ -3745,8 +3289,6 @@ static int do_tlb_w(int a, ...) { return 0; } static int do_tlb_w_branch(int a, ...) { return 0; } static int gen_tlb_addr_w(int a, ...) { return 0; } -#endif // DISABLE_TLB - /* Special assem */ void shift_assemble_arm(int i,struct regstat *i_regs) @@ -3859,7 +3401,6 @@ void shift_assemble_arm(int i,struct regstat *i_regs) } } -#ifdef PCSX static void speculate_mov(int rs,int rt) { if(rt!=0) { @@ -3977,13 +3518,10 @@ static int get_ptr_mem_type(u_int a) return MTYPE_A000; return MTYPE_8000; } -#endif static int emit_fastpath_cmp_jump(int i,int addr,int *addr_reg_override) { int jaddr,type=0; - -#ifdef PCSX int mr=rs1[i]; if(((smrv_strong|smrv_weak)>>mr)&1) { type=get_ptr_mem_type(smrv[mr]); @@ -4022,7 +3560,6 @@ static int emit_fastpath_cmp_jump(int i,int addr,int *addr_reg_override) type=0; } } -#endif if(type==0) { @@ -4112,7 +3649,6 @@ void loadlr_assemble_arm(int i,struct regstat *i_regs) map=get_reg(i_regs->regmap,TLREG); assert(map>=0); reglist&=~(1<<map); - map=do_tlb_r(addr,temp2,map,0,a,c?-1:temp,c,constmap[i][s]+offset); if(c) { if (opcode[i]==0x22||opcode[i]==0x26) { emit_movimm(((constmap[i][s]+offset)<<3)&24,temp); // LWL/LWR @@ -4120,7 +3656,6 @@ void loadlr_assemble_arm(int i,struct regstat *i_regs) emit_movimm(((constmap[i][s]+offset)<<3)&56,temp); // LDL/LDR } } - do_tlb_r_branch(map,c,constmap[i][s]+offset,&jaddr); } if (opcode[i]==0x22||opcode[i]==0x26) { // LWL/LWR if(!c||memtarget) { @@ -4207,23 +3742,7 @@ void cop0_assemble(int i,struct regstat *i_regs) char copr=(source[i]>>11)&0x1f; //assert(t>=0); // Why does this happen? OOT is weird if(t>=0&&rt1[i]!=0) { -#ifdef MUPEN64 - emit_addimm(FP,(int)&fake_pc-(int)&dynarec_local,0); - emit_movimm((source[i]>>11)&0x1f,1); - emit_writeword(0,(int)&PC); - emit_writebyte(1,(int)&(fake_pc.f.r.nrd)); - if(copr==9) { - emit_readword((int)&last_count,ECX); - emit_loadreg(CCREG,HOST_CCREG); // TODO: do proper reg alloc - emit_add(HOST_CCREG,ECX,HOST_CCREG); - emit_addimm(HOST_CCREG,CLOCK_ADJUST(ccadj[i]),HOST_CCREG); - emit_writeword(HOST_CCREG,(int)&Count); - } - emit_call((int)MFC0); - emit_readword((int)&readmem_dword,t); -#else emit_readword((int)®_cop0+copr*4,t); -#endif } } else if(opcode2[i]==4) // MTC0 @@ -4231,16 +3750,7 @@ void cop0_assemble(int i,struct regstat *i_regs) signed char s=get_reg(i_regs->regmap,rs1[i]); char copr=(source[i]>>11)&0x1f; assert(s>=0); -#ifdef MUPEN64 - emit_writeword(s,(int)&readmem_dword); - wb_register(rs1[i],i_regs->regmap,i_regs->dirty,i_regs->is32); - emit_addimm(FP,(int)&fake_pc-(int)&dynarec_local,0); - emit_movimm((source[i]>>11)&0x1f,1); - emit_writeword(0,(int)&PC); - emit_writebyte(1,(int)&(fake_pc.f.r.nrd)); -#else wb_register(rs1[i],i_regs->regmap,i_regs->dirty,i_regs->is32); -#endif if(copr==9||copr==11||copr==12||copr==13) { emit_readword((int)&last_count,HOST_TEMPREG); emit_loadreg(CCREG,HOST_CCREG); // TODO: do proper reg alloc @@ -4253,7 +3763,6 @@ void cop0_assemble(int i,struct regstat *i_regs) // The interrupt must be taken immediately, because a subsequent // instruction might disable interrupts again. if(copr==12||copr==13) { -#ifdef PCSX if (is_delayslot) { // burn cycles to cause cc_interrupt, which will // reschedule next_interupt. Relies on CCREG from above. @@ -4267,7 +3776,6 @@ void cop0_assemble(int i,struct regstat *i_regs) emit_loadreg(rs1[i],s); return; } -#endif emit_movimm(start+i*4+4,HOST_TEMPREG); emit_writeword(HOST_TEMPREG,(int)&pcaddr); emit_movimm(0,HOST_TEMPREG); @@ -4275,16 +3783,12 @@ void cop0_assemble(int i,struct regstat *i_regs) } //else if(copr==12&&is_delayslot) emit_call((int)MTC0_R12); //else -#ifdef PCSX if(s==HOST_CCREG) emit_loadreg(rs1[i],1); else if(s!=1) emit_mov(s,1); emit_movimm(copr,0); emit_call((int)pcsx_mtc0); -#else - emit_call((int)MTC0); -#endif if(copr==9||copr==11||copr==12||copr==13) { emit_readword((int)&Count,HOST_CCREG); emit_readword((int)&next_interupt,HOST_TEMPREG); @@ -4307,25 +3811,6 @@ void cop0_assemble(int i,struct regstat *i_regs) else { assert(opcode2[i]==0x10); -#ifndef DISABLE_TLB - if((source[i]&0x3f)==0x01) // TLBR - emit_call((int)TLBR); - if((source[i]&0x3f)==0x02) // TLBWI - emit_call((int)TLBWI_new); - if((source[i]&0x3f)==0x06) { // TLBWR - // The TLB entry written by TLBWR is dependent on the count, - // so update the cycle count - emit_readword((int)&last_count,ECX); - if(i_regs->regmap[HOST_CCREG]!=CCREG) emit_loadreg(CCREG,HOST_CCREG); - emit_add(HOST_CCREG,ECX,HOST_CCREG); - emit_addimm(HOST_CCREG,CLOCK_ADJUST(ccadj[i]),HOST_CCREG); - emit_writeword(HOST_CCREG,(int)&Count); - emit_call((int)TLBWR_new); - } - if((source[i]&0x3f)==0x08) // TLBP - emit_call((int)TLBP); -#endif -#ifdef PCSX if((source[i]&0x3f)==0x10) // RFE { emit_readword((int)&Status,0); @@ -4334,15 +3819,6 @@ void cop0_assemble(int i,struct regstat *i_regs) emit_orrshr_imm(1,2,0); emit_writeword(0,(int)&Status); } -#else - if((source[i]&0x3f)==0x18) // ERET - { - int count=ccadj[i]; - if(i_regs->regmap[HOST_CCREG]!=CCREG) emit_loadreg(CCREG,HOST_CCREG); - emit_addimm(HOST_CCREG,CLOCK_ADJUST(count),HOST_CCREG); // TODO: Should there be an extra cycle here? - emit_jmp((int)jump_eret); - } -#endif } } @@ -4667,624 +4143,23 @@ void cop1_unusable(int i,struct regstat *i_regs) void cop1_assemble(int i,struct regstat *i_regs) { -#ifndef DISABLE_COP1 - // Check cop1 unusable - if(!cop1_usable) { - signed char rs=get_reg(i_regs->regmap,CSREG); - assert(rs>=0); - emit_testimm(rs,0x20000000); - int jaddr=(int)out; - emit_jeq(0); - add_stub(FP_STUB,jaddr,(int)out,i,rs,(int)i_regs,is_delayslot,0); - cop1_usable=1; - } - if (opcode2[i]==0) { // MFC1 - signed char tl=get_reg(i_regs->regmap,rt1[i]); - if(tl>=0) { - emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],tl); - emit_readword_indexed(0,tl,tl); - } - } - else if (opcode2[i]==1) { // DMFC1 - signed char tl=get_reg(i_regs->regmap,rt1[i]); - signed char th=get_reg(i_regs->regmap,rt1[i]|64); - if(tl>=0) { - emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],tl); - if(th>=0) emit_readword_indexed(4,tl,th); - emit_readword_indexed(0,tl,tl); - } - } - else if (opcode2[i]==4) { // MTC1 - signed char sl=get_reg(i_regs->regmap,rs1[i]); - signed char temp=get_reg(i_regs->regmap,-1); - emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],temp); - emit_writeword_indexed(sl,0,temp); - } - else if (opcode2[i]==5) { // DMTC1 - signed char sl=get_reg(i_regs->regmap,rs1[i]); - signed char sh=rs1[i]>0?get_reg(i_regs->regmap,rs1[i]|64):sl; - signed char temp=get_reg(i_regs->regmap,-1); - emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],temp); - emit_writeword_indexed(sh,4,temp); - emit_writeword_indexed(sl,0,temp); - } - else if (opcode2[i]==2) // CFC1 - { - signed char tl=get_reg(i_regs->regmap,rt1[i]); - if(tl>=0) { - u_int copr=(source[i]>>11)&0x1f; - if(copr==0) emit_readword((int)&FCR0,tl); - if(copr==31) emit_readword((int)&FCR31,tl); - } - } - else if (opcode2[i]==6) // CTC1 - { - signed char sl=get_reg(i_regs->regmap,rs1[i]); - u_int copr=(source[i]>>11)&0x1f; - assert(sl>=0); - if(copr==31) - { - emit_writeword(sl,(int)&FCR31); - // Set the rounding mode - //FIXME - //char temp=get_reg(i_regs->regmap,-1); - //emit_andimm(sl,3,temp); - //emit_fldcw_indexed((int)&rounding_modes,temp); - } - } -#else cop1_unusable(i, i_regs); -#endif } void fconv_assemble_arm(int i,struct regstat *i_regs) { -#ifndef DISABLE_COP1 - signed char temp=get_reg(i_regs->regmap,-1); - assert(temp>=0); - // Check cop1 unusable - if(!cop1_usable) { - signed char rs=get_reg(i_regs->regmap,CSREG); - assert(rs>=0); - emit_testimm(rs,0x20000000); - int jaddr=(int)out; - emit_jeq(0); - add_stub(FP_STUB,jaddr,(int)out,i,rs,(int)i_regs,is_delayslot,0); - cop1_usable=1; - } - - #if(defined(__VFP_FP__) && !defined(__SOFTFP__)) - if(opcode2[i]==0x10&&(source[i]&0x3f)==0x0d) { // trunc_w_s - emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],temp); - emit_flds(temp,15); - emit_ftosizs(15,15); // float->int, truncate - if(((source[i]>>11)&0x1f)!=((source[i]>>6)&0x1f)) - emit_readword((int)®_cop1_simple[(source[i]>>6)&0x1f],temp); - emit_fsts(15,temp); - return; - } - if(opcode2[i]==0x11&&(source[i]&0x3f)==0x0d) { // trunc_w_d - emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],temp); - emit_vldr(temp,7); - emit_ftosizd(7,13); // double->int, truncate - emit_readword((int)®_cop1_simple[(source[i]>>6)&0x1f],temp); - emit_fsts(13,temp); - return; - } - - if(opcode2[i]==0x14&&(source[i]&0x3f)==0x20) { // cvt_s_w - emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],temp); - emit_flds(temp,13); - if(((source[i]>>11)&0x1f)!=((source[i]>>6)&0x1f)) - emit_readword((int)®_cop1_simple[(source[i]>>6)&0x1f],temp); - emit_fsitos(13,15); - emit_fsts(15,temp); - return; - } - if(opcode2[i]==0x14&&(source[i]&0x3f)==0x21) { // cvt_d_w - emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],temp); - emit_flds(temp,13); - emit_readword((int)®_cop1_double[(source[i]>>6)&0x1f],temp); - emit_fsitod(13,7); - emit_vstr(7,temp); - return; - } - - if(opcode2[i]==0x10&&(source[i]&0x3f)==0x21) { // cvt_d_s - emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],temp); - emit_flds(temp,13); - emit_readword((int)®_cop1_double[(source[i]>>6)&0x1f],temp); - emit_fcvtds(13,7); - emit_vstr(7,temp); - return; - } - if(opcode2[i]==0x11&&(source[i]&0x3f)==0x20) { // cvt_s_d - emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],temp); - emit_vldr(temp,7); - emit_readword((int)®_cop1_simple[(source[i]>>6)&0x1f],temp); - emit_fcvtsd(7,13); - emit_fsts(13,temp); - return; - } - #endif - - // C emulation code - - u_int hr,reglist=0; - for(hr=0;hr<HOST_REGS;hr++) { - if(i_regs->regmap[hr]>=0) reglist|=1<<hr; - } - save_regs(reglist); - - if(opcode2[i]==0x14&&(source[i]&0x3f)==0x20) { - emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],ARG1_REG); - emit_readword((int)®_cop1_simple[(source[i]>> 6)&0x1f],ARG2_REG); - emit_call((int)cvt_s_w); - } - if(opcode2[i]==0x14&&(source[i]&0x3f)==0x21) { - emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],ARG1_REG); - emit_readword((int)®_cop1_double[(source[i]>> 6)&0x1f],ARG2_REG); - emit_call((int)cvt_d_w); - } - if(opcode2[i]==0x15&&(source[i]&0x3f)==0x20) { - emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],ARG1_REG); - emit_readword((int)®_cop1_simple[(source[i]>> 6)&0x1f],ARG2_REG); - emit_call((int)cvt_s_l); - } - if(opcode2[i]==0x15&&(source[i]&0x3f)==0x21) { - emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],ARG1_REG); - emit_readword((int)®_cop1_double[(source[i]>> 6)&0x1f],ARG2_REG); - emit_call((int)cvt_d_l); - } - - if(opcode2[i]==0x10&&(source[i]&0x3f)==0x21) { - emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],ARG1_REG); - emit_readword((int)®_cop1_double[(source[i]>> 6)&0x1f],ARG2_REG); - emit_call((int)cvt_d_s); - } - if(opcode2[i]==0x10&&(source[i]&0x3f)==0x24) { - emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],ARG1_REG); - emit_readword((int)®_cop1_simple[(source[i]>> 6)&0x1f],ARG2_REG); - emit_call((int)cvt_w_s); - } - if(opcode2[i]==0x10&&(source[i]&0x3f)==0x25) { - emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],ARG1_REG); - emit_readword((int)®_cop1_double[(source[i]>> 6)&0x1f],ARG2_REG); - emit_call((int)cvt_l_s); - } - - if(opcode2[i]==0x11&&(source[i]&0x3f)==0x20) { - emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],ARG1_REG); - emit_readword((int)®_cop1_simple[(source[i]>> 6)&0x1f],ARG2_REG); - emit_call((int)cvt_s_d); - } - if(opcode2[i]==0x11&&(source[i]&0x3f)==0x24) { - emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],ARG1_REG); - emit_readword((int)®_cop1_simple[(source[i]>> 6)&0x1f],ARG2_REG); - emit_call((int)cvt_w_d); - } - if(opcode2[i]==0x11&&(source[i]&0x3f)==0x25) { - emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],ARG1_REG); - emit_readword((int)®_cop1_double[(source[i]>> 6)&0x1f],ARG2_REG); - emit_call((int)cvt_l_d); - } - - if(opcode2[i]==0x10&&(source[i]&0x3f)==0x08) { - emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],ARG1_REG); - emit_readword((int)®_cop1_double[(source[i]>> 6)&0x1f],ARG2_REG); - emit_call((int)round_l_s); - } - if(opcode2[i]==0x10&&(source[i]&0x3f)==0x09) { - emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],ARG1_REG); - emit_readword((int)®_cop1_double[(source[i]>> 6)&0x1f],ARG2_REG); - emit_call((int)trunc_l_s); - } - if(opcode2[i]==0x10&&(source[i]&0x3f)==0x0a) { - emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],ARG1_REG); - emit_readword((int)®_cop1_double[(source[i]>> 6)&0x1f],ARG2_REG); - emit_call((int)ceil_l_s); - } - if(opcode2[i]==0x10&&(source[i]&0x3f)==0x0b) { - emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],ARG1_REG); - emit_readword((int)®_cop1_double[(source[i]>> 6)&0x1f],ARG2_REG); - emit_call((int)floor_l_s); - } - if(opcode2[i]==0x10&&(source[i]&0x3f)==0x0c) { - emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],ARG1_REG); - emit_readword((int)®_cop1_simple[(source[i]>> 6)&0x1f],ARG2_REG); - emit_call((int)round_w_s); - } - if(opcode2[i]==0x10&&(source[i]&0x3f)==0x0d) { - emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],ARG1_REG); - emit_readword((int)®_cop1_simple[(source[i]>> 6)&0x1f],ARG2_REG); - emit_call((int)trunc_w_s); - } - if(opcode2[i]==0x10&&(source[i]&0x3f)==0x0e) { - emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],ARG1_REG); - emit_readword((int)®_cop1_simple[(source[i]>> 6)&0x1f],ARG2_REG); - emit_call((int)ceil_w_s); - } - if(opcode2[i]==0x10&&(source[i]&0x3f)==0x0f) { - emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],ARG1_REG); - emit_readword((int)®_cop1_simple[(source[i]>> 6)&0x1f],ARG2_REG); - emit_call((int)floor_w_s); - } - - if(opcode2[i]==0x11&&(source[i]&0x3f)==0x08) { - emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],ARG1_REG); - emit_readword((int)®_cop1_double[(source[i]>> 6)&0x1f],ARG2_REG); - emit_call((int)round_l_d); - } - if(opcode2[i]==0x11&&(source[i]&0x3f)==0x09) { - emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],ARG1_REG); - emit_readword((int)®_cop1_double[(source[i]>> 6)&0x1f],ARG2_REG); - emit_call((int)trunc_l_d); - } - if(opcode2[i]==0x11&&(source[i]&0x3f)==0x0a) { - emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],ARG1_REG); - emit_readword((int)®_cop1_double[(source[i]>> 6)&0x1f],ARG2_REG); - emit_call((int)ceil_l_d); - } - if(opcode2[i]==0x11&&(source[i]&0x3f)==0x0b) { - emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],ARG1_REG); - emit_readword((int)®_cop1_double[(source[i]>> 6)&0x1f],ARG2_REG); - emit_call((int)floor_l_d); - } - if(opcode2[i]==0x11&&(source[i]&0x3f)==0x0c) { - emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],ARG1_REG); - emit_readword((int)®_cop1_simple[(source[i]>> 6)&0x1f],ARG2_REG); - emit_call((int)round_w_d); - } - if(opcode2[i]==0x11&&(source[i]&0x3f)==0x0d) { - emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],ARG1_REG); - emit_readword((int)®_cop1_simple[(source[i]>> 6)&0x1f],ARG2_REG); - emit_call((int)trunc_w_d); - } - if(opcode2[i]==0x11&&(source[i]&0x3f)==0x0e) { - emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],ARG1_REG); - emit_readword((int)®_cop1_simple[(source[i]>> 6)&0x1f],ARG2_REG); - emit_call((int)ceil_w_d); - } - if(opcode2[i]==0x11&&(source[i]&0x3f)==0x0f) { - emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],ARG1_REG); - emit_readword((int)®_cop1_simple[(source[i]>> 6)&0x1f],ARG2_REG); - emit_call((int)floor_w_d); - } - - restore_regs(reglist); -#else cop1_unusable(i, i_regs); -#endif } #define fconv_assemble fconv_assemble_arm void fcomp_assemble(int i,struct regstat *i_regs) { -#ifndef DISABLE_COP1 - signed char fs=get_reg(i_regs->regmap,FSREG); - signed char temp=get_reg(i_regs->regmap,-1); - assert(temp>=0); - // Check cop1 unusable - if(!cop1_usable) { - signed char cs=get_reg(i_regs->regmap,CSREG); - assert(cs>=0); - emit_testimm(cs,0x20000000); - int jaddr=(int)out; - emit_jeq(0); - add_stub(FP_STUB,jaddr,(int)out,i,cs,(int)i_regs,is_delayslot,0); - cop1_usable=1; - } - - if((source[i]&0x3f)==0x30) { - emit_andimm(fs,~0x800000,fs); - return; - } - - if((source[i]&0x3e)==0x38) { - // sf/ngle - these should throw exceptions for NaNs - emit_andimm(fs,~0x800000,fs); - return; - } - - #if(defined(__VFP_FP__) && !defined(__SOFTFP__)) - if(opcode2[i]==0x10) { - emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],temp); - emit_readword((int)®_cop1_simple[(source[i]>>16)&0x1f],HOST_TEMPREG); - emit_orimm(fs,0x800000,fs); - emit_flds(temp,14); - emit_flds(HOST_TEMPREG,15); - emit_fcmps(14,15); - emit_fmstat(); - if((source[i]&0x3f)==0x31) emit_bicvc_imm(fs,0x800000,fs); // c_un_s - if((source[i]&0x3f)==0x32) emit_bicne_imm(fs,0x800000,fs); // c_eq_s - if((source[i]&0x3f)==0x33) {emit_bicne_imm(fs,0x800000,fs);emit_orrvs_imm(fs,0x800000,fs);} // c_ueq_s - if((source[i]&0x3f)==0x34) emit_biccs_imm(fs,0x800000,fs); // c_olt_s - if((source[i]&0x3f)==0x35) {emit_biccs_imm(fs,0x800000,fs);emit_orrvs_imm(fs,0x800000,fs);} // c_ult_s - if((source[i]&0x3f)==0x36) emit_bichi_imm(fs,0x800000,fs); // c_ole_s - if((source[i]&0x3f)==0x37) {emit_bichi_imm(fs,0x800000,fs);emit_orrvs_imm(fs,0x800000,fs);} // c_ule_s - if((source[i]&0x3f)==0x3a) emit_bicne_imm(fs,0x800000,fs); // c_seq_s - if((source[i]&0x3f)==0x3b) emit_bicne_imm(fs,0x800000,fs); // c_ngl_s - if((source[i]&0x3f)==0x3c) emit_biccs_imm(fs,0x800000,fs); // c_lt_s - if((source[i]&0x3f)==0x3d) emit_biccs_imm(fs,0x800000,fs); // c_nge_s - if((source[i]&0x3f)==0x3e) emit_bichi_imm(fs,0x800000,fs); // c_le_s - if((source[i]&0x3f)==0x3f) emit_bichi_imm(fs,0x800000,fs); // c_ngt_s - return; - } - if(opcode2[i]==0x11) { - emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],temp); - emit_readword((int)®_cop1_double[(source[i]>>16)&0x1f],HOST_TEMPREG); - emit_orimm(fs,0x800000,fs); - emit_vldr(temp,6); - emit_vldr(HOST_TEMPREG,7); - emit_fcmpd(6,7); - emit_fmstat(); - if((source[i]&0x3f)==0x31) emit_bicvc_imm(fs,0x800000,fs); // c_un_d - if((source[i]&0x3f)==0x32) emit_bicne_imm(fs,0x800000,fs); // c_eq_d - if((source[i]&0x3f)==0x33) {emit_bicne_imm(fs,0x800000,fs);emit_orrvs_imm(fs,0x800000,fs);} // c_ueq_d - if((source[i]&0x3f)==0x34) emit_biccs_imm(fs,0x800000,fs); // c_olt_d - if((source[i]&0x3f)==0x35) {emit_biccs_imm(fs,0x800000,fs);emit_orrvs_imm(fs,0x800000,fs);} // c_ult_d - if((source[i]&0x3f)==0x36) emit_bichi_imm(fs,0x800000,fs); // c_ole_d - if((source[i]&0x3f)==0x37) {emit_bichi_imm(fs,0x800000,fs);emit_orrvs_imm(fs,0x800000,fs);} // c_ule_d - if((source[i]&0x3f)==0x3a) emit_bicne_imm(fs,0x800000,fs); // c_seq_d - if((source[i]&0x3f)==0x3b) emit_bicne_imm(fs,0x800000,fs); // c_ngl_d - if((source[i]&0x3f)==0x3c) emit_biccs_imm(fs,0x800000,fs); // c_lt_d - if((source[i]&0x3f)==0x3d) emit_biccs_imm(fs,0x800000,fs); // c_nge_d - if((source[i]&0x3f)==0x3e) emit_bichi_imm(fs,0x800000,fs); // c_le_d - if((source[i]&0x3f)==0x3f) emit_bichi_imm(fs,0x800000,fs); // c_ngt_d - return; - } - #endif - - // C only - - u_int hr,reglist=0; - for(hr=0;hr<HOST_REGS;hr++) { - if(i_regs->regmap[hr]>=0) reglist|=1<<hr; - } - reglist&=~(1<<fs); - save_regs(reglist); - if(opcode2[i]==0x10) { - emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],ARG1_REG); - emit_readword((int)®_cop1_simple[(source[i]>>16)&0x1f],ARG2_REG); - if((source[i]&0x3f)==0x30) emit_call((int)c_f_s); - if((source[i]&0x3f)==0x31) emit_call((int)c_un_s); - if((source[i]&0x3f)==0x32) emit_call((int)c_eq_s); - if((source[i]&0x3f)==0x33) emit_call((int)c_ueq_s); - if((source[i]&0x3f)==0x34) emit_call((int)c_olt_s); - if((source[i]&0x3f)==0x35) emit_call((int)c_ult_s); - if((source[i]&0x3f)==0x36) emit_call((int)c_ole_s); - if((source[i]&0x3f)==0x37) emit_call((int)c_ule_s); - if((source[i]&0x3f)==0x38) emit_call((int)c_sf_s); - if((source[i]&0x3f)==0x39) emit_call((int)c_ngle_s); - if((source[i]&0x3f)==0x3a) emit_call((int)c_seq_s); - if((source[i]&0x3f)==0x3b) emit_call((int)c_ngl_s); - if((source[i]&0x3f)==0x3c) emit_call((int)c_lt_s); - if((source[i]&0x3f)==0x3d) emit_call((int)c_nge_s); - if((source[i]&0x3f)==0x3e) emit_call((int)c_le_s); - if((source[i]&0x3f)==0x3f) emit_call((int)c_ngt_s); - } - if(opcode2[i]==0x11) { - emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],ARG1_REG); - emit_readword((int)®_cop1_double[(source[i]>>16)&0x1f],ARG2_REG); - if((source[i]&0x3f)==0x30) emit_call((int)c_f_d); - if((source[i]&0x3f)==0x31) emit_call((int)c_un_d); - if((source[i]&0x3f)==0x32) emit_call((int)c_eq_d); - if((source[i]&0x3f)==0x33) emit_call((int)c_ueq_d); - if((source[i]&0x3f)==0x34) emit_call((int)c_olt_d); - if((source[i]&0x3f)==0x35) emit_call((int)c_ult_d); - if((source[i]&0x3f)==0x36) emit_call((int)c_ole_d); - if((source[i]&0x3f)==0x37) emit_call((int)c_ule_d); - if((source[i]&0x3f)==0x38) emit_call((int)c_sf_d); - if((source[i]&0x3f)==0x39) emit_call((int)c_ngle_d); - if((source[i]&0x3f)==0x3a) emit_call((int)c_seq_d); - if((source[i]&0x3f)==0x3b) emit_call((int)c_ngl_d); - if((source[i]&0x3f)==0x3c) emit_call((int)c_lt_d); - if((source[i]&0x3f)==0x3d) emit_call((int)c_nge_d); - if((source[i]&0x3f)==0x3e) emit_call((int)c_le_d); - if((source[i]&0x3f)==0x3f) emit_call((int)c_ngt_d); - } - restore_regs(reglist); - emit_loadreg(FSREG,fs); -#else cop1_unusable(i, i_regs); -#endif } void float_assemble(int i,struct regstat *i_regs) { -#ifndef DISABLE_COP1 - signed char temp=get_reg(i_regs->regmap,-1); - assert(temp>=0); - // Check cop1 unusable - if(!cop1_usable) { - signed char cs=get_reg(i_regs->regmap,CSREG); - assert(cs>=0); - emit_testimm(cs,0x20000000); - int jaddr=(int)out; - emit_jeq(0); - add_stub(FP_STUB,jaddr,(int)out,i,cs,(int)i_regs,is_delayslot,0); - cop1_usable=1; - } - - #if(defined(__VFP_FP__) && !defined(__SOFTFP__)) - if((source[i]&0x3f)==6) // mov - { - if(((source[i]>>11)&0x1f)!=((source[i]>>6)&0x1f)) { - if(opcode2[i]==0x10) { - emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],temp); - emit_readword((int)®_cop1_simple[(source[i]>>6)&0x1f],HOST_TEMPREG); - emit_readword_indexed(0,temp,temp); - emit_writeword_indexed(temp,0,HOST_TEMPREG); - } - if(opcode2[i]==0x11) { - emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],temp); - emit_readword((int)®_cop1_double[(source[i]>>6)&0x1f],HOST_TEMPREG); - emit_vldr(temp,7); - emit_vstr(7,HOST_TEMPREG); - } - } - return; - } - - if((source[i]&0x3f)>3) - { - if(opcode2[i]==0x10) { - emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],temp); - emit_flds(temp,15); - if(((source[i]>>11)&0x1f)!=((source[i]>>6)&0x1f)) { - emit_readword((int)®_cop1_simple[(source[i]>>6)&0x1f],temp); - } - if((source[i]&0x3f)==4) // sqrt - emit_fsqrts(15,15); - if((source[i]&0x3f)==5) // abs - emit_fabss(15,15); - if((source[i]&0x3f)==7) // neg - emit_fnegs(15,15); - emit_fsts(15,temp); - } - if(opcode2[i]==0x11) { - emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],temp); - emit_vldr(temp,7); - if(((source[i]>>11)&0x1f)!=((source[i]>>6)&0x1f)) { - emit_readword((int)®_cop1_double[(source[i]>>6)&0x1f],temp); - } - if((source[i]&0x3f)==4) // sqrt - emit_fsqrtd(7,7); - if((source[i]&0x3f)==5) // abs - emit_fabsd(7,7); - if((source[i]&0x3f)==7) // neg - emit_fnegd(7,7); - emit_vstr(7,temp); - } - return; - } - if((source[i]&0x3f)<4) - { - if(opcode2[i]==0x10) { - emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],temp); - } - if(opcode2[i]==0x11) { - emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],temp); - } - if(((source[i]>>11)&0x1f)!=((source[i]>>16)&0x1f)) { - if(opcode2[i]==0x10) { - emit_readword((int)®_cop1_simple[(source[i]>>16)&0x1f],HOST_TEMPREG); - emit_flds(temp,15); - emit_flds(HOST_TEMPREG,13); - if(((source[i]>>11)&0x1f)!=((source[i]>>6)&0x1f)) { - if(((source[i]>>16)&0x1f)!=((source[i]>>6)&0x1f)) { - emit_readword((int)®_cop1_simple[(source[i]>>6)&0x1f],temp); - } - } - if((source[i]&0x3f)==0) emit_fadds(15,13,15); - if((source[i]&0x3f)==1) emit_fsubs(15,13,15); - if((source[i]&0x3f)==2) emit_fmuls(15,13,15); - if((source[i]&0x3f)==3) emit_fdivs(15,13,15); - if(((source[i]>>16)&0x1f)==((source[i]>>6)&0x1f)) { - emit_fsts(15,HOST_TEMPREG); - }else{ - emit_fsts(15,temp); - } - } - else if(opcode2[i]==0x11) { - emit_readword((int)®_cop1_double[(source[i]>>16)&0x1f],HOST_TEMPREG); - emit_vldr(temp,7); - emit_vldr(HOST_TEMPREG,6); - if(((source[i]>>11)&0x1f)!=((source[i]>>6)&0x1f)) { - if(((source[i]>>16)&0x1f)!=((source[i]>>6)&0x1f)) { - emit_readword((int)®_cop1_double[(source[i]>>6)&0x1f],temp); - } - } - if((source[i]&0x3f)==0) emit_faddd(7,6,7); - if((source[i]&0x3f)==1) emit_fsubd(7,6,7); - if((source[i]&0x3f)==2) emit_fmuld(7,6,7); - if((source[i]&0x3f)==3) emit_fdivd(7,6,7); - if(((source[i]>>16)&0x1f)==((source[i]>>6)&0x1f)) { - emit_vstr(7,HOST_TEMPREG); - }else{ - emit_vstr(7,temp); - } - } - } - else { - if(opcode2[i]==0x10) { - emit_flds(temp,15); - if(((source[i]>>11)&0x1f)!=((source[i]>>6)&0x1f)) { - emit_readword((int)®_cop1_simple[(source[i]>>6)&0x1f],temp); - } - if((source[i]&0x3f)==0) emit_fadds(15,15,15); - if((source[i]&0x3f)==1) emit_fsubs(15,15,15); - if((source[i]&0x3f)==2) emit_fmuls(15,15,15); - if((source[i]&0x3f)==3) emit_fdivs(15,15,15); - emit_fsts(15,temp); - } - else if(opcode2[i]==0x11) { - emit_vldr(temp,7); - if(((source[i]>>11)&0x1f)!=((source[i]>>6)&0x1f)) { - emit_readword((int)®_cop1_double[(source[i]>>6)&0x1f],temp); - } - if((source[i]&0x3f)==0) emit_faddd(7,7,7); - if((source[i]&0x3f)==1) emit_fsubd(7,7,7); - if((source[i]&0x3f)==2) emit_fmuld(7,7,7); - if((source[i]&0x3f)==3) emit_fdivd(7,7,7); - emit_vstr(7,temp); - } - } - return; - } - #endif - - u_int hr,reglist=0; - for(hr=0;hr<HOST_REGS;hr++) { - if(i_regs->regmap[hr]>=0) reglist|=1<<hr; - } - if(opcode2[i]==0x10) { // Single precision - save_regs(reglist); - emit_readword((int)®_cop1_simple[(source[i]>>11)&0x1f],ARG1_REG); - if((source[i]&0x3f)<4) { - emit_readword((int)®_cop1_simple[(source[i]>>16)&0x1f],ARG2_REG); - emit_readword((int)®_cop1_simple[(source[i]>> 6)&0x1f],ARG3_REG); - }else{ - emit_readword((int)®_cop1_simple[(source[i]>> 6)&0x1f],ARG2_REG); - } - switch(source[i]&0x3f) - { - case 0x00: emit_call((int)add_s);break; - case 0x01: emit_call((int)sub_s);break; - case 0x02: emit_call((int)mul_s);break; - case 0x03: emit_call((int)div_s);break; - case 0x04: emit_call((int)sqrt_s);break; - case 0x05: emit_call((int)abs_s);break; - case 0x06: emit_call((int)mov_s);break; - case 0x07: emit_call((int)neg_s);break; - } - restore_regs(reglist); - } - if(opcode2[i]==0x11) { // Double precision - save_regs(reglist); - emit_readword((int)®_cop1_double[(source[i]>>11)&0x1f],ARG1_REG); - if((source[i]&0x3f)<4) { - emit_readword((int)®_cop1_double[(source[i]>>16)&0x1f],ARG2_REG); - emit_readword((int)®_cop1_double[(source[i]>> 6)&0x1f],ARG3_REG); - }else{ - emit_readword((int)®_cop1_double[(source[i]>> 6)&0x1f],ARG2_REG); - } - switch(source[i]&0x3f) - { - case 0x00: emit_call((int)add_d);break; - case 0x01: emit_call((int)sub_d);break; - case 0x02: emit_call((int)mul_d);break; - case 0x03: emit_call((int)div_d);break; - case 0x04: emit_call((int)sqrt_d);break; - case 0x05: emit_call((int)abs_d);break; - case 0x06: emit_call((int)mov_d);break; - case 0x07: emit_call((int)neg_d);break; - } - restore_regs(reglist); - } -#else cop1_unusable(i, i_regs); -#endif } void multdiv_assemble_arm(int i,struct regstat *i_regs) @@ -5397,183 +4272,7 @@ void multdiv_assemble_arm(int i,struct regstat *i_regs) } } else // 64-bit -#ifndef FORCE32 - { - if(opcode2[i]==0x1C) // DMULT - { - assert(opcode2[i]!=0x1C); - signed char m1h=get_reg(i_regs->regmap,rs1[i]|64); - signed char m1l=get_reg(i_regs->regmap,rs1[i]); - signed char m2h=get_reg(i_regs->regmap,rs2[i]|64); - signed char m2l=get_reg(i_regs->regmap,rs2[i]); - assert(m1h>=0); - assert(m2h>=0); - assert(m1l>=0); - assert(m2l>=0); - emit_pushreg(m2h); - emit_pushreg(m2l); - emit_pushreg(m1h); - emit_pushreg(m1l); - emit_call((int)&mult64); - emit_popreg(m1l); - emit_popreg(m1h); - emit_popreg(m2l); - emit_popreg(m2h); - signed char hih=get_reg(i_regs->regmap,HIREG|64); - signed char hil=get_reg(i_regs->regmap,HIREG); - if(hih>=0) emit_loadreg(HIREG|64,hih); - if(hil>=0) emit_loadreg(HIREG,hil); - signed char loh=get_reg(i_regs->regmap,LOREG|64); - signed char lol=get_reg(i_regs->regmap,LOREG); - if(loh>=0) emit_loadreg(LOREG|64,loh); - if(lol>=0) emit_loadreg(LOREG,lol); - } - if(opcode2[i]==0x1D) // DMULTU - { - signed char m1h=get_reg(i_regs->regmap,rs1[i]|64); - signed char m1l=get_reg(i_regs->regmap,rs1[i]); - signed char m2h=get_reg(i_regs->regmap,rs2[i]|64); - signed char m2l=get_reg(i_regs->regmap,rs2[i]); - assert(m1h>=0); - assert(m2h>=0); - assert(m1l>=0); - assert(m2l>=0); - save_regs(CALLER_SAVE_REGS); - if(m1l!=0) emit_mov(m1l,0); - if(m1h==0) emit_readword((int)&dynarec_local,1); - else if(m1h>1) emit_mov(m1h,1); - if(m2l<2) emit_readword((int)&dynarec_local+m2l*4,2); - else if(m2l>2) emit_mov(m2l,2); - if(m2h<3) emit_readword((int)&dynarec_local+m2h*4,3); - else if(m2h>3) emit_mov(m2h,3); - emit_call((int)&multu64); - restore_regs(CALLER_SAVE_REGS); - signed char hih=get_reg(i_regs->regmap,HIREG|64); - signed char hil=get_reg(i_regs->regmap,HIREG); - signed char loh=get_reg(i_regs->regmap,LOREG|64); - signed char lol=get_reg(i_regs->regmap,LOREG); - /*signed char temp=get_reg(i_regs->regmap,-1); - signed char rh=get_reg(i_regs->regmap,HIREG|64); - signed char rl=get_reg(i_regs->regmap,HIREG); - assert(m1h>=0); - assert(m2h>=0); - assert(m1l>=0); - assert(m2l>=0); - assert(temp>=0); - //emit_mov(m1l,EAX); - //emit_mul(m2l); - emit_umull(rl,rh,m1l,m2l); - emit_storereg(LOREG,rl); - emit_mov(rh,temp); - //emit_mov(m1h,EAX); - //emit_mul(m2l); - emit_umull(rl,rh,m1h,m2l); - emit_adds(rl,temp,temp); - emit_adcimm(rh,0,rh); - emit_storereg(HIREG,rh); - //emit_mov(m2h,EAX); - //emit_mul(m1l); - emit_umull(rl,rh,m1l,m2h); - emit_adds(rl,temp,temp); - emit_adcimm(rh,0,rh); - emit_storereg(LOREG|64,temp); - emit_mov(rh,temp); - //emit_mov(m2h,EAX); - //emit_mul(m1h); - emit_umull(rl,rh,m1h,m2h); - emit_adds(rl,temp,rl); - emit_loadreg(HIREG,temp); - emit_adcimm(rh,0,rh); - emit_adds(rl,temp,rl); - emit_adcimm(rh,0,rh); - // DEBUG - /* - emit_pushreg(m2h); - emit_pushreg(m2l); - emit_pushreg(m1h); - emit_pushreg(m1l); - emit_call((int)&multu64); - emit_popreg(m1l); - emit_popreg(m1h); - emit_popreg(m2l); - emit_popreg(m2h); - signed char hih=get_reg(i_regs->regmap,HIREG|64); - signed char hil=get_reg(i_regs->regmap,HIREG); - if(hih>=0) emit_loadreg(HIREG|64,hih); // DEBUG - if(hil>=0) emit_loadreg(HIREG,hil); // DEBUG - */ - // Shouldn't be necessary - //char loh=get_reg(i_regs->regmap,LOREG|64); - //char lol=get_reg(i_regs->regmap,LOREG); - //if(loh>=0) emit_loadreg(LOREG|64,loh); - //if(lol>=0) emit_loadreg(LOREG,lol); - } - if(opcode2[i]==0x1E) // DDIV - { - signed char d1h=get_reg(i_regs->regmap,rs1[i]|64); - signed char d1l=get_reg(i_regs->regmap,rs1[i]); - signed char d2h=get_reg(i_regs->regmap,rs2[i]|64); - signed char d2l=get_reg(i_regs->regmap,rs2[i]); - assert(d1h>=0); - assert(d2h>=0); - assert(d1l>=0); - assert(d2l>=0); - save_regs(CALLER_SAVE_REGS); - if(d1l!=0) emit_mov(d1l,0); - if(d1h==0) emit_readword((int)&dynarec_local,1); - else if(d1h>1) emit_mov(d1h,1); - if(d2l<2) emit_readword((int)&dynarec_local+d2l*4,2); - else if(d2l>2) emit_mov(d2l,2); - if(d2h<3) emit_readword((int)&dynarec_local+d2h*4,3); - else if(d2h>3) emit_mov(d2h,3); - emit_call((int)&div64); - restore_regs(CALLER_SAVE_REGS); - signed char hih=get_reg(i_regs->regmap,HIREG|64); - signed char hil=get_reg(i_regs->regmap,HIREG); - signed char loh=get_reg(i_regs->regmap,LOREG|64); - signed char lol=get_reg(i_regs->regmap,LOREG); - if(hih>=0) emit_loadreg(HIREG|64,hih); - if(hil>=0) emit_loadreg(HIREG,hil); - if(loh>=0) emit_loadreg(LOREG|64,loh); - if(lol>=0) emit_loadreg(LOREG,lol); - } - if(opcode2[i]==0x1F) // DDIVU - { - //u_int hr,reglist=0; - //for(hr=0;hr<HOST_REGS;hr++) { - // if(i_regs->regmap[hr]>=0 && (i_regs->regmap[hr]&62)!=HIREG) reglist|=1<<hr; - //} - signed char d1h=get_reg(i_regs->regmap,rs1[i]|64); - signed char d1l=get_reg(i_regs->regmap,rs1[i]); - signed char d2h=get_reg(i_regs->regmap,rs2[i]|64); - signed char d2l=get_reg(i_regs->regmap,rs2[i]); - assert(d1h>=0); - assert(d2h>=0); - assert(d1l>=0); - assert(d2l>=0); - save_regs(CALLER_SAVE_REGS); - if(d1l!=0) emit_mov(d1l,0); - if(d1h==0) emit_readword((int)&dynarec_local,1); - else if(d1h>1) emit_mov(d1h,1); - if(d2l<2) emit_readword((int)&dynarec_local+d2l*4,2); - else if(d2l>2) emit_mov(d2l,2); - if(d2h<3) emit_readword((int)&dynarec_local+d2h*4,3); - else if(d2h>3) emit_mov(d2h,3); - emit_call((int)&divu64); - restore_regs(CALLER_SAVE_REGS); - signed char hih=get_reg(i_regs->regmap,HIREG|64); - signed char hil=get_reg(i_regs->regmap,HIREG); - signed char loh=get_reg(i_regs->regmap,LOREG|64); - signed char lol=get_reg(i_regs->regmap,LOREG); - if(hih>=0) emit_loadreg(HIREG|64,hih); - if(hil>=0) emit_loadreg(HIREG,hil); - if(loh>=0) emit_loadreg(LOREG|64,loh); - if(lol>=0) emit_loadreg(LOREG,lol); - } - } -#else - assert(0); -#endif + assert(0); } else { @@ -5634,32 +4333,6 @@ void do_miniht_insert(u_int return_address,int rt,int temp) { #endif } -// Sign-extend to 64 bits and write out upper half of a register -// This is useful where we have a 32-bit value in a register, and want to -// keep it in a 32-bit register, but can't guarantee that it won't be read -// as a 64-bit value later. -void wb_sx(signed char pre[],signed char entry[],uint64_t dirty,uint64_t is32_pre,uint64_t is32,uint64_t u,uint64_t uu) -{ -#ifndef FORCE32 - if(is32_pre==is32) return; - int hr,reg; - for(hr=0;hr<HOST_REGS;hr++) { - if(hr!=EXCLUDE_REG) { - //if(pre[hr]==entry[hr]) { - if((reg=pre[hr])>=0) { - if((dirty>>hr)&1) { - if( ((is32_pre&~is32&~uu)>>reg)&1 ) { - emit_sarimm(hr,31,HOST_TEMPREG); - emit_storereg(reg|64,HOST_TEMPREG); - } - } - } - //} - } - } -#endif -} - void wb_valid(signed char pre[],signed char entry[],u_int dirty_pre,u_int dirty,uint64_t is32_pre,uint64_t u,uint64_t uu) { //if(dirty_pre==dirty) return; @@ -5777,13 +4450,7 @@ void do_clear_cache() } // CPU-architecture-specific initialization -void arch_init() { -#ifndef DISABLE_COP1 - rounding_modes[0]=0x0<<22; // round - rounding_modes[1]=0x3<<22; // trunc - rounding_modes[2]=0x1<<22; // ceil - rounding_modes[3]=0x2<<22; // floor -#endif +static void arch_init() { } // vim:shiftwidth=2:expandtab diff --git a/libpcsxcore/new_dynarec/assem_arm.h b/libpcsxcore/new_dynarec/assem_arm.h index 2254638..2d10ac7 100644 --- a/libpcsxcore/new_dynarec/assem_arm.h +++ b/libpcsxcore/new_dynarec/assem_arm.h @@ -9,11 +9,6 @@ #define USE_MINI_HT 1 //#define REG_PREFETCH 1 #define HAVE_CONDITIONAL_CALL 1 -#define DISABLE_TLB 1 -//#define MUPEN64 -#define FORCE32 1 -#define DISABLE_COP1 1 -#define PCSX 1 #define RAM_SIZE 0x200000 #ifndef __ARM_ARCH_7A__ @@ -25,11 +20,7 @@ #define BASE_ADDR_FIXED 0 #endif -#ifdef FORCE32 #define REG_SHIFT 2 -#else -#define REG_SHIFT 3 -#endif /* ARM calling convention: r0-r3, r12: caller-save diff --git a/libpcsxcore/new_dynarec/fpu.c b/libpcsxcore/new_dynarec/fpu.c deleted file mode 100644 index a189a53..0000000 --- a/libpcsxcore/new_dynarec/fpu.c +++ /dev/null @@ -1,394 +0,0 @@ -/* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * - * Mupen64plus - fpu.c * - * Copyright (C) 2010 Ari64 * - * * - * This program is free software; you can redistribute it and/or modify * - * it under the terms of the GNU General Public License as published by * - * the Free Software Foundation; either version 2 of the License, or * - * (at your option) any later version. * - * * - * This program is distributed in the hope that it will be useful, * - * but WITHOUT ANY WARRANTY; without even the implied warranty of * - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * - * GNU General Public License for more details. * - * * - * You should have received a copy of the GNU General Public License * - * along with this program; if not, write to the * - * Free Software Foundation, Inc., * - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. * - * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */ - -#include <math.h> - -extern int FCR0, FCR31; - -void cvt_s_w(int *source,float *dest) -{ - *dest = *source; -} -void cvt_d_w(int *source,double *dest) -{ - *dest = *source; -} -void cvt_s_l(long long *source,float *dest) -{ - *dest = *source; -} -void cvt_d_l(long long *source,double *dest) -{ - *dest = *source; -} -void cvt_d_s(float *source,double *dest) -{ - *dest = *source; -} -void cvt_s_d(double *source,float *dest) -{ - *dest = *source; -} - -void round_l_s(float *source,long long *dest) -{ - *dest = roundf(*source); -} -void round_w_s(float *source,int *dest) -{ - *dest = roundf(*source); -} -void trunc_l_s(float *source,long long *dest) -{ - *dest = truncf(*source); -} -void trunc_w_s(float *source,int *dest) -{ - *dest = truncf(*source); -} -void ceil_l_s(float *source,long long *dest) -{ - *dest = ceilf(*source); -} -void ceil_w_s(float *source,int *dest) -{ - *dest = ceilf(*source); -} -void floor_l_s(float *source,long long *dest) -{ - *dest = floorf(*source); -} -void floor_w_s(float *source,int *dest) -{ - *dest = floorf(*source); -} - -void round_l_d(double *source,long long *dest) -{ - *dest = round(*source); -} -void round_w_d(double *source,int *dest) -{ - *dest = round(*source); -} -void trunc_l_d(double *source,long long *dest) -{ - *dest = trunc(*source); -} -void trunc_w_d(double *source,int *dest) -{ - *dest = trunc(*source); -} -void ceil_l_d(double *source,long long *dest) -{ - *dest = ceil(*source); -} -void ceil_w_d(double *source,int *dest) -{ - *dest = ceil(*source); -} -void floor_l_d(double *source,long long *dest) -{ - *dest = floor(*source); -} -void floor_w_d(double *source,int *dest) -{ - *dest = floor(*source); -} - -void cvt_w_s(float *source,int *dest) -{ - switch(FCR31&3) - { - case 0: round_w_s(source,dest);return; - case 1: trunc_w_s(source,dest);return; - case 2: ceil_w_s(source,dest);return; - case 3: floor_w_s(source,dest);return; - } -} -void cvt_w_d(double *source,int *dest) -{ - switch(FCR31&3) - { - case 0: round_w_d(source,dest);return; - case 1: trunc_w_d(source,dest);return; - case 2: ceil_w_d(source,dest);return; - case 3: floor_w_d(source,dest);return; - } -} -void cvt_l_s(float *source,long long *dest) -{ - switch(FCR31&3) - { - case 0: round_l_s(source,dest);return; - case 1: trunc_l_s(source,dest);return; - case 2: ceil_l_s(source,dest);return; - case 3: floor_l_s(source,dest);return; - } -} -void cvt_l_d(double *source,long long *dest) -{ - switch(FCR31&3) - { - case 0: round_l_d(source,dest);return; - case 1: trunc_l_d(source,dest);return; - case 2: ceil_l_d(source,dest);return; - case 3: floor_l_d(source,dest);return; - } -} - -void c_f_s() -{ - FCR31 &= ~0x800000; -} -void c_un_s(float *source,float *target) -{ - FCR31=(isnan(*source) || isnan(*target)) ? FCR31|0x800000 : FCR31&~0x800000; -} - -void c_eq_s(float *source,float *target) -{ - if (isnan(*source) || isnan(*target)) {FCR31&=~0x800000;return;} - FCR31 = *source==*target ? FCR31|0x800000 : FCR31&~0x800000; -} -void c_ueq_s(float *source,float *target) -{ - if (isnan(*source) || isnan(*target)) {FCR31|=0x800000;return;} - FCR31 = *source==*target ? FCR31|0x800000 : FCR31&~0x800000; -} - -void c_olt_s(float *source,float *target) -{ - if (isnan(*source) || isnan(*target)) {FCR31&=~0x800000;return;} - FCR31 = *source<*target ? FCR31|0x800000 : FCR31&~0x800000; -} -void c_ult_s(float *source,float *target) -{ - if (isnan(*source) || isnan(*target)) {FCR31|=0x800000;return;} - FCR31 = *source<*target ? FCR31|0x800000 : FCR31&~0x800000; -} - -void c_ole_s(float *source,float *target) -{ - if (isnan(*source) || isnan(*target)) {FCR31&=~0x800000;return;} - FCR31 = *source<=*target ? FCR31|0x800000 : FCR31&~0x800000; -} -void c_ule_s(float *source,float *target) -{ - if (isnan(*source) || isnan(*target)) {FCR31|=0x800000;return;} - FCR31 = *source<=*target ? FCR31|0x800000 : FCR31&~0x800000; -} - -void c_sf_s(float *source,float *target) -{ - //if (isnan(*source) || isnan(*target)) // FIXME - exception - FCR31&=~0x800000; -} -void c_ngle_s(float *source,float *target) -{ - //if (isnan(*source) || isnan(*target)) // FIXME - exception - FCR31&=~0x800000; -} - -void c_seq_s(float *source,float *target) -{ - //if (isnan(*source) || isnan(*target)) // FIXME - exception - FCR31 = *source==*target ? FCR31|0x800000 : FCR31&~0x800000; -} -void c_ngl_s(float *source,float *target) -{ - //if (isnan(*source) || isnan(*target)) // FIXME - exception - FCR31 = *source==*target ? FCR31|0x800000 : FCR31&~0x800000; -} - -void c_lt_s(float *source,float *target) -{ - //if (isnan(*source) || isnan(*target)) // FIXME - exception - FCR31 = *source<*target ? FCR31|0x800000 : FCR31&~0x800000; -} -void c_nge_s(float *source,float *target) -{ - //if (isnan(*source) || isnan(*target)) // FIXME - exception - FCR31 = *source<*target ? FCR31|0x800000 : FCR31&~0x800000; -} - -void c_le_s(float *source,float *target) -{ - //if (isnan(*source) || isnan(*target)) // FIXME - exception - FCR31 = *source<=*target ? FCR31|0x800000 : FCR31&~0x800000; -} -void c_ngt_s(float *source,float *target) -{ - //if (isnan(*source) || isnan(*target)) // FIXME - exception - FCR31 = *source<=*target ? FCR31|0x800000 : FCR31&~0x800000; -} - -void c_f_d() -{ - FCR31 &= ~0x800000; -} -void c_un_d(double *source,double *target) -{ - FCR31=(isnan(*source) || isnan(*target)) ? FCR31|0x800000 : FCR31&~0x800000; -} - -void c_eq_d(double *source,double *target) -{ - if (isnan(*source) || isnan(*target)) {FCR31&=~0x800000;return;} - FCR31 = *source==*target ? FCR31|0x800000 : FCR31&~0x800000; -} -void c_ueq_d(double *source,double *target) -{ - if (isnan(*source) || isnan(*target)) {FCR31|=0x800000;return;} - FCR31 = *source==*target ? FCR31|0x800000 : FCR31&~0x800000; -} - -void c_olt_d(double *source,double *target) -{ - if (isnan(*source) || isnan(*target)) {FCR31&=~0x800000;return;} - FCR31 = *source<*target ? FCR31|0x800000 : FCR31&~0x800000; -} -void c_ult_d(double *source,double *target) -{ - if (isnan(*source) || isnan(*target)) {FCR31|=0x800000;return;} - FCR31 = *source<*target ? FCR31|0x800000 : FCR31&~0x800000; -} - -void c_ole_d(double *source,double *target) -{ - if (isnan(*source) || isnan(*target)) {FCR31&=~0x800000;return;} - FCR31 = *source<=*target ? FCR31|0x800000 : FCR31&~0x800000; -} -void c_ule_d(double *source,double *target) -{ - if (isnan(*source) || isnan(*target)) {FCR31|=0x800000;return;} - FCR31 = *source<=*target ? FCR31|0x800000 : FCR31&~0x800000; -} - -void c_sf_d(double *source,double *target) -{ - //if (isnan(*source) || isnan(*target)) // FIXME - exception - FCR31&=~0x800000; -} -void c_ngle_d(double *source,double *target) -{ - //if (isnan(*source) || isnan(*target)) // FIXME - exception - FCR31&=~0x800000; -} - -void c_seq_d(double *source,double *target) -{ - //if (isnan(*source) || isnan(*target)) // FIXME - exception - FCR31 = *source==*target ? FCR31|0x800000 : FCR31&~0x800000; -} -void c_ngl_d(double *source,double *target) -{ - //if (isnan(*source) || isnan(*target)) // FIXME - exception - FCR31 = *source==*target ? FCR31|0x800000 : FCR31&~0x800000; -} - -void c_lt_d(double *source,double *target) -{ - //if (isnan(*source) || isnan(*target)) // FIXME - exception - FCR31 = *source<*target ? FCR31|0x800000 : FCR31&~0x800000; -} -void c_nge_d(double *source,double *target) -{ - //if (isnan(*source) || isnan(*target)) // FIXME - exception - FCR31 = *source<*target ? FCR31|0x800000 : FCR31&~0x800000; -} - -void c_le_d(double *source,double *target) -{ - //if (isnan(*source) || isnan(*target)) // FIXME - exception - FCR31 = *source<=*target ? FCR31|0x800000 : FCR31&~0x800000; -} -void c_ngt_d(double *source,double *target) -{ - //if (isnan(*source) || isnan(*target)) // FIXME - exception - FCR31 = *source<=*target ? FCR31|0x800000 : FCR31&~0x800000; -} - - -void add_s(float *source1,float *source2,float *target) -{ - *target=(*source1)+(*source2); -} -void sub_s(float *source1,float *source2,float *target) -{ - *target=(*source1)-(*source2); -} -void mul_s(float *source1,float *source2,float *target) -{ - *target=(*source1)*(*source2); -} -void div_s(float *source1,float *source2,float *target) -{ - *target=(*source1)/(*source2); -} -void sqrt_s(float *source,float *target) -{ - *target=sqrtf(*source); -} -void abs_s(float *source,float *target) -{ - *target=fabsf(*source); -} -void mov_s(float *source,float *target) -{ - *target=*source; -} -void neg_s(float *source,float *target) -{ - *target=-(*source); -} -void add_d(double *source1,double *source2,double *target) -{ - *target=(*source1)+(*source2); -} -void sub_d(double *source1,double *source2,double *target) -{ - *target=(*source1)-(*source2); -} -void mul_d(double *source1,double *source2,double *target) -{ - *target=(*source1)*(*source2); -} -void div_d(double *source1,double *source2,double *target) -{ - *target=(*source1)/(*source2); -} -void sqrt_d(double *source,double *target) -{ - *target=sqrt(*source); -} -void abs_d(double *source,double *target) -{ - *target=fabs(*source); -} -void mov_d(double *source,double *target) -{ - *target=*source; -} -void neg_d(double *source,double *target) -{ - *target=-(*source); -} - diff --git a/libpcsxcore/new_dynarec/fpu.h b/libpcsxcore/new_dynarec/fpu.h deleted file mode 100644 index 881ddbe..0000000 --- a/libpcsxcore/new_dynarec/fpu.h +++ /dev/null @@ -1,74 +0,0 @@ -void cvt_s_w(int *source,float *dest); -void cvt_d_w(int *source,double *dest); -void cvt_s_l(long long *source,float *dest); -void cvt_d_l(long long *source,double *dest); -void cvt_w_s(float *source,int *dest); -void cvt_w_d(double *source,int *dest); -void cvt_l_s(float *source,long long *dest); -void cvt_l_d(double *source,long long *dest); -void cvt_d_s(float *source,double *dest); -void cvt_s_d(double *source,float *dest); -void round_l_s(float *source,long long *dest); -void round_w_s(float *source,int *dest); -void trunc_l_s(float *source,long long *dest); -void trunc_w_s(float *source,int *dest); -void ceil_l_s(float *source,long long *dest); -void ceil_w_s(float *source,int *dest); -void floor_l_s(float *source,long long *dest); -void floor_w_s(float *source,int *dest); -void round_l_d(double *source,long long *dest); -void round_w_d(double *source,int *dest); -void trunc_l_d(double *source,long long *dest); -void trunc_w_d(double *source,int *dest); -void ceil_l_d(double *source,long long *dest); -void ceil_w_d(double *source,int *dest); -void floor_l_d(double *source,long long *dest); -void floor_w_d(double *source,int *dest); -void c_f_s(); -void c_un_s(float *source,float *target); -void c_eq_s(float *source,float *target); -void c_ueq_s(float *source,float *target); -void c_olt_s(float *source,float *target); -void c_ult_s(float *source,float *target); -void c_ole_s(float *source,float *target); -void c_ule_s(float *source,float *target); -void c_sf_s(float *source,float *target); -void c_ngle_s(float *source,float *target); -void c_seq_s(float *source,float *target); -void c_ngl_s(float *source,float *target); -void c_lt_s(float *source,float *target); -void c_nge_s(float *source,float *target); -void c_le_s(float *source,float *target); -void c_ngt_s(float *source,float *target); -void c_f_d(); -void c_un_d(double *source,double *target); -void c_eq_d(double *source,double *target); -void c_ueq_d(double *source,double *target); -void c_olt_d(double *source,double *target); -void c_ult_d(double *source,double *target); -void c_ole_d(double *source,double *target); -void c_ule_d(double *source,double *target); -void c_sf_d(double *source,double *target); -void c_ngle_d(double *source,double *target); -void c_seq_d(double *source,double *target); -void c_ngl_d(double *source,double *target); -void c_lt_d(double *source,double *target); -void c_nge_d(double *source,double *target); -void c_le_d(double *source,double *target); -void c_ngt_d(double *source,double *target); -void add_s(float *source1,float *source2,float *target); -void sub_s(float *source1,float *source2,float *target); -void mul_s(float *source1,float *source2,float *target); -void div_s(float *source1,float *source2,float *target); -void sqrt_s(float *source,float *target); -void abs_s(float *source,float *target); -void mov_s(float *source,float *target); -void neg_s(float *source,float *target); -void add_d(double *source1,double *source2,double *target); -void sub_d(double *source1,double *source2,double *target); -void mul_d(double *source1,double *source2,double *target); -void div_d(double *source1,double *source2,double *target); -void sqrt_d(double *source,double *target); -void abs_d(double *source,double *target); -void mov_d(double *source,double *target); -void neg_d(double *source,double *target); diff --git a/libpcsxcore/new_dynarec/new_dynarec.c b/libpcsxcore/new_dynarec/new_dynarec.c index 5120df0..f1034e6 100644 --- a/libpcsxcore/new_dynarec/new_dynarec.c +++ b/libpcsxcore/new_dynarec/new_dynarec.c @@ -147,11 +147,7 @@ struct ll_entry char shadow[1048576] __attribute__((aligned(16))); void *copy; int expirep; -#ifndef PCSX - u_int using_tlb; -#else static const u_int using_tlb=0; -#endif int new_dynarec_did_compile; int new_dynarec_hacks; u_int stop_after_jal; @@ -303,87 +299,21 @@ static int CLOCK_ADJUST(int x) return (x * cycle_multiplier + s * 50) / 100; } -static void tlb_hacks() -{ -#ifndef DISABLE_TLB - // Goldeneye hack - if (strncmp((char *) ROM_HEADER->nom, "GOLDENEYE",9) == 0) - { - u_int addr; - int n; - switch (ROM_HEADER->Country_code&0xFF) - { - case 0x45: // U - addr=0x34b30; - break; - case 0x4A: // J - addr=0x34b70; - break; - case 0x50: // E - addr=0x329f0; - break; - default: - // Unknown country code - addr=0; - break; - } - u_int rom_addr=(u_int)rom; - #ifdef ROM_COPY - // Since memory_map is 32-bit, on 64-bit systems the rom needs to be - // in the lower 4G of memory to use this hack. Copy it if necessary. - if((void *)rom>(void *)0xffffffff) { - munmap(ROM_COPY, 67108864); - if(mmap(ROM_COPY, 12582912, - PROT_READ | PROT_WRITE, - MAP_FIXED | MAP_PRIVATE | MAP_ANONYMOUS, - -1, 0) <= 0) {printf("mmap() failed\n");} - memcpy(ROM_COPY,rom,12582912); - rom_addr=(u_int)ROM_COPY; - } - #endif - if(addr) { - for(n=0x7F000;n<0x80000;n++) { - memory_map[n]=(((u_int)(rom_addr+addr-0x7F000000))>>2)|0x40000000; - } - } - } -#endif -} - static u_int get_page(u_int vaddr) { -#ifndef PCSX - u_int page=(vaddr^0x80000000)>>12; -#else u_int page=vaddr&~0xe0000000; if (page < 0x1000000) page &= ~0x0e00000; // RAM mirrors page>>=12; -#endif -#ifndef DISABLE_TLB - if(page>262143&&tlb_LUT_r[vaddr>>12]) page=(tlb_LUT_r[vaddr>>12]^0x80000000)>>12; -#endif if(page>2048) page=2048+(page&2047); return page; } -#ifndef PCSX -static u_int get_vpage(u_int vaddr) -{ - u_int vpage=(vaddr^0x80000000)>>12; -#ifndef DISABLE_TLB - if(vpage>262143&&tlb_LUT_r[vaddr>>12]) vpage&=2047; // jump_dirty uses a hash of the virtual address instead -#endif - if(vpage>2048) vpage=2048+(vpage&2047); - return vpage; -} -#else // no virtual mem in PCSX static u_int get_vpage(u_int vaddr) { return get_page(vaddr); } -#endif // Get address from virtual address // This is called from the recompiled JR/JALR instructions @@ -416,16 +346,7 @@ void *get_addr(u_int vaddr) //printf("restore candidate: %x (%d) d=%d\n",vaddr,page,invalid_code[vaddr>>12]); invalid_code[vaddr>>12]=0; inv_code_start=inv_code_end=~0; -#ifndef DISABLE_TLB - memory_map[vaddr>>12]|=0x40000000; -#endif if(vpage<2048) { -#ifndef DISABLE_TLB - if(tlb_LUT_r[vaddr>>12]) { - invalid_code[tlb_LUT_r[vaddr>>12]>>12]=0; - memory_map[tlb_LUT_r[vaddr>>12]>>12]|=0x40000000; - } -#endif restore_candidate[vpage>>3]|=1<<(vpage&7); } else restore_candidate[page>>3]|=1<<(page&7); @@ -802,119 +723,6 @@ void alloc_all(struct regstat *cur,int i) } } -#ifndef FORCE32 -void div64(int64_t dividend,int64_t divisor) -{ - lo=dividend/divisor; - hi=dividend%divisor; - //printf("TRACE: ddiv %8x%8x %8x%8x\n" ,(int)reg[HIREG],(int)(reg[HIREG]>>32) - // ,(int)reg[LOREG],(int)(reg[LOREG]>>32)); -} -void divu64(uint64_t dividend,uint64_t divisor) -{ - lo=dividend/divisor; - hi=dividend%divisor; - //printf("TRACE: ddivu %8x%8x %8x%8x\n",(int)reg[HIREG],(int)(reg[HIREG]>>32) - // ,(int)reg[LOREG],(int)(reg[LOREG]>>32)); -} - -void mult64(uint64_t m1,uint64_t m2) -{ - unsigned long long int op1, op2, op3, op4; - unsigned long long int result1, result2, result3, result4; - unsigned long long int temp1, temp2, temp3, temp4; - int sign = 0; - - if (m1 < 0) - { - op2 = -m1; - sign = 1 - sign; - } - else op2 = m1; - if (m2 < 0) - { - op4 = -m2; - sign = 1 - sign; - } - else op4 = m2; - - op1 = op2 & 0xFFFFFFFF; - op2 = (op2 >> 32) & 0xFFFFFFFF; - op3 = op4 & 0xFFFFFFFF; - op4 = (op4 >> 32) & 0xFFFFFFFF; - - temp1 = op1 * op3; - temp2 = (temp1 >> 32) + op1 * op4; - temp3 = op2 * op3; - temp4 = (temp3 >> 32) + op2 * op4; - - result1 = temp1 & 0xFFFFFFFF; - result2 = temp2 + (temp3 & 0xFFFFFFFF); - result3 = (result2 >> 32) + temp4; - result4 = (result3 >> 32); - - lo = result1 | (result2 << 32); - hi = (result3 & 0xFFFFFFFF) | (result4 << 32); - if (sign) - { - hi = ~hi; - if (!lo) hi++; - else lo = ~lo + 1; - } -} - -void multu64(uint64_t m1,uint64_t m2) -{ - unsigned long long int op1, op2, op3, op4; - unsigned long long int result1, result2, result3, result4; - unsigned long long int temp1, temp2, temp3, temp4; - - op1 = m1 & 0xFFFFFFFF; - op2 = (m1 >> 32) & 0xFFFFFFFF; - op3 = m2 & 0xFFFFFFFF; - op4 = (m2 >> 32) & 0xFFFFFFFF; - - temp1 = op1 * op3; - temp2 = (temp1 >> 32) + op1 * op4; - temp3 = op2 * op3; - temp4 = (temp3 >> 32) + op2 * op4; - - result1 = temp1 & 0xFFFFFFFF; - result2 = temp2 + (temp3 & 0xFFFFFFFF); - result3 = (result2 >> 32) + temp4; - result4 = (result3 >> 32); - - lo = result1 | (result2 << 32); - hi = (result3 & 0xFFFFFFFF) | (result4 << 32); - - //printf("TRACE: dmultu %8x%8x %8x%8x\n",(int)reg[HIREG],(int)(reg[HIREG]>>32) - // ,(int)reg[LOREG],(int)(reg[LOREG]>>32)); -} - -uint64_t ldl_merge(uint64_t original,uint64_t loaded,u_int bits) -{ - if(bits) { - original<<=64-bits; - original>>=64-bits; - loaded<<=bits; - original|=loaded; - } - else original=loaded; - return original; -} -uint64_t ldr_merge(uint64_t original,uint64_t loaded,u_int bits) -{ - if(bits^56) { - original>>=64-(bits^56); - original<<=64-(bits^56); - loaded>>=bits^56; - original|=loaded; - } - else original=loaded; - return original; -} -#endif - #ifdef __i386__ #include "assem_x86.c" #endif @@ -1107,18 +915,6 @@ static void invalidate_block_range(u_int block, u_int first, u_int last) // Don't trap writes invalid_code[block]=1; -#ifndef DISABLE_TLB - // If there is a valid TLB entry for this page, remove write protect - if(tlb_LUT_w[block]) { - assert(tlb_LUT_r[block]==tlb_LUT_w[block]); - // CHECK: Is this right? - memory_map[block]=((tlb_LUT_w[block]&0xFFFFF000)-(block<<12)+(unsigned int)rdram-0x80000000)>>2; - u_int real_block=tlb_LUT_w[block]>>12; - invalid_code[real_block]=1; - if(real_block>=0x80000&&real_block<0x80800) memory_map[real_block]=((u_int)rdram-0x80000000)>>2; - } - else if(block>=0x80000&&block<0x80800) memory_map[block]=((u_int)rdram-0x80000000)>>2; -#endif #ifdef USE_MINI_HT memset(mini_ht,-1,sizeof(mini_ht)); @@ -1147,14 +943,6 @@ void invalidate_block(u_int block) if((((end-1-(u_int)rdram)>>12)&2047)>last) last=((end-1-(u_int)rdram)>>12)&2047; } } -#ifndef DISABLE_TLB - if(page<2048&&(signed int)start>=(signed int)0xC0000000&&(signed int)end>=(signed int)0xC0000000) { - if(((start+memory_map[start>>12]-(u_int)rdram)>>12)<=page&&((end-1+memory_map[(end-1)>>12]-(u_int)rdram)>>12)>=page) { - if((((start+memory_map[start>>12]-(u_int)rdram)>>12)&2047)<first) first=((start+memory_map[start>>12]-(u_int)rdram)>>12)&2047; - if((((end-1+memory_map[(end-1)>>12]-(u_int)rdram)>>12)&2047)>last) last=((end-1+memory_map[(end-1)>>12]-(u_int)rdram)>>12)&2047; - } - } -#endif } head=head->next; } @@ -1163,7 +951,6 @@ void invalidate_block(u_int block) void invalidate_addr(u_int addr) { -#ifdef PCSX //static int rhits; // this check is done by the caller //if (inv_code_start<=addr&&addr<=inv_code_end) { rhits++; return; } @@ -1217,7 +1004,6 @@ void invalidate_addr(u_int addr) return; } } -#endif invalidate_block(addr>>12); } @@ -1239,19 +1025,6 @@ void invalidate_all_pages() #ifdef USE_MINI_HT memset(mini_ht,-1,sizeof(mini_ht)); #endif - #ifndef DISABLE_TLB - // TLB - for(page=0;page<0x100000;page++) { - if(tlb_LUT_r[page]) { - memory_map[page]=((tlb_LUT_r[page]&0xFFFFF000)-(page<<12)+(unsigned int)rdram-0x80000000)>>2; - if(!tlb_LUT_w[page]||!invalid_code[page]) - memory_map[page]|=0x40000000; // Write protect - } - else memory_map[page]=-1; - if(page==0x80000) page=0xC0000; - } - tlb_hacks(); - #endif } // Add an entry to jump_out after making a link @@ -1290,13 +1063,6 @@ void clean_blocks(u_int page) inv|=invalid_code[i]; } } -#ifndef DISABLE_TLB - if((signed int)head->vaddr>=(signed int)0xC0000000) { - u_int addr = (head->vaddr+(memory_map[head->vaddr>>12]<<2)); - //printf("addr=%x start=%x end=%x\n",addr,start,end); - if(addr<start||addr>=end) inv=1; - } -#endif else if((signed int)head->vaddr>=(signed int)0x80000000+RAM_SIZE) { inv=1; } @@ -1304,9 +1070,6 @@ void clean_blocks(u_int page) void * clean_addr=(void *)get_clean_addr((int)head->addr); if((((u_int)clean_addr-(u_int)out)<<(32-TARGET_SIZE_2))>0x60000000+(MAX_OUTPUT_BLOCK_SIZE<<(32-TARGET_SIZE_2))) { u_int ppage=page; -#ifndef DISABLE_TLB - if(page<2048&&tlb_LUT_r[head->vaddr>>12]) ppage=(tlb_LUT_r[head->vaddr>>12]^0x80000000)>>12; -#endif inv_debug("INV: Restored %x (%x/%x)\n",head->vaddr, (int)head->addr, (int)clean_addr); //printf("page=%x, addr=%x\n",page,head->vaddr); //assert(head->vaddr>>12==(page|0x80000)); @@ -2044,12 +1807,6 @@ void wb_register(signed char r,signed char regmap[],uint64_t dirty,uint64_t is32 if((dirty>>hr)&1) { if(regmap[hr]<64) { emit_storereg(r,hr); -#ifndef FORCE32 - if((is32>>regmap[hr])&1) { - emit_sarimm(hr,31,hr); - emit_storereg(r|64,hr); - } -#endif }else{ emit_storereg(r|64,hr); } @@ -2087,12 +1844,6 @@ void rlist() for(i=0;i<32;i++) printf("r%d:%8x%8x ",i,((int *)(reg+i))[1],((int *)(reg+i))[0]); printf("\n"); -#ifndef DISABLE_COP1 - printf("TRACE: "); - for(i=0;i<32;i++) - printf("f%d:%8x%8x ",i,((int*)reg_cop1_simple[i])[1],*((int*)reg_cop1_simple[i])); - printf("\n"); -#endif } void enabletrace() @@ -2818,7 +2569,6 @@ void load_assemble(int i,struct regstat *i_regs) //printf("load_assemble: c=%d\n",c); //if(c) printf("load_assemble: const=%x\n",(int)constmap[i][s]+offset); // FIXME: Even if the load is a NOP, we should check for pagefaults... -#ifdef PCSX if(tl<0&&(!c||(((u_int)constmap[i][s]+offset)>>16)==0x1f80) ||rt1[i]==0) { // could be FIFO, must perform the read @@ -2827,7 +2577,6 @@ void load_assemble(int i,struct regstat *i_regs) tl=get_reg(i_regs->regmap,-1); assert(tl>=0); } -#endif if(offset||s<0||c) addr=tl; else addr=s; //if(tl<0) tl=get_reg(i_regs->regmap,-1); @@ -3138,32 +2887,7 @@ void store_assemble(int i,struct regstat *i_regs) else addr=s; if(!using_tlb) { if(!c) { - #ifndef PCSX - #ifdef R29_HACK - // Strmnnrmn's speed hack - if(rs1[i]!=29||start<0x80001000||start>=0x80000000+RAM_SIZE) - #endif - emit_cmpimm(addr,RAM_SIZE); - #ifdef DESTRUCTIVE_SHIFT - if(s==addr) emit_mov(s,temp); - #endif - #ifdef R29_HACK - memtarget=1; - if(rs1[i]!=29||start<0x80001000||start>=0x80000000+RAM_SIZE) - #endif - { - jaddr=(int)out; - #ifdef CORTEX_A8_BRANCH_PREDICTION_HACK - // Hint to branch predictor that the branch is unlikely to be taken - if(rs1[i]>=28) - emit_jno_unlikely(0); - else - #endif - emit_jno(0); - } - #else - jaddr=emit_fastpath_cmp_jump(i,addr,&faststore_reg_override); - #endif + jaddr=emit_fastpath_cmp_jump(i,addr,&faststore_reg_override); } else if(ram_offset&&memtarget) { emit_addimm(addr,ram_offset,HOST_TEMPREG); @@ -3245,14 +2969,12 @@ void store_assemble(int i,struct regstat *i_regs) } type=STORED_STUB; } -#ifdef PCSX if(jaddr) { // PCSX store handlers don't check invcode again reglist|=1<<addr; add_stub(type,jaddr,(int)out,i,addr,(int)i_regs,ccadj[i],reglist); jaddr=0; } -#endif if(!using_tlb&&!(i_regs->waswritten&(1<<rs1[i]))&&!(new_dynarec_hacks&NDHACK_NO_SMC_CHECK)) { if(!c||memtarget) { #ifdef DESTRUCTIVE_SHIFT @@ -3581,189 +3303,7 @@ void storelr_assemble(int i,struct regstat *i_regs) void c1ls_assemble(int i,struct regstat *i_regs) { -#ifndef DISABLE_COP1 - int s,th,tl; - int temp,ar; - int map=-1; - int offset; - int c=0; - int jaddr,jaddr2=0,jaddr3,type; - int agr=AGEN1+(i&1); - u_int hr,reglist=0; - th=get_reg(i_regs->regmap,FTEMP|64); - tl=get_reg(i_regs->regmap,FTEMP); - s=get_reg(i_regs->regmap,rs1[i]); - temp=get_reg(i_regs->regmap,agr); - if(temp<0) temp=get_reg(i_regs->regmap,-1); - offset=imm[i]; - assert(tl>=0); - assert(rs1[i]>0); - assert(temp>=0); - for(hr=0;hr<HOST_REGS;hr++) { - if(i_regs->regmap[hr]>=0) reglist|=1<<hr; - } - if(i_regs->regmap[HOST_CCREG]==CCREG) reglist&=~(1<<HOST_CCREG); - if (opcode[i]==0x31||opcode[i]==0x35) // LWC1/LDC1 - { - // Loads use a temporary register which we need to save - reglist|=1<<temp; - } - if (opcode[i]==0x39||opcode[i]==0x3D) // SWC1/SDC1 - ar=temp; - else // LWC1/LDC1 - ar=tl; - //if(s<0) emit_loadreg(rs1[i],ar); //address_generation does this now - //else c=(i_regs->wasconst>>s)&1; - if(s>=0) c=(i_regs->wasconst>>s)&1; - // Check cop1 unusable - if(!cop1_usable) { - signed char rs=get_reg(i_regs->regmap,CSREG); - assert(rs>=0); - emit_testimm(rs,0x20000000); - jaddr=(int)out; - emit_jeq(0); - add_stub(FP_STUB,jaddr,(int)out,i,rs,(int)i_regs,is_delayslot,0); - cop1_usable=1; - } - if (opcode[i]==0x39) { // SWC1 (get float address) - emit_readword((int)®_cop1_simple[(source[i]>>16)&0x1f],tl); - } - if (opcode[i]==0x3D) { // SDC1 (get double address) - emit_readword((int)®_cop1_double[(source[i]>>16)&0x1f],tl); - } - // Generate address + offset - if(!using_tlb) { - if(!c) - emit_cmpimm(offset||c||s<0?ar:s,RAM_SIZE); - } - else - { - map=get_reg(i_regs->regmap,TLREG); - assert(map>=0); - reglist&=~(1<<map); - if (opcode[i]==0x31||opcode[i]==0x35) { // LWC1/LDC1 - map=do_tlb_r(offset||c||s<0?ar:s,ar,map,0,-1,-1,c,constmap[i][s]+offset); - } - if (opcode[i]==0x39||opcode[i]==0x3D) { // SWC1/SDC1 - map=do_tlb_w(offset||c||s<0?ar:s,ar,map,0,c,constmap[i][s]+offset); - } - } - if (opcode[i]==0x39) { // SWC1 (read float) - emit_readword_indexed(0,tl,tl); - } - if (opcode[i]==0x3D) { // SDC1 (read double) - emit_readword_indexed(4,tl,th); - emit_readword_indexed(0,tl,tl); - } - if (opcode[i]==0x31) { // LWC1 (get target address) - emit_readword((int)®_cop1_simple[(source[i]>>16)&0x1f],temp); - } - if (opcode[i]==0x35) { // LDC1 (get target address) - emit_readword((int)®_cop1_double[(source[i]>>16)&0x1f],temp); - } - if(!using_tlb) { - if(!c) { - jaddr2=(int)out; - emit_jno(0); - } - else if(((signed int)(constmap[i][s]+offset))>=(signed int)0x80000000+RAM_SIZE) { - jaddr2=(int)out; - emit_jmp(0); // inline_readstub/inline_writestub? Very rare case - } - #ifdef DESTRUCTIVE_SHIFT - if (opcode[i]==0x39||opcode[i]==0x3D) { // SWC1/SDC1 - if(!offset&&!c&&s>=0) emit_mov(s,ar); - } - #endif - }else{ - if (opcode[i]==0x31||opcode[i]==0x35) { // LWC1/LDC1 - do_tlb_r_branch(map,c,constmap[i][s]+offset,&jaddr2); - } - if (opcode[i]==0x39||opcode[i]==0x3D) { // SWC1/SDC1 - do_tlb_w_branch(map,c,constmap[i][s]+offset,&jaddr2); - } - } - if (opcode[i]==0x31) { // LWC1 - //if(s>=0&&!c&&!offset) emit_mov(s,tl); - //gen_tlb_addr_r(ar,map); - //emit_readword_indexed((int)rdram-0x80000000,tl,tl); - #ifdef HOST_IMM_ADDR32 - if(c) emit_readword_tlb(constmap[i][s]+offset,map,tl); - else - #endif - emit_readword_indexed_tlb(0,offset||c||s<0?tl:s,map,tl); - type=LOADW_STUB; - } - if (opcode[i]==0x35) { // LDC1 - assert(th>=0); - //if(s>=0&&!c&&!offset) emit_mov(s,tl); - //gen_tlb_addr_r(ar,map); - //emit_readword_indexed((int)rdram-0x80000000,tl,th); - //emit_readword_indexed((int)rdram-0x7FFFFFFC,tl,tl); - #ifdef HOST_IMM_ADDR32 - if(c) emit_readdword_tlb(constmap[i][s]+offset,map,th,tl); - else - #endif - emit_readdword_indexed_tlb(0,offset||c||s<0?tl:s,map,th,tl); - type=LOADD_STUB; - } - if (opcode[i]==0x39) { // SWC1 - //emit_writeword_indexed(tl,(int)rdram-0x80000000,temp); - emit_writeword_indexed_tlb(tl,0,offset||c||s<0?temp:s,map,temp); - type=STOREW_STUB; - } - if (opcode[i]==0x3D) { // SDC1 - assert(th>=0); - //emit_writeword_indexed(th,(int)rdram-0x80000000,temp); - //emit_writeword_indexed(tl,(int)rdram-0x7FFFFFFC,temp); - emit_writedword_indexed_tlb(th,tl,0,offset||c||s<0?temp:s,map,temp); - type=STORED_STUB; - } - if(!using_tlb&&!(i_regs->waswritten&(1<<rs1[i]))&&!(new_dynarec_hacks&NDHACK_NO_SMC_CHECK)) { - if (opcode[i]==0x39||opcode[i]==0x3D) { // SWC1/SDC1 - #ifndef DESTRUCTIVE_SHIFT - temp=offset||c||s<0?ar:s; - #endif - #if defined(HOST_IMM8) - int ir=get_reg(i_regs->regmap,INVCP); - assert(ir>=0); - emit_cmpmem_indexedsr12_reg(ir,temp,1); - #else - emit_cmpmem_indexedsr12_imm((int)invalid_code,temp,1); - #endif - #if defined(HAVE_CONDITIONAL_CALL) && !defined(DESTRUCTIVE_SHIFT) - emit_callne(invalidate_addr_reg[temp]); - #else - jaddr3=(int)out; - emit_jne(0); - add_stub(INVCODE_STUB,jaddr3,(int)out,reglist|(1<<HOST_CCREG),temp,0,0,0); - #endif - } - } - if(jaddr2) add_stub(type,jaddr2,(int)out,i,offset||c||s<0?ar:s,(int)i_regs,ccadj[i],reglist); - if (opcode[i]==0x31) { // LWC1 (write float) - emit_writeword_indexed(tl,0,temp); - } - if (opcode[i]==0x35) { // LDC1 (write double) - emit_writeword_indexed(th,4,temp); - emit_writeword_indexed(tl,0,temp); - } - //if(opcode[i]==0x39) - /*if(opcode[i]==0x39||opcode[i]==0x31) - { - emit_pusha(); - emit_readword((int)&last_count,ECX); - if(get_reg(i_regs->regmap,CCREG)<0) - emit_loadreg(CCREG,HOST_CCREG); - emit_add(HOST_CCREG,ECX,HOST_CCREG); - emit_addimm(HOST_CCREG,2*ccadj[i],HOST_CCREG); - emit_writeword(HOST_CCREG,(int)&Count); - emit_call((int)memdebug); - emit_popa(); - }/**/ -#else cop1_unusable(i, i_regs); -#endif } void c2ls_assemble(int i,struct regstat *i_regs) @@ -4004,7 +3544,7 @@ int internal_branch(uint64_t i_is32,int addr) if(addr&1) return 0; // Indirect (register) jump if(addr>=start && addr<start+slen*4-4) { - int t=(addr-start)>>2; + //int t=(addr-start)>>2; // Delay slots are not valid branch targets //if(t>0&&(itype[t-1]==RJUMP||itype[t-1]==UJUMP||itype[t-1]==CJUMP||itype[t-1]==SJUMP||itype[t-1]==FJUMP)) return 0; // 64 -> 32 bit transition requires a recompile @@ -4014,11 +3554,7 @@ int internal_branch(uint64_t i_is32,int addr) else printf("optimizable: yes\n"); }*/ //if(is32[t]&~unneeded_reg_upper[t]&~i_is32) return 0; -#ifndef FORCE32 - if(requires_32bit[t]&~i_is32) return 0; - else -#endif - return 1; + return 1; } return 0; } @@ -4203,22 +3739,6 @@ void address_generation(int i,struct regstat *i_regs,signed char entry[]) // printf("poor load scheduling!\n"); } else if(c) { -#ifndef DISABLE_TLB - if(rm>=0) { - if(!entry||entry[rm]!=mgr) { - if(itype[i]==STORE||itype[i]==STORELR||(opcode[i]&0x3b)==0x39||(opcode[i]&0x3b)==0x3a) { - // Stores to memory go thru the mapper to detect self-modifying - // code, loads don't. - if((unsigned int)(constmap[i][rs]+offset)>=0xC0000000 || - (unsigned int)(constmap[i][rs]+offset)<0x80000000+RAM_SIZE ) - generate_map_const(constmap[i][rs]+offset,rm); - }else{ - if((signed int)(constmap[i][rs]+offset)>=(signed int)0xC0000000) - generate_map_const(constmap[i][rs]+offset,rm); - } - } - } -#endif if(rs1[i]!=rt1[i]||itype[i]!=LOAD) { if(!entry||entry[ra]!=agr) { if (opcode[i]==0x22||opcode[i]==0x26) { @@ -4248,32 +3768,6 @@ void address_generation(int i,struct regstat *i_regs,signed char entry[]) // Preload constants for next instruction if(itype[i+1]==LOAD||itype[i+1]==LOADLR||itype[i+1]==STORE||itype[i+1]==STORELR||itype[i+1]==C1LS||itype[i+1]==C2LS) { int agr,ra; - #if !defined(HOST_IMM_ADDR32) && !defined(DISABLE_TLB) - // Mapper entry - agr=MGEN1+((i+1)&1); - ra=get_reg(i_regs->regmap,agr); - if(ra>=0) { - int rs=get_reg(regs[i+1].regmap,rs1[i+1]); - int offset=imm[i+1]; - int c=(regs[i+1].wasconst>>rs)&1; - if(c) { - if(itype[i+1]==STORE||itype[i+1]==STORELR - ||(opcode[i+1]&0x3b)==0x39||(opcode[i+1]&0x3b)==0x3a) { // SWC1/SDC1, SWC2/SDC2 - // Stores to memory go thru the mapper to detect self-modifying - // code, loads don't. - if((unsigned int)(constmap[i+1][rs]+offset)>=0xC0000000 || - (unsigned int)(constmap[i+1][rs]+offset)<0x80000000+RAM_SIZE ) - generate_map_const(constmap[i+1][rs]+offset,ra); - }else{ - if((signed int)(constmap[i+1][rs]+offset)>=(signed int)0xC0000000) - generate_map_const(constmap[i+1][rs]+offset,ra); - } - } - /*else if(rs1[i]==0) { - generate_map_const(offset,ra); - }*/ - } - #endif // Actual address agr=AGEN1+((i+1)&1); ra=get_reg(i_regs->regmap,agr); @@ -4490,17 +3984,6 @@ void wb_dirtys(signed char i_regmap[],uint64_t i_is32,uint64_t i_dirty) if((i_dirty>>hr)&1) { if(i_regmap[hr]<64) { emit_storereg(i_regmap[hr],hr); -#ifndef FORCE32 - if( ((i_is32>>i_regmap[hr])&1) ) { - #ifdef DESTRUCTIVE_WRITEBACK - emit_sarimm(hr,31,hr); - emit_storereg(i_regmap[hr]|64,hr); - #else - emit_sarimm(hr,31,HOST_TEMPREG); - emit_storereg(i_regmap[hr]|64,HOST_TEMPREG); - #endif - } -#endif }else{ if( !((i_is32>>(i_regmap[hr]&63))&1) ) { emit_storereg(i_regmap[hr],hr); @@ -4526,17 +4009,6 @@ void wb_needed_dirtys(signed char i_regmap[],uint64_t i_is32,uint64_t i_dirty,in if((i_dirty>>hr)&1) { if(i_regmap[hr]<64) { emit_storereg(i_regmap[hr],hr); -#ifndef FORCE32 - if( ((i_is32>>i_regmap[hr])&1) ) { - #ifdef DESTRUCTIVE_WRITEBACK - emit_sarimm(hr,31,hr); - emit_storereg(i_regmap[hr]|64,hr); - #else - emit_sarimm(hr,31,HOST_TEMPREG); - emit_storereg(i_regmap[hr]|64,HOST_TEMPREG); - #endif - } -#endif }else{ if( !((i_is32>>(i_regmap[hr]&63))&1) ) { emit_storereg(i_regmap[hr],hr); @@ -4792,9 +4264,6 @@ int match_bt(signed char i_regmap[],uint64_t i_is32,uint64_t i_dirty,int addr) } } //if(is32[t]&~unneeded_reg_upper[t]&~i_is32) return 0; -#ifndef FORCE32 - if(requires_32bit[t]&~i_is32) return 0; -#endif // Delay slots are not valid branch targets //if(t>0&&(itype[t-1]==RJUMP||itype[t-1]==UJUMP||itype[t-1]==CJUMP||itype[t-1]==SJUMP||itype[t-1]==FJUMP)) return 0; // Delay slots require additional processing, so do not match @@ -5416,13 +4885,11 @@ void rjump_assemble(int i,struct regstat *i_regs) //assert(adj==0); emit_addimm_and_set_flags(CLOCK_ADJUST(ccadj[i]+2),HOST_CCREG); add_stub(CC_STUB,(int)out,jump_vaddr_reg[rs],0,i,-1,TAKEN,0); -#ifdef PCSX if(itype[i+1]==COP0&&(source[i+1]&0x3f)==0x10) // special case for RFE emit_jmp(0); else -#endif - emit_jns(0); + emit_jns(0); //load_regs_bt(branch_regs[i].regmap,branch_regs[i].is32,branch_regs[i].dirty,-1); #ifdef USE_MINI_HT if(rs1[i]==31) { @@ -7026,364 +6493,10 @@ void unneeded_registers(int istart,int iend,int r) } printf("\n");*/ } -#ifdef FORCE32 for (i=iend;i>=istart;i--) { unneeded_reg_upper[i]=branch_unneeded_reg_upper[i]=-1LL; } -#endif -} - -// Identify registers which are likely to contain 32-bit values -// This is used to predict whether any branches will jump to a -// location with 64-bit values in registers. -static void provisional_32bit() -{ - int i,j; - uint64_t is32=1; - uint64_t lastbranch=1; - - for(i=0;i<slen;i++) - { - if(i>0) { - if(itype[i-1]==CJUMP||itype[i-1]==SJUMP||itype[i-1]==FJUMP) { - if(i>1) is32=lastbranch; - else is32=1; - } - } - if(i>1) - { - if(itype[i-2]==CJUMP||itype[i-2]==SJUMP||itype[i-2]==FJUMP) { - if(likely[i-2]) { - if(i>2) is32=lastbranch; - else is32=1; - } - } - if((opcode[i-2]&0x2f)==0x05) // BNE/BNEL - { - if(rs1[i-2]==0||rs2[i-2]==0) - { - if(rs1[i-2]) { - is32|=1LL<<rs1[i-2]; - } - if(rs2[i-2]) { - is32|=1LL<<rs2[i-2]; - } - } - } - } - // If something jumps here with 64-bit values - // then promote those registers to 64 bits - if(bt[i]) - { - uint64_t temp_is32=is32; - for(j=i-1;j>=0;j--) - { - if(ba[j]==start+i*4) - //temp_is32&=branch_regs[j].is32; - temp_is32&=p32[j]; - } - for(j=i;j<slen;j++) - { - if(ba[j]==start+i*4) - temp_is32=1; - } - is32=temp_is32; - } - int type=itype[i]; - int op=opcode[i]; - int op2=opcode2[i]; - int rt=rt1[i]; - int s1=rs1[i]; - int s2=rs2[i]; - if(type==UJUMP||type==RJUMP||type==CJUMP||type==SJUMP||type==FJUMP) { - // Branches don't write registers, consider the delay slot instead. - type=itype[i+1]; - op=opcode[i+1]; - op2=opcode2[i+1]; - rt=rt1[i+1]; - s1=rs1[i+1]; - s2=rs2[i+1]; - lastbranch=is32; - } - switch(type) { - case LOAD: - if(opcode[i]==0x27||opcode[i]==0x37|| // LWU/LD - opcode[i]==0x1A||opcode[i]==0x1B) // LDL/LDR - is32&=~(1LL<<rt); - else - is32|=1LL<<rt; - break; - case STORE: - case STORELR: - break; - case LOADLR: - if(op==0x1a||op==0x1b) is32&=~(1LL<<rt); // LDR/LDL - if(op==0x22) is32|=1LL<<rt; // LWL - break; - case IMM16: - if (op==0x08||op==0x09|| // ADDI/ADDIU - op==0x0a||op==0x0b|| // SLTI/SLTIU - op==0x0c|| // ANDI - op==0x0f) // LUI - { - is32|=1LL<<rt; - } - if(op==0x18||op==0x19) { // DADDI/DADDIU - is32&=~(1LL<<rt); - //if(imm[i]==0) - // is32|=((is32>>s1)&1LL)<<rt; - } - if(op==0x0d||op==0x0e) { // ORI/XORI - uint64_t sr=((is32>>s1)&1LL); - is32&=~(1LL<<rt); - is32|=sr<<rt; - } - break; - case UJUMP: - break; - case RJUMP: - break; - case CJUMP: - break; - case SJUMP: - break; - case FJUMP: - break; - case ALU: - if(op2>=0x20&&op2<=0x23) { // ADD/ADDU/SUB/SUBU - is32|=1LL<<rt; - } - if(op2==0x2a||op2==0x2b) { // SLT/SLTU - is32|=1LL<<rt; - } - else if(op2>=0x24&&op2<=0x27) { // AND/OR/XOR/NOR - uint64_t sr=((is32>>s1)&(is32>>s2)&1LL); - is32&=~(1LL<<rt); - is32|=sr<<rt; - } - else if(op2>=0x2c&&op2<=0x2d) { // DADD/DADDU - if(s1==0&&s2==0) { - is32|=1LL<<rt; - } - else if(s2==0) { - uint64_t sr=((is32>>s1)&1LL); - is32&=~(1LL<<rt); - is32|=sr<<rt; - } - else if(s1==0) { - uint64_t sr=((is32>>s2)&1LL); - is32&=~(1LL<<rt); - is32|=sr<<rt; - } - else { - is32&=~(1LL<<rt); - } - } - else if(op2>=0x2e&&op2<=0x2f) { // DSUB/DSUBU - if(s1==0&&s2==0) { - is32|=1LL<<rt; - } - else if(s2==0) { - uint64_t sr=((is32>>s1)&1LL); - is32&=~(1LL<<rt); - is32|=sr<<rt; - } - else { - is32&=~(1LL<<rt); - } - } - break; - case MULTDIV: - if (op2>=0x1c&&op2<=0x1f) { // DMULT/DMULTU/DDIV/DDIVU - is32&=~((1LL<<HIREG)|(1LL<<LOREG)); - } - else { - is32|=(1LL<<HIREG)|(1LL<<LOREG); - } - break; - case MOV: - { - uint64_t sr=((is32>>s1)&1LL); - is32&=~(1LL<<rt); - is32|=sr<<rt; - } - break; - case SHIFT: - if(op2>=0x14&&op2<=0x17) is32&=~(1LL<<rt); // DSLLV/DSRLV/DSRAV - else is32|=1LL<<rt; // SLLV/SRLV/SRAV - break; - case SHIFTIMM: - is32|=1LL<<rt; - // DSLL/DSRL/DSRA/DSLL32/DSRL32 but not DSRA32 have 64-bit result - if(op2>=0x38&&op2<0x3f) is32&=~(1LL<<rt); - break; - case COP0: - if(op2==0) is32|=1LL<<rt; // MFC0 - break; - case COP1: - case COP2: - if(op2==0) is32|=1LL<<rt; // MFC1 - if(op2==1) is32&=~(1LL<<rt); // DMFC1 - if(op2==2) is32|=1LL<<rt; // CFC1 - break; - case C1LS: - case C2LS: - break; - case FLOAT: - case FCONV: - break; - case FCOMP: - break; - case C2OP: - case SYSCALL: - case HLECALL: - break; - default: - break; - } - is32|=1; - p32[i]=is32; - - if(i>0) - { - if(itype[i-1]==UJUMP||itype[i-1]==RJUMP||(source[i-1]>>16)==0x1000) - { - if(rt1[i-1]==31) // JAL/JALR - { - // Subroutine call will return here, don't alloc any registers - is32=1; - } - else if(i+1<slen) - { - // Internal branch will jump here, match registers to caller - is32=0x3FFFFFFFFLL; - } - } - } - } -} - -// Identify registers which may be assumed to contain 32-bit values -// and where optimizations will rely on this. -// This is used to determine whether backward branches can safely -// jump to a location with 64-bit values in registers. -static void provisional_r32() -{ - u_int r32=0; - int i; - - for (i=slen-1;i>=0;i--) - { - int hr; - if(itype[i]==RJUMP||itype[i]==UJUMP||itype[i]==CJUMP||itype[i]==SJUMP||itype[i]==FJUMP) - { - if(ba[i]<start || ba[i]>=(start+slen*4)) - { - // Branch out of this block, don't need anything - r32=0; - } - else - { - // Internal branch - // Need whatever matches the target - // (and doesn't get overwritten by the delay slot instruction) - r32=0; - int t=(ba[i]-start)>>2; - if(ba[i]>start+i*4) { - // Forward branch - //if(!(requires_32bit[t]&~regs[i].was32)) - // r32|=requires_32bit[t]&(~(1LL<<rt1[i+1]))&(~(1LL<<rt2[i+1])); - if(!(pr32[t]&~regs[i].was32)) - r32|=pr32[t]&(~(1LL<<rt1[i+1]))&(~(1LL<<rt2[i+1])); - }else{ - // Backward branch - if(!(regs[t].was32&~unneeded_reg_upper[t]&~regs[i].was32)) - r32|=regs[t].was32&~unneeded_reg_upper[t]&(~(1LL<<rt1[i+1]))&(~(1LL<<rt2[i+1])); - } - } - // Conditional branch may need registers for following instructions - if(itype[i]!=RJUMP&&itype[i]!=UJUMP&&(source[i]>>16)!=0x1000) - { - if(i<slen-2) { - //r32|=requires_32bit[i+2]; - r32|=pr32[i+2]; - r32&=regs[i].was32; - // Mark this address as a branch target since it may be called - // upon return from interrupt - //bt[i+2]=1; - } - } - // Merge in delay slot - if(!likely[i]) { - // These are overwritten unless the branch is "likely" - // and the delay slot is nullified if not taken - r32&=~(1LL<<rt1[i+1]); - r32&=~(1LL<<rt2[i+1]); - } - // Assume these are needed (delay slot) - if(us1[i+1]>0) - { - if((regs[i].was32>>us1[i+1])&1) r32|=1LL<<us1[i+1]; - } - if(us2[i+1]>0) - { - if((regs[i].was32>>us2[i+1])&1) r32|=1LL<<us2[i+1]; - } - if(dep1[i+1]&&!((unneeded_reg_upper[i]>>dep1[i+1])&1)) - { - if((regs[i].was32>>dep1[i+1])&1) r32|=1LL<<dep1[i+1]; - } - if(dep2[i+1]&&!((unneeded_reg_upper[i]>>dep2[i+1])&1)) - { - if((regs[i].was32>>dep2[i+1])&1) r32|=1LL<<dep2[i+1]; - } - } - else if(itype[i]==SYSCALL||itype[i]==HLECALL||itype[i]==INTCALL) - { - // SYSCALL instruction (software interrupt) - r32=0; - } - else if(itype[i]==COP0 && (source[i]&0x3f)==0x18) - { - // ERET instruction (return from interrupt) - r32=0; - } - // Check 32 bits - r32&=~(1LL<<rt1[i]); - r32&=~(1LL<<rt2[i]); - if(us1[i]>0) - { - if((regs[i].was32>>us1[i])&1) r32|=1LL<<us1[i]; - } - if(us2[i]>0) - { - if((regs[i].was32>>us2[i])&1) r32|=1LL<<us2[i]; - } - if(dep1[i]&&!((unneeded_reg_upper[i]>>dep1[i])&1)) - { - if((regs[i].was32>>dep1[i])&1) r32|=1LL<<dep1[i]; - } - if(dep2[i]&&!((unneeded_reg_upper[i]>>dep2[i])&1)) - { - if((regs[i].was32>>dep2[i])&1) r32|=1LL<<dep2[i]; - } - //requires_32bit[i]=r32; - pr32[i]=r32; - - // Dirty registers which are 32-bit, require 32-bit input - // as they will be written as 32-bit values - for(hr=0;hr<HOST_REGS;hr++) - { - if(regs[i].regmap_entry[hr]>0&®s[i].regmap_entry[hr]<64) { - if((regs[i].was32>>regs[i].regmap_entry[hr])&(regs[i].wasdirty>>hr)&1) { - if(!((unneeded_reg_upper[i]>>regs[i].regmap_entry[hr])&1)) - pr32[i]|=1LL<<regs[i].regmap_entry[hr]; - //requires_32bit[i]|=1LL<<regs[i].regmap_entry[hr]; - } - } - } - } } // Write back dirty registers as soon as we will no longer modify them, @@ -7953,15 +7066,6 @@ void new_dynarec_clear_full() stop_after_jal=0; inv_code_start=inv_code_end=~0; // TLB -#ifndef DISABLE_TLB - using_tlb=0; - for(n=0;n<524288;n++) // 0 .. 0x7FFFFFFF - memory_map[n]=-1; - for(n=524288;n<526336;n++) // 0x80000000 .. 0x807FFFFF - memory_map[n]=((u_int)rdram-0x80000000)>>2; - for(n=526336;n<1048576;n++) // 0x80800000 .. 0xFFFFFFFF - memory_map[n]=-1; -#endif for(n=0;n<4096;n++) ll_clear(jump_in+n); for(n=0;n<4096;n++) ll_clear(jump_out+n); for(n=0;n<4096;n++) ll_clear(jump_dirty+n); @@ -7983,12 +7087,6 @@ void new_dynarec_init() if (mprotect(out, 1<<TARGET_SIZE_2, PROT_READ | PROT_WRITE | PROT_EXEC) != 0) SysPrintf("mprotect() failed: %s\n", strerror(errno)); #endif -#ifdef MUPEN64 - rdword=&readmem_dword; - fake_pc.f.r.rs=&readmem_dword; - fake_pc.f.r.rt=&readmem_dword; - fake_pc.f.r.rd=&readmem_dword; -#endif int n; cycle_multiplier=200; new_dynarec_clear_full(); @@ -7996,45 +7094,6 @@ void new_dynarec_init() // Copy this into local area so we don't have to put it in every literal pool invc_ptr=invalid_code; #endif -#ifdef MUPEN64 - for(n=0;n<0x8000;n++) { // 0 .. 0x7FFFFFFF - writemem[n] = write_nomem_new; - writememb[n] = write_nomemb_new; - writememh[n] = write_nomemh_new; -#ifndef FORCE32 - writememd[n] = write_nomemd_new; -#endif - readmem[n] = read_nomem_new; - readmemb[n] = read_nomemb_new; - readmemh[n] = read_nomemh_new; -#ifndef FORCE32 - readmemd[n] = read_nomemd_new; -#endif - } - for(n=0x8000;n<0x8080;n++) { // 0x80000000 .. 0x807FFFFF - writemem[n] = write_rdram_new; - writememb[n] = write_rdramb_new; - writememh[n] = write_rdramh_new; -#ifndef FORCE32 - writememd[n] = write_rdramd_new; -#endif - } - for(n=0xC000;n<0x10000;n++) { // 0xC0000000 .. 0xFFFFFFFF - writemem[n] = write_nomem_new; - writememb[n] = write_nomemb_new; - writememh[n] = write_nomemh_new; -#ifndef FORCE32 - writememd[n] = write_nomemd_new; -#endif - readmem[n] = read_nomem_new; - readmemb[n] = read_nomemb_new; - readmemh[n] = read_nomemh_new; -#ifndef FORCE32 - readmemd[n] = read_nomemd_new; -#endif - } -#endif - tlb_hacks(); arch_init(); new_dynarec_test(); #ifndef RAM_FIXED @@ -8291,7 +7350,7 @@ int new_recompile_block(int addr) case 0x33: strcpy(insn[i],"TLTU"); type=NI; break; case 0x34: strcpy(insn[i],"TEQ"); type=NI; break; case 0x36: strcpy(insn[i],"TNE"); type=NI; break; -#ifndef FORCE32 +#if 0 case 0x14: strcpy(insn[i],"DSLLV"); type=SHIFT; break; case 0x16: strcpy(insn[i],"DSRLV"); type=SHIFT; break; case 0x17: strcpy(insn[i],"DSRAV"); type=SHIFT; break; @@ -8359,11 +7418,8 @@ int new_recompile_block(int addr) case 0x02: strcpy(insn[i],"TLBWI"); type=COP0; break; case 0x06: strcpy(insn[i],"TLBWR"); type=COP0; break; case 0x08: strcpy(insn[i],"TLBP"); type=COP0; break; -#ifdef PCSX case 0x10: strcpy(insn[i],"RFE"); type=COP0; break; -#else - case 0x18: strcpy(insn[i],"ERET"); type=COP0; break; -#endif + //case 0x18: strcpy(insn[i],"ERET"); type=COP0; break; } } break; @@ -8482,7 +7538,7 @@ int new_recompile_block(int addr) break; } break; -#ifndef FORCE32 +#if 0 case 0x14: strcpy(insn[i],"BEQL"); type=CJUMP; break; case 0x15: strcpy(insn[i],"BNEL"); type=CJUMP; break; case 0x16: strcpy(insn[i],"BLEZL"); type=CJUMP; break; @@ -8499,14 +7555,14 @@ int new_recompile_block(int addr) case 0x24: strcpy(insn[i],"LBU"); type=LOAD; break; case 0x25: strcpy(insn[i],"LHU"); type=LOAD; break; case 0x26: strcpy(insn[i],"LWR"); type=LOADLR; break; -#ifndef FORCE32 +#if 0 case 0x27: strcpy(insn[i],"LWU"); type=LOAD; break; #endif case 0x28: strcpy(insn[i],"SB"); type=STORE; break; case 0x29: strcpy(insn[i],"SH"); type=STORE; break; case 0x2A: strcpy(insn[i],"SWL"); type=STORELR; break; case 0x2B: strcpy(insn[i],"SW"); type=STORE; break; -#ifndef FORCE32 +#if 0 case 0x2C: strcpy(insn[i],"SDL"); type=STORELR; break; case 0x2D: strcpy(insn[i],"SDR"); type=STORELR; break; #endif @@ -8514,19 +7570,18 @@ int new_recompile_block(int addr) case 0x2F: strcpy(insn[i],"CACHE"); type=NOP; break; case 0x30: strcpy(insn[i],"LL"); type=NI; break; case 0x31: strcpy(insn[i],"LWC1"); type=C1LS; break; -#ifndef FORCE32 +#if 0 case 0x34: strcpy(insn[i],"LLD"); type=NI; break; case 0x35: strcpy(insn[i],"LDC1"); type=C1LS; break; case 0x37: strcpy(insn[i],"LD"); type=LOAD; break; #endif case 0x38: strcpy(insn[i],"SC"); type=NI; break; case 0x39: strcpy(insn[i],"SWC1"); type=C1LS; break; -#ifndef FORCE32 +#if 0 case 0x3C: strcpy(insn[i],"SCD"); type=NI; break; case 0x3D: strcpy(insn[i],"SDC1"); type=C1LS; break; case 0x3F: strcpy(insn[i],"SD"); type=STORE; break; #endif -#ifdef PCSX case 0x12: strcpy(insn[i],"COP2"); type=NI; op2=(source[i]>>21)&0x1f; //if (op2 & 0x10) { @@ -8550,7 +7605,6 @@ int new_recompile_block(int addr) case 0x32: strcpy(insn[i],"LWC2"); type=C2LS; break; case 0x3A: strcpy(insn[i],"SWC2"); type=C2LS; break; case 0x3B: strcpy(insn[i],"HLECALL"); type=HLECALL; break; -#endif default: strcpy(insn[i],"???"); type=NI; SysPrintf("NI %08x @%08x (%08x)\n", source[i], addr + i*4, addr); break; @@ -8821,7 +7875,6 @@ int new_recompile_block(int addr) else if(type==CJUMP||type==SJUMP||type==FJUMP) ba[i]=start+i*4+4+((signed int)((unsigned int)source[i]<<16)>>14); else ba[i]=-1; -#ifdef PCSX if(i>0&&(itype[i-1]==RJUMP||itype[i-1]==UJUMP||itype[i-1]==CJUMP||itype[i-1]==SJUMP||itype[i-1]==FJUMP)) { int do_in_intrp=0; // branch in delay slot? @@ -8855,7 +7908,6 @@ int new_recompile_block(int addr) i--; // don't compile the DS } } -#endif /* Is this the end of the block? */ if(i>0&&(itype[i-1]==UJUMP||itype[i-1]==RJUMP||(source[i-1]>>16)==0x1000)) { if(rt1[i-1]==0) { // Continue past subroutine call (JAL) @@ -8921,9 +7973,6 @@ int new_recompile_block(int addr) int cc=0; int hr=-1; -#ifndef FORCE32 - provisional_32bit(); -#endif if((u_int)addr&1) { // First instruction is delay slot cc=-1; @@ -8966,126 +8015,13 @@ int new_recompile_block(int addr) } } } -#ifndef FORCE32 - // If something jumps here with 64-bit values - // then promote those registers to 64 bits - if(bt[i]) - { - uint64_t temp_is32=current.is32; - for(j=i-1;j>=0;j--) - { - if(ba[j]==start+i*4) - temp_is32&=branch_regs[j].is32; - } - for(j=i;j<slen;j++) - { - if(ba[j]==start+i*4) - //temp_is32=1; - temp_is32&=p32[j]; - } - if(temp_is32!=current.is32) { - //printf("dumping 32-bit regs (%x)\n",start+i*4); - #ifndef DESTRUCTIVE_WRITEBACK - if(ds) - #endif - for(hr=0;hr<HOST_REGS;hr++) - { - int r=current.regmap[hr]; - if(r>0&&r<64) - { - if((current.dirty>>hr)&((current.is32&~temp_is32)>>r)&1) { - temp_is32|=1LL<<r; - //printf("restore %d\n",r); - } - } - } - current.is32=temp_is32; - } - } -#else current.is32=-1LL; -#endif memcpy(regmap_pre[i],current.regmap,sizeof(current.regmap)); regs[i].wasconst=current.isconst; regs[i].was32=current.is32; regs[i].wasdirty=current.dirty; regs[i].loadedconst=0; - #if defined(DESTRUCTIVE_WRITEBACK) && !defined(FORCE32) - // To change a dirty register from 32 to 64 bits, we must write - // it out during the previous cycle (for branches, 2 cycles) - if(i<slen-1&&bt[i+1]&&itype[i-1]!=UJUMP&&itype[i-1]!=CJUMP&&itype[i-1]!=SJUMP&&itype[i-1]!=RJUMP&&itype[i-1]!=FJUMP) - { - uint64_t temp_is32=current.is32; - for(j=i-1;j>=0;j--) - { - if(ba[j]==start+i*4+4) - temp_is32&=branch_regs[j].is32; - } - for(j=i;j<slen;j++) - { - if(ba[j]==start+i*4+4) - //temp_is32=1; - temp_is32&=p32[j]; - } - if(temp_is32!=current.is32) { - //printf("pre-dumping 32-bit regs (%x)\n",start+i*4); - for(hr=0;hr<HOST_REGS;hr++) - { - int r=current.regmap[hr]; - if(r>0) - { - if((current.dirty>>hr)&((current.is32&~temp_is32)>>(r&63))&1) { - if(itype[i]!=UJUMP&&itype[i]!=CJUMP&&itype[i]!=SJUMP&&itype[i]!=RJUMP&&itype[i]!=FJUMP) - { - if(rs1[i]!=(r&63)&&rs2[i]!=(r&63)) - { - //printf("dump %d/r%d\n",hr,r); - current.regmap[hr]=-1; - if(get_reg(current.regmap,r|64)>=0) - current.regmap[get_reg(current.regmap,r|64)]=-1; - } - } - } - } - } - } - } - else if(i<slen-2&&bt[i+2]&&(source[i-1]>>16)!=0x1000&&(itype[i]==CJUMP||itype[i]==SJUMP||itype[i]==FJUMP)) - { - uint64_t temp_is32=current.is32; - for(j=i-1;j>=0;j--) - { - if(ba[j]==start+i*4+8) - temp_is32&=branch_regs[j].is32; - } - for(j=i;j<slen;j++) - { - if(ba[j]==start+i*4+8) - //temp_is32=1; - temp_is32&=p32[j]; - } - if(temp_is32!=current.is32) { - //printf("pre-dumping 32-bit regs (%x)\n",start+i*4); - for(hr=0;hr<HOST_REGS;hr++) - { - int r=current.regmap[hr]; - if(r>0) - { - if((current.dirty>>hr)&((current.is32&~temp_is32)>>(r&63))&1) { - if(rs1[i]!=(r&63)&&rs2[i]!=(r&63)&&rs1[i+1]!=(r&63)&&rs2[i+1]!=(r&63)) - { - //printf("dump %d/r%d\n",hr,r); - current.regmap[hr]=-1; - if(get_reg(current.regmap,r|64)>=0) - current.regmap[get_reg(current.regmap,r|64)]=-1; - } - } - } - } - } - } - #endif if(itype[i]!=UJUMP&&itype[i]!=CJUMP&&itype[i]!=SJUMP&&itype[i]!=RJUMP&&itype[i]!=FJUMP) { if(i+1<slen) { current.u=unneeded_reg[i+1]&~((1LL<<rs1[i])|(1LL<<rs2[i])); @@ -9875,7 +8811,7 @@ int new_recompile_block(int addr) { cc=0; } -#if defined(PCSX) && !defined(DRC_DBG) +#if !defined(DRC_DBG) else if(itype[i]==C2OP&>e_cycletab[source[i]&0x3f]>2) { // GTE runs in parallel until accessed, divide by 2 for a rough guess @@ -10927,121 +9863,6 @@ int new_recompile_block(int addr) clean_registers(0,slen-1,1); /* Pass 7 - Identify 32-bit registers */ -#ifndef FORCE32 - provisional_r32(); - - u_int r32=0; - - for (i=slen-1;i>=0;i--) - { - int hr; - if(itype[i]==RJUMP||itype[i]==UJUMP||itype[i]==CJUMP||itype[i]==SJUMP||itype[i]==FJUMP) - { - if(ba[i]<start || ba[i]>=(start+slen*4)) - { - // Branch out of this block, don't need anything - r32=0; - } - else - { - // Internal branch - // Need whatever matches the target - // (and doesn't get overwritten by the delay slot instruction) - r32=0; - int t=(ba[i]-start)>>2; - if(ba[i]>start+i*4) { - // Forward branch - if(!(requires_32bit[t]&~regs[i].was32)) - r32|=requires_32bit[t]&(~(1LL<<rt1[i+1]))&(~(1LL<<rt2[i+1])); - }else{ - // Backward branch - //if(!(regs[t].was32&~unneeded_reg_upper[t]&~regs[i].was32)) - // r32|=regs[t].was32&~unneeded_reg_upper[t]&(~(1LL<<rt1[i+1]))&(~(1LL<<rt2[i+1])); - if(!(pr32[t]&~regs[i].was32)) - r32|=pr32[t]&(~(1LL<<rt1[i+1]))&(~(1LL<<rt2[i+1])); - } - } - // Conditional branch may need registers for following instructions - if(itype[i]!=RJUMP&&itype[i]!=UJUMP&&(source[i]>>16)!=0x1000) - { - if(i<slen-2) { - r32|=requires_32bit[i+2]; - r32&=regs[i].was32; - // Mark this address as a branch target since it may be called - // upon return from interrupt - bt[i+2]=1; - } - } - // Merge in delay slot - if(!likely[i]) { - // These are overwritten unless the branch is "likely" - // and the delay slot is nullified if not taken - r32&=~(1LL<<rt1[i+1]); - r32&=~(1LL<<rt2[i+1]); - } - // Assume these are needed (delay slot) - if(us1[i+1]>0) - { - if((regs[i].was32>>us1[i+1])&1) r32|=1LL<<us1[i+1]; - } - if(us2[i+1]>0) - { - if((regs[i].was32>>us2[i+1])&1) r32|=1LL<<us2[i+1]; - } - if(dep1[i+1]&&!((unneeded_reg_upper[i]>>dep1[i+1])&1)) - { - if((regs[i].was32>>dep1[i+1])&1) r32|=1LL<<dep1[i+1]; - } - if(dep2[i+1]&&!((unneeded_reg_upper[i]>>dep2[i+1])&1)) - { - if((regs[i].was32>>dep2[i+1])&1) r32|=1LL<<dep2[i+1]; - } - } - else if(itype[i]==SYSCALL||itype[i]==HLECALL||itype[i]==INTCALL) - { - // SYSCALL instruction (software interrupt) - r32=0; - } - else if(itype[i]==COP0 && (source[i]&0x3f)==0x18) - { - // ERET instruction (return from interrupt) - r32=0; - } - // Check 32 bits - r32&=~(1LL<<rt1[i]); - r32&=~(1LL<<rt2[i]); - if(us1[i]>0) - { - if((regs[i].was32>>us1[i])&1) r32|=1LL<<us1[i]; - } - if(us2[i]>0) - { - if((regs[i].was32>>us2[i])&1) r32|=1LL<<us2[i]; - } - if(dep1[i]&&!((unneeded_reg_upper[i]>>dep1[i])&1)) - { - if((regs[i].was32>>dep1[i])&1) r32|=1LL<<dep1[i]; - } - if(dep2[i]&&!((unneeded_reg_upper[i]>>dep2[i])&1)) - { - if((regs[i].was32>>dep2[i])&1) r32|=1LL<<dep2[i]; - } - requires_32bit[i]=r32; - - // Dirty registers which are 32-bit, require 32-bit input - // as they will be written as 32-bit values - for(hr=0;hr<HOST_REGS;hr++) - { - if(regs[i].regmap_entry[hr]>0&®s[i].regmap_entry[hr]<64) { - if((regs[i].was32>>regs[i].regmap_entry[hr])&(regs[i].wasdirty>>hr)&1) { - if(!((unneeded_reg_upper[i]>>regs[i].regmap_entry[hr])&1)) - requires_32bit[i]|=1LL<<regs[i].regmap_entry[hr]; - } - } - } - //requires_32bit[i]=is32[i]&~unneeded_reg_upper[i]; // DEBUG - } -#else for (i=slen-1;i>=0;i--) { if(itype[i]==CJUMP||itype[i]==SJUMP||itype[i]==FJUMP) @@ -11054,7 +9875,6 @@ int new_recompile_block(int addr) } } } -#endif if(itype[slen-1]==SPAN) { bt[slen-1]=1; // Mark as a branch target so instruction can restart after exception @@ -11073,26 +9893,6 @@ int new_recompile_block(int addr) else printf(" r%d",r); } } -#ifndef FORCE32 - printf(" UU:"); - for(r=1;r<=CCREG;r++) { - if(((unneeded_reg_upper[i]&~unneeded_reg[i])>>r)&1) { - if(r==HIREG) printf(" HI"); - else if(r==LOREG) printf(" LO"); - else printf(" r%d",r); - } - } - printf(" 32:"); - for(r=0;r<=CCREG;r++) { - //if(((is32[i]>>r)&(~unneeded_reg[i]>>r))&1) { - if((regs[i].was32>>r)&1) { - if(r==CCREG) printf(" CC"); - else if(r==HIREG) printf(" HI"); - else if(r==LOREG) printf(" LO"); - else printf(" r%d",r); - } - } -#endif printf("\n"); #if defined(__i386__) || defined(__x86_64__) printf("pre: eax=%d ecx=%d edx=%d ebx=%d ebp=%d esi=%d edi=%d\n",regmap_pre[i][0],regmap_pre[i][1],regmap_pre[i][2],regmap_pre[i][3],regmap_pre[i][5],regmap_pre[i][6],regmap_pre[i][7]); @@ -11214,18 +10014,6 @@ int new_recompile_block(int addr) #endif printf("\n"); } -#ifndef FORCE32 - printf(" 32:"); - for(r=0;r<=CCREG;r++) { - if((regs[i].is32>>r)&1) { - if(r==CCREG) printf(" CC"); - else if(r==HIREG) printf(" HI"); - else if(r==LOREG) printf(" LO"); - else printf(" r%d",r); - } - } - printf("\n"); -#endif /*printf(" p32:"); for(r=0;r<=CCREG;r++) { if((p32[i]>>r)&1) { @@ -11263,18 +10051,6 @@ int new_recompile_block(int addr) if((branch_regs[i].dirty>>10)&1) printf("r10 "); if((branch_regs[i].dirty>>12)&1) printf("r12 "); #endif -#ifndef FORCE32 - printf(" 32:"); - for(r=0;r<=CCREG;r++) { - if((branch_regs[i].is32>>r)&1) { - if(r==CCREG) printf(" CC"); - else if(r==HIREG) printf(" HI"); - else if(r==LOREG) printf(" LO"); - else printf(" r%d",r); - } - } - printf("\n"); -#endif } } #endif // DISASM @@ -11292,7 +10068,6 @@ int new_recompile_block(int addr) } u_int instr_addr0_override=0; -#ifdef PCSX if (start == 0x80030000) { // nasty hack for fastbios thing // override block entry to this code @@ -11306,7 +10081,6 @@ int new_recompile_block(int addr) emit_cmp(0,1); emit_jne((int)new_dyna_leave); } -#endif for(i=0;i<slen;i++) { //if(ds) printf("ds: "); @@ -11320,8 +10094,6 @@ int new_recompile_block(int addr) #ifndef DESTRUCTIVE_WRITEBACK if(i<2||(itype[i-2]!=UJUMP&&itype[i-2]!=RJUMP&&(source[i-2]>>16)!=0x1000)) { - wb_sx(regmap_pre[i],regs[i].regmap_entry,regs[i].wasdirty,is32_pre,regs[i].was32, - unneeded_reg[i],unneeded_reg_upper[i]); wb_valid(regmap_pre[i],regs[i].regmap_entry,dirty_pre,regs[i].wasdirty,is32_pre, unneeded_reg[i],unneeded_reg_upper[i]); } @@ -11595,26 +10367,15 @@ int new_recompile_block(int addr) // Trap writes to any of the pages we compiled for(i=start>>12;i<=(start+slen*4)>>12;i++) { invalid_code[i]=0; -#ifndef DISABLE_TLB - memory_map[i]|=0x40000000; - if((signed int)start>=(signed int)0xC0000000) { - assert(using_tlb); - j=(((u_int)i<<12)+(memory_map[i]<<2)-(u_int)rdram+(u_int)0x80000000)>>12; - invalid_code[j]=0; - memory_map[j]|=0x40000000; - //printf("write protect physical page: %x (virtual %x)\n",j<<12,start); - } -#endif } inv_code_start=inv_code_end=~0; -#ifdef PCSX + // for PCSX we need to mark all mirrors too if(get_page(start)<(RAM_SIZE>>12)) for(i=start>>12;i<=(start+slen*4)>>12;i++) invalid_code[((u_int)0x00000000>>12)|(i&0x1ff)]= invalid_code[((u_int)0x80000000>>12)|(i&0x1ff)]= invalid_code[((u_int)0xa0000000>>12)|(i&0x1ff)]=0; -#endif /* Pass 10 - Free memory by expiring oldest blocks */ |