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-rw-r--r--libpcsxcore/new_dynarec/arm/linkage_arm.S12
-rw-r--r--libpcsxcore/new_dynarec/new_dynarec.c2
2 files changed, 7 insertions, 7 deletions
diff --git a/libpcsxcore/new_dynarec/arm/linkage_arm.S b/libpcsxcore/new_dynarec/arm/linkage_arm.S
index b630142..269eb99 100644
--- a/libpcsxcore/new_dynarec/arm/linkage_arm.S
+++ b/libpcsxcore/new_dynarec/arm/linkage_arm.S
@@ -93,7 +93,7 @@ DRC_VAR(restore_candidate, 512)
DRC_VAR(FCR0, 4)
DRC_VAR(FCR31, 4)
-#ifdef __MACH__
+#ifdef TEXRELS_FORBIDDEN
.data
.align 2
ptr_jump_in:
@@ -117,21 +117,21 @@ ptr_hash_table:
#endif
.macro load_varadr reg var
-#if defined(HAVE_ARMV7) && !defined(__PIC__)
- movw \reg, #:lower16:\var
- movt \reg, #:upper16:\var
-#elif defined(HAVE_ARMV7) && defined(__MACH__)
+#if defined(HAVE_ARMV7) && defined(TEXRELS_FORBIDDEN)
movw \reg, #:lower16:(\var-(1678f+8))
movt \reg, #:upper16:(\var-(1678f+8))
1678:
add \reg, pc
+#elif defined(HAVE_ARMV7) && !defined(__PIC__)
+ movw \reg, #:lower16:\var
+ movt \reg, #:upper16:\var
#else
ldr \reg, =\var
#endif
.endm
.macro load_varadr_ext reg var
-#if defined(HAVE_ARMV7) && defined(__MACH__) && defined(__PIC__)
+#if defined(HAVE_ARMV7) && defined(TEXRELS_FORBIDDEN)
movw \reg, #:lower16:(ptr_\var-(1678f+8))
movt \reg, #:upper16:(ptr_\var-(1678f+8))
1678:
diff --git a/libpcsxcore/new_dynarec/new_dynarec.c b/libpcsxcore/new_dynarec/new_dynarec.c
index d2cd270..dfa17a7 100644
--- a/libpcsxcore/new_dynarec/new_dynarec.c
+++ b/libpcsxcore/new_dynarec/new_dynarec.c
@@ -7123,7 +7123,7 @@ void new_dynarec_init(void)
#else
#ifndef NO_WRITE_EXEC
// not all systems allow execute in data segment by default
- if (mprotect((void*)BASE_ADDR, 1<<TARGET_SIZE_2, PROT_READ | PROT_WRITE | PROT_EXEC) != 0)
+ if (mprotect((void *)BASE_ADDR, 1<<TARGET_SIZE_2, PROT_READ | PROT_WRITE | PROT_EXEC) != 0)
SysPrintf("mprotect() failed: %s\n", strerror(errno));
#endif
#endif