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path: root/libpcsxcore/new_dynarec/new_dynarec.c
AgeCommit message (Expand)Author
2010-12-28drc: fix wrong address reg use in c2ls, small refactoringnotaz
2010-12-28drc: fix BxxZALnotaz
2010-12-18drc: don't compile 64bit loads/stores in 32bit modenotaz
2010-12-18drc: end block on syscall and hlecall, not insn after themnotaz
2010-12-16drc: use correct RAM sizenotaz
2010-12-16drc: fix: storelr should also use AGRnotaz
2010-12-16drc: implemented STL/STR stubs (at least I think I did)notaz
2010-12-14drc: don't clear ARM caches on whole translation cache - it's very slownotaz
2010-12-14drc: don't remove unused i/o reads because of FIFOsnotaz
2010-12-14drc: add forgotten __clear_cachenotaz
2010-12-14drc: try harder to mark upper regs as unneedednotaz
2010-12-06drc: fix JALR with non-r31 return registernotaz
2010-12-05drc: use direct hle callsnotaz
2010-12-05drc: initial cop2/gte implementation (works, mostly)notaz
2010-12-02drc: fix unsaved registernotaz
2010-12-02drc: further hacks, hle handlingnotaz
2010-12-02drc: attempt to support little endiannotaz
2010-11-22drc: still killing tlp/64bit..notaz
2010-11-21drc: trying to make it 32bitnotaz
2010-11-20try to make drc more configurablenotaz
2010-11-20allow to disable TLBnotaz
2010-11-20add unmodified Ari64 drc to track it's changesnotaz