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authorAutechre2021-02-10 10:35:56 +0100
committerGitHub2021-02-10 10:35:56 +0100
commit6254bbb1d2f48dae2fca9697990e54756534e162 (patch)
tree8f189470920261cad5004368613f3e54c2285924
parentf70d8534a1da41376dd96edffe87cbb04cccd683 (diff)
parent2c6026cfe5cb89b9041ee40230bfef754c21c83d (diff)
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Merge pull request #91 from davidgfnet/master
Fix ARM dynarec
-rw-r--r--arm/arm_emit.h4
-rw-r--r--cpu_threaded.c10
2 files changed, 4 insertions, 10 deletions
diff --git a/arm/arm_emit.h b/arm/arm_emit.h
index eb48aa2..51987a3 100644
--- a/arm/arm_emit.h
+++ b/arm/arm_emit.h
@@ -174,7 +174,7 @@ s32 arm_register_allocation[] =
reg_x4, /* GBA r12 */
mem_reg, /* GBA r13 */
reg_x5, /* GBA r14 */
- reg_a0 /* GBA r15 */
+ reg_a0, /* GBA r15 */
mem_reg,
mem_reg,
@@ -211,7 +211,7 @@ s32 thumb_register_allocation[] =
mem_reg, /* GBA r12 */
mem_reg, /* GBA r13 */
mem_reg, /* GBA r14 */
- reg_a0 /* GBA r15 */
+ reg_a0, /* GBA r15 */
mem_reg,
mem_reg,
diff --git a/cpu_threaded.c b/cpu_threaded.c
index 16a4852..ef7d83b 100644
--- a/cpu_threaded.c
+++ b/cpu_threaded.c
@@ -272,17 +272,11 @@ extern u8 bit_count[256];
#define invalidate_icache_region(addr, size) (void)0
#elif defined(ARM_ARCH)
-static int sys_cacheflush(void *addr, unsigned long size)
+static void sys_cacheflush(void *addr, unsigned long size)
{
void *start = (void*)addr;
void *end = (void*)(char *)addr + size;
-
- register const unsigned char *r0 asm("r0") = start;
- register const unsigned char *r1 asm("r1") = end;
- register const int r2 asm("r2") = 0;
- register const int r7 asm("r7") = 0xf0002;
- asm volatile ("svc 0x0" :: "r" (r0), "r" (r1), "r" (r2), "r" (r7));
- return -1;
+ __clear_cache(start, end);
}
#define translate_invalidate_dcache_one(which) \