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| author | David Guillen Fandos | 2021-03-17 18:33:02 +0100 |
|---|---|---|
| committer | David Guillen Fandos | 2021-03-17 18:33:02 +0100 |
| commit | fb7ca09b019248b9a0aba481ea55386f71053d73 (patch) | |
| tree | 4b4c650c5b0aca014747e43c29693bbb4e6c00f3 /arm/arm_stub.S | |
| parent | 34e672ed25f96c3558534ac24523103f3711e58a (diff) | |
| download | picogpsp-fb7ca09b019248b9a0aba481ea55386f71053d73.tar.gz picogpsp-fb7ca09b019248b9a0aba481ea55386f71053d73.tar.bz2 picogpsp-fb7ca09b019248b9a0aba481ea55386f71053d73.zip | |
Remove BIOS reserved translation area
This is not really necessary since it can share area with ROM.
Performance impact should be very minimal (haven't noticed it myself)
and could be compensated (even by a positive offset) if we bump the ROM
cache area size.
Tested with several dynarecs.
Diffstat (limited to 'arm/arm_stub.S')
| -rw-r--r-- | arm/arm_stub.S | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/arm/arm_stub.S b/arm/arm_stub.S index 6f1486d..27c7c64 100644 --- a/arm/arm_stub.S +++ b/arm/arm_stub.S @@ -440,8 +440,6 @@ _execute_swi_##mode: ;\ orr r0, r0, #0x13 /* set to supervisor mode */;\ str r0, [reg_base, #REG_CPSR] /* update cpsr */;\ ;\ - call_c_function(bios_region_read_allow) ;\ - ;\ mov r0, #MODE_SUPERVISOR ;\ ;\ store_registers_##mode() /* store regs for mode */;\ |