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authorneonloop2021-07-03 19:54:16 +0000
committerneonloop2021-07-03 19:54:16 +0000
commit2815c248d76932787fb58d5bbaa0f26be7bcb2be (patch)
treeeff2b1e2c458fcd0b5f96902382df944048d36b7 /arm
parent8dec6231614ba3f47d874d551ab83f4c5acb07cb (diff)
parent3d874ec5e3d5675ae9513264d857a3c6c9d2417c (diff)
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Merge remote-tracking branch 'libretro/master' into pico-fe
Diffstat (limited to 'arm')
-rw-r--r--arm/arm_emit.h17
-rw-r--r--arm/arm_stub.S42
2 files changed, 39 insertions, 20 deletions
diff --git a/arm/arm_emit.h b/arm/arm_emit.h
index 1432617..22ca763 100644
--- a/arm/arm_emit.h
+++ b/arm/arm_emit.h
@@ -31,6 +31,8 @@ u32 prepare_store_reg(u32 scratch_reg, u32 reg_index);
void generate_load_reg(u32 ireg, u32 reg_index);
void complete_store_reg(u32 scratch_reg, u32 reg_index);
void complete_store_reg_pc_no_flags(u32 scratch_reg, u32 reg_index);
+void thumb_cheat_hook(void);
+void arm_cheat_hook(void);
u32 arm_update_gba_arm(u32 pc);
u32 arm_update_gba_thumb(u32 pc);
@@ -317,7 +319,7 @@ u32 arm_disect_imm_32bit(u32 imm, u32 *stores, u32 *rotations)
#define generate_load_pc(ireg, new_pc) \
- arm_load_imm_32bit(ireg, new_pc) \
+ arm_load_imm_32bit(ireg, (new_pc)) \
#define generate_load_imm(ireg, imm, imm_ror) \
ARM_MOV_REG_IMM(0, ireg, imm, imm_ror) \
@@ -1237,12 +1239,10 @@ u32 execute_store_cpsr_body(u32 _cpsr, u32 store_mask, u32 address)
#define emit_trace_instruction(pc) \
generate_save_flags(); \
- ARM_LDR_IMM(0, ARMREG_SP, reg_base, 34*4); \
ARM_STMDB_WB(0, ARMREG_SP, 0x500C); \
arm_load_imm_32bit(reg_a0, pc); \
generate_function_call(trace_instruction); \
ARM_LDMIA_WB(0, ARMREG_SP, 0x500C); \
- arm_load_imm_32bit(ARMREG_SP, (u32)reg); \
generate_restore_flags();
#define emit_trace_thumb_instruction(pc) \
emit_trace_instruction(pc)
@@ -1656,6 +1656,11 @@ u32 execute_store_cpsr_body(u32 _cpsr, u32 store_mask, u32 address)
/* Operation types: imm, mem_reg, mem_imm */
+#define thumb_load_pc_pool_const(reg_rd, value) \
+ u32 rgdst = prepare_store_reg(reg_a0, reg_rd); \
+ generate_load_pc(rgdst, (value)); \
+ complete_store_reg(rgdst, reg_rd)
+
#define thumb_access_memory_load(mem_type, _rd) \
cycle_count += 2; \
generate_function_call(execute_load_##mem_type); \
@@ -1876,6 +1881,12 @@ u32 execute_store_cpsr_body(u32 _cpsr, u32 store_mask, u32 address)
generate_indirect_branch_cycle_update(dual_thumb); \
} \
+#define thumb_process_cheats() \
+ generate_function_call(thumb_cheat_hook);
+
+#define arm_process_cheats() \
+ generate_function_call(arm_cheat_hook);
+
#define thumb_swi() \
generate_swi_hle_handler(opcode & 0xFF, thumb); \
generate_function_call(execute_swi_thumb); \
diff --git a/arm/arm_stub.S b/arm/arm_stub.S
index e0f02f4..848d311 100644
--- a/arm/arm_stub.S
+++ b/arm/arm_stub.S
@@ -67,14 +67,8 @@ _##symbol:
#define MODE_SUPERVISOR 3
-#ifdef __ARM_ARCH_7A__
- #define extract_u16(rd, rs) \
- uxth rd, rs
-#else
- #define extract_u16(rd, rs) \
- bic rd, rs, #0xff000000 ;\
- bic rd, rd, #0x00ff0000
-#endif
+#define extract_u16(rd, rs) \
+ uxth rd, rs
@ Will load the register set from memory into the appropriate cached registers.
@ See arm_emit.h for listing explanation.
@@ -288,6 +282,22 @@ arm_update_gba_builder(idle_arm, arm, add)
arm_update_gba_builder(idle_thumb, thumb, add)
+@ Cheat hooks for master function
+@ This is called whenever PC == cheats-master-function
+@ Just calls the C function to process cheats
+
+#define cheat_hook_builder(mode) ;\
+defsymbl(mode##_cheat_hook) ;\
+ save_flags() ;\
+ store_registers_##mode() ;\
+ call_c_function(process_cheats) ;\
+ load_registers_##mode() ;\
+ restore_flags() ;\
+ bx lr ;\
+
+cheat_hook_builder(arm)
+cheat_hook_builder(thumb)
+
@ These are b stubs for performing indirect branches. They are not
@ linked to and don't return, instead they link elsewhere.
@@ -763,12 +773,10 @@ lookup_pc:
#define sign_extend_u32(reg)
#define sign_extend_s8(reg) ;\
- mov reg, reg, lsl #24 /* shift reg into upper 8bits */;\
- mov reg, reg, asr #24 /* shift down, sign extending */;\
+ sxtb reg, reg
#define sign_extend_s16(reg) ;\
- mov reg, reg, lsl #16 /* shift reg into upper 16bits */;\
- mov reg, reg, asr #16 /* shift down, sign extending */;\
+ sxth reg, reg
#define execute_load_op_u8(load_op) ;\
mov r0, r0, lsl #17 ;\
@@ -822,11 +830,11 @@ ext_load_##load_type: ;\
.pool
-execute_load_builder(u8, 8, ldrneb, #0xF0000000)
-execute_load_builder(s8, 8, ldrnesb, #0xF0000000)
-execute_load_builder(u16, 16, ldrneh, #0xF0000001)
-execute_load_builder(s16, 16_signed, ldrnesh, #0xF0000001)
-execute_load_builder(u32, 32, ldrne, #0xF0000000)
+execute_load_builder(u8, 8, ldrb, #0xF0000000)
+execute_load_builder(s8, 8, ldrsb, #0xF0000000)
+execute_load_builder(u16, 16, ldrh, #0xF0000001)
+execute_load_builder(s16, 16_signed, ldrsh, #0xF0000001)
+execute_load_builder(u32, 32, ldr, #0xF0000003)
.data