summaryrefslogtreecommitdiff
path: root/cpu.c
diff options
context:
space:
mode:
authorDavid Guillen Fandos2021-03-17 18:33:02 +0100
committerDavid Guillen Fandos2021-03-17 18:33:02 +0100
commitfb7ca09b019248b9a0aba481ea55386f71053d73 (patch)
tree4b4c650c5b0aca014747e43c29693bbb4e6c00f3 /cpu.c
parent34e672ed25f96c3558534ac24523103f3711e58a (diff)
downloadpicogpsp-fb7ca09b019248b9a0aba481ea55386f71053d73.tar.gz
picogpsp-fb7ca09b019248b9a0aba481ea55386f71053d73.tar.bz2
picogpsp-fb7ca09b019248b9a0aba481ea55386f71053d73.zip
Remove BIOS reserved translation area
This is not really necessary since it can share area with ROM. Performance impact should be very minimal (haven't noticed it myself) and could be compensated (even by a positive offset) if we bump the ROM cache area size. Tested with several dynarecs.
Diffstat (limited to 'cpu.c')
-rw-r--r--cpu.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/cpu.c b/cpu.c
index 88db1e9..2c93f38 100644
--- a/cpu.c
+++ b/cpu.c
@@ -1639,8 +1639,6 @@ void raise_interrupt(irq_type irq_raised)
reg[REG_CPSR] = 0xD2;
reg[REG_PC] = 0x00000018;
- bios_region_read_allow();
-
set_cpu_mode(MODE_IRQ);
reg[CPU_HALT_STATE] = CPU_ACTIVE;
reg[CHANGED_PC_STATUS] = 1;